JP2022184115A - Power conversion device - Google Patents

Abstract

To provide a power conversion device that compensates biased magnetism of a transformer of the power conversion device with high precision without overcompensation.SOLUTION: A power conversion device 1 includes: an inverse transformer 3 that bridge-connects semiconductor switching elements, converts DC power to AC power, and applies the AC power to a primary winding of a transformer 4; and a control unit 2 that adjusts the output power of the inverse transformer 3 by controlling on/off of the semiconductor switching elements. The control unit 2 has: a carrier wave generating unit 22 that generates a carrier wave for determining a switching period of the inverse transformer 3; a magnetic bias compensation unit 20 for obtaining a magnetic bias compensation command value whose value is adjusted in units of carrier wave cycles according to the magnetic bias amount of the transformer 4 or the integration of the magnetic bias amount; and a gate driver unit 23 that generates a gate signal for the semiconductor switching element by comparing the carrier wave and the magnetic bias compensation command value.SELECTED DRAWING: Figure 1

Description

The present invention relates to a power converter, and more particularly to a power converter that transforms power using a transformer.

The magnetic flux density passing through the iron core of a transformer has an upper limit that depends on the cross-sectional area and material. If the magnetic flux density increases beyond the allowable magnetic flux density, magnetic saturation occurs, causing an overcurrent in the windings.

In addition, since the magnetic flux generated in the iron core is proportional to the integral of the voltage applied to the winding, if the positive and negative of the AC voltage applied to the winding are unbalanced, a biased magnetism will be generated in either the positive or negative direction. overcurrent occurs.

Power transformation using DC/AC conversion with semiconductor switching elements and transformers is widely used, and the high switching frequency makes it difficult for the iron core to become magnetically saturated, so it is possible to reduce the size of the transformer. .

However, as the switching frequency becomes higher, the ratio of positive and negative imbalances in the switching cycle due to factors such as individual differences in the switching element itself and the drive circuit increases. connected to magnetism. If overcurrent occurs due to biased magnetism, semiconductor switching elements and peripheral circuits may be damaged.

Therefore, techniques have been proposed for suppressing magnetic bias in power converters that use transformers. For example, in Patent Document 1, the duty ratio of the on-off signal of the switching element of the inverter unit that detects the amount of biased magnetism of the transformer and applies AC power to the primary winding of the transformer with respect to the magnitude of the amount of biased magnetism A method of suppressing magnetic bias is disclosed by changing .

Japanese Patent Application Laid-Open No. 2019-103200

However, in the technology disclosed in Patent Document 1, when a magnetic bias occurs, the ON/OFF time of the switching element is corrected in each switching cycle. If it is not sufficiently short, overcompensation may occur, causing biased magnetism in the opposite direction, and overcurrent may flow.

The object of the present invention, which has been made in view of such circumstances, is to prevent overcompensation of biased magnetism and to suppress biased magnetism while preventing a decrease in the resolution of the amount of compensation due to the closeness of the switching cycle and the control cycle accompanying the increase in switching frequency. An object of the present invention is to provide a power conversion device capable of

In order to solve the above problems, the power conversion apparatus according to the present invention includes an inverter that bridge-connects semiconductor switching elements, converts DC power to AC power and applies it to the primary winding of a transformer, and the semiconductor switching device. A control unit that controls the on/off of the element to adjust the output power of the inverter, and the control unit includes a bias magnetism detection unit that detects the amount of bias magnetism of the transformer, and the inverter. A carrier wave generating section for generating a carrier wave that determines a switching cycle, a bias compensating section for obtaining a bias compensating command value whose value is adjusted in units of the cycle of the carrier wave according to the amount of the bias magnetism, and the carrier and a gate driver section for generating a gate signal for the semiconductor switching element by comparing the wave and the bias compensating command value.

Further, the power conversion device according to the present invention includes a forward converter that converts AC power between terminals of other windings of the transformer into DC power, and the control unit converts the output voltage of the forward converter to A command value calculation section for obtaining a duty command value for control is provided, and the bias compensating section obtains an offset value whose value is adjusted for each cycle of the carrier wave, and calculates the offset value and the duty command value. The magnetic bias compensation command value is generated by addition.

Further, in the power converter according to the present invention, the command value calculation unit obtains the duty command value of a constant value during the period of the integer period of the carrier wave, and the bias compensating unit calculates the duty command value of the carrier wave. The offset value is obtained by adjusting the value for each period of the carrier wave during an integer period.

Further, in the power conversion apparatus according to the present invention, the magnetic bias detection unit includes a period counter unit that counts the period of the primary winding current of the transformer and generates an arrival signal that reaches an integer period, and the arrival signal , an integrator that integrates the primary winding current to output an integrated value, and resets the integrated value to an initial value by the reset signal, and the arrival signal, and a sample-and-hold unit that holds the integrated value output from the integrator.

ADVANTAGE OF THE INVENTION According to this invention, it becomes possible to suppress bias magnetization, preventing the overcompensation of bias magnetism, and preventing the resolution of the amount of compensation from being lowered due to the closeness to the control cycle associated with high-frequency switching.

BRIEF DESCRIPTION OF THE DRAWINGS It is a figure which shows the structural example of the power converter device which concerns on the 1st Embodiment of this invention. FIG. 3 is a block diagram showing a configuration example of a magnetic bias compensator in the power converter according to the first embodiment of the present invention; FIG. 2 is a block diagram showing a configuration example of a magnetic bias detector in the power converter according to the first embodiment of the present invention; 3 is a block diagram showing a configuration example of an offset value calculator in the power converter according to the first embodiment of the present invention; FIG. FIG. 4 is a diagram showing generation of an on/off pattern of the semiconductor switching element according to the first embodiment of the present invention; FIG. 4 is a diagram showing generation of an on/off pattern of the semiconductor switching element according to the first embodiment of the present invention; It is a figure which shows the structural example of the power converter device which concerns on the 2nd Embodiment of this invention. FIG. 7 is a block diagram showing a configuration example of a magnetic bias compensator in the power converter according to the second embodiment of the present invention; FIG. 7 is a block diagram showing a configuration example of a magnetic bias detector in a power converter according to a second embodiment of the present invention; FIG. 7 is a block diagram showing a configuration example of a magnetic bias compensation selection unit in the power converter according to the second embodiment of the present invention; FIG. 8 is a diagram showing generated waveforms of on/off patterns, current waveforms, edge pulses, and bias magnetism detection amounts of the semiconductor switching element according to the second embodiment of the present invention; FIG. 8 is a diagram showing generated waveforms of on/off patterns, current waveforms, edge pulses, and bias magnetism detection amounts of the semiconductor switching element according to the second embodiment of the present invention; FIG. 8 is a diagram showing generated waveforms of on/off patterns, current waveforms, edge pulses, and bias magnetism detection amounts of the semiconductor switching element according to the second embodiment of the present invention; It is a figure which shows the structural example of the conventional power converter device.

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 14 shows a configuration example of a conventional power converter 100 for comparison with the present invention. The conventional power conversion device 100 includes a control unit 200, an inverter 3, a transformer 4, a forward converter 5, an input smoothing capacitor 6, a current detector 7, an output reactor 8, an output smoothing capacitor 9 and an output voltage detector 91 .

The control unit 200 includes a command value calculation unit 21 , a triangular wave generation unit 22 and a gate driver unit 23 .

The command value calculation unit 21 obtains duty command values P _ref and N _ref for controlling the output voltage V _Out detected by the output voltage detector 91 to a target voltage, and outputs them to the gate driver unit 23 .

The triangular wave generating section 22 generates a carrier wave (triangular wave) V _tri that determines the switching period of the inverter 3 and outputs it to the gate driver section 23 .

The gate driver section 23 performs PWM (Pulse Width Modulation) control by comparing the triangular wave V _tri generated by the triangular wave generating section 22 and the duty command values P _ref and N _ref generated by the command value calculating section 21 . Gate signals G 31 , G 32 , G 33 and G 34 are generated and output to the inverter 3 .

<First embodiment>
FIG. 1 is a diagram showing a configuration example of a power conversion device 1 according to a first embodiment of the present invention. The power conversion device 1 includes a control unit 2, an inverter 3, a transformer 4, a forward converter 5, an input smoothing capacitor 6, a current detector 7, an output reactor 8, and an output smoothing capacitor 9. , and an output voltage detector 91 . The configuration of the control unit 2 of the power converter 1 is different from the control unit 200 of the conventional power converter 100 .

The power converter 1 insulates and transforms the DC power input from the DC power supply 10 and outputs it to the load 11 .

Input smoothing capacitor 6 smoothes the DC power input from DC power supply 10 .

The inverter 3 bridges the semiconductor switching elements 31 , 32 , 33 , 34 and connects the intermediate points a, b to the primary winding of the transformer 4 . As a result, the inverter 3 converts the DC power smoothed by the input smoothing capacitor 6 into AC power and applies it to the primary winding of the transformer 4 .

The transformer 4 has a plurality of windings, and the primary winding and the other windings are independent. Transformer 4 insulates the AC power generated by inverter 3 , and in the example of FIG.

Transformer 4 is not limited to the two-winding transformer shown in FIG. 1, and may be a three-winding transformer. When the transformer 4 is a three-winding transformer, the power conversion device 1 further includes a rectifier 5 sharing the iron core of the transformer 4, an output reactor 8, and an output smoothing capacitor 9. Prepare. The number of the output voltage detector 91 and the control section 2 may remain one.

The forward converter 5 converts AC power between terminals of other windings of the transformer 4 into DC power. The other windings of the transformer 4 are the secondary windings when the transformer 4 is a two-winding transformer, and the secondary windings when the transformer 4 is a three-winding transformer. and a tertiary winding.

An output reactor 8 and an output smoothing capacitor 9 adjust the quality of the DC power generated by the forward converter 5 and output it to a load 11 outside the power converter 1 .

A current detector 7 detects a current (primary winding current) I _Pri flowing through the primary winding of the transformer 4 and outputs it to the control unit 2 .

The output voltage detector 91 detects the output voltage across the output smoothing capacitor 9 and outputs it to the controller 2 .

The control unit 2 includes a magnetic bias compensation unit 20 , a command value calculation unit 21 , a triangular wave generation unit (carrier wave generation unit) 22 and a gate driver unit 23 . The _control unit 2 outputs gate _signals G31, G32, By generating G33 and G34, the semiconductor switching elements 31, 32, 33, and 34 are controlled to turn on/off, and the output power of the inverter 3 is adjusted.

The command value calculator 21 obtains duty command values P _{ref and} N _ref for controlling the output voltage V _Out detected by the output voltage detector 91 to a target voltage, and outputs the duty command values to the magnetic bias compensator 20 . .

The triangular wave generator 22 generates a carrier wave (triangular wave) V _tri that determines the switching period of the inverter 3 and outputs it to the bias compensator 20 and the gate driver 23 . Note that the carrier wave may be a sawtooth wave.

The bias compensator 20 calculates the duty command value P _ref calculated by the command value calculator 21 in units of cycles of the triangular wave V _tri generated by the triangular wave generator 22 according to the bias magnetism I _Sat of the transformer 4 . , N _ref are adjusted, and the magnetic bias compensation command values P _refComp , N _refComp are obtained. In this specification, "adjusting the value" also includes not changing the value. That is, the magnetic bias compensation command values P _refComp and N _refComp change from the duty command values P _{ref and} N ref in one cycle of the triangular wave V _tri , and change from the duty command values P _{ref and} N _ref in another cycle. You don't have to. The details of the magnetic bias compensator 20 will be described later.

The gate driver section 23 compares the triangular wave V _tri generated by the triangular wave generating section 22 with the magnetic bias compensation command values P _refComp and N _refComp generated by the magnetic bias compensating section 20 to generate a PWM-controlled gate signal. G31, G32, G33 and G34 are generated and output to the inverter 3.

(Biased magnetism compensator)
FIG. 2 is a block diagram showing a configuration example of the magnetic bias compensator 20. As shown in FIG. The magnetic bias compensator 20 shown in FIG. 2 includes a magnetic bias detector 24 , an offset value calculator 25 , and a magnetic bias compensation command value generator 26 .

The magnetic bias detector 24 detects the magnetic bias I _Sat of the transformer 4 by integrating the primary winding current I _Pri detected by the current detector 7 over a period of an integer period N (N≧2). The magnetic quantity I _Sat is output to the offset value calculator 25 . When the integer period N is not fixed, the magnetism bias detector 24 also outputs the number of cycles N. FIG. The details of the magnetic bias detector 24 will be described later.

The offset value calculation unit 25 obtains an offset value I _comp ^* whose value is adjusted in units of cycles of the triangular wave V _tri according to the magnetic bias amount I _Sat , and outputs the offset value I comp * to the magnetic bias compensation command value generation unit 26 . The average value of the offset values I _comp ^* becomes a value corresponding to the bias magnetism I _Sat , and the bias magnetism I _Sat is canceled by the offset value I _comp ^* . Details of the offset value calculator 25 will be described later.

The magnetic bias compensation command value generation unit 26 adds the offset value I _comp ^* calculated by the offset value calculation unit 25 and the duty command values P _ref and N _ref to generate the magnetic bias compensation command values P _refComp and N _refComp . generated and output to the gate driver unit 23 .

((bias magnetism detector))
FIG. 3 is a block diagram showing a configuration example of the magnetic bias detector 24. As shown in FIG. The magnetic bias detection section 24 shown in FIG.

The period counter unit 242 counts the period of the primary winding current I _Pri detected by the current detector 7 and outputs an arrival signal to the delay unit 243 and Output to the sample-and-hold unit 244 .

The delay unit 243 delays the arrival signal generated by the period counter unit 242 to generate a reset signal and outputs it to the integrator 241 .

The integrator 241 integrates the primary winding current I _Pri detected by the current detector 7, finds an integrated value that is periodically reset to the initial value by the reset signal output from the delay unit 243, and samples and holds the unit. H.244 output.

The sample-and-hold unit 244 holds the integrated value obtained by the integrator 241 at the input timing of the arrival signal generated by the cycle counter unit 242, and outputs it as the amount of bias I _Sat.

((offset value calculator))
FIG. 4 is a block diagram showing a configuration example of the offset value calculator 25. As shown in FIG. The offset value calculator 25 shown in FIG. 4 has a PI controller 251 , a scale adjuster 252 , a decimal detector 253 , a decimal compensation pulse generator 254 , and an offset value generator 255 .

The PI control unit 251 performs PI control (proportional-integral control) on the magnetic bias amount I _Sat to obtain the magnetic bias compensation amount Comp Nt, and outputs the magnetic bias compensation amount Comp _Nt to the scale adjustment unit 252 and the decimal number detection unit 253 .

The scale adjustment unit 252 performs scale adjustment and truncation of the fractional part. Specifically, the magnetic bias compensation amount Comp _Nt obtained by the PI control unit 251 is multiplied by 1/N, the decimal point is discarded, and the integer magnetic bias compensation amount Comp _Int is obtained. 255 output. Here, N is the integer number of cycles used in the magnetic bias detector 24 described above.

The decimal detection unit 253 subtracts the magnetic bias compensation amount Comp _Nt and the value obtained by multiplying the integer magnetic bias compensation amount Comp _Int by N, obtains the decimal magnetic bias compensation amount Comp _Dec , which is only the decimal part, and calculates the decimal magnetic compensation amount Comp Dec. Output to the pulse generator 254 .

A fractional compensation pulse generator 254 generates a fractional compensation pulse Comp _Dec ^* that changes by a unit amount at a frequency of Comp _Dec cycles during N cycles of the triangular wave V _tri from the triangular wave V _tri and the fractional magnetic bias compensation amount Comp _Dec. Output to the value generator 255 . where Comp _Dec is an integer and N>Comp _Dec. For example, when N=10 and Comp _Nt =12, Comp _Dec =2, so Comp _Dec ^* changes by a unit amount for two cycles out of ten cycles of the triangular wave V _tri . The unit amount is a voltage value corresponding to the integer magnetic bias compensation amount Comp _Int =1.

The offset value generator 255 adds the integer magnetic bias compensation amount Comp _Int and the decimal compensation pulse Comp _Dec ^* to generate the offset value I _Comp ^* . In this way, the offset value I _Comp ^* is adjusted on a cycle-by-cycle basis.

(Positive magnetic field suppression control method)
5 and 6 are diagrams showing the concept of generation of on/off patterns of semiconductor switching elements. In each pattern, the horizontal axis indicates the passage of time. The first waveform from the top shows the waveforms of the triangular wave V _tri and the magnetic bias compensation command values P _refComp and N _refComp . The second waveform from the top shows the waveform of the ON/OFF command of the gate signals G31 and G34 of the inverter 3. FIG. The third waveform from the top shows the waveform of the ON/OFF command of the gate signals G32 and G33 of the inverter 3. FIG.

The waveforms shown in FIGS. 5 and 6 represent the case of N=10 in FIG. Here, it is assumed that the command value calculator 21 obtains constant duty command values P _ref and N _ref during an integer period (10 cycles) of the triangular wave V _tri . Also, the offset value calculator 25 obtains the offset value I _Comp ^* whose value is adjusted in units of the cycle of the triangular wave V _tri .

FIG. 5(a) shows a case where the offset is 0 (offset value I _Comp ^* =0). In this case, the magnetic bias compensation command values P _refComp and N _refComp are set to constant values, and the waveforms of the on/off commands of the gate signals G31 and G34 and the waveforms of the on/off commands of the gate signals G32 and G33 are set to have a constant duty. .

FIG. 5B shows a case where the offset is +1 (integer magnetic bias compensation amount Comp _Int =1, fractional magnetic bias compensation amount Comp _Dec =0). In this case, by offsetting the magnetic bias compensation command values P _refComp and N _refComp by the minimum unit operation amount with respect to the case where the offset is 0, the waveforms of the ON/OFF commands of the gate signals G31 and G34 are is increased, and the duty of the on/off command waveform of the gate signals G32 and G33 is decreased. This results in a switching pattern that compensates for magnetic bias.

FIG. 5(c) shows a case where the offset is +1/10 (integer magnetic bias compensation amount Comp _Int =0, fractional magnetic bias compensation amount Comp _Dec =1). In this case, by offsetting the magnetic bias compensation command values P _refComp and N _refComp by the minimum unit operation amount once every 10 cycles, the duty of the on/off command waveform of the gate signals G31 and G34 is increased. Then, a switching pattern that reduces the duty of the waveform of the ON/OFF command of the gate signals G32 and G33 is generated once every 10 cycles. As a result, a magnetic bias compensation amount smaller than the minimum unit operation amount can be obtained.

FIG. 6A shows a case where the offset is +2/10 (integer magnetic bias compensation amount Comp _Int =0, fractional magnetic bias compensation amount Comp _Dec =2). In this case, as in the case where the offset is +1/10, the magnetic bias compensation command values P _refComp and N _refComp are offset by the minimum unit manipulated variable twice every 10 cycles. As a result, a magnetic bias compensation amount smaller than the minimum unit operation amount can be obtained.

FIG. 6B shows a case where the offset is -1/10 (integer magnetic bias compensation amount Comp _Int =0, fractional magnetic bias compensation amount Comp _Dec =-1). In this case, by operating with the opposite polarity to the case where the offset is +1/10, it is possible to compensate for the opposite polarity magnetic bias.

The gate signals G31 to G34 can be similarly generated when the offset is greater than 1 and when the offset is less than -1. For example, when the offset is +15/10 (integer magnetic bias compensation amount Comp _Int = 1, fractional magnetic bias compensation amount Comp _Dec = 5), the magnetic bias compensation command values P _refComp and N _refComp are set 5 times out of 10 cycles. is offset by the minimum unit operation amount, and the remaining five times are offset twice the minimum unit operation amount. Thereby, the magnetic bias compensation amount can be controlled with high accuracy.

The power converter 1 can be configured by simply adding a magnetic bias compensator 20 to the conventional power converter 100 shown in FIG. Then, as described above, the power conversion device 1 detects the magnetic bias amount of the transformer 4 to compensate for the magnetic bias, and adjusts the compensation amount for each cycle of the carrier wave according to the magnetic bias amount. Therefore, it is possible to compensate for the biased magnetism of the transformer 4 with high accuracy without overcompensation.

<Second embodiment>
Next, the power converter 1a according to the second embodiment will be described. FIG. 7 is a diagram showing a configuration example of a power converter 1a according to the second embodiment of the present invention. A power converter 1a according to the present embodiment differs from the power converter 1 according to the first embodiment in that a magnetic bias compensator 20a is provided instead of the magnetic bias compensator 20. FIG. Since other configurations are the same as those of the first embodiment, description thereof is omitted.

(Biased magnetism compensator)
FIG. 8 is a block diagram showing a configuration example of the magnetic bias compensator 20a. The magnetic bias compensator 20 a shown in FIG. 8 has a magnetic bias detector 27 , a magnetic bias compensation selector 28 , and a magnetic bias compensation command value generator 29 .

A magnetic bias detection unit 27 detects and integrates the amount of magnetic bias in the transformer 4 from the primary winding current I _Pri detected by the current detector 7, and when the value exceeds a certain value on the positive side, a positive magnetic bias compensation signal is generated. Sat _P ^* is output to the magnetic bias compensation selection section 28 , and when it becomes equal to or less than a certain value on the negative side, the magnetic bias compensation signal Sat _N ^* on the negative side is output to the magnetic bias compensation selection section 28 . The details of the magnetic bias detector 27 will be described later.

The magnetic bias compensation selection unit 28 selects the positive magnetic bias compensation signal Sat _P * and the negative magnetic bias compensation signal Sat N ^* output from the magnetic bias detection unit 27, the positive magnetic bias compensation offset amount Comp ^* P, and the negative magnetic bias compensation signal Sat _N ^* . When the magnetic bias compensating offset amount Comp ^* N is input, and the positive magnetic bias compensating signal Sat _P ^* or the negative magnetic bias compensating signal Sat _N ^* is input, the positive magnetic bias compensating offset amount Comp ^* P is obtained. Alternatively, the negative magnetic bias compensation offset amount Comp ^* N is selected as the output of the magnetic bias compensation offset amount Comp ^* and sent to the magnetic bias compensation command value generator 29 . The details of the magnetic bias compensation selection unit 28 will be described later.

The magnetic bias compensation command value generator 29 has a Pref adder 291 and an Nref adder 292 .

The Pref adder 291 adds the magnetic bias compensation offset amount Comp ^* sent by the magnetic bias compensation selection unit 28 and the duty command value P _ref to generate the magnetic bias compensation command value P _refComp . output to

The Nref adder 292 adds the magnetic bias compensation offset amount Comp ^* sent by the magnetic bias compensation selection unit 28 and the duty command value N _ref to generate the magnetic bias compensation command value N _refComp , and the gate driver unit 23 output to

((bias magnetism detector))
FIG. 9 is a block diagram showing a configuration example of the magnetic bias detector 27. As shown in FIG. The magnetic bias detector 27 shown in FIG.

The edge detector 272 detects a rising edge or a falling edge of the primary winding current I _Pri detected by the current detector 7 and outputs an edge pulse signal Edge to the sample-and-hold section 273 .

The integrator 271 integrates the primary winding current I _Pri detected by the current detector 7 and outputs the integrated value to the sample-and-hold section 273 . The integrated value is reset to 0 by a reset signal output from the OR section 276 .

The sample-and-hold unit 273 holds the integrated value obtained by the integrator 271 at the input timing of the edge pulse signal Edge generated by the edge detection unit 272, and outputs it as the amount of bias I _Sat.

The comparator P274 compares the bias magnetism I _Sat held by the sample-and-hold unit 273 with a preset positive integration threshold Sat _Plim , and the bias magnetization I _Sat exceeds the positive integration threshold Sat _Plim . A positive magnetic bias compensation signal Sat _P ^* is output when

A comparator N275 compares the bias magnetism I _Sat held by the sample-and-hold unit 273 with a preset negative integration threshold Sat _Nlim , and determines if the bias magnetization I _Sat is below the negative integration threshold Sat _Nlim. Negative magnetic bias compensation signal Sat _N ^* is output when

A logical sum unit 276 obtains a logical sum of the positive side magnetic bias compensation signal Sat _P ^* output from the comparator P274 and the negative side magnetic bias compensation signal Sat _N ^* output from the comparator N275. 271 outputs a reset signal.

((Biased magnetism compensation selection part))
FIG. 10 is a block diagram showing a configuration example of the magnetic bias compensation selection unit 28. As shown in FIG. The magnetic bias compensation selector 28 shown in FIG. 10 has a positive magnetic bias compensation selector 281 , a negative magnetic bias compensation selector 282 , and a magnetic bias compensation offset amount adder 283 .

The positive side magnetism compensation selector 281 outputs a preset positive side magnetism compensation offset amount Comp ^* P when the positive side magnetism compensation signal Sat _P ^* is input, and outputs 0 otherwise. do.

The negative magnetic bias compensation selector 282 outputs a preset negative magnetic bias compensation offset amount Comp ^* N when the negative magnetic bias compensation signal Sat _N ^* is input, and outputs 0 otherwise. do.

A magnetic bias compensation offset amount adding section 283 adds the output of the positive side magnetic bias compensation selector 281 and the output of the negative side magnetic bias compensation selector 282 to output a magnetic bias compensation offset amount Comp ^* .

(Positive magnetic field suppression control method)
11 to 13 are diagrams showing the concept of the generation waveform of the on/off pattern of the semiconductor switching element, the current waveform, the edge pulse signal, and the amount of bias magnetism. In each pattern, the horizontal axis indicates the passage of time. The first waveform from the top shows the waveforms of the triangular wave V _tri and the magnetic bias compensation command values P _refComp and N _refComp . The second waveform from the top shows the waveform of the ON/OFF command of the gate signals G31 and G34 of the inverter 3. FIG. The third waveform from the top shows the waveform of the ON/OFF command of the gate signals G32 and G33 of the inverter 3. FIG. The fourth waveform from the top shows the waveform of the primary winding current I _Pri detected by the current detector 7 . The fifth waveform from the top shows the waveform of the edge pulse signal Edge detected by the edge detection section 272 . The sixth waveform from the top shows the waveforms of the bias magnetism I _Sat held by the sample and hold unit 273, the positive integration threshold Sat _Plim , and the negative integration threshold Sat _Nlim .

The waveforms shown in FIGS. 11 to 13 show the case where the edge detection section 272 detects the negative rising edge.

FIG. 11 shows the case where there is no positive/negative imbalance in the switching cycle and no magnetic bias occurs. In this case, since the magnetic bias amount I _Sat does not exceed the positive side integration threshold Sat _Plim and the negative side integration threshold Sat _Nlim , neither the positive side magnetic bias compensation selector 281 nor the negative side magnetic bias compensation selector 282 operates. Therefore, the magnetic bias compensation offset amount Comp ^* is 0, and the magnetic bias compensation command value generator 29 does not interfere with the duty command values P _ref and N _ref output by the command value calculator 21 .

FIG. 12 shows a case where biased magnetism occurs on the positive side in the switching cycle. In this case, when the magnetic bias amount I _Sat exceeds the positive integration threshold Sat _Plim , the positive magnetic bias compensation selector 281 operates, and the magnetic bias compensation offset amount Comp ^* becomes equal to Comp ^* P. By offsetting the magnetic compensation command values P _refComp and N _refComp by the positive magnetic bias compensation offset amount Comp ^* P, the on/off command waveform duty of the gate signals G31 and G34 in one switching cycle period is reduced, and the gate signal G32 is reduced. , G33 to increase the duty of the on/off command waveform. As a result, the necessary minimum bias compensation can be performed.

FIG. 13 shows a case where biased magnetism occurs on the negative side in the switching period. In this case, when the magnetic bias amount I _Sat exceeds the negative integration threshold Sat _Nlim , the negative magnetic bias compensation selector 282 operates, the magnetic bias compensation offset amount Comp* becomes equal to Comp*N, and the magnetic bias compensation offset amount Comp ^* becomes equal to Comp ^* N. The magnetic compensation command values P _refComp and N _refComp are offset by the negative side magnetic bias compensation offset amount Comp ^* N to increase the on/off command waveform duty of the gate signals G31 and G34 in one switching cycle period, thereby increasing the gate signal G32. , G33 to reduce the duty of the on/off command waveform. As a result, the necessary minimum bias compensation can be performed.

The power converter 1a can be configured by simply adding a magnetic bias compensator 20a to the conventional power converter 100 shown in FIG. Then, as described above, the power conversion device 1a detects the magnetic bias amount I _Sat of the transformer 4 to compensate for the magnetic bias, and applies the magnetic bias compensation offset amount Comp ^* according to the magnetic bias amount I _Sat. Adjust your cycle. Therefore, it is possible to compensate for the biased magnetism of the transformer 4 with high accuracy without overcompensation.

In addition, in the technique disclosed in Patent Document 1, since the correction circuit always affects the duty generation unit and the gate drive circuit, there is no need for magnetic bias compensation when no magnetic bias is generated or when the output is small. Even in such a case, the output will be affected. In this regard, the power conversion device 1 a does not add the magnetic bias compensation offset amount Comp ^* to the duty command value of the command value calculation unit 21 when the transformer 4 is not biased. Therefore, when no magnetic bias is generated, it does not interfere with the duty command values P _ref and N _ref generated by the command value calculator 21 . That is, the power conversion device 1a can suppress magnetism bias without excessively interfering with the ON/OFF signals of the switching elements.

Further, the power conversion device 1a according to the present invention realizes magnetic bias compensation by the magnetic bias detection unit 27, the magnetic bias compensation selection unit 28, and the magnetic bias compensation command value generation unit 29, which exist independently. Therefore, it can be easily added to an existing power converter that does not perform magnetic bias compensation.

Although the above embodiments have been described as representative examples, it will be apparent to those skilled in the art that many modifications and substitutions may be made within the spirit and scope of the invention. Therefore, the present invention should not be construed as limited by the embodiments described above, and various modifications and changes are possible without departing from the scope of the claims.

Reference Signs List 1, 1a power conversion device 2 control unit 3 inverter 4 transformer 5 forward converter 6 input smoothing capacitor 7 current detector 8 output reactor 9 output smoothing capacitor 10 DC power supply 11 load 20, 20a bias compensator 21 command value Arithmetic unit 22 triangular wave generator (carrier wave generator)
23 gate driver unit 24, 27 magnetic bias detection unit 22 magnetic bias compensation unit 25 offset value calculation unit 26 magnetic bias compensation command value generation unit 28 magnetic bias compensation selection unit 31 to 34 semiconductor switching element 91 output voltage detector 241 integrator 242 Period counter section 243 Delay section 244 Sample and hold section 251 PI control section 252 Scale adjustment section 253 Decimal number detection section 254 Decimal number compensation pulse generation section 255 Offset value generation section 271 Integrator 272 Edge detection section 273 Sample and hold section 274 Comparator P
275 Comparator N
276 logical sum unit 281 positive magnetic bias compensation selector 282 negative magnetic bias compensation selector 283 magnetic bias compensation offset amount addition unit

Claims (7)

an inverter that bridge-connects semiconductor switching elements, converts DC power to AC power, and applies the AC power to the primary winding of the transformer;
A control unit that controls the on/off of the semiconductor switching element to adjust the output power of the inverter,
The control unit
a carrier wave generator for generating a carrier wave that determines the switching period of the inverter;
a magnetic bias compensation unit that obtains a magnetic bias compensation command value whose value is adjusted in units of cycles of the carrier wave according to the magnetic bias amount of the transformer or the integration of the magnetic bias amount;
a gate driver section that generates a gate signal for the semiconductor switching element by comparing the carrier wave and the bias compensating command value;
A power conversion device characterized by comprising: A forward converter for converting AC power between terminals of other windings of the transformer to DC power,
The control unit
Having a command value calculation unit for obtaining a duty command value for controlling the output voltage of the forward converter,
The magnetic bias compensator is
Having a biased magnetism detection unit that detects a biased magnetism amount of the transformer,
Obtaining an offset value whose value is adjusted for each period of the carrier wave and whose average value corresponds to the amount of biased magnetism, and adding the offset value and the duty command value to generate the biased magnetism compensation command value. The power converter according to claim 1, characterized by: The command value calculation unit obtains the duty command value of a constant value during the period of the integer period of the carrier wave,
3. The power conversion according to claim 2, wherein the magnetic bias compensating unit obtains the offset value adjusted for each period of the carrier wave during the period of the integer period of the carrier wave. Device. The magnetic bias detection unit is
a cycle counter unit that counts the cycle of the primary winding current of the transformer and generates an arrival signal that reaches an integer cycle;
a delay unit that delays the arrival signal to generate a reset signal;
an integrator that integrates the primary winding current, outputs an integrated value, and resets the integrated value to an initial value by the reset signal;
a sample-and-hold unit that holds the integrated value output from the integrator according to the arrival signal;
The power converter according to claim 2 or 3, characterized by comprising: A forward converter for converting AC power between terminals of other windings of the transformer to DC power,
The control unit
Having a command value calculation unit for obtaining a duty command value for controlling the output voltage of the forward converter,
The magnetic bias compensator is
a magnetic bias detection unit that integrates the amount of magnetic bias of the transformer and outputs a positive magnetic bias compensation signal or a negative magnetic bias compensation signal when a constant value on the positive or negative side is reached;
a magnetic bias compensation selection unit that outputs a magnetic bias compensation offset amount based on the positive side magnetic bias compensation signal or the negative side magnetic bias compensation signal;
a magnetic bias compensation command value generator that adds the magnetic bias compensation offset amount to the duty command value;
The power converter according to claim 1, characterized by comprising: The magnetic bias detection unit is
an edge detection unit that detects a rising edge or a falling edge of the primary winding current of the transformer to generate an edge detection pulse;
an integrator that integrates the primary winding current, outputs an integrated value, and resets the integrated value to an initial value by a reset signal;
a sample-and-hold unit that holds the integrated value output from the integrator by the edge detection pulse;
a comparator P that compares the integrated value of the deviation of the primary winding current held by the sample-and-hold unit for each cycle with a positive integration threshold value and outputs the positive magnetic bias compensation signal;
a comparator N that compares the integrated value of the deviation of the primary winding current held by the sample-and-hold unit for each cycle with a negative integration threshold value and outputs the negative magnetic bias compensation signal;
a logical sum unit for calculating a logical sum of the positive magnetic bias compensation signal and the negative magnetic bias compensation signal and outputting a reset signal to be input to the integrator;
The power converter according to claim 5, characterized by having: The magnetic bias compensation selection unit is
a positive side magnetism compensation selector that selects a positive side magnetism compensation offset amount according to the positive side magnetism compensation signal;
a negative magnetic bias compensation selector that selects a negative magnetic bias compensation offset amount based on the negative magnetic bias compensation signal;
a magnetic bias compensation offset amount addition unit that adds the output of the positive magnetic bias compensation selector and the output of the negative magnetic bias compensation selector;
The power converter according to claim 5 or 6, characterized by comprising:

Images