JP2022089339A - Temperature estimation device and control unit - Google Patents

Abstract

To provide a temperature estimation device and a control unit, with which the operation temperature of a semiconductor switching element can be estimated with higher accuracy than before.SOLUTION: There is provided a temperature estimation device to estimate the operation temperature of a semiconductor switching element for an upper arm and a semiconductor switching element for a lower arm, in an inverter circuit including one or more switching legs, each switching leg including the semiconductor switching element for an upper arm and the semiconductor switching element for a lower arm provided with respective reflux diodes. In the temperature estimation device, the operation temperature is estimated based on the forward voltage and forward current of the reflux diode, the forward voltage and forward current being acquired from the inverter circuit in an extended time width that extends, beyond a predetermined time width, a dead time between the semiconductor switching element for an upper arm and the semiconductor switching element for a lower arm.SELECTED DRAWING: Figure 1

Description

The present invention relates to a temperature estimation device and a control device.

The following Patent Document 1 discloses a power converter. The purpose of this power converter is to estimate the junction temperature of the switching element that follows a steep temperature rise with high accuracy. It is a power converter that uses a semiconductor switching element and is used as a semiconductor switching element. The junction temperature of the semiconductor switching element is estimated from the current detector that detects the flowing current, the voltage detector that detects the saturation voltage and forward voltage of the semiconductor switching element, and the saturation voltage, forward voltage, and current (forward current). It has a control unit and a control unit.

Japanese Unexamined Patent Publication No. 2019-216571

By the way, in the power converter, the junction temperature of the semiconductor switching element is estimated as the operating temperature of the semiconductor switching element based on the saturation voltage, the forward voltage and the forward current which are the characteristic quantities of the semiconductor switching element. However, in the power converter, it is necessary to detect the characteristic amount of the semiconductor switching element in a relatively short time, and for this purpose, high-speed operation is required, so that the noise toughness is low.

The present invention has been made in view of the above circumstances, and an object of the present invention is to estimate the operating temperature of a semiconductor switching element without requiring high-speed operation.

In order to achieve the above object, in the present invention, as a first solution to the temperature estimation device, a switching leg including a semiconductor switching element for an upper arm and a semiconductor switching element for a lower arm, each of which is provided with a freewheeling diode, is provided. A temperature estimation device for estimating the operating temperature of the semiconductor switching element for the upper arm and the semiconductor switching element for the lower arm in one or a plurality of inverter circuits provided, wherein the semiconductor switching element for the upper arm and the semiconductor switching element for the lower arm are used. A means of estimating the operating temperature based on the forward voltage and the forward current of the freewheeling diode acquired from the inverter circuit in an extended time width in which the dead time with the semiconductor switching element is expanded beyond the predetermined time width. adopt.

In the present invention, as a second solution for the temperature estimation device, in the first solution, the expansion time width controls the upper arm semiconductor switching element and the lower arm semiconductor switching element, respectively. Among the gate signals of one and the other, the means of setting by making the ON time of the other shorter than the ON time of one is adopted.

In the present invention, as a third solution according to the temperature estimation device, in the first solution, the expansion time width controls the upper arm semiconductor switching element and the lower arm semiconductor switching element, respectively. Of the one and the other gate signals, the means of being set by removing the ON pulse of the other gate signal is adopted.

In the present invention, as the fourth solution means for the temperature estimation device, in any one of the first to third solutions, the inverter circuit is a three-phase inverter circuit provided with three switching legs. , The means of estimating the operating temperature based on the forward voltage and the forward current obtained from the three-phase inverter circuit is adopted.

In the present invention, as a solution relating to the control device, the temperature estimation device according to any one of the first to fourth solutions and the semiconductor switching element for the upper arm based on the operating temperature estimated by the temperature estimation device. A means of comprising a gate signal generation unit for generating a gate signal for controlling the lower arm semiconductor switching element is adopted.

According to the present invention, since the operating temperatures of the semiconductor switching element for the upper arm and the semiconductor switching element for the lower arm are estimated based on the forward voltage and the forward current acquired in the extended time width, high-speed operation is required. It is possible to estimate the operating temperature without any problem.

It is a block diagram which shows the functional structure of the temperature estimation apparatus and control apparatus which concerns on one Embodiment of this invention. It is a flowchart which shows the whole operation of the temperature estimation apparatus and control apparatus which concerns on one Embodiment of this invention. It is a timing chart which shows the operation of the temperature estimation apparatus and control apparatus which concerns on one Embodiment of this invention. It is a flowchart which shows the detailed operation of the temperature estimation apparatus and control apparatus which concerns on one Embodiment of this invention.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
As shown in FIG. 1, the control device A according to the present embodiment is a device whose control target is the three-phase inverter circuit B, and includes a temperature estimation unit a1 and a gate signal generation unit a2 as functional components.

The three-phase inverter circuit B is composed of first to sixth MOS type transistors 1 to 6, and converts the DC power supplied from the DC power supply 7 into three-phase AC power and supplies it to the motor 8. The three-phase inverter circuit B includes first to third switching legs Ru, Rv, and Rw corresponding to each phase, and first to fourth voltage sensors 9 to 12 and first to third current sensors 13 to 15. Is provided incidentally.

Of these first to third switching legs Ru, Rv, and Rw, the first switching leg Ru is a U-phase switching leg corresponding to the U phase. The second switching leg Rv is a V-phase switching leg corresponding to the V-phase. The third switching leg Rw is a W phase switching leg corresponding to the W phase.

The first to third switching legs Ru, Rv, and Rw each form the first, third, and fifth MOS type transistors 1, 3, and 5 that form the upper arm, and the second, fourth, and third that form the lower arm. It includes 6MOS type transistors 2, 4, and 6. These 1st to 6th MOS type transistors 1 to 6 correspond to the semiconductor switching element of the present invention.

That is, the U-phase switching leg Ru includes a MOS transistor 1 for the upper arm and a MOS transistor 2 for the lower arm. The V-phase switching leg Rv includes a MOS transistor 3 for the upper arm and a MOS transistor 4 for the lower arm. The W-phase switching leg Rw includes a MOS transistor 5 for the upper arm and a MOS transistor 6 for the lower arm.

Further explaining these U-phase switching leg Ru, V-phase switching leg Rv, and W-phase switching leg Rw, in the U-phase switching leg Ru, the upper arm MOS transistor 1 and the lower arm MOS transistor 2 are DC power supplies. 7 is connected in series.

That is, in the upper arm MOS transistor 1, the drain terminal is connected to the positive electrode of the DC power supply 7, the source terminal is connected to the drain terminal of the lower arm MOS transistor 2, and the gate terminal is connected to the gate signal generation unit a2. It is connected. The upper arm MOS transistor 1 is controlled in an ON state (ON state) / OFF state (OFF state) by a first gate signal input from the gate signal generation unit a2.

In the lower arm MOS transistor 2, the drain terminal is connected to the source terminal of the upper arm MOS transistor 1, the source terminal is connected to the negative electrode of the DC power supply 7, and the gate terminal is connected to the gate signal generation unit a2. Has been done. The lower arm MOS transistor 2 is controlled in an ON state (ON state) / OFF state (OFF state) by a second gate signal input from the gate signal generation unit a2.

In the V-phase switching leg Rv, the upper arm MOS transistor 3 and the lower arm MOS transistor 4 are connected in series to the DC power supply 7 in the same manner as the U-phase switching leg Ru.

That is, in the upper arm MOS transistor 3, the drain terminal is connected to the positive electrode of the DC power supply 7, the source terminal is connected to the drain terminal of the lower arm MOS transistor 4, and the gate terminal is connected to the gate signal generation unit a2. It is connected. The upper arm MOS transistor 3 is controlled in an ON state (ON state) / OFF state (OFF state) by a third gate signal input from the gate signal generation unit a2.

In the lower arm MOS transistor 4, the drain terminal is connected to the source terminal of the upper arm MOS transistor 3, the source terminal is connected to the negative electrode of the DC power supply 7, and the gate terminal is connected to the gate signal generation unit a2. Has been done. The lower arm MOS transistor 4 is controlled in an ON state (ON state) / OFF state (OFF state) by a fourth gate signal input from the gate signal generation unit a2.

In the W-phase switching leg Rw, the upper arm MOS transistor 5 and the lower arm MOS transistor 6 are connected in series to the DC power supply 7 in the same manner as the above-mentioned U-phase switching leg Ru and V-phase switching leg Rv. ing.

That is, in the upper arm MOS transistor 5, the drain terminal is connected to the positive electrode of the DC power supply 7, the source terminal is connected to the drain terminal of the lower arm MOS transistor 6, and the gate terminal is connected to the gate signal generation unit a2. It is connected. The upper arm MOS transistor 5 is controlled in an ON state (ON state) / OFF state (OFF state) by a fifth gate signal input from the gate signal generation unit a2.

In the lower arm MOS transistor 6, the drain terminal is connected to the source terminal of the upper arm MOS transistor 5, the source terminal is connected to the negative electrode of the DC power supply 7, and the gate terminal is connected to the gate signal generation unit a2. Has been done. The lower arm MOS transistor 6 is controlled in an ON state (ON state) / OFF state (OFF state) by a sixth gate signal input from the gate signal generation unit a2.

Further, in the U-phase switching leg Ru, the source terminal of the interconnected upper arm MOS transistor 1 and the drain terminal of the lower arm MOS transistor 2 are output ends of the U-phase switching leg Ru. This output end is a U-phase output end in the three-phase inverter circuit B, and is connected to the U-phase input end of the motor 8.

Further, in the V-phase switching leg Rv, the source terminal of the interconnected upper arm MOS transistor 3 and the drain terminal of the lower arm MOS transistor 4 are output ends of the V-phase switching leg Rv. This output end is a V-phase output end in the three-phase inverter circuit B, and is connected to the V-phase input end of the motor 8.

Further, in the W-phase switching leg Rw, the source terminal of the interconnected upper arm MOS transistor 5 and the drain terminal of the lower arm MOS transistor 6 are output ends of the W-phase switching leg Rw. This output end is a W-phase output end in the three-phase inverter circuit B, and is connected to the W-phase input end of the motor 8.

The first to sixth MOS type transistors 1 to 6 constituting such a three-phase inverter circuit B are incidentally provided with first to sixth body diodes D1 to D6, respectively. These first to sixth body diodes D1 to D6 function as recirculation diodes that recirculate the regenerative current based on the back electromotive force of the motor 8 to the DC power supply 7.

That is, the upper arm MOS transistor 1 of the U-phase switching leg Ru includes a first body diode D1. As shown in the figure, the cathode terminal of the first body diode D1 is connected to the drain terminal of the upper arm MOS transistor 1, and the anode terminal is connected to the source terminal of the upper arm MOS transistor 1.

Further, the MOS type transistor 2 for the lower arm of the U-phase switching leg Ru includes a second body diode D2. As shown in the figure, the cathode terminal of the second body diode D2 is connected to the drain terminal of the lower arm MOS transistor 2, and the anode terminal is connected to the source terminal of the lower arm MOS transistor 2.

The upper arm MOS transistor 3 of the V-phase switching leg Rv includes a third body diode D3. As shown in the figure, the cathode terminal of the third body diode D3 is connected to the drain terminal of the upper arm MOS transistor 3, and the anode terminal is connected to the source terminal of the upper arm MOS transistor 3.

Further, the MOS type transistor 4 for the lower arm of the V-phase switching leg Rv includes a fourth body diode D4. As shown in the figure, the cathode terminal of the fourth body diode D4 is connected to the drain terminal of the lower arm MOS transistor 4, and the anode terminal is connected to the source terminal of the lower arm MOS transistor 4.

The upper arm MOS transistor 5 of the W-phase switching leg Rw includes a fifth body diode D5. As shown in the figure, the fifth body diode D5 has a cathode terminal connected to a drain terminal of the upper arm MOS transistor 5, and an anode terminal connected to a source terminal of the upper arm MOS transistor 5.

Further, the MOS type transistor 6 for the lower arm of the W phase switching leg Rw includes a sixth body diode D6. As shown in the figure, the sixth body diode D6 has a cathode terminal connected to the drain terminal of the lower arm MOS transistor 6 and an anode terminal connected to the source terminal of the lower arm MOS transistor 6.

Such a three-phase inverter circuit B corresponds to the switching circuit of the present invention, and the first to sixth MOS type transistors 1 to 6 correspond to the semiconductor switching element of the present invention. That is, the three-phase inverter circuit B is an inverter circuit provided with a plurality of switching legs including a semiconductor switching element for an upper arm and a semiconductor switching element for a lower arm, each of which is provided with a freewheeling diode.

Further, the ON / OFF states of the first to sixth MOS type transistors 1 to 6 in the three-phase inverter circuit B are set based on the gate signal input from the control device A. This gate signal is a control pulse signal generated for each of the first to sixth MOS type transistors 1 to 6 by the control device A. Further, this control pulse signal is, for example, a PWM (Pulse Width Modulation) signal.

Of the first to fourth voltage sensors 9 to 12 incidentally provided in such a three-phase inverter circuit B, the first voltage sensor 9 is the input voltage of the three-phase inverter circuit B, that is, the output voltage of the DC power supply 7. It is a sensor that detects (power supply voltage V _D ), and outputs a detection signal (power supply voltage signal) indicating the power supply voltage V _D to the temperature estimation unit a1 and the gate signal generation unit a2 of the control device A.

The second voltage sensor 10 is a sensor that detects the output voltage (U-phase voltage) of the U-phase switching leg Ru, and transmits the detection signal (U-phase voltage signal) indicating the U-phase voltage to the temperature estimation unit a1 of the control device A. And output to the gate signal generation unit a2. The third voltage sensor 11 is a sensor that detects the output voltage (V-phase voltage) of the V-phase switching leg Rv, and transmits the detection signal (V-phase voltage signal) indicating the V-phase voltage to the temperature estimation unit a1 of the control device A. And output to the gate signal generation unit a2. The fourth voltage sensor 12 is a sensor that detects the output voltage (W-phase voltage) of the W-phase switching leg Rw, and detects the detection signal (W-phase voltage signal) indicating the W-phase voltage in the temperature estimation unit a1 of the control device A. And output to the gate signal generation unit a2.

Of the first to third current sensors 13 to 15, the first current sensor 13 is a sensor that detects the output current (U-phase current) of the U-phase switching leg Ru, and is a detection signal (U) indicating the U-phase current. The phase current signal) is output to the temperature estimation unit a1 and the gate signal generation unit a2 of the control device A. The second current sensor 14 is a sensor that detects the output current (V-phase current) of the V-phase switching leg Rv, and transmits the detection signal (V-phase current signal) indicating the V-phase current to the temperature estimation unit a1 of the control device A. And output to the gate signal generation unit a2. The third current sensor 15 is a sensor that detects the output current (W phase current) of the W phase switching leg Rw, and the detection signal (W phase current signal) indicating the W phase current is used as the temperature estimation unit a1 of the control device A. And output to the gate signal generation unit a2.

The control device A includes a power supply voltage signal of the first voltage sensor 9, a U-phase voltage signal of the second voltage sensor 10, a V-phase voltage signal of the third voltage sensor 11, and a W-phase voltage signal of the fourth voltage sensor 12. Based on the U-phase current signal of the first current sensor 13, the V-phase current signal of the second current sensor 14, and the W-phase current signal of the third current sensor 15, the operating temperatures of the first to sixth MOS type transistors 1 to 6 are set. Along with the estimation, a gate signal is generated based on the value based on the estimation (estimated temperature value), the state quantity input from the external device, and the control command.

That is, the temperature estimation unit a1 of the control device A has a power supply voltage V _D acquired from the first voltage sensor 9, a U-phase voltage V _u acquired from the second to fourth voltage sensors 10 to 12, and a V-phase voltage V _v . And W phase voltage V _w , U phase current I _u acquired from the first to third current sensors 13 to 15, V phase current I _v and W phase current I _w , and the gate signal input from the gate signal generation unit a2. The _first to _sixth junction temperatures T1 to T6 relating to the first to sixth body diodes D1 to D6 are acquired based on the state signal indicating the state of.

Here, the first to sixth body diodes D1 to D6 and the first to sixth MOS type transistors 1 to 6 have an integral structure, and therefore have a close thermal relationship. That is, the _first to _sixth junction temperatures T1 to T6 relating to the first to sixth body diodes D1 to D6 can be regarded as the operating temperatures of the first to sixth MOS type transistors 1 to 6. Therefore, the temperature estimation unit a1 acquires (estimates) the _first to _sixth junction temperatures T1 to T6 as the operating temperatures of the first to sixth MOS type transistors 1 to 6.

That is, the temperature estimation unit a1 is the first in the U-phase switching leg Ru based on the power supply voltage signal of the first voltage sensor 9, the U-phase voltage signal of the second voltage sensor 10, and the U-phase current signal of the first current sensor 13. ₁ The junction temperature T1 of the body diode D1 is acquired, and the junction temperature T1 is set as the operating temperature of the MOS type transistor ₁ for the upper arm.

Further, the temperature estimation unit a1 sets the junction temperature T2 of the _second body diode D2 in the U-phase switching leg Ru based on the U-phase voltage signal of the second voltage sensor 10 and the U-phase current signal of the first current sensor 13. Obtained and set the junction temperature T ₂ as the operating temperature of the lower arm MOS type transistor 2.

Further, the temperature estimation unit a1 is the first in the V-phase switching leg Rv based on the power supply voltage signal of the first voltage sensor 9, the V-phase voltage signal of the third voltage sensor 11, and the V-phase current signal of the second current sensor 14. 3 The junction temperature T ₃ of the body diode D 3 is acquired, and the junction temperature T ₃ is set as the operating temperature of the MOS type transistor 3 for the upper arm.

Further, the control device A acquires the junction temperature T4 of the _fourth body diode D4 in the V-phase switching leg Rv based on the V-phase voltage signal of the third voltage sensor 11 and the V-phase current signal of the second current sensor 14. Then, the junction temperature T ₄ is set as the operating temperature of the lower arm MOS type transistor 4.

Further, the temperature estimation unit a1 is the first in the W-phase switching leg Rw based on the power supply voltage signal of the first voltage sensor 9, the W-phase voltage signal of the fourth voltage sensor 12, and the W-phase current signal of the third current sensor 15. ₅ The junction temperature T5 of the body diode D5 is acquired, and the junction temperature T5 is set as the operating temperature of the MOS type transistor ₅ for the upper arm.

Further, the control device A acquires the junction temperature T6 of the _sixth body diode D6 in the W-phase switching leg Rw based on the W-phase voltage signal of the fourth voltage sensor 12 and the W-phase current signal of the third current sensor 15. Then, the junction temperature T ₆ is set as the operating temperature of the lower arm MOS type transistor 6.

Here, as is well known, the forward current IF flowing through the junction of the pn junction diode follows the _Shockley diode equation shown in the following equation (1). In this equation (1), IS is the saturation current, V _F is the forward voltage, q is the elementary charge, n is the ideal coefficient, _KB is the Boltzmann constant, _T is the junction temperature, and _RS is the series resistance of the junction diode. Is. Of these various physical quantities, the saturation current _IS , the elementary charge amount q, the Boltzmann constant _KB , and the series resistance _RS of the junction diode are known constants.

In this equation (1), assuming that the first term in the key brackets is sufficiently larger than the first term in the second term, the equation (2) is established as an approximate equation. Then, when this approximate equation (2) is solved for the junction temperature T, the equation (3) is obtained.

That is, it is obtained by acquiring the forward currents I ₁ to I ₆ and the forward voltages V _F1 to V _F6 of the first to sixth body diodes D1 to D6. Of the forward currents I ₁ to I ₆ of the first to sixth body diodes D1 to D6, the forward current I ₁ of the first body diode D1 and the forward current I of the second body diode D2 with respect to the U-phase switching leg Ru. ₂ corresponds to the _U -phase current Iu detected by the first current sensor 13.

Further, the forward current I ₃ of the third body diode D3 and the forward current I ₄ of the fourth body diode D4 with respect to the V-phase switching leg Rv correspond to the V-phase current I _v detected by the second current sensor 14. Further, the forward current I ₅ of the fifth body diode D5 and the forward current I ₆ of the sixth body diode D6 with respect to the W phase switching leg Rw correspond to the W phase current I _w detected by the third current sensor 15.

Of the forward voltages V _F1 to V _F6 of the first to sixth body diodes D1 to D6, the forward voltages V _F2 , V _F4 , and V _F6 of the second, fourth, and sixth body diodes D2, D4, and D6 are , Corresponds to the output voltage of each phase detected by the second to fourth voltage sensors 10 to 12. Further, the forward voltages V _F1 , V _F3 , and V _F5 of the first, third, and fifth body diodes D1, D3, and D5 are the second, fourth, and second, fourth, from the power supply voltage _VD detected by the first voltage sensor 9. It is obtained by subtracting the forward voltages V _F2 , V _F4 and V _F6 of the sixth body diodes D2, D4 and D6.

The temperature estimation unit a1 is a map showing the relationship between the forward voltages _{V F1} to V _F6 of the _first to _sixth body diodes D1 to D6, the forward currents I1 to I6, and the junction temperatures T1 to _T6 . Data, that is, a plurality of temperature data relating to the junction temperatures T1 to _T6 based _on the equation (3) are stored in advance.

The temperature estimation unit a1 has a U-phase voltage V _u corresponding to the forward voltage V _F2 , a V-phase voltage V _v corresponding to the forward voltage V _F4 , and a forward voltage V _F6 from the second to fourth voltage sensors 10 to 12. The _{W - phase voltage V w} corresponding to When the W-phase current I _w corresponding to _v and the forward currents I ₅ and I ₆ is taken in, these U-phase voltage V _u , V-phase voltage V _v and W-phase voltage V _w , and U-phase current I _u , V-phase current are taken. _The junction temperatures T1 to _T6 are acquired by searching the map data based on the I _v and the W phase current I _w .

Such a temperature estimation unit a1 corresponds to the temperature estimation device according to the present invention, and is the operating temperature of the first to sixth MOS type transistors 1 to 6, that is, the junction temperature of the first to sixth body diodes D1 to D6. T ₁ to T ₆ (estimated temperature value) are output to the gate signal generation unit a2. The gate signal generation unit a2 controls the first to sixth MOS type transistors 1 to 6 based on the operating temperature of the first to sixth MOS type transistors 1 to 6, the state quantity input from the external device, and the control command. Generates the 1st to 6th gate signals.

Further, the gate signal generation unit a2 outputs the first gate signal to the gate terminal of the upper arm MOS transistor 1 and outputs the second gate signal to the gate terminal of the lower arm MOS transistor 2. Further, the gate signal generation unit a2 outputs the third gate signal to the gate terminal of the upper arm MOS transistor 3, and outputs the fourth gate signal to the gate terminal of the lower arm MOS transistor 4. Further, the gate signal generation unit a2 outputs the fifth gate signal to the gate terminal of the upper arm MOS transistor 5, and outputs the sixth gate signal to the gate terminal of the lower arm MOS transistor 6.

Although the details will be described later, the first gate signal of the upper arm MOS transistor 1 and the second gate signal of the lower arm MOS transistor 2 constituting the U-phase switching leg Ru are paired with each other and transition. A dead time with a time width Δt is provided at the point. Further, the third gate signal of the upper arm MOS transistor 3 and the fourth gate signal of the lower arm MOS transistor 4 constituting the V-phase switching leg Rv are paired with each other, and the time width is set at the transition point. A dead time of Δt is provided.

Further, the fifth gate signal of the upper arm MOS transistor 5 and the sixth gate signal of the lower arm MOS transistor 6 constituting the W-phase switching leg Rw are paired with each other, and the time width is set at the transition point. A dead time of Δt is provided. The time width Δt of such a dead time is a preset default value, and is for preventing a penetration current in the switching leg of each phase.

Here, among the above-mentioned first to sixth gate signals, the first, third, and fifth gate signals corresponding to the upper arm MOS type transistors 1, 3, and 5 correspond to one of the gate signals, and also. The second, fourth, and sixth gate signals corresponding to the lower arm MOS type transistors 2, 4, and 6 correspond to the other gate signal.

With respect to such a dead time, the gate signal generation unit a2 has a junction in order to sufficiently secure the estimation processing time of the junction temperatures T1 to T6 of the _first to _sixth body diodes D1 to D6 in the temperature estimation unit a1. When performing the estimation processing of the temperatures T1 to T6, the expansion time width that is temporarily expanded from the predetermined time width Δt is set. The details of the expansion process of the default time width Δt will be described later.

The gate signal generation unit a2 refers to a U-phase voltage signal, a V-phase voltage signal, a W-phase voltage signal, a U-phase current signal, a V-phase current signal, and a W-phase current signal when the time width Δt is expanded. The output power of the three-phase inverter circuit B is calculated based on the U-phase voltage signal, the V-phase voltage signal, the W-phase voltage signal, the U-phase current signal, the V-phase current signal, and the W-phase current signal.

Further, the gate signal generation unit a2 outputs the above-mentioned state signal to the temperature estimation unit a1. This state signal is a signal indicating the state of the first to sixth gate signals, that is, the ON state (ON state) or the OFF state (OFF state), and thus the switch state indicating the ON / OFF of each MOS type transistor 1 to 6. It is a signal.

Next, the operation of the control device A according to the present embodiment will be described in detail with reference to FIGS. 2 to 4.

As shown in FIG. 2, the gate signal generation unit a2 described above determines whether or not temperature estimation should be performed first (step S1). For example, when the temperature estimation is periodically performed, the gate signal generation unit a2 determines the cycle for performing the temperature estimation based on the temperature response time constant that it knows. The gate signal generation unit a2 refers to the value (timer value) of the timer that measures the time, and determines in step S1 whether or not the timer value has reached a preset value (execution time).

When the determination in step S1 is "No", that is, when the temperature estimation is not performed, the gate signal generation unit a2 generates a normal gate signal based on the control command and the state quantity and outputs it to the three-phase inverter circuit B ( Step S2). This normal gate signal is for feedback control of the three-phase inverter circuit B based on a control command and a state quantity, and is an estimation process of the operating temperature of each MOS type transistor 1 to 6 performed by the temperature estimation unit a1. Is not considered at all.

Here, FIG. 3 shows a first gate signal input to the semiconductor switching elements of the U-phase upper arm and the U-phase lower arm, that is, the gate terminal of the upper arm MOS transistor 1 and the gate terminal of the lower arm MOS transistor 2. And an example of the second gate signal is shown. In FIG. 3, three types of first gate signal and second gate signal are shown, and the waveforms shown in the second and third stages from the top correspond to the above-mentioned normal gate signal.

As shown in the uppermost stage of FIG. 3, the gate signal generation unit a2 uses a triangular wave having a predetermined repetition period as a carrier wave, and compares the voltage command value generated based on the control command and the state quantity with the carrier wave to obtain a gate signal. However, a dead time with a time width of Δt is set at the transition point of the gate signal in order to prevent a penetration current in the switching leg of each phase.

This dead time is a period in which both the gate signal for the U-phase upper arm and the gate signal for the U-phase lower arm are in the OFF state, and the timing of transitioning from the OFF state to the ON state and the transition from the ON state to the OFF state. It is set for each of the timings to be performed. Further, the time width Δt of such a dead time is a preset value set in consideration of the performance of the semiconductor switching element and the like.

By the way, when the determination in step S1 is "Yes", that is, when the temperature estimation is performed, the process of step S3 is performed. That is, by comparing the output power of the three-phase inverter circuit B with the predetermined power threshold Rw, the gate signal generation unit a2 determines whether the output power of the three-phase inverter circuit B is equal to or less than the predetermined power threshold Rw. It is determined whether or not (step S3).

More specifically, the gate signal generation unit a2 has a phase power of each phase based on a U-phase voltage signal, a V-phase voltage signal, a W-phase voltage signal, a U-phase current signal, a V-phase current signal, and a W-phase current signal. Is calculated, and the output power of the three-phase inverter circuit B is calculated based on the power of each phase. Then, the gate signal generation unit a2 performs the determination process in step S3 by comparing the output power calculated in this way with the power threshold value Rw stored in advance.

Then, when the determination in step S3 is "Yes", the gate signal generation unit a2 performs a shortening process of the ON pulse (on pulse) in the above-mentioned normal gate signal (step S4). That is, as shown in the fourth and fifth stages of FIG. 3, the gate signal generation unit a2 sets the dead time to the predetermined time width Δt by shortening the time width of the ON pulse in the second gate signal. To the time width Δ2t (expansion time width).

On the other hand, when the determination in step S3 is "No", that is, when the output power of the three-phase inverter circuit B is larger than the power threshold value Rw, the ON pulse removal process in the above-mentioned normal gate signal is performed (step S5). ). That is, as shown in the sixth and seventh stages of FIG. 3, the gate signal generation unit a2 sets the dead time from the predetermined time width Δt by removing the ON pulse in the second gate signal. It is expanded to Δ6t (expansion time width).

In this way, the gate signal generation unit a2 switches the dead time setting method according to the magnitude of the output power of the three-phase inverter circuit B with respect to the power threshold value Rw. That is, when the output power of the three-phase inverter circuit B is equal to or less than the power threshold value Rw, the gate signal generation unit a2 sets the ON time (ON time) of the second gate signal (the other gate signal) to the first gate signal (on time). When the dead time time width Δ2t (expansion time width) is set by making it shorter than the ON time of one of the gate signals), whereas the output power of the three-phase inverter circuit B is larger than the power threshold Rw. The dead time time width Δ6t (expansion time width) is set by removing the ON pulse of the second gate signal (the other gate signal).

Here, in FIG. 3, the process of expanding the dead time time width Δt for the U phase, that is, the first gate signal for the upper arm MOS transistor 1 and the second gate signal for the lower arm MOS transistor 2 has been described. , V phase and W phase, that is, the third gate signal for the upper arm MOS transistor 3, the fourth gate signal for the lower arm MOS transistor 4, the fifth gate signal for the upper arm MOS transistor 5, and the lower Similarly, the dead time time width Δt is expanded for the sixth gate signal for the arm MOS transistor 6.

When the gate signal generation unit a2 completes the process of expanding the dead time time width Δt for the three phases, the gate signal generation unit a2 operates the first to sixth MOS type transistors 1 to 6 in the expansion time width, that is, the time width Δ2t or the time width Δ6t. The temperature estimation process is executed (step S6). This operating temperature estimation process is realized by the temperature estimation unit a1 executing a series of processes shown in FIG.

The procedure for estimating the operating temperature of the first to sixth MOS type transistors 1 to 6 in the U phase, the V phase, and the W phase is basically the same. Therefore, in the following, the procedure for estimating the operating temperature of the U-phase upper arm MOS transistor 1 and the lower arm MOS transistor 2 will be described in detail with reference to FIG.

The temperature estimation unit a1 U is based on the U-phase current signal first input from the first current sensor 13 when estimating the operating temperature of the U-phase upper arm MOS transistor 1 and the lower arm MOS transistor 2. It is determined whether or not the polarity of the phase current _Iu is positive (step Sa1).

When the determination in step Sa1 is "Yes", that is, when the polarity of the _U -phase current Iu is positive, the temperature estimation unit a1 U is based on the state signal (switch state signal) input from the gate signal generation unit a2. It is determined whether or not the upper arm MOS type transistor 1 constituting the upper arm is in the OFF state (step Sa2).

Then, the temperature estimation unit a1 configures the U-phase lower arm based on the above state signal (switch state signal) when the determination in step Sa2 is "Yes", that is, when the upper arm MOS transistor 1 is in the OFF state. It is determined whether or not the lower arm MOS transistor 2 is in the OFF state (step Sa3).

In the temperature estimation unit a1, when the determination in step Sa3 is "Yes", that is, as shown in FIG. 3, the upper arm MOS transistor 1 and the lower arm MOS transistor 2 are both in the OFF state. In time, the U-phase current I _u is acquired (step Sa4), and the U-phase voltage V _u is acquired based on the U-phase voltage signal input from the second voltage sensor 10 (step Sa5).

Then, the temperature estimation unit a1 searches the map data using the U-phase current I _u and the U-phase voltage V _u , so that the map value corresponding to the U-phase current I _u and the U-phase voltage V _u , that is, the body diode D2 The junction temperature T ₂ of the above is acquired (step Sa6). Then, the temperature estimation unit a1 sets the junction temperature T2 of the body diode D2 thus acquired as the operating temperature of the lower arm MOS transistor ₂ (step Sa7).

When the operating temperature of the lower arm MOS transistor ₂ (junction temperature T2 of the body diode D2) is acquired in this way, the temperature estimation unit a1 is U-phase based on the U-phase current signal input from the current sensor 13. It is determined whether or not the polarity of the current _Iu is negative (step Sa8).

Then, the temperature estimation unit a1 is based on the state signal (switch state signal) input from the gate signal generation unit a2 when the determination in step Sa8 is "Yes", that is, when the polarity of the _U -phase current Iu is negative. It is determined whether or not the upper arm MOS type transistor 1 constituting the U-phase upper arm is in the OFF state (step Sa9).

Then, the temperature estimation unit a1 configures the U-phase lower arm based on the above state signal (switch state signal) when the determination in step Sa9 is "Yes", that is, when the upper arm MOS transistor 1 is in the OFF state. It is determined whether or not the lower arm MOS transistor 2 is in the OFF state (step Sa10).

In the temperature estimation unit a1, when the determination in step Sa10 is "Yes", that is, as shown in FIG. 3, the upper arm MOS transistor 1 and the lower arm MOS transistor 2 are both in the OFF state. In time, the U-phase current I _u is acquired (step Sa11), and the U-phase voltage V _u acquired from the U-phase voltage signal input from the voltage sensor 10 is subtracted from the power supply voltage V _D in order of the body diode D1. Acquire the directional voltage V ₁ (step Sa12).

Then, the temperature estimation unit a1 searches the map data using the U-phase current I _u and the forward voltage V ₁ , and the map value corresponding to the U-phase current I _u and the forward voltage V ₁ , that is, the body diode D1. The junction temperature T ₁ of the above is acquired (step Sa13). Then, the temperature estimation unit a1 sets the junction temperature T1 of the body diode D1 thus acquired as the operating temperature of the lower arm MOS transistor ₁ (step Sa14).

The temperature estimation unit a1 acquires the operating temperatures of the upper arm MOS transistor 1 and the lower arm MOS transistor 2 in this way, and the upper arm MOS transistor 3 and the upper arm MOS transistor 3 constituting the V-phase switching leg Rv The same applies to the lower arm MOS transistor 4, the upper arm MOS transistor 5 and the lower arm MOS transistor 6 constituting the W-phase switching leg Rw.

That is, the temperature estimation unit a1 acquires the operating temperature of each of the first to sixth MOS type transistors 1 to 6. Then, the temperature estimation unit a1 outputs each operating temperature of the first to sixth MOS type transistors 1 to 6 to the gate signal generation unit a2.

When the operating temperature of the 1st to 6th MOS type transistors 1 to 6 is within the preset allowable range, the gate signal generation unit a2 is the first regardless of the operating temperature of the 1st to 6th MOS type transistors 1 to 6. The 1st to 6th gate signals for controlling the 6th MOS type transistors 1 to 6 are generated, but when the operating temperature of any of the 1st to 6th MOS type transistors 1 to 6 deviates from the allowable range, that is, the abnormal temperature is generated. When a MOS transistor is generated, a gate signal for forcibly turning off the abnormal temperature MOS transistor is generated to suppress the output of the abnormal temperature MOS transistor and reduce heat generation.

According to the present embodiment, the forward current and the order of the first to sixth body diodes D1 to D6 in the time width Δ2t or the time width Δ6t of the dead time expanded from the time width Δt of the dead time in the normal gate signal. Since the operating temperature of the 1st to 6th MOS type transistors 1 to 6 is estimated by acquiring the directional voltage, the operating temperature of the 1st to 6th MOS type transistors 1 to 6 (semiconductor switching element) does not require high-speed operation. Can be estimated.

Further, according to the present embodiment, since the first to sixth gate signals are generated based on the operating temperatures of the first to sixth MOS type transistors 1 to 6 (semiconductor switching elements) thus obtained, the first to sixth gate signals are generated. It is possible to accurately control the 1st to 6th MOS type transistors 1 to 6.

The present invention is not limited to the above embodiment, and for example, the following modifications can be considered.
(1) In the above embodiment, the three-phase inverter circuit B (switching circuit) is composed of six MOS-type transistors 1 to 6 (semiconductor switching elements), but the present invention is not limited thereto. The present invention can also be applied to a three-phase inverter circuit configured by using a semiconductor switching element having a form different from that of a MOS transistor such as an IGBT (Insulated Gate Bipolar Transistor).

For example, when an IGBT is used as a semiconductor switching element, the RC-IGBT (reverse conduction IGBT) integrated as a body diode is also a body diode estimated from the forward current and forward voltage during operation, similar to a MOS transistor. The temperature of the semiconductor switching element can be estimated from the junction temperature of.

Further, even in an IGBT that does not have a body diode as a parasitic diode like a MOS transistor, it is necessary to install them in close proximity to the extent that they are affected by the heat of the same DCB substrate, but the forward current and forward direction The temperature of the semiconductor switching element can be estimated from the junction temperature of the freewheeling diode estimated from the voltage.

(2) In the above embodiment, the three-phase inverter circuit B, which is a kind of switching circuit, has been described, but the present invention can be applied to switching circuits other than the three-phase inverter circuit B. The present invention can also be applied to, for example, a switching circuit including one semiconductor switching element. That is, the present invention can be applied to estimate the operating temperature of one or a plurality of semiconductor switching elements which constitute a switching circuit and are each provided with a freewheeling diode.

(3) In the above embodiment, the operating temperatures of all the MOS transistor 1 to 6 (semiconductor switching elements) constituting the three-phase inverter circuit B (switching circuit) are estimated, but the present invention is not limited thereto. For example, the operating temperature of a part of the first to sixth MOS type transistors 1 to 6 (semiconductor switching element) may be estimated.

(4) In the above embodiment, the case where the temperature estimation implementation condition is the time condition has been described, but the present invention is not limited to this. That is, the operating temperature of the first to sixth MOS type transistors 1 to 6 may be estimated based on the implementation conditions other than the time condition.

A Control device a1 Temperature estimation unit a2 Gate signal generation unit B Three-phase inverter circuit (switching circuit)
D1 body diode (reflux diode)
D2 body diode (reflux diode)
D3 body diode (reflux diode)
D4 body diode (reflux diode)
D5 body diode (reflux diode)
D6 body diode (reflux diode)
Ru U-phase switching leg Rv V-phase switching leg Rw W-phase switching leg 1 MOS type transistor for upper arm (semiconductor switching element)
2 MOS transistor for lower arm (semiconductor switching element)
3 MOS transistor for upper arm (semiconductor switching element)
4 MOS transistor for lower arm (semiconductor switching element)
5 MOS transistor for upper arm (semiconductor switching element)
6 MOS transistor for lower arm (semiconductor switching element)
7 DC power supply 8 Motor 9 1st voltage sensor 10 2nd voltage sensor 11 3rd voltage sensor 12 4th voltage sensor 13 1st current sensor 14 2nd current sensor 15 3rd current sensor

Claims (5)

In an inverter circuit provided with one or a plurality of switching legs including a semiconductor switching element for an upper arm and a semiconductor switching element for a lower arm, each of which is provided with a freewheeling diode, the semiconductor switching element for the upper arm and the semiconductor switching for the lower arm are provided. A temperature estimation device that estimates the operating temperature of a device.
The dead time between the upper arm semiconductor switching element and the lower arm semiconductor switching element is set to the forward voltage and forward current of the freewheeling diode acquired from the inverter circuit in an extended time width that is larger than the predetermined time width. A temperature estimation device, characterized in that the operating temperature is estimated based on the above. The expansion time width is set by making the ON time of one of the gate signals of one and the other that controls the semiconductor switching element for the upper arm and the semiconductor switching element for the lower arm shorter than the ON time of one. The temperature estimation device according to claim 1, wherein the temperature estimation device is set. The expansion time width is set by removing the ON pulse of the other gate signal of the one and the other gate signals that control the upper arm semiconductor switching element and the lower arm semiconductor switching element, respectively. The temperature estimation device according to claim 1. The inverter circuit is a three-phase inverter circuit provided with three switching legs.
The temperature estimation device according to any one of claims 1 to 3, wherein the operating temperature is estimated based on the forward voltage and the forward current obtained from the three-phase inverter circuit. The temperature estimation device according to any one of claims 1 to 4, and the temperature estimation device.
A control device including a gate signal generation unit that generates a gate signal for controlling the semiconductor switching element for the upper arm and the semiconductor switching element for the lower arm based on the operating temperature estimated by the temperature estimation device. ..

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