JP2022066525A - Multilayer substrate, and component mounting substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer substrate and a component mounting substrate which have a stable connection resistance value and high connection reliability in an interlayer connection part, and enable uniform printing formation and component mounting of an insulating layer onto the interlayer connection part.

SOLUTION: A multilayer substrate 100 includes circuit patterns 2 and 3 provided on a surface and a rear face of an insulating substrate 4, an interlayer connection part 6 that is formed by filling a through hole 1 penetrating through the insulating substrate 4 and the circuit patterns 2 and 3 with a conductive paste, and an extension part 20 where a part of the circuit patterns extends along an inner wall of the through hole 1 of the insulating substrate 4, in which the conductive paste has predetermined volume resistivity and binder resin content, the interlayer connection part 6 has in-hole filling parts 5a and 6a and out-hole flat plate parts 5b and 6b formed on the surface and the rear face of the insulating substrate 4, the thicknesses of the out-hole flat plate parts 5b and 6b are predetermined thicknesses, and a thickness difference between a thinnest part and a thickest part of the out-hole flat plate parts 5b and 6b is a predetermined flat.

SELECTED DRAWING: Figure 1B

COPYRIGHT: (C)2022,JPO&INPIT

Description

The present disclosure relates to a multilayer board and a component mounting board.

The interlayer connection portion of the multilayer board needs to have connection reliability that can withstand heat treatment in the component mounting process and thermal shock during soldering work. For example, in Patent Document 1 and Patent Document 2, a circuit board having an interlayer connection portion with higher connection reliability than the conventional one is provided by devising the shape of the through hole by punching and filling the through hole with a conductive paste. And the manufacturing method of the circuit board is disclosed.

Japanese Unexamined Patent Publication No. 7-302962 Japanese Unexamined Patent Publication No. 10-51095

However, in the technique of the above patent document, the front surface and the back surface of the interlayer connection portion are not flat, and it is difficult to mount the component on the interlayer connection portion. Further, for example, when a printable insulating resin is formed by a screen printing method or the like, the front surface and the back surface of the interlayer connection portion are not flat, so that the insulating layer is distorted or stepped on the front surface and the back surface of the interlayer connection portion. .. Therefore, voids, pinholes, etc. are generated in the insulating layer, a uniform insulating layer cannot be formed, and there is a concern that the electrical insulation property in the vicinity of the interlayer connection portion is deteriorated. Further, the interlayer connection portion of the multilayer board is required to have a stable connection resistance value in addition to connection reliability.

The embodiments according to the present disclosure include a multilayer substrate having a stable connection resistance value and high connection reliability at the interlayer connection portion, and capable of forming a uniform printing of an insulating layer on the interlayer connection portion and mounting components. An object is to provide a component mounting board.

In the method for manufacturing a multilayer board according to the embodiment of the present disclosure, circuit patterns are formed on the front surface and the back surface of the insulating substrate, and a part of the circuit pattern on at least one of the front surface and the back surface of the insulating substrate is the insulating substrate. A step of forming the through hole by punching so as to extend along the inner wall of the through hole, and a conductive paste by printing from both the front surface and the back surface of the insulating substrate inside and around the through hole. Includes a step of filling and forming an interlayer connection.

The method for manufacturing a component mounting substrate according to the embodiment of the present disclosure includes a step of forming a resist on the front surface and the back surface of the multilayer board manufactured by the method for manufacturing a multilayer board described above, and a component on the multilayer board on which the resist is formed. Including the process of mounting and.

The multilayer board according to the embodiment of the present disclosure is an interlayer connection formed by filling a circuit pattern provided on the front surface and the back surface of an insulating substrate and a through hole penetrating the insulating substrate and the circuit pattern with a conductive paste. The insulating substrate comprises a portion and an extending portion in which a part of the circuit pattern of at least one of the front surface and the back surface of the insulating substrate extends along the inner wall of the through hole of the insulating substrate. The portions of the interlayer connection portion on the front surface and the back surface are flat.

The component mounting board according to the embodiment of the present disclosure is one in which mounting components are mounted on the multilayer board described above.

According to the method for manufacturing a multilayer substrate according to the present disclosure, the interlayer connection portion has a stable connection resistance value and high connection reliability, and an insulating layer can be printed and mounted on the interlayer connection portion. Multi-layer board can be manufactured.
According to the method for manufacturing a component mounting board of the embodiment according to the present disclosure, a component mounting board having a stable connection resistance value and high connection reliability at an interlayer connection portion and having high insulation of an insulating layer is manufactured. Can be done.
According to the multilayer board of the embodiment according to the present disclosure, the interlayer connection portion has a stable connection resistance value and high connection reliability, and it is possible to print and form an insulating layer on the interlayer connection portion and mount components.
According to the component mounting substrate of the embodiment according to the present disclosure, the interlayer connection portion has a stable connection resistance value and high connection reliability, and the insulating layer has high insulation.

It is a top view which shows typically the structure of the multilayer board which concerns on embodiment. It is sectional drawing which shows typically the structure of the multilayer substrate which concerns on embodiment, and shows the sectional view corresponding to the IB-IB line of FIG. 1A. It is sectional drawing which shows the state before forming the circuit pattern in the manufacturing method of the multilayer board which concerns on embodiment. It is sectional drawing which shows the process of forming a circuit pattern in the manufacturing method of the multilayer board which concerns on embodiment. It is sectional drawing which shows the process of forming a through hole in the manufacturing method of the multilayer substrate which concerns on embodiment. It is sectional drawing which shows the process of forming the interlayer connection part in the manufacturing method of the multilayer substrate which concerns on embodiment, and is the sectional drawing which shows the process of filling a conductive paste from the back surface of an insulating substrate. It is sectional drawing which shows the process of forming the interlayer connection part in the manufacturing method of the multilayer substrate which concerns on embodiment, and is the sectional drawing which shows the process of filling a conductive paste from the surface of an insulating substrate. It is sectional drawing which shows the step of polishing the part of the interlayer connection part in the manufacturing method of the multilayer substrate which concerns on embodiment. It is sectional drawing which shows typically the structure of the component mounting board which concerns on embodiment. It is sectional drawing which shows the multilayer board before forming a resist in the manufacturing method of the component mounting board which concerns on embodiment. It is sectional drawing which shows the process of forming a resist in the manufacturing method of the component mounting substrate which concerns on embodiment, and is the sectional drawing which shows the process of forming a resist on the surface of a multilayer substrate. It is sectional drawing which shows the process of forming a resist in the manufacturing method of the component mounting substrate which concerns on embodiment, and is the sectional drawing which shows the process of forming a resist on the back surface of a multilayer substrate. It is sectional drawing which shows the process of mounting a component in the manufacturing method of the component mounting substrate which concerns on embodiment, and is sectional drawing which shows the process of forming an adhesive layer. It is sectional drawing which shows the process of mounting a component in the manufacturing method of the component mounting board which concerns on embodiment, and is the sectional view which shows the state after mounting a component. It is an image which shows the substrate for evaluation of the interlayer connection part before filling with the conductive paste used in an Example. It is an enlarged image which shows a part of FIG. 7A. It is a perspective view which shows typically the connection state of the interlayer connection part in the substrate for evaluation of the interlayer connection part after filling with the conductive paste used in an Example.

<Embodiment>
The embodiments will be described below with reference to the drawings. However, the embodiments shown below exemplify a method for manufacturing a multilayer board, a method for manufacturing a component mounting board, a multilayer board, and a component mounting board for embodying the technical idea of the present embodiment. It is not limited to. Further, the dimensions, materials, shapes, relative arrangements, etc. of the components described in the embodiments are not intended to limit the scope of the present invention to the specific description, but are merely examples. It's just that. The size and positional relationship of the members shown in each drawing may be exaggerated for the sake of clarity.

[Multilayer board]
First, the multilayer board according to this embodiment will be described.
FIG. 1A is a plan view schematically showing the configuration of the multilayer board according to the embodiment. FIG. 1B is a cross-sectional view schematically showing the configuration of the multilayer board according to the embodiment, and shows a cross section corresponding to the IB-IB line of FIG. 1A.

In the multilayer board 100, the insulating substrate 4, the front surface circuit pattern 2 provided on the front surface of the insulating substrate 4, the back surface circuit pattern 3 provided on the back surface of the insulating substrate 4, and the through hole 1 are filled with the conductive paste. The interlayer connection portion 6 is provided, and the extension portion 20 in which a part of the surface circuit pattern 2 extends along the inner wall of the through hole 1 of the insulating substrate 4 is provided.

As the insulating substrate 4, a glass epoxy obtained by impregnating one or a plurality of glass cloths with a thermosetting insulating resin such as an epoxy resin and curing the thermosetting insulating resin, a film-shaped polyimide, or a liquid crystal polymer. And so on. The insulating substrate 4 is generally manufactured as a double-sided copper-clad laminate with copper foils attached to both sides.
When the insulating substrate 4 is made of glass epoxy, the thickness can be 50 to 1000 μm. When the insulating substrate 4 is polyimide, the thickness can be 12 to 50 μm. As described above, the insulating substrate 4 can be used from a plate having a certain thickness to a thin plate.

The surface circuit pattern 2 is formed on the surface of the insulating substrate 4. The back surface circuit pattern 3 is formed on the back surface of the insulating substrate 4. The front surface circuit pattern 2 and the back surface circuit pattern 3 are formed by wiring in a desired shape. The front surface circuit pattern 2 and the back surface circuit pattern 3 are made of a metallic material such as copper.

The thickness of the front surface circuit pattern 2 and the back surface circuit pattern 3 is preferably 12 to 70 μm. When the thickness of the front surface circuit pattern 2 and the back surface circuit pattern 3 is 12 μm or more, the front surface circuit pattern 2 and the back surface circuit pattern 3 can be easily formed. On the other hand, if the thickness is 70 μm or less, the multilayer board 100 can be thinned.

The through hole 1 is formed so as to penetrate the front surface circuit pattern 2, the insulating substrate 4, and the back surface circuit pattern 3. The diameter of the through hole 1 is, for example, 0.2 to 0.3 mm.

The interlayer connection portion 6 is a portion that electrically connects the front surface circuit pattern 2 and the back surface circuit pattern 3. The interlayer connection portion 6 is formed by filling the through hole 1 with a conductive paste. Further, the interlayer connection portion 6 is formed by filling the inside and the periphery of the through hole 1 with the conductive paste and curing the interlayer connection portion 6 in a state of being sufficiently in contact with the front surface circuit pattern 2 and the back surface circuit pattern 3. Here, the periphery of the through hole 1 is the vicinity of the through hole 1, and refers, for example, within 1 mm, preferably within 0.3 mm, and more preferably within 0.1 mm from the through hole 1.
Since the interlayer connection portion 6 is formed by filling the through hole 1 with a conductive paste, the connection reliability against thermal shock in the process of mounting a component or the like is improved.

The interlayer connection portion 6 is formed in a convex shape on the front surface and the back surface of the insulating substrate 4. Further, the interlayer connection portion 6 covers a part of the front surface circuit pattern 2 and the back surface circuit pattern 3. In the present embodiment, the interlayer connection portion 6 also includes a portion that covers the front surface circuit pattern 2 and the back surface circuit pattern 3.
That is, the interlayer connection portion 6 is formed at both ends of the hole filling portions 5a and 6a filled in the through hole 1 and the hole filling portions 5a and 6a, and extends to the periphery of the through hole 1 and extends to the periphery of the hole outer flat plate portions 5b and 6b. And have. Here, the through hole 1 includes a case where only the in-hole filling portion 5a or only the in-hole filling portion 6a is filled.

As the conductive paste, for example, a mixture of a flake-shaped, scaly or bark-shaped filler such as silver powder or copper powder and a thermosetting binder resin can be used.
Further, as the conductive paste, it is preferable to use a paste having a volume resistivity as small as possible and a low content of a binder resin and a solvent component.
As the conductive paste, for example, it is preferable to use a paste having a volume resistivity of 2 × 10 ^-5 to 1.5 × 10 ^-4 Ω · cm and a binder resin content of 3 to 10% by mass. With such a conductive paste, the resistance value of the interlayer connection portion 6 becomes smaller, and the variation in the resistance value becomes smaller. The volume resistivity is more preferably about 7.5 × 10 ^-5 Ω · cm, and the binder resin content is more preferably 6 to 7% by mass. Further, it is preferable to use a conductive paste having a solvent content of 0 to 1% by mass, for example.

Further, the conductive paste preferably has a small heat shrinkage during curing. Specifically, it is preferable that the mass reduction rate at the time of curing is 1% or less. With such a conductive paste, it becomes easier to control the flatness of the hole outer flat plate portion 6b which is the front surface of the interlayer connection portion 6 and the hole outer flat plate portion 5b which is the back surface, which will be described later. Here, since the conductive paste is first filled from the back surface side of the insulating substrate 4, even if the conductive paste filled in the hole filling portion 5a shrinks, the conductive paste is refilled from the front surface side of the insulating substrate 4. Therefore, the dent of the hole outer flat plate portion 6b on the surface of the insulating substrate 4 can be reduced, and the hole outer flat plate portion 6b can be flattened.

The multilayer board 100 has an extension portion 20 in which a part of the surface circuit pattern 2 extends along the inner wall of the through hole 1 of the insulating substrate 4. That is, in the multilayer board 100, the extending portion 20 is formed by stretching a part of the surface circuit pattern 2 when forming the through hole 1. The extending portion 20 is formed so that the end portion of the surface circuit pattern 2 on the through hole 1 side extends toward the inner layer of the insulating substrate 4 and is in close contact with the insulating substrate 4 inside the through hole 1. ..
In the present embodiment, since the multilayer substrate 100 has the extending portion 20, the contact area between the in-hole filling portions 5a and 6a formed by the conductive paste and the surface circuit pattern 2 becomes wider than that of a normal through hole. Therefore, the resistance value of the interlayer connection portion 6 becomes low and the resistance value becomes stable.

The length of the extending portion 20, that is, the extending length (longitudinal length) of a part of the surface circuit pattern 2 located on the inner wall of the through hole 1 is preferably 5 to 35 μm. When the length of the extending portion 20 is 5 μm or more, the contact area between the filling portions 5a and 6a in the holes and the surface circuit pattern 2 becomes wider. Therefore, in the multilayer board 100, the resistance value of the interlayer connection portion 6 is likely to be lower, and the resistance value is more likely to be stabilized. On the other hand, if the length of the extending portion 20 is 35 μm or less, the extending portion 20 can be more easily formed.

The portions of the interlayer connection portion 6 on the front surface and the back surface of the insulating substrate 4 are formed flat. That is, the upper surface of the convex portions (outer hole flat plate portions 5b, 6b) on the front surface and the back surface of the interlayer connection portion 6 is formed flat.
Here, the term "flat" means that the thickness difference between the thinnest portion and the thickest portion of the outer flat plate portion 6b is 20 μm or less, preferably 10 μm or less, and more preferably 5 μm or less.

The thickness of the flat portion of the interlayer connection portion 6, that is, the thickness of the outer flat plate portion 6b on the front surface of the insulating substrate 4 and the outer flat plate portion 5b on the back surface is preferably 10 to 30 μm. When the thickness of the outer flat plate portions 5b and 6b is 10 μm or more, it becomes easy to form the interlayer connection portion 6. On the other hand, if the thickness of the outer flat plate portions 5b and 6b is 30 μm or less, the thickness of the multilayer substrate 100 can be reduced. The thickness of the hole outer flat plate portion 6b on the surface of the insulating substrate 4 is the thickness from the upper surface of the surface circuit pattern 2 to the upper surface of the hole outer flat plate portion 6b on the surface of the insulating substrate 4. The thickness of the hole outer flat plate portion 5b on the back surface of the insulating substrate 4 is the thickness from the upper surface of the back surface circuit pattern 3 to the upper surface of the hole outer flat plate portion 5b on the back surface of the insulating substrate 4.
The thickness of the outer flat plate portions 5b and 6b can be controlled by the amount of the conductive paste when filling the through hole 1. Further, it can be controlled by polishing the outer flat plate portions 5b and 6b.

As described above, in the present embodiment, in the multilayer board 100, the hole outer flat plate portion 6b which is the front surface of the interlayer connection portion 6 and the hole outer flat plate portion 5b which is the back surface are formed flat.
The interlayer connection portion 6 of the multilayer board 100 needs to have connection reliability that can withstand heat treatment in the process of mounting components and thermal shock during soldering work. In conventional multilayer boards, through-hole connections by plating are often used. However, in such a multilayer substrate, the stress generated by the difference between the thermal expansion coefficient of the substrate and the thermal expansion coefficient of plating in the thickness direction of the substrate causes cracks in the corners of the through holes and lowers the connection reliability. Therefore, for example, as described in Patent Document 1 and Patent Document 2 described in the background art, there is also proposed a connection method in which a conductive paste is filled in a through hole for a through hole connection by plating.

In Patent Documents 1 and 2, the connection portion is formed by the conductive paste embedded in the through hole, but the through hole is not sufficiently filled with the conductive paste, and the conductive paste is used. During curing, heat shrinkage of the binder resin occurs. Therefore, the front surface and the back surface of the interlayer connection portion are not flat, and it is difficult to mount the component on the interlayer connection portion. Therefore, in the past, the interlayer connection part and the component mounting part were arranged separately. However, there is a problem that this causes an increase in the substrate area.

Further, in the interlayer connection portion as in Patent Document 1 and Patent Document 2, the insulating layer provided on the interlayer connection portion is also restricted. Specifically, for example, when a printable insulating resin is formed by a screen printing method or the like, since the front surface and the back surface of the interlayer connection portion are not flat, voids, pinholes, etc. are generated in the concave portions of the interlayer connection portion. .. Therefore, it is not possible to form a uniform insulating layer, and there is a concern that the electrical insulation in the vicinity of the connection portion may be deteriorated. Therefore, the actual situation is that a coverlay film or the like having an adhesive having a thickness capable of following the unevenness of the front surface and the back surface of the multilayer board is attached. However, in the case of attaching a coverlay film or the like having an adhesive, there is a problem that the total thickness of the substrate is increased by the amount corresponding to the thickness of the adhesive.

Further, particularly in a substrate for mounting an LED, it is necessary to consider that the insulating layer on the surface of the substrate is white, reflectance, light resistance, and the like. However, a coverlay film made of a polyimide resin having a general adhesive layer has a problem that the polyimide resin is photodegraded in a continuous LED lighting test. Therefore, the reality is that the customer's required characteristics cannot be satisfied.

Here, the demands on circuit boards from customers are increasing year by year, and in particular, in order to reduce the size, thickness, and weight of many electronic devices, the board area including parts is reduced. There are increasing demands for higher densities and thinner insulating layers. However, a multilayer board having a conventional connection structure cannot meet these demands.

In the present embodiment, in the multilayer board 100, since the hole outer flat plate portion 6b which is the front surface of the interlayer connection portion 6 and the hole outer flat plate portion 5b which is the back surface are flat, it is easy to form a resist on the interlayer connection portion 6. It has high insulation properties, and it is easy to mount components on the interlayer connection portion 6.

[Manufacturing method of multilayer board]
Next, an example of a method for manufacturing a multilayer substrate according to this embodiment will be described.
FIG. 2A is a cross-sectional view showing a state before forming a circuit pattern in the method for manufacturing a multilayer substrate according to an embodiment. FIG. 2B is a cross-sectional view showing a step of forming a circuit pattern in the method for manufacturing a multilayer substrate according to an embodiment. FIG. 2C is a cross-sectional view showing a step of forming a through hole in the method for manufacturing a multilayer substrate according to an embodiment. FIG. 3A is a cross-sectional view showing a step of forming an interlayer connection portion in the method for manufacturing a multilayer substrate according to an embodiment, and is a cross-sectional view showing a step of filling a conductive paste from the back surface of the insulating substrate. FIG. 3B is a cross-sectional view showing a step of forming an interlayer connection portion in the method for manufacturing a multilayer substrate according to an embodiment, and is a cross-sectional view showing a step of filling a conductive paste from the surface of an insulating substrate. FIG. 3C is a cross-sectional view showing a step of polishing a portion of an interlayer connection portion in the method for manufacturing a multilayer substrate according to an embodiment.
Although the squeegees and masks are given the same number in each process, they do not use the same physical material, they only have the same function and properties, and different sizes and materials are used. be able to.

The method for manufacturing a multilayer substrate of the present embodiment includes a step of forming a circuit pattern, a step of forming a through hole, a step of forming an interlayer connection portion, and a step of polishing a portion of the interlayer connection portion. Do this in this order. Since the materials and arrangements of the respective members are as described in the above description of the multilayer board 100, the description thereof will be omitted here as appropriate.

(Process of forming a circuit pattern)
The step of forming the circuit pattern is a step of forming the front surface circuit pattern 2 and the back surface circuit pattern 3 on the front surface and the back surface of the insulating substrate 4.

In this step, for example, first, one or more sheet-shaped glass cloths are impregnated with an epoxy resin, and the front surface copper foil 2a is bonded to the front surface thereof and the back surface copper foil 3a is bonded to the back surface to cure the epoxy resin. Prepare a commercially available double-sided copper-clad laminate that has been formed. Next, the front surface copper foil 2a and the back surface copper foil 3a are etched to form the front surface circuit pattern 2 and the back surface circuit pattern 3.
Instead of using a commercially available double-sided copper-clad laminate, the front surface copper foil 2a may be bonded to the front surface of the insulating substrate 4 and the back surface copper foil 3a may be bonded to the back surface. Further, a double-sided copper-clad laminate on which the front surface circuit pattern 2 and the back surface circuit pattern 3 are formed may be purchased in advance.

(Step of forming a through hole)
The step of forming the through hole is a step of forming the through hole 1 by punching so that a part of the surface circuit pattern 2 of the insulating substrate 4 extends along the inner wall of the through hole 1 of the insulating substrate 4.

In this step, in the portion of the insulating substrate 4 where the front surface circuit pattern 2 and the back surface circuit pattern 3 exist, a punching pin (punch) 14 is inserted from the front surface side of the insulating substrate 4 and punched, for example, a through hole diameter φ0. . Form a through hole 1 of 2 to 0.3 mm. Here, when the through hole 1 is formed, a part of the surface circuit pattern 2 has a structure extending along the inner wall of the through hole 1 of the insulating substrate 4. That is, the end portion of the surface circuit pattern 2 is forcibly pushed toward the inner layer of the insulating substrate 4 to extend, and the extending portion 20 is formed inside the through hole 1.
In the punching process, it is preferable to adjust the length of the extending portion 20 to be 0.05 to 0.5 times, preferably 0.1 to 0.4 times, the thickness of the insulating substrate 4. Further, in the punching process, it is preferable to adjust the length of the extending portion 20 to be 5 to 35 μm.

The length of the extension portion 20 is mainly adjusted by adjusting the diameter of the punch and the diameter of the die (punch receiving side) constituting the punching pin. Although it depends on the thickness and material of the front surface circuit pattern 2 and the back surface circuit pattern 3, for example, for a punch diameter of φ0.2 to 0.3 mm, it is preferable to set the die diameter to about φ0.21 to 0.32 mm. , Set a gap of about 0.005 to 0.01 mm between the punch and the die.

(Step of forming an interlayer connection portion)
The step of forming the interlayer connection portion is a step of filling the inside and the periphery of the through hole 1 with the conductive paste 6c by printing from both the front surface and the back surface of the insulating substrate 4 to form the interlayer connection portion 6. Here, the conductive paste 6c is filled in the order of the back surface and the front surface of the insulating substrate 4, but the conductive paste 6c may be filled in the order of the front surface and the back surface of the insulating substrate 4.

In this step, first, the conductive paste 6c is filled into the through hole 1 from the back surface of the insulating substrate 4 by a screen printing method via the mask 11. The screen printing conditions are, for example, a metal mask 11 having a clearance of 0 to 2 mm and a thickness of 20 to 300 μm and an opening hole diameter of φ0.2 to 0.5 mm, or a screen mask 11 having a thickness of 150 to 400 mesh and an emulsion thickness of 10 to 20 μm. And a squeegee 40 made of urethane rubber having a hardness of 70 to 80 can be used for squeegee effective angle of 15 to 30 degrees, printing pressure of 0.2 to 0.4 MPa, squeegee speed of 10 to 50 mm / sec, and squeegee reciprocating printing. .. By performing reciprocating printing on the front surface and the back surface of the insulating substrate 4 to be printed first, it becomes easier to fill the through hole 1 with the conductive paste 6c. When the thickness of the insulating substrate 4 is thin or the through hole 1 is large, the conductive paste 6c is filled in the through hole 1 even in the squeegee one-way printing, so that the squeegee one-way printing may be performed.

Then, the conductive paste 6c is temporarily cured by heating it at a constant temperature of, for example, 80 to 120 ° C. for 15 to 30 minutes. The temporary curing of the conductive paste 6c is preferably in a state where the surface of the conductive paste 6c is dried, and the conductive paste 6c after the temporary curing is preferably in a state of an insulator.

The reason why it is preferable that the conductive paste 6c after the temporary curing is in the state of an insulator will be described below.
The conductive paste 6c formed by printing from the back surface and the conductive paste 6c formed from the front surface are connected by screen printing from the front surface of the next step. At that time, if the conductive paste 6c printed and formed from the back surface is cured too much and becomes a “conductor”, the connection between the conductive paste 6c printed and formed from the back surface and the conductive paste 6c formed from the front surface is connected. The conduction state at the interface may deteriorate. When the conduction state becomes poor, quality problems such as an increase in connection resistance value and a decrease in connection reliability against thermal shock occur. Therefore, it is preferable that the conductive paste 6c after temporary curing is in the state of an insulator.

The following method can be used to make the conductive paste 6c after temporary curing into an insulator state.
First, a heat treatment test is performed using a sample in which the conductive paste 6c is line-printed in advance. Then, it is confirmed that (1) how hard the conductive paste 6c is and (2) what the resistance value of the line is under what conditions with respect to the heating temperature and heating time, and temporary curing is performed. Derive the condition. As a result, the temporary curing conditions for the state of the insulator are determined. It is also possible to proceed to the next step without temporarily curing at all. However, if the conductive paste 6c in a wet state is exposed on the surface of the substrate and is adsorbed on the printing table or the adsorption paper in the next step, the conductive paste 6c is peeled off from the substrate and the like causes an adverse effect. Therefore, it is preferable to temporarily cure the conductive paste 6c printed and formed from the back surface.

In this way, first, the joint portion 5 having the filling portion 5a in the hole and the flat plate portion 5b outside the hole on the back surface of the insulating substrate 4 is formed. In FIG. 3A, for convenience, the bonded portion 5 is shown as a state after the conductive paste 6c is temporarily cured.

Subsequently, the conductive paste 6c is printed and formed from the surface of the insulating substrate 4 via the mask 11 by a screen printing method. As the conductive paste 6c, the same conductive paste 6c printed and filled from the back surface of the insulating substrate 4 can be used. The screen printing conditions are, for example, a metal mask 11 having a clearance of 0 to 2 mm and a thickness of 20 to 50 μm and an opening hole diameter of φ0.2 to 0.5 mm, or a screen mask 11 having a thickness of 150 to 400 mesh and an emulsion thickness of 10 to 20 μm. And a squeegee 40 made of urethane rubber having a hardness of 80 are used, the effective squeegee angle is 15 to 70 degrees, the printing pressure is 0.1 to 0.4 MPa, and the squeegee speed is 10 to 100 mm / sec, so that squeegee one-way printing can be performed.

Then, the conductive paste 6c is heated at a constant temperature of 180 to 200 ° C. for 45 to 90 minutes to cure. As a result, the interlayer connection portion 6 for electrically connecting the front surface circuit pattern 2 and the back surface circuit pattern 3 is formed. In FIG. 3B, for convenience, the interlayer connection portion 6 is shown as a state after the conductive paste 6c is cured.
When the conductive paste 6c is filled in the order of the front surface and the back surface of the insulating substrate 4, the conditions of the screen printing method from the back surface and the conditions of the screen printing method from the front surface may be exchanged.

In the present embodiment, in the step of filling the conductive paste 6c, the surface of the insulating substrate 4 is filled with the conductive paste 6c by printing from both the front surface and the back surface of the insulating substrate 4 inside the through hole 1. And the portions of the outer flat plate portions 5b and 6b of the interlayer connection portion 6 on the back surface can be flattened.

(Step of polishing the part of the interlayer connection part)
The step of polishing the portion of the interlayer connection portion is a step of flatly polishing the portion of the interlayer connection portion 6 on the front surface and the back surface of the insulating substrate 4. That is, this step is a step of polishing the upper surfaces of the hole outer flat plate portions 5b and 6b so that the upper surfaces of the hole outer flat plate portions 5b and 6b on the front surface and the back surface of the interlayer connection portion 6 become flatter.

From the relationship between the electrode shape and thickness of the mounting component 10 and the thickness of the surface resist 7, if necessary, the interlayer connection portion 6 may be polished before printing and forming the surface resist 7. In that case, physical polishing with a ceramic buff 30 is preferable. By polishing the interlayer connection portion 6, the portions of the outer flat plate portions 5b and 6b of the interlayer connection portion 6 can be further flattened. The step of polishing the portion of the interlayer connection portion does not have to be performed as an indispensable step.

[Parts mounting board]
Next, the component mounting board according to this embodiment will be described.
FIG. 4 is a cross-sectional view schematically showing the configuration of the component mounting board according to the embodiment.
The component mounting substrate 101 includes a multilayer substrate 100, a surface resist 7 provided in a part of the front surface of the multilayer substrate 100, a back surface resist 8 provided on the back surface of the multilayer substrate 100, and a surface of the multilayer substrate 100. A mounting component 10 provided via an adhesive layer 9 which is a solder paste is provided on the interlayer connection portion 6.

The surface resist 7 is formed around the mounting component 10. That is, the surface resist 7 is provided on the surface circuit pattern 2 excluding the interlayer connection portion 6 and its vicinity. The back surface resist 8 is formed so as to cover the back surface circuit pattern 3 and the interlayer connection portion 6.

As the front surface resist 7 and the back surface resist 8, for example, a general one obtained by mixing a copolymer resin such as epoxy with a solvent or an antifoaming agent, or a whitening one to which a filler such as titanium oxide is added may be used. can. The front surface resist 7 and the back surface resist 8 are insulating layers. The thickness of the front surface resist 7 and the back surface resist 8 is, for example, 10 to 30 μm. The thickness of the surface resist 7 is preferably equal to or thicker than the thickness of the outer flat plate portion 6b. This is because the height of the adhesive layer 9 can be suppressed and the height of the mounting component 10 can be lowered by making the thickness of the outer flat plate portion 6b thinner than the thickness of the surface resist 7. The thickness of the outer flat plate portion 6b is preferably, for example, about 0.5 to 0.9 times, more preferably about 0.6 to 0.8 times, as compared with the thickness of the surface resist 7. By increasing the thickness of the outer flat plate portion 6b to 0.5 times or more, the thickness of the interlayer connection portion 6 can be suppressed, and by setting the thickness to 0.9 times or less, the electrical conductivity can be maintained high. The thickness of the front surface resist 7 and the back surface resist 8 may be the same or different.

As the material of the adhesive layer 9, for example, Sn-Ag-Cu, Au, Ag, Cu, Sn, Bi and the like or alloys thereof can be used. Examples of the mounting component 10 include LEDs, chip resistors, capacitors, and the like.

[Manufacturing method of component mounting board]
Next, a method of manufacturing a component mounting board according to this embodiment will be described.
FIG. 5A is a cross-sectional view showing a multilayer board before forming a resist in the method for manufacturing a component mounting board according to an embodiment. FIG. 5B is a cross-sectional view showing a step of forming a resist in the method of manufacturing a component mounting substrate according to an embodiment, and is a cross-sectional view showing a step of forming a resist on the surface of a multilayer board. FIG. 5C is a cross-sectional view showing a step of forming a resist in the method of manufacturing a component mounting substrate according to an embodiment, and is a cross-sectional view showing a step of forming a resist on the back surface of the multilayer board. FIG. 6A is a cross-sectional view showing a step of mounting a component in the method of manufacturing a component mounting substrate according to an embodiment, and is a cross-sectional view showing a step of forming an adhesive layer. FIG. 6B is a cross-sectional view showing a process of mounting a component in the method of manufacturing a component mounting board according to an embodiment, and is a cross-sectional view showing a state after the component is mounted. The front surface resist before curing is 7c, and the back surface resist before curing is 8c.

As an example, the method for manufacturing a component mounting substrate of the present embodiment includes a step of forming a resist on the above-mentioned multilayer board and a step of mounting components, and the steps are performed in this order. Since the materials and arrangement of each member are as described in the above-mentioned description of the component mounting board, the description thereof will be omitted here as appropriate.

(Step of forming resist)
The step of forming the resist is a step of forming the front surface resist 7 and the back surface resist 8 on the front surface and the back surface of the multilayer substrate 100. Here, the front surface resist 7 and the back surface resist 8 are formed in the order of the front surface and the back surface of the multilayer substrate 100, but the back surface resist 8 and the front surface resist 7 may be formed in the order of the back surface and the front surface of the multilayer substrate 100.

In this step, first, the surface resist 7 is formed on the surface circuit pattern 2 of the multilayer substrate 100 by a screen printing method using the screen mask 12 and the surface resist 7c on which the desired coating pattern is formed.

The screen printing conditions are, for example, a clearance of 0.5 to 5.0 mm, a screen mask 12 of 100 to 400 mesh and an emulsion thickness of 10 to 20 μm, and a urethane rubber squeegee 40 having a hardness of 60 to 80, and the squeegee is effective. The angle can be 60 to 80 degrees, the printing pressure can be 0.2 to 0.4 MPa, the squeegee speed can be 20 to 100 mm / sec, and the squeegee one-way printing can be performed. Then, the surface resist 7 is heated at 50 to 250 ° C. for 5 to 60 minutes to cure.

Subsequently, the back surface resist 8 is formed on the back surface circuit pattern 3 by a screen printing method using the screen mask 12 and the back surface resist 8c. As the back surface resist 8, the same resist as the resist printed and formed from the front surface of the insulating substrate 4 can be used, and the screen printing conditions can be the same as those at the time of printing formation of the front surface resist 7. Then, the back surface resist 8 is heated at 50 to 250 ° C. for 5 to 60 minutes to cure. As a result, the insulating layer is formed in a desired range of the front surface circuit pattern 2 and the back surface circuit pattern 3.

(Process for mounting parts)
The step of mounting the component is a step of mounting the component on the multilayer substrate 100 on which the front surface resist 7 and the back surface resist 8 are formed.

In this step, first, the solder paste 9c is printed using the metal mask 13 and the squeegee 40 having an opening in the mounting portion of the component to form the adhesive layer 9. Next, the mounting component 10 is placed on the adhesive layer 9, the adhesive layer 9 is cured, and the mounting component 10 is connected to and fixed to the multilayer board 100.

In this example, the solder paste 9c is applied directly on the interlayer connection portion 6, but from the viewpoint of the bonding strength of the component, the mounting portion of the component may be plated or organically rust-proofed in advance.

As described above, according to the present embodiment, the interlayer connection portion 6 is formed by filling the through hole 1 with the conductive paste 6c. Here, focusing on the difference in the coefficient of thermal expansion between the material used for the interlayer connection portion 6 and the substrate insulating resin, the difference in the coefficient of thermal expansion between the conductive paste 6c containing the binder resin and the insulating resin material of the insulating substrate 4 is This is smaller than the difference in the coefficient of thermal expansion between the plated metal and the insulating resin material of the substrate in the through-hole connection by plating, which is generally used. Therefore, by suppressing the stress at the time of thermal shock, the multilayer board 100 improves the connection reliability in the process of mounting parts and the like.

Further, an extension portion 20 is formed in which a part of the surface circuit pattern 2 extends along the inner wall of the through hole 1 of the insulating substrate 4 by punching. As a result, the contact area between the in-hole filling portions 5a and 6a formed of the conductive paste 6c filled in and around the through hole 1 and the surface circuit pattern 2 becomes wider than that in the general connection portion structure. Therefore, the resistance value of the interlayer connection portion 6 becomes small, and the variation in the resistance value also becomes small. Further, since the front surface and the back surface of the interlayer connection portion 6 are flat, it becomes easy to form the front surface resist 7 and the back surface resist 8 and mount the components on the interlayer connection portion 6. Therefore, it is possible to improve the insulating property of the interlayer connection portion 6 in the multilayer board 100 and increase the component mounting density. Further, the accuracy of the mounting position and the accuracy of the inclination of the mounting component 10, which are particularly important in mounting the LED component, can be ensured by the flatness of the front surface and the back surface of the interlayer connection portion 6. It can also be applied to flexible substrates with a thin insulating layer, and can contribute to miniaturization, thinning, and narrowing of frames for electronic devices and displays.

Hereinafter, examples will be described.
FIG. 7A is an image showing the substrate for evaluating the interlayer connection portion before filling with the conductive paste, which was used in the examples. FIG. 7B is an enlarged image showing a part of FIG. 7A. FIG. 7C is a perspective view schematically showing the connection state of the interlayer connection portion in the interlayer connection portion evaluation substrate after filling with the conductive paste, which is used in the examples.

The interlayer connection portion was evaluated using the interlayer connection portion evaluation substrate. The board for evaluating the interlayer connection part has an external dimension of 40 mm × 190 mm, and there are 40 interlayer connection parts connected in series between the measurement lands at the upper left end and the lower left end at intervals of 0.9 mm in a daisy chain. It is a structure that connects columns. The total number of interlayer connection portions in one substrate is 5,600. As for the substrate for evaluating the interlayer connection portion, three pieces having a through hole diameter of φ0.25 mm and three pieces having a through hole diameter of φ0.2 mm were manufactured, for a total of six pieces.

The interlayer connection evaluation substrate was manufactured by the above-mentioned method for manufacturing a multilayer substrate. Specifically, it is as follows.
First, a copper foil having a thickness of 35 μm was bonded to the front surface and the back surface of an insulating substrate (glass epoxy) having a thickness of 400 μm, and the total thickness of the multilayer substrate at the interlayer connection portion was set to 470 μm. Next, the copper foils on both sides were etched to form a front surface circuit pattern and a back surface circuit pattern. Next, a through hole having a through hole diameter of φ0.25 mm and a through hole diameter of φ0.2 mm was formed by punching from the surface side of the insulating substrate with a punching pin.

Next, the conductive paste was filled into the through holes from the surface of the insulating substrate by a screen printing method via a mask. The screen printing conditions are a clearance of 0 to 1 mm, a metal mask with a thickness of 20 to 30 μm, an opening hole diameter of φ0.3 and 0.35 mm, and a urethane rubber squeegee with a hardness of 80. The pressure was 0.3 MPa, the clearance speed was 10 mm / sec, and the squeegee reciprocating printing was performed. Then, the conductive paste was heated at a constant temperature of 120 ° C. for 30 minutes to be temporarily cured. As the conductive paste, a mixture of a filler of flake-shaped silver and flake-shaped silver-coated copper powder and a thermosetting binder resin was used. The conductive paste has a volume resistivity of 7.5 × 10 ^-5 Ω · cm, a binder resin content of 6 to 7% by mass, a solvent content of 0% by mass, and a mass reduction rate at the time of curing of 1. Those less than% were used.

Subsequently, a conductive paste similar to that printed and filled from the front surface was printed and formed from the back surface of the insulating substrate via a mask by a screen printing method. The screen printing conditions are a clearance of 0 to 1 mm, a metal mask with a thickness of 20 to 30 μm, an opening hole diameter of φ0.3 and 0.35 mm, and a urethane rubber squeegee with a hardness of 80. The pressure was 0.4 MPa, the squeegee speed was 10 mm / sec, and the squeegee one-way printing was performed. Then, the conductive paste was heated at a constant temperature of 200 ° C. for 60 minutes to be cured.
As a result, an interlayer connection portion for electrically connecting the front surface circuit pattern and the back surface circuit pattern was formed.

As a result of analyzing the substrate for evaluating the interlayer connection portion thus obtained, no poor continuity portion was detected. The interlayer connection portion with a through hole diameter of φ0.25 mm is 6.8 to 7.6 mΩ (n = 3 boards), and the interlayer connection portion with a through hole diameter of φ0.2 mm is 10.1 to 12.9 mΩ (n = 3 boards). ) Had a connection resistance value. This is a reasonable resistance value calculated from the dimensions of the connection part, and the variation is small, and it was confirmed by this analysis that there is no problem in use.

Subsequently, a 260 ° C. solder dip (repeated 10 times) heat resistance test and a 260 ° C. reflow treatment (repeated 10 times) heat resistance test were carried out using the obtained substrate for evaluating the interlayer connection portion. As a result, it was confirmed that the resistance value change rate was less than 10% for both the interlayer connection evaluation boards having through hole diameters of φ0.2 mm and 0.25 mm, and there was no problem in use.

The height of the conductive paste from the surface of the copper foil at the interlayer connection portion (thickness of the flat plate portion outside the hole) was measured using a step meter, a microscope, or the like, and was about 10 to 30 μm.

The method for manufacturing a multilayer board, the method for manufacturing a component mounting board, the multilayer board, and the component mounting substrate according to the present embodiment have been specifically described above in terms of embodiments for carrying out the invention. It is not limited to these statements and must be broadly interpreted based on the statements of the scope of claims. Further, various changes and modifications based on these descriptions are also included in the gist of the present invention.

For example, the multilayer board 100 has an extending portion 20 in which a part of the surface circuit pattern 2 extends along the inner wall of the through hole 1 of the insulating substrate 4. However, a part of the back surface circuit pattern 3 may have an extending portion extending along the inner wall of the through hole 1 of the insulating substrate 4. Further, the insulating substrate 4 may have an extension portion on both the front surface side and the back surface side.

Further, for example, in the method for manufacturing a multilayer substrate, in the step of forming the interlayer connection portion, printing from the surface of the insulating substrate 4 (printing of the surface to be printed later) is one-way printing, but reciprocating printing may be used.
Further, the method for manufacturing a multilayer board and the method for manufacturing a component mounting board may include other steps during or before and after each of the steps as long as the steps are not adversely affected. For example, a foreign matter removing step of removing foreign matter mixed in during manufacturing may be included.

The multilayer board and component mounting board according to the embodiment of the present disclosure can be used for electronic devices, displays and the like.

1 Through hole 2 Front circuit pattern 2a Front surface copper foil 3 Back surface circuit pattern 3a Back surface copper foil 4 Insulation substrate 5 Joined parts 5a, 6a Hole filling parts 5b, 6b Hole outer flat plate part 6 Interlayer connection part 6c Conductive paste 7, 7c Front surface resist 8, 8c Back surface resist 9 Adhesive layer 9c Solder paste 10 Mounting component 11 Mask 12 Screen mask 13 Metal mask 14 Punching pin 20 Extension 30 Ceramic buff 40 Squeegee 100 Multilayer board 101 Component mounting board

Claims (7)

Circuit patterns provided on the front and back surfaces of the insulating substrate, interlayer connection portions formed by filling through holes penetrating the insulating substrate and the circuit pattern with conductive paste, and front and back surfaces of the insulating substrate. At least one of the circuit patterns is provided with an extension portion extending along the inner wall of the through hole of the insulating substrate.
The conductive paste has a volume resistivity of 2 × 10 ^-5 to 1.5 × 10 ^-4 Ω · cm and a binder resin content of 3 to 10% by mass.
The interlayer connection portion has an in-hole filling portion filled in the through hole and an outer flat plate portion formed at both ends of the in-hole filling portion and extending to the periphery of the through hole.
The outer flat plate portion is formed on the front surface and the back surface of the insulating substrate.
The thickness of the outer flat plate portion outside the hole is 10 μm or more and 30 μm or less.
A flat multilayer substrate having a thickness difference of 10 μm or less between the thinnest portion and the thickest portion of the outer flat plate portion at the portions of the interlayer connection portion on the front surface and the back surface of the insulating substrate. The insulating substrate is a glass epoxy having a thickness of 50 to 1000 μm or a polyimide having a thickness of 12 to 50 μm, and the circuit pattern formed on the front surface and the back surface of the insulating substrate has a thickness of 12 to 70 μm. The multilayer board according to claim 1. The multilayer substrate according to claim 1 or 2, wherein the conductive paste has a mass reduction rate of 1% or less at the time of curing. The multilayer substrate according to any one of claims 1 to 3, wherein the through hole has a diameter of 0.2 to 0.3 mm. The multilayer substrate according to any one of claims 1 to 4, wherein the length of the extending portion is 5 to 35 μm. The multilayer substrate according to any one of claims 1 to 5, wherein the length of the extending portion is 0.05 to 0.5 times the thickness of the insulating substrate. A component mounting board in which mounting components are mounted on the multilayer board according to any one of claims 1 to 6.

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