JP2022029322A - Imaging element and signal processing circuit thereof - Google Patents

Abstract

To provide an imaging element and a signal processing circuit thereof which can prevent a change in the light receiving sensitivity of a photoelectric conversion film regardless of the generation of a signal charge.SOLUTION: A signal processing circuit of an imaging element provided with a photoelectric conversion film 10 whose light receiving sensitivity changes depending on an applied electric field includes a voltage detection node 13 that is connected to the photoelectric conversion film 10 and generates a voltage corresponding to the amount of charge generated by the photoelectric conversion film 10, an output conversion circuit 40 that outputs a photoelectric conversion signal for each pixel on the basis of the voltage of the voltage detection node 13, and a voltage adjustment circuit 51 that adjusts the applied voltage of the photoelectric conversion film 10 such that the applied electric field becomes constant on the basis of the voltage of the voltage detection node 13.SELECTED DRAWING: Figure 1

Description

The present invention relates to an image pickup device and its signal processing circuit, and more particularly to a photoelectric conversion film laminated type image pickup device and its signal processing circuit.

In recent years, an image pickup device in which an inorganic or organic photoelectric conversion film is laminated on a solid-state image pickup device such as a CMOS (Complementary Metal Oxide Semiconductor) image sensor has been proposed. The photoelectric conversion film laminated image sensor has a feature that the sensitivity can be improved and the dynamic range can be expanded by selecting the film material. Further, a high-performance and multifunctional element has been proposed by applying a voltage to a photoelectric conversion film.

The image pickup device of Patent Document 1 temporarily sets the sensitivity to 0 by changing the applied voltage of the film, and enables the global shutter operation. It is also proposed to change the light receiving sensitivity by changing the applied voltage of the film for each exposure during multiple exposure. In the image pickup device of Patent Document 2, an auxiliary electrode is arranged around the pixel electrode, and a part of the signal charge is collected on the auxiliary electrode, whereby the signal entering the pixel electrode can be adjusted.

The present inventors are studying a crystalline selenium film capable of multiplying an avalanche (Non-Patent Document 1), and this film is laminated on a solid-state image sensor to multiply the charge generated by photomultiplier tube conversion. The sensitivity has been improved. With this photoelectric conversion film, it is possible to solve the problem that the pixels of the image pickup device become finer (for example, 3 μm square or less) in order to improve the definition of the image, and the signal that can be detected by the silicon photodiode is insufficient.

FIG. 13 shows an example of a signal processing circuit (signal readout circuit) of a conventional photoelectric conversion film laminated image sensor. Each pixel includes a photoelectric conversion unit having a photoelectric conversion film 10, a floating diffusion (FD) 13, a reset transistor (T _RST ) 20, an output transistor 30, and a selection transistor 32. The photoelectric conversion film 10 has a voltage application electrode 11 for applying a voltage V _F formed of a transparent conductive film on the upper surface thereof, and a light charge collection electrode 12 connected to a floating diffusion (FD) 13.

The potential V _FD of the voltage detection node 14 of the floating diffusion (FD) 13 changes due to the accumulation of photoelectrically converted charges. The voltage detection node 14 is connected to the gate of the output transistor 30, and the output transistor 30 constitutes a source follower circuit SF. When the selection transistor 32 is selected by the row selection line 31, the output of the pixel (photoelectric conversion signal) is read out to the vertical signal line 33 having the constant current source 34, and the output conversion circuit 40 (noise removal circuit 41 and A /). It is read by A / D (analog / digital) conversion by the D conversion circuit 42).

Japanese Patent No. 6202512 Japanese Unexamined Patent Publication No. 2016-86407 Japanese Unexamined Patent Publication No. 2017-55321 Japanese Unexamined Patent Publication No. 2018-19353

S. Imura et al., “High Sensitivity Image Sensor Overlaid with Thin-Film Crystalline-Selenium-based Heterojunction Photodiode”, IEDM 2014, 4.3, (2014) Shinsaku Hiura, "Removal of Blurring and Blurring by Coded Imaging", Optics, (2011), Vol. 40, No. 10, pp. 522-527

In the photoelectric conversion film 10, the amount of signal charge (electrons or holes) generated in the film changes depending on the applied electric field (intra-film electric field). In the case of a crystalline selenium film that multiplies an avalanche, the charge multiplication factor changes depending on the applied electric field. Here, the applied electric field is determined based on the difference between the voltage of the power supply applied to the film (VF) and the voltage (VF) of the voltage detection node 14 (floating _diffusion : _FD ) on the solid-state image sensor side. However, since the voltage of the FD changes as the signal charge is accumulated, there is a problem that the applied electric field changes due to this, and the multiplication factor, that is, the light receiving sensitivity changes.

FIG. 14 is a diagram illustrating a change in the applied electric field due to the accumulation of signal charges by the prior art. As shown in FIG. 14A, it is assumed that the input voltage V _S (= V _FD ) of the output transistor 30 is V _{S 0} at the beginning of the one frame period T. V _{S 0} is the value of V _S when V _FD = V _RST . Considering the case where the signal charge is an electron, the value of V _FD becomes smaller as the signal charge is accumulated in the _FD due to the incident of light, so that the value of VS also becomes smaller. It is assumed that V _S becomes V _{S 1} at the end of one frame period T. At this time, if the film applied voltage V _F = V _{F 0} is constant as shown in FIG. 14 (b), the applied electric field E _F decreases with charge accumulation as shown in FIG. 14 (c), and the frame period It can be seen that the light receiving sensitivity is lowered.

The purpose of the image pickup devices of Patent Documents 1 and 2 is to reduce the sensitivity, and it is not possible to prevent the change in sensitivity due to the generation of signal charge.

Therefore, an object of the present invention made in view of the above problems is to receive light received by the photoelectric conversion film regardless of the generation of signal charge in an image pickup device using a photoelectric conversion film whose light receiving sensitivity changes depending on an applied electric field. It is an object of the present invention to provide an image pickup device and a signal processing circuit thereof that can prevent a change in sensitivity.

In order to solve the above problems, the signal processing circuit according to the present invention is a signal processing circuit of an image pickup element provided with a photoelectric conversion film whose light receiving sensitivity changes depending on an applied electric voltage, and is connected to the photoelectric conversion film and is connected to the photoelectric conversion film. Based on the voltage detection node that generates the voltage corresponding to the amount of charge generated by the conversion film, the output circuit that outputs the photoelectric conversion signal of each pixel based on the voltage of the voltage detection node, and the voltage of the voltage detection node. It is characterized by including a voltage adjusting circuit for adjusting the applied voltage of the photoelectric conversion film so that the applied electric field becomes constant.

Further, in the signal processing circuit, it is desirable that the output circuit includes at least one of an output transistor and an amplifier.

Further, the signal processing circuit includes an inverter circuit in which the output circuit inputs the voltage of the voltage detection node, and a reset means in which the voltage of the voltage detection node is set as a reset voltage based on the output of the inverter circuit. It is desirable to include a counter circuit that counts the pulse output by the inverter circuit.

Further, it is desirable that the signal processing circuit further includes a memory corresponding to the number of bits of the counter circuit and a counter output switch connecting the counter circuit and the memory.

Further, in the signal processing circuit, it is desirable that the voltage adjusting circuit generates the applied voltage in a coded pattern and performs coded exposure.

In order to solve the above problems, the image pickup device according to the present invention is characterized by comprising a photoelectric conversion film whose light receiving sensitivity changes depending on an applied electric field and the signal processing circuit.

Further, it is desirable that the photoelectric conversion film of the image pickup element is a photoelectric conversion film capable of multiplying the avalanche.

Further, it is desirable that the image pickup device sets the applied voltage for each pixel block including a plurality of pixels.

Further, it is desirable that the image pickup device has a three-dimensional structure in which the photoelectric conversion film is laminated on the signal processing circuit and the components constituting the signal processing circuit are provided in different layers.

According to the image pickup device and the signal processing circuit thereof in the present invention, in the image pickup device using the photoelectric conversion film whose light receiving sensitivity changes depending on the applied electric field, the change in the light receiving sensitivity of the photoelectric conversion film is prevented regardless of the generation of signal charge. be able to.

It is a figure which shows the example of the signal processing circuit and the image pickup element of 1st Embodiment. It is an image diagram of the structure and operation of a photoelectric conversion part. It is a figure which shows the example of the electrode structure of a photoelectric conversion film. In the first embodiment, it is a figure which shows the change of each voltage and the like at the time of performing voltage adjustment. It is a figure which shows the example of the signal processing circuit and the image pickup element of 2nd Embodiment. In the second embodiment, it is a figure which shows the change of each voltage and the like at the time of performing voltage adjustment. It is a figure which shows the example of the signal processing circuit and the image pickup element of the modification of the 2nd Embodiment. It is a figure which shows the example of the pattern of the applied voltage at the time of performing a coded exposure. It is a figure which shows the change of each voltage of the coded exposure when voltage adjustment is not performed. In the third embodiment, it is a figure which shows the change of each voltage and the like at the time of performing voltage adjustment. It is a figure which shows the change of each voltage of the coded exposure when voltage adjustment is not performed. In the fourth embodiment, it is a figure which shows the change of each voltage and the like at the time of performing voltage adjustment. It is a figure which shows the example of the signal processing circuit of the conventional photoelectric conversion film laminated type image sensor. It is a figure explaining the change of the applied electric field by the accumulation of the signal charge by the prior art.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First Embodiment)
FIG. 1 shows an example of a signal processing circuit and an image pickup device according to the first embodiment of the present invention. Each pixel has a photoelectric conversion unit having a photoelectric conversion film 10, a floating diffusion (FD) 13, a reset transistor ( _TR ) 20, an output transistor 30, a selection transistor (SEL) 32, and an amplifier (amplifier) 50. And a voltage adjusting circuit 51. Compared with the conventional pixel of FIG. 13, an amplifier 50 and a voltage adjusting circuit 51 are added. In the present embodiment, the image pickup device is composed of a two-dimensional pixel array in which the pixels are repeated in the vertical direction and the horizontal direction.

The output of the pixel (photoelectric conversion signal) is read out to a vertical signal line 33 having a constant current source 34, and is A / D (analog / digital) converted and read out by the output conversion circuit 40. The output conversion circuit 40 includes, for example, a noise reduction circuit 41 and an A / D conversion circuit 42. The vertical signal line 33 and the output conversion circuit 40 process the output of one row of pixels arranged in the vertical direction, and this is repeated in the horizontal direction, and the output signal of the two-dimensional pixel array is generated from the plurality of vertical signal lines 33. Read out. It is also possible that the vertical signal line 33 constitutes a single line sensor.

First, the photoelectric conversion unit used in the present embodiment will be described. FIG. 2 is an image diagram of the configuration and operation of the photoelectric conversion unit. Although the photoelectric conversion film 10 is made of crystalline selenium (c-Se) or amorphous selenium (a-Se) in this embodiment, other materials capable of multiplying the charge avalanche can also be used.

In an image pickup device in which a photoelectric conversion film is laminated, as shown in FIG. 13, a photocharge collecting electrode is provided on the lower side of the photoelectric conversion film, a transparent conductive film is laminated on the upper side of the photoelectric conversion film, and a voltage is applied to the transparent conductive film. Is a general method to generate an electric field in the film stacking direction. However, in order to apply an independent voltage to each pixel, it is necessary to separately create a transparent conductive film that normally forms a film covering the entire element for each pixel and apply the voltage individually. , Difficulty in manufacturing electrodes and wiring.

In the present embodiment, both the electrodes 11 and 12 for applying a voltage to the photoelectric conversion film 10 are provided on the surface of the photoelectric conversion film 10 on the substrate (signal processing circuit) side. In the production, the voltage application electrode 11 for applying the voltage VF and the photocharge collection electrode 12 connected to the floating diffusion ( _FD ) 13 are mounted on the substrate on which the signal processing circuit is formed, and the electrodes of the semiconductor process are used. It is formed by the wiring manufacturing process. After that, the photoelectric conversion film 10 is formed on the entire substrate by covering the electrodes 11 and 12, so that the photoelectric conversion portion is manufactured.

When light is incident on the photoelectric conversion film 10, electric charges are generated in the film due to photoelectric conversion. Then, when a voltage V _F (+-of the voltage V _F changes depending on whether the charge is an electron or a hole) is applied to the voltage application electrode 11 side, the voltage V F changes between the electrodes 11 and 12 in the photoelectric conversion film 10 in the film plane direction. An electric field (applied electric field) is generated. As a result, avalanche multiplication occurs, and the multiplied charge flows to the photomultiplier electrode 12. This enables highly sensitive photodetection. Further, the applied voltage V _F can control the avalanche multiplication factor of the electric charge generated by the photoelectric conversion.

FIG. 3 is an example of the electrode structure of the photoelectric conversion film 10. The electrode shape is, for example, a comb tooth shape (a shape in which the teeth of the comb tooth electrodes 11 and 12 are alternately combined) and FIG. 3 (b) as shown in FIG. 3 (a) so that a different voltage can be applied to each pixel. The shape is a grid (a shape in which the light charge collecting electrode 12 is surrounded by the _VF voltage application electrode 11), and this electrode structure is independently formed for each pixel. Further, by forming wiring connected to each electrode in the substrate, it is possible to control the voltage application for each pixel. Furthermore, since both electrodes are formed by the wiring process of the semiconductor process, the distance between the electrodes can be short (for example, 10 to 100 nm), and an electric field that causes avalanche multiplication between the electrodes at a relatively low applied voltage. (About ¹⁰⁷ V / m) can be generated.

Here, it is assumed that the voltage is applied independently for each pixel, but when the applied voltage of the photoelectric conversion film is controlled for each pixel block of a plurality of pixels, the voltage of the applied voltage node (voltage application electrode 11) is not necessarily the pixel. It does not have to be a separate system for each, but may be a separate system for each pixel block in which a plurality of pixels are grouped together.

Returning to FIG. 1, the configuration of the signal processing circuit in each pixel will be described. As described above, the photoelectric conversion film 10 is formed in the film by the applied voltage between the voltage application electrode 11 (applied voltage node V _F ) provided for each pixel and the light charge collection electrode 12 (voltage detection node 14). An electric field is generated, causing an avalanche multiplication of the charge. The electric charge (signal charge) generated by the photoelectric conversion film 10 flows from the optical charge collecting electrode 12 to the floating diffusion (FD) 13.

The floating diffusion (FD) 13 functions as a capacitor, and in the initial state (reset state), the potential V _FD of the voltage detection node 14 is the reset voltage V _RST , and when the signal charge flows in, the potential V _FD of the voltage detection node 14 Changes. The voltage detection node 14 is connected to the amplifier 50, and the output voltage _VS of the amplifier 50 is input to the gate electrode of the output transistor 30 and the voltage adjustment circuit 51.

The reset transistor (T _RST ) 20 is controlled by a predetermined control signal and is turned on (conducting) after the end of one frame period to apply a reset voltage V _RST to the floating diffusion 13. As a result, the potential V _FD of the voltage detection node 14 becomes the reset voltage V _RST , and the signal charge accumulated in the floating diffusion 13 is erased. In this way, the reset transistor (T _RST ) 20 functions as a pixel reset means.

The output transistor 30 constitutes the source follower circuit SF, and when the selection transistor (SEL) 32 is selected, it corresponds to the output voltage _VS of the amplifier 50 (that is, based on the voltage of the voltage detection node 14). , The output voltage as a photoelectric conversion signal is output to the source electrode node. The output transistor 30 (source follower circuit SF) functions as an output circuit for each pixel. The selection transistor (SEL) 32 is controlled to be ON (conducting) / OFF (non-conducting) by the row selection line 31 selected by the vertical shift register (not shown).

The vertical signal line 33 has a constant current source 34, and an output signal (photoelectric conversion signal) of the pixels of the selected line is output via the selection transistor (SEL) 32. In the present embodiment, the output signal of the pixel is output as a digital signal via the noise reduction circuit 41 and the A / D conversion circuit 42 of the output conversion circuit 40. The output conversion circuit 40 in FIG. 1 is an example, and may be a circuit that outputs a pixel output signal as an analog signal.

After that, the reset transistor (T _RST ) 20 is turned ON (conducting) to reset the floating diffusion 13. After the reset, the floating diffusion 13 resumes charge accumulation during the next light receiving period (frame).

Next, the operation of the voltage adjusting circuit 51 and the control of the voltage V _F applied to the photoelectric conversion film 10 will be described.

The photoelectric conversion film 10 is generated by an applied electric field E _F between the voltage V F of the voltage application electrode 11 (membrane application voltage node) provided for each pixel and the voltage V _{F D} of the _photocharge collection electrode 12 (voltage detection node 14). Multiplies the charged charge by the avalanche. The magnification of this avalanche may be different for each pixel. After the end of one frame period, a signal corresponding to the accumulated charge is output from the selection transistor (SEL) 32 to the vertical signal line 33 in the same manner as a normal CMOS image sensor.

The voltage detection node 14 is connected to the amplifier 50, and the amplifier 50 outputs the voltage _VS corresponding to the voltage V _FD of the voltage detection node 14 to the voltage adjustment circuit 51. On the other hand, although it is possible to omit the amplifier 50 and connect the voltage detection node 14 of the floating diffusion (FD) 13 directly to the voltage adjustment circuit 51, the floating diffusion (FD) 13 can be connected by inserting the voltage adjustment circuit 51. In order to prevent the capacity of the amplifier from increasing, it is desirable to insert the amplifier 50. When the amplifier 50 is used, the transistor 30 for driving the source follower SF and the constant current source _CI34 are omitted, and the output node (VS) of the amplifier 50 is directly selected on the drain side of the transistor (SEL) 32. You may connect to. That is, the amplifier 50 may be used as a pixel output circuit.

The voltage adjustment circuit 51 has a means for generating a voltage V _F applied to the photoelectric conversion film 10, and is based on the value of the output voltage V _S of the amplifier 50 (that is, based on the voltage V _F D of the voltage detection node 14). The voltage applied to the film V _F is adjusted so that the applied electric circuit of the photoelectric conversion film 10 becomes constant, and the voltage is output to the voltage application electrode 11 of the photoelectric conversion film 10.

FIG. 4 shows changes in each voltage and the like when voltage adjustment is performed by the voltage adjustment circuit 51. 4 (a) shows the output voltage _VS of the amplifier 50, FIG. 4 (b) shows the applied voltage V _F to the photoelectric conversion film 10, and FIG. 4 (c) shows the applied electric field E _F in the photoelectric conversion film 10. There is.

At the beginning of one frame period T, it is assumed that the output voltage VS of the amplifier 50 is V _{S 0} . V _{S 0} is the value of the amplifier output _VS when V _FD = V _RST . Considering the case where the signal charge is an electron, as the signal charge accumulates in the floating diffusion (FD) 13 due to light incident, the value of the voltage V _FD of the node 14 decreases, so that the value of the amplifier output _VS also decreases. It is assumed that V _S becomes V _{S 1} at the end of one frame period T. Here, in the voltage adjustment circuit 51, as shown in FIG. 4B, the value of the voltage V _F of the voltage application electrode 11 is changed from the initial value V _{F 0} to V _{F 1} according to the change of the above-mentioned amplifier output V _S. Decrease and output. Due to this effect, the electric field E _F applied to the photoelectric conversion film 10 is kept constant at E _{F 0} over the entire period as shown in FIG. 4 (c), and the light receiving sensitivity can be made constant. When the charge is not an electron but a hole, the positive / negative and the increase / decrease of the voltage may be reversed.

Regarding the setting of the voltage V _F of the voltage application electrode 11, the voltage V _F may be controlled so as to make the applied electric field E _F constant by utilizing the fact that the following equation holds.
_{E F} = (V _FD - _VF ) / d = ( _VS / α-VF) / d
(However, d is the film thickness, α is the conversion efficiency of the amplifier, and VS = _{αV FD} )

From this equation, in order to make the electric field E _F constant, V _S0 / α-V _F0 = V _S1 / α-V _F1 should hold.
V _F1 = (V _S1 -V _S0 ) / α + V _F0
Should be set.

It is desirable to adjust the voltage V _F of the voltage application electrode 11 for each pixel, but for the purpose of reducing the area of the voltage adjustment circuit 51 and the wiring, it may be performed for each block in which a plurality of pixels are grouped. In that case, the output of the amplifier 50 of a plurality of pixels may be input to one voltage adjustment circuit 51, and the V _F may be adjusted by using the average value of the output values V _S of each pixel. In that case, the voltage adjustment application voltage node V _F is not provided for each pixel but for each block in which a plurality of pixels are grouped.

(Second embodiment)
FIG. 5 shows an example of the signal processing circuit and the image pickup device of the second embodiment of the present invention. The signal processing circuit of the second embodiment uses a 1-bit type A / D conversion circuit.

The photomultiplier tube is a photomultiplier tube 10 that performs avalanche multiplication, and has the same structure as that described in the first embodiment. Each pixel includes a floating diffusion (FD) 13, a reset transistor ( _TRST ) 20, an amplifier 50, a voltage adjusting circuit 51, an inverter circuit (inverter chain) 60, and a counter circuit 70. Of these, the voltage detection node 14, the reset transistor 20, and the inverter circuit 60 form a pulse generation circuit, and generate a pulse corresponding to the amount of charge generated by the photoelectric conversion film 10 as an output (V _OUT ). Further, the pulse generation circuit and the counter circuit 70 constitute an A / D conversion circuit for the amount of signal charge. That is, the pulse generation circuit and the counter circuit 70 function as an output circuit that outputs a photoelectric conversion signal of each pixel.

In the present embodiment, the image pickup device is composed of a two-dimensional pixel array in which the pixels are repeated in the vertical direction and the horizontal direction. The output (photoelectric conversion signal) of each pixel can be read out by an arbitrary reading method such as an XY address method. Hereinafter, each component will be described.

In the photoelectric conversion film 10, an electric field E _F is generated in the film by the applied voltage between the voltage application electrode 11 (applied voltage node V _F ) and the photocharge collection electrode 12 (voltage detection node 14) provided for each pixel. And causes an avalanche multiplication of the charge. The generated charge (signal charge) flows through the floating diffusion (FD) 13.

The configuration / function of the floating diffusion (FD) 13 is the same as that of the first embodiment, and the potential V _FD of the voltage detection node 14 changes when the signal charge flows in. The voltage detection node 14 is connected to the amplifier 50 and the inverter circuit 60. Further, the output voltage _VS of the amplifier 50 is input to the voltage adjusting circuit 51.

The reset transistor (T _RST ) 20 is controlled by the output voltage (V _OUT ) of the inverter circuit 60, and by turning on (conducting), a reset voltage (V _RST ) is applied to the voltage detection node 14 of the floating diffusion 13. The reset transistor (T _RST ) 20 functions as a reset means for erasing the signal charge accumulated in the floating diffusion 13.

The inverter circuit (inverter chain) 60 is a multi-stage circuit in which inverters 61 to 63, which are inverting circuits, are connected in odd-numbered stages. Each inverter is composed of, for example, a CMOS inverter. The output of the inverter 63 at the final stage of the inverter chain 60 is output to the counter circuit 70 as the output (V _OUT ) of the pulse generation circuit and is input to the gate of the reset transistor (T _RST ) 20. The inverter circuit 60 functions as a kind of delay circuit, and contributes to the adjustment of the pulse width and the stabilization of the pulse generation operation. The first stage of the inverter circuit 60 may be configured by a comparator.

The counter circuit 70 counts the number of pulses at the output (V _OUT ) of the pulse generation circuit, and outputs a fixed bit value for each charge amount detection period (for example, one frame period). Also, after the bit value is read, it is reset. The counter circuit 70 is composed of, for example, 8 bits (8 1-bit counters), and each counter 71 to 78 switches the output of 1 and 0 at the rising edge (or falling edge) when a pulse is input, and is half of the input. Outputs the number of pulses of to the next counter. Therefore, the counter 71 is the 1st bit, the counter 72 is the 2nd bit, and the counter 78 is the 8th bit. The pulse is counted as an 8-bit counter, and the bit value is output as the counter output (O1 to O8). A reset terminal (CRST) is connected to the counter of all bits, and when the reset terminal CRST is at the High level, the value of the counter of each bit becomes 0, and when the reset terminal CRST is at the Low level, the normal counter operation is performed. Further, the 1st bit counter is provided with an enable terminal EN, and controls that the counter operates when the enable terminal EN is at the High level but does not operate at the Low level. If the 1st bit does not operate, it does not change after the 2nd bit, so counter control (count operation and stop) of all bits can be performed by the enable terminal EN. For example, by setting the enable terminal EN to Low and stopping the operation of the counter when reading the counter output, it is possible to prevent the exposure time between pixels from changing. The counter circuit 70 is not limited to the 1-bit counter, and for example, a 2-bit counter may be configured as one element. Further, if necessary, not only 8 bits but also a larger number of counters may be provided.

First, the operation of the signal processing circuit will be described.

For convenience of explanation, the reset of the floating diffusion 13 is completed, the potential V _FD of the voltage detection node 14 is the reset voltage (≈V _RST ), and the reset is started from the released state. The voltage V _FD is input to the input of the inverter 61 in the first stage of the inverter circuit 60, and since the V _FD is higher than the inverting voltage of the inverter 61 at this time, the output of the inverter 61 is Low. Therefore, the output of the final stage inverter 63 of the odd-numbered stage of the inverter circuit 60, that is, the output (V _OUT ) of the pulse generation circuit is also Low, and the reset transistor (T _RST ) 20 is in the OFF state.

Light is incident on the photoelectric conversion film 10, the generated charges (electrons) are accumulated in the floating diffusion (FD) 13, the voltage (V _FD ) of the voltage detection node 14 gradually decreases, and the inverting voltage (inverting voltage) of the inverter 61 ( When the inverting threshold voltage V _TH ) is reached, the output of the inverter 61 is inverted to High. This output change is transmitted by sequentially inverting the output of the odd-numbered stage inverter, and the output of the final stage inverter 63, that is, the output (V _OUT ) of the pulse generation circuit becomes High.

When the output (V _OUT ) of the pulse generation circuit becomes High, the reset transistor 20 is turned on (ON), a reset voltage (V _RST ) is applied to the electrodes of the voltage detection node 14, and the floating diffusion 13 is reset again. To.

When the floating diffusion 13 is reset, the input voltage V _FD of the inverter 61 becomes the reset voltage (≈V _RST ), and the output of the inverter 61 returns to Low. The output change of the inverter 61 is transmitted by sequentially inverting the inverter chain 60, and the output of the inverter 63 in the final stage, that is, the output (V _OUT ) of the pulse generation circuit becomes Low, and returns to the initial state. Through such a process, a pulse is generated at the output (V _OUT ).

After that, the above process is repeated, a plurality of pulses are generated, and the number of pulses is counted by the counter circuits 70 (counters 71 to 78). In this way, the digital signal corresponding to the generated charge amount is output from the counter circuit 70. The value of the counter of each pixel is read out by, for example, the XY address method. After reading the counter output (after the end of one frame period), the reset terminal CRST becomes High, and the value of the counter is reset to 0. After that, the reset terminal CRST is set to the Low level again, and the counting operation of the next frame is restarted.

Next, the operation of the voltage adjusting circuit 51 and the control of the voltage V _F applied to the photoelectric conversion film 10 will be described.

In FIG. 5, the voltage detection node 14 of the floating diffusion (FD) 13 is connected to the amplifier 50, and the amplifier 50 outputs the voltage _VS corresponding to the voltage V _FD of the node 14 to the voltage adjustment circuit 51. On the other hand, although it is possible to omit the amplifier 50 and connect the floating diffusion (FD) 13 directly to the voltage adjustment circuit 51, the capacity of the floating diffusion (FD) 13 increases due to the insertion of the voltage adjustment circuit 51. In order to prevent this, it is desirable to insert an amplifier 50. The voltage adjustment circuit 51 adjusts the film application voltage V _F according to the value of _VS and outputs the voltage to the voltage application electrode 11 of the photoelectric conversion film 10.

The operation of the voltage regulator circuit 51 is the same as that of the voltage regulator circuit 51 of FIG. 1 and corresponds to the output voltage _{VS of the amplifier 50 (that is, based on the voltage V FD of} the voltage detection node 14). The applied voltage V _F to 10 is controlled, and the applied electric circuit E _F in the photoelectric conversion film 10 is kept constant.

FIG. 6 shows changes in each voltage and the like when voltage adjustment is performed by the voltage adjustment circuit 51. 6 (a) shows the output voltage _VS of the amplifier 50, FIG. 6 (b) shows the applied voltage V _F to the photoelectric conversion film 10, and FIG. 6 (c) shows the applied electric field E _F in the photoelectric conversion film 10. There is.

In the first embodiment, the reset transistor (TR _ST ) 20 operates every frame period T, but in the second embodiment, each time the voltage of the voltage detection node 14 becomes the inverting voltage of the inverter circuit 60, The reset transistor (T _RST ) 20 operates. In the second embodiment, the charge accumulation period from the reset of the floating diffusion 13 to the generation of the next pulse is t, and the applied voltage V _F is controlled during this period t.

As shown in FIG. 6A, it is assumed that the output voltage VS of the amplifier 50 is V _{S 0} at the beginning of the period t. V _{S 0} is the value of the amplifier output _VS when V _FD = V _RST . Considering the case where the signal charge is an electron, the value of V _FD becomes smaller as the signal charge is accumulated in the FD 13 due to the incident of light, so that the value of the amplifier output _VS also becomes smaller. It is assumed that V _S becomes V _{S 1} at the end of the period t. Here, in the voltage adjustment circuit 51, as shown in FIG. 6B, the value of the voltage V _F of the voltage application electrode 11 is lowered from the initial value V _{F 0} to V _{F 1} according to the change of the amplifier output V _S. And output. Due to this effect, the electric field E _F applied to the photoelectric conversion film 10 is kept constant at E _{F 0} over the entire period as shown in FIG. 6 (c), and the light receiving sensitivity can be made constant.

In the conventional case where the applied voltage is not adjusted, as shown in FIG. 14, the film applied electric field E _F decreases with charge accumulation, and the sensitivity decreases during the charge accumulation period.

Regarding the setting of the applied voltage V _F , as in the first embodiment, V _F1 = (V _S1 -V _S0 ) / α + V _F0 (α is the conversion of the amplifier so that the film applied electric field E _F becomes constant. The applied voltage V _F may be set so that the efficiency) is satisfied.

In the second embodiment, the voltage detection node 14 is reset each time the inverter circuit 60 is inverted and a pulse is generated, so that the period t is considerably shorter than the one-frame period T. Therefore, the voltage fluctuation of the voltage V _FD and the amplifier output VS of the voltage detection node 14 in the period t is also _small . Therefore, in the second embodiment, the voltage width adjusted by the voltage adjusting circuit 51 is smaller than that in the first embodiment, and the voltage adjustment can be easily performed.

It is desirable to adjust the applied voltage V _F for each pixel, but for the purpose of reducing the area of the voltage adjustment circuit and wiring, it may be performed for each block in which a plurality of pixels are grouped. In that case, it is conceivable that the amplifier outputs of a plurality of pixels are input to one voltage adjustment circuit, and the V _F is adjusted by using the average value of the output values V _S of each pixel. In that case, the voltage adjustment application voltage node V _F is not provided for each pixel but for each block in which a plurality of pixels are grouped.

(Modified example of the second embodiment)
FIG. 7 is an example of a signal processing circuit and an image pickup device according to a modification of the second embodiment. The signal processing circuit of FIG. 7 corresponds to one pixel of the image pickup device, and constitutes a 1-bit type A / D conversion circuit as in FIG.

In the modified example of the second embodiment, the photoelectric conversion unit is a photomultiplier tube 10 that performs avalanche multiplication, and has the same structure as that described in the first and second embodiments. Each pixel has a floating diffusion (FD) 13, a reset transistor ( _TRST ) 20, an amplifier 50, a voltage adjustment circuit 51, an inverter circuit (inverter chain) 60, a counter circuit 70, and a counter output switch ( A SW) 80 and a memory 90 are provided.

In this modification, the counter output switch (SW) 80 and the memory 90 are added as compared with the second embodiment, and the other configurations and operations are the same. The added components will be described below.

The counter output switch (SW) 80 is provided corresponding to the output of each bit (71 to 78) of the counter circuit 70, and connects the counter circuit 70 and the memory 90.

The memory 90 corresponds to the number of bits of the counter circuit 70, and is composed of, for example, eight 1-bit memories. Each of the 1-bit memories 91 to 98 corresponds to the counters 71 to 78, respectively. When the switch 80 is conducted, the memory 90 (91 to 98) writes the output of the counter circuit 70, and outputs the written bit value as a memory output (O1 to O8) at a predetermined read timing. In FIG. 7, eight 1-bit memories are used as an example, but one memory with 8-bit inputs may be used as long as the 8-bit counter circuit output can be written at the same time. As the memory configuration, DRAM (Dynamic Random Access Memory) or SRAM (Static Random Access Memory) can be considered.

The operation of the modified example (FIG. 7) of the second embodiment will be described. Similar to the second embodiment (FIG. 5), the charge generated and multiplied by the photoelectric conversion film 10 is read out to the floating diffusion (FD) 13. The voltage detection node 14 of the floating diffusion (FD) 13 is connected to an odd number of inverter chains 60, and the output V _OUT each time the voltage V _FD of the voltage detection node 14 reaches the inverting threshold V _TH of the inverter. Becomes the High level. Then, the reset transistor _TR turns on and returns to the reset state, and this is repeated to generate a pulse. The number of pulse signals generated in one frame period is counted by a counter and read out.

An example of control of the counter circuit 70 will be described. CRST becomes High at the beginning of the frame, and each counter 71 to 78 is reset. After that, CRST becomes Low and pulse counting starts, and after the end of one frame period T, the control signal of the switch (SW) becomes High, the counter output switch (SW) 80 turns ON, and the values of all bits ( The value of the counter that counts the pulses generated in one frame period T) is written in the memory 90. Immediately after that, CRST becomes High, the counter circuit 70 is reset, CRST becomes Low, and pulse counting is restarted.

The memory outputs (O1 to O8) of each pixel are read out by, for example, the XY address method. The reading of the memory value shall be performed while the counter circuit 70 is in operation.

The memory 90 has a function as a frame memory, and the presence of the memory 90 allows the counter circuit 70 to perform pulse counting for the next period during the reading period of the memory value of each pixel, and constantly performs a pulse. It becomes possible to count. In the second embodiment, the pulse count is stopped during the read period of the counter by the signal of the enable terminal EN, but in this modification, the counter circuit 70 is reset immediately after the counter value is written to the memory 90. And the count can be restarted, and the time during the frame period T can be made as short as possible. Therefore, by mounting the memory 90, it is possible to accurately detect the amount of light (charge amount).

In the circuit of FIG. 7, the enable terminal (EN) is described in the counter 71, but in the modified example of the second embodiment, the counter output switch (SW) 80 is operated after the end of one frame period. Since the output of the counter circuit 70 can be instantly transferred to the memory 90, it is not necessary to stop the counter circuit 70. Therefore, it is also possible to delete the enable terminal (EN).

(Third embodiment)
An example of performing coded exposure as the signal processing circuit and the image pickup device of the third embodiment of the present invention is shown. An image pickup method called a coded exposure method is known in order to improve the performance of an image pickup device. The coded exposure method is a method in which an exposure pattern is coded in the time axis direction for shooting, and has effects such as correction of motion blur and blurring, and expansion of a dynamic range (Non-Patent Document 2).

In order to perform coded exposure, generally, light incident on the image sensor is transmitted / blocked at high speed. For that purpose, it is necessary to blink the illumination at high speed or to attach an element such as a liquid crystal shutter to the front of the camera lens to transmit / block the light. Therefore, there is a problem that the optical system becomes special and the system becomes complicated.

Further, instead of a special optical system, a transfer transistor or an overflow transistor is provided in the pixel of the image sensor to encode the signal pattern given to these gates, thereby transferring and discharging the accumulated charge for coding. A method of exposure has also been proposed (Patent Documents 3 and 4). However, since high-speed charge transfer / discharge is required multiple times due to coding, there is a problem that kTC noise due to the on / off operation of the transistor increases, and charge transfer corresponds to the time constant of the circuit. Since it takes time, there is a problem that the speed of coding is limited.

On the other hand, by using a photoelectric conversion film whose charge generation can be controlled by the applied voltage and coding the pattern of the film applied voltage ( _VF ) during one frame period, coded exposure becomes possible. For example, FIG. 8 shows an example of the pattern of the applied voltage ( _VF ) of the electrode 11 when the coded exposure is performed by the image pickup device of FIG. The pattern can be set in various ways according to the coding requirements, but it is desirable that the pattern is not a periodic square wave or the like so that the signal of a specific frequency in the input image is not lost. Here, it is _assumed that V _FA and V _FB are set so that "magnification when _VF = V _FA ">"magnification when VF = V _FB ". When the magnification is set to 0 when V _F = V _FB , the effect of blocking light can be obtained, and even when the magnification is made larger than 0 when V _F = V _FB to give sensitivity. The effect of coded exposure is obtained by the difference from the magnification when _VF = VF _A.

However, as described in FIG. 14, even if the film applied voltage (VF) is patterned without considering the accumulation of the signal charge in the floating diffusion ( _FD ) 13, the multiplication factor fluctuates and accurate coding is performed. Unable to perform exposure.

FIG. 9 shows changes in each voltage of the coded exposure when the voltage V _F of the voltage application electrode 11 is not adjusted. As shown in FIG. 9A, it is assumed that the input voltage V _S (= V _FD ) of the output transistor 30 is V _{S 0} at the beginning of the one frame period T. V _{S 0} is the value of V _S when V _FD = V _RST . As the signal charge (electrons) accumulates in the FD due to light incident, the value of V _FD decreases, so the value of _VS also decreases. It is assumed that V _S becomes V _{S 1} at the end of one frame period T. At this time, as shown in FIG. 9 (b), the electrode 11 of the photoelectric conversion film 10 may be encoded with the applied voltages _VF = V _FA (constant) and _{VF = V FB (} constant) as a coding pattern, as shown in FIG. 9 (c). As shown in the above, the electric field E _F applied to the photoelectric conversion film 10 decreases with charge accumulation, and the light receiving sensitivity decreases during the frame period. Therefore, it is not possible to obtain an accurate charge by coded exposure.

In the third embodiment, the coded exposure is performed by the image pickup device provided with the voltage adjusting circuit 51 of FIG. Since the signal processing circuit of the image pickup device is the same as that in FIG. 1, the description thereof will be omitted.

FIG. 10 shows changes in each voltage and the like of the coded exposure when the voltage of the voltage V _F is adjusted by the voltage adjusting circuit 51 of the present embodiment. As shown in FIG. 10A, at the beginning of the 1-frame period _T , the input voltage VS (= V _FD ) of the output transistor 30 was _{VS 0} , but due to the accumulation of signal charges (electrons), 1 At the end of the frame period T, V _S becomes V _{S 1} . At this time, as shown in FIG. 10B, the voltage adjustment circuit 51 of the present embodiment outputs a coding modulation pattern while lowering the voltage level of V _F according to the change of _VS. Due to this effect, as shown in FIG. 10 (c), the film-applied electric field E _F is modulated based on the two electric fields E _F0 and E _F1 over the entire period, and a desired coded exposure is possible. ..

The coding voltage pattern given to the voltage application electrode 11 ( _VF ) is not the same for all pixels, but the pattern may be changed for each pixel or for each block in which a plurality of pixels are grouped. By changing the coding pattern for each area (block or pixel), spatial coding is performed in addition to temporal coding, which has the effect of improving the resolution. Alternatively, a part of the area is subjected to normal exposure with _VF always set to a constant value (however, voltage adjustment is performed), and by mixing normal exposure and coded exposure pixels, all the pixels are coded exposed. It is possible to improve the light receiving sensitivity as compared with the case where the light is received.

In the coded exposure method according to the present embodiment, coding is realized by controlling the amount of charge generated in the photoelectric conversion film, and since there is no increase in circuit scale or signal transfer operation, noise is not increased. , High-definition of pixels is possible.

(Fourth Embodiment)
As the signal processing circuit and the image pickup element of the fourth embodiment of the present invention, it is encoded by the signal processing circuit of the second embodiment, that is, the signal processing circuit provided with the voltage adjusting circuit 51 shown in FIG. 5 or FIG. An example of performing exposure is shown. Since the signal processing circuit of the image pickup device is the same as that in FIGS. 5 and 7, the description thereof will be omitted.

As in the third embodiment, the coding pattern is V _FA and V _FB so that "magnification at the time of _VF = V _FA ">"magnification at the time of VF = V _FB " _. It shall be set. When the _{magnification} is set to 0 when V _F = V F B, the effect of blocking light can be obtained.

11 and 12 are used to show the operation of the voltage adjusting circuit 51 of the present embodiment. FIG. 12 shows a case where the voltage adjustment is performed corresponding to FIGS. 6 and 10, and FIG. 11 shows a case where the voltage adjustment is not performed (corresponding to FIG. 9) for comparison.

Here, when the V _S at the time of resetting the pulse generation circuit was V _{S 0} , the voltage of the floating diffusion (FD) 13 became the inverting threshold value of the inverter circuit due to the accumulation of signal charges (electrons) ( It is assumed that the value of _VS of (when V _FD = V _TH ) becomes _VS 1 and three pulses are generated in one frame period T. In FIGS. 11 and 12, the vertical broken line indicates the timing of pulse generation, and shows the state in which _VS is reset.

When the applied voltage is not adjusted, as shown in FIG. 11A, the value of V _FD decreases as the signal charge (electrons) accumulates in the _FD due to the incident of light, so the value of VS also decreases. Therefore, when the inverter circuit 60 is inverted, V _S becomes V _{S 1} . At this time, as shown in FIG. 11 (b), the electrode 11 of the photoelectric conversion film 10 may be coded with the applied voltages _VF = V _FA (constant) and _{VF = V FB (} constant) as a coding pattern, as shown in FIG. 11 (c). As shown in the above, the electric field E _F applied to the photoelectric conversion film 10 decreases with charge accumulation, and the desired coded exposure cannot be performed within the frame period.

FIG. 12 shows changes in each voltage of the coded exposure when the voltage of the voltage V _F is adjusted according to the change of V _S by the voltage adjusting circuit 51 of the present embodiment. That is, as shown in FIG. 12A, _{VS becomes V S1 when} the inverter circuit 60 is inverted. As shown in FIG. 12B, the voltage adjusting circuit 51 of the present embodiment outputs a coding modulation pattern while lowering the voltage level of V _F according to the change of V _S. Due to this effect, as shown in FIG. 12 (c), the film-applied electric field E _F is modulated based on the two electric fields E _F0 and E _F1 over the entire period, and a desired coded exposure is possible. ..

Similar to the third embodiment, the coding voltage pattern given to V _F is not the same for all pixels, but the pattern may be changed for each pixel or for each block in which a plurality of pixels are grouped. By changing the coding pattern for each area (block or pixel), spatial coding is performed in addition to temporal coding, which has the effect of improving the resolution. Alternatively, a part of the area is subjected to normal exposure with _VF always set to a constant value (however, voltage adjustment is performed), and by mixing normal exposure and coded exposure pixels, all the pixels are coded exposed. It is possible to improve the light receiving sensitivity as compared with the case where the light is received.

In the coded exposure method according to the present embodiment, coding is realized by controlling the amount of charge generated in the photoelectric conversion film, and since there is no increase in circuit scale or signal transfer operation, noise is not increased. , High-definition of pixels is possible. In the fourth embodiment, as compared with the third embodiment, the interval at which the voltage detection node 14 is reset is short, and the voltage width adjusted by the voltage adjusting circuit 51 is small, so that the voltage adjustment can be easily performed. be able to.

In each embodiment of the present invention, since the supply of the voltage V _F is changed for each pixel or block, there is a concern that the pixel and element areas may increase due to the plurality of wirings. Therefore, the photoelectric conversion film may be laminated on the signal processing circuit, and the components constituting the signal processing circuit may be provided in different layers (divided into a plurality of layers) to form a three-dimensional structure. For example, it is conceivable to arrange a voltage adjustment circuit for supplying a _VF signal and a wiring board under the board on which the pixel array is arranged. Further, in the second embodiment, the pulse generation circuit and the counter circuit of each pixel may be arranged on different substrates.

In each of the above embodiments, the configuration and operation of the image pickup device and its signal processing circuit have been described, but the present invention is not limited to this, and may be configured as a signal processing method of the image pickup device. That is, it may be configured as a method of processing a photoelectric conversion signal according to the flow of data in the figure of each embodiment.

Although the above embodiments have been described as typical examples, it will be apparent to those skilled in the art that many modifications and substitutions can be made within the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited by the above-described embodiments, and various modifications and modifications can be made without departing from the scope of claims. For example, it is possible to combine the plurality of constituent blocks described in the embodiment into one, or to divide one constituent block into one.

10 Photoelectric conversion film 11 Voltage application electrode 12 Photocharge collection electrode 13 Floating diffusion 14 Voltage detection node 20 Reset transistor 30 Output transistor 31 Row selection line 32 Selection transistor 33 Vertical signal line 34 Constant current source 40 Output conversion circuit 41 Noise reduction circuit 42 A / D conversion circuit 50 Amplifier 51 Voltage adjustment circuit 60 Inverter circuit 70 Counter circuit 80 Counter output switch 90 Memory

Claims (9)

It is a signal processing circuit of an image pickup device provided with a photoelectric conversion film whose light receiving sensitivity changes depending on an applied electric field.
A voltage detection node that is connected to the photoelectric conversion film and generates a voltage corresponding to the amount of charge generated by the photoelectric conversion film.
An output circuit that outputs a photoelectric conversion signal for each pixel based on the voltage of the voltage detection node.
A signal processing circuit comprising a voltage adjusting circuit for adjusting the applied voltage of the photoelectric conversion film so that the applied electric field becomes constant based on the voltage of the voltage detection node. In the signal processing circuit according to claim 1,
The output circuit is a signal processing circuit including at least one of an output transistor and an amplifier. In the signal processing circuit according to claim 1,
The output circuit includes an inverter circuit into which the voltage of the voltage detection node is input, a reset means for using the voltage of the voltage detection node as a reset voltage based on the output of the inverter circuit, and a pulse output by the inverter circuit. A signal processing circuit comprising a counter circuit for counting. In the signal processing circuit according to claim 3,
A signal processing circuit further comprising a memory corresponding to the number of bits of the counter circuit and a counter output switch connecting the counter circuit and the memory. In the signal processing circuit according to any one of claims 1 to 4.
The voltage adjusting circuit is a signal processing circuit, characterized in that the applied voltage is generated in a coded pattern and coded exposure is performed. A photoelectric conversion film whose light-receiving sensitivity changes depending on the applied electric field,
An image pickup device comprising the signal processing circuit according to any one of claims 1 to 5. In the image pickup device according to claim 6,
The photoelectric conversion film is an image pickup element, which is a photoelectric conversion film capable of multiplying an avalanche. In the image pickup device according to claim 6 or 7.
An image pickup device, characterized in that the applied voltage is set for each pixel block including a plurality of pixels. The image pickup device according to any one of claims 6 to 8.
An image pickup device characterized in that the photoelectric conversion film is laminated on the signal processing circuit and the components constituting the signal processing circuit are provided in different layers to form a three-dimensional structure.

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