JP2021170323A - Constant voltage power circuit - Google Patents

Abstract

To make it possible to improve load regulation characteristics including a light load period with less output current.SOLUTION: A constant voltage power circuit comprises: a PMOS-type transistor MP1 that has a source connected with a first power terminal 1 and a drain connected with an output terminal 3, and obtains a predetermined output voltage; an error amplifier 6 that has a non-inverting input terminal 62 connected with an output voltage detection circuit 7, an inverting input terminal 61 connected with a reference voltage source 5, and an output terminal 63 connected to a gate of the transistor MP1, and supplies a voltage proportional to the difference between the output voltage and a reference voltage to the gate of the transistor MP1; a positive feedback circuit 8 that includes a PMOS-type transistor MP2 in which the transistor MP1 and a source are connected with each other, and feeds back a voltage according to an output current from the transistor MP1 to the gate of the transistor MP1; and a bias circuit 9 that is provided between an output terminal of the error amplifier 6 and the positive feedback circuit 8 and supplies a bias voltage to a gate of the transistor MP2.SELECTED DRAWING: Figure 1

Description

The present invention relates to a constant voltage power supply circuit capable of supplying a predetermined output voltage.

As a power supply circuit capable of supplying a predetermined output voltage, for example, a constant voltage power supply circuit composed of a regulator circuit or the like is used.

As a conventional example of a constant voltage power supply circuit, for example, Patent Document 1 discloses a constant voltage power supply circuit that limits the internal current consumption at startup or overload to suppress the occurrence of overshoot.

JP-A-2010-079653

In the constant voltage power supply circuit, improvement of the fluctuation characteristic of the output voltage with respect to the output current, that is, the so-called load regulation characteristic, is an issue. Recently, in order to extend the operating time of devices such as battery-powered devices equipped with a constant-voltage power supply circuit, the current consumption of the constant-voltage power supply circuit has been reduced year by year. In such a situation, the output voltage drops significantly with respect to the output current, especially when the load is light with a small output current, so that the load regulation characteristics are required to be improved.

An object of the present invention is to provide a constant voltage power supply circuit capable of improving load regulation characteristics even at a light load with a small output current.

In the present invention, the source is connected to the first power supply, the first conductive type first transistor that obtains a predetermined output voltage from the drain, and the voltage proportional to the difference between the output voltage and the reference voltage of the first transistor. An error amplifier supplied to the gate and a first conductive type second transistor in which the first transistor and the source are interconnected are included, and a voltage corresponding to the output current of the first transistor is applied to the gate of the first transistor. Provided is a constant voltage power supply circuit including a positive feedback circuit for feedback and a bias circuit provided between the output end of the error amplifier and the positive feedback circuit to supply a bias voltage to the gate of the second transistor. do.

Further, the present invention is the above-mentioned constant voltage power supply circuit, and the positive feedback circuit includes the second transistor and a second conductive type third transistor and a fourth transistor constituting a current mirror. Provided is a constant voltage power supply circuit in which the drain and gate of the third transistor are connected to the drain of the second transistor, and the drain of the fourth transistor is connected to the output end of the error amplifier.

Further, the present invention is the above-mentioned constant voltage power supply circuit, in which the bias circuit is a second conductive type fifth in which a gate is connected to the output end of the error amplifier and the drain is connected to the first power supply. Provided is a constant voltage power supply circuit that includes a transistor and in which the gate of the second transistor is connected to the source of the fifth transistor.

The present invention also provides the constant voltage power supply circuit, wherein the bias voltage supplied by the bias circuit increases as the output current of the first transistor increases. ..

Further, the present invention is the above-mentioned constant voltage power supply circuit, in which the bias circuit is a second conductive type fifth with a gate connected to the output end of the error amplifier and a drain connected to the first power supply. The transistor is connected in series with the fifth transistor, the first current source for supplying a constant current to the drain of the fifth transistor, and the first current source are connected in parallel, and the output current is connected to the fifth transistor. Provided is a constant voltage power supply circuit that includes a second current source that supplies a current proportional to the current, and the gate of the second transistor is connected to the source of the fifth transistor.

According to the present invention, it is possible to provide a constant voltage power supply circuit capable of improving load regulation characteristics even at a light load with a small output current.

It is a circuit diagram which shows the structure of the constant voltage power supply circuit of 1st Embodiment. It is a characteristic figure which shows an example of the change of the drain current characteristic by the presence or absence of a bias voltage in a transistor MP2. It is a circuit diagram which shows the specific configuration example of the constant voltage power supply circuit of 1st Embodiment. It is a characteristic figure which shows an example of the output voltage characteristic in this embodiment. It is a circuit diagram which shows the structure of the constant voltage power supply circuit of 2nd Embodiment. It is a circuit diagram which shows the structure of the constant voltage power supply circuit of 3rd Embodiment. It is a circuit diagram which shows the structure of the constant voltage power supply circuit of 4th Embodiment. It is a circuit diagram which shows the structure of the constant voltage power supply circuit of 5th Embodiment. It is a characteristic diagram which shows an example of the change of the drain current characteristic by the presence / absence of a bias voltage in a transistor MP2, and the increase. It is a circuit diagram which shows the specific structural example of the constant voltage power supply circuit of 5th Embodiment. It is a characteristic figure which shows an example of the output voltage characteristic in 5th Embodiment. It is a circuit diagram which shows the structure of the constant voltage power supply circuit of the comparative example.

Hereinafter, an embodiment in which the constant voltage power supply circuit according to the present invention is specifically disclosed (hereinafter, referred to as “the present embodiment”) will be described in detail with reference to the drawings.

(Background to this embodiment)
First, an example of a conventional constant voltage power supply circuit will be described as a comparative example.

FIG. 12 is a circuit diagram showing a configuration of a constant voltage power supply circuit of a comparative example. The constant voltage power supply circuit 50 includes a first power supply terminal 51, a second power supply terminal 52, an output terminal 53, a current source 54, a reference voltage source 55, and an error amplifier 56. A first power supply voltage VDD as a high-potential power supply is applied to the first power supply terminal 51. A second power supply voltage VSS (VSS <VDD) as a low-potential power supply is applied to the second power supply terminal 52. The output terminal 53 outputs the output voltage VREG as the output of the power supply circuit.

The constant voltage power supply circuit 50 has an error amplifier 56 composed of transistors MN4, MN5, MN6, MP3, and MP4. The error amplifier 56 has a differential circuit composed of NMOS-type transistors MN4, MN5, and MN6, and an active load of the differential circuit composed of MOSFET-type transistors MP3 and MP4 connected to the current mirror. Further, it has an NMOS type transistor MN7 connected to the transistor MN6 in a current mirror. In the transistor MN7, the gate and drain are connected to the current source 54, and the current IS of the current source 54 is supplied to the transistor MN6 as a bias current.

In the error amplifier 56, a reference voltage source 55 that supplies a reference voltage VR is connected to the inverting input terminal 561, and an output voltage detection circuit 57 is connected to the non-inverting input terminal 562. The gate of the epitaxial-type transistor MP1 for output is connected to the output end 563 of the error amplifier 56. The source of the transistor MP1 is connected to the first power supply terminal 51, and the drain is connected to the output terminal 53 and the output voltage detection circuit 57. The output voltage detection circuit 57 is composed of resistors R3 and R4 connected in series between the output terminal 53 and the second power supply terminal 52, and the common connection point of the resistors R3 and R4 is the non-inverting input terminal 562 of the error amplifier 56. It is connected to and detects the output voltage VREG. In the constant voltage power supply circuit 50, the difference between the reference voltage VR of the reference voltage source 55 and the feedback signal voltage obtained by dividing the output voltage by the resistors R3 and R4 is amplified by the error amplifier 56 and used for output. The output voltage VREG becomes a predetermined value when applied to the transistor MP1.

The constant voltage power supply circuit 50 includes a positive feedback circuit 58 including a MOSFET type transistor MP2 and an NMOS type transistors MN1 and MN2. The source of the transistor MP2 is connected to the first power supply terminal 51, and the gate is connected to the output end 563 of the error amplifier 56. The transistors MN1 and MN2 form a current mirror, the gate and drain of the transistor MN1 are connected to the drain of the transistor MP2, the drain of the transistor MN2 is connected to the output end 563 of the error amplifier 56, and the drain current of the transistor MP2 is transferred to the transistor. Mirror to the drain of MN2.

In the constant voltage power supply circuit 50 configured as described above, a drain current proportional to the output current flows through the drain of the transistor MP2 of the positive feedback circuit 58 according to the output current flowing through the drain of the transistor MP1. Further, in the positive feedback circuit 58, a current proportional to the drain current of the transistor MP2 is mirrored by the drain of the transistor MN2. Therefore, at the output terminal 563 of the error amplifier 56, a current proportional to the output current of the transistor MP1 is drawn by the transistor MN2, and the output characteristics of the error amplifier 56 transition. By providing the positive feedback circuit 58, the gain of the positive feedback circuit 58 is added in addition to the gain originally possessed by the error amplifier 56, and the gate voltage can be changed according to the output voltage of the transistor MP1 to load the output voltage. The regulation characteristics can be improved.

In the configuration of FIG. 12, under a normal load in which the output current is large, the transistor MP1 operates in the strong inversion region, and the drain current of the transistor MP2 is also sufficiently large, so that the positive feedback circuit 58 greatly improves the load regulation characteristic. However, when the output current is low and the load is light, the transistor MP1 operates in the subthreshold region (weakly inverted region), and the drain current of the transistor MP2 becomes very small, so that the effect of the positive feedback circuit 58 cannot be sufficiently obtained. There is a problem.

In this embodiment, in view of the above circumstances, a configuration example of a constant voltage power supply circuit capable of improving the load regulation characteristic in a region where the output current is small is shown.

(First Embodiment)
FIG. 1 is a circuit diagram showing a configuration of a constant voltage power supply circuit according to the first embodiment. The constant voltage power supply circuit 10 of the present embodiment has a first power supply terminal (VDD) 1, a second power supply terminal (VSS) 2, an output terminal (VREG) 3, a current source (IS) 4, and a reference voltage source (VR) 5. , Has an error amplifier 6. A first power supply voltage VDD as a high-potential power supply, which is a first power supply, is applied to the first power supply terminal 1. A second power supply voltage VSS (VSS <VDD) as a low-potential power supply, which is a second power supply, is applied to the second power supply terminal 2. The output terminal 3 outputs the output voltage VREG as the output of the power supply circuit. The current source 4 is a current source that is connected to the first power supply terminal 1 and supplies the current IS. The reference voltage source 5 is a voltage source that supplies the reference voltage VR.

The constant voltage power supply circuit 10 includes an error amplifier 6 including an NMOS type transistors ( The transistors MN4, MN5, and MN6 form a differential circuit. The transistors MP3 and MP4 are connected to the current mirror and form an active load of the differential circuit by the transistors MN4 to MN6. Further, it has an NMOS type transistor MN7 connected to the transistor MN6 in a current mirror. In the transistor MN7, the gate and drain are connected to the current source 4, and the current IS of the current source 4 is supplied to the transistor MN6 as a bias current.

In the error amplifier 6, the reference voltage source 5 is connected to the inverting input terminal 61, and the output voltage detection circuit 7 is connected to the non-inverting input terminal 62. The gate of the epitaxial transistor MP1 which is an output transistor is connected to the output terminal 63 of the error amplifier 6. The transistor MP1 corresponds to the first conductive type first transistor, the source is connected to the first power supply terminal 1, the drain is connected to the output terminal 3 and the output voltage detection circuit 7, and a predetermined output voltage is obtained from the drain. .. The output voltage detection circuit 7 is composed of resistors R3 and R4 connected in series between the output terminal 3 and the second power supply terminal 2, and the common connection point of the resistors R3 and R4 is the non-inverting input terminal 62 of the error amplifier 6. It is connected to and detects the output voltage VREG. The error amplifier 6 supplies a voltage proportional to the difference between the output voltage VREG and the reference voltage VR to the gate of the transistor MP1.

In this way, in the constant voltage power supply circuit 10, the difference between the reference voltage VR of the reference voltage source 5 and the feedback signal voltage obtained by dividing the output voltage by the resistors R3 and R4 is amplified by the error amplifier 6. , Is applied to the output transistor MP1. As a result, the difference between the reference voltage and the feedback signal voltage is controlled to be zero, and the output voltage VREG is configured to be a constant voltage of a predetermined value.

The constant voltage power supply circuit 10 includes a positive feedback circuit 8 including a MOSFET type transistor MP2 and an NMOS type transistors MN1 and MN2. The transistor MP2 corresponds to a first conductive type second transistor, and the transistor MP1 and the source are connected to each other, and the gate is connected to the output terminal 63 of the error amplifier 6 via a bias circuit 9 described later. The transistor MN1 corresponds to a second conductive type third transistor, and the gate and drain are connected to the drain of the transistor MP2, and the source is connected to the second power supply terminal 2. The transistor MN2 corresponds to the second conductive type fourth transistor, the drain is connected to the output terminal 63 of the error amplifier 6, the gate is connected to the gate of the transistor MN1, and the source is connected to the second power supply terminal 2. There is. These transistors MN1 and MN2 form a current mirror, and the drain current of the transistor MP2 is mirrored to the drain of the transistor MN2.

In the constant voltage power supply circuit 10, a drain current proportional to the output current flows through the drain of the transistor MP2 of the positive feedback circuit 8 according to the output current flowing through the drain of the transistor MP1. Further, in the positive feedback circuit 8, a current proportional to the drain current of the transistor MP2 is mirrored by the drain of the transistor MN2.

The transistor MP2 has the same gate length as the transistor MP1, and the ratio of the gate widths of the transistors MP2 and MP1 is set to MP2: MP1 = 1: n (n> 1). When the bias voltage is not applied to the transistor MP2, the gate-source voltage of the transistors MP2 and MP1 is common, so that the drain current of the transistor MP2 is 1 / n of the drain current of the transistor MP1.

The gate width ratio of the transistors MN1 and MN2 of the positive feedback circuit 8 is set to MN1: MN2 = m: 1 (m is a positive value). Therefore, when the drain of the transistor MN2 is connected to the output terminal 63 of the error amplifier 6, the transistor MN2 draws a current of 1 / (m × n) of the output current amount of the transistor MP1 from the output terminal 63 of the error amplifier 6. , The output characteristic of the error amplifier 6 can be largely changed. As a result, since the gain of the positive feedback circuit 8 is added in addition to the gain originally possessed by the error amplifier 6, the gate voltage can be changed according to the output voltage of the transistor MP1, and the load regulation characteristic can be improved.

In the case of no load with no output current, the transistor MP1 supplies only the current flowing through the resistors R3 and R4. When low current consumption is required for the constant voltage power supply circuit, resistors R3 and R4 with a high resistance value of several MΩ are used. At this time, the transistor MP1 that drives the load is controlled by the error amplifier 6 so as to operate in the subthreshold region (weakly inverted region). When the output current gradually increases, the transistor MP1 shifts to the operation in the strong inversion region.

In the output voltage VREG of the constant voltage power supply circuit 10, the transistor MP1 operates in the subthreshold region (weakly inverted region) in the light load region where the output current is small, so that the voltage fluctuates greatly. When the output current increases further, the operation is performed in the strong inversion region, the output voltage VREG shifts to the characteristic of being squared with respect to the output current, and follows a trajectory in which the voltage drops.

The output voltage characteristic of the constant voltage power supply circuit 10 can be expressed as a load regulation characteristic, and the load regulation characteristic is expressed by the degree of downward inclination of the output voltage VREG between arbitrary two points I1 and I2 of the output current. Generally, it is defined by the following equation (1).

In the above equation, VR1: the output voltage when the output current is I1, and VR2: the output voltage when the output current is I2. The load regulation characteristic is used as one of the performance indexes of the constant voltage power supply circuit, and the quality of this characteristic is an important factor in circuit selection. In order to improve the load regulation characteristics over the entire region of the output current, it is desirable that the value of LR in the equation (1) is small.

The constant voltage power supply circuit 10 of the present embodiment includes a bias circuit 9 for applying a bias voltage VB between the gate of the transistor MP2 in the positive feedback circuit 8 and the output terminal 63 of the error amplifier 6. The bias circuit 9 functions as a constant voltage source, and by applying a bias voltage VB to the gate of the transistor MP2 from the bias circuit 9 and biasing in the forward direction, it is possible to flow a drain current of a predetermined amount or more through the transistor MP2. Become.

FIG. 2 is a characteristic diagram showing an example of a change in drain current characteristics depending on the presence or absence of a bias voltage in the transistor MP2. FIG. 2 shows a change in the drain current of the transistor MP2 with respect to the output current of the constant voltage power supply circuit 10. When no bias voltage is applied, the drain current flows through the transistor MP2 in proportion to the output current as shown by the broken line. When a bias voltage is applied, the transistor MP2 has a large drain current flowing in a region where the output current is small as shown by the characteristics shown by the solid line.

FIG. 3 is a circuit diagram showing a specific configuration example of the constant voltage power supply circuit of the first embodiment. The constant voltage power supply circuit 10A of FIG. 3 shows a specific circuit configuration example of the bias circuit 9. Here, the parts different from the configuration of the constant voltage power supply circuit 10 shown in FIG. 1 will be mainly described, and the same components will be designated by the same reference numerals and the description thereof will be omitted.

The bias circuit 9 includes NMOS-type transistors MN8 and MN9. The transistor MN8 functions as a first current source, is connected to the transistors MN6 and MN7 in a current mirror, and supplies the current IS (constant current) of the current source 4 to the transistor MN9. The transistor MN9 corresponds to a second conductive type fifth transistor, and is provided between the gate of the transistor MP2 and the output terminal 63 of the error amplifier 6. Specifically, the gate of the transistor MN9 is connected to the output terminal 63 of the error amplifier 6, the drain is connected to the first power supply terminal 1, and the source of the transistor MN9 and the drain of the transistor MN8 are connected to each other. The gate of the transistor MP2 is connected to the connection point between the source of the transistor MN9 and the drain of the transistor MN8.

In the configuration of FIG. 3, the gate-source voltage of the transistor MP1 is Vgs1, and the gate-source voltage of the transistor MP2 is Vgs2. The gate-source voltage of the transistor MN9 of the bias circuit 9 corresponds to the bias voltage VB. By providing the bias circuit 9 and applying the bias voltage VB, the voltage at the gate of the transistor MP2 of the positive feedback circuit 8 becomes lower than the voltage at the output terminal 63 of the error amplifier 6. Specifically, the gate-source voltage Vgs2 of the transistor MP2 is larger by the gate-source voltage of Vgs2 = Vgs1 + VB and the transistor MN9, and Vgs2> Vgs1. Therefore, the gate of the transistor MP2 is higher than the gate voltage of the transistor MP1. The voltage is lower. Therefore, the drain current of the transistor MP2 increases as compared with the case where the bias voltage is not applied. At this time, the drain current of the transistor MP2 is 1 / n + α of the drain current of the transistor MP1 (α is a current increased by applying a bias voltage).

FIG. 4 is a characteristic diagram showing an example of the output voltage characteristic in the present embodiment. In FIG. 4, the solid line shows the change in the output voltage with respect to the output current in the configuration of the present embodiment shown in FIGS. 1 and 3, and the broken line shows the change in the output voltage with respect to the output current in the configuration of the comparative example shown in FIG. Shown.

In the comparative example, since the transistor MP1 operates in the subthreshold region (weakly inverted region) in the region where the output current is small, the output voltage drops significantly. On the other hand, in the configuration of the present embodiment, by providing the bias circuit 9, the gain of the positive feedback circuit 8 is increased in addition to the gain of the error amplifier 6 as in the case of a normal load even when the output current is small and the load is light. In addition, the gate voltage of the transistor MP1 can be changed. Therefore, the drain current of the transistor MP2 can flow by a predetermined amount or more in the region where the output current is small, and the error amplifier 6 can be corrected even in the region where the output current is small. Therefore, the voltage drop of the output voltage can be improved to a significantly gentle characteristic.

In the output voltage characteristic of FIG. 4, the value VR2 of the output voltage at the point where the output current becomes I2 increases from VR2b of the comparative example to VR2a of the present embodiment, and the load regulation characteristic LR is the load regulation characteristic LR of the comparative example. It is improved from LRb to LRa of this embodiment. As described above, according to the present embodiment, the load regulation characteristic can be further improved in the entire region of the output current. In particular, it is possible to suppress fluctuations in the output voltage at the time of a light load with a small output current, and it is possible to improve the load regulation characteristics in the entire region of the output current.

(Second Embodiment)
FIG. 5 is a circuit diagram showing the configuration of the constant voltage power supply circuit of the second embodiment. In the constant voltage power supply circuit 10B of the second embodiment, in addition to the configuration of the constant voltage power supply circuit 10A of the first embodiment, in the positive feedback circuit 8B, between the drain of the transistor MP2 and the drain of the transistor MN1. A resistor R1 as a first resistance element is provided. Here, the parts different from the configuration of the constant voltage power supply circuit 10A shown in FIG. 3 will be mainly described, and the same components will be designated by the same reference numerals and the description thereof will be omitted.

The constant voltage power supply circuit 10A of the first embodiment has a configuration in which positive feedback is applied to the output terminal 63 of the error amplifier 6 by the current generated from the voltage of the output terminal 63 of the error amplifier 6. Therefore, depending on the amount of feedback, there may be a risk of oscillation.

In the constant voltage power supply circuit 10B of the second embodiment, in the positive feedback circuit 8B, a resistor R1 is inserted between the drain of the transistor MP2 and the drain of the transistor MN1 to limit the amount of feedback of the positive feedback circuit 8B. This resistor R1 reduces the amount of feedback to the output terminal 63 of the error amplifier 6 when the output current of the transistor MP1 increases and the drain current of the transistor MP2 increases significantly, reducing the risk of oscillation. As described above, according to the present embodiment, the load regulation characteristic in the region where the output current is small can be improved, and the oscillation due to the positive feedback can be suppressed.

(Third Embodiment)
FIG. 6 is a circuit diagram showing a configuration of a constant voltage power supply circuit according to a third embodiment. The constant voltage power supply circuit 10C of the third embodiment is another configuration example in which the resistor R1 of the constant voltage power supply circuit 10B of the second embodiment is replaced. Here, the parts different from the configuration of the constant voltage power supply circuit 10B shown in FIG. 5 will be mainly described, and the same components will be designated by the same reference numerals and the description thereof will be omitted.

In the constant voltage power supply circuit 10C, in the positive feedback circuit 8C, a transistor MN3 having a gate and a source connected is provided between the drain of the transistor MP2 and the drain of the transistor MN1. The transistor MN3 corresponds to a second conductive type depletion type transistor, and is composed of an NMOS type depletion transistor. In the transistor MN3, the drain is connected to the drain of the transistor MP2, the gate and the source are connected to the drain of the transistor MN1, and the back gate is connected to the source and the back gate of the transistor MN1.

If the risk of oscillation cannot be reduced even with the configuration in which the resistor R1 is inserted and connected to the positive feedback circuit 8B as in the second embodiment, the resistor R1 is used as in the positive feedback circuit 8C of the third embodiment. Instead, the transistor MN3 is inserted and connected. When the drain current flowing through the transistor MP2 increases, the drain voltage of the transistor MN3 rises, so that the potential difference between the source and back gate of the transistor MN3 increases. As a result, due to the back gate effect of the transistor MN3, the threshold voltage thereof becomes high, and the resistance between the drain and the source becomes higher. As a result, when the transistor MP1 passes a large output current, the amount of feedback to the error amplifier 6 can be further reduced. Therefore, according to the present embodiment, the load regulation characteristic in the region where the output current is small can be improved, and the risk of oscillation due to the positive feedback can be further reduced.

(Fourth Embodiment)
FIG. 7 is a circuit diagram showing a configuration of a constant voltage power supply circuit according to a fourth embodiment. In the constant voltage power supply circuit 10D of the fourth embodiment, in addition to the configuration of the constant voltage power supply circuit 10A of the first embodiment, in the positive feedback circuit 8D, the source and back gate of the transistor MN2 on the output side and the second power supply A resistor R2 as a second resistance element is provided between the terminal 2 and the terminal 2. Here, the parts different from the configuration of the constant voltage power supply circuit 10A shown in FIG. 3 will be mainly described, and the same components will be designated by the same reference numerals and the description thereof will be omitted.

In the constant voltage power supply circuit 10D, in the positive feedback circuit 8D, a resistor R2 is inserted between the source and back gate of the transistor MN2 and the second power supply terminal 2 to limit the current flowing through the transistor MN2. Even in such a configuration, similar to the constant voltage power supply circuit 10B of the second embodiment and the constant voltage power supply circuit 10C of the third embodiment, when the transistor MP1 passes a large output current, the error amplifier 6 is supplied. The amount of feedback can be reduced. Therefore, according to the present embodiment, it is possible to improve the load regulation characteristic in the region where the output current is small, and it is possible to suppress the oscillation due to the positive feedback.

(Fifth Embodiment)
FIG. 8 is a circuit diagram showing a configuration of a constant voltage power supply circuit according to a fifth embodiment. The constant voltage power supply circuit 10E of the fifth embodiment is provided with a bias circuit 9E in place of the bias circuit 9 constituting the constant voltage power supply circuit 10 of the first embodiment. The bias circuit 9E of the fifth embodiment is configured so that the bias voltage VB increases as the output current increases. Specifically, a transistor MP5 connected to the transistor MP1 in a current mirror is provided. A drain current proportional to the output current flowing through the drain of the transistor MP1 flows through the transistor MP5. The bias voltage VB increases as the drain current of the transistor MP5 increases.

In the error amplifier 6 described above, the voltage difference (offset) between the input terminals 61 and 62 increased as the output current increased, whereby the output voltage VREG decreased. According to the fifth embodiment, as the output current increases, the amount of current (offset correction amount) drawn from the output terminal 63 of the error amplifier 6 by the positive feedback circuit 8 can be increased as compared with the first embodiment. Therefore, the amount of change in the output voltage with respect to the output current can be further reduced.

FIG. 9 is a characteristic diagram showing an example of a change in the drain current characteristic due to the presence / absence and increase of the bias voltage in the transistor MP2. As shown in the figure, when the bias voltage is not applied, the drain current flows in the transistor MP2 in proportion to the output current as shown by the alternate long and short dash line. When a constant bias voltage is applied, the transistor MP2 causes a large amount of drain current to flow in the region where the output current is small, as shown by the characteristic shown by the broken line, but compared to the case where no bias is applied in the region where the output current is large. The amount of increase in drain current with respect to the increase in output current decreases. When the bias voltage is increased according to the increase in the output current, the transistor MP2 has a large drain current flowing in a region where the output current is small, as in the case of applying a constant bias voltage, as shown by the characteristics shown by the solid line. become. Further, in the region where the output current is large, the drain current flows in proportion to the output current in almost the same manner as when no bias is applied.

FIG. 10 is a circuit diagram showing a specific configuration example of the constant voltage power supply circuit of the fifth embodiment. The constant voltage power supply circuit 10F of FIG. 10 shows a specific circuit example of the bias circuit 9E. Here, the parts different from the configuration of the constant voltage power supply circuit 10E shown in FIG. 8 will be mainly described, and the same components will be designated by the same reference numerals and the description thereof will be omitted.

The bias circuit 9E includes an NMOS type transistors MN8, MN9, MN10, MN11 and a MOSFET type transistor MP5. Since the connection of the transistors MN8 and MN9 is the same as that of the embodiment shown in FIG. 3 described above, detailed description thereof will be omitted here.

The transistors MP5, MN10, and MN11 function as a second current source that supplies a current proportional to the output current to the drain of the transistor MN9. In the transistor MP5, the transistor MP1 and the source and gate are connected to each other, and a drain current proportional to the output current flowing through the drain of the transistor MP1 flows. The transistors MN10 and MN11 are connected to the current mirror. In the transistor MN10, the gate and drain are connected to the drain of the transistor MP5, and the source is connected to the second power supply voltage VSS. In the transistor MN11, the transistor MN10 and the gate are connected to each other, the source is connected to the second power supply voltage VSS, and the drain is connected to the source of the transistor MN9 and the drain of the transistor MN8. As described above, in the constant voltage power supply circuit 10F of FIG. 10, the second current source is connected in parallel with the first current source.

With the above configuration, the drain current proportional to the output current of the transistor MP5 is mirrored to the drain of the transistor MN11. The drain current of the transistor MN9 is a combination of the constant current IS mirrored by the transistor MN8 and the current proportional to the output current mirrored by the transistor MN11. As a result, the gate-source voltage of the transistor MN9, which is the bias voltage VB, becomes a voltage proportional to both the constant current IS and the output current, and the bias voltage VB can be increased as the output current increases.

FIG. 11 is a characteristic diagram showing an example of the output voltage characteristic in the fifth embodiment. In FIG. 11, the solid line indicates the change in the output voltage with respect to the output current in the configuration of the fifth embodiment shown in FIGS. 8 and 10, and the broken line indicates the change in the output voltage with respect to the output current in the configuration of the first embodiment shown in FIGS. 1 and 3. The changes in the output voltage are shown respectively.

In the configuration of the first embodiment, since the bias voltage VB is constant, the output voltage drops slightly as the output current increases in the region where the output current is large. On the other hand, according to the configuration of the fifth embodiment, by increasing the bias voltage VB according to the increase in the output current, the voltage drop of the output voltage becomes more gradual in the region where the output current is large. Can be improved.

As described above, according to the present embodiment, fluctuations in the output voltage can be suppressed even in a region where the output current of the constant voltage power supply circuit is small, and load regulation characteristics can be improved in the entire region of the output current. Therefore, high-precision operation in the entire current region becomes possible, and user convenience can be improved.

In the constant voltage power supply circuit of the present embodiment, one of the NMOS transistor and the NMOS transistor is also referred to as a first conductive type transistor, and the other having opposite polarity is also referred to as a second conductive type transistor. In the configuration example of the above-described embodiment, the NMOS transistor is the first conductive type and the NMOS transistor is the second conductive type.

In the above-described embodiment, the case where the power supply voltage is VDD> VSS has been described. However, when the high-low relationship of the power supply voltage is reversed, the NMOS transistor is replaced with the NMOS transistor, and the NMOS transistor is replaced with the NMOS transistor. Just do it. In this case, the NMOS transistor is the first conductive type, and the NMOS transistor is the second conductive type.

Although various embodiments have been described above with reference to the drawings, it goes without saying that the present invention is not limited to such examples. It is clear that a person skilled in the art can come up with various modifications or modifications within the scope of the claims, which naturally belong to the technical scope of the present invention. Understood. In addition, each component in the above embodiment may be arbitrarily combined as long as the gist of the present invention is not deviated.

INDUSTRIAL APPLICABILITY The present invention has an effect of improving load regulation characteristics even at a light load with a small output current, and is useful for a constant voltage power supply circuit capable of supplying a predetermined output voltage.

1: First power supply terminal (high potential power supply VDD)
2: Second power supply terminal (low potential power supply VSS)
3: Output terminal (VREG)
4: Current source (IS)
5: Reference voltage source (VR)
6: Error amplifier 7: Output voltage detection circuit 8: Positive feedback circuit 9: Bias circuit 10, 10A to 10F: Constant voltage power supply circuit 61: Inverted input end, 62: Non-inverting input end, 63: Output end MP1, MP2 MP3, MP4, MP5: Transistor (PMPC transistor)

MN1, MN2, MN3, MN4, MN5, MN6, MN7, MN8, MN9, MN10, MN11: Transistor (

Claims (5)

A first conductive type first transistor in which the source is connected to the first power supply and a predetermined output voltage is obtained from the drain.
An error amplifier that supplies a voltage proportional to the difference between the output voltage and the reference voltage to the gate of the first transistor,
A positive feedback circuit that includes a first conductive type second transistor in which the first transistor and a source are interconnected, and feeds back a voltage corresponding to the output current of the first transistor to the gate of the first transistor.
A bias circuit provided between the output end of the error amplifier and the positive feedback circuit to supply a bias voltage to the gate of the second transistor, and a bias circuit.
Constant voltage power supply circuit with. The constant voltage power supply circuit according to claim 1.
The positive feedback circuit
It has the second transistor and the second conductive type third transistor and the fourth transistor constituting the current mirror, and the drain and the gate of the third transistor are connected to the drain of the second transistor, and the second transistor is connected. The drain of the 4-transistor is connected to the output end of the error amplifier.
Constant voltage power supply circuit. The constant voltage power supply circuit according to claim 1 or 2.
The bias circuit is
A gate is connected to the output end of the error amplifier, the drain includes a second conductive type fifth transistor connected to the first power supply, and the gate of the second transistor is connected to the source of the fifth transistor. ,
Constant voltage power supply circuit. The constant voltage power supply circuit according to claim 1 or 2.
The bias voltage supplied by the bias circuit increases as the output current of the first transistor increases.
Constant voltage power supply circuit. The constant voltage power supply circuit according to claim 4.
The bias circuit is
A gate is connected to the output end of the error amplifier, the drain is connected in series to the second conductive type fifth transistor connected to the first power supply, and the fifth transistor, and a constant current is connected to the drain of the fifth transistor. The second transistor includes a first current source for supplying the first current source and a second current source which is connected in parallel with the first current source and supplies a current proportional to the output current to the fifth transistor. Gate is connected to the source of the fifth transistor,
Constant voltage power supply circuit.

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