JP2021144960A - Solar cell and method for manufacturing solar cell - Google Patents

Solar cell and method for manufacturing solar cell Download PDF

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JP2021144960A
JP2021144960A JP2018107502A JP2018107502A JP2021144960A JP 2021144960 A JP2021144960 A JP 2021144960A JP 2018107502 A JP2018107502 A JP 2018107502A JP 2018107502 A JP2018107502 A JP 2018107502A JP 2021144960 A JP2021144960 A JP 2021144960A
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solar cell
layer
transparent conductive
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淳平 入川
Jumpei Irikawa
淳平 入川
直人 今田
Naoto IMADA
直人 今田
毅 西脇
Takeshi Nishiwaki
毅 西脇
治寿 橋本
Haruhisa Hashimoto
治寿 橋本
優也 中村
Yuya Nakamura
優也 中村
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Panasonic Corp
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    • HELECTRICITY
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    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0352Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/068Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/072Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type
    • H01L31/0745Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
    • H01L31/0747Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer or HIT® solar cells; solar cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells

Abstract

To provide a solar cell that can improve both the power generation characteristics and the carrier recovery performance, and a method for manufacturing the same.SOLUTION: A solar cell of the present disclosure is a solar cell having a crystalline silicon substrate of a first conductivity type and a first semiconductor layer of a second conductivity type formed on a first main surface side of the crystalline silicon substrate. The side surface extending in the thickness direction of the crystalline silicon substrate includes a side portion whose arithmetic mean roughness differs in the thickness direction, has a high-resistance region with a high sheet resistance on the first main surface side in the vicinity of the side portion, and has a high-resistance region on the first main surface side in the region between the side portion and the center of the first main surface as it moves away from the side portion in one direction starting from the high-resistance region.SELECTED DRAWING: Figure 1

Description

本開示は、太陽電池セル、及び太陽電池セルの製造方法に関する。 The present disclosure relates to a solar cell and a method for manufacturing the solar cell.

太陽電池セルは、特許文献1に例示されるように、製品の様々な要求に従って製造時よりも小面積となるように加工したのちに太陽電池モジュールへと組み込まれる例がある。この太陽電池セルの加工方法では、先ず、大面積の太陽電池セルを形成する。大面積の太陽電池セルは、n型単結晶基板の第1主面側にp型非結晶シリコン層及び透明導電性層を順次設けると共に、n型単結晶基板の第2主面側にn型非結晶シリコン層及び透明導電性層を順次設けることで形成される。次に、レーザー光をn型非結晶シリコン側の透明導電性層に照射することで、上記大面積の太陽電池セルに分割溝を形成する。そして、その分割溝を起点として、上記太陽電池セルを複数の部分に分断する。このようにして、上記大面積よりも小さい小面積の太陽電池セルを形成している。 As exemplified in Patent Document 1, there is an example in which a solar cell is incorporated into a solar cell module after being processed so as to have a smaller area than that at the time of manufacture according to various requirements of a product. In this method of processing a solar cell, first, a large-area solar cell is formed. In a large-area solar cell, a p-type amorphous silicon layer and a transparent conductive layer are sequentially provided on the first main surface side of the n-type single crystal substrate, and an n-type solar cell is provided on the second main surface side of the n-type single crystal substrate. It is formed by sequentially providing an amorphous silicon layer and a transparent conductive layer. Next, by irradiating the transparent conductive layer on the n-type amorphous silicon side with laser light, a dividing groove is formed in the large-area solar cell. Then, the solar cell is divided into a plurality of parts from the dividing groove as a starting point. In this way, a solar cell having a small area smaller than the large area is formed.

特開2008−235521号公報Japanese Unexamined Patent Publication No. 2008-235521

本願発明者らは、第1導電型を有するシリコン基板と、シリコン基板の第1面に設けられた第2導電型を有する第1非晶質シリコンと、シリコン基板の第2面に設けられた第1導電型を有する第2非晶質シリコンを備えるヘテロ接合型太陽電池セルにおいて、シリコン基板上に設けられた第2非晶質シリコン上に更に設けられた透明導電層の外側からレーザー光を照射して太陽電池セルに分断溝を設けたのちに太陽電池セルを分割する際、分割することによって生じた剥き出しの端面によりpn接合間のシャント抵抗が減少し、当該剥き出しの端面に、低抵抗のリーク電流パスが生じることがあることを見出した。当該リーク電流パスを流れるリーク電流は、太陽電池セルの発電特性を低下させることがある。また、pn接合間のシャント抵抗の減少の程度は、シリコン基板の導電型と異なる第2導電型を有する非晶質シリコン層の側に透明導電層が存在する場合に大きくなる。一方で、この問題を回避するために、第2導電型の非晶質シリコン層側に設ける透明導電層の存在領域を小さくすると、生成したキャリアを取り出す透明導電層の面積が減少し、結果として、第2導電型の非晶質シリコン層側の透明導電層の抵抗が増加し、太陽電池セルの発電特性を低下させる。 The inventors of the present application provided a silicon substrate having a first conductive type, a first amorphous silicon having a second conductive type provided on the first surface of the silicon substrate, and a second surface of the silicon substrate. In a heterojunction type solar cell including a second amorphous silicon having a first conductive type, laser light is emitted from the outside of a transparent conductive layer further provided on the second amorphous silicon provided on a silicon substrate. When the solar cell is divided after irradiating and providing a dividing groove in the solar cell, the exposed end face generated by the division reduces the shunt resistance between the pn junctions, and the exposed end face has a low resistance. It has been found that a leak current path can occur. The leak current flowing through the leak current path may reduce the power generation characteristics of the solar cell. Further, the degree of reduction of the shunt resistance between the pn junctions becomes large when the transparent conductive layer is present on the side of the amorphous silicon layer having the second conductive type different from the conductive type of the silicon substrate. On the other hand, in order to avoid this problem, if the existing region of the transparent conductive layer provided on the second conductive type amorphous silicon layer side is reduced, the area of the transparent conductive layer from which the generated carriers are taken out is reduced, and as a result, the area of the transparent conductive layer is reduced. , The resistance of the transparent conductive layer on the side of the second conductive type amorphous silicon layer increases, and the power generation characteristics of the solar cell are lowered.

ヘテロ接合型太陽電池セル以外の太陽電池セルに対して、レーザー照射によって分割溝を形成するにおいても、上記と同様の現象が考えられる。一例には、第1導電側の結晶性シリコン基板に熱拡散によって第2導電型領域を設けた太陽電池セルにおける第2導電型領域の形成領域の関しても成立する。レーザーを照射する位置を考慮して第1導電型の結晶性シリコン基板に設ける第2導電型領域の存在領域を小さくすると、キャリア回収性能が低下し、太陽電池セルの発電特性を低下させる。一方で、レーザー照射位置に第2導電型領域を設けると、太陽電池セルを小面積に分割する際のレーザー光照射に起因するダメージによる発電特性の低下が大きくなる。 The same phenomenon as described above can be considered when forming a dividing groove by laser irradiation for a solar cell other than the heterojunction type solar cell. As an example, the formation region of the second conductive type region in the solar cell in which the second conductive type region is provided by thermal diffusion on the crystalline silicon substrate on the first conductive side is also established. If the existing region of the second conductive type region provided on the first conductive type crystalline silicon substrate is made smaller in consideration of the position of irradiating the laser, the carrier recovery performance is lowered and the power generation characteristics of the solar cell are lowered. On the other hand, if the second conductive type region is provided at the laser irradiation position, the power generation characteristic is greatly deteriorated due to the damage caused by the laser light irradiation when the solar cell is divided into small areas.

本開示の目的は、レーザーを用いて、大面積の太陽電池セルを小面積の太陽電池セルへと加工するための製造方法に関する。すなわち、(1)レーザー光照射に起因するシリコン基板等へのダメージ、及び、加工された小面積セルに生じた保護されていない端面の影響による発電特性の低下と、(2)キャリア回収性能の低下と、を共に抑制し、発電特性を向上できる太陽電池セル及び太陽電池セルの製造方法を提供することにある。 An object of the present disclosure relates to a manufacturing method for processing a large-area solar cell into a small-area solar cell using a laser. That is, (1) damage to the silicon substrate, etc. caused by laser light irradiation, and deterioration of power generation characteristics due to the influence of the unprotected end face generated in the processed small area cell, and (2) carrier recovery performance. It is an object of the present invention to provide a solar cell and a method for manufacturing a solar cell, which can suppress both the decrease and the power generation characteristics and improve the power generation characteristics.

上記課題を解決するための本開示の太陽電池セルは、第1主面及び第2主面を備える第1導電型の結晶性シリコン基板と、結晶性シリコン基板の第1主面側に形成された第2導電型の第1半導体層と、を備える太陽電池セルである。太陽電池セルは互いに平行である2つの辺を含む辺縁部を有し、2つの辺の両方に直交する第1方向に沿って、太陽電池セルのシート抵抗が変化する第1のシート抵抗変化部を第1主面側の表面又は第2主面側の表面のうち一方の表面に備え、第1のシート抵抗変化部は、第1方向に進むにつれてシート抵抗が増加する抵抗増加部と、シート抵抗が減少する抵抗減少部と、をこの順に備える。 The solar cell of the present disclosure for solving the above problems is formed on a first conductive type crystalline silicon substrate having a first main surface and a second main surface and on the first main surface side of the crystalline silicon substrate. It is a solar cell including a second conductive type first semiconductor layer. The solar cell has an edge including two sides parallel to each other, and the sheet resistance of the solar cell changes along the first direction orthogonal to both of the two sides. A portion is provided on one surface of the surface on the first main surface side or the surface on the second main surface side, and the first sheet resistance changing portion includes a resistance increasing portion in which the sheet resistance increases as it advances in the first direction. A resistance reducing portion for reducing the sheet resistance is provided in this order.

また、本開示の太陽電池セルは、第1導電型の結晶性シリコン基板と、結晶性シリコン基板の第1主面側に形成された第2導電型の第1半導体層と、を備える太陽電池セルである。結晶性シリコン基板の厚さ方向に延在する側面は、算術平均粗さが厚さ方向で異なる側面部を含み、側面部の近傍に第1主面側のシート抵抗が高い高抵抗領域を有し、側面部から第1主面の中心までの間の領域に、高抵抗領域を起点として側面部から一方向に離れるにつれて第1主面側のシート抵抗が単調減少する一方向を含む。 Further, the solar cell of the present disclosure includes a first conductive type crystalline silicon substrate and a second conductive type first semiconductor layer formed on the first main surface side of the crystalline silicon substrate. It is a cell. The side surface extending in the thickness direction of the crystalline silicon substrate includes a side surface portion in which the arithmetic mean roughness differs in the thickness direction, and has a high resistance region having a high sheet resistance on the first main surface side in the vicinity of the side surface portion. However, the region between the side surface portion and the center of the first main surface includes one direction in which the sheet resistance on the first main surface side monotonically decreases as the distance from the side surface portion increases in one direction starting from the high resistance region.

また、本開示の太陽電池セルの製造方法は、次のステップを含む。すなわち、第1主面及び第2主面を有する第1導電型のシリコン基板と、結晶性シリコン基板の第1主面側に位置する第2導電型の第1非晶質シリコン層と、結晶性シリコン基板の第2主面に位置する第1導電型の第2非晶質シリコン層と、を備える異極性接合部を形成する異極性接合部形成ステップ;異極性接合部形成ステップの後、異極性接合部を透明導電層形成用チャンバー内に配置する配置ステップ;配置ステップの後、チャンバー内において第1非晶質シリコン層及び第2非晶質シリコン層のうち少なくとも一方の外側に、1mm以上の幅を有する 線状のマスクを配置するマスク配置ステップ;マスク配置ステップの後、マスクを介して第1非晶質シリコン層及び第2非晶質シリコン層のうち少なくとも一方の上に透明導電層を積層させる透明導電層成膜ステップ;透明導電層成膜ステップの後、マスクを除去するマスク除去ステップ。 In addition, the method for manufacturing a solar cell of the present disclosure includes the following steps. That is, a first conductive type silicon substrate having a first main surface and a second main surface, a second conductive type first amorphous silicon layer located on the first main surface side of the crystalline silicon substrate, and a crystal. A heteropolar junction forming step of forming a heteropolar junction comprising a first conductive type second amorphous silicon layer located on the second main surface of the sex silicon substrate; after the heteropolar junction forming step. Arrangement step of arranging the heteropolar joint in the transparent conductive layer forming chamber; after the arrangement step, 1 mm outside at least one of the first amorphous silicon layer and the second amorphous silicon layer in the chamber. Mask placement step for placing a linear mask with the above width; after the mask placement step, transparent conductivity is placed on at least one of the first amorphous silicon layer and the second amorphous silicon layer via the mask. A transparent conductive layer forming step for laminating layers; a mask removing step for removing a mask after the transparent conductive layer forming step.

本開示の太陽電池セルによれば、分割溝を形成する際のレーザー光照射に起因するダメージ及び分割溝の形成により、小面積の太陽電池セルに生じた保護されていない端面の影響による発電特性の低下と、キャリア回収性能の低下を共に抑制でき、発電特性を向上できる。また、本開示の太陽電池セルの製造方法によれば、上述のように、太陽電池セルの分割溝の形成による発電特性の低下と、キャリア回収性能の低下を共に抑制できる太陽電池セルを製造できる。 According to the solar cell of the present disclosure, the power generation characteristics due to the influence of the unprotected end face generated in the small area solar cell due to the damage caused by the laser light irradiation when forming the dividing groove and the formation of the dividing groove. It is possible to suppress both the deterioration of the carrier recovery performance and the deterioration of the carrier recovery performance, and the power generation characteristics can be improved. Further, according to the method for manufacturing a solar cell of the present disclosure, as described above, it is possible to manufacture a solar cell capable of suppressing both a decrease in power generation characteristics and a decrease in carrier recovery performance due to the formation of a dividing groove of the solar cell. ..

本開示の第1実施形態に係る太陽電池セルの模式断面図である。It is a schematic cross-sectional view of the solar cell which concerns on 1st Embodiment of this disclosure. 上記太陽電池セルの製造方法を説明する模式断面図であり、上記太陽電池セルの製造途中の状態を表す模式断面図である。It is a schematic cross-sectional view explaining the manufacturing method of the said solar cell, and is the schematic cross-sectional view which shows the state in the process of manufacturing the said solar cell. 上記太陽電池セルの製造方法を説明する模式断面図であり、上記太陽電池セルの製造途中の状態を表す模式断面図である。It is a schematic cross-sectional view explaining the manufacturing method of the said solar cell, and is the schematic cross-sectional view which shows the state in the process of manufacturing the said solar cell. 上記太陽電池セルの製造方法を説明する模式断面図であり、上記太陽電池セルの製造途中の状態を表す模式断面図である。It is a schematic cross-sectional view explaining the manufacturing method of the said solar cell, and is the schematic cross-sectional view which shows the state in the process of manufacturing the said solar cell. 上記太陽電池セルの製造方法を説明する模式断面図であり、上記太陽電池セルの製造途中の状態を表す模式断面図である。It is a schematic cross-sectional view explaining the manufacturing method of the said solar cell, and is the schematic cross-sectional view which shows the state in the process of manufacturing the said solar cell. 上記太陽電池セルの製造方法を説明する模式断面図であり、上記太陽電池セルの製造途中の状態を表す模式断面図である。It is a schematic cross-sectional view explaining the manufacturing method of the said solar cell, and is the schematic cross-sectional view which shows the state in the process of manufacturing the said solar cell. 一試験例における、上記太陽電池セルの透明導電層の膜厚の変化と、マスクの配置位置との関係を表す模式図である。It is a schematic diagram which shows the relationship between the change of the film thickness of the transparent conductive layer of the said solar cell, and the arrangement position of a mask in one test example. 変形例の太陽電池セルの模式断面図である。It is a schematic cross-sectional view of the solar cell of a modification. 第2実施形態の太陽電池セルの製造方法を説明する模式断面図であり、該太陽電池セルの製造途中の状態を表す模式断面図である。It is a schematic cross-sectional view explaining the manufacturing method of the solar cell of 2nd Embodiment, and is the schematic cross-sectional view which shows the state in the process of manufacturing the solar cell. 第2実施形態の太陽電池セルの製造方法を説明する模式断面図であり、該太陽電池セルの製造途中の状態を表す模式断面図である。It is a schematic cross-sectional view explaining the manufacturing method of the solar cell of 2nd Embodiment, and is the schematic cross-sectional view which shows the state in the process of manufacturing the solar cell. 第2実施形態の太陽電池セルの製造方法を説明する模式断面図であり、該太陽電池セルの製造途中の状態を表す模式断面図である。It is a schematic cross-sectional view explaining the manufacturing method of the solar cell of 2nd Embodiment, and is the schematic cross-sectional view which shows the state in the process of manufacturing the solar cell. 第2実施形態の太陽電池セルの模式断面図である。It is a schematic cross-sectional view of the solar cell of the 2nd Embodiment. 変形例の太陽電池セルでの平面視におけるレーザー光割断部の位置を表す模式平面図である。It is a schematic plan view which shows the position of the laser light split part in the plan view in the solar cell of a modification. 小型デバイスで使用する太陽電池セルの製造方法について説明する模式平面図である。It is a schematic plan view explaining the manufacturing method of the solar cell used in a small device.

以下に、本開示に係る実施の形態について添付図面を参照しながら詳細に説明する。なお、以下において複数の実施形態や変形例などが含まれる場合、それらの特徴部分を適宜に組み合わせて新たな実施形態を構築することは当初から想定されている。また、下記の説明及び図面において、X方向は、一方向を示し、Y方向は、後で説明する溝19,219の延在方向を示し、Z方向は、太陽電池セル50,150,250,350の厚さ方向を示す。X方向、Y方向、及びZ方向は、互いに直交する。 Hereinafter, embodiments according to the present disclosure will be described in detail with reference to the accompanying drawings. When a plurality of embodiments and modifications are included in the following, it is assumed from the beginning that a new embodiment is constructed by appropriately combining the characteristic portions thereof. Further, in the following description and drawings, the X direction indicates one direction, the Y direction indicates the extending direction of the grooves 19, 219 described later, and the Z direction indicates the solar cell 50,150,250, The thickness direction of 350 is shown. The X, Y, and Z directions are orthogonal to each other.

(第1の実施形態)
図1は、本開示の第1実施形態に係る太陽電池セル50の模式断面図である。また、図2〜図6は、太陽電池セル50の製造方法を説明する模式断面図であり、太陽電池セル50の製造途中の状態を表す模式断面図である。以下、先ず、図1を用いて、太陽電池セル50の構造について説明する。
(First Embodiment)
FIG. 1 is a schematic cross-sectional view of the solar cell 50 according to the first embodiment of the present disclosure. Further, FIGS. 2 to 6 are schematic cross-sectional views for explaining the manufacturing method of the solar cell 50, and are schematic cross-sectional views showing a state in which the solar cell 50 is in the process of being manufactured. Hereinafter, first, the structure of the solar cell 50 will be described with reference to FIG.

図1に示すように、太陽電池セル50では、第1導電型の一例としてのn型の結晶性シリコン基板(以下、単にシリコン基板という)1の第1主面上に、第1i型非晶質シリコン層(第1真性非晶質シリコン層)2a、第2導電型の一例としてのp型の第1非晶質シリコン層3a、第1透明導電層4a、及び第1主面側集電極5aが、この順に積層される。また、太陽電池セル50では、シリコン基板1の第2主面上に、第2i型非晶質シリコン層(第2真性非晶質シリコン層)2b、n型の第2非晶質シリコン層3b、第2透明導電層4b、及び第2主面側集電極5bが、この順に積層される。 As shown in FIG. 1, in the solar cell 50, the first i-type amorphous silicon is placed on the first main surface of an n-type crystalline silicon substrate (hereinafter, simply referred to as a silicon substrate) 1 as an example of the first conductive type. Quality silicon layer (first amorphous silicon layer) 2a, p-type first amorphous silicon layer 3a as an example of the second conductive type, first transparent conductive layer 4a, and first main surface side collecting electrode 5a are laminated in this order. Further, in the solar cell 50, the second i-type amorphous silicon layer (second intrinsic amorphous silicon layer) 2b and the n-type second amorphous silicon layer 3b are placed on the second main surface of the silicon substrate 1. , The second transparent conductive layer 4b, and the second main surface side collecting electrode 5b are laminated in this order.

シリコン基板1は、単結晶シリコン基板に導電性を付加させたものである。本実施例では、第1導電型がn型である場合について説明する。例えば、シリコン基板1は、単結晶シリコン基板にSi原子(珪素原子)に対して電子を導入するリン原子を不純物として含有させることで形成される。本実施例のn型単結晶シリコン基板は、例えば、厚みが50μm〜300μm、比抵抗は0.5Ω・cm〜30Ω・cm、n型不純物濃度は1×10-16cm-3〜1×10−14cm-であるのが好ましく、厚みが100μm〜200μm、比抵抗は1Ω・cm〜10Ω・cmであるのがなお好ましい。なお、このn型単結晶シリコン基板は表面および裏面に50nm〜500nm程度の厚みの高濃度不純物層をそれぞれ有してもよく、本実施形態ではn型の高濃度不純物層を備えてもよい。 The silicon substrate 1 is a single crystal silicon substrate to which conductivity is added. In this embodiment, the case where the first conductive type is n type will be described. For example, the silicon substrate 1 is formed by incorporating a phosphorus atom that introduces an electron into a Si atom (silicon atom) into a single crystal silicon substrate as an impurity. The n-type single crystal silicon substrate of this example has, for example, a thickness of 50 μm to 300 μm, a specific resistance of 0.5 Ω · cm to 30 Ω · cm, and an n-type impurity concentration of 1 × 10 -16 cm -3 to 1 × 10. It is preferably -14 cm- 3 , and more preferably 100 μm to 200 μm in thickness and 1 Ω · cm to 10 Ω · cm in specific resistance. The n-type single crystal silicon substrate may have a high-concentration impurity layer having a thickness of about 50 nm to 500 nm on the front surface and the back surface, respectively, and may be provided with an n-type high-concentration impurity layer in the present embodiment.

シリコン基板1はその表面および裏面の少なくともいずれか一方にテクスチャー構造を有してもよい。本実施例では、シリコン基板1は、多数のピラミッド形状が不規則に配置され、その高さ(大きさ)が不揃いであるランダムテクスチャー構造を有する。ピラミッド形状の凹凸は、例えば、数μmから数十μmの幅と、数μmから数十μmの高さとを有する。なお、各ピラミッド形状の頂点および谷部は、丸みを帯びていてもよい。 The silicon substrate 1 may have a texture structure on at least one of the front surface and the back surface thereof. In this embodiment, the silicon substrate 1 has a random texture structure in which a large number of pyramid shapes are irregularly arranged and their heights (sizes) are irregular. The pyramid-shaped unevenness has, for example, a width of several μm to several tens of μm and a height of several μm to several tens of μm. The vertices and valleys of each pyramid shape may be rounded.

第1及び第2i型非晶質シリコン層2a,2bは、好ましくはシリコンと水素を含むi型水素化非晶質シリコンで構成される。なお、第1及び第2i型非晶質シリコン層2a,2bは、省略されることもできる。また、第1非晶質シリコン層3aは、好ましくはシリコンと水素とボロンを含むp型水素化非晶質シリコンで構成され、第2非晶質シリコン層3bは、好ましくはシリコンと水素とリンを含むn型水素化非晶質シリコンで構成される。 The first and second i-type amorphous silicon layers 2a and 2b are preferably composed of i-type hydrogenated amorphous silicon containing silicon and hydrogen. The first and second type amorphous silicon layers 2a and 2b may be omitted. The first amorphous silicon layer 3a is preferably composed of p-type hydrogenated amorphous silicon containing silicon, hydrogen and boron, and the second amorphous silicon layer 3b is preferably silicon, hydrogen and phosphorus. It is composed of n-type hydride amorphous silicon containing.

第1及び第2透明導電層4a,4bは、導電性酸化物を主成分とすることが好ましい。導電性酸化物としては、例えば、酸化インジウム、酸化錫または酸化亜鉛等を単独または混合して用いることができる。導電性酸化物としては、導電性、光学特性、及び長期信頼性の観点から、主成分として酸化インジウムを含んだインジウム系酸化物が好ましく、例えば、タングステンをドープした酸化インジウム(IWO)や錫をドープした酸化インジウム錫(ITO)等を用いることができる。第1及び第2透明導電層4a,4bは単層でもよく、複数の層からなる積層構造でもよい。 The first and second transparent conductive layers 4a and 4b preferably contain a conductive oxide as a main component. As the conductive oxide, for example, indium oxide, tin oxide, zinc oxide and the like can be used alone or in combination. As the conductive oxide, an indium-based oxide containing indium oxide as a main component is preferable from the viewpoint of conductivity, optical properties, and long-term reliability. For example, indium oxide (IWO) or tin doped with tungsten is used. Dopeed indium tin oxide (ITO) or the like can be used. The first and second transparent conductive layers 4a and 4b may be a single layer or a laminated structure composed of a plurality of layers.

本実施例の第1及び第2透明導電層4a,4bは、第1及び第2i型非晶質シリコン層2a,2b、第1非晶質シリコン層3aおよび第2非晶質シリコン層3bより抵抗が小さく、高導電性である。例えば、第1及び第2透明導電層4a,4bの比抵抗は3×10−4Ω・cm〜4×10−3Ω・cmであってよく、厚みは50nm〜200nmである。 The first and second transparent conductive layers 4a and 4b of this embodiment are from the first and second type amorphous silicon layers 2a and 2b, the first amorphous silicon layer 3a and the second amorphous silicon layer 3b. It has low resistance and high conductivity. For example, the specific resistances of the first and second transparent conductive layers 4a and 4b may be 3 × 10 -4 Ω · cm to 4 × 10 -3 Ω · cm, and the thickness is 50 nm to 200 nm.

第1及び第2主面側集電極5a,5bは、銀、銅、又はアルミニウム等の導電性材料を含む。金属等の導電性材料のみを含んで構成されてもよく、導電性材料の粉末等と樹脂等の絶縁材料との混合物であってもよい。本実施例の第1及び第2主面側集電極5a,5bは、銀の微粒子を含む絶縁性樹脂のペースト材を焼結または乾燥等により硬化させて形成された、金属粒子と樹脂の混合物からなる。 The first and second main surface side collecting electrodes 5a and 5b include a conductive material such as silver, copper, or aluminum. It may be composed of only a conductive material such as metal, or may be a mixture of a powder of the conductive material or the like and an insulating material such as a resin. The first and second main surface side collecting electrodes 5a and 5b of this embodiment are a mixture of metal particles and a resin formed by curing an insulating resin paste material containing silver fine particles by sintering or drying. Consists of.

概ねZ方向に沿って延在する側面8には、算術平均粗さがZ方向で異なる複数の種類の側面部8b、8cを含む側面部8aが含まれる。より詳しくは、側面部8aは、第2非晶質シリコン層3bの外側の端部からシリコン基板1のZ方向の第2主面側の一部にかけて材料が溶融した後固化した第1領域8bを有する。また、側面部8aは、第1領域と異なるZ方向位置(厚さ位置)に存在し、材料が溶融した痕跡が存在しない第2領域8cを有する。第1領域8bの表面粗さは、第2領域8cの表面粗さよりも大きい。なお、以下の説明で、算術平均粗さがZ方向(厚さ方向で異なる)で異なる側面部と言及した場合、その側面部は、材料が溶融した後固化した痕跡がある第1領域と、第1領域と異なるZ方向位置(厚さ位置)に存在し、材料が溶融した痕跡が存在しない第2領域を含む。 The side surface 8 extending substantially along the Z direction includes a side surface portion 8a including a plurality of types of side surface portions 8b and 8c whose arithmetic mean roughness differs in the Z direction. More specifically, the side surface portion 8a is a first region 8b in which the material is melted and then solidified from the outer end portion of the second amorphous silicon layer 3b to a part of the silicon substrate 1 on the second main surface side in the Z direction. Has. Further, the side surface portion 8a has a second region 8c that exists at a position (thickness position) in the Z direction different from the first region and has no trace of melting of the material. The surface roughness of the first region 8b is larger than the surface roughness of the second region 8c. In the following description, when the arithmetic mean roughness is referred to as a side surface portion different in the Z direction (different in the thickness direction), the side surface portion includes a first region having a trace of solidification after the material is melted. It includes a second region that exists at a position (thickness position) in the Z direction different from the first region and has no trace of melting of the material.

図1では、第1領域8bをノコギリ歯形状で模式的に示す。第1領域8bは、第2非晶質シリコン層3bからシリコン基板1の一部までZ方向に延在する。第1領域8bは、シリコン基板1の厚さの20%以上70%以下の深さであって、かつ異極性接合部まで達していない範囲であることが好ましい。しかし、第1領域8bは、シリコン基板1の厚さの20%未満の深さまでしか達していなくてもよく、異極性接合部20に達しない範囲においてシリコン基板1の厚さの70%よりも深い深さまで達してもよい。 In FIG. 1, the first region 8b is schematically shown in a sawtooth shape. The first region 8b extends in the Z direction from the second amorphous silicon layer 3b to a part of the silicon substrate 1. The first region 8b preferably has a depth of 20% or more and 70% or less of the thickness of the silicon substrate 1 and does not reach the non-polar joint portion. However, the first region 8b may reach a depth of less than 20% of the thickness of the silicon substrate 1, and is larger than 70% of the thickness of the silicon substrate 1 in a range not reaching the heteropolar junction 20. It may reach deep depths.

第1透明導電層4aは、側面部8aからX方向(図1の紙面の幅方向)に離れる方向に向かって層厚が増加する層厚増加部6aを有する。層厚増加部6aは、側面部8aからX方向に離れる方向に向かって第1透明導電層4aの厚みが単調増加し、これに伴って単位面積当たりの抵抗率が単調減少する抵抗減少部になっている。また、第2透明導電層4bも、側面部8aからX方向に離れる方向に向かって層厚が増加する層厚増加部6bを有する。層厚増加部6a,6bの夫々のX方向の長さは0.5mm以上1.5mm以下であると好ましいが、それ以外の長さであってもよい。また、層厚増加部6a,6bのうち、側面部8aに近い側の端部(最も薄い部分)の厚みが最も薄く、この部分の厚みは、第1透明導電層4aの標準的な厚みに比べて20%以下であると好ましく、最大値の15%以下であると更に好ましく、最大値の10%以下であってもよい。第1及び第2透明導電層4a,4bは厚みが増すと単位面積あたりのシート抵抗が低下するので、層厚増加部6a,6bは抵抗減少部であると言える。反対に、厚みが減少すると単位面積あたりのシート抵抗が増加するので、層厚減少部7a,7bは抵抗増加部であると言える。また、第1及び第2透明導電層4a,4bのうち、層厚増加部6a,6b、層厚減少部7a,7bを除く部分の厚みは面内で略均一である。 The first transparent conductive layer 4a has a layer thickness increasing portion 6a in which the layer thickness increases in the direction away from the side surface portion 8a in the X direction (the width direction of the paper surface in FIG. 1). The layer thickness increasing portion 6a is a resistance decreasing portion in which the thickness of the first transparent conductive layer 4a monotonically increases in the direction away from the side surface portion 8a in the X direction, and the resistivity per unit area decreases monotonically accordingly. It has become. Further, the second transparent conductive layer 4b also has a layer thickness increasing portion 6b in which the layer thickness increases in the direction away from the side surface portion 8a in the X direction. The length of each of the layer thickness increasing portions 6a and 6b in the X direction is preferably 0.5 mm or more and 1.5 mm or less, but other lengths may be used. Further, among the layer thickness increasing portions 6a and 6b, the thickness of the end portion (thinnest portion) on the side closer to the side surface portion 8a is the thinnest, and the thickness of this portion is the standard thickness of the first transparent conductive layer 4a. It is preferably 20% or less, more preferably 15% or less of the maximum value, and may be 10% or less of the maximum value. Since the sheet resistance per unit area of the first and second transparent conductive layers 4a and 4b decreases as the thickness increases, it can be said that the layer thickness increasing portions 6a and 6b are resistance decreasing portions. On the contrary, since the sheet resistance per unit area increases as the thickness decreases, it can be said that the layer thickness decreasing portions 7a and 7b are resistance increasing portions. Further, among the first and second transparent conductive layers 4a and 4b, the thicknesses of the portions excluding the layer thickness increasing portions 6a and 6b and the layer thickness decreasing portions 7a and 7b are substantially uniform in the plane.

ここで、「単調増加」という言葉について説明する。これは、のちに示す測定方法で第1及び第2透明導電層4a,4bの厚みを測定したときに、その厚みが一方向に向かって変化していくことを示すものである。したがって、例えば、光学顕微鏡又は電子顕微鏡観察等を用いた断面観察によって測定されうる、ごく局所的な範囲での厚みの変化については、必ずしも一方向に向かって単調に増加している必要はない。 Here, the term "monotonically increasing" will be described. This indicates that when the thicknesses of the first and second transparent conductive layers 4a and 4b are measured by the measuring method described later, the thicknesses change in one direction. Therefore, for example, the change in thickness in a very local range, which can be measured by cross-sectional observation using an optical microscope, an electron microscope, or the like, does not necessarily have to increase monotonically in one direction.

図1に示すように、第1主面側集電極5aの大半は、第1透明導電層4aにおける厚さが一定の部分上に設けられる。しかし、図1に示すように、Z方向から見たとき、第1主面側集電極5aが第1透明導電層4aの層厚増加部6aに重畳する位置に設けられていてもよく、また、第1透明導電層4aに重ならない周辺部分13aを含んでいてもよい。 As shown in FIG. 1, most of the first main surface side collecting electrode 5a is provided on a portion of the first transparent conductive layer 4a having a constant thickness. However, as shown in FIG. 1, when viewed from the Z direction, the first main surface side collecting electrode 5a may be provided at a position where it overlaps with the layer thickness increasing portion 6a of the first transparent conductive layer 4a. , Peripheral portion 13a that does not overlap with the first transparent conductive layer 4a may be included.

また、同様に、第2主面側集電極5bの大半は、第2透明導電層4bにおける厚さが一定の部分上に設けられる。しかし、図1に示すように、Z方向から見たとき、第2主面側集電極5bが第2透明導電層4bの層厚増加部6bに重畳する位置に設けられていてもよく、第2主面側集電極5bが第2透明導電層4bに重ならない周辺部分13bを含んでいてもよい。 Similarly, most of the second main surface side collecting electrode 5b is provided on a portion of the second transparent conductive layer 4b having a constant thickness. However, as shown in FIG. 1, when viewed from the Z direction, the second main surface side collecting electrode 5b may be provided at a position where it overlaps with the layer thickness increasing portion 6b of the second transparent conductive layer 4b. 2 The peripheral portion 13b on which the main surface side collecting electrode 5b does not overlap the second transparent conductive layer 4b may be included.

次に、図2〜図6を用いて、太陽電池セル50の製造方法の一例について説明する。なお、以下の説明では、太陽電池セル40(図5参照)を大面積セルとみなし、これを2つの小面積の太陽電池セル50(図1参照)に分割する場合について説明する。 Next, an example of a method for manufacturing the solar cell 50 will be described with reference to FIGS. 2 to 6. In the following description, a case where the solar cell 40 (see FIG. 5) is regarded as a large-area cell and the solar cell 40 (see FIG. 5) is divided into two small-area solar cells 50 (see FIG. 1) will be described.

先ず、n型を有する結晶性のシリコン基板1の元基板をHF水溶液に数分間浸漬し、表面の酸化シリコン膜を除去し、超純水によるリンスを行う。次に、所定温度のKOH(水酸化カリウム水溶液)/イソプロピルアルコール水溶液に、元基板を十分程度浸漬し、基板表面をエッチングすることで、ランダムテクスチャー構造を表面に備える元基板を形成する。その後、元基板を超純水でリンスし、温風により乾燥させ、n型を有する結晶性のシリコン基板1を形成する。基板表面にランダムテクスチャー構造を形成する方法としては、上記以外の化学薬品を用いてもよく、また、エッチングガスを用いるドライエッチングの手法を用いてもよい。テクスチャ構造はシリコン基板1の両面に形成されていてもよく、一方の面のみに形成されていてもよい。また、結晶性のシリコン基板にテクスチャ構造を形成しなくてもよい。 First, the original substrate of the n-type crystalline silicon substrate 1 is immersed in an HF aqueous solution for several minutes to remove the silicon oxide film on the surface, and rinse with ultrapure water. Next, the original substrate is sufficiently immersed in a KOH (potassium hydroxide aqueous solution) / isopropyl alcohol aqueous solution at a predetermined temperature, and the surface of the substrate is etched to form the original substrate having a random texture structure on the surface. Then, the original substrate is rinsed with ultrapure water and dried with warm air to form an n-type crystalline silicon substrate 1. As a method for forming a random texture structure on the surface of the substrate, a chemical other than the above may be used, or a dry etching method using an etching gas may be used. The texture structure may be formed on both sides of the silicon substrate 1, or may be formed on only one side. Further, it is not necessary to form a texture structure on the crystalline silicon substrate.

次に、シリコン基板1の第1主面に、数nmの膜厚を有する第1i型非晶質シリコン層2aを成膜する。第1i型非晶質シリコン層2aの原材料としては、SiH及びHを用いる。続いて、第1i型非晶質シリコン層2a上に、数nmの膜厚を有するp型の第1非晶質シリコン層3aを成膜する。これらの膜の形成には一般的なCVD(Chemical Vapor Deposition)装置を用いてよい。第1非晶質シリコン層3aの原材料としては、SiHとBを用いる。Bガスとしては、B濃度をHで数千ppmまで希釈したガスを使用する。 Next, a first i-type amorphous silicon layer 2a having a film thickness of several nm is formed on the first main surface of the silicon substrate 1. SiH 4 and H 2 are used as raw materials for the first type amorphous silicon layer 2a. Subsequently, a p-type first amorphous silicon layer 3a having a film thickness of several nm is formed on the first i-type amorphous silicon layer 2a. A general CVD (Chemical Vapor Deposition) device may be used to form these films. SiH 4 and B 2 H 6 are used as raw materials for the first amorphous silicon layer 3a. As the B 2 H 6 gas, a gas obtained by diluting the B 2 H 6 concentration with H 2 to several thousand ppm is used.

次に、シリコン基板1の第2主面に、数nmの膜厚を有する第2i型非晶質シリコン層2bを成膜する。第2i型非晶質シリコン層2bの原材料としては、SiH及びHを用いる。続いて、第2i型非晶質シリコン層2b上に、数nmの膜厚を有するn型の第2非晶質シリコン層3bを成膜する。これらの膜の形成には一般的なCVD装置を用いてよい。第2非晶質シリコン層3bの原材料としては、SiH4とPH3を用いる。PH3ガスとしては、PH3濃度をHで数千ppmまで希釈したガスを使用する。 Next, a second i-type amorphous silicon layer 2b having a film thickness of several nm is formed on the second main surface of the silicon substrate 1. SiH 4 and H 2 are used as raw materials for the second type amorphous silicon layer 2b. Subsequently, an n-type second amorphous silicon layer 3b having a film thickness of several nm is formed on the second i-type amorphous silicon layer 2b. A general CVD apparatus may be used for forming these films. SiH 4 and PH 3 are used as raw materials for the second amorphous silicon layer 3b. As the PH 3 gas, a gas obtained by diluting the pH 3 concentration with H 2 to several thousand ppm is used.

なお、シリコン基板1の第1主面側に、第1i型非晶質シリコン層2a及びp型の第1非晶質シリコン層3aを順に成膜した後に、シリコン基板1の第2主面側に、第2i型非晶質シリコン層2b及びn型の第2非晶質シリコン層3bを順に成膜した。しかし、第2主面側から先に成膜してもよく、成膜順は任意である。 After forming the first i-type amorphous silicon layer 2a and the p-type first amorphous silicon layer 3a on the first main surface side of the silicon substrate 1 in order, the second main surface side of the silicon substrate 1 is formed. The second i-type amorphous silicon layer 2b and the n-type second amorphous silicon layer 3b were formed in this order. However, the film may be formed first from the second main surface side, and the order of film formation is arbitrary.

また、本実施形態のi型非晶質シリコンには、微量のボロンやリンが含まれていてよい。この場合の微量とは、第1非晶質シリコン層及び第2非晶質シリコン層のそれぞれに含まれるドーパント濃度よりも十分希薄であることを意味する。また、第1i型非晶質シリコン層2aと第2i型非晶質シリコン層2bに代えて、これらと同じくシリコン基板1の表面をパッシベーションするトンネル層を有していてもよい。上記トンネル層は例えば酸化ケイ素(SiO)等の薄層からなる。このようにして、異極性接合部20を有する積層体(図2)を作製した。本実施形態においては、異極性接合部20が太陽電池セルのpn接合部である。 Further, the i-type amorphous silicon of the present embodiment may contain a trace amount of boron or phosphorus. In this case, the trace amount means that the concentration is sufficiently thinner than the dopant concentration contained in each of the first amorphous silicon layer and the second amorphous silicon layer. Further, instead of the first type amorphous silicon layer 2a and the second type amorphous silicon layer 2b, a tunnel layer that passesivates the surface of the silicon substrate 1 may be provided. The tunnel layer is made of a thin layer such as silicon oxide (SiO 2). In this way, a laminated body (FIG. 2) having the different polarity joint portion 20 was produced. In the present embodiment, the heteropolar junction 20 is the pn junction of the solar cell.

次に、第1非晶質シリコン層3a上に第1透明導電層4aを成膜する。詳しくは、スパッタ装置を用いて成膜を行う方法が挙げられる。まず、異極性接合部20を有する積層体をスパッタ装置に導入する。そして、図3に示すように、外周側メタルマスク10aを、第1非晶質シリコン層3a上の外周部の全周に亘って配置すると共に、線状メタルマスク11aを、第1非晶質シリコン層3a上の任意の位置に配置する。本実施形態では、X方向(図3の紙面の幅方向)の略中央部に配置している。線状メタルマスク11aは、X方向長さ(幅)が例えば1.0mm以上2.5mm以下であり、Y方向(図3の紙面に垂直な方向)に延在する。線状メタルマスク11aのY方向一方側及び他方側の夫々は、例えば、外周側メタルマスク10aに接続され、本実施形態では外周側メタルマスク10a及び線状メタルマスク11aは、一体に構成されている。 Next, the first transparent conductive layer 4a is formed on the first amorphous silicon layer 3a. More specifically, a method of forming a film using a sputtering apparatus can be mentioned. First, the laminate having the different polarity joint portion 20 is introduced into the sputtering apparatus. Then, as shown in FIG. 3, the outer peripheral side metal mask 10a is arranged over the entire circumference of the outer peripheral portion on the first amorphous silicon layer 3a, and the linear metal mask 11a is placed on the first amorphous silicon layer 3a. It is arranged at an arbitrary position on the silicon layer 3a. In this embodiment, it is arranged at a substantially central portion in the X direction (the width direction of the paper surface in FIG. 3). The linear metal mask 11a has a length (width) in the X direction of, for example, 1.0 mm or more and 2.5 mm or less, and extends in the Y direction (direction perpendicular to the paper surface of FIG. 3). One side and the other side of the linear metal mask 11a in the Y direction are connected to, for example, the outer peripheral side metal mask 10a, and in the present embodiment, the outer peripheral side metal mask 10a and the linear metal mask 11a are integrally configured. There is.

その後、図4に示すように、例えばスパッタ装置を用いて第1非晶質シリコン層3a上に数十nmの第1透明導電層4aを成膜する。本実施形態では、スパッタターゲットとしてインジウム酸化物と酸化錫の焼結体を使用して、酸化インジウム錫(ITO)からなる透明導電層を成膜する。その後、第1透明導電層4aの成膜方法と同様の方法で、第2非晶質シリコン層3b上に第2透明導電層4bを成膜する。なお、第1透明導電層4aと第2透明導電層4bとの形成順は任意であるので、第2非晶質シリコン層3b上に第2透明導電層4bを成膜した後、第1非晶質シリコン層3a上に第1透明導電層4aを成膜してもよい。また、線状メタルマスク11aのX方向の長さ(幅)は、1.0mm未満であってもよく、2.5mmより長くてもよい。また、第1及び第2透明導電層はスパッタ法以外の方法、一例には化学気相堆積法(MOCVD)で成膜されてもよい。このようにして、図4に示すセル積層体30を作製する。 Then, as shown in FIG. 4, a first transparent conductive layer 4a having a diameter of several tens of nm is formed on the first amorphous silicon layer 3a by using, for example, a sputtering device. In the present embodiment, a transparent conductive layer made of indium tin oxide (ITO) is formed by using a sintered body of indium oxide and tin oxide as a sputter target. Then, the second transparent conductive layer 4b is formed on the second amorphous silicon layer 3b by the same method as the method for forming the first transparent conductive layer 4a. Since the order of formation of the first transparent conductive layer 4a and the second transparent conductive layer 4b is arbitrary, after forming the second transparent conductive layer 4b on the second amorphous silicon layer 3b, the first non-transparent conductive layer 4b is formed. The first transparent conductive layer 4a may be formed on the crystalline silicon layer 3a. Further, the length (width) of the linear metal mask 11a in the X direction may be less than 1.0 mm or longer than 2.5 mm. Further, the first and second transparent conductive layers may be formed by a method other than the sputtering method, for example, a chemical vapor deposition method (MOCVD). In this way, the cell laminate 30 shown in FIG. 4 is produced.

この状態で、セル積層体30には、X方向とZ方向を含む第1透明導電層4aの断面において、X方向一方側に行くにしたがって、厚さが最も薄い薄層部9aまで厚みが減少する層厚減少部7aが現れた後、厚さが薄層部9aに比べて増加する層厚増加部6aが現れる。この層厚減少部7a及び層厚増加部6aは、第1透明導電層4aの成膜工程において、シリコン基板1に対してわずかな隙間を設けて配置された、一定の厚みを有する線状メタルマスク11aを介してスパッタ法等の蒸着工程を行うことにより形成される。また、同様に、セル積層体30には、X方向とZ方向とを含む第2透明導電層4bの断面において、X方向一方側に行くにしたがって、厚さが最も薄い薄層部9bまで減少する層厚減少部7bが現れた後、厚さが薄層部9aに比べて増加する層厚増加部6bが現れる。層厚増加部6a及び6b、層厚減少部7a及び7bは、それぞれ、厚みが単調に変化するのが好ましい。つまり、層厚増加部6a及び6bでは、薄層部9a及び9bからX方向一方向側に向かって単調に厚みが増加するのが好ましく、層厚減少部7a及び7bでは、薄層部9a及び9bに向かって単調に厚みが減少するのが好ましい。 In this state, the thickness of the cell laminate 30 decreases to the thinnest thin layer portion 9a as it goes to one side in the X direction in the cross section of the first transparent conductive layer 4a including the X direction and the Z direction. After the layer thickness decreasing portion 7a appears, the layer thickness increasing portion 6a whose thickness increases as compared with the thin layer portion 9a appears. The layer thickness decreasing portion 7a and the layer thickness increasing portion 6a are arranged with a slight gap with respect to the silicon substrate 1 in the film forming process of the first transparent conductive layer 4a, and are linear metals having a constant thickness. It is formed by performing a vapor deposition process such as a sputtering method via the mask 11a. Similarly, in the cross section of the second transparent conductive layer 4b including the X direction and the Z direction, the cell laminate 30 decreases to the thinnest thin layer portion 9b toward one side in the X direction. After the layer thickness decreasing portion 7b appears, the layer thickness increasing portion 6b whose thickness increases as compared with the thin layer portion 9a appears. It is preferable that the thicknesses of the layer thickness increasing portions 6a and 6b and the layer thickness decreasing portions 7a and 7b change monotonically, respectively. That is, it is preferable that the thickness of the layer thickness increasing portions 6a and 6b increases monotonically from the thin layer portions 9a and 9b toward the unidirectional side in the X direction, and that of the layer thickness decreasing portions 7a and 7b, the thin layer portions 9a and 9b It is preferable that the thickness decreases monotonically toward 9b.

なお、上記実施例では、メタルマスクとスパッタ装置を用いた蒸着工程を経ることによって、層厚減少部7a,7b及び層厚増加部6a,6bが形成されている。しかし、シリコン基板1の第1主面及び第2主面上の全面に第1及び第2透明導電層4a,4bを形成した後、所望の方法を用いて部分的にエッチングを実施して層厚減少部7a,7b及び層厚増加部6a,6bを形成しても良い。部分的なエッチングには、エッチングペースト及び塩酸等の薬液を用いてよい。この他、シリコン基板1の第1主面及び第2主面上の全面に第1及び第2透明導電層4a,4bを形成した後、第1及び第2透明導電層4a,4bの厚みを薄くしたい箇所に、例えばエキシマレーザーを照射することによって、層厚減少部7a,7b及び層厚増加部6a,6bを形成しても良い。 In the above embodiment, the layer thickness decreasing portions 7a and 7b and the layer thickness increasing portions 6a and 6b are formed by undergoing a vapor deposition step using a metal mask and a sputtering apparatus. However, after forming the first and second transparent conductive layers 4a and 4b on the entire surfaces of the first main surface and the second main surface of the silicon substrate 1, the layers are partially etched by a desired method. The thickness decreasing portions 7a and 7b and the layer thickness increasing portions 6a and 6b may be formed. For partial etching, an etching paste or a chemical solution such as hydrochloric acid may be used. In addition, after forming the first and second transparent conductive layers 4a and 4b on the entire surfaces of the first main surface and the second main surface of the silicon substrate 1, the thicknesses of the first and second transparent conductive layers 4a and 4b are increased. The layer thickness decreasing portions 7a and 7b and the layer thickness increasing portions 6a and 6b may be formed by irradiating the portion to be thinned with, for example, an excimer laser.

本実施形態において、第1透明導電層4aを形成する際に線状メタルマスク11aが配置されていた領域である薄層部9aは、第1透明導電層4aが存在しない部分であってもよく、厚みがごく薄い部分であってもよい。同様に、薄層部9bは第2透明導電層4bが存在しない部分であってもよく、厚みがごく薄い部分であってもよい。厚みが薄い部分、とは、例えば、太陽電池セル40の中心部付近における第1透明導電層4a及び第2透明導電層4bの厚みと比べて約10%〜15%程度の厚みであることを意味する。換言すれば、厚さが薄い部分、とは、第1透明導電層4a及び第2透明導電層4bのうち、層厚増加部6a、6bや、層厚減少部7a、7bを含まない領域の平均的な厚みと比べて約10%〜15%程度の厚みである。また、薄層部9a,9bにおいては、透明導電層が非連続的に形成されていてもよく、その場合は、透明導電層が薄く形成された領域とほぼ形成されていない領域とが混在し、透明導電層はアイランド状に形成されていてよい。 In the present embodiment, the thin layer portion 9a, which is the region where the linear metal mask 11a is arranged when the first transparent conductive layer 4a is formed, may be a portion where the first transparent conductive layer 4a does not exist. , It may be a very thin portion. Similarly, the thin layer portion 9b may be a portion where the second transparent conductive layer 4b does not exist, or may be a portion having a very thin thickness. The thin portion is, for example, about 10% to 15% thicker than the thickness of the first transparent conductive layer 4a and the second transparent conductive layer 4b in the vicinity of the central portion of the solar cell 40. means. In other words, the thin portion is a region of the first transparent conductive layer 4a and the second transparent conductive layer 4b that does not include the layer thickness increasing portions 6a and 6b and the layer thickness decreasing portions 7a and 7b. It is about 10% to 15% thicker than the average thickness. Further, in the thin layer portions 9a and 9b, the transparent conductive layer may be formed discontinuously, and in that case, a region in which the transparent conductive layer is thinly formed and a region in which the transparent conductive layer is hardly formed coexist. , The transparent conductive layer may be formed in an island shape.

続いて、第1透明導電層4a上に第1主面側集電極5aを形成する。詳しくは、第1透明導電層4a上に、櫛型電極の形状となるように銀ペーストをスクリーン印刷し、180℃程度の温度で1時間程度加熱して第1主面側集電極5aを形成する。銀ペーストは、絶縁性樹脂中に銀の微粒子を分散させた銀ペーストを用いてよい。このとき、第1主面側集電極5aは、層厚増加部6а及び層厚減少部7aと重ならない位置に形成されることが好ましいが、一部が層厚増加部6a及び層厚減少部7aと重なる位置に配置されてもよい。また、Z方向から見たとき、第1主面側集電極5аの一部である周辺部分13аが、第1透明導電層4aと重ならない位置に設けられてもよい。 Subsequently, the first main surface side collecting electrode 5a is formed on the first transparent conductive layer 4a. Specifically, a silver paste is screen-printed on the first transparent conductive layer 4a so as to have the shape of a comb-shaped electrode, and heated at a temperature of about 180 ° C. for about 1 hour to form the first main surface side collecting electrode 5a. do. As the silver paste, a silver paste in which fine silver particles are dispersed in an insulating resin may be used. At this time, the first main surface side collecting electrode 5a is preferably formed at a position where it does not overlap with the layer thickness increasing portion 6а and the layer thickness decreasing portion 7a, but a part thereof is formed at the layer thickness increasing portion 6a and the layer thickness decreasing portion. It may be arranged at a position overlapping with 7a. Further, when viewed from the Z direction, the peripheral portion 13а, which is a part of the first main surface side collecting electrode 5а, may be provided at a position where it does not overlap with the first transparent conductive layer 4a.

これと同様に、第2透明導電層4b上に第2主面側集電極5bを形成する。詳しくは、第2透明導電層4b上に、櫛型電極の形状となるように銀ペーストをスクリーン印刷し、180℃程度の温度で1時間程度加熱して、第2主面側集電極5bを形成する。このとき、第2主面側集電極5bは、層厚増加部6b及び層厚減少部7bと重ならない位置に形成されることが好ましい。しかし、第2主面側集電極5bの少なくとも一部12bが層厚増加部6b及び層厚減少部7bと重なる位置に配置されてもよい。また、Z方向から見たとき、第2主面側集電極5bの一部である周辺部分13bが、第2透明導電層4bと重ならない位置に設けられてもよい。 Similarly to this, the second main surface side collecting electrode 5b is formed on the second transparent conductive layer 4b. Specifically, a silver paste is screen-printed on the second transparent conductive layer 4b so as to have the shape of a comb-shaped electrode, and heated at a temperature of about 180 ° C. for about 1 hour to obtain the second main surface side collecting electrode 5b. Form. At this time, it is preferable that the second main surface side collecting electrode 5b is formed at a position where it does not overlap with the layer thickness increasing portion 6b and the layer thickness decreasing portion 7b. However, at least a part 12b of the second main surface side collecting electrode 5b may be arranged at a position where it overlaps with the layer thickness increasing portion 6b and the layer thickness decreasing portion 7b. Further, when viewed from the Z direction, the peripheral portion 13b, which is a part of the second main surface side collecting electrode 5b, may be provided at a position where it does not overlap with the second transparent conductive layer 4b.

本実施形態では、スクリーン印刷の手法によって銀ペーストを塗布して第1及び第2主面側集電極5a,5bを形成する場合について説明した。しかし、第1及び第2主面側集電極5a,5bは、インクジェット法、導線接着法、スプレー法、真空蒸着法、スパッタ法、又はめっき法等で作製されてもよい。但し、生産性の観点から、銀ペーストを用いたスクリーン印刷法や、銅を用いためっき法による作製が好ましい。また、第1及び第2主面側集電極5a,5bの材料として、アルミニウムなどの他の材料を用いてもよい。 In the present embodiment, the case where the silver paste is applied by the screen printing method to form the first and second main surface side collecting electrodes 5a and 5b has been described. However, the first and second main surface side collecting electrodes 5a and 5b may be manufactured by an inkjet method, a lead wire bonding method, a spray method, a vacuum vapor deposition method, a sputtering method, a plating method or the like. However, from the viewpoint of productivity, production by a screen printing method using a silver paste or a plating method using copper is preferable. Further, other materials such as aluminum may be used as the material of the first and second main surface side collecting electrodes 5a and 5b.

このようにして、図5に示す大面積の太陽電池セル40を作製する。太陽電池セル40には、X方向とZ方向を含む第1透明導電層4aの断面において、X方向に行くにしたがって、厚さが最も薄い薄層部9aまで単調減少する層厚減少部7aが現れた後、厚さが薄層部9aから単調増加する層厚増加部6aが現れる。また、太陽電池セル40には、X方向とZ方向を含む第2透明導電層4bの断面において、X方向に行くにしたがって、厚さが最も薄い薄層部9bまで単調減少する層厚減少部7bが現れた後、厚さが薄層部9bから単調増加する層厚増加部6bが現れる。 In this way, the large-area solar cell 40 shown in FIG. 5 is produced. In the solar cell 40, in the cross section of the first transparent conductive layer 4a including the X direction and the Z direction, a layer thickness reducing portion 7a that monotonically decreases to the thinnest thin layer portion 9a toward the X direction is provided. After appearing, a layer thickness increasing portion 6a whose thickness monotonically increases from the thin layer portion 9a appears. Further, in the solar cell 40, in the cross section of the second transparent conductive layer 4b including the X direction and the Z direction, the layer thickness decreasing portion monotonically decreases to the thinnest thin layer portion 9b toward the X direction. After the appearance of 7b, a layer thickness increasing portion 6b whose thickness monotonically increases from the thin layer portion 9b appears.

次に、大面積の太陽電池セル40を、図1に示す小面積の太陽電池セル50に分割する。図6中、第1透明導電層4aのうち、層厚増加部6aと層厚減少部7aとが対向している箇所において、層厚増加部6aの最も厚い部分と、層厚減少部7aのうち最も厚い部分との幅をT4aとする。レーザー光は、幅T4aの中心付近から両側に0.5mm以内の範囲の任意の箇所に対してZ方向に重なる箇所に、n型の第2非晶質シリコン層3b側からレーザー光Lを照射する。このレーザー光の照射によって、シリコン基板1の厚さの20%以上70%以下の深さまで達する溝19であって、Y方向に延在する溝19を設ける。この溝19は、太陽電池セル40が有する異極性接合部20に達しない深さであることが好ましい。 Next, the large-area solar cell 40 is divided into the small-area solar cells 50 shown in FIG. In FIG. 6, in the first transparent conductive layer 4a, where the layer thickness increasing portion 6a and the layer thickness decreasing portion 7a face each other, the thickest portion of the layer thickness increasing portion 6a and the layer thickness decreasing portion 7a The width with the thickest part is T 4a . The laser light L is emitted from the n-type second amorphous silicon layer 3b side at a place where the laser light overlaps in the Z direction with respect to an arbitrary place within 0.5 mm on both sides from the vicinity of the center of the width T 4a. Irradiate. A groove 19 that reaches a depth of 20% or more and 70% or less of the thickness of the silicon substrate 1 by irradiation with this laser beam, and extends in the Y direction is provided. The groove 19 preferably has a depth that does not reach the heteropolar junction 20 of the solar cell 40.

溝19を形成する際に用いるレーザーの種類としては、YAGレーザーを好適に用いることができ、レーザー光の波長としては基本波長を用いてよく、第2高調波や第3高調波を用いてもよい。なお、レーザー光の照射によって、シリコン基板の厚さの20%以下の深さの溝を設けてもよく、70%以上の深さに達する溝を設けてもよい。その後、太陽電池セル40を、溝19に沿って折り割って、図1に示す小面積の太陽電池セル50を作製する。なお、溝19に沿って折り割る方法以外に、棒を用いて太陽電池セル40を分割したり、溝19の左右に応力をかけて分割したりしてもよい。又は、太陽電池セル40に対して熱源を走査させ、熱膨張を生じさせることで亀裂を成長させて分割してもよい。 A YAG laser can be preferably used as the type of laser used when forming the groove 19, a basic wavelength may be used as the wavelength of the laser light, and a second harmonic or a third harmonic may be used. good. By irradiating the laser beam, a groove having a depth of 20% or less of the thickness of the silicon substrate may be provided, or a groove having a depth of 70% or more may be provided. Then, the solar cell 40 is folded along the groove 19 to produce the solar cell 50 having a small area shown in FIG. In addition to the method of folding along the groove 19, the solar cell 40 may be divided by using a rod, or the solar cell 40 may be divided by applying stress to the left and right sides of the groove 19. Alternatively, the solar cell 40 may be scanned for a heat source to cause thermal expansion to grow and divide the cracks.

このようにレーザー光を用いて太陽電池セル40を分割すると、その分割面には、レーザー光を用いて溝を形成したことの痕跡が表れる。詳しくは、レーザー光を照射した面の側からレーザー光を照射しなかった面に向かって分割面(図1中の側面部8a)の表面状態が変化する。具体的には、レーザー光によって、主としてシリコン基板1が融解・再固化したレーザー照射領域、レーザーを起点として割れ始めた破断領域、結晶性のシリコンウエハのへき開面に沿って割れたへき開領域、がこの順に現れる。平均算術粗さの観点では、へき開領域の算術平均粗さのほうがレーザー照射領域よりも小さい。また、レーザー照射領域、破断領域、へき開領域はこの順に現れるので、小面積となった太陽電池セル50の側面部8aを観察することで、太陽電池セル40が有する二つの主面のうちどちらの面からレーザーを照射したか判断することができる。第1実施形態では、第2主面側に前述のレーザー光照射領域が存在する。またこのような断面の構造は、太陽電池セル50の当該分割面(図1の側面部8a)を顕微鏡やSEM等を用いて観察することにより確認できる。 When the solar cell 40 is divided by using the laser light in this way, traces of forming the groove by using the laser light appear on the divided surface. Specifically, the surface state of the divided surface (side surface portion 8a in FIG. 1) changes from the side of the surface irradiated with the laser beam toward the surface not irradiated with the laser beam. Specifically, the laser irradiation region in which the silicon substrate 1 is mainly melted and resolidified by the laser light, the fracture region in which the silicon substrate 1 begins to crack from the laser, and the cleavage region cracked along the cleavage surface of the crystalline silicon wafer are formed. Appears in this order. From the viewpoint of average arithmetic roughness, the arithmetic mean roughness of the cleavage region is smaller than that of the laser irradiation region. Further, since the laser irradiation region, the fracture region, and the cleavage region appear in this order, by observing the side surface portion 8a of the solar cell 50 having a small area, which of the two main surfaces of the solar cell 40 has can be observed. It can be determined whether the laser is irradiated from the surface. In the first embodiment, the above-mentioned laser light irradiation region exists on the second main surface side. Further, the structure of such a cross section can be confirmed by observing the divided surface (side surface portion 8a in FIG. 1) of the solar cell 50 using a microscope, SEM, or the like.

上記第1実施形態によれば、太陽電池セル50は、側面部8aであるレーザー光照射位置から、X方向の一方向に向かって膜厚が単調増加する層厚増加部6bを含む第2透明導電層4bを備える。この構成により、レーザー光照射位置付近の太陽電池セル50のシート抵抗を高くすることができ、側面部8aにより生じる分割部シャントの影響を低減することができる。したがって、リーク電流パスの生成を抑制でき、太陽電池セル50の出力低下を抑制できる。さらには、第2透明導電層4bが層厚増加部6bを含むことによって、レーザー光照射位置のできるだけ近くにまで第2透明導電層4bを設けることができる。したがって、第2透明導電層4bの電力取り出し性能も良好なものとすることができ、太陽電池セル50の出力低下を抑制することができる。このような構成により、太陽電池セル50は、レーザー光を用いた溝19の形成による出力低下と、電力取出性能の低下による出力低下を共に抑制することができ、発電性能を向上させることができる。 According to the first embodiment, the solar cell 50 includes a second transparent portion 6b including a layer thickness increasing portion 6b in which the film thickness monotonously increases in one direction in the X direction from the laser light irradiation position which is the side surface portion 8a. A conductive layer 4b is provided. With this configuration, the sheet resistance of the solar cell 50 near the laser beam irradiation position can be increased, and the influence of the split portion shunt caused by the side surface portion 8a can be reduced. Therefore, the generation of the leak current path can be suppressed, and the output decrease of the solar cell 50 can be suppressed. Further, since the second transparent conductive layer 4b includes the layer thickness increasing portion 6b, the second transparent conductive layer 4b can be provided as close as possible to the laser light irradiation position. Therefore, the power extraction performance of the second transparent conductive layer 4b can be made good, and the output decrease of the solar cell 50 can be suppressed. With such a configuration, the solar cell 50 can suppress both the output decrease due to the formation of the groove 19 using the laser light and the output decrease due to the decrease in the power extraction performance, and can improve the power generation performance. ..

また、上記第1実施形態によれば、太陽電池セル50は、第1及び第2透明導電層4a、4bのうち、層厚増加部6a,6b及び層厚減少部7a,7bに重畳する領域に設けられた第1及び第2主面側集電極5a,5bを含んでいてもよい。この構成により、第1及び第2主面側集電極5a,5bを形成可能な面積を広くできるので、太陽電池セル50の電力取出性能をさらに高めることができ、発電性能を向上させることができる。 Further, according to the first embodiment, the solar cell 50 is a region of the first and second transparent conductive layers 4a and 4b that overlaps the layer thickness increasing portions 6a and 6b and the layer thickness decreasing portions 7a and 7b. The first and second main surface side collecting electrodes 5a and 5b provided in the above may be included. With this configuration, the area where the first and second main surface side collecting electrodes 5a and 5b can be formed can be widened, so that the power extraction performance of the solar cell 50 can be further improved, and the power generation performance can be improved. ..

また、上記第1実施形態によれば、大面積の太陽電池セル40に対してレーザー光を照射して、シリコン基板の厚さの20%以上70%以下の深さであって、かつ異極性接合部20に達しない深さの溝19を設けたのちに、分割している。このようにして小面積の太陽電池セル50を作成することによって、レーザー光が異極性接合部20に与える影響を低減させ、太陽電池セル50の出力低下を抑制することができるので、太陽電池セル50の発電性能を向上させることができる。 Further, according to the first embodiment, the large-area solar cell 40 is irradiated with laser light to have a depth of 20% or more and 70% or less of the thickness of the silicon substrate and having a different polarity. A groove 19 having a depth that does not reach the joint portion 20 is provided, and then the groove 19 is divided. By creating the solar cell 50 having a small area in this way, the influence of the laser light on the heteropolar junction 20 can be reduced, and the output decrease of the solar cell 50 can be suppressed, so that the solar cell can be suppressed. The power generation performance of 50 can be improved.

また、上記第1実施形態によれば、太陽電池セル50の第2透明導電層4bは、X方向一方側に行くにしたがって膜厚が単調増加する層厚増加部6bを含む。しかし、側面部8aに生じるシャントの影響を低減するためには、側面部8aからX方向一方向に沿って中央部に向かう途中に少なくとも1か所、第2透明導電層4bのシート抵抗が高い箇所、つまり薄層部9bがあればよい。そのため、側面部8a近傍に薄層部9bが存在しない場合、つまり側面部8aよりも太陽電池セル50の中心部側に薄層部が存在する場合であっても効果が得られる。つまり、側面部8aのすぐ近傍においては第2透明導電層4bの厚みが薄層部9bよりも厚く、X方向一方向に沿って太陽電池セル50の中心部に行くにしたがって、薄層部9b及び層厚増加部6bがこの順に現れる形態を有していてもよい。 Further, according to the first embodiment, the second transparent conductive layer 4b of the solar cell 50 includes a layer thickness increasing portion 6b whose film thickness monotonously increases toward one side in the X direction. However, in order to reduce the influence of the shunt generated on the side surface portion 8a, the sheet resistance of the second transparent conductive layer 4b is high at least one place on the way from the side surface portion 8a toward the central portion along one direction in the X direction. It suffices if there is a place, that is, a thin layer portion 9b. Therefore, the effect can be obtained even when the thin layer portion 9b does not exist in the vicinity of the side surface portion 8a, that is, when the thin layer portion exists on the central portion side of the solar cell 50 with respect to the side surface portion 8a. That is, in the immediate vicinity of the side surface portion 8a, the thickness of the second transparent conductive layer 4b is thicker than that of the thin layer portion 9b, and the thin layer portion 9b goes toward the center of the solar cell 50 along one direction in the X direction. And the layer thickness increasing portion 6b may have a form in which they appear in this order.

次に、太陽電池セル50の第2透明導電層4bの形成を例に挙げて、メタルマスクと、形成後の第2透明導電層4bの形状との関係を説明する。図7は、一試験例における、太陽電池セル50の第2透明導電層4bの膜厚の変化と、線状メタルマスク11bの配置位置との関係を表す模式図である。図7に示すように、一試験例では、Z方向から見たとき、層厚増加部6bの一部が、線状メタルマスク11bに重ならない箇所に存在し、層厚増加部6bの他の一部が、線状メタルマスク11bに重なる箇所に存在する。 Next, the relationship between the metal mask and the shape of the second transparent conductive layer 4b after formation will be described by taking the formation of the second transparent conductive layer 4b of the solar cell 50 as an example. FIG. 7 is a schematic view showing the relationship between the change in the film thickness of the second transparent conductive layer 4b of the solar cell 50 and the arrangement position of the linear metal mask 11b in one test example. As shown in FIG. 7, in one test example, when viewed from the Z direction, a part of the layer thickness increasing portion 6b is present at a portion that does not overlap the linear metal mask 11b, and the other layer thickness increasing portion 6b is present. A part is present at a position overlapping the linear metal mask 11b.

図7に示すように、線状メタルマスク11bを設けた位置では、線状メタルマスク11bの直下において第2透明導電層4bを生成しにくくできる。また、Z方向から見たとき、線状メタルマスク11bに重なる箇所でも、第2透明導電層4bの成膜の際、第2透明導電層4bの原材料の一部が、線状メタルマスク11bと第2非晶質シリコン層3bとの間に侵入する。このようにして、第2透明導電層4bに、X方向に行くにしたがって膜厚が単調増加する層厚増加部6bを形成できる。 As shown in FIG. 7, at the position where the linear metal mask 11b is provided, it is possible to make it difficult to form the second transparent conductive layer 4b directly under the linear metal mask 11b. Further, even in a portion overlapping the linear metal mask 11b when viewed from the Z direction, when the second transparent conductive layer 4b is formed, a part of the raw material of the second transparent conductive layer 4b is formed with the linear metal mask 11b. It penetrates between the second amorphous silicon layer 3b and the second amorphous silicon layer 3b. In this way, the layer thickness increasing portion 6b whose film thickness increases monotonically toward the X direction can be formed on the second transparent conductive layer 4b.

任意の幅の線状メタルマスク11bを用いて作製したサンプルにおける第2透明導電層4bの断面を観察したところ、線状メタルマスク11bの幅よりも広範囲な領域で膜厚変化領域が観察された。一方、線状メタルマスク11bのX方向中央直下付近においても第2透明導電層4bが僅かに検出され、第2透明導電層4bが存在しない領域が殆ど存在しなかった。つまり、線状メタルマスク11bの配置位置の端部は、第2透明導電層4bのうち、一定の厚みを有する部分と、層厚増加部6b又は層厚減少部7bと、の境界に当たる箇所とは一致しておらず、線状メタルマスク11bが設けられた領域よりも広範囲において膜厚変化領域が観察された。 When the cross section of the second transparent conductive layer 4b in the sample prepared by using the linear metal mask 11b having an arbitrary width was observed, a film thickness change region was observed in a region wider than the width of the linear metal mask 11b. .. On the other hand, the second transparent conductive layer 4b was slightly detected even in the vicinity of the linear metal mask 11b immediately below the center in the X direction, and there was almost no region where the second transparent conductive layer 4b did not exist. That is, the end portion of the arrangement position of the linear metal mask 11b is a portion of the second transparent conductive layer 4b that corresponds to the boundary between the portion having a certain thickness and the layer thickness increasing portion 6b or the layer thickness decreasing portion 7b. Did not match, and a film thickness change region was observed in a wider range than the region where the linear metal mask 11b was provided.

これは、線状メタルマスク11bが厚みを有することと、第2透明導電層4bを設ける前の積層体との間にごくわずかな隙間を設けて線状メタルマスク11bを配置することに起因する。線状メタルマスク11bの厚みが厚くなるほど、また線状メタルマスク11bと積層体との隙間が大きいほど、第2透明導電層4bの厚みが変化する領域の幅が広くなり、層厚増加部6bの幅及び層厚減少部7bの幅が大きくなる。例えば、メタルマスク11bの厚みが約1.5mmであり、メタルマスク11bと積層体との間に約0.5mmの隙間が設けられる場合、層厚増加部6bの幅は約2.5mmとなるが、これは一例である。線状メタルマスク11bと積層体との隙間の大きさは、層厚増加部6bのうち線状メタルマスク11bに覆われる部分の幅に影響を与える。線状メタルマスク11bの厚みは、層厚増加部6bのうち、線状メタルマスクに覆われていない領域の幅に影響を与える。なお、メタルマスクの配置位置やメタルマスクの厚みが、第2透明導電層4bの厚み変化に及ぼす影響はこれに限定されない。周辺部メタルマスク10bと第2透明導電層4bの周辺部の厚み変化に対しても同様の関係がみられる。 This is due to the fact that the linear metal mask 11b has a thickness and that the linear metal mask 11b is arranged with a very small gap between the laminated body before the second transparent conductive layer 4b is provided. .. The thicker the thickness of the linear metal mask 11b and the larger the gap between the linear metal mask 11b and the laminate, the wider the width of the region where the thickness of the second transparent conductive layer 4b changes, and the layer thickness increasing portion 6b And the width of the layer thickness reduction portion 7b are increased. For example, when the thickness of the metal mask 11b is about 1.5 mm and a gap of about 0.5 mm is provided between the metal mask 11b and the laminated body, the width of the layer thickness increasing portion 6b is about 2.5 mm. But this is just an example. The size of the gap between the linear metal mask 11b and the laminated body affects the width of the portion of the layer thickness increasing portion 6b covered by the linear metal mask 11b. The thickness of the linear metal mask 11b affects the width of the region of the layer thickness increasing portion 6b that is not covered by the linear metal mask. The influence of the arrangement position of the metal mask and the thickness of the metal mask on the change in the thickness of the second transparent conductive layer 4b is not limited to this. A similar relationship can be seen with respect to changes in the thickness of the peripheral portion of the peripheral portion metal mask 10b and the second transparent conductive layer 4b.

このような構成にすることにより、太陽電池セル50の中心部付近の面積あたりの抵抗を、太陽電池セル50の端部の面積当たりの抵抗よりも高めることができる。第2透明導電層4bを例に説明すると、第2透明導電層4bの厚みがほぼ均一である太陽電池セル50の中心部付近では、透明導電層としてのシート抵抗が40〜200Ω/□(ohm per square)程度であるのに対し、薄層部9bでは40〜10Ω/□であり、更に薄層部9bにおいて透明導電層がアイランド状に存在する場合には、透明導電層としてのシート抵抗は10〜10Ω/□程度に高まることが判った。 With such a configuration, the resistance per area near the center of the solar cell 50 can be made higher than the resistance per area at the end of the solar cell 50. Taking the second transparent conductive layer 4b as an example, the sheet resistance as the transparent conductive layer is 40 to 200 Ω / □ (ohm) in the vicinity of the central portion of the solar cell 50 in which the thickness of the second transparent conductive layer 4b is substantially uniform. While it is about per square), it is 40 to 10 4 Ω / □ in the thin layer portion 9b, and when the transparent conductive layer is present in an island shape in the thin layer portion 9b, the sheet as the transparent conductive layer. It was found that the resistance increased to about 10 4 to 10 8 Ω / □.

なお、大面積の太陽電池セル50及び小面積の太陽電池セル40が備える第2透明導電層4bの厚みは、分光エリプソメーターによる膜厚測定、抵抗測定器(テスター)による抵抗値の実測、または電子顕微鏡等を用いた表面観察及び断面観察等によって確認することができる。いずれの方法であっても、第2透明導電層4b、層厚増加部6b、層厚減少部7b、薄層部9b等を含む複数の観察・測定ポイントにおいて個別に厚みの計測を行う。個別の測定点における厚み測定を繰り返すことにより厚みの変化を計測する。これは第1透明導電層4aにおいても同様である。 The thickness of the second transparent conductive layer 4b included in the large-area solar cell 50 and the small-area solar cell 40 can be measured by measuring the film thickness with a spectroscopic ellipsometer, measuring the resistance value with a resistance measuring device (tester), or measuring the resistance value. It can be confirmed by surface observation and cross-sectional observation using an electron microscope or the like. In either method, the thickness is individually measured at a plurality of observation / measurement points including the second transparent conductive layer 4b, the layer thickness increasing portion 6b, the layer thickness decreasing portion 7b, the thin layer portion 9b, and the like. The change in thickness is measured by repeating the thickness measurement at each measurement point. This also applies to the first transparent conductive layer 4a.

すなわち、大面積の太陽電池セル40は、n型で結晶性のシリコン基板1と、シリコン基板1のZ方向の第1主面側に設けられたp型の第1非晶質シリコン層3aと、シリコン基板1のZ方向の第2主面側に設けられたn型の第2非晶質シリコン層3bと、を備える。また、太陽電池セル40は、第1非晶質シリコン層3aのZ方向のシリコン基板1側とは反対側と、第2非晶質シリコン層3bのZ方向のシリコン基板1側とは反対側とのうちの少なくとも一方側に設けられた第1及び第2透明導電層4a,4bを備える。また、直線の延在方向であるX方向とZ方向を含む第1及び第2透明導電層4a,4bの断面において、X方向に行くにしたがって、厚さが最も薄い薄層部9a,9bまで単調減少する層厚減少部7a,7bが現れる。また、その後、当該断面において、X方向に行くにしたがって、厚さが薄層部9a,9bから単調増加する層厚増加部6a,6bが現れるX方向が存在する。 That is, the large-area solar cell 40 includes an n-type crystalline silicon substrate 1 and a p-type first amorphous silicon layer 3a provided on the first main surface side of the silicon substrate 1 in the Z direction. , An n-type second amorphous silicon layer 3b provided on the second main surface side of the silicon substrate 1 in the Z direction. Further, the solar cell 40 is on the side opposite to the silicon substrate 1 side in the Z direction of the first amorphous silicon layer 3a and the side opposite to the silicon substrate 1 side in the Z direction of the second amorphous silicon layer 3b. The first and second transparent conductive layers 4a and 4b provided on at least one side of the above are provided. Further, in the cross sections of the first and second transparent conductive layers 4a and 4b including the X direction and the Z direction which are the extending directions of the straight line, the thinnest thin layer portions 9a and 9b are reached in the X direction. Layer thickness reduction portions 7a and 7b appear monotonically decreasing. After that, in the cross section, there is an X direction in which the layer thickness increasing portions 6a and 6b whose thickness monotonically increases from the thin layer portions 9a and 9b appear in the X direction.

ここで、幅T4aと同様に、第2透明導電層4bにおいて典型的な厚みよりも厚みが薄い部分をT4bとする。このとき、T4aの幅はT4bの幅と同じであってもよく、T4bの幅がT4aの幅よりも広くなるように設けてもよい。太陽電池セル40の製造に当たっては、T4aが設けられる位置とT4bが設けられる位置を完全に一致させることは難しい場合がある。この場合、レーザー光を直接照射する面側に設けられるT4bに比べて、レーザー光を照射しない面側のT4a の幅を大きくすることによって、レーザー光を照射した位置において第1及び第2透明導電層のどちらもが存在しないか、またはごく薄い膜厚で存在するようにできる。このような構成により、第1主面側においても、第2主面側においても、太陽電池セル50の側面部8aに起因するシャントの影響を確実に低減させることができる。つまり、太陽電池セル50の出力低下を抑制することができるので、太陽電池セル50の発電性能を向上させることができる。 Here, similarly to the width T 4a , the portion of the second transparent conductive layer 4b that is thinner than the typical thickness is referred to as T 4b . The width of the T 4a may be the same as the width of the T 4b, it may be provided such that the width of the T 4b becomes wider than the width of the T 4a. In manufacturing the solar cell 40, it may be difficult to completely match the position where the T 4a is provided and the position where the T 4b is provided. In this case, by increasing the width of T 4a on the surface side that is not irradiated with the laser beam as compared with T 4b provided on the surface side that is directly irradiated with the laser beam, the first and second positions are irradiated with the laser beam. Neither of the transparent conductive layers can be present or can be present in a very thin film thickness. With such a configuration, the influence of the shunt caused by the side surface portion 8a of the solar cell 50 can be reliably reduced on both the first main surface side and the second main surface side. That is, since the decrease in the output of the solar cell 50 can be suppressed, the power generation performance of the solar cell 50 can be improved.

また、太陽電池セル製造方法は、n型で結晶性のシリコン基板1と、シリコン基板1のZ方向の第1主面側に位置するp型の第1非晶質シリコン層3aと、シリコン基板1のZ方向の第2主面側に位置するn型の第2非晶質シリコン層3bと、を備える異極性接合部を形成する異極性接合部形成ステップを含む。また、太陽電池セル製造方法は、第1非晶質シリコン層3aのZ方向のシリコン基板1側とは反対側と、第2非晶質シリコン層3bのZ方向のシリコン基板1側とは反対側とのうちの少なくとも一方側の外側に1mm以上2.5mm以下の幅を有する線状メタルマスク11a又は11bを配置するマスク配置ステップを含む。また、太陽電池セル製造方法は、線状メタルマスク11a又は11bのZ方向のシリコン基板1側とは反対側から第1及び第2透明導電層4a,4bを成膜する透明導電層成膜ステップを含む。また、太陽電池セル製造方法は、透明導電層成膜ステップの後、線状メタルマスク11a又は11bを除去するマスク除去ステップを含む。 The solar cell manufacturing method includes an n-type crystalline silicon substrate 1, a p-type first amorphous silicon layer 3a located on the first main surface side of the silicon substrate 1 in the Z direction, and a silicon substrate. A heteropolar junction forming step of forming a heteropolar junction comprising an n-type second amorphous silicon layer 3b located on the second main surface side in the Z direction of 1 is included. Further, the solar cell manufacturing method is opposite to the side of the first amorphous silicon layer 3a opposite to the silicon substrate 1 side in the Z direction and the side of the second amorphous silicon layer 3b opposite to the silicon substrate 1 side in the Z direction. A mask placement step is included in which a linear metal mask 11a or 11b having a width of 1 mm or more and 2.5 mm or less is placed on the outside of at least one side of the side. Further, the solar cell manufacturing method is a transparent conductive layer forming step of forming the first and second transparent conductive layers 4a and 4b from the side of the linear metal mask 11a or 11b opposite to the silicon substrate 1 side in the Z direction. including. Further, the solar cell manufacturing method includes a mask removing step of removing the linear metal mask 11a or 11b after the transparent conductive layer forming step.

また、太陽電池セル製造方法は、マスク除去ステップの後、マスク配置ステップにおいて線状メタルマスク11aが配置されていた第1箇所の幅方向(X方向に一致)の中央付近に対してZ方向に重なる第2箇所にレーザー光を照射することで溝19を形成する溝形成ステップを含む。 Further, in the solar cell manufacturing method, after the mask removing step, the linear metal mask 11a is arranged in the Z direction with respect to the vicinity of the center in the width direction (corresponding to the X direction) of the first place where the linear metal mask 11a is arranged. A groove forming step of forming a groove 19 by irradiating a second overlapping portion with a laser beam is included.

本製造方法によれば、製造した太陽電池セル50に関し、レーザー光照射を用いた溝19の形成及び、溝19を起点としたセル分割に起因する出力低下と、電力取出性能の低下による出力低下を共に抑制でき、発電性能を良好なものにできる。 According to this manufacturing method, with respect to the manufactured solar cell 50, the output is reduced due to the formation of the groove 19 using laser light irradiation and the cell division starting from the groove 19, and the output is reduced due to the deterioration of the power extraction performance. Can be suppressed together, and the power generation performance can be improved.

なお、上記第1実施形態では、側面部8aからX方向に離れる方向に向かって膜厚が単調増加する層厚増加部6aを有する第1透明導電層4aを第1非晶質シリコン層3aの外側に設けると共に、側面部8aからX方向に離れる方向に向かって層厚増加部6bを有する第2透明導電層4bを第2非晶質シリコン層3bの外側に設ける場合について説明した。しかし、図8、すなわち、変形例の太陽電池セル150の模式断面図に示すように、算術平均粗さがZ方向で異なる略平面状の側面部108aであって、レーザー光を用いて分割された側面部108aから、X方向に離れるにしたがって、膜厚が単調増加する層厚増加部106aを有する透明の第1透明導電層104aを第1非晶質シリコン層103aの外側に設ける一方、第2非晶質シリコン層103bの外側には、膜厚が一定の透明導電層104bを設けてもよい。又は、算術平均粗さがZ方向で異なる略平面状の側面部であって、レーザー光を用いて分割された側面部から、X方向に離れる方向に向かって、膜厚が単調増加する層厚増加部を有する透明導電層を第2非晶質シリコン層の外側に設ける一方、第1非晶質シリコン層の外側には、膜厚が一定の透明導電層を設けてもよい。なお、図8において、参照番号101は、シリコン基板であり、参照番号102a,102bは、i型非晶質シリコン層である。 In the first embodiment, the first transparent conductive layer 4a having the layer thickness increasing portion 6a whose film thickness monotonically increases in the direction away from the side surface portion 8a in the X direction is the first amorphous silicon layer 3a. A case where the second transparent conductive layer 4b having the layer thickness increasing portion 6b in the direction away from the side surface portion 8a in the X direction is provided on the outside of the second amorphous silicon layer 3b has been described. However, as shown in FIG. 8, that is, a schematic cross-sectional view of the solar cell 150 of the modified example, the substantially planar side surface portion 108a having different arithmetic average roughness in the Z direction is divided by using laser light. A transparent first transparent conductive layer 104a having a layer thickness increasing portion 106a whose thickness increases monotonically as the distance from the side surface portion 108a increases in the X direction is provided on the outside of the first amorphous silicon layer 103a. 2. A transparent conductive layer 104b having a constant cross section may be provided on the outside of the amorphous silicon layer 103b. Alternatively, the layer thickness is a substantially planar side surface portion in which the arithmetic mean roughness differs in the Z direction, and the film thickness monotonically increases in the direction away from the side surface portion divided by using the laser beam in the X direction. A transparent conductive layer having an increasing portion may be provided on the outside of the second amorphous silicon layer, while a transparent conductive layer having a constant film thickness may be provided on the outside of the first amorphous silicon layer. In FIG. 8, reference number 101 is a silicon substrate, and reference numbers 102a and 102b are i-type amorphous silicon layers.

本実施形態によれば、膜厚が一定の透明導電層104bを設けたことによって透明導電層104bの電力取出性能を高めることができるので、レーザー光照射を用いた溝19の形成に起因する出力低下と、電力取り出し性能の成果による出力低下を共に抑制し、発電性能良好である小面積の太陽電池セル50を製造することができる。 According to the present embodiment, since the power extraction performance of the transparent conductive layer 104b can be improved by providing the transparent conductive layer 104b having a constant film thickness, the output caused by the formation of the groove 19 using the laser light irradiation. It is possible to manufacture a small-area solar cell 50 having good power generation performance by suppressing both the decrease and the output decrease due to the result of the power extraction performance.

また、層厚増加部6aのZ方向のシリコン基板1側とは反対側に第1主面側集電極5aの一部が存在すると共に、層厚増加部6bのZ方向のシリコン基板1側とは反対側に第2主面側集電極5bの一部が存在する場合について説明した。しかし、第1透明導電層の層厚増加部におけるZ方向のシリコン基板側とは反対側に第1主面側集電極が存在しなくてもよい。また、第2透明導電層の層厚増加部におけるZ方向のシリコン基板側とは反対側に第2主面側集電極が存在しなくてもよい。 Further, a part of the first main surface side collecting electrode 5a is present on the side of the layer thickness increasing portion 6a opposite to the silicon substrate 1 side in the Z direction, and the layer thickness increasing portion 6b is on the silicon substrate 1 side in the Z direction. Described the case where a part of the second main surface side collecting electrode 5b is present on the opposite side. However, the first main surface side collecting electrode may not be present on the side opposite to the silicon substrate side in the Z direction in the layer thickness increasing portion of the first transparent conductive layer. Further, the second main surface side collecting electrode may not be present on the side opposite to the silicon substrate side in the Z direction in the layer thickness increasing portion of the second transparent conductive layer.

また、Z方向から見たとき、第1主面側集電極5aが第1透明導電層4aに重ならない周辺部分13aを含み、周辺部分13aが、シリコン基板1、第1非晶質シリコン層3a、及び第2非晶質シリコン層3bの全てと接触しない場合について説明した。また、Z方向から見たとき、第2主面側集電極5bが第1透明導電層4bに重ならない周辺部分13bを含み、周辺部分13bが、シリコン基板1、第1非晶質シリコン層3a、及び第2非晶質シリコン層3bの全てと接触しない場合について説明した。しかし、Z方向から見たとき、第1主面側集電極が第1透明導電層に重ならない周辺部分を含まなくてもよい。Z方向から見たとき、第2主面側集電極が第2透明導電層に重ならない周辺部分を含まなくてもよい。 Further, when viewed from the Z direction, the first main surface side collecting electrode 5a includes a peripheral portion 13a that does not overlap with the first transparent conductive layer 4a, and the peripheral portion 13a includes the silicon substrate 1 and the first amorphous silicon layer 3a. , And the case where it does not come into contact with all of the second amorphous silicon layer 3b has been described. Further, when viewed from the Z direction, the second main surface side collecting electrode 5b includes a peripheral portion 13b that does not overlap with the first transparent conductive layer 4b, and the peripheral portion 13b includes the silicon substrate 1 and the first amorphous silicon layer 3a. , And the case where it does not come into contact with all of the second amorphous silicon layer 3b has been described. However, when viewed from the Z direction, the peripheral portion where the first main surface side collecting electrode does not overlap with the first transparent conductive layer may not be included. When viewed from the Z direction, the peripheral portion where the second main surface side collecting electrode does not overlap with the second transparent conductive layer may not be included.

本実施形態によれば、レーザー光照射を用いた溝19の形成に起因する出力低下と、電力取り出し性能の低下よる出力低下を共に抑制し、発電性能良好である小面積の太陽電池セル50を製造することができる。 According to the present embodiment, a small-area solar cell 50 having good power generation performance by suppressing both an output decrease due to the formation of a groove 19 using laser light irradiation and an output decrease due to a decrease in power extraction performance. Can be manufactured.

本実施形態において、第1導電型がn型であり、n型の結晶シリコン基板を用いる例を説明した。第1導電型はp型であってもよく、この場合、結晶性シリコン基板は、例えば、単結晶シリコン基板にSi原子(珪素原子)に対してホール(正孔ともいう)を導入するボロン原子を不純物として含有させたものを用いることができる。 In the present embodiment, an example in which the first conductive type is n-type and an n-type crystalline silicon substrate is used has been described. The first conductive type may be a p-type, and in this case, the crystalline silicon substrate is, for example, a boron atom that introduces holes (also referred to as holes) into Si atoms (silicon atoms) in a single crystal silicon substrate. Can be used as an impurity.

本実施形態において、線状メタルマスク11aは、周辺部メタルマスク10aにその両端が結合されている直線状の形態である例を説明した。しかし線状メタルマスク11aの形態はこれに限定されるものではなく、複数の直線が交差した編目状であってもよい。第2透明導電層4bを形成するためのメタルマスクの形状もこれと同様である。また、第1透明導電層4aを形成するためのメタルマスクと、第2透明導電層4bを形成するためのメタルマスクの形状は、本実施形態においては同一であるが、必ずしも同一である必要はなく、異なっていてもよい。 In the present embodiment, an example has been described in which the linear metal mask 11a has a linear form in which both ends thereof are connected to the peripheral metal mask 10a. However, the form of the linear metal mask 11a is not limited to this, and may be a stitch shape in which a plurality of straight lines intersect. The shape of the metal mask for forming the second transparent conductive layer 4b is similar to this. Further, the shapes of the metal mask for forming the first transparent conductive layer 4a and the metal mask for forming the second transparent conductive layer 4b are the same in the present embodiment, but they do not necessarily have to be the same. It may be different.

本実施形態の太陽電池セル50は、これを複数用意し、一般的な方法で太陽電池モジュールとすることができる。一般的な方法とは、複数の太陽電池セル50を電気的に接続して太陽電池ストリングを形成する工程を含む。さらに、太陽電池ストリングを、熱硬化性樹脂シート又は熱可塑性樹脂シート等の封止材、及び強化ガラス板や樹脂フィルムなど耐候性の高いシート等で表裏から保護する工程を含む。 A plurality of the solar cell 50 of the present embodiment can be prepared and used as a solar cell module by a general method. The general method includes a step of electrically connecting a plurality of solar cell 50s to form a solar cell string. Further, the step of protecting the solar cell string from the front and back with a sealing material such as a thermosetting resin sheet or a thermoplastic resin sheet, and a highly weather resistant sheet such as a tempered glass plate or a resin film is included.

(第2の実施形態)
次に、第1導電型の結晶性シリコン基板に熱拡散によって第2導電型領域を設ける太陽電池セルに対する本願技術的思想の適用について、図9〜図12を用いて説明する。図9〜図11は、製造途中の第2実施形態の太陽電池セルの模式断面図を示し、図12は、第2実施形態の太陽電池セル250の模式断面図を示す。
(Second Embodiment)
Next, the application of the technical idea of the present application to a solar cell in which a second conductive type region is provided by thermal diffusion on a first conductive type crystalline silicon substrate will be described with reference to FIGS. 9 to 12. 9 to 11 show a schematic cross-sectional view of the solar cell of the second embodiment during manufacturing, and FIG. 12 shows a schematic cross-sectional view of the solar cell 250 of the second embodiment.

太陽電池セル250は、例えば、次の方法で形成できる。詳しくは、図9を参照して、先ず、第1導電型の一例としてのp型の結晶性シリコン基板(以下、単にシリコン基板という)201を用意する。そして、必要に応じてシリコン基板201における第1及び第2主面側の表面のうちの少なくとも一方に公知の方法でテクスチャ形状を形成する。 The solar cell 250 can be formed, for example, by the following method. For details, with reference to FIG. 9, first, a p-type crystalline silicon substrate (hereinafter, simply referred to as a silicon substrate) 201 as an example of the first conductive type is prepared. Then, if necessary, a texture shape is formed on at least one of the surfaces on the first and second main surface sides of the silicon substrate 201 by a known method.

続いて、シリコン基板201を拡散炉中に配置し、オキシ塩化リン(POCl)などの中で加熱することによって、シリコン基板201の第1主面側の表層部に第2導電側の一例としてのn型のn型領域202を形成して半導体接合部である異極性接合部203を形成する。次に形成したn型領域202のうち、レーザー光照射によって分割したい位置が露出するようにエッチングマスクを形成し、n型領域を一部エッチングする。このようにして、n型領域202において厚み(シリコン基板201の表面からの深さ)が相対的に薄い薄厚部202aを形成する。エッチングマスクによって保護される領域の大きさは、例えば、第1実施形態の外周側メタルマスク10aに覆われる領域と同程度とすることができる。 Subsequently, the silicon substrate 201 is placed in a diffusion furnace and heated in phosphorus oxychloride (POCl 3 ) or the like to form a surface layer portion on the first main surface side of the silicon substrate 201 as an example of the second conductive side. The n-type n-type region 202 of the above is formed to form the heteropolar junction 203 which is a semiconductor junction. Next, in the n-type region 202 formed, an etching mask is formed so that the position to be divided is exposed by laser light irradiation, and a part of the n-type region is etched. In this way, the thin portion 202a having a relatively thin thickness (depth from the surface of the silicon substrate 201) is formed in the n-type region 202. The size of the region protected by the etching mask can be, for example, about the same as the region covered by the outer peripheral metal mask 10a of the first embodiment.

異極性接合部203を形成したシリコン基板201は、さらに以下のような構成を備える。シリコン基板201の第1主面側には、n型領域202に重ねるように反射防止膜204を形成する。反射防止膜204は、窒化シリコン膜等から成り、例えばシラン(SiH)とアンモニア(NH)との混合ガスを用いたプラズマCVD法などで形成される。この他、SiO、AlOなどが用いられてもよい。また、シリコン基板201の第2主面側には裏面側電極205が設けられる。裏面側電極は、アルミニウム等の金属薄膜層からなりシリコン基板201の第2主面側のほぼ全面を覆う薄膜電極か、又は、銀や銅など導電性の高い材料を用いて櫛形形状に形成したグリッド電極である。図9に示すように、電極205は、厚さ方向で薄厚部202aに重なる箇所に設けないようにすると好ましい。裏面側電極の形成に続けて、反射防止膜204上にスクリーン印刷等で櫛型電極206を形成する。櫛型電極206は銀等で構成されるのが好ましい。このようにして、図9に示す大面積の太陽電池セル240が製造される。 The silicon substrate 201 on which the different polarity joint portion 203 is formed further has the following configuration. An antireflection film 204 is formed on the first main surface side of the silicon substrate 201 so as to overlap the n-type region 202. The antireflection film 204 is made of a silicon nitride film or the like, and is formed by, for example, a plasma CVD method using a mixed gas of silane (SiH 4 ) and ammonia (NH 4). In addition, SiO, AlO and the like may be used. Further, a back surface side electrode 205 is provided on the second main surface side of the silicon substrate 201. The back surface electrode is a thin film electrode made of a metal thin film layer such as aluminum and covering almost the entire surface of the second main surface side of the silicon substrate 201, or formed in a comb shape using a highly conductive material such as silver or copper. It is a grid electrode. As shown in FIG. 9, it is preferable that the electrode 205 is not provided at a position overlapping the thin portion 202a in the thickness direction. Following the formation of the back surface side electrode, the comb-shaped electrode 206 is formed on the antireflection film 204 by screen printing or the like. The comb-shaped electrode 206 is preferably made of silver or the like. In this way, the large-area solar cell 240 shown in FIG. 9 is manufactured.

次に、図10に示すように、太陽電池セル240に対し、薄厚部202aにZ方向に重なる第2主面側の外部からレーザー光Lを照射し、図11に示すように、シリコン基板201の第2主面側に溝219を形成する。溝219は、深さ方向がZ方向に略一致し、延在方向がY方向に略一致する。続いて、溝219が形成された大面積の太陽電池セル240を、例えば、手で折り割って、図12に示すような小面積の太陽電池セル250が製造される。 Next, as shown in FIG. 10, the solar cell 240 is irradiated with laser light L from the outside on the second main surface side that overlaps the thin portion 202a in the Z direction, and as shown in FIG. 11, the silicon substrate 201 is irradiated. A groove 219 is formed on the second main surface side of the above. The depth direction of the groove 219 substantially coincides with the Z direction, and the extending direction substantially coincides with the Y direction. Subsequently, the large-area solar cell 240 in which the groove 219 is formed is, for example, manually folded to produce a small-area solar cell 250 as shown in FIG.

図 12に示すように、太陽電池セル250には、Z方向に略平行に延在する側面が、算術平均粗さがZ方向で異なる側面部208aを含む。側面部208aは、レーザー光の照射に起因して形成される。また、太陽電池セル250には、側面部208aから一方向(X方向に一致)に離れる方向に向かって単位面積当たりの抵抗率が単調減少する抵抗減少部202bが現れる一方向が存在する。この抵抗減少部202bは、側面部208aから一方向に離れる方向に向かってn型領域202の厚みが単調増加する層厚増加部に一致する。 As shown in FIG. 12, the solar cell 250 includes a side surface portion 208a whose side surface extending substantially parallel to the Z direction has an arithmetic mean roughness different in the Z direction. The side surface portion 208a is formed due to the irradiation of laser light. Further, the solar cell 250 has one direction in which a resistance reducing portion 202b in which the resistivity per unit area decreases monotonically toward a direction away from the side surface portion 208a in one direction (corresponding to the X direction) appears. The resistance reducing portion 202b corresponds to a layer thickness increasing portion in which the thickness of the n-type region 202 monotonically increases in a direction away from the side surface portion 208a in one direction.

第1実施形態で説明したように、エッチングマスクを行っても、エッチングマスクの幅方向の端部では、マスクの効果が不十分となる。当該層厚増加部は、このことに起因して形成される。熱拡散型の太陽電池セル250は、n型領域202の厚みがキャリアの回収に影響し、第2実施形態のn型領域202の厚さを変動させることは、第1実施形態の第1透明導電層4aの厚さを変動させることに相当する。そして、n型領域202の厚みを側面部208aから一方向に離れる方向に向かって増加させることで、第1実施形態における第1透明導電層4aの厚みを側面部8aから一方向に離れる方向に向かって増加させることと同等の効果を得ることができる。 As described in the first embodiment, even if the etching mask is applied, the effect of the mask is insufficient at the end portion in the width direction of the etching mask. The layer thickness increasing portion is formed due to this. In the heat diffusion type solar cell 250, the thickness of the n-type region 202 affects the recovery of carriers, and varying the thickness of the n-type region 202 of the second embodiment is the first transparency of the first embodiment. This corresponds to varying the thickness of the conductive layer 4a. Then, by increasing the thickness of the n-type region 202 in the direction away from the side surface portion 208a in one direction, the thickness of the first transparent conductive layer 4a in the first embodiment is increased in the direction away from the side surface portion 8a in one direction. The same effect as increasing toward can be obtained.

尚、本発明は、上記第1、第2実施形態、及びそれらの変形例に限定されるものではなく、本願の特許請求の範囲に記載された事項およびその均等な範囲において種々の改良や変更が可能である。例えば、用いる太陽電池セルが例示したものと異なる種類のものであってもよく、所謂PERCセルなども含まれる。 The present invention is not limited to the first and second embodiments described above, and modifications thereof, and various improvements and modifications are made in the matters described in the claims of the present application and in an equivalent range thereof. Is possible. For example, the solar cell used may be of a type different from that illustrated, and includes so-called PERC cells and the like.

また、第1実施形態では、第1導電型がn型であり、第2導電型がp型である場合について説明したが、第1導電型がp型であり、第2導電型がn型でもよい。また、第2実施形態では、第1導電型がp型であり、第2導電型がn型である場合について説明したが、第1導電型がn型であり、第2導電型がp型でもよい。 Further, in the first embodiment, the case where the first conductive type is n type and the second conductive type is p type has been described, but the first conductive type is p type and the second conductive type is n type. But it may be. Further, in the second embodiment, the case where the first conductive type is the p type and the second conductive type is the n type has been described, but the first conductive type is the n type and the second conductive type is the p type. But it may be.

上記のようにして形成した太陽電池セル50を複数用意し、一般的な方法で太陽電池モジュールを形成して用いてよい。太陽電池モジュールを形成する一般的な方法とは、複数の太陽電池セル50を直列接続または並列接続して太陽電池ストリングを形成するステップと、太陽電池モジュールを形成する封止材及び保護部材とを積層して積層体を準備するステップと、前記積層体を加熱及び圧着して太陽電池ストリングを封止するステップと、を含む。また、積層体は、例えば、太陽電池モジュールの表面側保護材に相当する強化ガラス板と、強化ガラス板上に配置された第1の樹脂シートと、第1の樹脂シート上に配置された太陽電池ストリングと、太陽電池ストリングを覆うように配置された第2の樹脂シートと、第二の樹脂シート上に設けられた耐熱性、耐水性の高い樹脂シート又はガラス板等の裏面側保護材と、を含む。 A plurality of solar cell 50s formed as described above may be prepared, and a solar cell module may be formed and used by a general method. A general method for forming a solar cell module is a step of connecting a plurality of solar cell cells 50 in series or in parallel to form a solar cell string, and a sealing material and a protective member for forming the solar cell module. It includes a step of laminating to prepare a laminated body and a step of heating and crimping the laminated body to seal the solar cell string. Further, the laminate includes, for example, a tempered glass plate corresponding to a protective material on the surface side of the solar cell module, a first resin sheet arranged on the tempered glass plate, and the sun arranged on the first resin sheet. A battery string, a second resin sheet arranged so as to cover the solar cell string, and a backside protective material such as a resin sheet or a glass plate having high heat resistance and water resistance provided on the second resin sheet. ,including.

これまで説明してきた方法、すなわち、大面積の太陽電池セル40にレーザーを照射して小面積の太陽電池セル50に加工する方法について、実施形態にて説明した以外の用途にも用いることができる。例えば、図13に示すように、正方形の四隅を面取りした略八角形の形状を有する太陽電池セル350において、面取り部にあたる部分351を上記方法によって除去するために用いてもよい。また、図14に示すように、太陽電池セル440を複数の小面積の太陽電池セル450に加工することに用いてもよい。この場合、複数の太陽電池セル450を直列接続または並列接続し、周知の方法、例えば樹脂等で保護し、小型電子デバイスの給電部材として用いてもよい。 The method described so far, that is, the method of irradiating a large-area solar cell 40 with a laser to process a small-area solar cell 50 into a small-area solar cell 50 can be used for applications other than those described in the embodiments. .. For example, as shown in FIG. 13, in a solar cell 350 having a substantially octagonal shape with chamfered four corners of a square, the portion 351 corresponding to the chamfered portion may be removed by the above method. Further, as shown in FIG. 14, the solar cell 440 may be used for processing the solar cell 450 having a plurality of small areas. In this case, a plurality of solar cell 450s may be connected in series or in parallel, protected by a well-known method such as resin, and used as a power feeding member for a small electronic device.

1,101,201 シリコン基板、 3a,103a 第1非晶質シリコン層、 3b,103b 第2非晶質シリコン層、 4a,104a 第1透明導電層、 4b 第2透明導電層、 5a,105a 第1主面側集電極、 5b,105b 第2主面側集電極、 6a,6b,106a 層厚増加部、 8 側面、 8a,208a 側面部、 9a,9b 薄層部、 19,219 溝、 40,240,440 大面積(分割前)の太陽電池セル、 50,150,250,450 小面積(分割後)の太陽電池セル、 202a 薄厚部、 202b 抵抗減少部、 X方向 一方向、 Y方向 溝の延在方向、 Z方向 太陽電池セルの厚さ方向。 1,101,201 Silicon substrate, 3a, 103a 1st amorphous silicon layer, 3b, 103b 2nd amorphous silicon layer, 4a, 104a 1st transparent conductive layer, 4b 2nd transparent conductive layer, 5a, 105a 1 Main surface side collecting electrode, 5b, 105b 2nd main surface side collecting electrode, 6a, 6b, 106a Layer thickness increasing part, 8 side surface, 8a, 208a side surface part, 9a, 9b thin layer part, 19,219 groove, 40 , 240,440 Large area (before division) solar cell, 50,150,250,450 Small area (after division) solar cell, 202a thin part, 202b resistance reduction part, X direction unidirectional, Y direction groove Extending direction, Z direction Solar cell thickness direction.

Claims (19)

第1主面及び第2主面を備える第1導電型の結晶性シリコン基板と、
前記結晶性シリコン基板の第1主面側に形成された第2導電型の第1半導体層と、
を備える太陽電池セルであって、
前記太陽電池セルは互いに平行である2つの辺を含む辺縁部を有し、前記2つの辺の両方に直交する第1方向に沿って、前記太陽電池セルのシート抵抗が変化する第1のシート抵抗変化部を前記第1主面側の表面又は前記第2主面側の表面のうち一方の表面に備え、
前記第1のシート抵抗変化部は、第1方向に進むにつれてシート抵抗が増加する抵抗増加部と、シート抵抗が減少する抵抗減少部と、をこの順に備える、太陽電池セル。
A first conductive type crystalline silicon substrate having a first main surface and a second main surface,
A second conductive type first semiconductor layer formed on the first main surface side of the crystalline silicon substrate, and
It is a solar cell equipped with
The solar cell has a first edge portion including two sides parallel to each other, and the sheet resistance of the solar cell changes along a first direction orthogonal to both of the two sides. A sheet resistance changing portion is provided on one surface of the surface on the first main surface side or the surface on the second main surface side.
The first sheet resistance changing portion is a solar cell including a resistance increasing portion in which the seat resistance increases as it advances in the first direction and a resistance decreasing portion in which the sheet resistance decreases in this order.
前記結晶性シリコン基板の前記第1主面側の反対面に当たる第2主面上に設けられた、前記第1導電型と同じ導電型の第2半導体層と、
前記第1半導体層又は前記第2半導体層のいずれか一方に接して設けられた第1透明導電層と、を更に備え、
前記第1のシート抵抗変化部の前記抵抗増加部において、前記第1透明導電層の厚みが減少し、
前記第1のシート抵抗変化部の前記抵抗減少部において、前記第1透明導電層の厚みが増加する、請求項1に記載の太陽電池セル。
A second semiconductor layer of the same conductive type as the first conductive type provided on the second main surface corresponding to the opposite surface of the crystalline silicon substrate on the first main surface side, and
A first transparent conductive layer provided in contact with either the first semiconductor layer or the second semiconductor layer is further provided.
In the resistance increasing portion of the first sheet resistance changing portion, the thickness of the first transparent conductive layer decreases, and the thickness of the first transparent conductive layer decreases.
The solar cell according to claim 1, wherein the thickness of the first transparent conductive layer is increased in the resistance reducing portion of the first sheet resistance changing portion.
前記第1半導体層は、前記結晶性シリコン基板の第1主面側に設けられた第2導電型の第1非晶質シリコン層であり、前記第1透明導電層は前記第1半導体層の上に設けられている、請求項2に記載の太陽電池セル。 The first semiconductor layer is a second conductive type first amorphous silicon layer provided on the first main surface side of the crystalline silicon substrate, and the first transparent conductive layer is the first semiconductor layer. The solar cell according to claim 2, which is provided above. 前記第2半導体層上に設けられた第2透明導電層を更に備え、
前記太陽電池セルのシート抵抗が変化する第2のシート抵抗変化部を前記第2主面側に備える、請求項2に記載の太陽電池セル。
A second transparent conductive layer provided on the second semiconductor layer is further provided.
The solar cell according to claim 2, further comprising a second sheet resistance changing portion on the second main surface side, which changes the sheet resistance of the solar cell.
前記抵抗増加部における前記第1透明導電層の厚みの最小値は、前記抵抗増加部における前記第1透明導電層の最大厚みの10%以下である、請求項2又は3に記載の太陽電池セル。 The solar cell according to claim 2 or 3, wherein the minimum value of the thickness of the first transparent conductive layer in the resistance increasing portion is 10% or less of the maximum thickness of the first transparent conductive layer in the resistance increasing portion. .. 前記第2半導体層上に設けられた第2透明導電層を更に備え、前記太陽電池セルのシート抵抗が変化する第2のシート抵抗変化部を前記第2主面側に備えていない、請求項2に記載の太陽電池セル。 The claim that the second transparent conductive layer provided on the second semiconductor layer is further provided, and the second sheet resistance changing portion for changing the sheet resistance of the solar cell is not provided on the second main surface side. 2. The solar cell according to 2. 前記第2導電型の前記第1半導体層は、前記結晶性シリコン基板の前記第1主面側に形成された導電性不純物拡散層であり、
前記太陽電池セルは互いに平行である2つの辺を含む辺縁部を有し、前記2つの辺の両方に直交する第1方向に沿って、前記太陽電池セルのシート抵抗が変化する第1のシート抵抗変化部を前記第1主面側に備え、
前記第1のシート抵抗変化部は、第1方向に進むにつれてシート抵抗が増加する抵抗増加部と、シート抵抗が減少する抵抗減少部と、をこの順に備える、請求項1に記載の太陽電池セル。
The first semiconductor layer of the second conductive type is a conductive impurity diffusion layer formed on the first main surface side of the crystalline silicon substrate.
The solar cell has a first edge portion including two sides parallel to each other, and the sheet resistance of the solar cell changes along a first direction orthogonal to both of the two sides. A seat resistance changing portion is provided on the first main surface side.
The solar cell according to claim 1, wherein the first sheet resistance changing portion includes a resistance increasing portion in which the seat resistance increases as it advances in the first direction and a resistance decreasing portion in which the sheet resistance decreases in this order. ..
第1導電型の結晶性シリコン基板と、前記結晶性シリコン基板の第1主面側に形成された第2導電型の第1半導体層と、を備える太陽電池セルであって、
前記結晶性シリコン基板の厚さ方向に延在する側面は、算術平均粗さが前記厚さ方向で異なる側面部を含み、
前記側面部の近傍に前記第1主面側のシート抵抗が高い高抵抗領域を有し、
前記側面部から前記第1主面の中心までの間の領域に、前記高抵抗領域を起点として前記側面部から一方向に離れるにつれて前記第1主面側のシート抵抗が単調減少する前記一方向を含む、太陽電池セル。
A solar cell including a first conductive type crystalline silicon substrate and a second conductive type first semiconductor layer formed on the first main surface side of the crystalline silicon substrate.
The side surface extending in the thickness direction of the crystalline silicon substrate includes a side surface portion in which the arithmetic mean roughness differs in the thickness direction.
A high resistance region having a high sheet resistance on the first main surface side is provided in the vicinity of the side surface portion.
In the region between the side surface portion and the center of the first main surface, the sheet resistance on the first main surface side monotonically decreases as the distance from the side surface portion in one direction starts from the high resistance region. Including solar cells.
前記側面部は、前記結晶性シリコン基板が溶融したあと固化した痕跡が存在する第1領域と、前記第1領域とは厚み方向に異なる位置に存在し前記結晶性シリコン基板が溶融した痕跡が存在しない第2領域を有する、請求項8に記載の太陽電池セル。 The side surface portion has a first region in which a trace of solidification after melting of the crystalline silicon substrate exists and a trace of melting of the crystalline silicon substrate existing at a position different from the first region in the thickness direction. The solar cell according to claim 8, which has a second region that does not. 前記高抵抗領域におけるシート抵抗は、前記第1主面側の中心部におけるシート抵抗の10倍以上である、請求項8または9に記載の太陽電池セル。 The solar cell according to claim 8 or 9, wherein the sheet resistance in the high resistance region is 10 times or more the sheet resistance in the central portion on the first main surface side. 前記第1領域は、前記側面部のうち第2主面側に存在する、請求項8〜10のいずれか一項に記載の太陽電池セル。 The solar cell according to any one of claims 8 to 10, wherein the first region exists on the second main surface side of the side surface portion. 前記結晶性シリコン基板の前記第2主面側に設けられた第1導電型の非晶質シリコン層と、
前記第1半導体層上に積層された第1透明導電層と、
前記非晶質シリコン層上に積層された第2透明導電層と、
を更に備え、
前記第1半導体層は第2導電型の非晶質シリコン層であり、
抵抗減少部は、前記側面部から前記一方向に離れるにつれて、前記第1透明導電層及び前記第2透明導電層のうち少なくとも一方の厚みが単調増加する層厚増加部を含む、請求項8〜11のいずれか一項に記載の太陽電池セル。
A first conductive amorphous silicon layer provided on the second main surface side of the crystalline silicon substrate, and
The first transparent conductive layer laminated on the first semiconductor layer and
The second transparent conductive layer laminated on the amorphous silicon layer and
Further prepare
The first semiconductor layer is a second conductive type amorphous silicon layer.
8. The resistance reducing portion includes a layer thickness increasing portion in which the thickness of at least one of the first transparent conductive layer and the second transparent conductive layer monotonously increases as the distance from the side surface portion in one direction increases. The solar cell according to any one of 11.
前記層厚増加部のうち厚みが最小である部分の層厚は、前記層厚増加部のうち厚みが最大である部分の層厚の10%以下である、請求項8〜12のいずれか一項に記載の太陽電池セル。 Any one of claims 8 to 12, wherein the layer thickness of the portion having the minimum thickness in the layer thickness increasing portion is 10% or less of the layer thickness of the portion having the maximum thickness in the layer thickness increasing portion. The solar cell described in the section. 前記層厚増加部は前記第1透明導電層に設けられている、請求項8〜13のいずれか一項に記載の太陽電池セル。 The solar cell according to any one of claims 8 to 13, wherein the layer thickness increasing portion is provided on the first transparent conductive layer. 前記第1透明導電層及び前記第2透明導電層の少なくとも一方において、前記層厚増加部に重畳するように集電極が形成されている、請求項8〜14のいずれか一項に記載の太陽電池セル。 The sun according to any one of claims 8 to 14, wherein a collecting electrode is formed so as to overlap the layer thickness increasing portion in at least one of the first transparent conductive layer and the second transparent conductive layer. Battery cell. 厚さ方向から見たとき、前記集電極が前記第2透明導電層に重ならない周辺部分を含み、
前記周辺部分が、前記結晶性シリコン基板、前記第1導電型の前記非晶質シリコン層、及び前記第2導電型の前記非晶質シリコン層の全てと電気的に接触していない、請求項12〜15のいずれか一項に記載の太陽電池セル。
When viewed from the thickness direction, the collecting electrode includes a peripheral portion that does not overlap with the second transparent conductive layer.
Claim that the peripheral portion is not in electrical contact with all of the crystalline silicon substrate, the first conductive type amorphous silicon layer, and the second conductive type amorphous silicon layer. The solar cell according to any one of 12 to 15.
第1主面及び第2主面を有する第1導電型のシリコン基板と、前記シリコン基板の第1主面側に位置する第2導電型の第1非晶質シリコン層と、前記シリコン基板の前記第2主面に位置する第1導電型の第2非晶質シリコン層と、を備える異極性接合部を形成する異極性接合部形成ステップと、
前記異極性接合部形成ステップの後、前記異極性接合部を透明導電層形成用チャンバー内に配置する配置ステップと、
前記配置ステップの後、前記チャンバー内において前記第1非晶質シリコン層及び前記第2非晶質シリコン層のうち少なくとも一方の外側に、線状のマスクを配置するマスク配置ステップと、
前記マスク配置ステップの後、前記マスクを介して前記第1非晶質シリコン層及び前記第2非晶質シリコン層のうち少なくとも一方の上に透明導電層を積層させる透明導電層成膜ステップと、
前記透明導電層成膜ステップの後、前記マスクを除去するマスク除去ステップと、を含む、太陽電池セルの製造方法。
A first conductive type silicon substrate having a first main surface and a second main surface, a second conductive type first amorphous silicon layer located on the first main surface side of the silicon substrate, and the silicon substrate. A heteropolar junction forming step for forming a heteropolar junction comprising a first conductive type second amorphous silicon layer located on the second main surface.
After the non-polar joint forming step, an arrangement step of arranging the non-polar joint in the transparent conductive layer forming chamber, and
After the arrangement step, a mask arrangement step of arranging a linear mask on the outside of at least one of the first amorphous silicon layer and the second amorphous silicon layer in the chamber,
After the mask placement step, a transparent conductive layer film forming step in which a transparent conductive layer is laminated on at least one of the first amorphous silicon layer and the second amorphous silicon layer via the mask.
A method for manufacturing a solar cell, comprising: a mask removing step of removing the mask after the transparent conductive layer forming step.
前記マスク除去ステップの後、前記マスク配置ステップにおいて前記マスクが配置されていた第1領域の幅方向の中央から前記幅方向に0.5mm以内に位置する第2領域において、前記シリコン基板の厚み方向において前記第2領域と重なる第3領域にレーザー光を照射することで溝を形成する溝形成ステップを更に含む、請求項17に記載の太陽電池セルの製造方法。 After the mask removing step, in the second region located within 0.5 mm in the width direction from the center of the width direction of the first region where the mask was placed in the mask placement step, the thickness direction of the silicon substrate. The method for manufacturing a solar cell according to claim 17, further comprising a groove forming step of forming a groove by irradiating a third region overlapping the second region with a laser beam. 請求項8〜16のいずれか一項に記載の太陽電池セルを複数含む、太陽電池モジュール。 A solar cell module including a plurality of solar cells according to any one of claims 8 to 16.
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