JP2021136393A - Silicon wafer surface state diagnostic method and surface modification method - Google Patents

Silicon wafer surface state diagnostic method and surface modification method Download PDF

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JP2021136393A
JP2021136393A JP2020033662A JP2020033662A JP2021136393A JP 2021136393 A JP2021136393 A JP 2021136393A JP 2020033662 A JP2020033662 A JP 2020033662A JP 2020033662 A JP2020033662 A JP 2020033662A JP 2021136393 A JP2021136393 A JP 2021136393A
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JP7390214B2 (en
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太良 津留
Taira Tsuru
太良 津留
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Tokyo Seimitsu Co Ltd
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Abstract

To provide a high quality silicon wafer by performing diagnosis of a surface state and recovery effect confirmation while containing a real time processing (during surface modification).SOLUTION: A surface state diagnostic method of a silicon wafer 1, in a surface modification of the silicon wafer 1 using a laser heat treatment, measures a reflectance ratio or an absorption ratio of a surface of the silicon wafer 1, and measures an electrical property. Also, the measurement of the reflectance ratio or the absorption ratio is performed by a laser of which a wavelength is 532 or 785nm. The electrical property arranges an electrode 4 so as to be closed to a surface treatment part of the silicon wafer 1 to measure an electrostatic capacity formed between the silicon wafer 1 and the electrode 4.SELECTED DRAWING: Figure 2

Description

本発明は、シリコンウエハ表面の加工変質層である表面欠陥の修復に係り、特に、レーザ熱処理を用いたシリコンウエハ表面改質に関し、その表面の改質状況を診断するシリコンウエハ表面状態診断方法及び表面改質方法に関する。 The present invention relates to the repair of surface defects which are processed alteration layers on the surface of a silicon wafer, and particularly regarding the surface modification of a silicon wafer using laser heat treatment, a method for diagnosing the surface condition of a silicon wafer and diagnosing the state of modification of the surface. Regarding the surface modification method.

半導体デバイス等の作製に使用されるシリコンウエハ等の半導体ウェハは、切削・研削・ラッピング・ポッリシングなどの機械加工プロセスによって表面加工が行われている。しかし、その表面及び内部は、加工変質層が形成され、一部の加工変質層には、マイクロクラック(微小亀裂)が含まれる。この内部クラック等の除去は、主にエッチングや化学機械研磨(CMP)等の化学的・機械的方法により行われている。 Semiconductor wafers such as silicon wafers used for manufacturing semiconductor devices and the like are surface-processed by machining processes such as cutting, grinding, lapping, and polling. However, a processed alteration layer is formed on the surface and the inside thereof, and some of the processed alteration layers contain microcracks (microcracks). The removal of internal cracks and the like is mainly performed by chemical and mechanical methods such as etching and chemical mechanical polishing (CMP).

例えば、特許文献1は、単結晶表面にパルスレーザを照射し、パルスレーザ照射部の断面TEM(透過型電子顕微鏡)観察像で評価することを記載している。 For example, Patent Document 1 describes that a single crystal surface is irradiated with a pulse laser and evaluated by a cross-sectional TEM (transmission electron microscope) observation image of the pulse laser irradiation portion.

また、特許文献2は、半導体ウェハの反りを測定し、測定された反りと研削工程で研削された研削深さに基づいて、表面変質層の深さを求めることを記載している。 Further, Patent Document 2 describes that the warp of a semiconductor wafer is measured, and the depth of the surface alteration layer is obtained based on the measured warp and the grinding depth ground in the grinding step.

特開2008−147639号公報Japanese Unexamined Patent Publication No. 2008-147639 特許第6072166号公報Japanese Patent No. 6072166

上記従来技術において、特許文献1に記載のようにTEM(透過型電子顕微鏡)を用いる方法は、観察試料の厚さを数nm程度(観察可能な厚さ)にする必要があり、そのため、試料の準備作業には細心の注意が必要で、時間もかかる。また、試料は電子ビームを浴びることで破壊を伴った計測となる。試料に電子を当てて干渉パターンを観察する電子回折や光と物質の相互作用を利用するラマン分光計測等は、同様であり、非常に高価な装置であり、導入は困難である。 In the above-mentioned prior art, in the method using a TEM (transmission electron microscope) as described in Patent Document 1, the thickness of the observation sample needs to be about several nm (observable thickness), and therefore the sample. Preparatory work requires great care and takes time. In addition, the sample is measured with destruction when exposed to an electron beam. Electron diffraction for observing an interference pattern by irradiating a sample with electrons and Raman spectroscopic measurement using the interaction between light and a substance are similar and are very expensive devices, and are difficult to introduce.

また、特許文献2に記載のように反りを計測して加工変質層を評価する方法は、計測時に荷重がかかるため破壊が進行する恐れがある。さらに、ノッチ部のような広域にわたる曲面等のような形状に対する効率的な計測は、現時点で知られていない。 Further, the method of measuring the warp and evaluating the work-altered layer as described in Patent Document 2 may cause fracture to proceed because a load is applied at the time of measurement. Furthermore, efficient measurement for shapes such as curved surfaces over a wide area such as notches is not known at this time.

本発明の目的は、上記従来技術の課題を解決し、レーザ表面改質機に搭載することも可能とする。そして、本発明は、リアルタイムな加工中(表面改質中)も含め、表面状態の診断、修復効果確認を行うことで、高品質のシリコンウェハを提供することを目的とする。 An object of the present invention is to solve the above-mentioned problems of the prior art so that it can be mounted on a laser surface modifier. An object of the present invention is to provide a high quality silicon wafer by diagnosing the surface condition and confirming the repair effect, including during real-time processing (during surface modification).

上記目的を達成するため、本発明は、レーザ熱処理を用いたシリコンウエハ表面改質におけるシリコンウエハ表面状態診断方法であって、前記シリコンウエハ表面の反射率又は吸収率の測定、及び電気物性を測定する。 In order to achieve the above object, the present invention is a method for diagnosing a silicon wafer surface condition in silicon wafer surface modification using laser heat treatment, in which the reflectance or absorptivity of the silicon wafer surface is measured and the electrical properties are measured. do.

また、前記反射率又は前記吸収率の測定は、波長が532、あるいは785nmのレーザで行うことが望ましい。 Further, it is desirable to measure the reflectance or the absorptance with a laser having a wavelength of 532 or 785 nm.

さらに、前記電気物性は、前記シリコンウエハの表面処理部に近接して電極を配置し、前記シリコンウエハと前記電極間で形成されるコンデンサの静電容量を測定することが望ましい。 Further, for the electrical characteristics, it is desirable to arrange the electrodes in the vicinity of the surface treatment portion of the silicon wafer and measure the capacitance of the capacitor formed between the silicon wafer and the electrodes.

さらに、前記電気物性は、前記シリコンウエハの表面処理部に近接して電極を配置し、前記シリコンウエハと前記電極間に電圧を印加して極板間引力を測定することが望ましい。 Further, for the electrical characteristics, it is desirable to arrange the electrodes in the vicinity of the surface treatment portion of the silicon wafer and apply a voltage between the silicon wafer and the electrodes to measure the attractive force between the plates.

さらに、前記極板間引力は、ひずみゲージで測定することが望ましい。 Further, it is desirable to measure the attractive force between the plates with a strain gauge.

さらに、前記シリコンウエハを載置するリングポールと、リング形状の極板リングに等分割で配置された薄板と、前記薄板に貼り付けられ、ブリッジ回路が構成される前記ひずみゲージと、を備え、前記極板リングを前記シリコンウエハと間隙を持って配置し、前記リングポールと前記極板リングとの間に電圧を印加して前記極板間引力を測定することが望ましい。 Further, a ring pole on which the silicon wafer is placed, a thin plate arranged on a ring-shaped electrode plate ring in equal divisions, and a strain gauge attached to the thin plate to form a bridge circuit are provided. It is desirable to arrange the plate ring with a gap from the silicon wafer and apply a voltage between the ring pole and the plate ring to measure the attractive force between the plates.

また、本発明は、レーザ熱処理を用いたシリコンウエハ表面改質方法であって、前記シリコンウエハ表面の反射率測定又は吸収率の測定するステップ1と、前記シリコンウエハの表面処理部に近接して電極を配置し、前記シリコンウエハと前記電極間で形成されるコンデンサの静電容量を測定するステップ2と、前記ステップ1、前記ステップ2に基づいて前記レーザ熱処理の加工条件を決定するステップ3と、を有する。 Further, the present invention is a silicon wafer surface modification method using laser heat treatment, in which step 1 of measuring the reflectance or absorptance of the silicon wafer surface is close to the surface treatment portion of the silicon wafer. Step 2 in which the electrodes are arranged and the capacitance of the capacitor formed between the silicon wafer and the electrodes is measured, and step 1 and step 3 in which the processing conditions for the laser heat treatment are determined based on the steps 1 and 2. Has.

さらに、前記レーザ熱処理の加工中に、前記ステップ1、前記ステップ2を行い、その結果をフィードバック制御して加工を継続することが望ましい。 Further, it is desirable to perform the steps 1 and 2 during the processing of the laser heat treatment, and to continue the processing by feedback-controlling the results.

本発明によれば、シリコンウエハ表面の反射率又は吸収率の測定、及び電気物性を測定してシリコンウエハ表面状態を診断するので、レーザ表面改質機に搭載することも可能である。リアルタイムな加工中(表面改質中)も含め、表面状態の診断、修復効果確認を行うことで、高品質のシリコンウェハを提供することができる。 According to the present invention, since the silicon wafer surface state is diagnosed by measuring the reflectance or absorptivity of the silicon wafer surface and measuring the electrical characteristics, it can be mounted on a laser surface modifier. High-quality silicon wafers can be provided by diagnosing the surface condition and confirming the repair effect, including during real-time processing (during surface modification).

本発明の一実施形態による光の反射率、あるいは吸収率の測定部を示すブロック図A block diagram showing a light reflectance or absorption rate measuring unit according to an embodiment of the present invention. 一実施形態によるシリコンウェハと電極間の静電容量や極板間引力の測定部を示すブロック図A block diagram showing a unit for measuring capacitance between a silicon wafer and an electrode and an attractive force between plates according to an embodiment. 一実施形態による表面改質(加工)及び診断のフローチャートFlowchart of surface modification (processing) and diagnosis according to one embodiment 一実施形態による極板間引力を測定する構成図Configuration diagram for measuring the attractive force between the plates according to one embodiment 一実施形態による極板リングの平面図Top view of the electrode ring according to one embodiment 図5の側面図Side view of FIG.

図1は、一実施形態による光の反射率、あるいは吸収率の測定部を示すブロック図、図2は、シリコンウェハと電極間の静電容量や極板間引力の測定部を示すブロック図である。加工変質層は、主にアモルファスシリコン層や多結晶状態となっている。この加工変質層は極めて薄いものであるが、機械的・電気的・光学的性能に大きく影響している。 FIG. 1 is a block diagram showing a measurement unit for light reflectance or absorption according to one embodiment, and FIG. 2 is a block diagram showing a measurement unit for capacitance between a silicon wafer and an electrode and an attractive force between plates. be. The work-altered layer is mainly an amorphous silicon layer or a polycrystalline state. Although this process-altered layer is extremely thin, it greatly affects the mechanical, electrical, and optical performance.

本実施形態は、研削やエッチング処理後の加工変質層の表面に関して、反射率(吸収率)の測定や画像解析により表面状態を調べる。また、数μm深さ程度の内部の状態に関しては、532nm、近赤外光(785nm)の波長の計測用レーザを照射して反射率(吸収)を調べる。 In this embodiment, the surface state of the surface of the processed alteration layer after grinding or etching is examined by measuring the reflectance (absorption rate) or performing image analysis. Further, regarding the internal state having a depth of about several μm, the reflectance (absorption) is examined by irradiating a measurement laser having a wavelength of 532 nm and near infrared light (785 nm).

さらに、外部より電圧を印加(シリコンウェハ表面を帯電させる)することで、アモルファス、多結晶シリコン、単結晶シリコンの電気物性(伝導度、静電容量、極板間引力等)の違いを検知し改質状況を調べる。つまり、シリコンウエハ1表面の反射率又は吸収率の測定、及び電気物性を測定したことになる。 Furthermore, by applying a voltage from the outside (charging the surface of the silicon wafer), differences in the electrical characteristics (conductivity, capacitance, attractive force between plates, etc.) of amorphous, polycrystalline silicon, and single crystal silicon are detected. Check the reforming status. That is, the reflectance or absorptivity of the surface of the silicon wafer 1 is measured, and the electrical characteristics are measured.

つまり、本実施形態は、シリコンウェハ1表面状態の診断、修復効果確認を行うため、以下の(1)から(4)を組み合わせて総合的に測定及び評価することが好ましい。
(1)測定面の形状も考慮し、偏光させるなどした近赤外光(785nm)を照射して単結晶の反射率、あるいは吸収率を得る。
(2)シリコンウエハ1の測定面1−1の形状も考慮し、偏光させるなどした可視光、あるいは波長532nmの光を当てアモルファスの反射率、あるいは吸収率を得る。なお、アモルファスシリコン層は、波長532nmの光に強い吸収がある。
(3)画像、接触式等により表面形状(粗さ等も含む)を計測する。
(4)改質前後、及び改質中の加工対象物(シリコンウェハ)の電気物性(電気伝導度、静電容量、極板間引力等)の違いを得る。
That is, in this embodiment, in order to diagnose the surface condition of the silicon wafer 1 and confirm the repair effect, it is preferable to comprehensively measure and evaluate by combining the following (1) to (4).
(1) Considering the shape of the measurement surface, the reflectance or absorptivity of a single crystal is obtained by irradiating with polarized near-infrared light (785 nm).
(2) Considering the shape of the measurement surface 1-1 of the silicon wafer 1, polarized visible light or light having a wavelength of 532 nm is applied to obtain amorphous reflectance or absorption. The amorphous silicon layer has strong absorption of light having a wavelength of 532 nm.
(3) Measure the surface shape (including roughness) by an image, contact type, etc.
(4) Obtain differences in the electrical characteristics (electrical conductivity, capacitance, attractive force between plates, etc.) of the object to be processed (silicon wafer) before and after modification and during modification.

図1において、計測用光源2は、シリコンウエハ1の測定面1−1へ計測用レーザ、あるいは可視光を矢印のように表面に照射する。計測用光源(レーザ熱処理)2は、計測用の光源や波長が532、あるいは785nmのレーザであり、偏光子を介しても良い。そして、その反射光は、フィルターを介してカメラや検出器3で検出、解析し反射率、あるいは吸収率を評価、測定する。 In FIG. 1, the measurement light source 2 irradiates the measurement surface 1-1 of the silicon wafer 1 with a measurement laser or visible light as shown by an arrow. The measurement light source (laser heat treatment) 2 is a measurement light source or a laser having a wavelength of 532 or 785 nm, and may be via a polarizer. Then, the reflected light is detected and analyzed by a camera or a detector 3 via a filter, and the reflectance or the absorptivity is evaluated and measured.

光の反射率(吸収)評価、測定において、溶融中のシリコンの反射率は、固体のそれと比較して30%と高く、表面改質中の反射率測定で表面改質状況を調べることができる。なお、光の反射率(吸収率)の測定は、計測用光源2から測定面1−1へ照射される計測用レーザの入射角の影響を考慮して、偏光子をレーザ出光部の直後に配置することが好ましい。 In the light reflectance (absorption) evaluation and measurement, the reflectance of silicon during melting is as high as 30% as compared with that of solid, and the surface modification status can be examined by the reflectance measurement during surface modification. .. The light reflectance (absorption rate) is measured by placing the polarizer immediately after the laser emission section in consideration of the influence of the incident angle of the measurement laser irradiated from the measurement light source 2 to the measurement surface 1-1. It is preferable to arrange it.

図2は、(4)の電気特性として、シリコンウエハ1と電極4間の静電容量7や極板間引力6の測定を示している。図2において、電極4は、シリコンウエハ1の表面処理部に対応するように近接して配置される。そして、静電容量7や極板間引力6は、シリコンウエハ1と電極4間に電圧5を印加して測定され、改質前後で比較する。 FIG. 2 shows the measurement of the capacitance 7 between the silicon wafer 1 and the electrode 4 and the attractive force 6 between the plates as the electrical characteristics of (4). In FIG. 2, the electrodes 4 are arranged in close proximity to each other so as to correspond to the surface treatment portion of the silicon wafer 1. Then, the capacitance 7 and the attractive force between the plates 6 are measured by applying a voltage 5 between the silicon wafer 1 and the electrode 4, and are compared before and after the modification.

溶融状態のシリコンの電気伝導度は、固体に比べ、100倍以上高いことが知られている。したがって、シリコンウエハ1表面の電気伝導度を測定することで溶融したシリコンの容量を評価することもできる。電気伝導度は、表面処理中に溶融したシリコンの伝導率が変化し、シリコンウエハ1と電極4間で形成されたコンデンサの静電容量7、極板間引力6として変化する。表面改質部の状況は、静電容量7の変化する現象を観察、あるいは測定することで評価することが可能となる。 It is known that the electrical conductivity of molten silicon is 100 times or more higher than that of solid silicon. Therefore, the capacity of the molten silicon can be evaluated by measuring the electrical conductivity of the surface of the silicon wafer 1. The electrical conductivity changes as the capacitance of the capacitor formed between the silicon wafer 1 and the electrode 4 and the attractive force between the plates 6 as the conductivity of the silicon melted during the surface treatment changes. The state of the surface modified portion can be evaluated by observing or measuring the changing phenomenon of the capacitance 7.

図3は、レーザ熱処理を用いた表面改質(加工)及び診断のフローチャートである。表面改質(加工)及び診断は、改質処理対象のシリコンウエハ表面状態を測定、あるいは評価し、それに応じた条件でレーザ照射を行うことにより効率良く、効果的な表面改質を行う。まず、でレーザ照射による加工前にシリコンウエハ1表面の反射率又は吸収率の測定及び画像解析を行う(ステップ1)。
次に、図2で示した方法で静電容量7を評価する(ステップ2)。つまり、ステップ1、ステップ2でシリコンウエハ1表面の反射率又は吸収率の測定、及び電気物性としての静電容量7を測定したことになる。そして、加工条件は、ステップ1、ステップ2の測定及び評価に基づいて決定する(ステップ3)。
FIG. 3 is a flowchart of surface modification (processing) and diagnosis using laser heat treatment. For surface modification (processing) and diagnosis, efficient and effective surface modification is performed by measuring or evaluating the surface condition of the silicon wafer to be modified and irradiating with a laser under the corresponding conditions. First, the reflectance or absorptivity of the surface of the silicon wafer 1 is measured and image analysis is performed before processing by laser irradiation (step 1).
Next, the capacitance 7 is evaluated by the method shown in FIG. 2 (step 2). That is, in steps 1 and 2, the reflectance or absorptivity of the surface of the silicon wafer 1 was measured, and the capacitance 7 as an electrical property was measured. Then, the machining conditions are determined based on the measurements and evaluations of steps 1 and 2 (step 3).

加工中は、ステップ1、ステップ2と同様に表面の反射率測定、静電容量の評価(電気伝導度の変化)を行い、その結果をフィードバック制御して加工を継続する(ステップ4)。 During machining, surface reflectance is measured and capacitance is evaluated (change in electrical conductivity) in the same manner as in steps 1 and 2, and the results are feedback-controlled to continue machining (step 4).

なお、レーザ照射で加工することで、シリコンウエハ1の酸素排除処理及び結晶性の向上が可能であり、パルスレーザを照射することで、シリコンウエハ1表面の加工変質層である表面欠陥の修復が可能である。 By processing with laser irradiation, oxygen elimination treatment and crystallinity of silicon wafer 1 can be improved, and by irradiating pulse laser, surface defects, which are processing alteration layers on the surface of silicon wafer 1, can be repaired. It is possible.

特に、シリコンウエハ1の研削後、その表面形状に対応して、少なくとも入射角、s偏光とp偏光の成分、エネルギ密度、単位面積当たりの照射回数のいずれか一つを変化させてパルスレーザを照射することで、加工応力の影響をなくし均一な表面に改質することができる。 In particular, after grinding the silicon wafer 1, at least one of the incident angle, the components of s-polarized light and p-polarized light, the energy density, and the number of irradiations per unit area is changed according to the surface shape of the pulse laser. By irradiating, the influence of processing stress can be eliminated and a uniform surface can be modified.

また、パルスレーザ(ナノ秒)照射による加工は、加工変質層のアモルファス層をナノ秒速で溶融する。そして、パルスレーザ(ナノ秒)照射による溶融は、結晶方位が揃った再結晶化(エピタキシャル成長)を進展させ、機械加工で生じた結晶欠陥を無くすことができる。 Further, in the processing by pulse laser (nanosecond) irradiation, the amorphous layer of the processing alteration layer is melted at the nanosecond speed. Then, melting by pulse laser (nanosecond) irradiation promotes recrystallization (epitaxial growth) in which the crystal orientations are aligned, and crystal defects generated by machining can be eliminated.

加工後は、ステップ1、ステップ2と同様に表面の反射率測定、画像解析、静電容量の評価(ステップ5、ステップ6)を行い、品質評価をして仕様に対してOKかNGかを判定する(ステップ7)。
以上により、シリコンウエハ1は、加工中も表面状態の診断、修復効果確認を行うので、高品質にすることができる。
After processing, surface reflectance measurement, image analysis, and capacitance evaluation (steps 5 and 6) are performed in the same manner as in steps 1 and 2, and quality evaluation is performed to determine whether the specifications are OK or NG. Judgment (step 7).
As described above, the silicon wafer 1 can be made of high quality because the surface condition is diagnosed and the repair effect is confirmed even during processing.

図4は、極板間引力6を測定する構成図である。図5は極板リング10の平面図、図6は、側面図である。図2で示した極板間引力6は、ひずみゲージ10−2で測定する。図4において、シリコンウエハ1は、リングポール11に載置される。極板リング10は、図2で示した電極4に相当するもので、リング形状のコンプライアンス構造(柔構造)とされている。 FIG. 4 is a configuration diagram for measuring the attractive force 6 between the plates. FIG. 5 is a plan view of the electrode plate ring 10, and FIG. 6 is a side view. The attractive force 6 between the plates shown in FIG. 2 is measured with a strain gauge 10-2. In FIG. 4, the silicon wafer 1 is placed on the ring pole 11. The electrode plate ring 10 corresponds to the electrode 4 shown in FIG. 2, and has a ring-shaped compliance structure (flexible structure).

薄板10−1は、極板リング10の上面に120°の等分割でコンプライアンスを持って配置されている。ひずみゲージ10−2は、薄板10−1の中心付近にそれぞれ貼り付けられている。また、3個のひずみゲージ10−2は、ブリッジ回路が構成され、薄板10−1に掛かる応力を検出する。 The thin plate 10-1 is arranged on the upper surface of the electrode plate ring 10 in compliance with an equal division of 120 °. The strain gauges 10-2 are attached near the center of the thin plate 10-1, respectively. Further, the three strain gauges 10-2 form a bridge circuit and detect the stress applied to the thin plate 10-1.

電圧5は、リングポール11と極板リング10との間に印加される。シリコンウエハ1は、リングポール11に載置されるので、電圧5は、シリコンウエハ1と極板リング10との間に印加されたことになる。なお、リングポール11は、シリコンウエハ1を載置する通常の回転テーブルに装着しても良い。 The voltage 5 is applied between the ring pole 11 and the plate ring 10. Since the silicon wafer 1 is placed on the ring pole 11, the voltage 5 is applied between the silicon wafer 1 and the electrode plate ring 10. The ring pole 11 may be mounted on a normal rotary table on which the silicon wafer 1 is placed.

極板リング10は、図6に示すように、爪部10−3が回転可能として設けられている。爪部10−3は、極板リング10の内側へ図6(a)の矢印のように回転可能とされ、所定位置(図6で90°)で図6(b)のように固定される。したがって、シリコンウエハ1と極板リング10は、図6(b)で示すように間隙を持って配置され、図2の静電容量7を形成する。 As shown in FIG. 6, the electrode plate ring 10 is provided so that the claw portion 10-3 can rotate. The claw portion 10-3 is rotatable inward of the electrode plate ring 10 as shown by the arrow in FIG. 6 (a), and is fixed at a predetermined position (90 ° in FIG. 6) as shown in FIG. 6 (b). .. Therefore, the silicon wafer 1 and the electrode plate ring 10 are arranged with a gap as shown in FIG. 6B to form the capacitance 7 of FIG.

つまり、図2で示した電極4は、シリコンウエハ1を挟み込むようにされ、極板間引力6をひずみゲージ10−2で検出する。シリコンウエハ1と極板リング10との間隙は、数100μmに設定する。極板間引力6は、アモルファスシリコン、多結晶シリコン、単結晶シリコンとで伝導率(移動度、比抵抗)が大きく異なることで表面の改質状況の判別が可能となる。 That is, the electrodes 4 shown in FIG. 2 are configured to sandwich the silicon wafer 1, and the attractive force 6 between the plates is detected by the strain gauge 10-2. The gap between the silicon wafer 1 and the electrode plate ring 10 is set to several hundred μm. Since the conductivity (mobility, resistivity) of the electrode-plate attractive force 6 is significantly different from that of amorphous silicon, polycrystalline silicon, and single crystal silicon, it is possible to determine the surface modification state.

測定の手順は、以下のようになる。
(1)シリコンウエハ1は、リングポール11に載置し、シリコンウエハ1の上に極板リング10を装着する。
(2)爪部10−3は、極板リング10の内側へ回転させ、電圧5をリングポール11と極板リング10との間に印加する。
(3)極板間引力6が生じることにより、極板リング10に応力が掛かり、変形する。
(4)極板リング10の上面に配置された薄板10−1に貼りつけられたひずみゲージ10−2により応力が検出され電気信号として出力される。
The measurement procedure is as follows.
(1) The silicon wafer 1 is placed on the ring pole 11, and the electrode plate ring 10 is mounted on the silicon wafer 1.
(2) The claw portion 10-3 is rotated inward of the plate ring 10 and a voltage 5 is applied between the ring pole 11 and the plate ring 10.
(3) When the attractive force 6 between the plates is generated, stress is applied to the plate ring 10 and the plate ring 10 is deformed.
(4) Stress is detected by a strain gauge 10-2 attached to a thin plate 10-1 arranged on the upper surface of the electrode plate ring 10 and output as an electric signal.

以上述べた極板間引力6の測定によれば、改質前後、および改質中の加工対象物(シリコンウエハ)の電気物性(電気伝導度、静電容量、極板間引力等)の違いを高感度に測定が可能となる。 According to the measurement of the attractive force between the plates described above 6, the difference in the electrical characteristics (electrical conductivity, capacitance, attractive force between the plates, etc.) of the object to be processed (silicon wafer) before and after the modification and during the modification. Can be measured with high sensitivity.

1…シリコンウエハ
1−1…測定面
2…計測用光源
3…検出器
4…電極
5…電圧
6…極板間引力
7…静電容量
10…極板リング
10−1…薄板
10−2…ゲージ
10−3…爪部
11…リングポール
1 ... Silicon wafer 1-1 ... Measurement surface 2 ... Measurement light source 3 ... Detector 4 ... Electrode 5 ... Voltage 6 ... Electrode plate attractive force 7 ... Capacitance 10 ... Electrode plate ring 10-1 ... Thin plate 10-2 ... Gauge 10-3 ... Claw 11 ... Ring pole

Claims (8)

レーザ熱処理を用いたシリコンウエハ表面改質におけるシリコンウエハ表面状態診断方法であって、
前記シリコンウエハ表面の反射率又は吸収率の測定、及び電気物性を測定することを特徴とするシリコンウエハ表面状態診断方法。
A method for diagnosing a silicon wafer surface condition in silicon wafer surface modification using laser heat treatment.
A method for diagnosing a silicon wafer surface state, which comprises measuring the reflectance or absorptivity of the silicon wafer surface and measuring the electrical characteristics.
前記反射率又は前記吸収率の測定は、波長が532、あるいは785nmのレーザで行うことを特徴とする請求項1に記載のシリコンウエハ表面状態診断方法。 The silicon wafer surface condition diagnostic method according to claim 1, wherein the reflectance or the absorption rate is measured by a laser having a wavelength of 532 or 785 nm. 前記電気物性は、前記シリコンウエハの表面処理部に近接して電極を配置し、前記シリコンウエハと前記電極間で形成されるコンデンサの静電容量を測定することを特徴とする請求項1又は2に記載のシリコンウエハ表面状態診断方法。 Claim 1 or 2 is characterized in that an electrode is arranged in the vicinity of a surface treatment portion of the silicon wafer and the capacitance of a capacitor formed between the silicon wafer and the electrode is measured. The method for diagnosing the surface condition of a silicon wafer according to. 前記電気物性は、前記シリコンウエハの表面処理部に近接して電極を配置し、前記シリコンウエハと前記電極間に電圧を印加して極板間引力を測定することを特徴とする請求項1又は2に記載のシリコンウエハ表面状態診断方法。 The electric property is characterized in that an electrode is arranged in the vicinity of the surface treatment portion of the silicon wafer and a voltage is applied between the silicon wafer and the electrode to measure the attractive force between the plates. 2. The method for diagnosing the surface condition of a silicon wafer according to 2. 前記極板間引力は、ひずみゲージで測定することを特徴とする請求項4に記載のシリコンウエハ表面状態診断方法。 The method for diagnosing the surface state of a silicon wafer according to claim 4, wherein the attractive force between the plates is measured with a strain gauge. 前記シリコンウエハを載置するリングポールと、
リング形状の極板リングに等分割で配置された薄板と、
前記薄板に貼り付けられ、ブリッジ回路が構成される前記ひずみゲージと、
を備え、前記極板リングを前記シリコンウエハと間隙を持って配置し、前記リングポールと前記極板リングとの間に電圧を印加して前記極板間引力を測定することを特徴とする請求項5に記載のシリコンウエハ表面状態診断方法。
A ring pole on which the silicon wafer is placed and
A thin plate arranged evenly on a ring-shaped electrode plate ring,
The strain gauge attached to the thin plate to form a bridge circuit, and
The present invention is characterized in that the plate ring is arranged with a gap from the silicon wafer, and a voltage is applied between the ring pole and the plate ring to measure the attractive force between the plates. Item 5. The method for diagnosing the surface condition of a silicon wafer according to Item 5.
レーザ熱処理を用いたシリコンウエハ表面改質方法であって、
前記シリコンウエハ表面の反射率又は吸収率の測定をするステップ1と、
前記シリコンウエハの表面処理部に近接して電極を配置し、前記シリコンウエハと前記電極間で形成されるコンデンサの静電容量を測定するステップ2と、
前記ステップ1、前記ステップ2に基づいて前記レーザ熱処理の加工条件を決定するステップ3と、
を有するシリコンウエハ表面改質方法。
A silicon wafer surface modification method using laser heat treatment.
Step 1 of measuring the reflectance or absorptance of the surface of the silicon wafer,
Step 2 of arranging the electrodes close to the surface treatment portion of the silicon wafer and measuring the capacitance of the capacitor formed between the silicon wafer and the electrodes.
Step 1 and step 3 of determining the processing conditions of the laser heat treatment based on the step 2 and
Silicon wafer surface modification method.
前記レーザ熱処理の加工中に、前記ステップ1、前記ステップ2を行い、その結果をフィードバック制御して加工を継続することを特徴とする請求項7に記載のシリコンウエハ表面改質方法。 The silicon wafer surface modification method according to claim 7, wherein during the processing of the laser heat treatment, the steps 1 and 2 are performed, and the results are feedback-controlled to continue the processing.
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