JP2021135340A - Liquid crystal display device - Google Patents

Abstract

To suppress the occurrence of product defects such as disconnection due to the provision of an inspection pad.SOLUTION: A liquid crystal display device comprises a display region X1, a signal line 11, a scan line 12, a supply region X2, a plurality of specific regions X3 and an inspection unit. The supply region X2 is arranged so as to surround the display region X1. The plurality of specific regions X3 divide the supply region X2 into at least two regions. The supply region X3 includes a source region X21 and a gate region X22. The inspection unit comprises: a plurality of inspection pads 61; and a wiring part 62 including first inspection wiring 621 connected with the signal line 11 and second inspection wiring 622 connected with the scan line 12. The plurality of inspection pads 61 are connected with the wiring part 62 through at least one of the plurality of specific regions X3.SELECTED DRAWING: Figure 1

Description

The present disclosure generally relates to a liquid crystal display device. More specifically, the present disclosure relates to a liquid crystal display device that drives a liquid crystal display using a thin film transistor.

Patent Document 1 discloses a liquid crystal display device. In this liquid crystal display device, a pixel electrode arranged in a matrix, a thin film transistor connected to each pixel electrode, a TFT substrate having a plurality of scanning lines and signal lines, and a CF substrate having a color filter are arranged so as to face each other. , A liquid crystal display is enclosed between both substrates. The liquid crystal display device also includes a driver that supplies signals to signal lines and scanning lines.

Here, the liquid crystal display device is provided with an inspection pad for inspecting the liquid crystal display panel at the terminal portion of the TFT substrate. Further, Patent Document 1 describes that an inspection of a signal line, a scanning line, or the like can be performed by bringing a probe or the like into contact with the inspection pad.

Japanese Unexamined Patent Publication No. 2014-85524

By the way, in the inspection of the liquid crystal display device using the inspection pad, it is desired to further improve the reliability at the time of inspection in consideration of the arrangement of the supply area (of the signal) including the driver and the wiring of the supply area.

The present disclosure has been made in view of the above reasons, and an object of the present invention is to provide a liquid crystal display device capable of suppressing the occurrence of product defects such as disconnection due to the provision of an inspection pad.

The liquid crystal display device of one aspect of the present disclosure is a liquid crystal display device that displays an image corresponding to an image signal. The liquid crystal display device includes a display area, a signal line, a scanning line, a supply area, a plurality of specific areas, and an inspection unit. The display area includes a pixel electrode and a transistor for transmitting the video signal to the pixel electrode. The signal line has a length in the first direction of the display region and is electrically connected to the transistor. The scanning line has a length in the second direction of the display region that intersects the first direction and is electrically connected to the transistor. The supply area is arranged so as to surround the display area. The plurality of specific regions divide the supply region into at least two regions. The inspection unit is a portion for inputting an electric signal for inspection into the display area. The supply region includes a source region for supplying a source signal to the signal line and a gate region for supplying a gate signal to the scanning line. The inspection unit includes a plurality of inspection pads and a wiring unit including a first inspection wiring connected to the signal line and a second inspection wiring connected to the scanning line. The plurality of inspection pads are connected to the wiring portion through at least one of the plurality of specific regions.

According to the present disclosure, there is an advantage that the occurrence of product defects such as disconnection due to the provision of the inspection pad can be suppressed.

FIG. 1 is a schematic plan view of a first substrate in the liquid crystal display device according to the embodiment. FIG. 2 is an enlarged view of a main part of the upper source region on the first substrate of the same. FIG. 3 is an enlarged view of a main part of the gate region on the left side of the first substrate of the same. FIG. 4 is a schematic plan view of the liquid crystal display device of the above. FIG. 5 is a conceptual diagram for explaining the overall configuration of the display panel in the liquid crystal display device of the above. FIG. 6 is a conceptual diagram focusing on a supply region and a specific region in the same first substrate. FIG. 7 is a conceptual diagram showing a modified example of the same specific region. FIG. 8 is a conceptual diagram showing another modification of the same specific region. FIG. 9 is a diagram showing a modified example of the inspection unit in the liquid crystal display device of the above, and is an enlarged view of a main part of the upper source region. FIG. 10 is a diagram showing a modified example of the inspection unit in the liquid crystal display device of the above, and is an enlarged view of a main part of the gate region on the left side. FIG. 11 is a diagram showing another modification of the inspection unit in the liquid crystal display device of the above, and is an enlarged view of a main part of the gate region on the left side.

(1) Outline Hereinafter, the liquid crystal display device 100 (see FIG. 4) of the present embodiment will be described with reference to the drawings. However, the following embodiments are only part of the various embodiments of the present disclosure. The following embodiments can be variously modified according to the design and the like as long as the object of the present disclosure can be achieved. Further, each figure described in the following embodiment is a schematic view, and the ratio of the size and the thickness of each component in the figure does not necessarily reflect the actual dimensional ratio. ..

Further, in the following description, when the liquid crystal display device 100 is placed on a fixture such as a floor or a desk or hung on a wall, the liquid crystal display device 100 is viewed from the front in the vertical direction (vertical direction) and left and right. Define "top", "bottom", "left", and "right" based on the direction (horizontal direction). Further, in the following description, the direction orthogonal to the display surface 10 (see FIG. 4) of the liquid crystal display device 100 is defined as the front-rear direction, the front side is defined as "front", and the back side is defined as "rear". It should be noted that the arrows indicating the directions in the drawings are shown only for the sake of explanation and are not accompanied by an entity. Further, the provision of these directions is not intended to limit the usage mode of the liquid crystal display device 100.

The liquid crystal display device 100 of the present embodiment is configured to display an image corresponding to an image signal. The liquid crystal display device 100 is a device that drives a liquid crystal display by an active matrix method using a TFT (Thin-Film-Transistor). The liquid crystal display device 100 drives the liquid crystal display by, for example, an IPS (In-Plane Switching) method, so that an image corresponding to the image signal is displayed on the display surface 10.

As shown in FIG. 5, the liquid crystal display device 100 includes a first substrate 1, a second substrate 2, a liquid crystal layer 3, and a pair of polarizing plates 4 and 5. The first substrate 1 is a so-called "TFT substrate" including a transparent substrate such as a glass substrate 1A (see FIG. 1) and having a plurality of transistors TR1 (see FIG. 1) formed therein. In FIG. 1, among a plurality of transistors TR1, only one transistor TR1 is illustrated by partially enlarging the display area X1. The liquid crystal layer 3 is sealed between the first substrate 1 and the second substrate 2.

The second substrate 2 is a color filter substrate (so-called “CF substrate”) on which a color filter layer is formed. The color filter layer has a black matrix formed in a grid pattern. A color filter is formed in each of the plurality of openings surrounded by the black matrix. In the present embodiment, the color filter has a red filter, a green filter, and a blue filter in the RGB color model.

The pair of polarizing plates 4 and 5 are sheet-shaped polarizing films formed of, for example, a resin material. The pair of polarizing plates 4 and 5 sandwich the first substrate 1, the liquid crystal layer 3, and the second substrate 2 in the thickness direction (front-back direction) of the first substrate 1. The pair of polarizing plates 4 and 5 are arranged so that the polarization directions are orthogonal to each other. Of the pair of polarizing plates 4 and 5, the light from the backlight is incident on the polarizing plate 5 adjacent to the first substrate 1 (in FIG. 5, behind the first substrate 1). The three arrows in FIG. 5 represent the light emitted from the backlight.

Here, as shown in FIG. 1, the liquid crystal display device 100 of the present embodiment includes a display area X1, a signal line 11, a scanning line 12, a supply area X2, a plurality of specific areas X3, and an inspection unit 6 ( (See FIGS. 2 and 3). Here, the signal lines 11 and the scanning lines 12 are both a plurality of lines and are formed on the first substrate 1.

The display area X1 includes a pixel electrode PE1 and a transistor TR1 that transmits a video signal to the pixel electrode PE1. The display area X1 corresponds to an effective display area on the first substrate 1 which is a TFT substrate, and is an area generally corresponding to a display surface 10 (see FIG. 4) on which an image is displayed. That is, the first substrate 1 includes the display area X1. Here, there are a plurality of pixel electrodes PE1 and transistors TR1.

The signal line 11 has a length in the first direction D1 of the display area X1 and is electrically connected to the transistor TR1. The first direction D1 is a direction along the display area X1 and the display surface 10, and corresponds to a vertical direction (vertical direction) here. Further, the plurality of signal lines 11 are electrically connected to the source of the corresponding transistor TR1 among the plurality of transistors TR1. That is, the "signal line" is also referred to as a "source line".

The scanning line 12 has a length in the second direction D2 intersecting the first direction D1 in the display area X1 and is electrically connected to the transistor TR1. The second direction D2 is a direction along the display area X1 and the display surface 10, and corresponds to a horizontal direction (horizontal direction) here. Further, the plurality of scanning lines 12 are electrically connected to the gate of the corresponding transistor TR1 of the plurality of transistors TR1. That is, the "scanning line" is also referred to as a "gate line". In the present embodiment, as shown in FIG. 1, the signal line 11 and the scanning line 12 (in other words, the first direction D1 and the second direction D2) are orthogonal to each other, but at least they may intersect with each other. ..

As shown in FIG. 6, the supply area X2 is arranged so as to surround the display area X1. The supply area X2 includes a source area X21 for supplying a source signal to the signal line 11 and a gate area X22 for supplying a gate signal to the scanning line 12. Here, as an example, the supply region X2 is a region formed by the technology of COF (Chip On Film). The supply area X2 includes one or more film-shaped substrates (FPC: flexible printed wiring boards) in which a liquid crystal driver IC or the like is integrated and integrated, and is mounted on the main body (glass substrate 1A) of the first substrate 1. .. That is, the first substrate 1 includes the supply region X2.

The supply region X2 is not limited to the region formed by one or more FPC substrates 200, and at least a part of the supply region X2 may be formed directly on the main body of the first substrate 1. For example, the liquid crystal driver IC may be directly formed on the main body of the first substrate 1 by the technique of COG (Chip On Glass). Further, a circuit such as a shift register having a function of a driver IC may be directly mounted on the main body of the first substrate 1 by the technology of GIP (Gate In Panel). The shape, dimensions, and number of the FPC substrate 200 are not limited to the examples shown in FIG. In FIG. 1, the installation area B1 in which the source driver (source drive unit 71) or the gate driver (gate drive unit 72) is installed is schematically shown as a rectangular area.

The plurality of specific regions X3 divide the supply region X2 into at least two regions. Here, as an example, as shown in FIG. 6, four specific regions X3 are provided, and the supply region X2 is divided into four compartment regions. Here, the first substrate 1 includes four specific regions X3.

The inspection unit 6 is a portion for inputting an electric signal for inspection into the display area X1. The term "inspection" as used herein assumes, for example, an inspection in which the lighting of the display panel 102 is confirmed when the source drive unit 71, the gate drive unit 72, or the like is not attached to the peripheral edge of the first substrate 1. .. That is, if a disconnection or short circuit occurs somewhere in the plurality of signal lines 11 and the scanning line 12, or a failure occurs somewhere in the plurality of transistors TR1, the display surface 10 does not light normally. It will be. Therefore, in the manufacturing process of the liquid crystal display device 100, for example, at least after the liquid crystal layer 3 is sealed between the first substrate 1 and the second substrate 2, and before the relatively expensive driver is mounted. At the stage of, the inspection unit 6 is used to input an electric signal for inspection. Then, it is confirmed whether or not the display panel 102 lights up normally.

Here, the inspection unit 6 has a plurality of inspection pads 61, and a wiring unit 62 including a first inspection wiring 621 connected to the signal line 11 and a second inspection wiring 622 connected to the scanning line 12. There is. The plurality of inspection pads 61 are connected to the wiring portion 62 through at least one of the plurality of specific regions X3.

According to this configuration, the number of locations where the wiring portion 62 intersects with other wiring in the supply area X2 can be reduced. For example, it is possible to reduce the possibility that the leader line 623 (see FIGS. 2 and 3) of the wiring unit 62 intersects with the wiring (for example, the power supply line 9) connecting the drivers. The term "intersection" as used herein means that, for example, when viewed from the front of the display area X1, at least a part of the wiring portion 62 is in contact with and overlaps with other wiring in the supply area X2. If the number of places where "crossing" occurs increases, it may cause product defects such as short circuits and disconnections. In the present embodiment, since the plurality of inspection pads 61 are connected to the wiring portion 62 through at least one of the plurality of specific areas X3, as a result, product defects such as disconnection due to the provision of the inspection pads 61 occur. Can be suppressed. Further, if the wiring portion 62 is broken, there is a possibility that the inspection cannot be performed correctly, and in that respect as well, the reliability at the time of inspection can be improved.

(2) Details Hereinafter, the liquid crystal display device 100 of the present embodiment will be described in detail with reference to FIGS. 1 to 8.

First, the overall configuration of the liquid crystal display device 100 will be described. As shown in FIG. 4, the liquid crystal display device 100 includes a housing 101 and a display panel 102. The display panel 102 includes a first substrate 1, a second substrate 2, a liquid crystal layer 3, and a pair of polarizing plates 4 and 5 described in "(1) Overview" (see FIG. 5). One surface (front surface) thereof is the display surface 10.

The housing 101 has a rectangular frame shape when viewed from the front, and supports the display panel 102. The housing 101 includes various circuits for displaying on the display surface 10 an image corresponding to an image signal input from the outside to the liquid crystal display device 100. The housing 101 includes an upper frame portion 111 above the display panel 102, a lower frame portion 112 below the display panel 102, a left frame portion 113 on the left side of the display panel 102, and the right side of the display panel 102. It is integrally composed of the right frame portion 114 on the side. The display panel 102 is arranged in the opening portion surrounded by the upper frame portion 111, the lower frame portion 112, the left frame portion 113, and the right frame portion 114.

As shown in FIGS. 1, 2 and 3, the first substrate 1 of the display panel 102 includes a display area X1, a plurality of signal lines 11, a plurality of scanning lines 12, a supply area X2, and a plurality of display areas X1. It has a specific area X3 and an inspection unit 6. FIG. 1 is a schematic plan view of the first substrate 1. In FIG. 1, only a part (only a few lines in the left corner, the upper corner, and the lower corner) of each of the plurality of signal lines 11 and the plurality of scanning lines 12 is schematically shown. In reality, a large number of signal lines 11 are arranged at substantially equal intervals in the second direction D2, and similarly, a large number of scanning lines 12 are arranged at substantially equal intervals in the first direction D1.

The first substrate 1 faces the second substrate 2 with the liquid crystal layer 3 in between. The dimensions of the first substrate 1 in a plan view are larger than the dimensions of the second substrate 2 in a plan view. The second substrate 2 has, for example, a size larger than the display area X1 of the first substrate 1 and smaller than the main body of the first substrate 1, and has substantially the same shape as the display area X1 of the first substrate 1 and the main body.

The display area X1 has a plurality of pixel electrodes PE1 and a plurality of transistors TR1 for transmitting video signals to each of the plurality of pixel electrodes PE1. As shown in FIG. 6, the display area X1 has a pair of first sides S1 having a length in the first direction D1 and facing each other, and a pair of second sides having a length in the second direction D2 and facing each other. It is a rectangular area composed of four sides including the side S2. Here, the display area X1 is a rectangular area long in the second direction D2 as a whole.

As shown in FIG. 6, the supply area X2 is arranged so as to surround the display area X1. FIG. 6 is a schematic drawing of the plan view of the first substrate 1 of FIG. 1 focusing on three types of regions (X1 to X3). The supply region X2 includes a plurality of drive units 7 (liquid crystal drivers) that generate source signals and gate signals, respectively. Specifically, the supply region X2 includes a plurality of source drive units 71 (source drivers) that generate source signals (12 in the illustrated example) and a plurality of gate drives (8 in the illustrated example) that generate gate signals. A unit 72 (gate driver) is provided. The plurality of drive units 7 are arranged on the main body (glass substrate 1A) of the first substrate 1 via the plurality of FPC substrates 200, respectively. In FIG. 1, a part of each FPC board 200 is not shown. One end of each FPC board 200 is joined to the main body of the first board 1, and the other end (not shown) is joined to an external board such as a PWB (Printed Wiring Board). Here, one end of each FPC board 200 is crimped onto the main body of the first board 1, and a plurality of connection portions 700 (see FIGS. 2 and 3) of the first wiring 81 or the second wiring 82 (described later). ) And electrically connected.

Here, as shown in FIGS. 1 and 6, the supply region X2 is for supplying a pair of source regions X21 for supplying source signals to a plurality of signal lines 11 and a gate signal to a plurality of scanning lines 12. Gate region X22 includes a pair of left and right gate regions. Six source drive units 71 are arranged in each source region X21. Further, four gate driving units 72 are arranged in each gate area X22. The number of drive units 7 is not particularly limited.

Each source region X21 includes a source driving unit 71 and a first wiring 81 connecting the source driving unit 71 and the signal line 11. Here, each of the source regions X21 is provided with a plurality of source drive units 71 and a plurality of first wirings 81 (6 in this case). In the following, the six source drive units 71 arranged in each source region X21 may be referred to as source drive units 711 to 716 in order from the left (see FIG. 1). The source drive units 711 to 716 are arranged side by side at substantially equal intervals along the second direction D2.

Each first wiring 81 includes a plurality of conductor portions 810 formed by patterning on the glass substrate 1A of the first substrate 1 (see FIG. 2). Note that FIG. 2 is an enlarged view of the region between the source drive units 713 and 714 in the upper source region X21. The plurality of conductor portions 810 are inclined and extended toward the display area X1 so as to be electrically connected to the corresponding plurality of signal lines 11 on a one-to-one basis (oblique wiring).

Each gate region X22 includes a gate drive unit 72 and a second wiring 82 that connects the gate drive unit 72 and the scanning line 12. Here, a plurality of gate drive units 72 and a plurality of second wirings 82 (here, four) are provided in each gate region X22. In the following, the four gate drive units 72 arranged in each gate area X22 may be referred to as gate drive units 721 to 724, respectively, in order from the top (see FIG. 1). The gate drive units 721 to 724 are arranged side by side at substantially equal intervals along the first direction D1.

Each second wiring 82 includes a plurality of conductor portions 820 formed by patterning on the glass substrate 1A of the first substrate 1 (see FIG. 3). Note that FIG. 3 is an enlarged view of the area between the gate drive units 722 and 723 in the gate area X22 on the left side. The plurality of conductor portions 820 are inclined and extended toward the display area X1 so as to be electrically connected to the corresponding plurality of scanning lines 12 on a one-to-one basis (oblique wiring).

Here, the plurality of signal lines 11 are divided into a plurality of signal lines 11A arranged in the upper half area and a plurality of signal lines 11B arranged in the lower half area of the display area X1 (). (See FIG. 1). Of the pair of source regions X21, the upper source region X21 supplies the source signal to the plurality of signal lines 11A, and the lower source region X21 supplies the source signal to the plurality of signal lines 11B. In other words, the plurality of source drive units 71 that generate source signals are arranged separately in the upper and lower parts.

As shown in FIG. 1, each signal line 11 has a length in the first direction D1 (vertical direction) of the display area X1. The plurality of signal lines 11 are arranged so as to be arranged at substantially equal intervals in the second direction D2 (horizontal direction). Each signal line 11 is electrically connected to the source of the corresponding transistor TR1.

The source drive unit 71 is an IC (Integrated Circuit) chip. The twelve source drive units 71 are housed in, for example, the upper frame portion 111 and the lower frame portion 112 of the housing 101, each of which is divided into six parts. The source drive unit 71 outputs a source signal (video signal) which is a signal having a bit width of, for example, 8 bits or 10 bits to each signal line 11.

As shown in FIG. 1, each scanning line 12 has a length in the second direction D2 (horizontal direction) of the display area X1. The plurality of scanning lines 12 are arranged so as to be arranged at substantially equal intervals in the first direction D1 (vertical direction). Each scan line 12 is electrically connected to the gate of the corresponding transistor TR1.

The gate drive unit 72 is an IC (Integrated Circuit) chip. The eight gate drive units 72 are housed in, for example, the left frame portion 113 and the right frame portion 114 of the housing 101, each of which is divided into four parts. The gate drive unit 72 outputs a gate signal (scanning signal) which is a binary signal to each scanning line 12. The plurality of scanning lines 12 are wired so that gate signals are alternately input from the left and right gate driving units 72.

As shown in FIG. 1, each transistor TR1 is a switching element electrically connected to the corresponding pixel electrode PE1. Each pixel electrode PE1 faces the common electrode COM1 (opposite electrode) via a liquid crystal display. Each transistor TR1 is turned on when a high-level scanning signal is input to the corresponding scanning line 12, and is turned off when a low-level scanning signal is input. When the corresponding transistor TR1 is on, the video signal input to the corresponding signal line 11 is supplied to the pixel electrode PE1. Then, in the pixel region, the amount of light transmitted through the sub-pixels (sub-pixels: each point of a single color of RGB) is controlled according to the supplied video signal.

Specifically, in the pixel electrode PE1, when the video signal is input (that is, a voltage is applied) when the corresponding transistor TR1 is on, the input video signal (predetermined potential) is pixelated. It is written on the electrode PE1 and drives the liquid crystal facing the pixel electrode PE1 in the liquid crystal layer 3. Then, the region corresponding to the liquid crystal display is in a state where light is allowed to pass through. Then, the light from the backlight passes through the first substrate 1 and the liquid crystal display, passes through the color filter of the second substrate 2 corresponding to the pixel electrode PE1, and is emitted from the display surface 10. As a result, the sub-pixels corresponding to the pixel electrode PE1 on the display surface 10 emit light of the color corresponding to the color filter.

After that, the transistor TR1 is turned off, but the potential of the pixel electrode PE1 is almost maintained at the potential corresponding to the written video signal. Therefore, from the sub-pixel corresponding to the pixel electrode PE1, transmitted light corresponding to the current video signal is emitted until the next video signal is input.

By the way, the supply area X2 further includes a power supply line 9 (see FIG. 1) for supplying power between the plurality of drive units 7. A plurality of power supply lines 9 are provided. In addition to the power supply line 9, a plurality of wirings for transmitting various control signals are also arranged so as to run in parallel with the power supply line 9. Hereinafter, when the power supply line 9 and the above wiring are not distinguished, they may be referred to as “transfer line L1” (see FIG. 1). The “power supply” here includes, for example, a control power supply for the source drive unit 71 and the gate drive unit 72. The power supply unit that generates the control power supply and the control unit that generates the control signal are arranged on an external board (PWB or the like) to which the FPC board 200 of the source region X21 is joined. The power of the gate region X22 is transmitted from the source region X21 via the power supply line 9.

The plurality of transfer lines L1 are directly patterned on the main body (glass substrate 1A) of the first substrate 1, for example.

The two leftmost source drive units 711 in the pair of upper and lower source regions X21 are electrically connected to the two gate drive units 721 and 724 located at the upper and lower ends of the left gate region X22 via the plurality of transfer lines L1. It is connected. Also in the gate area X22 on the left side, the adjacent gate drive unit 721 and the gate drive unit 722 are electrically connected via the transfer line L1, and the adjacent gate drive unit 723 and the gate drive unit 724 are electrically connected. It is connected. Here, in the present embodiment, the transfer line L1 that electrically connects the gate drive unit 722 and the gate drive unit 723 is not provided in the gate region X22 on the left side. Therefore, the gate drive units 721 and 722 are configured to receive power supply from the upper source region X21, and the gate drive units 723 and 724 are configured to receive power supply from the lower source region X21.

Similarly, the two source drive units 716 at the right end of the pair of upper and lower source regions X21 and the two gate drive units 721 and 724 located at the upper end and the lower end of the right gate region X22 via the plurality of transfer lines L1. It is electrically connected. Also in the gate area X22 on the right side, the adjacent gate drive unit 721 and the gate drive unit 722 are electrically connected via the transfer line L1, and the adjacent gate drive unit 723 and the gate drive unit 724 are electrically connected. It is connected. Again, in the gate area X22 on the right side, the transfer line L1 that electrically connects the gate drive unit 722 and the gate drive unit 723 is not provided. Therefore, the gate drive units 721 and 722 are configured to receive power supply from the upper source region X21, and the gate drive units 723 and 724 are configured to receive power supply from the lower source region X21.

Each source drive unit 71 receives power from an external board (PWB or the like) to which the FPC board 200 on which it is mounted is bonded. Therefore, the transfer line L1 is not provided between the two adjacent source drive units 71. However, a transfer line L1 may be provided between the two source drive units 71 except between the two source drive units 713 and 714.

The plurality of specific regions X3 are regions defined so as to divide the supply region X2 into at least two regions. In the present embodiment, the first substrate 1 includes four specific regions X3 as shown in FIGS. 1 and 6. Therefore, the supply region X2 is divided into four regions. The plurality of specific areas X3 are areas in which none of the drive unit 7 (source drive unit 71 and gate drive unit 72), the first wiring 81, and the second wiring 82 is arranged. Further, the plurality of specific areas X3 are areas in which the power supply line 9 is not arranged. Here, the plurality of specific areas X3 are areas in which the power supply line 9 and the wiring for the control signal are not arranged. The number of specific regions X3 is not particularly limited. Both the supply region X2 and the four specific regions X3 are substantially exposed from the second substrate 2 (CF substrate) facing the first substrate 1.

The four specific areas X3 are arranged so as to correspond to the four sides of the display area X1. Specifically, as shown in FIG. 6, the plurality (4) specific regions X3 are arranged on the side (outside) of the pair of first side S1 so as to divide the supply region X2 into the first direction D1. The pair of regions (first region X31) is included.

Further, as shown in FIG. 6, the plurality (four) specific regions X3 are each arranged on the side (outside) of the pair of second sides S2 so as to divide the supply region X2 into the second direction D2. The region (second region X32) is included.

In particular, in the present embodiment, each specific region X3 is arranged at the central portion C1 in the length direction on the side (outside) of the corresponding side of the four sides. That is, each first region X31 is defined so that the gate region X22 outside the corresponding side of the pair of first sides S1 is vertically divided by the central portion C1 thereof. Similarly, each second region X32 is defined so that the source region X21 outside the corresponding side of the pair of second sides S2 is divided into left and right by the central portion C1 thereof.

Here, each specific region X3 is inside the outer peripheral edge of the main body (glass substrate 1A) of the first substrate 1 and outside the second substrate 2 (color filter substrate) in the front view of the display region X1. The area.

Each first region X31 is arranged between the gate drive unit 722 (where the transfer line L1 does not exist) and the gate drive unit 723 in the corresponding gate region X22. Here, as shown in FIG. 3, the second wiring 82 corresponding to the gate drive unit 722 and the second wiring 82 corresponding to the gate drive unit 723 are arranged at predetermined intervals in the first direction D1. By doing so, the first region X31 is secured.

Each second region X32 is arranged between the source drive unit 713 (where the transfer line L1 does not exist) and the source drive unit 714 in the corresponding source region X21. Here, as shown in FIG. 2, the first wiring 81 corresponding to the source drive unit 713 and the first wiring 81 corresponding to the source drive unit 714 are arranged at predetermined intervals in the second direction D2. By doing so, the second region X32 is secured.

The inspection unit 6 is a portion for inputting an electric signal for inspection to a plurality of transistors TR1 in the display area X1 and performing a lighting confirmation inspection. As shown in FIGS. 2 and 3, the inspection unit 6 has a plurality of inspection pads 61, a wiring unit 62, and a plurality of switching elements (for example, TFT: hereinafter referred to as “transistor TR2”). .. The inspection unit 6 is formed on the main body (glass substrate 1A) of the first substrate 1.

The wiring unit 62 includes a plurality of input lines 620. The plurality of input lines 620 include a first inspection wiring 621 connected to the signal line 11 and a second inspection wiring 622 connected to the scanning line 12. A plurality of the first inspection wiring 621 and the second inspection wiring 622 are provided. As shown in FIG. 1, the first inspection wiring 621 is provided along the outer edges of the upper edge and the lower edge (pair of second sides S2) of the display area X1 so as to be along the edges, that is, in the second direction. A pattern is formed along D2. As shown in FIG. 1, the second inspection wiring 622 is provided along the outer edges of the left edge and the right edge (pair of first side S1) of the display area X1 so as to be along the edge, that is, in the first direction. A pattern is formed along D1.

The plurality of input lines 620 further includes a plurality of leader lines 623 (see FIGS. 2 and 3). Each leader line 623 electrically connects the corresponding inspection pad 61 (input end 624) to the first inspection wiring 621 or the second inspection wiring 622. Here, as shown in FIGS. 2 and 3, the wiring unit 62 is connected to a plurality of signal lines 11 or scanning lines 12 via a plurality of transistors TR2. When the inspection is performed, the transistor TR2 is turned on to make the wiring unit 62 and the signal line 11 or the scanning line 12 conductive, and when the inspection is not performed, the transistor TR2 is turned off to make the wiring unit 62, the signal line 11 and the scanning line conductive. 12 is made non-conducting. Each leader line 623 is patterned so as to extend in a direction away from the display area X1.

In this embodiment, four inspection pads 61 are provided on the first substrate 1. In particular, the four inspection pads 61 are arranged in the four specific regions X3 described above, respectively.

Further, the inspection pad 61 arranged in each first region X31 has, for example, seven input terminals 624. However, one of the seven input ends 624 in the center (common end 624P) is for common potential input at the time of inspection, and two (input ends 624B, 624E) are connected to the gate of the transistor TR2. For gate wiring. The other four input terminals 624 are electrically connected to the plurality of scanning lines 12 via the plurality of leader lines 623 and the transistor TR2. The common end 624P is electrically connected to, for example, a common wiring (not shown in FIG. 3) in a region (frame portion) around the display region X1.

The inspection pad 61 arranged in each second region X32 has, for example, 14 input terminals 624. Two of the 14 input terminals 624 (input terminal 624M) are for gate wiring connected to the gate of the transistor TR2. The other 12 are electrically connected to the plurality of signal lines 11 via the plurality of leader lines 623 and the transistor TR2.

In the present embodiment, as described above, the common end 624P is provided on the inspection pad 61 of the first region X31. However, the common end 624P may be provided on at least one inspection pad 61 of the first region X31 and the second region X32, for example, provided on both inspection pads 61 of the first region X31 and the second region X32. May be done.

Here, of the seven input ends 624 (see FIG. 3) of the inspection pad 61 arranged in each first area X31, the upper three input ends 624 (624A, 624B, 624C) are the display areas X1 shown in FIG. Corresponds to a plurality of scanning lines 12 above the center line (broken line F1) in the vertical direction of. The broken line F1 is a virtual line, not a line with an entity. In the present embodiment, the inspection pads 61 of each first region X31 are arranged so as to be vertically symmetrical as shown in FIG.

Specifically, in the upper three input terminals 624, the input terminal 624A is, for example, an even number (second, fourth, ...) From the top among the plurality of upper scanning lines 12 as shown in FIG. It is electrically connected to the scanning line 12 via the second inspection wiring 622 (622A) and the transistor TR2. The input end 624A is electrically connected to the sources of the plurality of transistors TR2 corresponding to the even-numbered scanning lines 12, and the drains of the plurality of transistors TR2 are the corresponding scanning lines of the even-numbered scanning lines 12. It is electrically connected to 12.

As shown in FIG. 3, the input terminal 624B is electrically connected to the gates of a plurality of transistors TR2 corresponding to the upper scanning line 12 via the second inspection wiring 622 (622B). In short, at the time of inspection, the transistor TR2 corresponding to the upper scanning line 12 is switched on via the input terminal 624B.

Further, as shown in FIG. 3, the input terminal 624C has, for example, an odd-numbered (first, third, ...) scanning line from the top among the plurality of scanning lines 12 on the upper side, and a second inspection wiring 622 (622C). ) And the transistor TR2 are electrically connected. The input end 624C is electrically connected to the sources of the plurality of transistors TR2 corresponding to the odd-numbered scanning lines 12, and the drains of the plurality of transistors TR2 are the corresponding scanning lines of the odd-numbered scanning lines 12. It is electrically connected to 12.

On the other hand, of the seven input ends 624 of the inspection pad 61 arranged in each first region X31, the lower three input ends 624 (624D, 624E, 624F) are located below the broken line F1 shown in FIG. Corresponds to the scanning line 12 of.

Specifically, at the lower three input terminals 624, the input terminal 624D is, for example, an even number (second, fourth, etc.) from the top among the plurality of lower scanning lines 12 as shown in FIG. Is electrically connected to the scanning line 12 of the above via the second inspection wiring 622 (622D) and the transistor TR2. The input end 624D is electrically connected to the sources of the plurality of transistors TR2 corresponding to the even-numbered scanning lines 12, and the drains of the plurality of transistors TR2 are the corresponding scanning lines of the even-numbered scanning lines 12. It is electrically connected to 12.

As shown in FIG. 3, the input terminal 624E is electrically connected to the gates of a plurality of transistors TR2 corresponding to the lower scanning line 12 via the second inspection wiring 622 (622E). In short, at the time of inspection, the transistor TR2 corresponding to the lower scanning line 12 is switched on via the input terminal 624E.

Further, the input terminal 624F has, for example, an odd-numbered (first, third, ...) scanning line 12 from the top, a second inspection wiring 622 (622F), and a transistor TR2 among the plurality of lower scanning lines 12. It is electrically connected via. The input end 624F is electrically connected to the sources of the plurality of transistors TR2 corresponding to the odd-numbered scanning lines 12, and the drains of the plurality of transistors TR2 are the corresponding scanning lines of the odd-numbered scanning lines 12. It is electrically connected to 12.

Of the 14 input ends 624 (see FIG. 2) of the inspection pad 61 arranged in each second area X32, the left 7 input ends 624 (624G to 624M) are the display areas X1 shown in FIG. It corresponds to a plurality of signal lines 11 on the left side of the center line (broken line F2) in the left-right direction. The broken line F2 is a virtual line, not a line with an entity. In the present embodiment, the inspection pads 61 of each second region X32 are arranged symmetrically as shown in FIG. In the following, only the left seven input ends 624 (624G to 624M) will be described in detail, and the right seven input ends 624 (624G to 624M) will be appropriately omitted.

Specifically, as shown in FIG. 2, the input terminal 624G has, for example, a plurality of signals corresponding to the even-numbered (second, fourth, ...) B (Blue) pixel sequence of the RGB pixel sequences. It is electrically connected to the wire 11 (11A) via the first inspection wiring 621 (621G) and the transistor TR2. In FIG. 2, only one of the plurality of signal lines 11A corresponding to the even-numbered B pixel sequence is shown. The input terminal 624G is electrically connected to the sources of the plurality of transistors TR2 corresponding to the even-numbered B pixel strings, and the drains of the plurality of transistors TR2 are the signal lines 11A of the even-numbered B pixel strings. Of these, it is electrically connected to the corresponding signal line 11A.

As shown in FIG. 2, the input terminal 624H has, for example, a plurality of signal lines 11 (11C) corresponding to even-numbered (second, fourth, ...) R (Red) pixel strings in the RGB pixel strings. ), And is electrically connected via the first inspection wiring 621 (621H) and the transistor TR2. In FIG. 2, only one of the plurality of signal lines 11C corresponding to the even-numbered R pixel sequence is shown. The input terminal 624H is electrically connected to the sources of the plurality of transistors TR2 corresponding to the even-numbered R pixel trains, and the drains of the plurality of transistors TR2 are the signal lines 11C of the even-numbered R pixel trains. Of these, it is electrically connected to the corresponding signal line 11C.

As shown in FIG. 2, the input terminal 624I has, for example, a plurality of signal lines 11 (11E) corresponding to the odd-numbered (first, third, ...) G (Green) pixel strings of the RGB pixel strings. ), And is electrically connected via the first inspection wiring 621 (621I) and the transistor TR2. In FIG. 2, only one of the plurality of signal lines 11E corresponding to the odd-numbered G pixel sequence is shown. The input terminal 624I is electrically connected to the sources of the plurality of transistors TR2 corresponding to the odd-numbered G pixel trains, and the drains of the plurality of transistors TR2 are the signal lines 11E of the odd-numbered G pixel trains. Of these, it is electrically connected to the corresponding signal line 11E.

As shown in FIG. 2, the input terminal 624J has, for example, a plurality of signal lines 11 (11B) corresponding to even-numbered (second, fourth, ...) G (Green) pixel strings in the RGB pixel strings. ), And is electrically connected via the first inspection wiring 621 (621J) and the transistor TR2. In FIG. 2, only one of the plurality of signal lines 11B corresponding to the even-numbered G pixel sequence is shown. The input terminal 624J is electrically connected to the sources of the plurality of transistors TR2 corresponding to the even-numbered G pixel strings, and the drains of the plurality of transistors TR2 are the signal lines 11B of the even-numbered G pixel strings. Of these, it is electrically connected to the corresponding signal line 11B.

As shown in FIG. 2, the input terminal 624K has, for example, a plurality of signal lines 11 (11D) corresponding to the odd-numbered (first, third, ...) B (Blue) pixel strings of the RGB pixel strings. ), And is electrically connected via the first inspection wiring 621 (621K) and the transistor TR2. In FIG. 2, only one of the plurality of signal lines 11D corresponding to the odd-numbered B pixel sequence is shown. The input terminal 624K is electrically connected to the sources of the plurality of transistors TR2 corresponding to the odd-numbered B pixel trains, and the drains of the plurality of transistors TR2 are the signal lines 11D of the odd-numbered B pixel trains. Of these, it is electrically connected to the corresponding signal line 11D.

As shown in FIG. 2, the input terminal 624L has, for example, a plurality of signal lines 11 (11F) corresponding to the odd-numbered (first, third, ...) R (Red) pixel strings of the RGB pixel strings. ), And is electrically connected via the first inspection wiring 621 (621L) and the transistor TR2. In FIG. 2, only one of the plurality of signal lines 11F corresponding to the odd-numbered R pixel sequence is shown. The input terminal 624L is electrically connected to the sources of the plurality of transistors TR2 corresponding to the odd-numbered R pixel trains, and the drains of the plurality of transistors TR2 are the signal lines 11F of the odd-numbered R pixel trains. Of these, it is electrically connected to the corresponding signal line 11F.

In FIG. 2, for convenience of explanation, out of a total of 12 input terminals 624G to 624L, odd-numbered input terminals 624I, 624K, and 624L (total of 6) are illustrated by dot hatching. Regarding the six input ends 624G to 624L on the right, the input ends 624G and 624K correspond to the pixel strings of R (Red), and the input ends 624H and 624L correspond to the pixel strings of B (Blue). The input terminals 624I and 624J correspond to the G (Green) pixel sequence.

As shown in FIG. 2, the input terminal 624M on the left side is electrically connected to the gates of a plurality of transistors TR2 corresponding to the signal line 11 on the left side via the first inspection wiring 621 (621M). In short, at the time of inspection, the transistor TR2 corresponding to the signal line 11 on the left side is switched on via the input terminal 624M. Similarly, the input end 624M on the right side switches on the transistor TR2 corresponding to the signal line 11 on the right side.

The first wiring 81 has a structure that crosses over the first inspection wiring 621 so as not to come into contact with the first inspection wiring 621 (for example, a structure in which an inorganic film or the like is interposed), and is electrically connected to the signal line 11. Similarly, the second wiring 82 has a structure that crosses over the second inspection wiring 622 so as not to come into contact with the second inspection wiring 622, and is electrically connected to the scanning line 12.

As described above, in the present embodiment, the four inspection pads 61 are connected to the wiring portion 62 through the four specific regions X3. Therefore, it is possible to reduce the number of locations where the wiring unit 62 intersects, for example, the transfer line L1. As a result, it is possible to suppress the occurrence of product defects such as disconnection due to the provision of the inspection pad 61. Further, since each specific area X3 is arranged at the central portion C1 in the length direction on the side (outside) of the corresponding side of the four sides of the display area X1, for example, the wiring resistance related to the wiring for inspection It becomes easier to adjust the balance.

In particular, as in the present embodiment, when a plurality of drive units 7 for supplying source signals and gate signals are arranged vertically and horizontally so as to surround the four sides of the display area X1, power is supplied to the gate drive unit 72. There is a high possibility that the power supply line 9 for performing the operation is arranged around the display area X1. In the first substrate 1 of the present embodiment, with respect to the power supply line 9, the power supply to the plurality of gate drive units 72 of each gate region X22 is shared by the upper source region X21 and the lower source region X21. By wiring, the first region X31 can be easily secured. Similarly, the transmission of the control signal to the gate drive unit 72 is also shared by the upper source region X21 and the lower source region X21, so that the first region X31 can be easily secured. As a result, the wiring unit 62 of the inspection unit 6 can be provided so as not to easily intersect the transfer line L1 including the power supply line 9.

By the way, a configuration is also conceivable in which the FPC board 200 on which the gate drive unit 72 is mounted is connected to an external board, and power is supplied and control signals are directly transmitted from the FPC board 200 to each gate drive unit 72. However, in that case, it may be difficult to reduce the thickness and the frame of the liquid crystal display device 100 as a whole, or the wiring may be complicated. However, in the present embodiment, since the transfer line L1 is arranged on the first substrate 1, in addition to the advantage that the occurrence of product defects such as disconnection due to the provision of the inspection pad 61 can be suppressed by the configuration of the present embodiment. Therefore, it is possible to improve the thinning and narrowing of the frame.

Further, in the present embodiment, the inspection unit 6 is configured so that the lighting of the display area X1 divided into four can be confirmed. In particular, each second inspection wiring 622 is connected by bundling a plurality of odd-numbered scanning lines 12 or even-numbered plurality of scanning lines 12, and each first inspection wiring 621 is connected to a plurality of odd-numbered signals. The lines 11 are connected to each other, or a plurality of even-numbered signal lines 11 are bundled and connected to each other. Therefore, while suppressing an increase in the number of wirings of the inspection unit 6 as a whole, it is possible to suppress a decrease in the types of patterns that can be inspected, and it is possible to improve the inspection accuracy.

Further, in the present embodiment, each of the plurality of input lines 620 is wired so as not to intersect with other input lines 620 in the plurality of input lines 620 when viewed from the front of the display area X1. Specifically, each second inspection wiring 622 corresponds to a leader line 623 so as not to intersect the other second inspection wiring 622, the first inspection wiring 621, and the leader line 623 when viewed from the front of the display area X1. (See Fig. 3). Further, each first inspection wiring 621 is connected to the corresponding leader wire 623 so as not to intersect with the other first inspection wiring 621, the second inspection wiring 622, and the leader wire 623 when viewed from the front of the display area X1. (See Fig. 2). Each leader 623 is connected to the corresponding first inspection wiring 621 or second inspection wiring 622 so as not to intersect the other leader 623, the other first inspection wiring 621, and the other second inspection wiring 622. (See FIGS. 2 and 3). Therefore, it is possible to further suppress the occurrence of product defects such as disconnection due to the provision of the inspection pad 61.

By the way, each of the plurality of specific regions X3 of the present embodiment includes an intermounting region X4 (see FIGS. 2 and 3). The intermounting unit area X4 is an area arranged between two mounting units (corresponding to the FPC board 200 in this case) on which two specific adjacent drive units 7 are mounted among a plurality of drive units 7. be. Here, the "specific two adjacent drive units 7" are the gate drive unit 722 and the gate drive unit 723 of each gate area X22, and the source drive unit 713 and the source drive unit 714 of each source area X21. be. In FIGS. 2 and 3, for convenience of explanation, the intermounting area X4 is indicated by a chain line, but it is not intended to strictly limit the range of the intermounting area X4. Here, the intermounting area X4 is an area of the specific area X3 near the plurality of connection units 700.

Then, as shown in FIGS. 2 and 3, the plurality of inspection pads 61 are connected to the wiring portion 62 through the intermounting portion area X4. Therefore, when the drive unit 7 is mounted on the mounting unit (FPC board 200), it is possible to suppress the occurrence of product defects such as disconnection due to the provision of the inspection pad 61.

The inspection is performed, for example, in the manufacturing process of the liquid crystal display device 100, at a stage after the liquid crystal layer 3 is sealed between the first substrate 1 and the second substrate 2, and the relatively expensive drive unit 7 is used. This is done before the mounted FPC board 200 is joined to the first board 1. In short, the product (intermediate product) in the middle of the manufacturing process is inspected. For example, the inspector puts the tip of a probe or the like on the electrode portion of the inspection pad 61, inputs an electric signal for inspection to the signal line 11 and the scanning line 12, and lights the intermediate product on a trial basis.

Here, in the intermediate product, the inspection pad 61 is outside the second substrate 2 when viewed from the front of the second substrate 2 (CF substrate) and is exposed, so that the tip of a probe or the like can be easily applied. be able to. At least a part of the wiring portion 62 of the inspection unit 6 may be inside the second substrate 2 when viewed from the front of the second substrate 2.

If a lighting defect is found, the intermediate product is discarded, for example, without performing the next step of joining the FPC substrate 200 to the intermediate product.

After the inspection, a step of covering at least a part of the inspection unit 6 with an insulating layer such as resin may be applied. That is, in the final product, at least a part of the inspection unit 6 may be covered with an insulating layer.

(3) Modified Example The above embodiment is only one of various embodiments of the present disclosure. The above-described embodiment can be changed in various ways depending on the design and the like as long as the object of the present disclosure can be achieved. Hereinafter, modifications of the above embodiment will be listed. Hereinafter, the above embodiment may be referred to as a “basic example”. Each modification described below can be applied in combination with a basic example or another modification as appropriate.

In the basic example, each specific area X3 is arranged in the central portion C1 outside the corresponding side of the four sides of the display area X1. However, the specific region X3 is not limited to being arranged in the central portion C1. The specific region X3 may be arranged so as to deviate from the central portion C1. For example, as shown in FIG. 7, at least one of the plurality of specific regions X3 (all in the example of FIG. 7) may be arranged in the region R1 near the central portion C1.

In particular, in the basic example, since the number of source drive units 71 in each source area X21 and the number of gate drive units 72 in each gate area X22 are even numbers, it is easy to secure a specific area X3 in the central portion C1. Met. However, if the number of source drive units 71 in each source area X21 and the number of gate drive units 72 in each gate area X22 are odd, there is a high possibility that the drive unit 7 is arranged in the central portion C1. .. In that case, the specific region X3 may be arranged so as to deviate from the central portion C1 as shown in FIG.

Alternatively, as shown in FIG. 8, at least one of the plurality of specific areas X3 may be arranged at the corners C2 of the four sides of the display area X1. In other words, the plurality of specific regions X3 may include a pair of regions X33 arranged on any two of the four corners C2 on the four sides. By forming the two inspection pads 61 of the inspection unit 6 in each of the pair of regions X33, it becomes easy to adjust the balance of the wiring resistance related to the wiring for inspection. In the example of FIG. 8, the number of the specific regions X3 is two, and both of them are arranged at the diagonal corners C2. Then, it is desirable that the transfer line is not arranged at the corner portion C2 where the pair of regions X33 are arranged.

The plurality of input ends 624 (for example, two input ends 624M: see FIG. 2) in the basic example may be replaced with one input end 624X as shown in FIG. Similarly, the plurality of input ends 624 (eg, 624C and 624D: see FIG. 3) may be replaced by one input end 624Y, as shown in FIG. In this case, the number of leader lines 623 in the wiring portion 62 can be suppressed. As a result, it becomes easy to secure an area for the inspection unit 6, for example, an area for arranging the inspection pad 61.

In the basic example, the drive unit 7 is mounted on the FPC board 200, and each inspection pad 61 is connected to the wiring unit 62 through the intermounting area X4 as shown in FIGS. 2 and 3. However, the drive unit 7 may be formed directly on the main body of the first substrate 1 without passing through the FPC substrate 200. In this case, the plurality of inspection pads 61 pass through the inter-terminal region X5 (see FIG. 11). It may be connected to the wiring unit 62. The inter-terminal area X5 is an area arranged between the connection terminals 701 of two specific adjacent drive units 7 (gate drive units 722 and 723 in the illustrated example) among the plurality of drive units 7, and is a plurality of specific regions. The region X3 includes the inter-terminal region X5. In FIG. 11, for convenience of explanation, the inter-terminal region X5 is shown by a alternate long and short dash line, but it is not intended to strictly limit the range of the inter-terminal region X5.

FIG. 11 is an enlarged view schematically showing a region between the gate drive units 722 and 723 in the gate region X22 on the left side. The plurality of connection terminals 701 (only two in FIG. 11) of each drive unit 7 are electrically connected to the second wiring 82 (or the first wiring 81). That is, each inspection pad 61 is located outside the inter-terminal region X5, and the leader line 623 is arranged so as to straddle the inter-terminal region X5. Therefore, even when the inspection pad 61 is arranged outside the inter-terminal region X5, it is possible to further suppress the occurrence of product defects such as disconnection due to the provision of the inspection pad 61.

In the basic example, each second inspection wiring 622 is connected by bundling a plurality of odd-numbered scanning lines 12 or even-numbered plurality of scanning lines 12, and each first inspection wiring 621 is connected for each RGB color. The odd-numbered plurality of signal lines 11 are connected to each other, or the even-numbered plurality of signal lines 11 are bundled and connected to each other. However, the scanning line 12 and the signal line 11 are not limited to being bundled in an odd-numbered or even-numbered manner. For example, the signal lines 11 may be bundled by the first inspection wiring 621 only for each color of RGB. Then, the number of the first inspection wiring 621 and the second inspection wiring 622 may be appropriately changed according to the division method.

(4) Summary As described above, the liquid crystal display device (100) according to the first aspect is a liquid crystal display device that displays an image corresponding to an image signal. The liquid crystal display device (100) includes a display area (X1), a signal line (11), a scanning line (12), a supply area (X2), a plurality of specific areas (X3), and an inspection unit (6). And. The display area (X1) has a pixel electrode (PE1) and a transistor (TR1) for transmitting a video signal to the pixel electrode (PE1). The signal line (11) has a length in the first direction (D1) of the display region (X1) and is electrically connected to the transistor (TR1). The scanning line (12) has a length in the second direction (D2) of the display region (X1) and intersects the first direction (D1), and is electrically connected to the transistor (TR1). The supply area (X2) is arranged so as to surround the display area (X1). The plurality of specific regions (X3) divide the supply region (X2) into at least two regions. The inspection unit (6) is a portion for inputting an electric signal for inspection into the display area (X1). The supply region (X2) includes a source region (X21) for supplying a source signal to the signal line (11) and a gate region (X22) for supplying a gate signal to the scanning line (12). The inspection unit (6) has a plurality of inspection pads (61), a first inspection wiring (621) connected to the signal line (11), and a second inspection wiring (622) connected to the scanning line (12). It has a wiring portion (62) including the wiring portion (62). The plurality of inspection pads (61) are connected to the wiring portion (62) through at least one of the plurality of specific areas (X3). According to the first aspect, it is possible to suppress the occurrence of product defects such as disconnection due to the provision of the inspection pad (61).

Regarding the liquid crystal display device (100) according to the second aspect, in the first aspect, the source region (X21) includes a source drive unit (71) for generating a source signal, a source drive unit (71), and a signal line ( The first wiring (81) connecting the 11) and the first wiring (81) are included. The gate region (X22) includes a gate drive unit (72) that generates a gate signal, and a second wiring (82) that connects the gate drive unit (72) and the scanning line (12). The plurality of specific regions (X3) are regions in which none of the source drive unit (71), the gate drive unit (72), the first wiring (81), and the second wiring (82) are arranged. According to the second aspect, the possibility that the wiring portion (62) intersects with the first wiring (81) and the second wiring (82) is reduced, and the disconnection due to the provision of the inspection pad (61) or the like is reduced. It is possible to further suppress the occurrence of product defects.

Regarding the liquid crystal display device (100) according to the third aspect, in the first or second aspect, the supply region (X2) is a plurality of drive units (7), each of which generates either a source signal or a gate signal. And a power supply line (9) for supplying power between the plurality of drive units (7). The plurality of specific areas (X3) are areas in which none of the plurality of drive units (7) and the power supply line (9) are arranged. According to the third aspect, the possibility that the wiring portion (62) intersects with the power supply line (9) is reduced, and the occurrence of product defects such as disconnection due to the provision of the inspection pad (61) is further suppressed. be able to.

Regarding the liquid crystal display device (100) according to the fourth aspect, in any one of the first to third aspects, the display area (X1) is a rectangular area. The display area (X1) has a pair of first sides (S1) having lengths in the first direction (D1) and facing each other, and a pair of first sides (S1) having lengths in the second direction (D2) facing each other. It consists of four sides including two sides (S2). The plurality of specific regions (X3) include a pair of regions (X31) arranged on the side of the pair of first sides (S1) so as to divide the supply region (X2) into the first direction (D1). According to the fourth aspect, for example, the inspection pad (61) is connected to the second inspection wiring (622) connected to the scanning line (12) through the pair of regions (X31) for inspection. It becomes easier to adjust the wiring resistance related to the wiring.

Regarding the liquid crystal display device (100) according to the fifth aspect, in any one of the first to fourth aspects, the display area (X1) is a rectangular area. The display area (X1) has a pair of first sides (S1) having lengths in the first direction (D1) and facing each other, and a pair of first sides (S1) having lengths in the second direction (D2) facing each other. It consists of four sides including two sides (S2). The plurality of specific regions (X3) include a pair of regions (X32) arranged on the side of the pair of second sides (S2) so as to divide the supply region (X2) in the second direction (D2). According to the fifth aspect, for example, the inspection pad (61) is connected to the first inspection wiring (621) connected to the signal line (11) through the pair of regions (X32) for inspection. It becomes easier to adjust the balance of wiring resistance related to the wiring of.

Regarding the liquid crystal display device (100) according to the sixth aspect, in the fourth or fifth aspect, each specific region (X3) is in the length direction on the side of the corresponding side (S1, S2) of the four sides. It is arranged in the central portion (C1) or the region (R1) near the central portion (C1). According to the sixth aspect, it becomes easier to adjust the balance of the wiring resistance related to the wiring for inspection.

Regarding the liquid crystal display device (100) according to the seventh aspect, in the sixth aspect, each specific area (X3) is arranged in the central portion (C1) on the side of the corresponding side (S1, S2) among the four sides. Will be done. According to the seventh aspect, it becomes easier to adjust the balance of the wiring resistance related to the wiring for inspection.

Regarding the liquid crystal display device (100) according to the eighth aspect, in any one of the first to seventh aspects, the display area (X1) is a rectangular area. The display area (X1) has a pair of first sides (S1) having lengths in the first direction (D1) and facing each other, and a pair of first sides (S1) having lengths in the second direction (D2) facing each other. It consists of four sides including two sides (S2). The plurality of specific regions (X3) include a pair of regions (X33) arranged at any two of the four corner portions (C2) on the four sides. According to the eighth aspect, it becomes easy to secure an area for the inspection unit (6), for example, an area for arranging the inspection pad (61).

Regarding the liquid crystal display device (100) according to the ninth aspect, in any one of the first to eighth aspects, the wiring unit (62) is the first inspection wiring (621) and the second inspection wiring (622). Consists of a plurality of input lines (620) including. Each of the plurality of input lines (620) is wired so as not to intersect the other input lines (620) in the plurality of input lines (620) when viewed from the front of the display area (X1). According to the ninth aspect, it is possible to further suppress the occurrence of product defects such as disconnection due to the provision of the inspection pad (61).

With respect to the liquid crystal display device (100) according to the tenth aspect, in any one of the first to ninth aspects, the supply region (X2) is a plurality of each generating either a source signal or a gate signal. The drive unit (7) is included. The plurality of specific regions (X3) are arranged between two mounting units (FPC board 200) on which two specific adjacent drive units (7) are mounted among the plurality of drive units (7). Includes the intermounting area (X4). The plurality of inspection pads (61) are connected to the wiring unit (62) through the intermounting area (X4). According to the tenth aspect, when the drive unit (7) is mounted on the mounting unit (FPC board 200), it is possible to further suppress the occurrence of product defects such as disconnection due to the provision of the inspection pad (61). ..

With respect to the liquid crystal display device (100) according to the eleventh aspect, in any one of the first to ninth aspects, the supply region (X2) is a plurality of each generating either a source signal or a gate signal. The drive unit (7) is included. The plurality of specific regions (X3) include an inter-terminal region (X5) arranged between the connection terminals (701) of two specific adjacent drive units (7) among the plurality of drive units (7). The plurality of inspection pads (61) are connected to the wiring portion (62) through the inter-terminal region (X5). According to the eleventh aspect, even when the inspection pad (61) is arranged outside the inter-terminal region (X5), the occurrence of product defects such as disconnection due to the provision of the inspection pad (61) is further suppressed. be able to.

The configuration according to the second to eleventh aspects is not an essential configuration for the liquid crystal display device (100) and can be omitted as appropriate.

100 Liquid crystal display 11 Signal line 12 Scan line 6 Inspection unit 61 Inspection pad 62 Wiring unit 620 Input line 621 1st inspection wiring 622 2nd inspection wiring 7 Drive unit 71 Source drive unit 72 Gate drive unit 701 Connection terminal 81 1st wiring 82 2nd wiring 9 Power line 200 FPC board (mounting part)
C1 Central part C2 Corner part D1 1st direction D2 2nd direction R1 (closer to the central part) area S1 1st side S2 2nd side X1 Display area X2 Supply area X21 Source area X22 Gate area X3 (X31, X32, X33) Specific area X4 Intermounting area X5 Terminal area PE1 Pixel electrode TR1 Transistor

Claims (11)

A liquid crystal display device that displays images according to video signals.
A display region having a pixel electrode and a transistor for transmitting the video signal to the pixel electrode,
A signal line having a length in the first direction of the display region and electrically connected to the transistor,
A scanning line having a length in the second direction intersecting the first direction of the display region and electrically connected to the transistor.
A supply area arranged so as to surround the display area and
A plurality of specific regions that divide the supply region into at least two regions,
An inspection unit for inputting an electrical signal for inspection into the display area,
With
The supply region includes a source region for supplying a source signal to the signal line and a gate region for supplying a gate signal to the scanning line.
The inspection unit includes a plurality of inspection pads and a wiring unit including a first inspection wiring connected to the signal line and a second inspection wiring connected to the scanning line.
The plurality of inspection pads are connected to the wiring portion through at least one of the plurality of specific areas.
Liquid crystal display device. The source region includes a source drive unit that generates the source signal, and a first wiring that connects the source drive unit and the signal line.
The gate region includes a gate drive unit that generates the gate signal and a second wiring that connects the gate drive unit and the scanning line.
The plurality of specific regions are regions in which none of the source drive unit, the gate drive unit, the first wiring, and the second wiring is arranged.
The liquid crystal display device according to claim 1. The supply region includes a plurality of drive units, each of which generates either the source signal or the gate signal, and a power supply line for supplying power between the plurality of drive units.
The plurality of specific regions are regions in which none of the plurality of drive units and the power supply line is arranged.
The liquid crystal display device according to claim 1 or 2. The display area is composed of four sides including a pair of first sides having lengths in the first direction and facing each other and a pair of second sides having lengths in the second direction and facing each other. It is a rectangular area
The plurality of specific regions include a pair of regions arranged on the side of the pair of first sides so as to divide the supply region in the first direction.
The liquid crystal display device according to any one of claims 1 to 3. The display area is composed of four sides including a pair of first sides having lengths in the first direction and facing each other and a pair of second sides having lengths in the second direction and facing each other. It is a rectangular area
The plurality of specific regions include a pair of regions arranged on the side of the pair of second sides so as to divide the supply region in the second direction.
The liquid crystal display device according to any one of claims 1 to 4. Each specific area is arranged in the central portion in the length direction or the region near the central portion on the side of the corresponding side of the four sides.
The liquid crystal display device according to claim 4 or 5. Each specific area is arranged in the central portion on the side of the corresponding side of the four sides.
The liquid crystal display device according to claim 6. The display area is composed of four sides including a pair of first sides having lengths in the first direction and facing each other and a pair of second sides having lengths in the second direction and facing each other. It is a rectangular area
The plurality of specific regions include a pair of regions arranged at any two of the four corners on the four sides.
The liquid crystal display device according to any one of claims 1 to 7. The wiring unit includes a plurality of input lines including the first inspection wiring and the second inspection wiring.
Each of the plurality of input lines is wired so as not to intersect with other input lines in the plurality of input lines when viewed from the front of the display area.
The liquid crystal display device according to any one of claims 1 to 8. The supply region includes a plurality of drives, each of which produces either the source signal or the gate signal.
The plurality of specific regions include an inter-mounting unit region arranged between two mounting units on which two specific adjacent drive units are mounted among the plurality of drive units.
The plurality of inspection pads are connected to the wiring portion through the intermounting portion region.
The liquid crystal display device according to any one of claims 1 to 9. The supply region includes a plurality of drives, each of which produces either the source signal or the gate signal.
The plurality of specific regions include an inter-terminal region arranged between the connection terminals of two specific adjacent drive units among the plurality of drive units.
The plurality of inspection pads are connected to the wiring portion through the inter-terminal region.
The liquid crystal display device according to any one of claims 1 to 9.

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