JP2021118482A - Power amplifier - Google Patents

Abstract

To provide a power amplifier that can improve the efficiency.SOLUTION: In a power amplifier 10, an amplification unit 16 amplifies an input signal and outputs the amplified signal from an output terminal T2. An inductive element 18 has one end to which a power supply voltage is supplied and the other end connected to the output terminal T2. The power supply voltage is set such that the reciprocal of the real part of the optimum load admittance of the amplification unit 16 whose output characteristic has a predetermined characteristic is substantially equal to the predetermined characteristic impedance. At the frequency of the input signal, the imaginary part of the admittance of the inductive element 18 is substantially equal to the imaginary part of the optimum load admittance.SELECTED DRAWING: Figure 2

Description

The present disclosure relates to a power amplifier that amplifies a high frequency signal.

In recent years, the development of wireless communication systems and wireless power transmission systems has been promoted. In these techniques, a power amplifier that power-amplifies a high-frequency signal and outputs the amplified signal to a load is used (see, for example, Patent Document 1).

Japanese Unexamined Patent Publication No. 2000-165163

In the technique of Patent Document 1, a matching circuit is connected between the drain and the load of the transistor of the power amplifier. Since the matching circuit has a loss, the output power is reduced, and as a result, the drain efficiency and the power addition efficiency are reduced.

The present disclosure has been made in view of these issues, and one of its exemplary purposes is to provide a power amplifier that can improve efficiency.

In order to solve the above problems, the power amplifier of a certain aspect of the present disclosure is provided to an amplification unit that amplifies an input signal and outputs the amplified signal from an output terminal, one end to which a power supply voltage is supplied, and an output terminal. It comprises an inductive element having a connected other end. The power supply voltage is set so that the reciprocal of the real part of the optimum load admittance of the amplification unit whose output characteristic has a predetermined characteristic is substantially equal to the predetermined characteristic impedance. At the frequency of the input signal, the imaginary part of the admittance of the inductive element is substantially equal to the imaginary part of the optimal load admittance.

It should be noted that any combination of the above components and those in which the components and expressions of the present disclosure are mutually replaced between methods, systems and the like are also effective as aspects of the present disclosure.

According to the present disclosure, it is possible to provide a power amplifier capable of improving efficiency.

It is a circuit diagram of the power amplification device which concerns on a comparative example. It is a circuit diagram of the power amplification apparatus which concerns on 1st Embodiment. It is an admittance chart which shows the power supply voltage dependence of the optimum load admittance of the amplification part of FIG. It is an admittance chart which shows the adjustment range of the optimum load admittance of the amplification part of FIG. It is a figure which shows the input power dependence of the output power, gain, drain efficiency and power addition efficiency of the power amplifier of FIG. It is a circuit diagram of the amplification part which concerns on 2nd Embodiment.

The present inventors have studied power amplifiers and obtained the following findings. FIG. 1 is a circuit diagram of a power amplification device 100 according to a comparative example. The power amplification device 100 includes a power amplifier 110 and a DC power supply 112. The power amplifier 110 includes an input matching circuit 114, an inductor (choke coil) 118, a transistor 120, and an output matching circuit 122.

The DC power supply 112 supplies a power supply voltage to the drain of the transistor 120 via the inductor 118. The inductor 118 is a bias voltage supply inductor, and its inductance is set so as to have a sufficiently high impedance at the frequency of the input signal.

Input matching circuit 114 performs impedance conversion between the input impedance of the signal source impedance Z _S of the transistor 120 of the signal source 30. The signal source impedance Z _S is equal to the characteristic impedance Z ₀ , for example, 50 Ω.

The transistor 120 power-amplifies the input signal supplied from the signal source 30 to the gate via the input matching circuit 114, and outputs the amplified signal from the drain to the output matching circuit 122. The input signal is a high frequency signal, and its frequency is, for example, 1 GHz or more. The power of the output signal of the transistor 120 is, for example, 500 mW or more. Therefore, the transistor 120 performs a large signal operation.

In the large signal operation of the transistor 120, the output characteristics such as output power and efficiency change depending on the impedance connected to the drain even if other conditions are constant. For example, the impedance at which the maximum output power and the maximum efficiency can be obtained when an input signal having a predetermined input power and a predetermined input frequency is supplied is called an _{optimum load impedance Zopt. The optimum load impedance Zopt} may change as the input power or input frequency of the input signal changes. _{The load impedance Z opt at which} this maximum output power is obtained is usually different from the _{load impedance Z opt at} which other output characteristics such as maximum drain efficiency can be obtained. _{Therefore, the optimum load impedance Zopt} that satisfies the optimum performance such as output and efficiency is obtained by measurement or simulation. Hereinafter, the optimum load impedance _Zopt will be described.

The output matching circuit 122 performs impedance conversion between the _{optimum load impedance Z opt} and the load impedance Z _{L of the load 32.} Specifically, the output matching circuit 122 converts the _{load impedance Z L} into the optimum load impedance Z _{opt. As a result, the optimum load impedance Zopt} can be shown to the drain of the transistor 120, and the transistor 120 can output the optimum output under predetermined conditions. The output signal output from the transistor 120 is supplied to the load 32 via the output matching circuit 122.

The equivalent circuit on the output side of the transistor 120 is approximately represented by a current source and a capacitor connected in parallel between the drain and the source. Therefore, the optimum load impedance _Zopt of the transistor 120 is generally inductive.

Here, consider an ideal transistor that ignores the capacitor component and the resistance component. When operating the transistor as a class B amplifier, considers the optimum load impedance _{Z opt} and the optimum load resistance _{R opt,} relationship between the output power Pout and the optimum load resistance _{R opt} is expressed by the following equation (1). Let the power supply voltage be Vdc.
^{_{R opt = Vdc 2 / 2Pout (}} 1)

Therefore, in the case of an output power of several hundred mW or more and a power supply voltage of several V, the optimum load resistance R _opt is a value lower than 50Ω. For example, in the case of an output power of 1.25 W and a power supply voltage of 5 V, the optimum load resistance R _opt is 10 Ω. The load impedance Z _L is equal to the characteristic impedance Z _0, and is, for example, 50 Ω.

In this case, the output matching circuit 122 _{converts 50 Ω of the load impedance Z L} into 10 Ω of the optimum load resistance R _opt. The output matching circuit 122 is composed of reactance elements such as an inductor, a capacitor, and a transmission line, and has a loss of about 1 dB when converting 50 Ω to 10 Ω due to the resistance component of the reactance element. The smaller the optimum load resistance R _{opt, the} larger the loss of the output matching circuit 122. These things also apply to the actual transistor 120 in consideration of the capacitor component and the like. As described above, this loss reduces the output power and the efficiency.

The present inventor has repeated research based on these findings, and can increase the optimum load resistance _Ropt by increasing the power supply voltage, and further, output by appropriately setting the value of the inductor 118 for bias voltage supply. It has been found that the matching circuit 122 can be eliminated and the efficiency can be improved. The embodiment was devised based on such thoughts, and its specific configuration will be described below.

Hereinafter, embodiments for carrying out the present disclosure will be described in detail with reference to the drawings. In the description, the same elements are designated by the same reference numerals, and duplicate description will be omitted as appropriate.

(First Embodiment)
FIG. 2 is a circuit diagram of the power amplification device 1 according to the first embodiment. The power amplification device 1 can be used, for example, as a power amplifier for a wireless communication system or a wireless power transmission system. The power amplification device 1 includes a power amplifier 10 and a DC power supply 12.

The power amplifier 10 power-amplifies the input signal supplied from the signal source 30 and supplies the amplified signal to the load 32. An example of the frequency of the input signal and the power range of the output signal is the same as that of the comparative example. The DC power supply 12 supplies a DC power supply voltage to the power amplifier 10.

The power amplifier 10 includes an input matching circuit 14, an amplification unit 16, and an inductive element 18. Input matching circuit 14 performs impedance conversion of the signal source impedance Z _S of the signal source 30 and the input impedance of the amplifier unit 16.

The amplification unit 16 has a control terminal T1, an output terminal T2, and a ground terminal T3, power-amplifies the input signal supplied to the control terminal T1 via the input matching circuit 14, and outputs the amplified signal from the output terminal T2. Output. The ground terminal T3 is grounded. A load 32 having a load impedance Z _L substantially equal to a predetermined characteristic impedance Z ₀ is directly connected to the output terminal T2. That is, there is no output matching circuit between the output terminal T2 and the load 32. The output terminal T2 and the load 32 may be directly connected via a transmission line having _{a characteristic impedance Z 0.} The characteristic impedance Z ₀ is generally 50Ω, but may be another value of, for example, 10Ω to 100Ω. The load impedance Z _L represents the input impedance of the next-stage element or circuit to which the output signal is supplied. An antenna may be connected as the load 32.

The amplification unit 16 includes a transistor 20 using a compound semiconductor as a semiconductor material. An example of a compound semiconductor is a nitride semiconductor such as gallium nitride (GaN). The transistor 20 is preferably a high electron mobility transistor using gallium nitride, that is, a GaN-HEMT (High Electron Mobility Transistor). In the amplification unit 16, the control terminal T1 is the gate of the transistor 20, the output terminal T2 is the drain, and the ground terminal T3 is the source.

The inductive element 18 is an inductor having an inductance L1 and has one end to which a power supply voltage is supplied from the DC power supply 12 and the other end connected to the output terminal T2 of the amplification unit 16. One end of the inductive element 18 is AC grounded at the frequency of the input signal by a capacitor (not shown) or the like. The inductive element 18 functions as an inductor for supplying a bias voltage. The inductive element 18 may be a transmission line such as a short stub.
A bias voltage is also supplied to the control terminal T1 of the amplification unit 16 from a bias circuit (not shown).

_{The optimum load admittance Y opt} (= 1 / Z _opt ) in which the output characteristic of the amplification unit 16 has a predetermined characteristic is the admittance when the load 32 side is viewed from the output terminal T2 of the amplification unit 16. When the output characteristic becomes a predetermined characteristic, for example, it means that the output power is maximized, the drain efficiency or the power addition efficiency is maximized, and the like.

The optimum load is inductive as described above, and is represented by the parallel connection of _{the optimum load resistor R opt} and the inductor L _opt. Therefore, optimum load admittance _{Y opt} is expressed by equation (2).
Y _opt = 1 / R _opt + 1 / jωL _opt (2)

Figure 3 is a admittance chart showing a power supply voltage dependence of the optimum load admittance Y _opt of the amplifier 16 of FIG. As can be seen from the above equation (1), when the power supply voltage is increased while the output power is constant, the optimum load resistance _Rot increases. Therefore, increasing the power supply voltage, the optimum load admittance Y _opt moves on admittance chart in the direction in which the conductance is low. Therefore, the optimum load admittance _{Y opt,} conductance from 1 / _{Z 0} greater than point P1, the conductance can be moved to the point P2 on 1 / _{Z 0} is a constant conductance circle C10.

すなわち、最適負荷抵抗Ｒ_ｏｐｔが大きい方が整合回路損失を無視した場合の効率は高くなる。よって、最適負荷抵抗Ｒ_ｏｐｔが特性インピーダンスＺ_０と等しくないにもかかわらず整合回路を設けなかった場合は不整合損が生じるが、最適負荷抵抗Ｒ_ｏｐｔが特性インピーダンスＺ_０より大きい方が特性インピーダンスＺ_０より小さい場合に比べて有利なためである。 The power supply voltage is preset so that the reciprocal of the real part of the optimum load admittance Y _{opt , that is, the optimum load resistance R opt} is substantially equal to the predetermined characteristic impedance Z _0. Incidentally, the inverse of the real part of the optimum load admittance _{Y opt} is when it is in the range of -10% to 20% of the characteristic impedance _{Z 0,} the inverse of the real part of the optimum load admittance _{Y opt} is the characteristic impedance _{Z 0} and substantially equal to That is. Inverse of the real part of the optimum load admittance Y _opt is preferably set within a range of ± 5% of the characteristic impedance Z _0, towards the difference between reciprocal and characteristic impedance Z ₀ of the real part of the optimum load admittance Y _opt is small Is preferable. This is because the smaller the difference, the closer the output power to the optimum output power can be obtained. The power supply voltage is set so as not to exceed the maximum rating of the source-drain voltage of the transistor 20. Here, the reason why the optimum load resistance R _opt is in the range of -10% to 20% of the characteristic impedance Z _{0 is as follows.} An actual transistor has a resistance component Ron called an ON resistance, and in the case of a class B amplifier, for example, its efficiency is given by the following equation (3).

That is, the larger the optimum load resistance R _{opt, the} higher the efficiency when the matching circuit loss is ignored. Therefore, if the matching circuit is not provided even though the optimum load resistance R _opt is not equal to the characteristic impedance Z ₀ , a mismatch loss occurs, but the one where the optimum load resistance R _opt is larger than the characteristic impedance Z ₀ is the characteristic impedance. This is because it is more advantageous than the case where it is smaller than _{Z 0.}

Figure 4 is a admittance chart showing an adjustment range of the optimum load admittance Y _opt of the amplifier 16 of FIG. By adjusting the power supply voltage supplied from the DC power supply 12, the optimum load admittance _Yopt is preliminarily adjusted within the shaded area 70 of FIG. Assuming that Z1 = 0.9Z ₀ and Z2 = 1.2Z ₀ , the region 70 is a region surrounded by an equal conductance circle C1 having a conductance of 1 / Z1 and an equal conductance circle C2 having a conductance of 1 / Z2. , The susceptance is the negative region, that is, the inductive region.

At the frequency of the input signal, the imaginary part (-1 / ωL1) of the admittance of the inductive element 18 is substantially equal to the imaginary part (-1 / ωL _{opt ) of the optimum load admittance Y opt.} That is, the inductance L1 of the inductive element _{18, L opt} substantially equal. Inductive component of optimum load admittance Y _opt can be said to have been achieved by the inductive element 18. Incidentally, when the imaginary part of the admittance of the inductive element 18 is in the range of ± 10% of the imaginary part of the optimum load admittance Y _opt, the imaginary part and the real of the imaginary part of the admittance of the inductive element 18 is optimum load admittance Y _opt Is said to be equal. The imaginary part of the admittance of the inductive element 18, optimum load admittance Y _opt for is preferably set within a range of ± 5% of the imaginary part, imaginary imaginary part and optimum load admittance Y _opt admittance of inductive element 18 It is preferable that the difference from the part is also small. This is because the smaller the difference, the closer the output power to the optimum output power can be obtained.

Next, the experimental results will be described. The characteristic impedance Z ₀ was set to 27Ω. A commercially available CGH40025F (manufactured by Cree), which is a GaN-HEMT, was used as the transistor 20, and the power amplifier 10 of FIG. 2 was manufactured on a substrate. To load pull simulation using a model of the GaN-HEMT, the power supply voltage 40V, in the frequency 2.45GHz of the input signal, the inverse of the real part of the optimum load admittance _{Y opt} for the maximum output power of 45dBm is obtained 27Ω met rice field. The imaginary part of the optimum load admittance Y _opt is realized by inductive element 18. FIG. 5 shows the results of measuring the output power and the like of the power amplifier 10 in this configuration.

FIG. 5 shows the input power dependence of the output power, gain, drain efficiency, and power addition efficiency of the power amplifier 10 of FIG. FIG. 5 shows the measurement result and the simulation result. According to the measurement results, when the output power Pout was 45.3 dBm, the drain efficiency DE was 82.3%, the power addition efficiency PAE was 78.8%, and the gain Gain was 13.6 dB. The drain efficiency and the power addition efficiency were improved as compared with the configuration of the comparative example. The output power is a value converted to 50Ω.

According to this embodiment, since the inverse of the real part of the optimum load admittance Y _opt is the characteristic impedance Z ₀ substantially equal to, its imaginary part is realized by the inductive element 18 of the bias voltage supply, amplification by the output terminal T2 of the part 16 connecting the load 32 of the characteristic impedance _{Z 0} can directly show a generally optimum load admittance _{Y opt} to an output terminal T2 of the amplifier 16. As a result, the power amplifier 10 can output substantially desired optimum output power. Compared with the comparative example, it is not necessary to use an output matching circuit, so that the loss of output power can be reduced. Therefore, the drain efficiency and the power addition efficiency can be improved as compared with the comparative example. Further, the power amplifier 10 can be made smaller and lighter than the comparative example.

Further, by using a compound semiconductor of the transistor 20, because of the high maximum rating of the source-drain voltage as compared with the transistor of silicon (Si), it is possible to increase the power supply voltage, the real part of the optimum load admittance Y _opt You can expand the range of choices.

Further, by using the nitride semiconductor transistor 20, the maximum rating of the source-drain voltage is higher than that of a transistor such as gallium arsenide (GaAs), so that the power supply voltage can be further increased and the optimum load admittance. The range of choices for the real part of _{Yopt can be further expanded.}

Further, by using GaN-HEMT as the transistor 20, it is possible to operate at a higher speed than the FET, and it is possible to improve characteristics such as output power at a frequency of 1 GHz or more.

(Second Embodiment)
In the first embodiment, depending on the characteristics of the transistor 20, the desired maximum output power, and _{the actual part of the desired optimum load admittance Yopt} , the power supply voltage to be applied determines the maximum rating of the source-drain voltage of the transistor 20. It is expected that it will exceed. Therefore, in the second embodiment, the number of transistors constituting the amplification unit 16 is increased. Hereinafter, the differences from the first embodiment will be mainly described.

FIG. 6 is a circuit diagram of the amplification unit 16 according to the second embodiment. The amplification unit 16 includes a transistor 20, a transistor 22, and a capacitor 24. The transistor 20 and the transistor 22 are cascode-connected. The drain of the transistor 20 is connected to the source of the transistor 22. The gate of the transistor 22 is connected to one end of the capacitor 24. The other end of the capacitor 24 is connected to the source of the transistor 20, that is, the ground terminal T3. The capacitance value of the capacitor 24 is set so that the gate of the transistor 22 is AC grounded at the frequency of the input signal. The drain of the transistor 22 is the output terminal T2 of the amplification unit 16. A bias voltage is also supplied to the gate of the transistor 22 from a bias circuit (not shown). In this way, the transistor 20 constitutes a source grounded amplifier circuit, and the transistor 22 constitutes a gate grounded amplifier circuit.

As a result, the sum of the source-drain voltage of the transistor 20 and the source-drain voltage of the transistor 22 becomes the power supply voltage, so that the power supply voltage exceeds the maximum rating of the source-drain voltage of the transistors 20 and 22, respectively. Can be applied. For example, in the case of the transistors 20 and 22 having the same maximum rating as in the first embodiment, a power supply voltage twice as high as that in the first embodiment can be applied. Thus, the transistor 20 and 22, the maximum output power, it is possible to increase the width of the real part of the selection of the optimum load admittance Y _opt, it is possible to increase the freedom of design power amplifier 1.

The number of transistors connected by cascode is not limited to two, and may be three or more. In this case, one or more other transistors constituting the gate grounded amplifier circuit may be inserted between the drain of the transistor 20 and the source of the transistor 22, and the current paths of those transistors may be connected in series.

The present disclosure has been described above based on the embodiment. It will be understood by those skilled in the art that the present disclosure is not limited to the above-described embodiment, various design changes are possible, various modifications are possible, and such modifications are also within the scope of the present disclosure. It is about to be.

The outline of one aspect of the present disclosure is as follows. The power amplifier of a certain aspect of the present disclosure has an amplification unit that amplifies an input signal and outputs the amplified signal from an output terminal, one end to which a power supply voltage is supplied, and the other end connected to the output terminal. The power supply voltage is set so that the inverse number of the real part of the optimum load admittance of the amplification unit having the inductive element and the output characteristic having a predetermined characteristic is substantially equal to the predetermined characteristic impedance. At the frequency of the input signal, the imaginary part of the admittance of the inductive element is substantially equal to the imaginary part of the optimum load admittance.

According to this aspect, efficiency can be improved.

The amplification unit may include a transistor of a compound semiconductor. In this case, the range of selection of the real part of the optimum load admittance can be expanded.

The transistor may be a nitride semiconductor transistor. In this case, the range of selection of the real part of the optimum load admittance can be further expanded.

The transistor may be GaN-HEMT. In this case, characteristics such as output power at high frequencies can be improved.

The frequency of the input signal may be 1 GHz or more, and the power of the output signal output from the output terminal may be 500 mW or more. In this case, the power amplifier can be used as a high frequency power amplifier.

The amplification unit may have a plurality of transistors connected by cascode. In this case, the selection of the real part of the transistor, the maximum output power, and the optimum load admittance can be expanded.

1 ... Power amplifier, T1 ... Control terminal, T2 ... Output terminal, T3 ... Ground terminal, 10 ... Power amplifier, 12 ... DC power supply, 16 ... Amplifier, 18 ... Inductive element, 20, 22 ... Transistor, 32 ... load.

Claims (6)

An amplification unit that amplifies the input signal and outputs the amplified signal from the output terminal,
An inductive element having one end to which a power supply voltage is supplied and the other end connected to the output terminal.
With
The power supply voltage is set so that the reciprocal of the real part of the optimum load admittance of the amplification unit having a predetermined characteristic is substantially equal to the predetermined characteristic impedance.
At the frequency of the input signal, the imaginary part of the admittance of the inductive element is substantially equal to the imaginary part of the optimum load admittance.
A power amplifier characterized by that. The amplification unit includes a transistor of a compound semiconductor.
The power amplifier according to claim 1. The transistor is a nitride semiconductor transistor.
The power amplifier according to claim 2. The transistor is a GaN-HEMT.
The power amplifier according to claim 3. The frequency of the input signal is 1 GHz or more, and
The power of the output signal output from the output terminal is 500 mW or more.
The power amplifier according to any one of claims 1 to 4. The amplification unit has a plurality of transistors connected by cascode.
The power amplifier according to any one of claims 1 to 5.

Images