JP2021065773A - Game machine - Google Patents

Abstract

To provide a game machine capable of notifying opening of a door body to a specification device even when power to the game machine is turned off.SOLUTION: Since a capacitor CD 6 is provided in a frame opening detection circuit 270, the frame opening detection circuit 270 can output a high-signal in which an output period is varied in accordance with an open period of an inner frame 12 or a front frame 14 to a hall computer 262 which keeps operating for 24 hours, even when power to a Pachinko machine is shut down and DC voltage of 12 V is not supplied from a DC power DC 1. Therefore, even when power to the Pachinko machine is shut down, opening of the inner frame 12 or the front frame 14 can be detected, and the open period of the inner frame 12 or the front frame 14 can also be detected. In addition, the Pachinko machine can be specified in which opening of the inner frame 12 or the front frame 14 is performed, and the open time of the inner frame 12 or the front frame 14 of the specified Pachinko machine can also be detected.SELECTED DRAWING: Figure 18

Description

The present invention relates to a gaming machine typified by a pachinko machine, a rotating cylinder type gaming machine (for example, a slot machine), a rotating cylinder type gaming machine using a gaming ball, and the like.

In the pachinko machine, when a ball driven into the game area enters the symbol operating port, a lottery is performed at the timing of the entry. Further, in a spinning machine using a slot machine or a game ball, when the start lever is operated, a lottery is performed at the timing of the operation. As a result of the lottery, for example, when a big hit occurs, a large number of prize balls and coins can be paid out. Since the control for determining the lottery and the jackpot is performed by the main control device, the main control device is likely to be the target of fraudulent activity.

As a specific fraudulent act, for example, the main controller is replaced with a fraudulent one in which a jackpot occurs frequently, or a fraudulent board (for example, a "hanging board") is connected to the main controller to make a jackpot. There are things that illegally generate. Further, in the case of a pachinko machine, there is also a fraudulent act of illegally bending a nail driven on the surface of the game board to make it easier for the ball to enter the winning opening or the symbol operating opening.
In the case of pachinko machines, the main controller is mounted on the back of the game board. On the other hand, a glass frame is provided on the front surface of the game board, and the glass frame can be opened and closed individually with respect to the inner frame body on which the game board is mounted. Therefore, when a fraudster commits a fraudulent act against the game board surface or the main control device, the inner frame or the glass frame must be opened, but when the inner frame or the glass frame is opened, the inner frame or the glass frame must be opened. Since the opening is detected by the sensor and notified to the hall computer that manages the amusement park, it is possible to easily grasp which pachinko machine the fraudulent act was committed against.

Japanese Unexamined Patent Publication No. 2001-198332

However, if an intruder invades, for example, at midnight after the amusement park is closed and the intruder opens the inner frame or the glass frame and commits an illegal act, the power of the pachinko machine is turned off at that time. Since the pachinko machine is stopped, there is a problem that the opening of the inner frame or the glass frame cannot be detected and the opening cannot be notified to the hall computer.

The present invention has been made to solve the above-exemplified problems and the like, and provides a gaming machine capable of notifying a specific device of the opening of a door body even when the power of the gaming machine is turned off. The purpose is to do.

In order to achieve this object, the gaming machine according to claim 1 is provided in a space formed by a main body, a door body that opens and closes the front surface of the main body, and the door body and the main body to control the game. The door opening detecting means for detecting the opening of the door body with respect to the main body and the detection result when the opening of the door body is detected by the door opening detecting means are provided. The output means includes an output means for outputting to the specific device, and the output means outputs the detection result by the door open detection means to the specific device when the power of the game machine is turned off and the control means is stopped. It is configured to be possible. The space formed by the door body and the main body indicates the back surface or the back surface side of the door body that cannot be touched when the door body is closed.

The gaming machine according to claim 2 is the gaming machine according to claim 1, wherein the door body has an inner frame that is opened and closed with respect to the main body and a transparent plate support door that is opened and closed with respect to the inner frame. The door opening detecting means is provided on the inner frame and the transparent plate support door, respectively, and is connected in parallel to the output means, and the output means is said by the door opening detecting means. When the opening of at least one of the inner frame or the transparent plate support door is detected, the detection result is output to the specific device.

The gaming machine according to claim 3 is the gaming machine according to claim 1 or 2, wherein the door opening detecting means is conducted when the door body is open, while the door body is closed. If so, it is configured to be blocked.

The gaming machine according to claim 4 includes, in the gaming machine according to any one of claims 1 to 3, an off-time operating means that is charged while the power of the gaming machine is on, and the output means is the output means. It operates by the electric charge or electric power charged in the operating means during off.

According to the gaming machine according to claim 1, even when the power of the gaming machine is turned off and the control means is stopped, when the opening of the door body is detected by the door opening detecting means, the detection result is It is output to a specific device by the output means. Therefore, for example, even if the door body is opened due to an illegal act by someone after the store is closed with all the gaming machines turned off, there is an effect that the game machine with the opened door body can be identified by a specific device. is there.

According to the gaming machine according to claim 2, in addition to the effects produced by the gaming machine according to claim 1, the following effects are exhibited. That is, since the door opening detecting means is provided on the inner frame and the transparent plate support door, respectively, and is connected in parallel to the output means, at least one of the inner frame and the transparent plate supporting door can be opened by the door opening detecting means. If it is detected, the output means outputs the detection result to the specific device. Therefore, even if either the inner frame or the transparent plate support door constituting the door body is opened, there is an effect that the opening can be notified to the specific device by the output means of 1.

According to the gaming machine according to claim 3, in addition to the effect of the gaming machine according to claim 1 or 2, the door opening detecting means is conducted when the door body is open, while the door body is Since it is shut off when it is closed, there is an effect that the output means can be operated only while the door body is open, which is the time when a fraudulent act is executed, and the power consumption can be suppressed to a small value.
According to the gaming machine according to claim 4, in addition to the effect of the gaming machine according to any one of claims 1 to 3, an off-time operating means that is charged while the gaming machine is powered on is provided, and an output is provided. Since the means operates by the electric charge or electric power charged in the operating means during the off, there is an effect that the output means can be operated even after the power of the gaming machine is turned off.

It is a front view of a pachinko machine. It is a front view of the game board of a pachinko machine. It is a rear view of a pachinko machine. It is a perspective view of the pachinko machine in a state where the inner frame, the front frame and the lower plate unit are open. It is a figure which showed the structure of a switch. It is a block diagram which shows the electric structure of a pachinko machine. It is a block diagram which showed the electric structure of a frame opening detection circuit and an external output terminal board. 6 is a timing chart showing the relationship between the state of the inner frame, the state of the front frame, the TRG terminal voltage of the timer, the OUT terminal voltage of the timer, and the output of the external output terminal plate. (A) is a diagram schematically showing an area division setting and an effective line setting of a display screen, and (b) is a diagram illustrating an actual display screen. It is a figure which shows the outline of various counters. It is a flowchart which shows the start-up process which is executed by MPU 201 in the main control device 110. It is a flowchart which shows the main process executed by MPU in a main control unit. It is a flowchart which shows the variation process which is executed in the main process. It is a flowchart which showed the fluctuation start processing executed in the fluctuation processing. It is a flowchart which shows the timer interrupt processing. It is a flowchart which shows the start winning process which is executed in the timer interrupt process. It is a flowchart which shows the NMI interrupt processing. It is a block diagram which showed the electrical structure of the frame opening detection circuit of 2nd Embodiment. 6 is a timing chart showing the relationship between the state of the inner frame 12, the state of the front frame 14, the voltage of A of the frame opening detection circuit of the second embodiment, and the output of the external output terminal plate. It is a block diagram which showed the electrical structure of the frame opening detection circuit of 3rd Embodiment. 6 is a timing chart showing the relationship between the state of the inner frame, the state of the front frame, the TRG terminal voltage of the timer of the third embodiment, the OUT terminal voltage of the timer of the third embodiment, and the output of the external output terminal plate.

Hereinafter, an embodiment of a pachinko gaming machine (hereinafter, simply referred to as a “pachinko machine”) will be described with reference to the drawings. FIG. 1 is a front view of the pachinko machine 10, FIG. 2 is a front view of the game board 13 of the pachinko machine 10, and FIG. 3 is a rear view of the pachinko machine 10.

As shown in FIG. 1, the pachinko machine 10 has an outer frame 11 in which an outer shell is formed by a wooden frame combined in a substantially rectangular shape, and an outer frame 11 formed in substantially the same outer shape as the outer frame 11. It is provided with an inner frame 12 that is supported so as to be openable and closable. Metal hinges 18 are attached to the outer frame 11 at two upper and lower positions on the left side of the front view (see FIG. 1) in order to support the inner frame 12, and the side on which the hinge 18 is provided is used as an opening / closing axis. The frame 12 is supported so as to be openable and closable toward the front side of the front surface.

A game board 13 (see FIG. 2) having a large number of nails, winning openings 63, 64, etc. is detachably attached to the inner frame 12 from the back surface side. A ball game is performed by a ball flowing down the front surface of the game board 13. The inner frame 12 includes a ball launching unit 112a (see FIG. 5) that launches a ball into the front region of the game board 13 and a launch that guides a ball launched from the ball launching unit 112a to the front region of the game board 13. Rails (not shown) etc. are attached.

On the front side of the inner frame 12, a front frame 14 that covers the upper side of the front surface and a lower plate unit 15 that covers the lower side thereof are provided. Metal hinges 19 are attached to the upper and lower two places on the left side of the front view (see FIG. 1) to support the front frame 14 and the lower plate unit 15, and the front frame with the side on which the hinge 19 is provided as an opening / closing axis. 14 and the lower plate unit 15 are supported so as to be openable and closable toward the front side of the front surface. The lock of the inner frame 12 and the lock of the front frame 14 are released by inserting a dedicated key into the keyhole 21 of the cylinder lock 20 and performing a predetermined operation.

The front frame 14 is formed by assembling decorative resin parts, electric parts, and the like, and a window portion 14c having a substantially elliptical opening is provided at a substantially central portion thereof. A glass unit 16 having two plate glasses is arranged on the back surface side of the front frame 14, and the front surface of the game board 13 can be visually recognized on the front side of the pachinko machine 10 via the glass unit 16. On the front frame 14, an upper plate 17 for storing balls is formed in a substantially box shape with the upper surface open so as to project forward, and prize balls, rental balls, and the like are discharged to the upper plate 17. The bottom surface of the upper plate 17 is formed so as to be inclined downward to the right side when viewed from the front (see FIG. 1), and the ball thrown into the upper plate 17 is guided to the ball launching unit 112a by the inclination. Further, a frame button 22 is provided on the upper surface of the upper plate 17. The frame button 22 is operated by the player, for example, when changing the effect pattern of the variable display displayed on the third symbol display device 81 or changing the effect content at the time of reach effect.

In addition, the front frame 14 is provided with light emitting means such as various lamps around the front frame 14 (for example, a corner portion). These light emitting means change and control the light emitting mode by lighting or blinking according to a change in the gaming state at the time of a big hit or a predetermined reach, and play a role of enhancing the effect during the game. Illuminations 29 to 33 having a light emitting means such as an LED are provided on the peripheral edge of the window portion 14c. In the pachinko machine 10, these illumination units 29 to 33 function as effect lamps such as jackpot lamps, and each illumination unit 29 to 33 lights up by lighting or blinking the built-in LED at the time of jackpot or reach production. Or, it blinks to notify that the jackpot is in progress or that the reach is one step before the jackpot.

Further, in the upper left portion of the front frame 14 when viewed from the front (see FIG. 1), a light emitting means such as an LED is built in, and a display lamp 34 capable of displaying when the prize ball is being paid out and when an error occurs is provided. Further, on the lower side of the illuminated portion 32 on the right side, a small window 35 is formed by attaching a transparent resin from the back surface side so that the back surface side of the front frame 14 can be visually recognized, and a sticking space K1 on the front surface of the game board 13 (FIG. The certificate stamp or the like attached to (see 2) is visible from the front of the pachinko machine 10. Further, in the pachinko machine 10, in order to bring out more glitter, a plating member 36 made of ABS resin, which is chrome-plated, is attached to a region around the illuminated portions 29 to 33.

A ball lending operation unit 40 is arranged below the window unit 14c. The ball lending operation unit 40 is provided with a frequency display unit 41, a ball lending button 42, and a return button 43. When the ball lending operation unit 40 is operated with bills, cards, etc. inserted into the card unit (ball lending unit) (not shown) arranged on the side of the pachinko machine 10, the ball is operated according to the operation. Lending is done. Specifically, the frequency display unit 41 is an area in which balance information such as a card is displayed, and the built-in LED lights up and the balance is displayed as numerical value as balance information. The ball lending button 42 is operated to obtain a lending ball based on the information recorded on the card or the like (recording medium), and the lending ball is supplied to the upper plate 17 as long as the remaining amount is present on the card or the like. Will be done. The return button 43 is operated when requesting the return of the card or the like inserted in the card unit. A pachinko machine in which balls are lent directly to the upper plate 17 from a ball lending device or the like without going through a card unit, a so-called cash machine, does not require a ball lending operation unit 40. In this case, the ball lending operation unit 40 is not required. A decorative sticker or the like may be added to the installation portion of the above to make the component configuration common. It is possible to standardize pachinko machines and cash machines that use card units.

In the lower plate unit 15 located below the upper plate 17, a lower plate 50 for storing balls that could not be stored in the upper plate 17 is formed in a substantially box shape with an open upper surface in the central portion thereof. There is. On the right side of the lower plate 50, an operation handle 51 operated by a player to drive the ball into the front surface of the game board 13 is arranged, and driving of the ball launching unit 112a is permitted inside the operation handle 51. Touch sensor 51a for this purpose, push-button type stop switch 51b that stops the firing of the ball during the pressing operation, and a variable resistor that detects the amount of rotation operation of the operation handle 51 by the change in electrical resistance. (Not shown) and is built-in. When the operation handle 51 is rotated clockwise by the player, the touch sensor is turned on and the resistance value of the variable resistor changes according to the operation amount, depending on the rotation operation amount of the operation handle 51. The ball is launched with a strength corresponding to the resistance value of the changing variable resistor, whereby the ball is driven into the front surface of the game board 13 with a flying amount corresponding to the operation of the player. Further, when the operation handle 51 is not operated by the player, the touch sensor 51a and the stop switch 51b are turned off.

A ball pulling lever 52 for operating the ball stored in the lower plate 50 when the ball stored in the lower plate 50 is discharged downward is provided in the lower front portion of the lower plate 50. The ball pulling lever 52 is always urged to the right, and by sliding it to the left against the urging, the bottom opening formed on the bottom surface of the lower plate 50 is opened, and the bottom opening is opened. The ball naturally falls from the bottom opening and is discharged. The operation of the ball removing lever 52 is usually performed in a state where a box (generally referred to as "Senryobako") for receiving the balls discharged from the lower plate 50 is placed below the lower plate 50. An operation handle 51 is arranged on the right side of the lower plate 50 as described above, and an ashtray 53 is attached to the left side of the lower plate 50.

As shown in FIG. 2, the game board 13 has a wooden base plate 60 cut into a substantially square shape in front view, a large number of nails and windmills for ball guidance, rails 61, 62, a general winning opening 63, and a first. The ball entry port 64, the variable winning device 65, the variable display device unit 80, and the like are assembled and configured, and the peripheral edge portion thereof is attached to the back surface side of the inner frame 12. The general winning opening 63, the first winning opening 64, the variable winning device 65, and the variable display device unit 80 are arranged in the through holes formed in the base plate 60 by router processing, and are wood screws from the front side of the game board 13. It is fixed by etc. Further, the front central portion of the game board 13 can be visually recognized from the front side of the inner frame 13 through the window portion 14c (see FIG. 1) of the front frame 14. The configuration of the game board 13 will be described below.

An outer rail 62 formed by bending a strip-shaped metal plate into a substantially arc shape is planted on the front surface of the game board 13, and a strip-shaped metal plate is placed inside the outer rail 62 in the same manner as the outer rail 62. The arc-shaped inner rail 61 formed in 1 is planted. The inner rail 61 and the outer rail 62 surround the outer periphery of the front surface of the game board 13, and the game board 13 and the glass unit 16 (see FIG. 1) surround the front and back, so that the front surface of the game board 13 is surrounded by a ball. A game area in which the game is played is formed by the behavior of. The game area is a substantially circular area (a winning opening or the like is arranged and the launched ball is arranged) formed on the front surface of the game board 13 by being divided by two rails 61 and 62 and an arc member 70. The area where it flows down).

The two rails 61 and 62 are provided to guide the ball launched from the ball launching unit 112a to the upper part of the game board 13. A return ball prevention member 68 is attached to the tip of the inner rail 61 (upper left portion in FIG. 2) to prevent the ball once guided to the upper part of the game board 13 from returning to the ball guide passage. Will be done. A return rubber 69 is attached to the tip of the outer rail 62 (upper right part in FIG. 2) at a position corresponding to the maximum flight portion of the ball, and the ball launched with a predetermined momentum hits the return rubber 69 and has momentum. Is dampened and bounced back toward the center. Further, a resin arc member 70 formed by providing an arc connecting the rails on the inner surface side is used as a base between the lower right tip of the inner rail 61 and the upper right tip of the outer rail 62. It is fixed by driving it into the plate 60.

A first symbol display device 37 provided with a plurality of LEDs 37a and a 7-segment display 37b, which are light emitting means, is arranged on the upper right side of the game area when viewed from the front (upper right side in FIG. 2). The first symbol display device 37 displays according to each control performed by the main control device 110, and mainly displays the gaming state of the pachinko machine 10. The plurality of LEDs 37a indicate whether the pachinko machine 10 is in the probabilistic change, the time saving, or the normal state by the lighting state, indicate whether or not the pachinko machine 10 is in the fluctuating state by the lighting state, and the stop symbol corresponds to the probabilistic jackpot. Whether it is a symbol corresponding to a normal jackpot or a non-standard symbol is indicated by the lighting state, and the number of reserved balls is indicated by the lighting state. The 7-segment display device 37b displays the number of rounds during the jackpot and an error. The LED 37a is configured so that the emission colors (for example, red, green, and blue) of the LEDs are different, and the combination of the emission colors can suggest various gaming states of the pachinko machine 10 with a small number of LEDs. ..

Note that the above-mentioned pachinko machine 10 is in the probable change state is a game state in which the jackpot probability is increased and it is easy to shift to the special game state. Further, during the probability change in the present embodiment, the probability of hitting the second symbol is increased, and the ball is in a state of a game in which the ball can easily enter the first ball entry port 64. Further, when the pachinko machine 10 is in a short time, it is a state of a game in which the jackpot probability remains the same, only the hit probability of the second symbol is increased, and the ball can easily enter the first ball entrance 64. Further, when the pachinko machine 10 is in the normal state, it is a state of the game in which neither the probability change nor the time reduction is performed (the jackpot probability and the hit probability of the second symbol are not increased). In addition, depending on the gaming state of the pachinko machine 10, the time for opening the electric accessory (not shown) attached to the first entrance 64 and the number of times for the electric accessory to be opened per hit are changed. It may be a thing.

Further, in the game area, a plurality of general winning openings 63 are arranged in which 5 to 15 balls are paid out as prize balls when the balls win a prize. Further, a variable display device unit 80 is arranged in the central portion of the game area. The variable display device unit 80 includes a third symbol display device 81 composed of a liquid crystal display (hereinafter, simply abbreviated as “display device”) that variablely displays the third symbol triggered by winning a prize in the first ball opening 64. A second symbol display device 82 composed of a light emitting diode (hereinafter, abbreviated as “LED”) that fluctuates and displays the second symbol triggered by the passage of a ball at the second entry port 67 is provided. ..

The display content of the third symbol display device 81 is controlled by the display control device 114, which will be described later, and for example, three symbol sequences of left, middle, and right are displayed. Each symbol row is composed of a plurality of symbols, and these symbols are vertically scrolled for each symbol row so that the third symbol is variably displayed on the display screen of the third symbol display device 81. Further, in the present embodiment, the third symbol display device 81 is composed of a large liquid crystal display having an size of 8 inches, and the variable display device unit 80 is provided with a center frame so as to surround the outer periphery of the third symbol display device 81. 86 is arranged. In the third symbol display device 81 of the present embodiment, the game state is displayed by the control of the main control device 110 by the first symbol display device 37, whereas the display of the first symbol display device 37 is performed. A decorative display is made according to the above. In addition, instead of the display device, for example, a reel or the like may be used to configure the third symbol display device 81.

In addition, when the ball enters the first entry port 64 before the stop symbol (one of the probabilistic jackpot symbol, the normal jackpot symbol, and the off symbol) is displayed on the first symbol display device 37. , The number of times of ball entry is held up to 4 times, and the number of times of holding is indicated by the first symbol display device 37 and also by the number of lighting of the holding lamp 85. Four holding lamps 85 are provided for the maximum number of holding lamps 85, and are arranged symmetrically above the third symbol display device 81. In the present embodiment, the winning of the first ball opening 64 is configured to be held up to 4 times, but the maximum number of holdings is not limited to 4 times and is 3 times or less. , Or it may be set to 5 times or more (for example, 8 times). In addition, the hold lamp 85 is deleted, and the number of hold times of the variable display based on the winning of the first ball opening 64 is set as a number in a part of the third symbol display device 81, or the area divided into four is held. It may be displayed in a different mode (for example, a color or a lighting pattern) by the number of times. Further, since the number of holds is indicated by the first symbol display device 37, the hold lamp 85 may not be used to display the lighting.

The second symbol display device 82 has a display unit 83 of the second symbol and a holding lamp 84, and each time the ball passes through the second entry port 67, the display unit 83 serves as a display symbol (second symbol). When the "○" symbol and the "×" symbol are alternately lit to perform variable display, and the variable display is stopped at a predetermined symbol (in the present embodiment, the "○" symbol), the first 1 The ball entry port 64 is configured to be in an operating state (open) for a predetermined time. The number of times the ball has passed through the second entry port 67 is held up to four times, and the number of times the ball is held is displayed by the first symbol display device 37 described above and is also lit and displayed by the hold lamp 84. The variation display of the second symbol is performed by switching the lighting and non-lighting of a plurality of lamps on the display unit 83 as in the present embodiment, as well as the first symbol display device 37 and the third symbol display device. It may be done by using a part of 81. Similarly, the hold lamp 84 may be turned on by a part of the third symbol display device 81. Further, the maximum number of times of holding of the second ball opening 67 is not limited to four, as in the case of the first ball opening 64, but is three times or less, or five times or more (for example,). It may be set to 8 times). Further, since the number of holds is indicated by the first symbol display device 37, the hold lamp 84 may not be used to display the lighting.

Below the variable display device unit 80, a first ball entry port 64 into which a ball can enter is arranged. When a ball enters the first entry port 64, the first entry opening switch (not shown) provided on the back surface side of the game board 13 is turned on, and the first entry opening switch is turned on. A big hit lottery is made by the main control device 110, and the display according to the lottery result is indicated by the LED 37a of the first symbol display device 37. In addition, the first entry slot 64 is also one of the winning openings in which five balls are paid out as prize balls when a ball enters.

A variable winning device 65 is arranged below the first ball opening 64, and a horizontally long rectangular specific winning opening (large opening) 65a is provided in a substantially central portion thereof. In the pachinko machine 10, when the lottery in the main control device 110 becomes a big hit, after a predetermined time (variable time) elapses, the LED 37a of the first symbol display device 37 is turned on and the LED 37a of the first symbol display device 37 is turned on so as to be the stop symbol of the big hit. The stop symbol corresponding to the jackpot is displayed on the third symbol display device 81 to indicate the occurrence of the jackpot. After that, the gaming state transitions to a special gaming state (big hit) where the ball is easy to win. As this special game state, the specific winning opening 65a, which is normally closed, is opened for a predetermined time (for example, until 30 seconds have passed or until 10 balls are won).

The specific winning opening 65a is closed after a lapse of a predetermined time, and after the closing, the specific winning opening 65a is opened again for a predetermined time. The opening / closing operation of the specific winning opening 65a can be repeated up to 16 times (16 rounds), for example. The state in which this opening / closing operation is performed is a form of a special gaming state that is advantageous to the player, and a larger amount of prize balls than usual is paid out to the player as a game value (game value). Is done.

Specifically, the variable winning device 65 includes a horizontally long rectangular opening / closing plate that covers the specific winning opening 65a, and a large opening solenoid (not shown) for driving the opening / closing forward with the lower side of the opening / closing plate as an axis. And have. The specific winning opening 65a is normally closed so that the ball cannot win or it is difficult to win. In the case of a big hit, the large opening solenoid is driven to tilt the opening / closing plate downward on the front surface to temporarily form an open state in which the ball can easily win a prize in the specific winning opening 65a. It operates so as to alternate between the state and the state.

The special gaming state is not limited to the above-described form. A large opening that opens and closes separately from the specific winning opening 65a is provided in the game area, and when the LED 37a corresponding to the big hit is turned on in the first symbol display device 37, the specific winning opening 65a is opened for a predetermined time and the specific winning opening is opened. A special gaming state is a game state in which a large opening port provided separately from the specific winning opening 65a is opened a predetermined number of times for a predetermined time when the ball wins a prize in the specific winning opening 65a while the opening 65a is open. It may be formed.

Attachment spaces K1 and K2 for attaching certificate stamps, identification labels, etc. are provided at the left and right corners on the lower side of the game board 13, and the certificate stamps, etc. attached to the attachment space K1 are the front frame 14. It can be visually recognized through the small window 35 (see FIG. 1).

Further, the game board 13 is provided with an out port 66. Balls that do not enter any of the winning openings 63, 64, 65a are guided through the out opening 66 to a ball discharge path (not shown). A large number of nails are planted on the game board 13 in order to appropriately disperse and adjust the falling direction of the ball, and various members (accessories) such as a windmill are arranged.

As shown in FIG. 3, the control board units 90 and 91 and the back pack unit 94 are mainly provided on the back side of the pachinko machine 10. The control board unit 90 is unitized by mounting a main board (main control device 110), a voice lamp control board (voice lamp control device 113), and a display control board (display control device 114). The control board unit 91 is unitized by mounting a payout control board (payout control device 111), a launch control board (launch control device 112), a power supply board (power supply device 115), and a card unit connection board 116.

In the back pack unit 94, the back pack 92 forming the protective cover portion and the payout unit 93 are unitized. In addition, each control board is used for MPU as a one-chip microcomputer that controls each control, a port for contacting various devices, a random number generator used for various lottery, and for time counting and synchronization. A clock pulse generation circuit, etc. is installed as needed.

The main control device 110, the voice lamp control device 113 and the display control device 114, the payout control device 111 and the launch control device 112, the power supply device 115, and the card unit connection board 116 are housed in the board boxes 100 to 104, respectively. .. The board boxes 100 to 104 include a box base and a box cover that covers an opening of the box base, and the box base and the box cover are connected to each other to house each control device and each board.

Further, in the board box 100 (main control device 110) and the board box 102 (payout control device 111 and launch control device 112), the box base and the box cover are connected by a sealing unit (not shown) so as not to be opened (caulking structure). (Consolidated by). Further, a sealing sticker (not shown) is attached to the connecting portion between the box base and the box cover over the box base and the box cover. This sealing seal is made of a brittle material, and if the sealing seal is to be peeled off in order to open the board boxes 100 and 102, or if the board boxes 100 and 102 are forcibly opened, the box base side and the box cover are used. Cut to the side. Therefore, by checking the sealing unit or the sealing seal, it is possible to know whether or not the substrate boxes 100 and 102 have been opened.

The payout unit 93 includes a tank 130 located at the uppermost portion of the back pack unit 94 and opened upward, a tank rail 131 connected below the tank 130 and gently inclined toward the downstream side, and a downstream of the tank rail 131. A case rail 132 vertically connected to the side and a payout device 133 provided at the most downstream portion of the case rail 132 and paying out balls by a predetermined electrical configuration of a payout motor 216 (see FIG. 5) are provided. ing. The tank 130 is sequentially replenished with balls supplied from the island equipment of the game hall, and the required number of balls are appropriately paid out by the payout device 133. A vibrator 134 for adding vibration to the tank rail 131 is attached to the tank rail 131.

Further, the payout control device 111 is provided with a state return switch 120, the launch control device 112 is provided with a variable resistor operation knob 121, and the power supply device 115 is provided with a RAM erase switch 122. The state return switch 120 is operated to clear the ball clogging (return to the normal state) when a payout error occurs, such as a ball clogging of the payout motor 216 (see FIG. 4). The operation knob 121 is operated to adjust the firing force of the firing solenoid. The RAM erase switch 122 is operated when the power is turned on when it is desired to return the pachinko machine 10 to the initial state.

Next, the internal configuration of the pachinko machine 10 will be described with reference to FIG. FIG. 4 is a perspective view of the pachinko machine 10 in a state where the inner frame 12, the front frame 14, and the lower plate unit 15 are open.

The pachinko machine 10 is provided with an outer frame 11 that forms an outer shell thereof, and the inner frame 12 is openably and closably supported with respect to the outer frame 11. In the amusement park, the outer peripheral surface of the outer frame 11 is fixed to an installation location called an island of the amusement park. Since the inner frame 12, the front frame 14, and the lower plate unit 15 are configured to be openable to the front side with respect to the outer frame 11, the pachinko machine 10 cannot be touched from the front side or the inside. The inspection and adjustment are performed by opening the inner frame 12 and the like to the front side with respect to the outer frame 11.

Metal upper hinges (not shown) and lower hinges (not shown) are attached to the outer frame 11 at two upper and lower positions on the left side of the front view to support the inner frame 12. The inner frame 12 is supported so as to be openable and closable with the side provided with the upper hinge and the lower hinge as the axis for opening and closing.

The inner frame 12 is mainly composed of an inner frame base 52 made of ABS resin formed in a rectangular shape, and a substantially circular central window 52a is formed in the central portion of the inner frame base 52. A mounting portion for the game board 13 is provided on the back surface side of the inner frame base 52, and the game board 13 is detachably mounted.

The lower side of the central window 52a of the inner frame base 52 is formed by being recessed in a concave shape with the front side open, and a flat mounting surface 52b is formed on the back side thereof. A launching unit 140 for launching a ball to the front surface of the game board 13, a passage forming member 53 for forming a passage for discharging the ball to the upper plate 17 and the lower plate 50, and the like are attached to the mounting surface 52b.

Switches SW1 (SW1a, SW1b) for detecting the opening and closing of the inner frame 12 are provided between the outer frame 11 and the inner frame 12, and the front surface is provided between the inner frame 12 and the front frame 14. Switches SW2 (SW2a, SW2b) for detecting the opening and closing of the frame 14 are provided. The switch SW1 is composed of a female switch SW1a arranged on the surface of the outer frame 11 facing the inner frame 12, and a male switch SW1b arranged on the surface of the inner frame 12 facing the outer frame 11. To. Further, the switch SW2 is composed of a female switch SW2a arranged on the surface of the inner frame 12 facing the front frame 14 and a male switch SW2b arranged on the surface of the front frame 14 facing the inner frame 12. It is composed.

Here, the structures of the switch SW1 and the switch SW2 will be described with reference to FIG. Since the switch SW1 and the switch SW2 have the same structure, the structure of the switch SW1 will be described, and the description of the switch SW2 will be omitted.

FIG. 5 is a diagram showing the structure of the switch SW1. FIG. 5A is a diagram showing a state (blocking state) of the switch SW1 in a state where the inner frame 12 is closed. Further, FIG. 5B is a diagram showing a state (conduction state) of the switch SW1 in a state where the inner frame 12 is opened.

As shown in FIG. 5 (a), the female switch SW1a arranged on the surface of the outer frame 11 facing the inner frame 12 contains a pair of terminal pairs SW1c made of metal, which is a conductive member. ing. In the state where the inner frame 12 is closed, the female switch SW1a arranged on the surface of the outer frame 11 facing the inner frame 12 has a male switch SW1a arranged on the surface of the inner frame 12 facing the outer frame 11. The mold switch SW1b is inserted, and the contact between the terminals and the SW1c is hindered. Therefore, in the state where the inner frame 12 is closed, the switch SW1 is in a state where the continuity is cut off.

On the other hand, as shown in FIG. 5B, when the inner frame 12 is open, the female switch SW1a arranged on the surface of the outer frame 11 facing the inner frame 12 is outside the inner frame 12. The male switch SW1b arranged on the surface facing the frame 11 is pulled out. Since the terminal pair SW1c built in the female switch SW1a has a structure in which an urging force is generated in the direction opposite to each other, the terminal pair SW1c are in contact with each other when the male switch SW1b is pulled out from the female switch SW1a. To do. Therefore, when the inner frame 12 is open, the switch SW1 is in a conductive state.

As described above, the switch SW1 is in a cutoff state when the inner frame 12 is closed, and is in a conductive state when the inner frame 12 is open. However, the structure of the switch SW1 is not limited to the shape shown in FIG. 5. When the inner frame 12 is closed, the switch SW1 is shut off, while when the inner frame 12 is open, the switch SW1 is shut off. Any structure may be used as long as the switch SW1 is in a conductive state. This also applies to the structure of the switch SW2.

Next, the electrical configuration of the pachinko machine 10 will be described with reference to FIG. FIG. 6 is a block diagram showing an electrical configuration of the pachinko machine 10.

The main control device 110 is equipped with an MPU 201 as a one-chip microcomputer which is an arithmetic unit. The MPU 201 is a ROM 202 that stores various control programs and fixed value data executed by the MPU 201, and a memory for temporarily storing various data and the like when the control program stored in the ROM 202 is executed. A certain RAM 203 and various other circuits such as an interrupt circuit, a timer circuit, and a data transmission / reception circuit are built in. In order to instruct the operation of the sub control device such as the payout control device 111 and the voice lamp control device 113, various commands are transmitted from the main control device 110 to the sub control device by the data transmission / reception circuit. Such a command is transmitted from the main controller 110 to the sub controller in only one direction.

The RAM 203 has a stack area in which the contents of the internal registers of the MPU 201 and the return address of the control program executed by the MPU 201 are stored, and a work area (work) in which various flags, counters, I / O values, etc. are stored. Area) and. The RAM 203 has a configuration in which a backup voltage is supplied from the power supply device 115 to hold (back up) data even after the power supply of the pachinko machine 10 is cut off, and all the data stored in the RAM 203 is backed up.

When the power supply is cut off due to the occurrence of a power failure or the like, the stack pointer at the time of the power failure (including the time when the power failure occurs; the same applies hereinafter) and the value of each register are stored in the RAM 203. On the other hand, when the power is turned on (including power on due to power failure elimination; the same applies hereinafter), the state of the pachinko machine 10 is restored to the state before the power was cut off based on the information stored in the RAM 203. The writing to the RAM 203 is executed by the main process (see FIG. 12) when the power is cut off, and the restoration of each value written in the RAM 203 is executed in the start-up process (see FIG. 11) when the power is turned on. The NMI terminal (non-maskable interrupt terminal) of the MPU 201 is configured so that a power failure signal SG1 from the power failure monitoring circuit 252 is input when the power is cut off due to a power failure or the like, and the power failure signal SG1 is the MPU201. When input to, the NMI interrupt process (see FIG. 17) as the power failure process is immediately executed.

An input / output port 205 is connected to the MPU 201 of the main control device 110 via a bus line 204 composed of an address bus and a data bus. The input / output port 205 includes a payout control device 111, a voice lamp control device 113, a first symbol display device 37, a second symbol display device 82, various switches 208 including a switch group and a sensor group (not shown), and a specific prize. A solenoid 209 including a large opening solenoid for driving the opening and closing of the opening 65a to the front side and a solenoid for driving an electric accessory is connected to the opening and closing plate of the mouth 65a.

Further, the main control device 110 is provided with a frame opening detection circuit 260 that detects the opening of the inner frame 12 by conducting the switch SW1 and detects the opening of the front frame 14 by conducting the switch SW2. There is. The frame opening detection circuit 260 is connected to a switch SW1 for detecting the opening of the inner frame 12, a switch SW2 for detecting the opening of the front frame 14, and an external output terminal plate 261 configured to be connectable to the hall computer 262. Has been done. In addition, in the connection between the switch SW1 and the switch SW2 and the frame opening detection circuit 260, and the connection between the frame opening detection circuit 260 and the external output terminal board 261, an input / output unit (input / output port 205) that inputs / outputs signals is used. Are connected via different I / O ports, not shown). When the switch SW1 conducts and detects the opening of the inner frame 12, or when the switch SW2 conducts and detects the opening of the front frame 14, the frame opening detection circuit 260 transmits the external output terminal plate 261 to the hall computer 262. A pulse signal having a pulse width of 10 ms is output. The pulse signal output from the external output terminal plate 261 is stored in the hall computer 262. Therefore, the opening of the inner frame 12 or the front frame 14 can be detected by analyzing the pulse signal stored in the hall computer 262.

The frame opening detection circuit 260 is configured to be unconnected to the MPU 201 and the input / output port 205 (input / output port of the MPU 201) of the main control device 110. Therefore, the frame opening detection circuit 260 may be configured to be mounted on a device (circuit board) other than the main control device 110. For example, it may be mounted on a device (circuit board) on which an arithmetic unit such as an MPU or a CPU is not mounted, or a dedicated board for the frame opening detection circuit 260 may be provided and mounted there. Better yet, like the main control device 110, the payout control device 111, and the launch control device 112, the frame opening detection circuit 260 is housed in the board box, and the box base and the box cover provided on the board box are sealed. It is connected so that it cannot be opened by (not shown) (connection by caulking structure). Then, a sealing sticker (not shown) may be attached to the connecting portion between the box base and the box cover over the box cover and the box base.

The payout control device 111 drives the payout motor 216 to control the payout of prize balls and rented balls. The MPU 211, which is an arithmetic unit, has a ROM 212 that stores a control program and fixed value data executed by the MPU 211, and a RAM 213 that is used as a work memory or the like.

The RAM 213 of the payout control device 111, like the RAM 203 of the main control device 110, has a stack area in which the contents of the internal registers of the MPU 211 and the return address of the control program executed by the MPU 211 are stored, and various flags and counters. It has a work area (work area) in which values such as, I / O, etc. are stored. The RAM 213 has a configuration in which a backup voltage is supplied from the power supply device 115 to hold (back up) data even after the power supply of the pachinko machine 10 is cut off, and all the data stored in the RAM 213 is backed up. Similar to the MPU 201 of the main control device 110, the NMI terminal of the MPU 211 is also configured so that the power failure signal SG1 is input from the power failure monitoring circuit 252 when the power is cut off due to the occurrence of a power failure or the like. When input to the MPU 211, the NMI interrupt process (see FIG. 17) as the power failure process is immediately executed.

An input / output port 215 is connected to the MPU 211 of the payout control device 111 via a bus line 214 composed of an address bus and a data bus. A main control device 110, a payout motor 216, a launch control device 112, and the like are connected to the input / output port 215, respectively. Further, although not shown, the payout control device 111 is connected to a prize ball detection switch for detecting the paid out prize balls. The prize ball detection switch is connected to the payout control device 111, but is not connected to the main control device 110.

The launch control device 112 controls the ball launch unit 112a so that when the main control device 110 gives an instruction to launch the ball, the launch strength of the ball corresponds to the amount of rotation of the operation handle 51. The ball launch unit 112a includes a launch solenoid and an electromagnet (not shown), and the launch solenoid and the electromagnet are allowed to be driven when predetermined conditions are met. Specifically, the operation handle is detected by the touch sensor 51a that the player is touching the operation handle 51, and the stop switch 51b for stopping the firing of the ball is turned off (not operated). The firing solenoid is excited in response to the amount of rotation of 51, and the ball is fired with a strength corresponding to the amount of operation of the operation handle 51.

The audio lamp control device 113 is an audio output in an audio output device (speaker or the like (not shown) 226, an on / off output in a lamp display device (illumination units 29 to 33, an indicator lamp 34, etc.), and a display control device 114. It controls the setting of the display mode of the third symbol display device 81 to be performed. The arithmetic unit MPU 221 has a ROM 222 that stores a control program and fixed value data executed by the MPU 221 and a RAM 223 that is used as a work memory or the like.

An input / output port 225 is connected to the MPU 221 of the voice lamp control device 113 via a bus line 224 composed of an address bus and a data bus. A main control device 110, a display control device 114, an audio output device 226, a lamp display device 227, and the like are connected to the input / output port 225, respectively.

The display control device 114 controls the variable display of the third symbol on the third symbol display device (LCD) 81. The display control device 114 includes an MPU 231, a ROM (program ROM) 232, a work RAM 233, a video RAM 234, a character ROM 235, an image controller 236, an input port 237, an output port 238, and a bus line 239, 240. have. The output side of the voice lamp control device 113 is connected to the input side of the input port 237, and the MPU 231, ROM 232, work RAM 233, and image controller 236 are connected to the output side of the input port 237. A video RAM 234 and a character ROM 235 are connected to the image controller 236, and an output port 238 is connected via the bus line 240. A third symbol display device 81 is connected to the output side of the output port 238. Even if the pachinko machine 10 is a different model in which the lottery probability of the jackpot and the number of prize balls to be paid out in one jackpot are different, the model having exactly the same symbol configuration displayed on the third symbol display device 81 is available. Therefore, the display control device 114 is made into a common component to reduce the cost.

The MPU 231 of the display control device 114 controls the display content of the third symbol display device 81 based on the symbol display command input from the voice lamp control device 113. The ROM 232 is a memory for storing various control programs and fixed value data executed by the MPU 231. The work RAM 233 is a memory for temporarily storing work data and flags used when executing various programs by the MPU 231. The character ROM 235 is a memory that stores data for effect such as a symbol (background symbol or third symbol) displayed on the third symbol display device 81. The video RAM 234 is a memory for storing the effect data displayed on the third symbol display device 81, and the display content of the third symbol display device 81 is changed by rewriting the contents of the video RAM 234.

The image controller 236 adjusts the timings of the MPU 231 and the video RAM 234, and the output port 238 to intervene in reading and writing data, and reads out the display data stored in the video RAM 234 at a predetermined timing to read the display data 81. It is to be displayed on.

The power supply device 115 is provided with a power supply unit 251 for supplying power to each part of the pachinko machine 10, a power failure monitoring circuit 252 for monitoring power failure due to a power failure, and a RAM erasing switch 122 (see FIG. 3). It has an erasing switch circuit 253. The power supply unit 251 is a device that supplies the required operating voltage to each of the control devices 110 to 114 and the like through a power supply path (not shown). As an outline, the power supply unit 251 takes in a voltage of 24 volt AC supplied from the outside, and has a voltage of 12 volt for driving various switches such as various switches 208, a solenoid such as a solenoid 209, and a motor. A 5 volt voltage for logic, a backup voltage for RAM backup, and the like are generated, and these 12 volt voltage, 5 volt voltage, and backup voltage are supplied to each control device 110 to 114 and the like.

The power failure monitoring circuit 252 is a circuit for outputting a power failure signal SG1 to each NMI terminal of the MPU 201 of the main control device 110 and the MPU 211 of the payout control device 111 when the power is cut off due to the occurrence of a power failure or the like. The power failure monitoring circuit 252 monitors the DC stable 24 volt voltage, which is the maximum voltage output from the power supply unit 251 and determines that a power failure (power cutoff, power supply cutoff) has occurred when this voltage becomes less than 22 volt. Then, the power failure signal SG1 is output to the main control device 110 and the payout control device 111. By the output of the power failure signal SG1, the main control device 110 and the payout control device 111 recognize the occurrence of the power failure and execute the NMI interrupt process. The power supply unit 251 outputs a voltage of 5 volts, which is the drive voltage of the control system, for a sufficient period of time to execute the NMI interrupt process even after the voltage of DC stable 24 volts becomes less than 22 volts. Is configured to maintain a normal value. Therefore, the main control device 110 and the payout control device 111 can normally execute and complete the NMI interrupt process (see FIG. 17).

The RAM erase switch circuit 253 is a circuit for outputting the RAM erase signal SG2 for clearing the backup data to the main control device 110 when the RAM erase switch 122 is pressed. The main control device 110 and the payout control device 111 clear the respective backup data when the RAM erase signal SG2 is input when the power of the pachinko machine 10 is turned on, and the payout control device 111 clears the backup data. The payout initialization command is transmitted to the payout control device 111.

Next, the frame opening detection circuit 260 and the external output terminal board 261 will be described with reference to FIG. 7. FIG. 7 is a block diagram showing the electrical configuration of the frame opening detection circuit 260 and the external output terminal plate 261. In FIG. 7, the frame opening detection circuit 260 will be described first, and then the external output terminal plate 261 will be described.

The frame opening detection circuit 260 that detects the opening of the inner frame 12 or the opening of the front frame 14 includes a DC power supply DC1 that supplies a DC voltage of 12 volts, a diode D1, capacitors CD1 to CD5, resistors R1 to R4, and the like. It mainly has a timer IC1 (LMC555 manufactured by National Semiconductor) which is a C-MOS timer, and a transistor TR1 provided with an internal resistance R5 and an internal resistance R6.

In order to detect the opening of the inner frame 12 by conducting the switch SW1 and to detect the opening of the front frame 14 by conducting the switch SW2, the above-mentioned parts of the frame opening detection circuit 260 are shown in FIG. Connected according to the block diagram. Since the switch SW1 and the switch SW2 are connected in parallel to the frame opening detection circuit 260, if either switch conducts, the frame opening detection circuit 260 will have the inner frame 12 or the front frame. 14 openings can be detected.

The DC power supply DC1 is a power supply that supplies a DC voltage of 12 volts to the frame opening detection circuit 260 and the external output terminal plate 261. The power (power supply) to the DC power supply DC1 is supplied from the power supply unit 251 provided in the power supply device 115 through a power supply path (not shown). The DC power supply DC1 is connected to the anode terminal of the diode D1. One end of a 0.1F (Farad) capacitor CD1 is connected to the cathode terminal of the diode D1. The other end of the capacitor CD1 is grounded. Further, one end of the capacitor CD1 is connected to one end of the switch SW1, one end of the switch SW2, and the VDD terminal and the RES terminal of the timer IC1.

When the power supply to the pachinko machine 10 is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1, the capacitor CD1 is charged to supply the DC voltage to the frame opening detection circuit 260 and the external output terminal plate 261. It is a component that exerts the function of a battery.

This is because the capacitor CD1 is supplied with power to the pachinko machine 10, and when a DC voltage of 12 volts is supplied from the DC power supply DC1, the capacitor CD1 has a capacity of 0.1 F (farad) and the capacitor CD1. The charge obtained by the product of the applied DC voltage (about 11.3 volt obtained by subtracting the voltage drop of about 0.7 volt at the diode D1 from the 12 volt supplied from the DC power supply DC1) is stored.

On the other hand, the capacitor CD1 is stored in the capacitor CD1 when, for example, the business hours of the amusement park are over and the power supply to the pachinko machine 10 is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1. A DC voltage (about 11.3 volts) based on the generated electric charge is supplied to the frame opening detection circuit 260 and the external output terminal plate 261.

Therefore, the frame opening detection circuit 260 naturally operates when power is supplied to the pachinko machine 10 and a DC voltage of 12 volts is supplied from the DC power supply DC1. Further, for example, a game hall business Even when the power supply to the pachinko machine 10 is cut off at the end of the time and the DC voltage of 12 volts is not supplied from the DC power supply DC1, it operates by the DC voltage supplied by the capacitor CD1. The opening of the frame 12 and the opening of the front frame 14 can be detected. In this embodiment, the capacitor CD1 is used as a component for supplying the DC voltage to the frame opening detection circuit 260 and the external output terminal plate 261 when the DC voltage of 12 volts is not supplied from the DC power supply DC1. .. However, the present invention is not limited to this, and the capacitor CD1 may be a secondary battery (rechargeable battery) having a larger storage capacity or a primary battery that does not need to be charged.

Further, since the cathode terminal of the diode D1 is connected to one end of the capacitor CD1 and the diode D1 functions to prevent the backflow of current, direct current is applied from the capacitor CD1 to the frame opening detection circuit 260 and the external output terminal plate 261. Even when a voltage (about 11.3 volts) is supplied, the DC voltage is not applied to the DC power supply DC1 and the DC power supply DC1 is not damaged.

The timer IC1 is a C-MOS timer, and detects the opening of the inner frame 12 or the opening of the front frame 14 by connecting the resistors R1 to R2 of 100 kΩ and the capacitors CD3 to CD5 of 0.1 μF, and detects the opening of the inner frame 12 and the external output terminal. It functions as a circuit that energizes the photocoupler PR1 of the plate 261 for about 10 ms.

The operating voltage range of the timer IC1 is the MPU 201 mounted on the main control device 110, the MPU 211 mounted on the payout control device 111, the MPU 221 mounted on the voice lamp control device 113, and the MPU 231 mounted on the display control device 114. It is set wider than each operating voltage range. Specifically, the operating voltage range of the timer IC1 is from about 1.5 volts to about 12.0 volts, while the operating voltage range of the MPU 2011, 211, 221, 231 is from about 4.5 volts. It is about 5.5 volts (note that each operating voltage of this embodiment is about 5.0 volts). Therefore, the timer IC1 can operate at a voltage lower than the operating voltages of the MPUs 2011, 211, 221, and 231. Therefore, even if the electric charge stored in the capacitor CD1 is reduced and the voltage supplied by the capacitor CD1 is reduced to less than about 4.5 volts, the timer IC1 can operate sufficiently. Further, for example, when the business hours of the amusement park are over and the power supply to the pachinko machine 10 is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1, the timer IC1 is DC-controlled by the capacitor CD1. It is used both when the voltage is supplied and when the power is supplied to the pachinko machine 10 and the DC voltage of 12 volts is supplied from the DC power supply DC1. Therefore, as a matter of course, the timer IC 1 can operate at a DC voltage of 12 volts or less supplied to the frame opening detection circuit 260 when the power is supplied to the pachinko machine 10. Further, since the timer IC1 is a timer composed of a C-MOS semiconductor, it can suppress power consumption during operation and can operate for a long time.

The VDD terminal of the timer IC1 is a terminal for inputting the DC voltage supplied to the timer IC1 and is connected to one end of the capacitor CD1. Further, the VDD terminal of the timer IC1 is connected to one end of the 0.1 μF capacitor CD4, and the other end of the capacitor CD4 is connected to the GND terminal of the grounded timer IC1. The capacitor CD4 reduces the noise generated in the VDD terminal of the timer IC1 when the switch SW1 and the switch SW2 are conducted or cut off (when the inner frame 12 and the front frame 14 are opened or closed). ..

The RES terminal of the timer IC1 is a terminal for operating a reset function that forcibly puts the voltage output from the OUT terminal into an output stop state (zero volt) when a pulse signal is input to the RES terminal. However, since this reset function is not used in the frame open detection circuit 260, the RES terminal of the timer IC1 is connected to one end of the capacitor CD1 so that the reset function does not operate. Since the VDD terminal of the timer IC1 and the RES terminal of the timer IC1 are connected to one end of the capacitor CD1 as described above, a DC voltage of about 11.3 volts is applied to the VDD terminal and the RES terminal of the timer IC1. It is applied.

The TRG terminal of the timer IC1 reduces the voltage output from the OUT terminal of the timer IC1 when the switch SW1 and the switch SW2 are shut off (when the inner frame 12 and the front frame 14 are closed). Set to 10.6 volt, while either switch SW1 or switch SW2, or both switch SW1 and switch SW2 are in a conductive state (either the inner frame 12 or the front frame 14). Or, when both the inner frame 12 and the front frame 14 are in the open state), it is a terminal for setting the voltage output from the OUT terminal of the timer IC1 from about 10.6 volt to zero volt after about 10 ms. .. The TRG terminal of the timer IC1 is connected to one end of the resistor R2, one end of the capacitor CD5, the other end of the switch SW1, the other end of the switch SW2, one end of the resistor R1, and one end of the resistor R7 of the external output terminal plate 261. The other end of the resistor R2 and the other end of the capacitor CD5 are grounded.

The resistor R2 connected to the TRG terminal of the timer IC1 is a timer when the inner frame 12 and the front frame 14 are in the open state and the switch SW1 and the switch SW2 are in the conductive state (see FIG. 5B). This is a resistor for applying a DC voltage (about 11.3 volts) to the TRG terminal of the IC1. Further, this capacitor CD5 is a capacitor for reducing noise generated in the resistor R2 when the switch SW1 and the switch SW2 are conducted or cut off (when the inner frame 12 and the front frame 14 are opened or closed). Is.

With the above connection, when the switch SW1 and the switch SW2 are in the cutoff state (when the inner frame 12 and the front frame 14 are in the closed state), no voltage is supplied to the resistor R2 and the capacitor CD5, so that the resistor R2 and the capacitor CD5 are supplied with voltage. The applied voltage (the voltage applied to the TRG terminal of the timer IC1) is zero volt. At this time, the voltage output from the OUT terminal of the timer IC1 is about 10.6 volts.

On the other hand, when either one of the switch SW1 or the switch SW2, or both the switch SW1 and the switch SW2 are in a conductive state (either the inner frame 12 or the front frame 14 or both the inner frame 12 and the front frame 14 are in a conductive state). Since the voltage is supplied to the resistor R2 and the capacitor CD5 (when in the open state), the voltage applied to the resistor R2 and the capacitor CD5 (the voltage applied to the TRG terminal of the timer IC1) is applied to one end of the capacitor CD1. It is about 11.3 volts, which is the same as the applied voltage. At this time, the voltage output from the OUT terminal of the timer IC1 is about 10.6 volts for about 10 ms after either the switch SW1 or the switch SW2, or both the switch SW1 and the switch SW2 are in a conductive state. After that, it becomes zero voltage.

In this way, the voltage output from the OUT terminal of the timer IC1 can be set to either about 10.6 volts or zero volts by the voltage applied to the TRG terminal of the timer IC1. The switch SW1 or the switch SW2 is conducted (the inner frame 12 or the front frame 14 is opened), and the voltage applied to the TRG terminal of the timer IC1 (the voltage applied to the resistor R2) is about 11.3 volts from zero volt. When the voltage changes to, as described above, the voltage of about 10.6 volts output from the OUT terminal of the timer IC1 drops to zero volts with a delay of about 10 ms from the rise of the voltage. Then, as will be described in detail later, the time difference between the rise of the voltage applied to the TRG terminal of the timer IC1 (the voltage applied to the resistor R2) and the fall of the voltage output from the OUT terminal of the timer IC1 ( About 10 ms), a current is supplied to one end of the resistor R7 of the external output terminal plate 261 for about 10 ms, and the photocoupler PR1 of the external output terminal plate 261 is energized only for about 10 ms.

The OUT terminal of the timer IC1 has a voltage of about 10.6 volts when the switch SW1 and the switch SW2 are cut off (the inner frame 12 and the front frame 14 are closed) and the voltage applied to the TRG terminal of the timer IC1 becomes zero volt. On the other hand, when the switch SW1 or the switch SW2 is conducted (the inner frame 12 or the front frame 14 is opened) and the voltage applied to the TRG terminal of the timer IC1 rises to about 11.3 volts, the rise is started. It is a terminal that sets the output voltage of about 10.6 volts to zero volts with a delay of about 10 ms. This OUT terminal is connected to one end of a 10 kΩ resistor R3. The other end of the resistor R3 is connected to one end of the capacitor CD2 and one end of the resistor R4 of 10 kΩ, and the other end of the capacitor CD2 and the other end of the resistor R4 are grounded.

The resistor R3 and the resistor R4 are voltage dividing resistors for dividing the voltage output from the OUT terminal of the timer IC1. Therefore, the voltage output from the OUT terminal of the timer IC1 is divided into the resistor R3 and the resistor R4 according to the ratio of the resistance value of the resistor R3 and the resistance value of the resistor R4. Since both the resistor R3 and the resistor R4 are 10 kΩ, the voltage of about 10.6 volt output from the OUT terminal of the timer IC1 is divided into a maximum value of about 5.3 volt by the resistor R3 and the resistor R4, respectively. Be pressured.

The 10 μF capacitor CD2 connected in parallel with the resistor R4 is a capacitor for stabilizing the voltage applied to the resistor R4. One end of the capacitor CD2 is connected to one end of the resistor R4, and the other end of the capacitor CD2 is connected to the other end of the resistor R4 and is grounded. By stabilizing the voltage applied to the resistor R4 by this capacitor CD2, the bias voltage applied between the base terminal b of the transistor TR1 and the emitter terminal e of the transistor TR1 is stabilized, and the transistor TR1 The operation can be stabilized.

The transistor TR1 is a switching element that switches between the collector terminal c of the transistor TR1 and the emitter terminal e of the transistor TR1 to either conduction or interruption based on the voltage applied to the resistor R4. The transistor TR1 is provided with an internal resistance R5 of 10 kΩ. One end of the resistance R4 is connected to one end of the internal resistance R5, and the base terminal b is connected to the other end of the internal resistance R5. Further, the transistor TR1 is provided with an internal resistance R6 of 10 kΩ. The other end of the internal resistance R5 is connected to one end of the internal resistance R6, and the emitter terminal e is connected to the other end of the internal resistance R6.

Therefore, when a voltage of about 10.6 volts is output from the OUT terminal of the timer IC1 (when the inner frame 12 and the front frame 14 are closed, and when the inner frame 12 or the front frame 14 is opened). (If it is within about 10 ms), the voltage is divided by the resistor R3 and the resistor R4, and the voltage applied to the resistor R4 (about 5.3 volts) is combined with one end of the internal resistance R5 of the transistor TR1. It is applied between the emitter terminal e of the transistor TR1. As a result, the collector terminal c of the transistor TR1 and the emitter terminal e of the transistor TR1 are made conductive. At this time, if the switch SW1 or the switch SW2 is in the conductive state (the inner frame 12 or the front frame 14 is in the open state), until the voltage of about 10.6 volt output from the OUT terminal of the timer IC1 is switched to zero volt. That is, a current is supplied to one end of the resistor R7 of the external output terminal plate 261 for about 10 ms after the inner frame 12 or the front frame 14 is opened. If a current is supplied to one end of the resistor R7, the photocoupler PR1 of the external output terminal plate 261 can be energized for about 10 ms, and a pulse signal having a pulse width of about 10 ms can be output to the hall computer 262. However, when the inner frame 12 and the front frame 14 are closed and the switch SW1 and the switch SW2 are cut off, the connection between one end of the capacitor CD1 and the resistor R7 provided on the external output terminal plate 261 is cut off. Therefore, no current is supplied to one end of the resistor R7 of the external output terminal plate 261. Therefore, the photocoupler PR1 of the external output terminal plate 261 is not energized, and the pulse signal is not output to the hall computer 262.

On the other hand, when the OUT terminal voltage of the timer IC1 is zero volt (when about 10 ms has elapsed since the inner frame 12 or the front frame 14 was opened), no voltage is applied to the resistor R4, so that the internal resistance R5 of the transistor TR1 No voltage is applied between one end of the transistor TR1 and the emitter terminal e of the transistor TR1. As a result, the connection between the collector terminal c of the transistor TR1 and the emitter terminal e of the transistor TR1 is cut off. Therefore, even if the switch SW1 or the switch SW2 is in the conductive state (the inner frame 12 or the front frame 14 is in the open state), no current is supplied to one end of the resistor R7 of the external output terminal plate 261. Therefore, the photocoupler PR1 of the external output terminal plate 261 is not energized, and the pulse signal is not output to the hall computer 262.

In this way, when the inner frame 12 or the front frame 14 is in the open state, the photocoupler PR1 of the external output terminal plate 261 can be energized for about 10 ms. Therefore, when the inner frame 12 or the front frame 14 is opened, a pulse signal having a pulse width of about 10 ms can be output from the external output terminal plate 261 to the hall computer 262.

The TH terminal of the timer IC1 is a terminal for measuring the voltage applied to the TH terminal, and is connected to the other end of the resistor R1, one end of the capacitor CD3, and the DCH terminal of the timer IC1. The DCH terminal of the timer IC1 has a voltage (about 7.5 volts) that is two-thirds of the DC voltage (about 11.3 volts) in which the voltage applied to the TH terminal of the timer IC1 is input to the VDD terminal of the timer IC1. It is a terminal that switches the impedance of the DCH terminal from the infinite state to the zero state when it becomes. When the impedance of the DCH terminal becomes zero (ground state), no voltage can be applied to the capacitor CD3. On the other hand, when the impedance of the DCH terminal becomes infinite, a voltage can be applied to the capacitor CD3.

The inner frame 12 or the front frame 14 of the resistor R1 and the capacitor CD3 connected to the TH terminal of the timer IC1 and the DCH terminal of the timer IC1 are opened based on the time constant which is the product of the resistance value of the resistor R1 and the capacitor CD3. When this is done, it is a component for determining the period until the voltage of about 10.6 volts output from the OUT terminal of the timer IC 1 is switched to zero volts to be about 10 ms. One end of the resistor R1 is connected to the other end of the switch SW1, the other end of the switch SW2, and one end of the resistor R7 of the external output terminal plate 261. The other end of the resistor R1 is connected to the TH terminal of the timer IC1, the DCH terminal of the timer IC1, and one end of the capacitor CD3. The other end of the capacitor CD3 is grounded.

Here, the resistor R1 and the capacitor CD3 will be described together with the TRG terminal of the timer IC1, the TH terminal of the timer IC1, the DCH terminal of the timer IC1, and the OUT terminal of the timer IC1.

When the inner frame 12 and the front frame 14 are closed (when the switch SW1 and the switch SW2 are cut off), no voltage is supplied to the resistor R1, so that the voltage applied to the TH terminal of the timer IC1 is zero volt (about 7.5 volt). The impedance of the DCH terminal of the timer IC1 is set to infinite. Therefore, a voltage can be applied to the capacitor CD3, and the capacitor CD3 is in a rechargeable state (a state in which electric charges can be stored). However, when the switch SW1 and the switch SW2 are cut off, the connection between one end of the capacitor CD1 and the resistor R1 is cut off, so that no voltage is applied to the capacitor CD3 and the voltage applied to the capacitor CD3 is zero volt. It becomes. In this way, the capacitor CD3 is in a rechargeable state, but is not charged. At this time, the voltage of the OUT terminal of the timer IC1 is about 10.6 volts, and the collector terminal c and the emitter terminal e of the transistor TR1 are conductive. However, since the switch SW1 and the switch SW2 are in the cutoff state, no current is supplied to one end of the resistor R7 of the external output terminal plate 261. Therefore, the photocoupler PR1 of the external output terminal plate 261 is not energized, and the pulse signal is not output from the external output terminal plate 261 to the hall computer 262.

Next, when the inner frame 12 or the front frame 14 is in the open state (see FIG. 5B) and the switch SW1 or the switch SW2 is in the conductive state, the voltage applied to the TRG terminal of the timer IC1 (to the resistor R7). The applied voltage) switches from zero volt to about 11.3 volt. At this time, the voltage of the OUT terminal of the timer IC1 is about 10.6 volts, and the collector terminal c and the emitter terminal e of the transistor TR1 are conducting. Therefore, the current supply to one end of the resistor R7 is started, and the photocoupler PR1 of the external output terminal plate 261 is energized. As a result, the signal is started to be output to the hall computer 262.

Further, at the same time that the voltage applied to the TRG terminal of the timer IC1 (the voltage applied to the resistor R7) is switched from zero volt to about 11.3 volt, the voltage is applied to the capacitor CD3 to charge the capacitor CD3. It will be started. At this time, the voltage applied to the TH terminal of the timer IC1 starts to rise.

The voltage of the OUT terminal of the timer IC1 is 2 / of the voltage applied to the TH terminal of the timer IC1 (voltage applied to the capacitor CD3) and the voltage input to the VDD terminal of the timer IC1 (about 11.3 volts). Keep about 10.6 volts until it equals the voltage of 3, i.e. about 7.5 volts. When the voltage applied to the TH terminal of the timer IC1 (voltage applied to the capacitor CD2) rises and becomes equal to about 7.5 volts, the impedance of the DCH terminal of the timer IC1 changes from infinite to zero (ground). Switch to the state where it was done). Then, the voltage applied to the capacitor CD3 becomes a zero volt state, and the electric charge stored in the capacitor CD3 is discharged. As a result, the voltage applied to the TH terminal of the timer IC1 is switched from about 7.5 volts to zero volts. By switching the voltage applied to the TH terminal of the timer IC 1, the voltage of the OUT terminal of the timer IC 1 switches from about 10.6 volts to zero volts. Then, the continuity between the collector terminal c and the emitter terminal e of the transistor TR1 is cut off, and the current supply to one end of the resistor R7 is stopped. As a result, the energization of the external output terminal plate 261 to the photocoupler PR1 is stopped, and the output of the signal to the hall computer 262 is stopped.

In this way, when the inner frame 12 or the front frame 14 is in the open state and the switch SW1 or the switch SW2 is in the conductive state (see FIG. 5B), the output is output from the OUT terminal of the timer IC1. The period until the voltage of about 10.6 volts is switched to zero volts, that is, the period until the voltage applied to the TH terminal of the timer IC1 (voltage applied to the capacitor CD3) changes from zero volts to about 7.5 volts. , It is determined to be about 10 ms based on the time constant which is the product of the resistance value of the resistor R1 and the capacitance of the capacitor CD3. Then, when the inner frame 12 or the front frame 14 is opened, the current is started to be supplied to one end of the resistor R7 of the photocoupler PR1 of the external output terminal plate 261. Then, about 10 ms after the start of supplying the current to one end of the resistor R7, the voltage of about 10.6 volt output from the OUT terminal of the timer IC1 is switched to zero volt, and the collector terminal c and the emitter terminal of the transistor TR1 are switched to zero volt. The continuity with e is cut off, and the current supply to one end of the resistor R7 is stopped. As a result, when the inner frame 12 or the front frame 14 is opened, a current is supplied to one end of the resistor R7 of the external output terminal plate 261 by about 10 ms, and the photocoupler PR1 of the external output terminal plate 261 is supplied with the photocoupler PR1 for about 10 ms. It can be energized only during the period. Therefore, when the inner frame 12 or the front frame 14 is opened, a pulse signal having a pulse width of about 10 ms can be output from the external output terminal plate 261 to the hall computer 262.

When the inner frame 12 and the front frame 14 change from the open state to the closed state (the switch SW1 and the switch SW2 are in the cutoff state from the conductive state), that is, the voltage applied to the TRG terminal of the timer IC1 (applied to the resistor R7). When the voltage) is switched from about 11.3 volts to zero volts, the voltage at the OUT terminal of the timer IC1 is switched from zero volts to about 10.6 volts. In this state, as described above, the collector terminal c and the emitter terminal e of the transistor TR1 are conducting, but since the switch SW1 and the switch SW2 are in the cutoff state, they are connected to one end of the resistor R7 of the external output terminal plate 261. Is not supplied with current. Therefore, the photocoupler PR1 of the external output terminal plate 261 is not energized, and the pulse signal is not output from the external output terminal plate 261 to the hall computer 262.

As described above, when the inner frame 12 or the front frame 14 is opened, one end of the resistor R7 of the external output terminal plate 261 is applied based on the time constant which is the product of the resistance value of the resistor R1 and the capacitor CD3. A current is supplied for about 10 ms, and the photocoupler PR1 of the external output terminal plate 261 can be energized for about 10 ms. As a result, when the inner frame 12 or the front frame 14 is opened, a pulse signal having a pulse width of about 10 ms can be output from the external output terminal plate 261 to the hall computer 262.

Returning to the description of FIG. The CNT terminal of the timer IC1 is a terminal that adjusts the output period of the voltage output from the OUT terminal of the timer IC1 according to the signal input to the CNT terminal. However, since the frame open detection circuit 260 does not adjust the output period of the voltage output from the OUT terminal of the timer IC1 (the output period of the voltage output from the OUT terminal of the timer IC1 is fixed at 10 ms), the timer IC1 The CNT terminal is not connected to any of the components of the frame opening detection circuit 260 and the external output terminal plate 261 and is open.

As described above, in the frame open detection circuit 260, when the inner frame 12 or the front frame 14 is in the open state and the switch SW1 or the switch SW2 is in the conductive state (see FIG. 5B), the external output terminal plate 261 Start supplying current to one end of the resistor R7. On the other hand, the frame open detection circuit 260 cuts off the connection between the collector terminal c of the transistor TR1 and the emitter terminal e of the transistor TR1 from the conductive state when about 10 ms has passed since the inner frame 12 or the front frame 14 was opened. The state is switched to, and the current supply to one end of the resistor R7 of the external output terminal plate 261 is stopped. As a result, the photocoupler PR1 of the external output terminal plate 261 is energized for about 10 ms, and a pulse signal having a pulse width of about 10 ms is output from the external output terminal plate 261 to the hall computer 262.

In the door opening detection circuit 260, an LMC555 is used for the timer IC1 to detect the opening of the inner frame 12 or the opening of the front frame 14, and realize a circuit in which the photocoupler PR1 is energized for about 10 ms. It is not limited. That is, by using another integrated circuit or the like for the timer IC 1, a circuit that generates one pulse signal for one opening of the inner frame 12 or one opening of the front frame 14 is realized. The photocoupler PR1 may be energized for a predetermined period based on the pulse signal.

Next, the external output terminal board 261 connected to the frame opening detection circuit 260 and also connected to the hall computer 262 will be described. The external output terminal plate 261 has a function of outputting a pulse signal having a pulse width of about 10 ms to the hall computer 262, and is mainly composed of a 1 kΩ resistor R7 and a photocoupler PR1.

The resistor R7 is a resistor that limits the current supplied to the photocoupler PR1, and one end of the resistor R7 is connected to one end of the resistor R1 of the frame opening detection circuit 260, the other end of the switch SW1, and the other end of the switch SW2. The other end of the resistor R7 is connected to the primary side of the photocoupler PR1 (the anode terminal of the light emitting diode). The photocoupler PR1 is a current switch composed of a light emitting diode and a light receiving element (phototransistor) that receives light emitted by the light emitting diode. As described above, in the light emitting diode on the primary side of the photocoupler PR1, the anode terminal is connected to one end of the resistor R7, and the cathode terminal is connected to the collector terminal c of the transistor TR1 of the frame opening detection circuit 260. Further, the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 is connected to the hall computer 262.

Therefore, the collector terminal c of the transistor TR1 and the emitter terminal e of the transistor TR1 are electrically connected for about 10 ms after the inner frame 12 or the front frame 14 is in the open state (the switch SW1 or the switch SW2 is in the conductive state). Then, a current is supplied to the light emitting diode on the primary side of the photocoupler PR1 via the resistor R7, and the light emitting diode emits light for about 10 ms. Then, the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 receives the emitted light and changes the received light of about 10 ms into a pulse signal (electric signal) having a pulse width of about 10 ms. The pulse signal is output to the hall computer 262. The hall computer 262 can store the pulse signal output from the light receiving element (phototransistor) on the secondary side of the photocoupler PR1. Therefore, it is possible to make the hall computer 262 store that the inner frame 12 has been opened or the front frame 14 has been opened.

On the other hand, when the inner frame 12 and the front frame 14 are closed (when the switch SW1 and the switch SW2 are shut off), no voltage is supplied to one end of the resistor R7, so that the light emitting diode which is the primary side of the photocoupler PR1. No current is supplied to the LED. Therefore, the pulse signal is not output from the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 to the hall computer 262.

Here, the advantage of using the photocoupler PR1 for the external output terminal plate 261 that outputs a pulse signal to the hall computer 262 will be described. The photocoupler PR1 has a configuration (light emission) that converts a current supplied to a light emitting diode on the primary side into light, receives the light on a light receiving element (phototransistor) on the secondary side, and outputs a pulse signal (electric signal). A configuration in which a signal is transmitted from a diode to a light receiving element in one direction). Therefore, an electric signal such as a pulse signal cannot be transmitted from the light receiving element (phototransistor) on the secondary side to the light emitting diode on the primary side. As a result, even if the frame opening detection circuit 260 is connected to the light emitting diode on the primary side of the photocoupler PR1 and the hall computer 262 is connected to the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, the hall computer 262 It is not possible to transmit an electric signal such as a pulse signal from the above to a main control device 110 or the like provided with a frame opening detection circuit 260 or a frame opening detection circuit 260. Therefore, by using the photocoupler PR1, it is possible to prevent the transmission of electric signals such as an illegal pulse signal from the hall computer 262 to the frame opening detection circuit 260, the main control device 110, etc., and from the external output terminal board 261 to the hall computer. There is an advantage that a pulse signal can be transmitted to 262.

Further, in the photocoupler PR1, the light emitting diode on the primary side and the light receiving element (phototransistor) on the secondary side are electrically insulated. Therefore, for example, even if the current supplied to the light emitting diode of the photocoupler PR1 contains electrical noise, the electrical noise is not transmitted to the phototransistor on the secondary side. Therefore, by using the photocoupler PR1, the external output terminal plate 261 has an advantage that an accurate pulse signal can be output to the hall computer 262.

As described above, since the frame opening detection circuit 260 is provided with the 0.1F capacitor CD1, the frame opening detection circuit 260 is supplied with power to the pachinko machine 10 and has a DC power supply of DC1 to 12 volts. It operates naturally when a DC voltage is supplied, and further, for example, when the business hours of the amusement park are over, the power supply to the pachinko machine 10 is cut off, and a DC voltage of 12 volts is supplied from the DC power supply DC1. Even if this is not the case, the opening of the inner frame 12 and the opening of the front frame 14 can be detected. Then, when the opening of the inner frame 12 or the opening of the front frame 14 is detected by the frame opening detection circuit 260, a pulse signal having a pulse width of about 10 ms can be output from the external output terminal plate 261 to the hall computer 262. The pulse signal output from the external output terminal plate 261 to the hall computer 262 is stored in the hall computer 262 that continues to operate for 24 hours.

Here, in general, the amusement park has a crime prevention contract with a private security company, and if there is an intruder into the amusement park, a security guard of the security company immediately rushes to the amusement park. However, since the fraudulent activity is carried out in a short time, when the guards rush in, in most cases, the intruder has already escaped from the amusement park, and it is not possible to determine which pachinko machine 10 the fraudulent activity was committed to. There was a problem. The pachinko machine 10 that has been cheated must be returned to a normal state, but if it is not known which pachinko machine 10 has been cheated, the inner frame 12 and the front frame 14 of all the pachinko machines 10 are used. It had to be opened and inspected one by one, and performing this work in the amusement park where a large number of pachinko machines 10 were installed was a considerable amount of hard work.

However, according to the pachinko machine 10 of the present embodiment, when the opening of the inner frame 12 or the opening of the front frame 14 is detected by the frame opening detection circuit 260, the pulse width from the external output terminal plate 261 to the hall computer 262 is reduced. A pulse signal of 10 ms is output. Then, the output pulse signal is stored in the hall computer 262. Therefore, the pachinko machine 10 in which the inner frame 12 or the front frame 14 is opened can be identified by the pulse signal stored in the hall computer 262. Further, by storing the pulse signal output from the external output terminal plate 261 to the hall computer 262 and the output time of the output pulse signal, the opening time of the inner frame 12 of the specified pachinko machine 10 or the opening time or The opening time of the front frame 14 can be detected.

For example, when the business hours of the amusement park are over, the power supply to the pachinko machine 10 is cut off, and the DC voltage is supplied from the capacitor CD1 to the frame opening detection circuit 260 and the external output terminal plate 261. When the total supply period of the current from the CD1 to the photocoupler PR1 due to the opening of the frame 12 or the front frame 14 is lengthened, or the number of times the opening of the inner frame 12 or the front frame 14 is detected is increased, the capacitor is used. The capacity of the CD1 may be increased (for example, the capacity of the capacitor CD1 is 1F), or the capacitor CD1 may be changed to a secondary battery having a large storage capacity.

Next, referring to FIG. 8, the TRG terminal voltage (external output terminal plate) of the timer IC1 changes according to the state of the switch SW1 (the state of the inner frame 12) and the state of the switch SW2 (the state of the front frame 14). The relationship between the voltage applied to one end of the resistor R7 of 261), the OUT terminal voltage of the timer IC1, and the output of the external output terminal plate 261 (input of the hall computer 262) will be described. FIG. 8 shows the state of the switch SW1 (the state of the inner frame 12), the state of the switch SW2 (the state of the front frame 14), and the TRG terminal voltage of the timer IC1 (the voltage applied to one end of the resistor R7 of the external output terminal plate 261). ), The timing chart showing the relationship between the OUT terminal voltage of the timer IC1 and the output (input of the hall computer 262) of the external output terminal plate 261.

As shown in FIG. 8 (a), when the switch SW1 is in the conductive state (the inner frame 12 is in the open state) at t1, the TRG terminal voltage (external output terminal plate) of the timer IC1 is shown in FIG. 8 (c). The voltage applied to one end of the resistor R7 of 261) switches from zero volt to about 11.3 volt at t1. At this time, as shown in FIG. 8D, the timer IC1 continues to output a voltage of about 10.6 volts from the OUT terminal until about 10 ms elapses from t1 o'clock. As a result, the current supply to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 7) is started (at t1). Then, as shown in FIG. 8E, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from the low state to the high state at t1. It changes. As a result, the output of the pulse signal indicating the opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

Then, when about 10 ms elapses from t1 o'clock, as shown in FIG. 8D, the timer IC1 switches the voltage of the OUT terminal from about 10.6 volts to zero volts. Then, the current supply to one end of the resistor R7 of the external output terminal plate 261 is stopped. Therefore, the output of the external output terminal plate 261 switches from the high state to the low state 10 ms after t1 o'clock. By switching the output of the external output terminal plate 261 in this way, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

As shown in FIG. 8A, when the switch SW1 is in the cutoff state (inner frame 12 is in the closed state) at t2, the TRG terminal voltage (external output) of the timer IC1 is shown in FIG. 8C. The voltage applied to one end of the resistor R7 of the terminal plate 261) switches from about 11.3 volts to zero volts, and the OUT terminal voltage of the timer IC1 switches from zero volts to about 10.6 volts (at t2). As a result, the frame opening detection circuit 260 is set to a state in which the inner frame 12 and the front frame 14 can be detected again.

Next, as shown in FIG. 8 (a), when the switch SW2 is in the conductive state (the front frame 14 is in the open state) at t3, the TRG terminal voltage (external) of the timer IC1 is shown in FIG. 8 (c). The voltage applied to one end of the resistor R7 of the output terminal plate 261) switches from zero volt to about 11.3 volt at t3. At this time, as shown in FIG. 8D, the timer IC1 continues to output a voltage of about 10.6 volts from the OUT terminal until about 10 ms elapses from t3. As a result, the current supply to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 7) is started (at t3). Then, as shown in FIG. 8E, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from the low state to the high state at t3. It changes. As a result, the output of the pulse signal indicating the opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

Then, about 10 ms after t3, as shown in FIG. 8D, the timer IC1 switches the voltage of the OUT terminal from about 10.6 volts to zero volts. Then, the current supply to one end of the resistor R7 of the external output terminal plate 261 is stopped. Therefore, the output of the external output terminal plate 261 switches from the high state to the low state 10 ms after t3 o'clock. By switching the output of the external output terminal plate 261 in this way, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

As shown in FIG. 8A, when the switch SW2 is in the cutoff state (the front frame 14 is in the closed state), the TRG terminal voltage of the timer IC1 (external output terminal plate 261) is shown in FIG. The voltage applied to one end of the resistor R7) switches from about 11.3 volts to zero volts, and the OUT terminal voltage of the timer IC1 switches from zero volts to about 10.6 volts (at t4). As a result, the frame opening detection circuit 260 is set to a state in which the inner frame 12 and the front frame 14 can be detected again.

Finally, a case where the switch SW2 is in the conductive state (the front frame 14 is in the open state) when the switch SW1 is in the conductive state (the inner frame 12 is in the open state) will be described. As shown in FIG. 8 (a), the switch SW1 is in a conductive state (inner frame 12 is in an open state) at t5, and further, as shown in FIG. 8 (b), the switch SW2 is in a conductive state (front surface) at t6. When the frame 14 is in the open state), as shown in FIG. 8C, the TRG terminal voltage of the timer IC1 (the voltage applied to one end of the resistor R7 of the external output terminal plate 261) is about zero volt at t5. Switch to 11.3 volts. At this time, as shown in FIG. 8D, the timer IC1 continues to output a voltage of about 10.6 volts from the OUT terminal until about 10 ms elapses from t5 o'clock. As a result, the current supply to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 7) is started (at t5). Then, as shown in FIG. 8E, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from the low state to the high state at t5. It changes. As a result, the output of the pulse signal indicating the opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

Then, about 10 ms after t5, as shown in FIG. 8D, the timer IC1 switches the voltage of the OUT terminal from about 10.6 volts to zero volts. Then, the current supply to one end of the resistor R7 of the external output terminal plate 261 is stopped. Therefore, the output of the external output terminal plate 261 switches from the high state to the low state 10 ms after t5 o'clock. By switching the output of the external output terminal plate 261 in this way, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

As shown in FIG. 8A, the switch SW1 is in the shutoff state (inner frame 12 is in the closed state) at t7, and as shown in FIG. 8B, the switch SW2 is in the shutoff state at t8. When (the front frame 14 is in the closed state), as shown in FIG. 8C, the TRG terminal voltage of the timer IC1 (the voltage applied to one end of the resistor R7 of the external output terminal plate 261) is about 11.3 volts. At the same time, the OUT terminal voltage of the timer IC1 switches from zero volt to about 10.6 volt (at 8 o'clock). As a result, the frame opening detection circuit 260 is set to a state in which the inner frame 12 and the front frame 14 can be detected again.

In this way, when the switch SW1 is in the conductive state (the inner frame 12 is in the open state), even if the switch SW2 is in the conductive state (the front frame 14 is in the open state), the timer IC1 keeps the continuity period of the switch SW1. (The length of the opening period of the inner frame 12) and the length of the conduction period of the switch SW2 (the length of the opening period of the front frame 14), either the switch SW1 or the switch SW2 is in the conductive state. When about 10 ms has elapsed from the time when either the inner frame 12 or the front frame 14 is in the open state, the voltage of the OUT terminal is switched from about 10.6 volts to zero volts. As a result, the supply period of the current supplied to the photocoupler PR1 of the external output terminal plate 261 becomes about 10 ms.

Therefore, for example, when the business hours of the amusement park are over and the power supply to the pachinko machine 10 is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1 to the frame opening detection circuit 260 and the external output terminal board 261. That is, when a DC voltage of about 11.3 volts is supplied from the capacitor CD1 to the frame open detection circuit 260 and the external output terminal plate 261, the supply period of the current supplied from the capacitor CD1 to the photocoupler PR1 is set as the inner frame. It can be limited to about 10 ms per opening of 12 or the front frame 14. Therefore, the power consumption due to the opening of the inner frame 12 or the front frame 14 can be suppressed to a small value.

Here, since the capacitor CD1 has a capacitance of 0.1 F and the voltage applied to the capacitor CD1 is about 11.3 volts, the electric charge stored in the capacitor CD1 is the capacitance of the capacitor CD1 and the applied voltage of the capacitor CD1. From the product of, it becomes about 1.13C (coulomb). The electric charge of about 1.13C stored in the capacitor CD1 corresponds to about 500 times of current supply when the current supply period from the capacitor CD1 to the photocoupler PR1 is about 10 ms. To do. Therefore, for example, when the business hours of the amusement park are over, the power supply to the pachinko machine 10 is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1, the inner frame 12 is opened (switch SW1). Even when the front frame 14 is opened (conducting) or the front frame 14 is opened (conducting the switch SW2) many times, the frame opening detection circuit 260 still opens the inner frame 12 or the front frame 14 (continuing the switch SW1). The continuity of the switch SW2) can be reliably detected up to about 500 times each time, and a pulse signal can be output from the external output terminal board 261 to the hall computer 262. At this time, when the inner frame 12 is opened or the front frame 14 is opened about 500 times, the electric charge stored in the capacitor CD1 decreases, and the current value supplied from the capacitor CD1 to the photocoupler PR1 decreases, but the hole By increasing the detection sensitivity of the pulse signal of the computer 262 (by lowering the threshold value for the amplitude of the pulse signal), the hall computer 262 can store the pulse signal.

In the present embodiment, when the inner frame 12 or the front frame 14 is open and the switch SW1 or the switch SW2 is electrically connected, a pulse signal is output from the external output terminal plate 261 to the hall computer 262. It is not limited to this. That is, when the connection of each component of the main frame opening detection circuit 260 is changed, the inner frame 12 or the front frame 14 is opened, and the opened inner frame 12 or the front frame 14 is closed, the photocoupler PR1 is connected. A current may be supplied for about 10 ms to output a pulse signal from the external output terminal board 261 to the hall computer 262.

However, in the frame opening detection circuit 260 of the present embodiment, when the inner frame 12 or the front frame 14 is opened and the switch SW1 or the switch SW2 is electrically connected, a pulse signal is transmitted from the external output terminal plate 261 to the hall computer 262. Is configured to output, so that the opening of the inner frame 12 or the front frame 14 can be quickly detected. Therefore, it is possible to detect the opening of the inner frame 12 or the front frame 14 before the inner frame 12 or the front frame 14 is opened and the main control device 110 or the game board 13 is cheated. Therefore, it is possible to prevent abnormal operation due to fraudulent acts that occur when power is being supplied to the pachinko machine 10.

The pulse signal output from the external output terminal plate 261 to the hall computer 262 is stored in the hall computer 262 that continues to operate for 24 hours. Therefore, the pachinko machine 10 in which the inner frame 12 or the front frame 14 is opened can be identified by the pulse signal stored in the hall computer 262. Further, by storing the pulse signal output from the external output terminal plate 261 to the hall computer 262 and the output time of the output pulse signal, the opening time of the inner frame 12 of the specified pachinko machine 10 or the opening time or The opening time of the front frame 14 can be detected.

Further, when the inner frame 12 and the front frame 14 are closed (when the switch SW1 and the switch SW2 are shut off), the OUT terminal voltage of the timer IC1 is about 10.6 volts, so that the frame open detection circuit 260 The collector terminal c of the transistor TR1 and the emitter terminal e (see FIG. 7) of the transistor TR1 are in a conductive state. However, at this time, the only current flowing through the transistor TR1 is the base current. Both the resistor R3 and the resistor R5 that determine the current value of the base current have a resistance value of 10 kΩ, which is sufficiently larger than the resistance value (1 kΩ) of the resistor R7 that limits the current supplied to the photocoupler PR1. Therefore, the current value of the base current can be kept at about 100 μA (note that the current value supplied to the photocoupler PR1 when the switch SW1 and the switch SW2 are conducting is about 11.3 mA). Therefore, the consumption of the electric charge stored in the capacitor CD1 due to the conduction state of the transistor TR1 can be stopped very slightly.

Further, when the inner frame 12 and the front frame 14 are closed (when the switch SW1 and the switch SW2 are shut off), the OUT terminal voltage of the timer IC1 is about 10.6 volts, so that the OUT terminal of the timer IC1 Current is consumed through resistors R3 and R4 connected in series between and ground. However, both the resistor R3 and the resistor R4 have a resistance value of 10 kΩ, which is sufficiently larger than the resistance value (1 kΩ) of the resistor R7 that limits the current supplied to the photocoupler PR1. Therefore, when the inner frame 12 and the front frame 14 are closed, the current value flowing from the OUT terminal of the timer IC1 to the ground via the resistors R3 and R4 can be kept at about 530 μA. Therefore, the consumption of the electric charge stored in the capacitor CD1 by the resistors R3 and R4 can be stopped very slightly.

When the inner frame 12 and the front frame 14 are closed (when the switch SW1 and the switch SW2 are cut off), the consumption of the electric charge stored in the capacitor CD1 due to the base current of the transistor TR1 and the resistance R3 and If it is desired to further suppress the consumption of the electric charge stored in the capacitor CD1 by the resistor R4, the resistance values of the resistors R3, R4 and R5 may be further increased to more than 10 kΩ.

Further, when the inner frame 12 and the front frame 14 are closed and the switch SW1 and the switch SW2 are shut off, the charge stored in the capacitor CD1 due to the base current of the transistor TR1 is consumed and the capacitor CD1 due to the resistors R3 and R4. If you want to reduce the consumption of the electric charge stored in the capacitor to zero, you can use the following configuration. The male switch SW1b and the male switch SW2b are further provided on the switch SW1 and the switch SW2, respectively, and the male switch SW1b and the male switch SW2b arranged on the switch SW1 and the switch SW2 are provided with two male switches SW1b and two male switches SW2b, respectively. Correspondingly, the switch SW1 and the switch SW2 are further provided with the female switch SW1a and the female switch SW2a, respectively, and the female switch SW1a and the female switch SW2a arranged on the switch SW1 and the switch SW2 are provided with 2 respectively. Make them one by one. As a result, one new combination of the male switch SW1b and the female switch SW1a is added to the switch SW1. Similar to the switch SW1, a new combination of the male switch SW2b and the female switch SW2a is added to the switch SW2. Then, the connection between the OUT terminal of the timer IC1 in the frame opening detection circuit 260 and one end of the resistor R3 is disconnected, and the female switch SW1a newly added to the OUT terminal of the timer IC1 after the connection is disconnected is built in. Connect one end of a pair of terminals to SW1c. Then, the other end of the pair of terminals / SW1c built in the newly added female switch SW1a is connected to one end of the resistor R3 after the connection is disconnected. Similarly, one end of a pair of terminals vs. SW2c built in the newly added female switch SW2a is connected to the OUT terminal of the timer IC1 after the connection is disconnected. Then, the other end of the pair of terminals / SW2c built in the newly added female switch SW2a is connected to one end of the resistor R3 after the connection is disconnected. With this configuration, when the inner frame 12 and the front frame 14 are closed and the switch SW1 and the switch SW2 are shut off, about 10.6 volts, which is the OUT terminal voltage of the timer IC1, is the resistor R3. It is not applied to the resistors R4 and R5, and the consumption of the electric charge stored in the capacitor CD1 by the base current of the transistor TR1 and the consumption of the electric charge stored in the capacitor CD1 by the resistors R3 and R4 can be reduced to zero. it can. On the contrary, when one of the inner frame 12 or the front frame 14 or both the inner frame 12 and the front frame 14 are open (one of the switch SW1 or the switch SW2, or both the switch SW1 and the switch SW2). The OUT terminal voltage of the timer IC1 is divided and applied to the resistor R3, the resistor R4, the resistor R5, the resistor R6, and the capacitor CD2 to supply a current to the photocoupler PR1. It can be done normally through the resistor R7.

The location where the connection with the OUT terminal of the timer IC1 is cut off and the terminal pair SW1c and the terminal pair SW2c are connected is not limited to the above. For example, a pair built in a newly added female switch SW1a at the other end of the resistor R3 after cutting the other end of the resistor R3 and one end of the resistor R4, the resistor R5 and the capacitor CD2 and disconnecting the connection. Connect one end of SW1c to the terminal of. Then, the other end of the pair of terminals / SW1c built in the newly added female switch SW1a is connected to one end of the resistor R4, the resistor R5, and the capacitor CD2 after the connection is disconnected. Similarly, one end of a pair of terminals pair SW2c built in the newly added female switch SW2a is connected to the other end of the resistor R3 after the connection is disconnected. Then, the other end of the pair of terminals / SW2c built in the newly added female switch SW2a may be connected to one end of the resistor R4, the resistor R5, and the capacitor CD2 after the connection is disconnected. That is, when the inner frame 12 and the front frame 14 are closed by the newly added male switch SW1b and female switch SW1a and the newly added male switch SW2b and female switch SW2a. (When the switch SW1 and the switch SW2 are cut off), while cutting off the continuity between the OUT terminal of the timer IC1 and the ground, one of the inner frame 12 or the front frame 14, or the inner frame 12 and the front frame 14 When both are open (one of the switch SW1 and the switch SW2, or both the switch SW1 and the switch SW2 are conducting), the resistance R3, the resistance R4, the resistance R5, the resistance R6 and The OUT terminal voltage of the timer IC1 may be divided and applied to the capacitor CD2.

Further, when it is desired to separately store in the hall computer 262 which of the inner frame 12 and the front frame 14 is opened, the following configuration may be used. First, the frame opening detection circuit 260 and the external output terminal plate 261 used in the present embodiment are newly provided one by one, the switch SW2 connected in parallel to the switch SW1 is disconnected, and the disconnected switch SW2 is newly provided. It may be connected to the provided frame opening detection circuit 260. Specifically, one end of the disconnected switch SW2 is connected to one end of the capacitor CD1 of the newly provided frame opening detection circuit 260, the VDD terminal of the timer IC1, one end of the capacitor CD4, and the RES terminal of the timer IC1 and disconnected. The other end of the switch SW2 may be connected to one end of the capacitor CD5 of the newly provided frame opening detection circuit 260, one end of the resistor R1, and one end of the resistor R7 of the external output terminal board 261. In this way, the frame opening detection circuit 260 and the external output terminal plate 261 are newly provided, and only the switch SW2 is connected to the newly provided frame opening detection circuit 260, and the switch is connected to the existing frame opening detection circuit 260. By connecting only SW1, when there is continuity of the switch SW1 (opening of the inner frame 12), the pulse signal output from the existing external output terminal plate 261 and the continuity of the switch SW2 (opening of the front frame 14). ), The pulse signal output from the newly provided external output terminal plate 261 can be output to the hall computer 262 separately. Here, the hall computer 262 has an input terminal for a pulse signal output from the existing external output terminal plate 261 (for detecting continuity of the switch SW1 (for detecting the opening of the inner frame 12)) and a newly provided external output terminal. Separate from the input terminal of the pulse signal output from the plate 261 (for detecting the continuity of the switch SW2 (for detecting the opening of the front frame 14)). With this configuration, the continuity of the switch SW1 (opening of the inner frame 12) and the continuity of the switch SW2 (opening of the front frame 14) can be distinguished and stored in the hall computer 262. Therefore, depending on the pulse signal stored in the hall computer 262, there was continuity of the switch SW1 (opening of the inner frame 12), conduction of the switch SW2 (opening of the front frame 14), or both. Can be detected accurately.

Further, when power is being supplied to the pachinko machine 10, which of the inner frame 12 and the front frame 14 is opened is separately stored in the hall computer 262, and the inner frame 12 and the front frame 14 are combined. If the pachinko machine 10 wants to notify when either of them is opened, the following configuration may be used. First, the frame opening detection circuit 260 and the external output terminal plate 261 used in the present embodiment are newly provided one by one, the switch SW2 connected in parallel to the switch SW1 is disconnected, and the disconnected switch SW2 is newly provided. It is connected to the provided frame opening detection circuit 260. Next, the male switches SW1b and SW2b and the female switches SW1a and SW2a are newly provided on the switch SW1 and the switch SW2, respectively. Then, when the inner frame 12 or the front frame 14 is opened and the switch SW1 or the switch SW2 becomes conductive by using the newly provided male switches SW1b and SW2b and the female switches SW1a and SW2a, a signal is sent to the MPU 201. It may be configured to be input.

Specifically, one end of the disconnected switch SW2 is connected to one end of the capacitor CD1 of the newly provided frame opening detection circuit 260, the VDD terminal of the timer IC1, one end of the capacitor CD4, and the RES terminal of the timer IC1 and disconnected. The other end of the switch SW2 may be connected to one end of the capacitor CD5 of the newly provided frame opening detection circuit 260, one end of the resistor R1, and one end of the resistor R7 of the external output terminal board 261. In this way, the frame opening detection circuit 260 and the external output terminal plate 261 are newly provided, and only the switch SW2 is connected to the newly provided frame opening detection circuit 260, and the switch is connected to the existing frame opening detection circuit 260. By connecting only SW1, when there is continuity of the switch SW1 (opening of the inner frame 12), the pulse signal output from the existing external output terminal plate 261 and the continuity of the switch SW2 (opening of the front frame 14). ), The pulse signal output from the newly provided external output terminal plate 261 can be output to the hall computer 262 separately.

Next, the male switch SW1b and the male switch SW2b are further provided on the switch SW1 and the switch SW2, respectively, and the male switch SW1b and the male switch SW2b arranged on the switch SW1 and the switch SW2 are provided with two male switches SW1b and two male switches SW2b, respectively. To do. Correspondingly, the switch SW1 and the switch SW2 are further provided with the female switch SW1a and the female switch SW2a, respectively, and the female switch SW1a and the female switch SW2a arranged on the switch SW1 and the switch SW2 are provided with 2 respectively. Make them one by one. As a result, one new combination of the male switch SW1b and the female switch SW1a is added to the switch SW1. Further, as in the case of the switch SW1, a new combination of the male switch SW2b and the female switch SW2a is added to the switch SW2. Then, one end of the pair of terminals pair SW1c built in the newly added female switch SW1a is connected to the DC power supply DC1 of the existing frame opening detection circuit 260, and built in the newly added female switch SW1a. The other end of the pair of terminals and SW1c is connected to the input / output port 205 of the MPU 201 via a voltage dividing circuit composed of a resistor. Similarly, one end of the pair of terminals vs. SW2c built into the newly added female switch SW2a is connected to the DC power supply DC1 of the newly provided frame opening detection circuit 260, and the newly added female type is used. The other end of the pair of terminals vs. SW2c built in the switch SW2a is connected to the input / output port 205 of the MPU 201 via a voltage divider circuit composed of a resistor, and to a port different from the other end of the terminal pair SW1c. Further, in the MPU 201, the inner frame 12 or the front frame 14 is opened, the switch SW1 or the switch SW2 is conducted, and a voltage of 5 volts (supplied from the DC power supply DC1 by a voltage dividing circuit) for detecting the opening of the inner frame 12 is provided. The 12 volt voltage is stepped down to 5 volt) or the 5 volt voltage that detects the opening of the inner frame 14 (the voltage divider circuit steps down the 12 volt voltage supplied from the DC power supply DC1 to 5 volt). ) Is input to the input / output port 205, a command indicating that the opening of the inner frame 12 or the front frame 14 is detected is transmitted to the voice lamp control device 113 and the display control device 114. At this time, the commands transmitted from the MPU 201 are a command when the opening of the inner frame 12 is detected (hereinafter, referred to as an "inner frame command") and a command when the front frame 14 is opened (hereinafter, "" It is separated from the "front frame command"). Then, the voice lamp control device 113 that has received each of these commands notifies different modes depending on whether the inner frame command is received or the front frame command is received. For example, the voice output device 226 emits a different warning sound, or the lamp display device 227 is lit differently. Further, the display control device 114 that has received each of these commands displays different modes depending on whether the inner frame command is received or the front frame command is received. For example, when the display control device 114 receives the inner frame command, the third symbol display device 81 displays "the inner frame is open", or when the display control device 114 receives the front frame command. The third symbol display device 81 may be configured to display "the front frame is open".

In this way, one new combination of the male switch SW1b and the female switch SW1a is added to the switch SW1, and the switch SW2 is also newly combined with the male switch SW2b and the female switch SW2a in the same manner as the switch SW1. When the switch SW1 is conducted (when the inner frame 12 is opened), the MPU 201 issues an inner frame command to the voice lamp control device 113 and the display control device 114 by using them. Configure to send. Further, when the switch SW2 is electrically connected (when the front frame 14 is opened), the MPU 201 is configured to transmit a front frame command to the voice lamp control device 113 and the display control device 114. With this configuration, the voice lamp control device 113 and the display control device 114 can be used to perform notification in different modes depending on whether the inner frame 12 is opened or the front frame 14 is opened. Can be done. As a result, the pachinko machine 10 is used to accurately determine whether the switch SW1 is conducting (opening the inner frame 12), the switch SW2 is conducting (opening the front frame 14), or both. Can be detected.

Further, a frame opening detection circuit 260 and an external output terminal plate 261 are newly provided, and only the switch SW2 is connected to the newly provided frame opening detection circuit 260, and the switch SW1 is connected to the existing frame opening detection circuit 260. By connecting only the switch SW1 when there is continuity (opening of the inner frame 12), the pulse signal output from the existing external output terminal plate 261 and the continuity of the switch SW2 (opening of the front frame 14). If there is, the pulse signal output from the newly provided external output terminal plate 261 can be output to the hall computer 262 separately. Therefore, depending on the pulse signal stored in the hall computer 262, there was continuity of the switch SW1 (opening of the inner frame 12), conduction of the switch SW2 (opening of the front frame 14), or both. Can be detected accurately.

In the present embodiment, the pulse signal output from the external output terminal plate 261 is output to the hall computer 262, which is installed at a different location from the pachinko machine 10, but the present invention is not limited to this. A dedicated storage device having the function of the hall computer 262 may be provided for each pachinko machine 10, and the dedicated storage device may be arranged on the back side of each pachinko machine 10 provided with the main control device 110 or the like. In this case, better, a dedicated storage device such as the main control device 110, the payout control device 111, and the launch control device 112 is housed in the board box, and the box base and the box cover provided in the board box. And are connected by a sealing unit (not shown) so that they cannot be opened (connection by a caulking structure). Then, a sealing sticker (not shown) is attached to the connecting portion between the box base and the box cover over the box cover and the box base.

Next, the display contents of the third symbol display device 81 will be described with reference to FIG. FIG. 9 is a drawing for explaining a display screen of the third symbol display device 81, and FIG. 9A is a diagram schematically showing an area division setting and an effective line setting of the display screen. FIG. 9B is a diagram illustrating an actual display screen.

The third symbol is composed of 10 types of main symbols having numbers from "0" to "9" and one type of petal-shaped sub symbol formed smaller than the main symbol. Each main symbol is composed of a rear symbol consisting of a wooden box with numbers from "0" to "9", of which the main symbols with odd numbers (1,3,5,7,9) are , A large number is added to almost the front of the wooden box. On the other hand, the main symbols with even numbers (0,2,4,6,8) are protected almost completely on the front of the wooden box, and attached symbols that imitate characters such as furoshiki and helmets are added. Even numbers are added to the lower right side of the attached symbol so that they are small in green and displayed on the front side of the attached symbol.

Further, in the pachinko machine 10 of the present embodiment, when the lottery result by the main control device 110 is a big hit, a variable display in which the same main symbols are aligned is performed, and a big hit occurs after the variable display is completed. It is configured to do so. When shifting to the high probability state (probability change state) after the jackpot ends, a variable display is performed in which the main symbols with odd numbers added (corresponding to the "high probability symbol") are aligned. On the other hand, when the state shifts to the low-probability state after the jackpot ends, a variable display is performed in which the main symbols to which even numbers are added (corresponding to "low-probability symbols") are aligned. Here, the high-probability state refers to a state in which the probability of a jackpot is increased as an added value after the end of the jackpot, that is, a so-called probability fluctuation (probability change). Further, the normal state (low probability state) refers to a time when the probability is not changed, and means a state in which the jackpot probability is normal, that is, a state in which the jackpot probability is lower than that in the probability change.

As shown in FIG. 9A, the display screen of the third symbol display device 81 is roughly divided into upper and lower halves, and the lower two-thirds are the main display area Dm for variable display of the third symbol, and the rest. The upper 1/3 of is a sub-display area Ds for displaying a notice effect and a character.

In the main display area Dm, three symbol rows Z1, Z2, and Z3 on the left, middle, and right are displayed. In each of the symbol rows Z1 to Z3, the above-mentioned third symbols are displayed in a specified order. That is, in each of the symbol rows Z1 to Z3, the main symbols are arranged in ascending or descending order of numbers, and one sub symbol is arranged between the main symbols. Therefore, a total of 20 third symbols, 10 main symbols and 10 sub-symbols, are set in each symbol row, and each symbol row Z1 to Z3 scrolls from top to bottom with periodicity. The variable display is performed. In particular, in the left symbol row Z1, the numbers of the main symbols appear in descending order, and in the middle symbol row Z2 and the right symbol row Z3, the numbers of the main symbols appear in ascending order.

Further, in the main display area Dm, the third symbol is displayed in the upper, middle, and lower three rows for each symbol row Z1 to Z3. Therefore, the third symbol display device 81 displays a total of nine third symbols in 3 rows × 3 rows. Five effective lines, that is, an upper line L1, a middle line L2, a lower line L3, a right rising line L4, and a left rising line L5 are set in the main display area Dm. Then, in each game, the variable display is stopped in the order of the left symbol row Z1 → the right symbol row Z3 → the middle symbol row Z2, and at the time of the stop, the combination of the jackpot symbols on one of the effective lines (in the present embodiment). If they are aligned with the same combination of main symbols), the jackpot movie will be displayed as a jackpot.

The sub-display area Ds is provided horizontally above the main display area Dm, and is further divided into three notice areas Ds1 to Ds3 in the left-right direction. Here, the left and right notice areas Ds1 and Ds3 are usually covered with a double-door opaque door that is electrically opened and closed by a solenoid (not shown), and sometimes the solenoid is excited to bring the door to the front side. It is a display area that can be visually recognized by the player when it is opened. The central notice area Ds2 is a display area that can always be visually recognized without being covered by the door.

As shown in FIG. 9B, on the actual display screen, a total of nine main symbols and sub-symbols of the third symbol are displayed in the main display area Dm. In the sub-display area Ds, the left and right doors are closed, and the left and right notice areas Ds1 and Ds3 are obscured so that the display screen cannot be visually recognized. If one or both of the left and right doors are opened in the middle of the variable display, a moving image is displayed in the left and right notice areas Ds1 and Ds3, and the player is in a state where it is easier to transition to a jackpot than usual. It is suggested. In the central notice area Ds2, a predetermined character (a boy with a headband in the present embodiment) usually performs a predetermined action, and sometimes a special action different from the predetermined action or another character performs a predetermined action. A notice will be produced by appearing. In principle, the display screen of the third symbol display device 81 is divided into upper and lower display areas Dm and Ds, but the third symbol, characters, and the like are displayed larger across the respective display areas Dm and Ds. Display effects can be performed.

Next, with reference to FIG. 10, a counter and the like provided in the RAM 203 of the main control device 110 will be described. These counters and the like are used in the MPU 201 of the main control device 110 for performing a jackpot lottery, setting the display of the first symbol display device 37, drawing the display result of the second symbol display device 82, and the like.

To set the display of the jackpot lottery and the first symbol display device 37, the first hit random number counter C1 used for the jackpot lottery, the first hit type symbol counter C2 used for selecting the jackpot symbol, and the stop pattern selection counter. C3, the first initial value random number counter CINI1 used for setting the initial value of the first random number counter C1, and the fluctuation type counters CS1, CS2, and CS3 used for the fluctuation pattern selection are used. Further, the second random number counter C4 is used for the lottery of the second symbol display device 82, and the second initial value random number counter CINI2 is used for setting the initial value of the second random number counter C4. Each of these counters is a loop counter in which 1 is added to the previous value each time it is updated, and after reaching the maximum value, it returns to 0.

Each counter is updated at an interval of 4 ms, which is the execution interval of the main process (see FIG. 12), or at an interval of 2 ms, which is the execution interval of the timer interrupt process (see FIG. 15), and the updated value is set in a predetermined area of the RAM 203. It is appropriately stored in the counter buffer. The RAM 203 is provided with a hold ball storage area consisting of one execution area and four hold areas (hold first to fourth areas), and each of these areas has access to the first entry port 64. Each value of the first hit random number counter C1, the first hit type counter C2, and the stop pattern selection counter C3 is stored according to the winning timing of the ball.

Each counter will be described in detail. The first random number counter C1 is configured to be incremented by 1 in order within the range of 0 to 738, and return to 0 after reaching the maximum value (that is, 738). In particular, when the first random number counter C1 makes one round, the value of the first initial value random number counter CINI1 at that time is read as the initial value of the first random number counter C1. Further, the first initial value random number counter CINI1 is configured as a loop counter updated in the same range as the first random number counter C1 (value = 0 to 738), and each time the timer interrupt process (see FIG. 15) is executed. It is updated once and is repeatedly updated within the remaining time of the main process (see FIG. 12). The value of the first random number counter C1 is updated periodically (once for each timer interrupt process in the present embodiment), and the reserved ball is stored in the RAM 203 at the timing when the ball wins the first entry port 64. Stored in the area. The number of random number values that will be a big hit is set for two types, low probability time and high probability time, and the number of random number values that will be a big hit at low probability time is 2, and the value is "373,727". The number of random numbers that are big hits at high probability is 14, and the values are "59,109,163,211,263,317,367,421,479,523,631,683,733".

The first hit type counter C2 determines the display mode of the first symbol display device 37 at the time of a big hit, and in the present embodiment, one is added in order within the range of 0 to 4, and the maximum value ( That is, it is configured to return to 0 after reaching 4). The value of the first hit type counter C2 is updated periodically (once for each timer interrupt process in the present embodiment), and the reserved ball is stored in the RAM 203 at the timing when the ball wins the first entry port 64. Stored in the area. The value of the random number that becomes the high probability state after the big hit is "1, 2, 3", and the value of the random number that becomes the low probability state after the big hit is "0, 4", and two types of hit types are determined. Random numbers. Therefore, the display modes corresponding to the stop symbols displayed on the first symbol display device 37 are a display mode corresponding to two types of jackpots, a high-probability state and a low-probability state, and one type of display mode corresponding to the loss. One of the three display modes in total is selected.

The stop pattern selection counter C3 is configured to be incremented by 1 in order within the range of 0 to 238, and return to 0 after reaching the maximum value (that is, 238). In the present embodiment, the stop pattern selection counter C3 selects the pattern of the effect displayed by the third symbol display device 81, and after the reach occurs, the final stop symbol is shifted by one before and after the reach symbol. A "front-back off reach" (for example, in the range of 0 to 8) that stops, and a "reach other than front-back off" (for example, in the range of 9 to 38) in which the final stop symbol stops outside the front and back of the reach symbol after the same reach occurs. , Three stop (effect) patterns with "complete deviation" (for example, in the range of 39 to 238) where reach does not occur are selected. The value of the stop pattern selection counter C3 is updated periodically (once for each timer interrupt process in the present embodiment), and the reserved ball storage area of the RAM 203 is stored at the timing when the ball wins the first ball entry port 64. Stored in.

Further, the stop pattern selection counter C3 is provided with a plurality of tables having different ranges of random values for which the stop pattern is selected. This depends on whether the current state of the pachinko machine 10 is a high probability state or a low probability state, in which area of the holding ball storage area each random value is stored (that is, the number of holdings), and the like. This is to change the selection ratio of the stop pattern.

For example, in a high-probability state, a table with a wide range of random values of 10 to 238 corresponding to the "completely off" stop pattern is selected so that the reach effect is not selected more than necessary because a big hit is likely to occur. "Completely off" is easily selected. In this table, the "reach outside the front and rear" is narrowed to 0 to 5, and the "reach other than the front and rear" is also narrowed to 6 to 9, making it difficult to select "reach outside the front and back" or "reach other than the front and rear". Further, if each random value is not stored in the reserved ball storage area in the low probability state, the disorder corresponding to the "completely off" stop pattern is used to secure the ball entry time into the first entry port 64. A table with a narrow numerical range of 51 to 238 is selected, and it becomes difficult to select "completely off". In this table, the range of random values corresponding to the stop pattern of "reach other than front-back deviation" is widened to 9 to 50, and "reach other than front-back deviation" can be easily selected. Therefore, in the low probability state, it is possible to secure the ball entry time to the first ball entry port 64, so that the variation display by the third symbol display device 81 can be easily performed continuously.

Of the two variation type counters CS1 and CS2, one variation type counter CS1 is added one by one in order within the range of 0 to 198, for example, reaches the maximum value (that is, 198), and then returns to 0. The other variable type counter CS2 is configured to be incremented by 1 in order within the range of 0 to 240, and return to 0 after reaching the maximum value (that is, 240). In the following description, CS1 is also referred to as "first variation type counter", and CS2 is also referred to as "second variation type counter".

The first variable type counter CS1 determines a rough display mode such as so-called normal reach, super reach, and premium reach. Specifically, the determination of the display mode is the determination of the fluctuation time of the symbol variation. Further, the second variation type counter CS2 determines the variation time (in other words, the number of variation symbols) until the final stop symbol (middle symbol in the present embodiment) stops after the reach occurs. Based on the fluctuation time determined by the fluctuation type counters CS1 and CS2, the display control device 114 determines the reach type and the fine symbol fluctuation mode of the third symbol displayed on the third display device 81. Therefore, by combining these fluctuation type counters CS1 and CS2, it is possible to easily realize a wide variety of fluctuation patterns. Further, it is also possible to determine the symbol variation mode only by the first variation type counter CS1 or to determine the symbol variation mode by combining the first variation type counter CS1 and the stop symbol. The values of the variation type counters CS1 and CS2 are updated once each time the main process (see FIG. 12) described later is executed once, and are repeatedly updated even within the remaining time in the main process.

The value of the variation type counter CS3 is, for example, incremented by 1 in the range of 0 to 162, reaches the maximum value (that is, 162), and then returns to 0. In the following description, CS3 is also referred to as a "third variable type counter". The third symbol display device 81 of the present embodiment performs a decorative effect according to the display mode of the first symbol display device 37, and slides a fluctuating symbol in addition to the fluctuation of the symbol. , A notice effect such as passing a notice character for notifying the occurrence of a reach effect is performed. The effect pattern of the advance notice effect is selected by the variable type counter CS3. Specifically, an effect pattern is selected in which the time required for the advance notice effect is added to the fluctuation time, the fluctuation time is subtracted in order to shorten the time when the fluctuation is displayed, or the fluctuation time is not added or subtracted. .. As with the stop pattern selection counter C3, the variation type counter CS3 is provided with a plurality of tables having different ranges of random numbers for which the effect pattern is selected, and is the current state of the pachinko machine 10 a high probability state? The selection ratio of each effect pattern is configured to be different depending on whether it is in a low probability state or in which area of the reserved ball storage area each random value is stored.

As described above, the fluctuation type counters CS1 and CS2 determine the fluctuation time of the symbol variation, and the fluctuation type counter CS3 determines the time to be added or subtracted from the fluctuation time. Therefore, the final fluctuation time until the final stop symbol is stopped is determined by the fluctuation type counters CS1, CS2, and CS3.

The second random number counter C4 is configured as a loop counter that is incremented by 1 in order within the range of 0 to 250, reaches the maximum value (that is, 250), and then returns to 0. In the present embodiment, the value of the second random number counter C4 is updated periodically, for example, for each timer interrupt process, and the ball has passed through either the left or right second entry port (through gate) 67. Acquired when detected. The number of random numbers to be won is 149, and the range is "5 to 153". The second initial value random number counter CINI2 is configured as a loop counter that is updated in the same range as the second random number counter C4 (value = 0 to 250), and is once for each timer interrupt process (see FIG. 15). At the same time as being updated, it is repeatedly updated within the remaining time of the main process (see FIG. 12).

Next, each control process executed by the MPU 201 in the main control device 110 will be described with reference to the flowcharts of FIGS. 11 to 17. The processing of the MPU 201 is roughly divided into a start-up process that is started when the power is turned on, a main process that is executed after the start-up process, and a timer that is started periodically (at a 2 ms cycle in the present embodiment). There are an interrupt process and an NMI interrupt process that is activated by inputting a power failure signal SG1 to the NMI terminal. For convenience of explanation, the timer interrupt process and the NMI interrupt process are first described, and then the start-up process is performed. The main process will be described.

FIG. 15 is a flowchart showing a timer interrupt process. The timer interrupt process is executed by the MPU 201 of the main control device 110, for example, every 2 ms. In the timer interrupt process, first, the read process of various winning switches is executed (S501). That is, the state of various switches connected to the main control device 110 is read, the state of the switch is determined, and the detection information (winning detection information) is saved.

Next, the first initial value random number counter CINI1 and the second initial value random number counter CINI2 are updated (S502). Specifically, the first initial value random number counter CINI1 is added by 1, and when the counter value reaches the maximum value (738 in the present embodiment), it is cleared to 0. Then, the updated value of the first initial value random number counter CINI1 is stored in the corresponding buffer area of the RAM 203. Similarly, the second initial value random number counter CINI2 is added by 1, and when the counter value reaches the maximum value (250 in the present embodiment), it is cleared to 0 and the second initial value random number counter CINI2 is updated. The value is stored in the corresponding buffer area of RAM 203.

Further, the first hit random number counter C1, the first hit type counter C2, the stop pattern selection counter C3, and the second hit random number counter C4 are updated (S503). Specifically, the first random number counter C1, the first hit type counter C2, the stop pattern selection counter C3, and the second random number counter C4 are each added by 1, and their counter values are the maximum values (the present embodiment). Then, when they reach 738, 4, 238, 250), they clear to 0, respectively. Then, the updated values of the counters C1 to C4 are stored in the corresponding buffer area of the RAM 203.

After that, the start winning process (see FIG. 16) accompanying the winning of the first ball opening 64 is executed (S504), the firing control process is executed (S505), and the timer interrupt process is completed. In the launch control process, the touch sensor 51a detects that the player is touching the operation handle 51, and the launch of the ball is turned on on condition that the stop switch 51b for stopping the launch is not operated. This is the process of determining / off. The main control device 110 instructs the launch control device 112 to launch the ball when the launch of the ball is on.

Here, the start winning process executed in the process of S504 will be described with reference to the flowchart of FIG. FIG. 16 is a flowchart showing a start winning process (S504) executed in the timer interrupt process (see FIG. 15).

When this start winning process is executed, first, it is determined whether or not the ball has won a prize (starting prize) in the first ball opening 64 (S601). When it is determined that the ball has won the first ball entrance 64 (S601: Yes), whether or not the number N of balls on hold for operation of the first symbol display device 37 is less than the upper limit value (4 in the present embodiment). (S602). If there is a prize in the first entry port 64 and the number of operation-reserved balls N <4 (S602: Yes), the number of operation-reserved balls N is added by 1 (S603), and further updated in step S503. Each value of the first hit random number counter C1, the first hit type counter C2, and the stop pattern selection counter C3 is stored in the first free holding area of the holding ball storage area of the RAM 203 (S604). On the other hand, if there is no winning in the first ball opening 64 (S601: No), or even if there is a winning in the first ball opening 64, the number of pending balls N <4 (S602: No). , S603 and S604 are skipped, the start winning process is completed, and the process returns to the timer interrupt process.

FIG. 17 is a flowchart showing the NMI interrupt process. The NMI interrupt process is a process executed by the MPU 201 of the main control device 110 when the power of the pachinko machine 10 is cut off due to the occurrence of a power failure or the like. By this NMI interrupt processing, the power failure occurrence information is stored in the RAM 203. That is, when the power supply of the pachinko machine 10 is cut off due to the occurrence of a power failure or the like, the power failure signal SG1 is output from the power failure monitoring circuit 252 to the NMI terminal of the MPU 201 in the main control device 110. Then, the MPU 201 interrupts the control during execution and starts the NMI interrupt process, stores the power failure occurrence information in the RAM 203 (S701) as a setting of the power failure occurrence information, and ends the NMI interrupt process. To do.

The above NMI interrupt process is also executed in the payout launch control device 111, and the power outage occurrence information is stored in the RAM 213 by the NMI interrupt process. That is, when the power supply of the pachinko machine 10 is cut off due to the occurrence of a power failure or the like, the power failure signal SG1 is output from the power failure monitoring circuit 252 to the NMI terminal of the MPU 211 in the payout launch control device 111, and the MPU 211 interrupts the control during execution. Then, the NMI interrupt process is started.

Next, with reference to FIG. 11, a start-up process when the power is turned on to the main control device 110 will be described. FIG. 11 is a flowchart showing a start-up process executed by the MPU 201 in the main control device 110. This start-up process is started by resetting when the power is turned on. In the start-up process, first, the initial setting process associated with the power-on is executed (S101). Specifically, a predetermined value is set in the stack pointer, and the control devices on the sub side (peripheral control devices such as the voice lamp control device 113 and the payout control device 111) are put into an operable state. In order to wait, a wait process (1 second in the present embodiment) is executed. Next, access to the RAM 203 is permitted (S103).

After that, it is determined whether or not the RAM erase switch 122 (see FIG. 3) provided in the power supply device 115 is turned on (S104), and if it is turned on (S104: Yes), the process shifts to S110. On the other hand, if the RAM erase switch 122 is not turned on (S104: No), it is determined whether or not the power outage occurrence information is stored in the RAM 203 (S105), and if it is not stored (S105: No). Since there is a possibility that the process at the time of the previous power cutoff did not end normally, the process is also shifted to S110 in this case as well.

If the power outage occurrence information is stored in the RAM 203 (S105: Yes), the RAM determination value is calculated (S106), and if the calculated RAM determination value is not normal (S107: No), that is, the calculated RAM If the determination value does not match the RAM determination value saved when the power is cut off, the backed up data is destroyed, and the process is shifted to S110 even in such a case. As will be described later in the process of S213 in FIG. 12, the RAM determination value is, for example, a checksum value at the work area address of the RAM 203. Instead of this RAM determination value, the effectiveness of the backup may be determined based on whether or not the keyword written in the predetermined area of the RAM 203 is correctly saved.

In the process of S111, a payout initialization command is transmitted to initialize the payout control device 111 which is a control device (peripheral control device) on the sub side (S111). Upon receiving this payout initialization command, the payout control device 111 clears an area (work area) other than the stack area of the RAM 213, sets an initial value, and is ready to start payout control of the game ball. After transmitting the payout initialization command, the main control device 110 executes the initialization process (S112, S113) of the RAM 203.

As described above, in the pachinko machine 10, when the RAM data is initialized at the time of turning on the power, for example, when the hall is open for business, the power is turned on while pressing the RAM erasing switch 122. Therefore, if the RAM erase switch 122 is pressed during the start-up process, the RAM initialization process (S112, S113) is executed. Further, the initialization process (S112, S113) of the RAM 203 is similarly executed when the power failure occurrence information is not set or when a backup abnormality is confirmed by the RAM determination value (checksum value, etc.). .. In the RAM initialization process (S112, S113), the used area of the RAM 203 is cleared to 0 (S112), and then the initial value of the RAM 203 is set (S113). After executing the initialization process of the RAM 203, the process proceeds to the process of S110.

On the other hand, if the RAM erase switch 122 is not turned on (S104: No), the power failure occurrence information is stored (S105: Yes), and the RAM determination value (checksum value, etc.) is normal ( S107: Yes), the information on the occurrence of the power failure is cleared while holding the data backed up in the RAM 203 (S108). Next, a payout return command at the time of power recovery for returning the control device (peripheral control device) on the sub side to the gaming state when the drive power is cut off is transmitted (S109), and the process proceeds to S110. When the payout control device 111 receives the payout return command, the payout control device 111 is in a state where the payout control of the game ball can be started while holding the data stored in the RAM 213. In the process of S110, interrupts are permitted and the process proceeds to the main process described later.

Next, with reference to FIG. 12, the main process executed after the above-mentioned start-up process will be described. FIG. 12 is a flowchart showing a main process executed by the MPU 201 in the main control device 110. In this main process, the main process of the game is executed. As an outline, each process of S201 to S206 is executed as a periodic process having a cycle of 4 ms, and the counter update process of S209 and S210 is executed in the remaining time.

In the main process, first, output data such as a command updated in the previous process is transmitted to each control device (peripheral control device) on the sub side (S201). Specifically, the presence / absence of the prize detection information detected by the switch reading process of S501 is determined, and if there is the prize detection information, the prize ball command corresponding to the number of acquired balls is transmitted to the payout control device 111. Further, by this external output processing, the variation pattern command, the stop symbol command, the stop command, the effect time addition command, and the like necessary for the variation display of the third symbol by the third symbol display device 81 are transmitted to the voice lamp control device 113. Further, when launching a ball, a ball launch signal is transmitted to the launch control device 112.

Next, each value of the fluctuation type counters CS1, CS2, and CS3 is updated (S202). Specifically, the variable type counters CS1, CS2, and CS3 are added by 1, and when the counter values reach the maximum values (198, 240, 162 in the present embodiment), they are cleared to 0, respectively. Then, the updated values of the fluctuation type counters CS1, CS2, and CS3 are stored in the corresponding buffer area of the RAM 203.

When the update of the variable type counters CS1, CS2, and CS3 is completed, the prize ball counting signal and the payout abnormality signal received from the payout control device 111 are read (S203), and the process for displaying by the first symbol display device 37 and the first 3 The symbol display device 81 executes a variation process for setting a variation pattern of the third symbol and the like (S204). The details of the variation processing will be described later with reference to FIG.

After the variation processing is completed, the large opening opening / closing process for opening or closing the specific winning opening (large opening opening) 65a of the variable winning device 65 is executed in the case of a big hit state (S205). That is, the specific winning opening 65a is opened for each round in the jackpot state, and it is determined whether the maximum opening time of the specific winning opening 65a has elapsed or whether the specified number of balls have won the specific winning opening 65a. Then, when any of these conditions is satisfied, the specific winning opening 65a is closed. The opening and closing of the specific winning opening 65a is repeatedly executed for a predetermined number of rounds.

Next, the display control process of the second symbol (for example, the symbol of "○" or "x") by the second symbol display device 82 is executed (S206). Briefly, on condition that the ball has passed through the second entry port (through gate) 67, the value of the second random number counter C4 is acquired at the timing of the passage, and the second symbol display device 82 The variable display of the second symbol is carried out on the display unit 83 of. Then, a lottery for the second symbol is carried out based on the value of the second random number counter C4, and when the second symbol is in the winning state, the electric accessory attached to the first entry port 64 is opened for a predetermined time.

After that, it is determined whether or not the power failure occurrence information is stored in the RAM 203 (S207), and if the power failure occurrence information is not stored in the RAM 203 (S207: No), the power failure signal from the power failure monitoring circuit 252 SG1 is not output and the power supply is not cut off. Therefore, in such a case, it is determined whether or not the execution timing of the next main process has been reached, that is, whether or not a predetermined time (4 ms in the present embodiment) has elapsed from the start of the previous main process (S208). If the predetermined time has already passed (S208: Yes), the process is shifted to S201, and each process after S201 described above is repeatedly executed.

On the other hand, if the predetermined time has not yet elapsed from the start of the previous main process (S208: No), the first is within the period until the predetermined time is reached, that is, within the remaining time until the execution timing of the next main process is reached. 1 The initial value random number counter CINI1, the second initial value random number counter CINI2, and the variation type counters CS1, CS2, and CS3 are repeatedly updated (S209, S210).

First, the first initial value random number counter CINI1 and the second initial value random number counter CINI2 are updated (S209). Specifically, the first initial value random number counter CINI1 and the second initial value random number counter CINI2 are added by 1, and when the counter value reaches the maximum value (738, 250 in the present embodiment), it is cleared to 0. To do. Then, the updated values of the first initial value random number counter CINI1 and the second initial value random number counter CINI2 are stored in the corresponding buffer areas of the RAM 203, respectively.

Next, the variation type counters CS1, CS2, and CS3 are updated (S210). Specifically, the variable type counters CS1, CS2, and CS3 are added by 1, and when the counter values reach the maximum values (198, 240, 162 in the present embodiment), they are cleared to 0, respectively. Then, the update values of the fluctuation type counters CS1, CS2, and CS3 are stored in the corresponding buffer areas of the RAM 203, respectively.

Here, since the execution time of each process of S201 to S206 changes according to the state of the game, the remaining time until the execution timing of the next main process is not constant and fluctuates. Therefore, by repeatedly updating the first initial value random number counter CINI1 and the second initial value random number counter CINI2 using the remaining time, the first initial value random number counter CINI1 and the second initial value random number counter CINI2 (that is, , The initial value of the first random number counter C1 and the initial value of the second random number counter C4) can be updated at random, and similarly, the variable type counters CS1, CS2, and CS3 can be updated at random.

Further, in the processing of S207, if the power failure occurrence information is stored in the RAM 203 (S207: Yes), the power is cut off due to the occurrence of a power failure or the power is turned off, and the power failure signal SG1 is output from the power failure monitoring circuit 252. As a result, since the NMI interrupt process shown in FIG. 17 has been executed, the process when the power is cut off after S211 is executed. First, the occurrence of each interrupt process is prohibited (S211), and a power cutoff notification command indicating that the power is cut off is sent to another control device (peripheral control device such as payout control device 111 or voice lamp control device 113). (S212). Then, the RAM determination value is calculated, the value is saved (S213), the access of the RAM 203 is prohibited (S214), and the infinite loop is continued until the power supply is completely shut off and the process cannot be executed. Here, the RAM determination value is, for example, a checksum value in the backed up stack area and work area of the RAM 203.

The process of S207 is performed at the end of a series of processes corresponding to the state change of the game performed in S201 to S206, or at the end of one cycle of the processes of S209 and S210 performed within the remaining time. It is running. Therefore, in the main process of the main control device 110, the power off occurrence information is confirmed at the timing when each setting is completed. Therefore, when returning from the power cut state, the process is performed after the start-up process is completed. It can be started from the process of S201. That is, the process can be started from the process of S201 as in the case of being initialized in the start-up process. Therefore, in the process when the power is cut off, the stack pointer is used in the initial setting process (S101) without saving the contents of each register used by the MPU 201 to the stack area or saving the value of the stack pointer. By setting a predetermined value (initial value), it is possible to start from the process of S201. Therefore, the control load of the main control device 110 can be reduced, and accurate control can be performed without the main control device 110 malfunctioning or running out of control.

Next, the variation processing (S204) will be described with reference to FIG. FIG. 13 is a flowchart showing a variation process (S204) executed in the main process (see FIG. 12). In this fluctuation processing, first, it is determined whether or not the jackpot is currently being hit (S301). The jackpot includes during the jackpot game displayed by the third symbol display device 81 and the first symbol display device 37 at the time of the jackpot, and during a predetermined time after the jackpot game ends. As a result of the determination, if the jackpot is in progress (S301: Yes), this process is terminated as it is.

If it is not a big hit (S301: No), it is determined whether or not the display mode of the first symbol display device 37 is changing (S302), and if the display mode of the first symbol display device 37 is not changing. (S302: No), it is determined whether or not the number of operation-holding balls N is larger than 0 (S303). If the number of balls on hold for operation N is 0 (S303: No), this process ends as it is. If the number of operation-holding balls N> 0 (S303: Yes), the number of operation-holding balls N is subtracted by 1 (S304), and the data stored in the hold ball storage area is shifted (S305). This data shift process is a process of sequentially shifting the data stored in the hold 1st to 4th areas of the hold ball storage area to the execution area side, and is a process of shifting the hold ball storage area to the execution area side in order. The data in each area is shifted such as the hold 1st area, the hold 3rd area → the hold 2nd area, the hold 4th area → the hold 3rd area. After the data shift processing, the fluctuation start processing of the first symbol display device 37 is executed (S306). The fluctuation start processing will be described later with reference to FIG.

In the process of S302, when it is determined that the display mode of the first symbol display device 37 is changing (S302: Yes), it is determined whether or not the fluctuation time has elapsed (S307). The display time during fluctuation of the first symbol display device 37 is determined according to the fluctuation pattern selected by the fluctuation type counters CS1 and CS2 and the addition time selected by the fluctuation type counter CS3, and the fluctuation time is determined. If it has not elapsed (S307: No), the display of the first symbol display device 37 is updated (S308).

In the present embodiment, among the LEDs 37a of the first symbol display device 37, from the start of the fluctuation until the fluctuation time elapses, for example, if the currently lit LED is red, the red LED is used. Turn off and turn on the green LED, if the green LED is on, turn off the green LED and turn on the blue LED, and if the blue LED is on, turn on the blue LED. A display mode is set in which the red LED is turned on as well as turned off.

The variation processing is executed every 4 ms, but if the LED lighting color is changed each time the variation processing is executed, the player cannot confirm the change in the LED lighting color. Therefore, a counter (not shown) is counted by 1 each time the fluctuation process is executed so that the player can confirm the change in the lighting color of the LED, and when the counter reaches 100, the LED is displayed. Change the lighting color of. That is, the lighting color of the LED is changed every 0.4 s. The value of the counter is reset to 0 when the lighting color of the LED is changed.

On the other hand, if the fluctuation time of the first symbol display device 37 has elapsed (S307: Yes), the display mode corresponding to the stop symbol of the first symbol display device 37 is set (S309). In the setting of the stop symbol, whether or not it is a big hit is determined according to the value of the first hit random number counter C1, and if it is a big hit, the symbol that becomes a high probability state after the big hit is determined by the value of the first hit type counter C2. It is determined whether the symbol is in a low probability state. In the present embodiment, the red LED is turned on when the high probability state is reached after the big hit, the green LED is turned on when the low probability state is reached, and the blue LED is turned on when the probability is off. .. The display of each LED is turned off when the next fluctuation display is started, but it may be turned on only for a few seconds after the fluctuation is stopped.

When the display mode of the first symbol display device 37 corresponding to the stop symbol is set in the process of S309, the fluctuation stop of the third symbol display device 81 is stopped in order to synchronize with the lighting of the LED in the first symbol display device 37. The command is set (S310). Upon receiving this stop command, the voice lamp control device 113 gives a stop instruction to the display control device 114. The third symbol display device 81 stops the fluctuation when the fluctuation time elapses, and when the stop command is received, the fluctuation effect of 1 in the third symbol display device 81 ends.

Next, the fluctuation start processing will be described with reference to FIG. FIG. 14 is a flowchart showing the fluctuation start processing (S306) executed in the fluctuation processing (see FIG. 13). In the fluctuation start processing (S306), first, it is determined whether or not it is a big hit based on the value of the first random number counter C1 stored in the execution area of the reserved ball storage area (S401). Whether or not it is a big hit is determined based on the relationship between the value of the first random number counter C1 and the mode at that time. As described above, "373,727" out of the numerical values 0 to 738 of the first random number counter C1 is the winning value at the time of normal low probability, and "59,109,163,21,263,317,367" at the time of high probability. 421,479,523,631,683,733 ”is the winning value.

When it is determined that the jackpot is a big hit (S401: Yes), the value of the first hit type counter C2 stored in the execution area of the reserved ball storage area is confirmed, and the display mode at the time of the jackpot is set (S402). ). In the process of S402, it is set whether to shift to the high probability state or the low probability state after the big hit based on the value of the first hit type counter C2. When the transition state after the big hit is set, the display mode (lighting state of the LED 37a) of the first symbol display device 37 is set. Further, based on the transition state after the jackpot, the jackpot stop symbol that is stopped and displayed by the third symbol display device 81 is set by the voice lamp control device 113 and the display control device 114. That is, the stop symbol in the third symbol display device 81 is set by setting the transition state after the big hit by the process of S402. Of the numerical values 0 to 4 of the first type counter C2, in the case of "0,4", the state shifts to the low probability state, and in the case of "1,2,3", the state shifts to the high probability state. ..

Next, the fluctuation pattern at the time of big hit is determined (S403). When the fluctuation pattern is set in the process of S403, the display time of the first symbol display device 37 is set, and the fluctuation time of the third symbol until the third symbol display device 81 stops at the jackpot symbol is determined. To. At this time, the values of the fluctuation type counters CS1 and CS2 stored in the counter buffer of the RAM 203 are confirmed, and the rough symbol fluctuations such as normal reach, super reach, and premium reach are performed based on the values of the first fluctuation type counter CS1. The fluctuation time is determined, and the fluctuation time (in other words, the number of fluctuation symbols) until the final stop symbol (middle symbol Z2 in the present embodiment) stops after the reach occurs is determined based on the value of the second fluctuation type counter CS2. decide.

The relationship between the numerical value of the first fluctuation type counter CS1 and the fluctuation time, and the relationship between the numerical value of the second fluctuation type counter CS2 and the fluctuation time are defined in advance by a table or the like. However, the fluctuation time can be set by using only the value of the first fluctuation type counter CS1 without using the value of the second fluctuation type counter CS2, and is set only by the value of the first fluctuation type counter CS1. Whether or not to set with both values of both variable type counters CS1 and CS2 is appropriately determined according to the value of the first variable type counter CS1 and the game conditions each time.

If it is determined in the process of S401 that it is not a big hit (S401: No), the display mode at the time of disconnection is set (S404). In the process of S404, the display mode of the first symbol display device 37 is set to the display mode corresponding to the outlier symbol, and based on the value of the stop pattern selection counter C3 stored in the execution area of the hold ball storage area, the display mode is set. It is set whether the effect to be displayed on the third symbol display device 81 is a front-rear reach, a reach other than the front-rear reach, or a complete loss. In the present embodiment, as described above, the range of values corresponding to each stop pattern of the stop pattern selection counter C3 is set according to the high probability state, the low probability state, and the number of operation hold N. The tables are set differently.

Next, the fluctuation pattern at the time of disconnection is determined (S405), the display time of the first symbol display device 37 is set, and the fluctuation time of the third symbol until the third symbol display device 81 stops at the disengaged symbol. Is determined. At this time, similarly to the processing of S403, the values of the variable type counters CS1 and CS2 stored in the counter buffer of the RAM 203 are confirmed, and the normal reach, super reach, and premium reach are confirmed based on the values of the first variable type counter CS1. The fluctuation time of the symbol fluctuation such as, etc. is determined, and the fluctuation time until the final stop symbol (middle symbol Z2 in the present embodiment) stops after the reach occurs based on the value of the second fluctuation type counter CS2 (in other words). For example, the number of variable symbols) is determined.

When the processing of S403 or the processing of S405 is completed, the effect time to be added / subtracted to the fluctuation time determined by the first and second type counters CS1 and CS2 is determined (S406). At this time, addition / subtraction of the effect time is determined based on the value of the third type counter CS3 stored in the counter buffer of the RAM 203, the display time of the first symbol display device 37 is set, and the third symbol display is performed. The fluctuation time of the device 81 is set. In the present embodiment, the addition / subtraction of the effect time is determined by setting the variation display time to 2 when the variation display time is not changed and when the variation display time is added by 1 second according to the value of the third variation type counter CS3. When adding seconds, four types of addition values are determined, one is when the fluctuation display time is subtracted by 1 second.

When the variable display time is added or subtracted, the third symbol display device 81 raises the expected value of the jackpot. An effect of displaying the notice character, an effect of making the fluctuation time of the fluctuation symbol of 1 shorter than usual and immediately stopping, etc.) is performed. Further, when the value of the random number counter C1 per first is a big hit, the probability that the added value of 2 seconds is selected is set high, so that the player expects a big hit by checking the advance notice effect. Can be done.

Next, the fluctuation pattern command is set according to the fluctuation pattern (variation time) determined in the process of S403 or S405 (S407), and the stop symbol command is set according to the stop symbol set in the process of S402 or S404. (S408). Then, the effect time addition command is set according to the effect time addition value determined in the process of S406 (S409), and the process returns to the variation process.

As described above, according to the pachinko machine 10, when the inner frame 12 or the front frame 14 is in the open state and the switch SW1 or the switch SW2 is in the conductive state (see FIG. 5B), the frame open detection is detected. The circuit 260 supplies a current to one end of the resistor R7 of the external output terminal plate 261 until about 10 ms elapses (for about 10 ms) after the inner frame 12 or the front frame 14 is opened. Then, a current is supplied to the light emitting diode on the primary side of the photocoupler PR1 provided on the external output terminal plate 261 via the resistor R7, and the light emitting diode emits light for about 10 ms. Then, when the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 receives the light of the light emitting diode, the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 receives the light of about 10 ms in pulse width. Converts into a pulse signal (electrical signal) of about 10 ms, and outputs the pulse signal to the hall computer 262. The output pulse signal is stored in the hall computer 262. Therefore, by using the frame opening detection circuit 260 and the external output terminal plate 261, it is possible to store the hall computer 262 that the inner frame 12 has been opened or the front frame 14 has been opened. The hall computer 262 has been operated for 24 hours. Therefore, in the frame opening detection circuit 260, the pulse signal is output from the external output terminal plate 261 and the time when the pulse signal is output, that is, the opening time of the inner frame 12 and the opening time of the front frame 14 is also the hall computer. It can be stored in 262.

Further, since the frame opening detection circuit 260 is provided with a 0.1F capacitor CD1, the frame opening detection circuit 260 supplies power to the pachinko machine 10 and has a DC voltage of 12 volts from the DC power supply DC1. When is supplied, it operates naturally, and further, for example, when the business hours of the amusement park are over, the power supply to the pachinko machine 10 is cut off, and a DC voltage of 12 volts is supplied from the DC power supply DC1. Even if there is no such case, the opening of the inner frame 12 and the opening of the front frame 14 can be detected. Therefore, for example, even when the business hours of the amusement park are over and the power supply to the pachinko machine 10 is cut off, a pulse signal having a pulse width of about 10 ms is output from the external output terminal plate 261 to the hall computer 262. can do.

Next, the pachinko machine of the second embodiment will be described with reference to FIGS. 18 and 19. The pachinko machine of the second embodiment is obtained by changing the frame opening detection circuit 260 of the pachinko machine 10 of the first embodiment to a frame opening detection circuit 270 having a different configuration. The frame opening detection circuit 270 of the second embodiment simplifies the circuit configuration with respect to the frame opening detection circuit 260 of the first embodiment. Specifically, the frame opening detection circuit 270 of the second embodiment removes the timer IC1, the resistors R1 to R3, and the capacitors CD3 to CD5 from the frame opening detection circuit 260 of the first embodiment, and the capacitors CD1 have different capacities. The circuit configuration is simplified by changing to the capacitor CD6 and changing the connection of each component.

According to the frame opening detection circuit 270 of the second embodiment, a high signal whose output period fluctuates according to the opening period of the inner frame 12 or the front frame 14 can be output to the hall computer 262, so that the inner frame 12 can be output. Alternatively, in addition to being able to detect the opening of the front frame 14, it is also possible to detect the opening period of the inner frame 12 or the front frame 14.

FIG. 18 is a block diagram showing an electrical configuration of the frame opening detection circuit 270 of the second embodiment. In FIG. 7, the same parts as those of the frame opening detection circuit 260 of the first embodiment described above are assigned the same numbers, the description thereof will be omitted, and only the different parts will be described.

The capacitor CD6 is obtained by changing the capacitance of the capacitor CD1 used in the frame opening detection circuit 260 of the first embodiment from 0.1F (farad) to 1F (farad). The capacitor CD6 is a component that functions as a rechargeable battery like the capacitor CD1 of the frame opening detection circuit 260 of the first embodiment. One end of the capacitor CD6 is connected to the cathode of the diode D1, and the other end of the capacitor CD6 is grounded. There is.

Similar to the capacitor CD1 (see FIG. 7) described above, the capacitor CD6 is supplied with power to the pachinko machine of the second embodiment, and when a DC voltage of 12 volts is supplied from the DC power supply DC1. It is obtained by the product of the capacity 1F of the capacitor CD6 and the DC voltage applied to the capacitor CD6 (about 11.3 volts obtained by subtracting the voltage drop 0.7 volt at the diode D1 from the 12 volt supplied from the DC power supply DC1). Stores charge.

On the other hand, for example, when the business hours of the amusement park are over, the power supply to the pachinko machine of the second embodiment is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1, the capacitor CD6 is used. , A DC voltage (about 11.3 volts) based on the electric charge stored in the capacitor CD6 is supplied to the frame opening detection circuit 270 and the external output terminal plate 261.

Specifically, since the capacitor CD6 has a capacitance of 1F (farad) and the voltage applied to the capacitor CD6 is about 11.3 volts, the electric charge stored in the capacitor CD6 is the capacitance of the capacitor CD6 and that of the capacitor CD6. From the product of the applied voltages, it becomes about 11.3 C (Coulomb). The electric charge of about 11.3C stored in the capacitor CD6 is about 10 minutes in the output period of the high signal output from the external output terminal plate 261 to the hall computer 262. Therefore, for example, even when the business hours of the amusement park are closed, the power supply to the pachinko machine of the second embodiment is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1 to the outside. The frame opening detection circuit 270 can detect the opening of the inner frame 12 or the front frame 14 until the total output period of the high signal output from the output terminal plate 261 is about 10 minutes. Further, the frame opening detection circuit 270 can also detect the opening period of the inner frame 12 or the front frame 14. When the total output period of opening the inner frame 12 or opening the front frame 14 approaches about 10 minutes, the electric charge stored in the capacitor CD6 decreases, and the current value supplied from the capacitor CD6 to the photocoupler PR1 decreases. However, by increasing the detection sensitivity of the high signal of the hall computer 262 (by lowering the threshold value for the amplitude of the high signal), the hall computer 262 can store the high signal.

In this way, when the power is supplied to the pachinko machine of the second embodiment and the DC voltage of 12 volts is supplied from the DC power supply DC1, it naturally operates, and further, for example, the business hours of the amusement park. Is completed, the power supply to the pachinko machine of the second embodiment is cut off, and even when the DC voltage of 12 volts is not supplied from the DC power supply DC1, the frame opening detection circuit 270 is on the 1st floor (1F). Since the capacitor CD6 of Farad) is provided, the frame opening detection circuit 270 can detect the opening of the inner frame 12 and the opening of the front frame 14. A cathode terminal of a diode D1 is connected to one end of the capacitor CD6, and since this diode D1 functions to prevent backflow of current, direct current is applied from the capacitor CD6 to the frame opening detection circuit 270 and the external output terminal plate 261. Even when a voltage (about 11.3 volts) is supplied, the DC voltage is not applied to the DC power supply DC1 and the DC power supply DC1 is not damaged. In this embodiment, the capacitor CD6 is used as a component for supplying the DC voltage to the frame opening detection circuit 270 and the external output terminal plate 261 when the DC voltage of 12 volts is not supplied from the DC power supply DC1. .. However, the present invention is not limited to this, and the capacitor CD6 may be a secondary battery (rechargeable battery) having a larger storage capacity or a primary battery that does not need to be charged.

One end of the capacitor CD6 is connected to one end of the switch SW1 and the switch SW2, and is also connected to one end of the resistor R7 of the external output terminal plate 261. One end of the resistor R9 is connected to the other ends of the switch SW1 and the switch SW2. One end of the capacitor CD2, one end of the resistor R4, and one end of the internal resistance R5 of the transistor TR1 are connected to the other end of the resistor R9.

By this connection, one of the switch SW1 and the switch SW2 (one of the inner frame 12 or the front frame 14), or both the switch SW1 and the switch SW2 are in a conductive state (both the inner frame 12 and the front frame 14 are in an open state). Since a DC voltage is supplied to the resistor R4 during a certain period, the terminals c of the collector terminal c of the transistor TR1 and the emitter terminal e of the transistor TR1 become conductive. Then, during this period, a current is supplied to the light emitting diode on the primary side of the photocoupler PR1 via the resistor R7 of the external output terminal plate 261. As a result, one of the switch SW1 and the switch SW2 (one of the inner frame 12 and the front frame 14), or both the switch SW1 and the switch SW2 are in the conductive state (both the inner frame 12 and the front frame 14 are in the open state). ) During the period, a high signal is output from the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 to the hall computer 262. Therefore, according to the frame opening detection circuit 270 of the second embodiment, since the frame opening detection circuit 270 is provided with the capacitor CD6 on the 1st floor (Farad), the power supply to the pachinko machine of the second embodiment can be supplied. Even when the DC power supply DC1 is cut off and a DC voltage of 12 volts is not supplied, a high signal whose output period fluctuates according to the opening period of the inner frame 12 or the front frame 14 is transmitted to the external output terminal board 261. Can be output to the hall computer 262. Therefore, in addition to being able to detect the opening of the inner frame 12 or the front frame 14, it is also possible to detect the opening period of the inner frame 12 or the front frame 14. The hall computer 262 has been operated for 24 hours. Therefore, in the frame opening detection circuit 270, the high signal is output from the external output terminal plate 261 and the time when the high signal is output, that is, the opening time of the inner frame 12 and the opening time of the front frame 14 is also the hall computer. It can be stored in 262.

Further, for example, when the business hours of the amusement park are over and the power supply to the pachinko machine 10 is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1 to the frame opening detection circuit 270 and the external output terminal board 261. That is, when a DC voltage of about 11.3 volts is supplied from the capacitor CD6 to the frame open detection circuit 270 and the external output terminal plate 261, the supply period of the current supplied from the capacitor CD6 to the photocoupler PR1 is set as the inner frame. It can be kept in the period when the 12 or the front frame 14 is opened. Therefore, the power consumption due to the opening of the inner frame 12 or the front frame 14 can be suppressed to a small value.

For example, when the business hours of the amusement park are over and the power supply to the pachinko machine is cut off and the DC voltage is supplied from the capacitor CD6 to the frame opening detection circuit 270 and the external output terminal plate 261, the inner frame When the total supply period of the current from the capacitor CD6 to the photocoupler PR1 due to the opening of the 12 or the front frame 14 is lengthened, or the number of times the opening of the inner frame 12 or the front frame 14 is detected is increased, the capacitor CD6 is used. (For example, the capacity of the capacitor CD6 is 10F), or the capacitor CD6 may be changed to a secondary battery having a large storage capacity.

Next, with reference to FIG. 19, the voltage of A of the frame opening detection circuit 270 that changes according to the state of the switch SW1 (the state of the inner frame 12) and the state of the switch SW2 (the state of the front frame 14) (FIG. 19). 18) and the output of the external output terminal board 261 (input of the hall computer 262) will be described. FIG. 19 shows the state of the switch SW1 (the state of the inner frame 12), the state of the switch SW2 (the state of the front frame 14), the voltage of A of the frame opening detection circuit 270, and the output of the external output terminal plate 261 (of the hall computer 262). It is a timing chart showing the relationship of (input). It should be noted that each time from t1 o'clock to t8 o'clock shown in FIG. 19 is the same as each time from t1 o'clock to t8 o'clock shown in the timing chart of the frame opening detection circuit 260 of the first embodiment shown in FIG. is there.

As shown in FIG. 19 (a), when the switch SW1 is in the conductive state (the inner frame 12 is in the open state) at t1, the frame open detection circuit 270 is followed as shown in FIG. 19 (c). The voltage of A (see FIG. 18) switches from zero volt to about 11.3 volt (at t1). Then, as shown in FIG. 19D, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 switches from the low state to the high state (t1). Time). As a result, the output of the high signal indicating the opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

Then, as shown in FIG. 19 (a), when the switch SW1 is in the cutoff state (the inner frame 12 is in the closed state) at t2, the voltage of A of the frame open detection circuit 270 is as shown in FIG. 19 (c). Switches from about 11.3 volts to zero volts (at t2). Then, following this, as shown in FIG. 19D, the output of the external output terminal plate 261 switches from the high state to the low state (at t2).

The switching of the output of the external output terminal board 261 becomes a high signal, and the high signal is output from the external output terminal board 261 to the hall computer 262 from t1 o'clock to t2 o'clock. That is, a high signal having a pulse width of the output period from t1 to t2 is output from the external output terminal board 261 to the hall computer 262.

Next, as shown in FIG. 19 (a), when the switch SW1 is in the conductive state (the inner frame 12 is in the open state) at t3, the frame is opened as shown in FIG. 19 (c) following this. The voltage A of the detection circuit 270 (see FIG. 18) switches from zero volt to about 11.3 volt (at t3). Then, as shown in FIG. 19D, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 switches from the low state to the high state (t3). Time). As a result, the output of the high signal indicating the opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

Then, as shown in FIG. 19 (a), when the switch SW1 is in the cutoff state (the inner frame 12 is in the closed state) at t4, the voltage of A of the frame open detection circuit 270 is as shown in FIG. 19 (c). Switches from about 11.3 volts to zero volts (at t4). Then, following this, as shown in FIG. 19D, the output of the external output terminal plate 261 switches from the high state to the low state (at t4).

The switching of the output of the external output terminal board 261 becomes a high signal, and the high signal is output from the external output terminal board 261 to the hall computer 262 from t3 o'clock to t4 o'clock. That is, a high signal having a pulse width of the output period from t3 to t4 is output from the external output terminal board 261 to the hall computer 262.

Finally, a case where the switch SW2 is in the conductive state (the front frame 14 is in the open state) when the switch SW1 is in the conductive state (the inner frame 12 is in the open state) will be described. As shown in FIG. 19A, the switch SW1 is in a conductive state (inner frame 12 is in an open state) at t5, and further, as shown in FIG. 19B, the switch SW2 is in a conductive state (front surface) at t6. When the frame 14 is in the open state), as shown in FIG. 19C, the voltage A of the frame open detection circuit 270 (see FIG. 18) switches from zero volt to about 11.3 volt at t5. Then, following this, as shown in FIG. 19 (d), as shown in FIG. 19 (d), the output of the external output terminal plate 261 switches from the low state to the high state (at 5 o'clock). As a result, the output of the high signal indicating the opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

Then, as shown in FIG. 19A, the switch SW1 is in the shutoff state (inner frame 12 is in the closed state) at t7, and as shown in FIG. 19B, the switch SW2 is in the shutoff state at t8. When (the front frame 14 is in the closed state), as shown in FIG. 19C, the voltage of A of the frame opening detection circuit 270 switches from zero volt to about 11.3 volt at t8. Then, following this, as shown in FIG. 19D, the output of the external output terminal plate 261 switches from the high state to the low state (at 8 o'clock).

The switching of the output of the external output terminal board 261 becomes a high signal, and the high signal is output from the external output terminal board 261 to the hall computer 262 from t5 o'clock to t8 o'clock. That is, a high signal having a pulse width of the output period from t5 to t8 is output from the external output terminal board 261 to the hall computer 262.

In this way, when the switch SW1 and the switch SW2 are in the conductive state (the inner frame 12 and the front frame 14 are in the open state), in the frame open detection circuit 270, either the switch SW1 or the switch SW2 is in the conductive state (inner frame). External from when either 12 or the front frame 14 is in the open state until both the switch SW1 and the switch SW2 are in the cutoff state (both the inner frame 12 and the front frame 14 are in the closed state). A high signal can be output from the output terminal board 261 to the hall computer 262. Therefore, in addition to being able to detect the opening of the inner frame 12 or the front frame 14, both the inner frame 12 and the front frame 14 have been in the open state since either the inner frame 12 or the front frame 14 was opened. It is possible to detect the opening period until the is closed.

As described above, according to the pachinko machine of the second embodiment, since the frame opening detection circuit 270 is provided with the capacitor CD6 on the 1st floor (farad), the power supply to the pachinko machine of the second embodiment is cut off. Even when a DC voltage of 12 volts is not supplied from the DC power supply DC1, the frame opening detection circuit 270 provides a high signal whose output period fluctuates according to the opening period of the inner frame 12 or the front frame 14. It can be output to the hall computer 262. Then, the opening of the inner frame 12 or the front frame 14 can be detected by storing the high signal output from the external output terminal plate 261 to the hall computer 262 and the output period of the output high signal. In addition to being able to do so, the opening period of the inner frame 12 or the front frame 14 can also be detected. Further, the high signal output from the external output terminal board 261 to the hall computer 262 is stored in the hall computer 262 that continues to operate for 24 hours. Therefore, the pachinko machine in which the inner frame 12 or the front frame 14 is opened can be identified by the high signal stored in the hall computer 262. Furthermore, the hall computer 262 outputs a high signal from the external output terminal board 261 and stores the output time of the output high signal so that the opening time or the front surface of the specified pachinko machine inner frame 12 can be stored. The opening time of the frame 14 can also be detected.

Next, the pachinko machine of the third embodiment will be described with reference to FIGS. 20 and 21. The pachinko machine of the third embodiment is obtained by changing the frame opening detection circuit 260 of the pachinko machine 10 of the first embodiment to a frame opening detection circuit 280 having a different configuration. The frame opening detection circuit 280 of the third embodiment simplifies the circuit configuration with respect to the frame opening detection circuit 260 of the first embodiment. Specifically, the frame opening detection circuit 280 of the third embodiment removes the resistor R2, the capacitor CD4 and CD5 from the frame opening detection circuit 260 of the first embodiment, and removes the resistor R1, the capacitor CD3, the resistor R7, and the switch SW1. And, each connection of the switch SW2 is changed, the timer IC1 functions as a monostable multivibrator, and the integrator circuit 281 composed of the resistor 10 and the capacitor CD7 is connected to the front stage of the TRG terminal of the timer IC1 to configure the circuit. Is a simplification of. Then, the frame opening detection circuit 280 of the third embodiment outputs the mode of the voltage applied to the TRG terminal of the timer IC 1 and the OUT terminal of the timer IC 1 to the frame opening detection circuit 260 of the first embodiment. The mode of voltage is changed.

According to the frame opening detection circuit 280 of the third embodiment, the integrator circuit 281 keeps the falling period of the voltage applied to the TRG terminal of the timer IC 1 constant regardless of the opening period of the inner frame 12 or the front frame 14. By setting the period (about 2 ms), the falling period of the voltage applied to the TRG terminal of the timer IC1 is set to be larger than the period (about 10 ms) in which the voltage of about 9.6 volts is output from the OUT terminal of the timer IC1. Can be adjusted short. Therefore, regardless of the opening period of the inner frame 12 or the front frame 14, the supply period of the current supplied from the capacitor CD1 to the photocoupler PR1 is limited to about 10 ms for each opening of the inner frame 12 or the front frame 14. be able to. Therefore, the frame opening detection circuit 280 can simplify the circuit configuration as compared with the frame opening detection circuit 260, and the period during which a voltage of about 9.6 volts is output from the OUT terminal of the timer IC1 is limited to about 10 ms. Therefore, the power consumption due to the opening of the inner frame 12 or the front frame 14 can be further suppressed to be smaller than that of the frame opening detection circuit 260.

FIG. 20 is a block diagram showing an electrical configuration of the frame opening detection circuit 280 of the third embodiment. In FIG. 7, the same parts as those of the frame opening detection circuit 260 of the first embodiment described above are assigned the same numbers, the description thereof will be omitted, and only the different parts will be described.

When the power supply to the pachinko machine is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1, one end of the capacitor CD1 that supplies the DC voltage to the frame opening detection circuit 280 and the external output terminal board 261 It is connected to one end of the 100 kΩ resistor R10, and is also connected to the VDD terminal of the timer IC1, one end of the 100 KΩ resistor R1a, the RES terminal of the timer IC 1, and one end of the 1 KΩ resistor R7a.

The other end of the resistor R1a is connected to one end of the 0.1 μF capacitor CD3a, and is also connected to the DCH terminal of the timer IC1 and the TH terminal of the timer IC1. The other end of the capacitor CD3a is grounded. By connecting the capacitor CD3a and the resistor R1a, the inner frame 12 or the front frame 14 of the timer IC1 is opened, so that the switch SW1 or the switch SW2 is conducted and the voltage applied to the TRG terminal of the timer IC1 is applied. When the voltage drops to zero volt, it functions as a monostable multivibrator that raises the voltage of the OUT terminal of the timer IC1 from zero volt to about 9.6 volt for about 10 ms. The period for raising the voltage of the OUT terminal of the timer IC1 from zero volt to about 9.6 volt is about 10 ms, which is the product of the resistance value of the resistor R1a (100 kΩ) and the capacitance value of the capacitor CD3a (0.1 μF). It is determined by a certain time constant.

The resistor R10 is a resistor that stabilizes the voltage applied to the TRG terminal of the timer IC 1, and is a resistor that constitutes the integrating circuit 281 with the capacitor CD7. The other end of the resistor R10 is connected to the anode terminal of the diode D2, the cathode terminal of the diode D2 is connected to the TRG terminal of the timer IC1, and the Zener voltage limiting voltage (Zener voltage) is about 10.5 volts. It is connected to the cathode terminal of the diode D3 and one end of each of the switches SW1 and SW2 connected in parallel. Therefore, when the inner frame 12 and the front frame 14 are closed and the switch SW1 and the switch SW2 are shut off, the voltage applied to the TRG terminal of the timer IC1 is about 11.3 volts supplied from the capacitor CD1. The voltage drop at the resistor R10 is about 0.3 volt, and the voltage drop at the diode D2 is about 0.7 volt, which is subtracted from the voltage of about 10.3 volt.

The 0.02 μF capacitor CD7 is a capacitor that constitutes an integrating circuit 281 with a resistor R10 and controls the voltage applied to the TRG terminal of the timer IC1. The other ends of the switch SW1 and the switch SW2 are connected to one end of the capacitor CD7, and the other end of the capacitor CD7 is grounded. The integrating circuit 281 composed of the capacitor CD7 and the resistor R10 is applied to the TRG terminal of the timer IC1 when the switch SW1 or the switch SW2 becomes conductive due to the inner frame 12 or the front frame 14 being opened. It is a circuit that lowers the voltage of about 10.3 volt to zero volt, and returns the TRG terminal voltage of the timer IC1 to about 10.3 volt again about 2 ms after the lowering.

Specifically, when the inner frame 12 or the front frame 14 is opened and the switch SW1 or the switch SW2 is conducted according to the opening, a voltage of about 10.3 volts supplied from the capacitor CD1 is applied to the capacitor CD7. The application is started, and the charging of the capacitor CD7 is started. At the start of charging, the voltage applied to the capacitor CD7 momentarily becomes zero volt, so that the voltage applied to the TRG terminal of the timer IC 1 momentarily becomes zero volt. Then, as the capacitor CD7 is charged, the capacitor CD7 raises the voltage applied to the TRG terminal of the timer IC1 and finally controls the voltage applied to the TRG terminal of the timer IC1 to about 10.3 volts. It is.

The period until the capacitor CD7 is fully charged, that is, the voltage of about 10.3 volts applied to the TRG terminal of the timer IC1 drops to zero volt, and the voltage of the TRG terminal of the timer IC1 drops from that drop. The period of about 2 ms until the voltage returns to about 10.3 volts is determined by the time constant which is the product of the resistance value of the resistor R10 (100 kΩ) and the capacitance value of the capacitor CD7 (0.02 μF).

In this way, the voltage applied to the TRG terminal of the timer IC1 drops, and the period (about 2 ms) from the fall until the TRG terminal voltage of the timer IC1 returns to about 10.3 volts is the integrator circuit 281. Therefore, regardless of the opening period of the inner frame 12 and the front frame 14, the voltage of the OUT terminal of the timer IC1 is adjusted to a period shorter than the period (about 10 ms) in which the voltage of the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volt. By changing the resistance value of the resistor R10 and the capacitance value of the capacitor CD7, the voltage applied to the TRG terminal of the timer IC1 drops, and then the voltage of the TRG terminal of the timer IC1 drops to about 10.3 volts. The period until the voltage returns to the timer IC1 can be freely changed within about 10 ms, which is the period until the voltage of the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volt.

Here, the monostable multivibrator does not normally output a signal from the output terminal unless the input period of the signal input to the input terminal is shorter than the output period of the signal output from the output terminal (from the output terminal). The signal continues to be output). Therefore, when the timer IC1 is made to function as a monostable multivibrator without using the integrating circuit 281, the timer IC1 is longer than the period in which the voltage of the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volt. The period from zero volt to the return of the TRG terminal voltage to about 10.3 volt, that is, the opening period of the inner frame 12 and the front frame 14 (conduction period of the switch SW1 and the switch SW2) must be short. However, since it is completely unpredictable how long the opening period of the inner frame 12 and the front frame 14 will be, the inner frame 12 and the front frame 14 and the front frame 14 have a longer opening period than the period when the voltage of the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volt. In order to keep the opening period of the front frame 14 always short, it is necessary to set the period during which the voltage of the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volt with a sufficient margin. For example, if the opening period of the inner frame 12 and the front frame 14 is predicted to be from several tens of seconds to several minutes, the period during which the voltage of the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volt is sufficiently sufficient. Must be set from a few minutes to a few tens of minutes. Then, during this set period, the DC voltage is continuously supplied from the capacitor CD1 to the frame opening detection circuit 280 and the external output terminal plate 261, so that the capacitor CD1 is significantly consumed. Therefore, in order to make the timer IC1 function as a monostable multivibrator without using the integrating circuit 281 and further suppress the consumption of the electric charge stored in the capacitor CD1, a special circuit configuration is required. there were.

However, when the inner frame 12 or the front frame 14 is opened by providing the integrator circuit 281 in front of the TRG terminal of the timer IC1, the timer IC1 is opened regardless of the opening period (conduction period of the switch SW1 and the switch SW2). Adjust the period from when the voltage applied to the TRG terminal of the timer IC1 drops to about 10.3 volts until it returns to about 10.3 volts shorter than the period when the voltage of the OUT terminal of the timer IC1 rises from zero volts to about 9.6 volts. can do. In this way, the integrator circuit 281 makes the timer IC1 normal by setting the falling period of the TRG terminal voltage of the timer IC1 to a fixed period (about 2 ms) regardless of the opening period of the inner frame 12 and the front frame 14. By operating the timer IC1, the period during which the voltage of the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volt can be limited to about 10 ms.

Then, when the voltage of the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volt for about 10 ms, the collector terminal and the emitter terminal of the transistor TR1 conduct for about 10 ms, and pass through the resistor R7a. A current is supplied from the capacitor CD1 to the photocoupler PR1 for about 10 ms. As a result, a pulse signal having a pulse width of about 10 ms is output from the external output terminal plate 261 to the hall computer 262 for each opening of the inner frame 12 or the front frame 14. In this way, even if the timer IC1 functions as a monostable multivibrator, the integration circuit 281 is provided in front of the TRG terminal of the timer IC1 to suppress the consumption of the electric charge stored in the capacitor CD1 and is special. The output period of the pulse signal output from the external output terminal board 261 to the hall computer 262 can be limited to about 10 ms without adopting a simple circuit configuration.

The TRG terminal of the timer IC1 is connected to the cathode terminal of the Zener diode D3 having a limiting voltage (Zener voltage) of about 10.5 volts, and the ground is connected to the anode terminal of the Zener diode D3. In this Zener diode D3, when the inner frame 12 or the front frame 14 is opened and the switch SW1 or the switch SW2 is conducted, the electric charge stored in the capacitor CD7 and the voltage supplied from the capacitor CD1 are superimposed. This is an element that prevents an overvoltage (for example, a voltage of 12.3 volts) having a magnitude that destroys the timer IC1 from being applied to the TRG terminal of the timer IC1. Specifically, the inner frame 12 or the front frame 14 is opened, the switch SW1 or the switch SW2 is conducted, and the electric charge stored in the capacitor CD7 is returned to the inner frame 12 or the front frame within a relatively short period of time. When the next opening of 14 is performed and the switch SW1 or the switch SW2 is conducted, the electric charge is discharged from the other end side to the one end side of the switch SW1 or the switch SW2. The voltage of about 10.3 volts discharged from the capacitor CD7 and the voltage of about 10.3 volts supplied from the capacitor CD1 are superimposed, and an overvoltage of a magnitude that destroys the timer IC1 is applied to the TRG terminal of the timer IC1. Can be applied. However, since the Zener diode D3 having a limiting voltage (Zener voltage) of about 10.5 volts is connected between the TRG terminal of the timer IC1 and the ground, the voltage applied to the TRG terminal of the timer IC1 is increased. The maximum value is about 10.5 volts, and an overvoltage large enough to destroy the timer IC1 is not applied to the TRG terminal of the timer IC1. As described above, by using the Zener diode D3 having a simple structure and being inexpensive, it is possible to prevent an overvoltage of a magnitude that destroys the timer IC1 from being applied to the TRG terminal of the timer IC1 and prevent damage to the timer IC1. it can.

As described above, since the limiting depressurization (Zener voltage) of the Zener diode D3 is about 10.5 volts, the inner frame 12 and the front frame 14 are closed, and the switch SW1 and the switch SW2 are shut off. In that case, the current supplied from the capacitor CD1 does not flow to the ground via the Zener diode D3, and the electric charge of the capacitor CD1 is not consumed. Further, the cathode terminal of the diode D2 is connected to one end of the switch SW1 and the switch SW2, and since this diode D2 exerts a current backflow prevention function, the voltage of about 10.3 volts discharged from the capacitor CD7. However, it is applied to the VDD terminals of the capacitor CD1 and the timer IC1 so that they are not damaged.

As described above, in the timer IC1 of the frame opening detection circuit 280, the inner frame 12 or the front frame 14 is opened, the switch SW1 or the switch SW2 is conducted, and the voltage applied to the TRG terminal of the timer IC1 drops to zero volt. Then, for about 10 ms from this fall, it functions as a monostable multivibrator that raises the voltage of the OUT terminal of the timer IC1 from zero volt to about 9.6 volt. Then, by providing the integrating circuit 281 in front of the TRG terminal of the timer IC 1, when the inner frame 12 or the front frame 14 is opened, the timer IC 1 is operated regardless of the opening period of the inner frame 12 and the front frame 14. Adjust the period from when the voltage applied to the TRG terminal drops to about 10.3 volts until it returns to about 10.3 volts, which is shorter than the period when the voltage at the OUT terminal of the timer IC1 rises from zero volts to about 9.6 volts. Can be done. In this way, the integrator circuit 281 sets the fall period of the TRG terminal voltage of the timer IC1 to a fixed period (about 2 ms) regardless of the open period of the inner frame 12 and the front frame 14, thereby forming a monostable multivibrator. The functioning timer IC1 can be operated normally, and the period during which the voltage of the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volt can be limited to about 10 ms. As a result, the period during which the current is supplied from the capacitor CD1 to the photocoupler PR1 can be limited to about 10 ms, and the output period of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms. it can.

Further, since the frame opening detection circuit 280 is provided with a 0.1F capacitor CD1, the frame opening detection circuit 280 supplies power to the pachinko machine, and a DC voltage of 12 volts is applied from the DC power supply DC1. If it is supplied, it naturally operates, and further, for example, when the business hours of the amusement park are over and the power supply to the pachinko machine is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1. Even so, the opening of the inner frame 12 and the opening of the front frame 14 can be detected. Then, when the opening of the inner frame 12 or the opening of the front frame 14 is detected by the frame opening detection circuit 280, a pulse signal having a pulse width of about 10 ms is transmitted from the external output terminal plate 261 to the hall computer 262 for each detection. Can be output. The pulse signal output from the external output terminal plate 261 to the hall computer 262 is stored in the hall computer 262 that continues to operate for 24 hours. Therefore, the pachinko machine in which the inner frame 12 or the front frame 14 is opened can be identified by the pulse signal stored in the hall computer 262. Further, by storing the pulse signal output from the external output terminal plate 261 to the hall computer 262 and the output time of the output pulse signal, the opening time or the front surface of the specified pachinko machine inner frame 12 is stored. The opening time of the frame 14 can be detected.

In the door opening detection circuit 280, an LMC555 is used for the timer IC1 to detect the opening of the inner frame 12 or the opening of the front frame 14, and realize a circuit in which the photocoupler PR1 is energized for about 10 ms. It is not limited. That is, by using another integrated circuit or the like for the timer IC 1, a circuit that generates one pulse signal for one opening of the inner frame 12 or one opening of the front frame 14 is realized. The photocoupler PR1 may be energized for a predetermined period based on the pulse signal.

Further, for example, when the business hours of the amusement park are over and the power supply to the pachinko machine is cut off and the DC voltage is supplied from the capacitor CD1 to the frame opening detection circuit 280 and the external output terminal plate 261, the inner frame When the total supply period of the current from the capacitor CD1 to the photocoupler PR1 due to the opening of the 12 or the front frame 14 is lengthened, or the number of times the opening of the inner frame 12 or the front frame 14 is detected is increased, the capacitor CD1 (For example, the capacity of the capacitor CD1 is 1F), or the capacitor CD1 may be changed to a secondary battery having a large storage capacity.

Next, referring to FIG. 21, the TRG terminal voltage of the timer IC1 that changes according to the state of the switch SW1 (the state of the inner frame 12) and the state of the switch SW2 (the state of the front frame 14), and the timer IC1 The relationship between the OUT terminal voltage and the output of the external output terminal plate 261 (input of the hall computer 262) will be described. FIG. 21 shows the state of the switch SW1 (the state of the inner frame 12), the state of the switch SW2 (the state of the front frame 14), the TRG terminal voltage of the timer IC1, the OUT terminal voltage of the timer IC1, and the output of the external output terminal plate 261 (the state of the external output terminal plate 261). It is a timing chart which showed the relationship (input of a hall computer 262). It should be noted that each time from t1 o'clock to t8 o'clock shown in FIG. 21 is the same as each time from t1 o'clock to t8 o'clock shown in the timing chart of the frame opening detection circuit 260 of the first embodiment shown in FIG. is there.

As shown in FIG. 21A, when the switch SW1 becomes conductive (the inner frame 12 is in the open state) at t1, charging of the capacitor CD7 is started, and as shown in FIG. 21C, the timer IC1 The TRG terminal voltage drops from about 10.3 volts to zero volts (at t1). Then, following this, as shown in FIG. 21D, the OUT terminal voltage of the timer IC1 rises from zero volt to about 9.6 volt (at t1). As a result, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are conducted, and the current supply is started to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 20). (At t1). Then, as shown in FIG. 21 (e), the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from the low state to the high state at t1. It will change. As a result, the output of the pulse signal indicating the opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

Next, as shown in FIG. 21 (c), when about 2 ms elapses from t1 o'clock, the charging of the capacitor CD7 is completed, and the TRG terminal voltage of the timer IC1 returns from zero volt to about 10.3 volt again. However, since about 10 ms has not passed since the voltage of the OUT terminal of the timer IC1 rose from zero volt to about 9.6 volt (from t1 o'clock), the OUT terminal voltage of the timer IC1 is about 9.6 volt. Maintaining the state.

Then, when about 10 ms elapses from t1 o'clock, the timer IC1 switches the voltage of the OUT terminal from about 9.6 volts to zero volts, as shown in FIG. 21 (d). Then, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are cut off, and the current supply to one end of the resistor R7a of the external output terminal plate 261 is stopped. Therefore, the output of the external output terminal plate 261 switches from the high state to the low state after about 10 ms has elapsed from t1 o'clock, as shown in FIG. 21 (e). As a result, the output of the pulse signal output to the hall computer 262 is stopped. By switching the output of the external output terminal plate 261 in this way, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

As shown in FIG. 21A, when the switch SW1 is in the cutoff state (the inner frame 12 is in the closed state) at t2, the frame opening detection circuit 280 again detects the inner frame 12 and the front frame 14. It is set to the possible state.

Next, as shown in FIG. 21 (b), when the switch SW2 becomes conductive (the front frame 14 is in the open state) at t3, charging of the capacitor CD7 is started, and as shown in FIG. 21 (c), charging is started. The TRG terminal voltage of the timer IC1 drops from about 10.3 volts to zero volts (at t3). Then, following this, as shown in FIG. 21D, the OUT terminal voltage of the timer IC1 rises from zero volt to about 9.6 volt (at t3). As a result, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are conducted, and the current supply is started to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 20). (T3 o'clock). Then, as shown in FIG. 21 (e), the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from the low state to the high state at t3. It changes. As a result, the output of the pulse signal indicating the opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

The electric charge stored in the capacitor CD7 between t1 and t2 is instantaneously completed to be discharged via the Zener diode D3 at t3. The discharge period of the capacitor CD7 is a period much smaller than about 2 ms, when the voltage of the TRG terminal of the timer IC1 changes from about 10.3 volts to zero volts and becomes about 10.3 volts again, so that the TRG of the timer IC1 It does not significantly affect the voltage applied to the terminals. Further, in addition to this discharge, the electric charge stored in the capacitor CD7 from t1 to t2 is also discharged by the self-discharge of the capacitor CD7.

Further, at t3, a voltage of about 10.3 volts supplied from the capacitor CD1 and a voltage of about 10.3 volts associated with the electric charge stored in the capacitor CD7 are superimposed on the TRG terminal of the timer IC1. An overvoltage large enough to destroy the timer IC1 can be applied. However, since the Zener diode D3 having a limiting voltage (Zener voltage) of about 10.5 volts is connected to the front stage of the TRG terminal of the timer IC1, the maximum value of the voltage applied to the TRG terminal of the timer IC1 is An overvoltage of about 10.5 volts, which is large enough to destroy the timer IC1, is not applied to the TRG terminal of the timer IC1.

Next, as shown in FIG. 21 (c), when about 2 ms elapses from t3, the charging of the capacitor CD7 is completed, and the TRG terminal voltage of the timer IC1 returns from zero volt to about 10.3 volt again. However, since about 10 ms has not passed since the voltage of the OUT terminal of the timer IC1 rose from zero volt to about 9.6 volt (from t3 o'clock), the OUT terminal voltage of the timer IC1 is about 9.6 volt. Maintaining the state.

Then, about 10 ms after t3, the timer IC1 switches the voltage of the OUT terminal from about 9.6 volts to zero volts, as shown in FIG. 21 (d). Then, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are cut off, and the current supply to one end of the resistor R7a of the external output terminal plate 261 is stopped. Therefore, the output of the external output terminal plate 261 switches from the high state to the low state as shown in FIG. 21 (e) when about 10 ms elapses from t3 o'clock. As a result, the output of the pulse signal output to the hall computer 262 is stopped. By switching the output of the external output terminal plate 261 in this way, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

As shown in FIG. 21B, when the switch SW2 is shut off (the front frame 14 is closed) at t4, the frame opening detection circuit 280 again detects the inner frame 12 and the front frame 14. It is set to the possible state.

Finally, a case where the switch SW2 is in the conductive state (the front frame 14 is in the open state) when the switch SW1 is in the conductive state (the inner frame 12 is in the open state) will be described. As shown in FIG. 21 (a), the switch SW1 is in a conductive state (inner frame 12 is in an open state) at t5, and further, as shown in FIG. 21 (b), the switch SW2 is in a conductive state (front surface) at t6. When the frame 14 is in the open state), charging of the capacitor CD7 is started at t5, and as shown in FIG. 21 (c), the TRG terminal voltage of the timer IC1 drops from about 10.3 volts to zero volts (t5). Time). Then, following this, as shown in FIG. 21D, the OUT terminal voltage of the timer IC1 rises from zero volt to about 9.6 volt (at t5). As a result, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are conducted, and the current supply is started to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 20). (T5 o'clock). Then, as shown in FIG. 21 (e), the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from the low state to the high state at t5. It changes. As a result, the output of the pulse signal indicating the opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

The electric charge stored in the capacitor CD7 between t3 and t4 is instantaneously completed to be discharged via the Zener diode D3 at t5, which significantly affects the voltage applied to the TRG terminal of the timer IC1. is not it. Further, in addition to this discharge, the electric charge stored in the capacitor CD7 from t3 to t4 is also discharged by the self-discharge of the capacitor CD7.

Further, at t5, a voltage of about 10.3 volts supplied from the capacitor CD1 and a voltage of about 10.3 volts associated with the electric charge stored in the capacitor CD7 are superimposed on the TRG terminal of the timer IC1. An overvoltage large enough to destroy the timer IC1 can be applied. However, since the maximum value of the voltage applied to the TRG terminal of the timer IC1 by the Zener diode D3 is about 10.5 volts, an overvoltage large enough to destroy the timer IC1 is applied to the TRG terminal of the timer IC1. There is no.

Next, as shown in FIG. 21 (c), when about 2 ms elapses from t5, the charging of the capacitor CD7 is completed, and the TRG terminal voltage of the timer IC1 returns from zero volt to about 10.3 volt again. However, since about 10 ms has not passed since the voltage of the OUT terminal of the timer IC1 rose from zero volt to about 9.6 volt (from t5 o'clock), the OUT terminal voltage of the timer IC1 is about 9.6 volt. Maintaining the state.

Then, about 10 ms after t5, as shown in FIG. 21 (d), the timer IC1 switches the voltage of the OUT terminal from about 9.6 volts to zero volts. Then, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are cut off, and the current supply to one end of the resistor R7a of the external output terminal plate 261 is stopped. Therefore, the output of the external output terminal plate 261 switches from the high state to the low state as shown in FIG. 21 (e) when about 10 ms elapses from t5 o'clock. As a result, the output of the pulse signal output to the hall computer 262 is stopped. By switching the output of the external output terminal plate 261 in this way, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

As shown in FIG. 21A, the switch SW1 is in the shutoff state (inner frame 12 is in the closed state) at t7, and the switch SW2 is in the shutoff state at t8 as shown in FIG. 21B. When (the front frame 14 is in the closed state), the frame opening detection circuit 280 is set to a state in which the inner frame 12 and the front frame 14 can be detected again.

In this way, when the switch SW1 is in the conductive state (the inner frame 12 is in the open state), even if the switch SW2 is in the conductive state (the front frame 14 is in the open state), the timer IC1 keeps the continuity period of the switch SW1. Regardless of the (opening period of the inner frame 12) and the conduction period of the switch SW2 (opening period of the front frame 14), either the switch SW1 or the switch SW2 is in a conductive state (either the inner frame 12 or the front frame 14). Is in the open state), and when about 10 ms elapses after the TRG terminal voltage of the timer IC1 drops from about 10.3 volts to zero volts, the voltage of the OUT terminal of the timer IC1 is switched from about 9.6 volts to zero volts. As a result, the supply period of the current supplied to the photocoupler PR1 of the external output terminal plate 261 becomes about 10 ms.

Therefore, for example, when the business hours of the amusement park are over and the power supply to the pachinko machine is cut off, and the DC power supply DC1 to the DC voltage of 12 volts is not supplied to the frame opening detection circuit 280 and the external output terminal board 261. When a DC voltage of about 10.3 volts is supplied from the capacitor CD1 to the frame open detection circuit 280 and the external output terminal plate 261, the supply period of the current supplied from the capacitor CD1 to the photocoupler PR1 is set to the inner frame 12 Alternatively, it can be limited to about 10 ms per opening of the front frame 14. Therefore, the power consumption due to the opening of the inner frame 12 or the front frame 14 can be suppressed to a small value.

Here, since the capacitor CD1 has a capacitance of 0.1 F and the voltage applied to the capacitor CD1 is about 11.3 volts, the electric charge stored in the capacitor CD1 is the capacitance of the capacitor CD1 and the applied voltage of the capacitor CD1. From the product of, it becomes about 1.13C (coulomb). The electric charge of about 1.13C stored in the capacitor CD1 corresponds to about 500 times of current supply when the current supply period from the capacitor CD1 to the photocoupler PR1 is about 10 ms. To do. Therefore, for example, when the business hours of the amusement park are over, the power supply to the pachinko machine is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1, the inner frame 12 is opened (the continuity of the switch SW1). ) Or the front frame 14 is opened (conduction of the switch SW2) many times, the frame opening detection circuit 280 opens the inner frame 12 or the front frame 14 (conduction of the switch SW1 or the switch). (Conduction of SW2) can be reliably detected up to about 500 times each time, and a pulse signal can be output from the external output terminal board 261 to the hall computer 262. At this time, when the inner frame 12 is opened or the front frame 14 is opened about 500 times, the electric charge stored in the capacitor CD1 decreases, and the current value supplied from the capacitor CD1 to the photocoupler PR1 decreases, but the hole By increasing the detection sensitivity of the pulse signal of the computer 262 (by lowering the threshold value for the amplitude of the pulse signal), the hall computer 262 can store the pulse signal.

As described above, according to the pachinko machine of the third embodiment, when the inner frame 12 or the front frame 14 is in the open state and the switch SW1 or the switch SW2 is in the conductive state, the integrator circuit 281 causes the inner frame. Regardless of the opening period of 12 or the front frame 14, the falling period of the voltage applied to the TRG terminal of the timer IC 1 is set to a fixed period (about 2 ms). Then, the timer IC1 functioning as a monostable multivibrator operates normally, and the voltage of the OUT terminal of the timer IC1 is reduced from zero volt until about 10 ms elapses after the TRG terminal voltage of the timer IC1 drops to zero volt. Start up to 9.6 volts. As a result, a current is supplied to the light emitting diode on the primary side of the photocoupler PR1 provided on the external output terminal plate 261 via the resistor R7a, and the light emitting diode emits light for about 10 ms. Then, when the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 receives the light of the light emitting diode, the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 receives the light of about 10 ms in pulse width. Converts into a pulse signal (electrical signal) of about 10 ms, and outputs the pulse signal to the hall computer 262. The output pulse signal is stored in the hall computer 262. Therefore, by using the frame opening detection circuit 280 provided with the integrating circuit 281 and the external output terminal plate 261, it is possible to make the hall computer 262 remember that the inner frame 12 has been opened or the front frame 14 has been opened. it can. The hall computer 262 has been operated for 24 hours. Therefore, in the frame opening detection circuit 280, the pulse signal is output from the external output terminal plate 261 and the time when the pulse signal is output, that is, the opening time of the inner frame 12 and the opening time of the front frame 14 is also the hall computer. It can be stored in 262.

Further, since the frame opening detection circuit 280 is provided with a 0.1F capacitor CD1, the frame opening detection circuit 280 supplies power to the pachinko machine, and a DC voltage of 12 volts is applied from the DC power supply DC1. If it is supplied, it naturally operates, and further, for example, when the business hours of the amusement park are over and the power supply to the pachinko machine is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1. Even so, the opening of the inner frame 12 and the opening of the front frame 14 can be detected. Therefore, for example, even when the business hours of the amusement park are over and the power supply to the pachinko machine is cut off, a pulse signal having a pulse width of about 10 ms is output from the external output terminal plate 261 to the hall computer 262. be able to.

In the present embodiment, when the inner frame 12 or the front frame 14 is open and the switch SW1 or the switch SW2 is electrically connected, a pulse signal is output from the external output terminal plate 261 to the hall computer 262. It is not limited to this. That is, when the connection of each component of the main frame opening detection circuit 280 is changed, the inner frame 12 or the front frame 14 is opened, and the opened inner frame 12 or the front frame 14 is closed, the photocoupler PR1 is connected. A current may be supplied for about 10 ms to output a pulse signal from the external output terminal board 261 to the hall computer 262.

However, in the frame opening detection circuit 280 of the present embodiment, when the inner frame 12 or the front frame 14 is opened and the switch SW1 or the switch SW2 is electrically connected, a pulse signal is transmitted from the external output terminal plate 261 to the hall computer 262. Is configured to output, so that the opening of the inner frame 12 or the front frame 14 can be quickly detected. Therefore, it is possible to detect the opening of the inner frame 12 or the front frame 14 before the inner frame 12 or the front frame 14 is opened and the main control device 110 or the game board 13 is cheated. Therefore, it is possible to prevent abnormal operation due to fraudulent acts that occur when power is being supplied to the pachinko machine.

Further, when it is desired to separately store in the hall computer 262 which of the inner frame 12 and the front frame 14 is opened, the following configuration may be used. First, the frame opening detection circuit 280 and the external output terminal plate 261 used in the present embodiment are newly provided one by one, the switch SW2 connected in parallel to the switch SW1 is disconnected, and the disconnected switch SW2 is newly provided. It may be connected to the provided frame opening detection circuit 280. Specifically, one end of the disconnected switch SW2 is connected to the cathode terminal of the diode D2 of the newly provided frame opening detection circuit 280, the cathode terminal of the diode D3, and the TRG terminal of the timer IC1, and the disconnected switch SW2 is connected. The other end may be connected to one end of the capacitor CD7 of the newly provided frame opening detection circuit 280. In this way, the frame opening detection circuit 280 and the external output terminal plate 261 are newly provided, and only the switch SW2 is connected to the newly provided frame opening detection circuit 280, and the switch is connected to the existing frame opening detection circuit 280. By connecting only SW1, when there is continuity of the switch SW1 (opening of the inner frame 12), the pulse signal output from the existing external output terminal plate 261 and the continuity of the switch SW2 (opening of the front frame 14). ), The pulse signal output from the newly provided external output terminal plate 261 can be output to the hall computer 262 separately. Here, the hall computer 262 has an input terminal for a pulse signal output from the existing external output terminal plate 261 (for detecting continuity of the switch SW1 (for detecting the opening of the inner frame 12)) and a newly provided external output terminal. Separate from the input terminal of the pulse signal output from the plate 261 (for detecting the continuity of the switch SW2 (for detecting the opening of the front frame 14)). With this configuration, the continuity of the switch SW1 (opening of the inner frame 12) and the continuity of the switch SW2 (opening of the front frame 14) can be distinguished and stored in the hall computer 262. Therefore, depending on the pulse signal stored in the hall computer 262, there was continuity of the switch SW1 (opening of the inner frame 12), conduction of the switch SW2 (opening of the front frame 14), or both. Can be detected accurately.

Further, when power is being supplied to the pachinko machine, which of the inner frame 12 and the front frame 14 is opened is separately stored in the hall computer 262, and which of the inner frame 12 and the front frame 14 is opened. If you want to use a pachinko machine to notify you when the machine is open, you can use the following configuration. First, the frame opening detection circuit 280 and the external output terminal plate 261 used in the present embodiment are newly provided one by one, the switch SW2 connected in parallel to the switch SW1 is disconnected, and the disconnected switch SW2 is newly provided. It is connected to the provided frame opening detection circuit 280. Next, the male switches SW1b and SW2b and the female switches SW1a and SW2a are newly provided on the switch SW1 and the switch SW2, respectively. Then, when the inner frame 12 or the front frame 14 is opened and the switch SW1 or the switch SW2 becomes conductive by using the newly provided male switches SW1b and SW2b and the female switches SW1a and SW2a, a signal is sent to the MPU 201. It may be configured to be input.

Specifically, one end of the disconnected switch SW2 is connected to the cathode terminal of the diode D2 of the newly provided frame opening detection circuit 280, the cathode terminal of the diode D3, and the TRG terminal of the timer IC1, and the disconnected switch SW2 is connected. The other end may be connected to one end of the capacitor CD7 of the newly provided frame opening detection circuit 280. In this way, the frame opening detection circuit 280 and the external output terminal plate 261 are newly provided, and only the switch SW2 is connected to the newly provided frame opening detection circuit 280, and the switch is connected to the existing frame opening detection circuit 280. By connecting only SW1, when there is continuity of the switch SW1 (opening of the inner frame 12), the pulse signal output from the existing external output terminal plate 261 and the continuity of the switch SW2 (opening of the front frame 14). ), The pulse signal output from the newly provided external output terminal plate 261 can be output to the hall computer 262 separately.

Next, the male switch SW1b and the male switch SW2b are further provided on the switch SW1 and the switch SW2, respectively, and the male switch SW1b and the male switch SW2b arranged on the switch SW1 and the switch SW2 are provided with two male switches SW1b and two male switches SW2b, respectively. To do. Correspondingly, the switch SW1 and the switch SW2 are further provided with the female switch SW1a and the female switch SW2a, respectively, and the female switch SW1a and the female switch SW2a arranged on the switch SW1 and the switch SW2 are provided with 2 respectively. Make them one by one. As a result, one new combination of the male switch SW1b and the female switch SW1a is added to the switch SW1. Further, as in the case of the switch SW1, a new combination of the male switch SW2b and the female switch SW2a is added to the switch SW2. Then, one end of the pair of terminals pair SW1c built in the newly added female switch SW1a is connected to the DC power supply DC1 of the existing frame opening detection circuit 280, and built in the newly added female switch SW1a. The other end of the pair of terminals and SW1c is connected to the input / output port 205 of the MPU 201. Similarly, one end of the pair of terminals vs. SW2c built into the newly added female switch SW2a is connected to the DC power supply DC1 of the newly provided frame opening detection circuit 280, and the newly added female type is used. The other end of the pair of terminal pairs SW2c built in the switch SW2a is connected to the input / output port 205 of the MPU 201, and is connected to a port different from the other end of the terminal pair SW1c. Further, the MPU 201 detects a 12-volt voltage (signal) or an opening of the inner frame 14 when the inner frame 12 or the front frame 14 is opened and the switch SW1 or the switch SW2 conducts to detect the opening of the inner frame 12. When a voltage (signal) of 12 volts is input to the input / output port 205, a command indicating that the opening of the inner frame 12 or the front frame 14 is detected is transmitted to the voice lamp control device 113 and the display control device 114. To do. At this time, the commands transmitted from the MPU 201 are a command when the opening of the inner frame 12 is detected (hereinafter, referred to as an "inner frame command") and a command when the front frame 14 is opened (hereinafter, "" It is separated from the "front frame command"). Then, the voice lamp control device 113 that has received each of these commands notifies different modes depending on whether the inner frame command is received or the front frame command is received. For example, the voice output device 226 emits a different warning sound, or the lamp display device 227 is lit differently. Further, the display control device 114 that has received each of these commands displays different modes depending on whether the inner frame command is received or the front frame command is received. For example, when the display control device 114 receives the inner frame command, the third symbol display device 81 displays "the inner frame is open", or when the display control device 114 receives the front frame command. The third symbol display device 81 may be configured to display "the front frame is open".

In this way, one new combination of the male switch SW1b and the female switch SW1a is added to the switch SW1, and the switch SW2 is also newly combined with the male switch SW2b and the female switch SW2a in the same manner as the switch SW1. When the switch SW1 is conducted (when the inner frame 12 is opened), the MPU 201 issues an inner frame command to the voice lamp control device 113 and the display control device 114 by using them. Configure to send. Further, when the switch SW2 is electrically connected (when the front frame 14 is opened), the MPU 201 is configured to transmit a front frame command to the voice lamp control device 113 and the display control device 114. With this configuration, the voice lamp control device 113 and the display control device 114 can be used to perform notification in different modes depending on whether the inner frame 12 is opened or the front frame 14 is opened. Can be done. As a result, using a pachinko machine, it is possible to accurately determine whether the switch SW1 is conducting (opening the inner frame 12), the switch SW2 is conducting (opening the front frame 14), or both. Can be detected.

Further, a frame opening detection circuit 280 and an external output terminal plate 261 are newly provided, and only the switch SW2 is connected to the newly provided frame opening detection circuit 280, and the switch SW1 is connected to the existing frame opening detection circuit 280. When there is continuity of the switch SW1 (opening of the inner frame 12) by connecting only, the pulse signal output from the existing external output terminal plate 261 and the continuity of the switch SW2 (opening of the front frame 14). If there is, the pulse signal output from the newly provided external output terminal plate 261 can be output to the hall computer 262 separately. Therefore, depending on the pulse signal stored in the hall computer 262, there was continuity of the switch SW1 (opening of the inner frame 12), conduction of the switch SW2 (opening of the front frame 14), or both. Can be detected accurately.

In the present embodiment, the pulse signal output from the external output terminal plate 261 is output to the hall computer 262, which is installed at a different location from the pachinko machine, but the present invention is not limited to this. A dedicated storage device having the function of the hall computer 262 may be provided for each pachinko machine, and the dedicated storage device may be arranged on the back side of each pachinko machine provided with the main control device 110 or the like. In this case, better, a dedicated storage device such as the main control device 110, the payout control device 111, and the launch control device 112 is housed in the board box, and the box base and the box cover provided in the board box. And are connected by a sealing unit (not shown) so that they cannot be opened (connection by a caulking structure). Then, a sealing sticker (not shown) is attached to the connecting portion between the box base and the box cover over the box cover and the box base.

Although the present invention has been described above based on one embodiment, the present invention is not limited to the above-described embodiment, and it is easy that various modifications and improvements can be made without departing from the spirit of the present invention. It can be inferred from.

For example, in each of the above embodiments, each command is transmitted from the main control device 110 to the voice lamp control device 113, and the voice lamp control device 113 gives a display instruction to the display control device 114. However, the command may be directly transmitted from the main control device 110 to the display control device 114. Further, the voice lamp control device may be connected to the display control device, and a command for instructing the output of each voice and the lighting of the lamp may be transmitted from the display control device to the voice lamp control device. Further, the voice lamp control device and the display control device may be configured as one control device.

Further, in the above embodiment, the winning of the first ball opening 64 and the passage of the second ball opening 67 are each held up to 4 times, but the maximum number of times of holding is 4 times. The number of times is not limited, and may be set to 3 times or less, or 5 times or more (for example, 8 times). Further, the number of times the variable display is held based on the winning of the first ball opening 64 is different by the number of times the variable display is held even in a part of the third symbol display device 81, or the area divided into four is changed by the number of times of holding. It may be displayed in an aspect (for example, a color or a lighting pattern), and a light emitting member such as a lamp is provided separately from the first symbol display device 37, and the light emitting member is configured to notify the number of hold times. You may.

Further, as shown in the above embodiment, the variable display, which is a kind of dynamic display, is not limited to the one in which the symbol as the identification information is scrolled vertically on the display screen of the third symbol display device 81. The design may be moved and displayed along a predetermined path such as a horizontal direction or an L-shape. Further, the dynamic display of the identification information is not limited to the variable display of the symbol, for example, one or a plurality of characters are displayed together with the symbol or in a wide variety of motion display or change display separately from the symbol. It also includes the effect display. In this case, one or more characters are used as the third symbol.

The present invention may be implemented in a pachinko machine or the like of a type different from the above-described embodiment. For example, it may be carried out on a so-called second-class pachinko gaming machine having a winning device having a special area such as a V zone. Further, in addition to the pachinko machine, it may be implemented as another game machine such as an arepachi or a sparrow ball.

The present invention may be implemented in a pachinko machine or the like of a type different from the above-described embodiment. For example, once a jackpot is hit, a pachinko machine (commonly known as a two-time right item, a three-time right item) that raises the expected value of the jackpot until multiple times (for example, two or three times) a big hit state occurs including that. It may be carried out as). Further, after the jackpot symbol is displayed, it may be implemented as a pachinko machine that generates a special game that gives a player a predetermined game value on the condition that a ball is won in a predetermined area. Further, it may be carried out on a pachinko machine that has a winning device having a special area such as a V zone and is in a special gaming state on the condition that a ball is won in the special area. Further, in addition to the pachinko machine, it may be implemented as various game machines such as a pachinko machine, a sparrow ball, a slot machine, a so-called pachinko machine and a slot machine.

In the slot machine, for example, the symbol is changed by operating the operation lever in a state where a coin is inserted to determine the symbol effective line, and the symbol is stopped and confirmed by operating the stop button. It is a thing. Therefore, the basic concept of the slot machine is "provided with a display device for displaying the identification information in a variable manner after displaying the identification information string composed of a plurality of identification information in a variable manner, and the operation of the starting operation means (for example, the operation lever) is caused. The variable display of the identification information is started, and the variable display of the identification information is stopped and confirmed and displayed due to the operation of the stop operation means (for example, the stop button) or after a predetermined time has elapsed, and the stop is stopped. It becomes a "slot machine that generates a special game that gives a player a predetermined game value on the condition that the combination of time identification information is specific". In this case, the game medium is represented by coins, medals, etc. Take as an example.

Further, as a specific example of a gaming machine in which a pachinko machine and a slot machine are fused, a display device for variably displaying a symbol sequence consisting of a plurality of symbols and then confirming the symbol is provided, and a handle for launching a ball is provided. Some are not. In this case, after a predetermined amount of balls are thrown in based on a predetermined operation (button operation), the symbol variation is started due to, for example, the operation of the operation lever, and for example, due to the operation of the stop button or a predetermined amount. As time elapses, the fluctuation of the symbol is stopped, and a special game is generated that gives the player a predetermined game value on the condition that the confirmed symbol at the time of the stop is a so-called jackpot symbol, and the player is given a predetermined game value. Is for paying out a large amount of balls to the lower saucer.

The gaming machine and modified examples of the present invention are shown below. In a gaming machine provided with a main body, a door body that opens and closes the front surface of the main body, and a control means provided in a space formed by the door body and the main body to control a game, the door to the main body is provided. The door opening detecting means for detecting the opening of the body and the output means for outputting the detection result to the specific device when the opening of the door body is detected by the door opening detecting means are provided. The gaming machine 1 is characterized in that when the power of the gaming machine is turned off and the control means is stopped, the detection result by the door opening detecting means can be output to the specific device.

According to the gaming machine 1, even when the power of the gaming machine is turned off and the control means is stopped, when the opening of the door body is detected by the door opening detecting means, the detection result is specified by the output means. Output to the device. Therefore, for example, even if the door body is opened due to an illegal act by someone after the store is closed with all the gaming machines turned off, the game machine with the opened door body can be determined by the specific device.

The space formed by the door body and the main body indicates the back surface or the back surface side of the door body that cannot be touched when the door body is closed. Further, the detection result output from the output means provided for each of the plurality of gaming machines may be received by one specific device, or a specific device is provided for each gaming machine and the specific device is distributed to each gaming machine. You may set it. When the specific device is arranged in each gaming machine, the box base and the box cover covering the opening of the box base are connected to each other and specified in the space formed by the box cover and the box base. Store the device. Then, the box cover and the box base are connected by the sealing unit so as not to be opened. Further, a sealing sticker is attached to the connecting portion between the box cover and the box base over the box cover and the box base. On top of that, the specific device may be arranged on the back surface or the back surface side of the door body.

In a gaming machine provided with a main body, a door body that opens and closes the front surface of the main body, and a control means provided in a space formed by the door body and the main body to control a game, the door to the main body is provided. A door opening detecting means for detecting the opening of the body, an output means for outputting the detection result to a specific device when the opening of the door body is detected by the door opening detecting means, and one time by the output means. A game characterized by comprising an output period limiting means for keeping an output period within a predetermined period, and an off-time operating means for operating the output period limiting means and the output means while the power of the gaming machine is off. Machine 2.

According to the gaming machine 2, when the door opening detecting means detects the opening of the door body, the detection result is output to the specific device by the output means. Since the output means operates by receiving power supply from the operating means during the off while the power of the gaming machine is off, if the door opening detecting means detects the opening of the door body even when the power of the gaming machine is off. , The detection result can be output to a specific device. Therefore, for example, even if the door body is opened due to an illegal act by someone after the store is closed with all the gaming machines turned off, the game machine with the opened door body can be determined by the specific device.

Moreover, one output period by the output means is kept within a predetermined period by the output period limiting means. Like the output means, the output period limiting means also operates by receiving power supply from the operating means during the off while the power of the gaming machine is turned off, so that the operating period of the output means by opening the door once is within a predetermined period. It is possible to suppress the consumption of the operating means during the off while the power of the gaming machine is off. Therefore, the number of times that the output means can be operated can be increased, and the number of times that the opening of the door body can be detected can be increased.

In a gaming machine provided with a main body, a door body that opens and closes the front surface of the main body, and a control means provided in a space formed by the door body and the main body to control a game, the door to the main body is provided. A door opening detecting means for detecting the opening of the body, an output means for outputting the detection result to a specific device when the opening of the door body is detected by the door opening detecting means, and one time by the output means. The output means is provided with an output period limiting means for keeping the output period within a predetermined period, an off-time operating means for operating the output period limiting means and the output means while the power of the gaming machine is off, and the output means is the output. The detection result is output to the specific device based on the output from the period limiting means, and the output period limiting means is said to be said during the predetermined period when the opening of the door body is detected by the door opening detecting means. A gaming machine 3 characterized by outputting to an output means.

According to the gaming machine 3, when the door opening detecting means detects the opening of the door body, the detection result is output to the specific device by the output means. Since the output means operates by receiving power supply from the operating means during the off while the power of the gaming machine is off, if the door opening detecting means detects the opening of the door body even when the power of the gaming machine is off. , The detection result can be output to a specific device. Therefore, for example, even if the door body is opened due to an illegal act by someone after the store is closed with all the gaming machines turned off, the game machine with the opened door body can be determined by the specific device.

Moreover, one output period by the output means is kept within a predetermined period by the output period limiting means. Like the output means, the output period limiting means also operates by receiving power supply from the operating means during the off while the power of the gaming machine is turned off, so that the operating period of the output means by opening the door once is within a predetermined period. It is possible to suppress the consumption of the operating means during the off while the power of the gaming machine is off. Therefore, the number of times that the output means can be operated can be increased, and the number of times that the opening of the door body can be detected can be increased.

Further, the output means for outputting the detection result to the specific device based on the output from the output period limiting means is provided by the output period limiting means during a predetermined period when the opening of the door body is detected by the door opening detecting means. Output is done. Therefore, the output operation to the output means by the output period limiting means can be stopped within a predetermined period for each opening of the door body. Therefore, it is possible to suppress the consumption of the operating means while the gaming machine is turned off, and to increase the number of times the output means can be operated to increase the number of times that the opening of the door body can be detected.

In a gaming machine provided with a main body, a door body that opens and closes the front surface of the main body, and a control means provided in a space formed by the door body and the main body to control a game, the door to the main body is provided. A door opening detecting means for detecting the opening of the body, an output means for outputting the detection result to a specific device when the opening of the door body is detected by the door opening detecting means, and one time by the output means. The output means is provided with an output period limiting means for keeping the output period within a predetermined period, an off-time operating means for operating the output period limiting means and the output means while the power of the gaming machine is off, and the output means is the output. The detection result is output to the specific device based on the output from the period limiting means, and the output period limiting means outputs to the output means when the opening of the door body is not detected by the door opening detecting means. 4. A gaming machine characterized by stopping the door 4.

According to the gaming machine 4, when the door opening detecting means detects the opening of the door body, the detection result is output to the specific device by the output means. Since the output means operates by receiving power supply from the operating means during the off while the power of the gaming machine is off, if the door opening detecting means detects the opening of the door body even when the power of the gaming machine is off. , The detection result can be output to a specific device. Therefore, for example, even if the door body is opened due to an illegal act by someone after the store is closed with all the gaming machines turned off, the game machine with the opened door body can be determined by the specific device.

Moreover, one output period by the output means is kept within a predetermined period by the output period limiting means. Like the output means, the output period limiting means also operates by receiving power supply from the operating means during the off while the power of the gaming machine is turned off, so that the operating period of the output means by opening the door once is within a predetermined period. It is possible to suppress the consumption of the operating means during the off while the power of the gaming machine is off. Therefore, the number of times that the output means can be operated can be increased, and the number of times that the opening of the door body can be detected can be increased.

Further, the output of the output period limiting means to the output means for outputting the detection result to the specific device is stopped when the opening of the door body is not detected by the door opening detecting means. Therefore, when the door opening detecting means does not detect the opening of the door body, the power consumed by the output operation of the output period limiting means can be suppressed. Therefore, it is possible to suppress the consumption of the operating means while the gaming machine is turned off, and to increase the number of times the output means can be operated to increase the number of times that the opening of the door body can be detected.

In a gaming machine provided with a main body, a door body that opens and closes the front surface of the main body, and a control means provided in a space formed by the door body and the main body to control a game, the door to the main body is provided. A door opening detecting means for detecting the opening of the body, an output means for outputting the detection result to a specific device when the opening of the door body is detected by the door opening detecting means, and one time by the output means. The output when the output period limiting means using a monostable multi-vibrator that keeps the output period within a predetermined period and the output period limiting means are connected and the door opening detecting means detects the opening of the door body. The power of the game machine is turned off by the input period adjusting means for adjusting the signal input to the period limiting means to a period shorter than the predetermined period regardless of the opening period of the door body, and the output period limiting means and the output means. The gaming machine 5. The gaming machine is provided with an off-middle operation means for operating the inside.

According to the gaming machine 5, when the door opening detecting means detects the opening of the door body, the detection result is output to the specific device by the output means. Since the output means operates by receiving power supply from the operating means during the off while the power of the gaming machine is off, if the door opening detecting means detects the opening of the door body even when the power of the gaming machine is off. , The detection result can be output to a specific device. Therefore, for example, even if the door body is opened due to an illegal act by someone after the store is closed with all the gaming machines turned off, the game machine with the opened door body can be determined by the specific device.

Moreover, one output period by the output means is kept within a predetermined period by the output period limiting means. Like the output means, the output period limiting means also operates by receiving power supply from the operating means during the off while the power of the gaming machine is turned off, so that the operating period of the output means by opening the door once is within a predetermined period. It is possible to suppress the consumption of the operating means during the off while the power of the gaming machine is off. Therefore, the number of times that the output means can be operated can be increased, and the number of times that the opening of the door body can be detected can be increased.

Further, the signal input to the output period limiting means using the monostable multivibrator is shorter than the predetermined period, which is one output period by the output means, regardless of the opening period of the door body by the input period adjusting means. It will be adjusted. Here, the monostable multivibrator continues to output the signal unless the input period of the input signal is shorter than the output period of the output signal. Therefore, when the monostable multivibrator is used as the output period limiting means, it is input to the output period limiting means more than the output period of the output signal, that is, the predetermined period limited by the output period limiting means. The input period of the signal, that is, the opening period of the door body must be short. However, since it is completely unpredictable how long the opening period of the door body will be, in order to make the opening period of the door body always shorter than the predetermined period limited by the output period limiting means, the predetermined period is required. It is necessary to set the setting to a sufficient period. For example, if the opening period of the door body is predicted to be from several tens of seconds to several minutes, the predetermined period limited by the output period limiting means is set from several minutes to several tens of minutes with sufficient margin. Must. Then, during this predetermined period, power is continuously supplied to the output period limiting means and the output means from the off operating means, so that the off operating means is significantly consumed. Therefore, in order to suppress the consumption of the operating means during off after using the monostable multivibrator as the output period limiting means, a special circuit configuration is required. However, according to the gaming machine 5, the input period adjusting means can adjust the signal input to the output period limiting means to be shorter than a predetermined period regardless of the opening period of the door body. Therefore, regardless of the opening period of the door body, the output period limiting means can be operated normally, so that one output period by the output means can be kept within a predetermined period by the output period limiting means. As described above, according to the gaming machine 5, by providing the input period adjusting means, the consumption of the operating means during off is suppressed, and the output is performed by using the monostable multivibrator without adopting a special circuit configuration. A time limiting means can be realized.

The gaming machine 6 is characterized in that the input period adjusting means is configured by using an integrator circuit in the gaming machine 5.

According to the gaming machine 6, since the input period adjusting means is configured by using the integrating circuit, the signal input to the output period limiting means is adjusted shorter than the predetermined period without using a complicated circuit or signal processing. can do. Further, by adjusting the resistance value of the resistor used in the integrating circuit and the capacitance value of the capacitor, the input period of the signal input to the output period limiting means can be freely adjusted within a predetermined period.

The gaming machine 5 or 6 is characterized in that the input period adjusting means includes a constant voltage means for stabilizing the maximum voltage of a signal input to the output period limiting means.

According to the gaming machine 7, since the constant voltage means is provided, the maximum voltage of the signal input to the output period limiting means is made constant, the signal input to the output period limiting means is stabilized, and the output means is used. One output period can be stably maintained within a predetermined period.

When the input period adjusting means is configured by using the integrating circuit, a charge is stored in the capacitor used in the integrating circuit, and the voltage due to this charge is superimposed on the signal input to the output period limiting means. , There is a risk that an overvoltage that can destroy the output period limiting means will be applied to the output period limiting means. However, according to the gaming machine 7, since the maximum voltage of the signal input to the output period limiting means is made constant by the constant voltage means, the overvoltage that can destroy the output period limiting means is not applied to the output period limiting means. .. Therefore, it is possible to prevent the output period limiting means from being destroyed.

The gaming machine 8 is characterized in that the constant voltage means is composed of a Zener diode in the gaming machine 7.

According to the game machine 8, since the constant voltage means is composed of the Zener diode, it is input to the output period limiting means with a simple structure and at a low cost as compared with a constant voltage circuit composed of a complicated circuit or the like. The maximum voltage of the signal can be kept constant. Therefore, by using a simple configuration and an inexpensive Zener diode, the signal input to the output period limiting means is stabilized, and one output period by the output means is stably kept within a predetermined period while the output period is limited. It is possible to prevent an overvoltage that can destroy the means from being applied to the output period limiting means.

In the gaming machines 1 to 8, the door body includes an inner frame that is opened and closed with respect to the main body, and a transparent plate support door that is opened and closed with respect to the inner frame. Are provided on the inner frame and the transparent plate support door, respectively, and are connected in parallel to the output means, and the output means is connected to at least one of the inner frame or the transparent plate support door by the door opening detecting means. The gaming machine 9 is characterized in that when an opening is detected, the detection result is output to the specific device.

According to the gaming machine 9, the door opening detecting means is provided in the inner frame and the transparent plate supporting door, respectively, and is connected in parallel to the output means. Therefore, the door opening detecting means of the inner frame or the transparent plate supporting door is used. When at least one of the open doors is detected, the detection result is output to the specific device by the output means. Therefore, even if either the inner frame or the transparent plate support door constituting the door body is opened, the opening can be notified to the specific device by the output means of 1.

In any one of the gaming machines 1 to 9, the door opening detecting means is configured to be conductive when the door body is open, while being shut off when the door body is closed. A gaming machine 10 characterized by being played. According to the gaming machine 10, the door opening detecting means is conducted when the door body is open, and is shut off when the door body is closed, so that it is a time when a fraudulent act is executed. The power consumption can be kept small by operating the output means only while the door body is open.

One of the gaming machines 1 to 10 includes an off-time operating means that is charged while the gaming machine is powered on, and the output means operates by the electric charge or electric power charged in the off-operating operating means. A gaming machine 11 characterized by this. According to the game machine 11, the operating means during off is charged by the electric power supplied to the game machine while the power of the game machine is on, so that the power of the game machine is turned on according to the business hours of the game hall. Only the operating means can be charged while off. Therefore, if the door is opened while the power of the gaming machine is turned off after the game hall is closed, the output means (and the output period limiting means) are operated by the operating means during the off, and the door is opened. The detection result by the open detection means can be notified to the specific device.

In any of the gaming machines 1 to 11, the control means includes a main control means for performing main control of the game, and the output means is mounted on the main control means. ..

The gaming machine 13 according to any one of the gaming machines 1 to 11, wherein the output means is mounted on a substrate different from the control means.

In any of the gaming machines 1 to 13, the output means includes a photocoupler, and the detection result by the door open detection means is output to the specific device by the output of the photocoupler. Machine 14.

In any of the gaming machines 2 to 14, the output period limiting means and the output means are configured to be operable even if the voltage is lower than the operating voltage of the control means. .. According to the gaming machine 15, since the output period limiting means and the output means are configured to be able to operate even at a voltage lower than the operating voltage of the control means, the charge amount of the operating means during off is reduced. Even if the output voltage of the operating means during off becomes lower than the operating voltage of the control means, the output period limiting means and the output means can be operated to notify the specific device of the opening of the door body. That is, it is possible to detect the opening of the door body for a long time when the power of the gaming machine is turned off.

In any of the gaming machines 2 to 15, the output period limiting means and the output means are characterized in that the operable range voltage thereof is configured to be wider than the operable range voltage of the control means. 16. According to the gaming machine 16, the output period limiting means and the output means are configured such that the operable range voltage thereof is wider than the operating range voltage of the control means. Therefore, when the power of the gaming machine is turned off, the output period limiting means and the output means can be operated for a long time by the operating means during the off, so that the opening of the door body is detected for a long time when the power of the gaming machine is turned off. Can be done.

In any of the gaming machines 2 to 16, the gaming machine 17 is characterized in that the output period limiting means includes a C-MOS semiconductor. According to the gaming machine 17, the output period limiting means includes a C-MOS semiconductor. Here, the C-MOS semiconductor generally consumes less power during operation. Therefore, according to the gaming machine 17, it is possible to reduce the consumption of the operating means during the off and to detect the opening of the door body when the power of the gaming machine is turned off for a long time.

The gaming machine 18 according to any one of the gaming machines 1 to 17, wherein the gaming machine is a pachinko gaming machine. Among them, the basic configuration of the pachinko gaming machine is provided with an operation handle, and the ball is launched into a predetermined game area according to the operation of the operation handle, and the ball is placed in a predetermined position in the game area. As a prerequisite for winning a prize (or passing through the operating port), the identification information dynamically displayed on the display device may be fixedly stopped after a predetermined time. In addition, when a special gaming state occurs, a variable winning device (specific winning opening) arranged at a predetermined position in the gaming area is opened in a predetermined manner to enable a ball to be won, and is valuable according to the number of winnings. Some are given value (including not only prize balls but also data written on a magnetic card).

A game machine 19 in any one of the game machines 1 to 17, wherein the game machine is a slot machine. Among them, as a basic configuration of a slot machine, "a variable display means for dynamically displaying an identification information string composed of a plurality of identification information and then confirming the identification information is provided for operating a starting operation means (for example, an operation lever). Due to this, the dynamic display of the identification information is started, and the dynamic display of the identification information is stopped due to the operation of the stop operation means (stop button) or after a predetermined time has elapsed, and at the time of the stop. A gaming machine provided with a special gaming state generating means for generating a special gaming state advantageous to the player, provided that the definite identification information of the above is the specific identification information. In this case, coins, medals, and the like are typical examples of the game medium.

A gaming machine 20 in any of the gaming machines 1 to 17, wherein the gaming machine is a fusion of a pachinko gaming machine and a slot machine. Among them, as a basic configuration of the fused gaming machine, "a variable display means for dynamically displaying an identification information string composed of a plurality of identification information and then confirming and displaying the identification information is provided, and a starting operation means (for example, an operation lever). The variation of the identification information is started due to the operation of, and the dynamic display of the identification information is stopped due to the operation of the stop operation means (for example, the stop button) or after a predetermined time elapses. A special gaming state generating means for generating a special gaming state advantageous to the player is provided on the condition that the definite identification information at the time of stopping is the specific identification information, the ball is used as the game medium, and the identification information is described. A game machine that requires a predetermined number of balls to start the dynamic display of the game, and is configured to pay out a large number of balls when a special game state occurs. "

10 Pachinko machine (game machine)
11 Outer frame (main body)
12 Inner frame (part of the door body)
14 Front frame (transparent plate support door, part of door body)
110 Main control unit (part of control means, main control means)
260, 270, 280 Frame open detection circuit (part of output means)
261 External output terminal board (part of output means)
281 Integrator circuit (input period adjusting means)
CD1, CD6 capacitors (operating means while off)
D3 Zener diode (constant voltage means)
IC1 timer (output period limiting means)
PR1 photocoupler (part of output means)
SW1 and SW2 switches (door open detection means)

The present invention relates to a gaming machine typified by a pachinko machine, a rotating cylinder type gaming machine (for example, a slot machine), a rotating cylinder type gaming machine using a gaming ball, and the like.

In the pachinko machine, when a ball driven into the game area enters the symbol operating port, a lottery is performed at the timing of the entry. Further, in a spinning machine using a slot machine or a game ball, when the start lever is operated, a lottery is performed at the timing of the operation. As a result of the lottery, for example, when a big hit occurs, a large number of prize balls and coins can be paid out. Since the control for determining the lottery and the jackpot is performed by the main control device, the main control device is likely to be the target of fraudulent activity.

As a specific fraudulent act, for example, the main controller is replaced with a fraudulent one in which a jackpot occurs frequently, or a fraudulent board (for example, a "hanging board") is connected to the main controller to make a jackpot. There are things that illegally generate. Further, in the case of a pachinko machine, there is also a fraudulent act of illegally bending a nail driven on the surface of the game board to make it easier for the ball to enter the winning opening or the symbol operating opening.
In the case of pachinko machines, the main controller is mounted on the back of the game board. On the other hand, a glass frame is provided on the front surface of the game board, and the glass frame can be opened and closed individually with respect to the inner frame body on which the game board is mounted. Therefore, when a fraudster commits a fraudulent act against the game board surface or the main control device, the inner frame or the glass frame must be opened, but when the inner frame or the glass frame is opened, the inner frame or the glass frame must be opened. Since the opening is detected by the sensor and notified to the hall computer that manages the amusement park, it is possible to easily grasp which pachinko machine the fraudulent act was committed against.

Japanese Unexamined Patent Publication No. 2001-198332

However, if an intruder invades, for example, at midnight after the amusement park is closed and the intruder opens the inner frame or the glass frame and commits an illegal act, the power of the pachinko machine is turned off at that time. Since the pachinko machine is stopped, there is a problem that the opening of the inner frame or the glass frame cannot be detected and the opening cannot be notified to the hall computer.

The present invention has been made to solve the above-exemplified problems and the like, and provides a gaming machine capable of notifying a specific device of the opening of a door body even when the power of the gaming machine is turned off. The purpose is to do.

In order to achieve this object, the gaming machine according to claim 1 is provided in a space formed by a main body, a door body that opens and closes the front surface of the main body, and the door body and the main body to control the game. The door opening detecting means for detecting the opening of the door body with respect to the main body and the detection result when the opening of the door body is detected by the door opening detecting means are provided. The output means includes an output means for outputting to the specific device, and the output means outputs the detection result by the door open detection means to the specific device when the power of the game machine is turned off and the control means is stopped. It is configured to be possible. The space formed by the door body and the main body indicates the back surface or the back surface side of the door body that cannot be touched when the door body is closed.

According to the gaming machine according to claim 1, even when the power of the gaming machine is turned off and the control means is stopped, when the opening of the door body is detected by the door opening detecting means, the detection result is It is output to a specific device by the output means. Therefore, for example, even if the door body is opened due to an illegal act by someone after the store is closed with all the gaming machines turned off, there is an effect that the game machine with the opened door body can be identified by a specific device. is there.

It is a front view of a pachinko machine. It is a front view of the game board of a pachinko machine. It is a rear view of a pachinko machine. It is a perspective view of the pachinko machine in a state where the inner frame, the front frame and the lower plate unit are open. It is a figure which showed the structure of a switch. It is a block diagram which shows the electric structure of a pachinko machine. It is a block diagram which showed the electric structure of a frame opening detection circuit and an external output terminal board. 6 is a timing chart showing the relationship between the state of the inner frame, the state of the front frame, the TRG terminal voltage of the timer, the OUT terminal voltage of the timer, and the output of the external output terminal plate. (A) is a diagram schematically showing an area division setting and an effective line setting of a display screen, and (b) is a diagram illustrating an actual display screen. It is a figure which shows the outline of various counters. It is a flowchart which shows the start-up process which is executed by MPU 201 in the main control device 110. It is a flowchart which shows the main process executed by MPU in a main control unit. It is a flowchart which shows the variation process which is executed in the main process. It is a flowchart which showed the fluctuation start processing executed in the fluctuation processing. It is a flowchart which shows the timer interrupt processing. It is a flowchart which shows the start winning process which is executed in the timer interrupt process. It is a flowchart which shows the NMI interrupt processing. It is a block diagram which showed the electrical structure of the frame opening detection circuit of 2nd Embodiment. 6 is a timing chart showing the relationship between the state of the inner frame 12, the state of the front frame 14, the voltage of A of the frame opening detection circuit of the second embodiment, and the output of the external output terminal plate. It is a block diagram which showed the electrical structure of the frame opening detection circuit of 3rd Embodiment. 6 is a timing chart showing the relationship between the state of the inner frame, the state of the front frame, the TRG terminal voltage of the timer of the third embodiment, the OUT terminal voltage of the timer of the third embodiment, and the output of the external output terminal plate.

Hereinafter, an embodiment of a pachinko gaming machine (hereinafter, simply referred to as a “pachinko machine”) will be described with reference to the drawings. FIG. 1 is a front view of the pachinko machine 10, FIG. 2 is a front view of the game board 13 of the pachinko machine 10, and FIG. 3 is a rear view of the pachinko machine 10.

As shown in FIG. 1, the pachinko machine 10 has an outer frame 11 in which an outer shell is formed by a wooden frame combined in a substantially rectangular shape, and an outer frame 11 formed in substantially the same outer shape as the outer frame 11. It is provided with an inner frame 12 that is supported so as to be openable and closable. Metal hinges 18 are attached to the outer frame 11 at two upper and lower positions on the left side of the front view (see FIG. 1) in order to support the inner frame 12, and the side on which the hinge 18 is provided is used as an opening / closing axis. The frame 12 is supported so as to be openable and closable toward the front side of the front surface.

A game board 13 (see FIG. 2) having a large number of nails, winning openings 63, 64, etc. is detachably attached to the inner frame 12 from the back surface side. A ball game is performed by a ball flowing down the front surface of the game board 13. The inner frame 12 includes a ball launching unit 112a (see FIG. 5) that launches a ball into the front region of the game board 13 and a launch that guides a ball launched from the ball launching unit 112a to the front region of the game board 13. Rails (not shown) etc. are attached.

On the front side of the inner frame 12, a front frame 14 that covers the upper side of the front surface and a lower plate unit 15 that covers the lower side thereof are provided. Metal hinges 19 are attached to the upper and lower two places on the left side of the front view (see FIG. 1) to support the front frame 14 and the lower plate unit 15, and the front frame with the side on which the hinge 19 is provided as an opening / closing axis. 14 and the lower plate unit 15 are supported so as to be openable and closable toward the front side of the front surface. The lock of the inner frame 12 and the lock of the front frame 14 are released by inserting a dedicated key into the keyhole 21 of the cylinder lock 20 and performing a predetermined operation.

The front frame 14 is formed by assembling decorative resin parts, electric parts, and the like, and a window portion 14c having a substantially elliptical opening is provided at a substantially central portion thereof. A glass unit 16 having two plate glasses is arranged on the back surface side of the front frame 14, and the front surface of the game board 13 can be visually recognized on the front side of the pachinko machine 10 via the glass unit 16. On the front frame 14, an upper plate 17 for storing balls is formed in a substantially box shape with the upper surface open so as to project forward, and prize balls, rental balls, and the like are discharged to the upper plate 17. The bottom surface of the upper plate 17 is formed so as to be inclined downward to the right side when viewed from the front (see FIG. 1), and the ball thrown into the upper plate 17 is guided to the ball launching unit 112a by the inclination. Further, a frame button 22 is provided on the upper surface of the upper plate 17. The frame button 22 is operated by the player, for example, when changing the effect pattern of the variable display displayed on the third symbol display device 81 or changing the effect content at the time of reach effect.

In addition, the front frame 14 is provided with light emitting means such as various lamps around the front frame 14 (for example, a corner portion). These light emitting means change and control the light emitting mode by lighting or blinking according to a change in the gaming state at the time of a big hit or a predetermined reach, and play a role of enhancing the effect during the game. Illuminations 29 to 33 having a light emitting means such as an LED are provided on the peripheral edge of the window portion 14c. In the pachinko machine 10, these illumination units 29 to 33 function as effect lamps such as jackpot lamps, and each illumination unit 29 to 33 lights up by lighting or blinking the built-in LED at the time of jackpot or reach production. Or, it blinks to notify that the jackpot is in progress or that the reach is one step before the jackpot.

Further, in the upper left portion of the front frame 14 when viewed from the front (see FIG. 1), a light emitting means such as an LED is built in, and a display lamp 34 capable of displaying when the prize ball is being paid out and when an error occurs is provided. Further, on the lower side of the illuminated portion 32 on the right side, a small window 35 is formed by attaching a transparent resin from the back surface side so that the back surface side of the front frame 14 can be visually recognized, and a sticking space K1 on the front surface of the game board 13 (FIG. The certificate stamp or the like attached to (see 2) is visible from the front of the pachinko machine 10. Further, in the pachinko machine 10, in order to bring out more glitter, a plating member 36 made of ABS resin, which is chrome-plated, is attached to a region around the illuminated portions 29 to 33.

A ball lending operation unit 40 is arranged below the window unit 14c. The ball lending operation unit 40 is provided with a frequency display unit 41, a ball lending button 42, and a return button 43. When the ball lending operation unit 40 is operated with bills, cards, etc. inserted into the card unit (ball lending unit) (not shown) arranged on the side of the pachinko machine 10, the ball is operated according to the operation. Lending is done. Specifically, the frequency display unit 41 is an area in which balance information such as a card is displayed, and the built-in LED lights up and the balance is displayed as numerical value as balance information. The ball lending button 42 is operated to obtain a lending ball based on the information recorded on the card or the like (recording medium), and the lending ball is supplied to the upper plate 17 as long as the remaining amount is present on the card or the like. Will be done. The return button 43 is operated when requesting the return of the card or the like inserted in the card unit. A pachinko machine in which balls are lent directly to the upper plate 17 from a ball lending device or the like without going through a card unit, a so-called cash machine, does not require a ball lending operation unit 40. In this case, the ball lending operation unit 40 is not required. A decorative sticker or the like may be added to the installation portion of the above to make the component configuration common. It is possible to standardize pachinko machines and cash machines that use card units.

In the lower plate unit 15 located below the upper plate 17, a lower plate 50 for storing balls that could not be stored in the upper plate 17 is formed in a substantially box shape with an open upper surface in the central portion thereof. There is. On the right side of the lower plate 50, an operation handle 51 operated by a player to drive the ball into the front surface of the game board 13 is arranged, and driving of the ball launching unit 112a is permitted inside the operation handle 51. Touch sensor 51a for this purpose, push-button type stop switch 51b that stops the firing of the ball during the pressing operation, and a variable resistor that detects the amount of rotation operation of the operation handle 51 by the change in electrical resistance. (Not shown) and is built-in. When the operation handle 51 is rotated clockwise by the player, the touch sensor is turned on and the resistance value of the variable resistor changes according to the operation amount, depending on the rotation operation amount of the operation handle 51. The ball is launched with a strength corresponding to the resistance value of the changing variable resistor, whereby the ball is driven into the front surface of the game board 13 with a flying amount corresponding to the operation of the player. Further, when the operation handle 51 is not operated by the player, the touch sensor 51a and the stop switch 51b are turned off.

A ball pulling lever 52 for operating the ball stored in the lower plate 50 when the ball stored in the lower plate 50 is discharged downward is provided in the lower front portion of the lower plate 50. The ball pulling lever 52 is always urged to the right, and by sliding it to the left against the urging, the bottom opening formed on the bottom surface of the lower plate 50 is opened, and the bottom opening is opened. The ball naturally falls from the bottom opening and is discharged. The operation of the ball removing lever 52 is usually performed in a state where a box (generally referred to as "Senryobako") for receiving the balls discharged from the lower plate 50 is placed below the lower plate 50. An operation handle 51 is arranged on the right side of the lower plate 50 as described above, and an ashtray 53 is attached to the left side of the lower plate 50.

As shown in FIG. 2, the game board 13 has a wooden base plate 60 cut into a substantially square shape in front view, a large number of nails and windmills for ball guidance, rails 61, 62, a general winning opening 63, and a first. The ball entry port 64, the variable winning device 65, the variable display device unit 80, and the like are assembled and configured, and the peripheral edge portion thereof is attached to the back surface side of the inner frame 12. The general winning opening 63, the first winning opening 64, the variable winning device 65, and the variable display device unit 80 are arranged in the through holes formed in the base plate 60 by router processing, and are wood screws from the front side of the game board 13. It is fixed by etc. Further, the front central portion of the game board 13 can be visually recognized from the front side of the inner frame 13 through the window portion 14c (see FIG. 1) of the front frame 14. The configuration of the game board 13 will be described below.

An outer rail 62 formed by bending a strip-shaped metal plate into a substantially arc shape is planted on the front surface of the game board 13, and a strip-shaped metal plate is placed inside the outer rail 62 in the same manner as the outer rail 62. The arc-shaped inner rail 61 formed in 1 is planted. The inner rail 61 and the outer rail 62 surround the outer periphery of the front surface of the game board 13, and the game board 13 and the glass unit 16 (see FIG. 1) surround the front and back, so that the front surface of the game board 13 is surrounded by a ball. A game area in which the game is played is formed by the behavior of. The game area is a substantially circular area (a winning opening or the like is arranged and the launched ball is arranged) formed on the front surface of the game board 13 by being divided by two rails 61 and 62 and an arc member 70. The area where it flows down).

The two rails 61 and 62 are provided to guide the ball launched from the ball launching unit 112a to the upper part of the game board 13. A return ball prevention member 68 is attached to the tip of the inner rail 61 (upper left portion in FIG. 2) to prevent the ball once guided to the upper part of the game board 13 from returning to the ball guide passage. Will be done. A return rubber 69 is attached to the tip of the outer rail 62 (upper right part in FIG. 2) at a position corresponding to the maximum flight portion of the ball, and the ball launched with a predetermined momentum hits the return rubber 69 and has momentum. Is dampened and bounced back toward the center. Further, a resin arc member 70 formed by providing an arc connecting the rails on the inner surface side is used as a base between the lower right tip of the inner rail 61 and the upper right tip of the outer rail 62. It is fixed by driving it into the plate 60.

A first symbol display device 37 provided with a plurality of LEDs 37a and a 7-segment display 37b, which are light emitting means, is arranged on the upper right side of the game area when viewed from the front (upper right side in FIG. 2). The first symbol display device 37 displays according to each control performed by the main control device 110, and mainly displays the gaming state of the pachinko machine 10. The plurality of LEDs 37a indicate whether the pachinko machine 10 is in the probabilistic change, the time saving, or the normal state by the lighting state, indicate whether or not the pachinko machine 10 is in the fluctuating state by the lighting state, and the stop symbol corresponds to the probabilistic jackpot. Whether it is a symbol corresponding to a normal jackpot or a non-standard symbol is indicated by the lighting state, and the number of reserved balls is indicated by the lighting state. The 7-segment display device 37b displays the number of rounds during the jackpot and an error. The LED 37a is configured so that the emission colors (for example, red, green, and blue) of the LEDs are different, and the combination of the emission colors can suggest various gaming states of the pachinko machine 10 with a small number of LEDs. ..

Note that the above-mentioned pachinko machine 10 is in the probable change state is a game state in which the jackpot probability is increased and it is easy to shift to the special game state. Further, during the probability change in the present embodiment, the probability of hitting the second symbol is increased, and the ball is in a state of a game in which the ball can easily enter the first ball entry port 64. Further, when the pachinko machine 10 is in a short time, it is a state of a game in which the jackpot probability remains the same, only the hit probability of the second symbol is increased, and the ball can easily enter the first ball entrance 64. Further, when the pachinko machine 10 is in the normal state, it is a state of the game in which neither the probability change nor the time reduction is performed (the jackpot probability and the hit probability of the second symbol are not increased). In addition, depending on the gaming state of the pachinko machine 10, the time for opening the electric accessory (not shown) attached to the first entrance 64 and the number of times for the electric accessory to be opened per hit are changed. It may be a thing.

Further, in the game area, a plurality of general winning openings 63 are arranged in which 5 to 15 balls are paid out as prize balls when the balls win a prize. Further, a variable display device unit 80 is arranged in the central portion of the game area. The variable display device unit 80 includes a third symbol display device 81 composed of a liquid crystal display (hereinafter, simply abbreviated as “display device”) that variablely displays the third symbol triggered by winning a prize in the first ball opening 64. A second symbol display device 82 composed of a light emitting diode (hereinafter, abbreviated as “LED”) that fluctuates and displays the second symbol triggered by the passage of a ball at the second entry port 67 is provided. ..

The display content of the third symbol display device 81 is controlled by the display control device 114, which will be described later, and for example, three symbol sequences of left, middle, and right are displayed. Each symbol row is composed of a plurality of symbols, and these symbols are vertically scrolled for each symbol row so that the third symbol is variably displayed on the display screen of the third symbol display device 81. Further, in the present embodiment, the third symbol display device 81 is composed of a large liquid crystal display having an size of 8 inches, and the variable display device unit 80 is provided with a center frame so as to surround the outer periphery of the third symbol display device 81. 86 is arranged. In the third symbol display device 81 of the present embodiment, the game state is displayed by the control of the main control device 110 by the first symbol display device 37, whereas the display of the first symbol display device 37 is performed. A decorative display is made according to the above. In addition, instead of the display device, for example, a reel or the like may be used to configure the third symbol display device 81.

In addition, when the ball enters the first entry port 64 before the stop symbol (one of the probabilistic jackpot symbol, the normal jackpot symbol, and the off symbol) is displayed on the first symbol display device 37. , The number of times of ball entry is held up to 4 times, and the number of times of holding is indicated by the first symbol display device 37 and also by the number of lighting of the holding lamp 85. Four holding lamps 85 are provided for the maximum number of holding lamps 85, and are arranged symmetrically above the third symbol display device 81. In the present embodiment, the winning of the first ball opening 64 is configured to be held up to 4 times, but the maximum number of holdings is not limited to 4 times and is 3 times or less. , Or it may be set to 5 times or more (for example, 8 times). In addition, the hold lamp 85 is deleted, and the number of hold times of the variable display based on the winning of the first ball opening 64 is set as a number in a part of the third symbol display device 81, or the area divided into four is held. It may be displayed in a different mode (for example, a color or a lighting pattern) by the number of times. Further, since the number of holds is indicated by the first symbol display device 37, the hold lamp 85 may not be used to display the lighting.

The second symbol display device 82 has a display unit 83 of the second symbol and a holding lamp 84, and each time the ball passes through the second entry port 67, the display unit 83 serves as a display symbol (second symbol). When the "○" symbol and the "×" symbol are alternately lit to perform variable display, and the variable display is stopped at a predetermined symbol (in the present embodiment, the "○" symbol), the first 1 The ball entry port 64 is configured to be in an operating state (open) for a predetermined time. The number of times the ball has passed through the second entry port 67 is held up to four times, and the number of times the ball is held is displayed by the first symbol display device 37 described above and is also lit and displayed by the hold lamp 84. The variation display of the second symbol is performed by switching the lighting and non-lighting of a plurality of lamps on the display unit 83 as in the present embodiment, as well as the first symbol display device 37 and the third symbol display device. It may be done by using a part of 81. Similarly, the hold lamp 84 may be turned on by a part of the third symbol display device 81. Further, the maximum number of times of holding of the second ball opening 67 is not limited to four, as in the case of the first ball opening 64, but is three times or less, or five times or more (for example,). It may be set to 8 times). Further, since the number of holds is indicated by the first symbol display device 37, the hold lamp 84 may not be used to display the lighting.

Below the variable display device unit 80, a first ball entry port 64 into which a ball can enter is arranged. When a ball enters the first entry port 64, the first entry opening switch (not shown) provided on the back surface side of the game board 13 is turned on, and the first entry opening switch is turned on. A big hit lottery is made by the main control device 110, and the display according to the lottery result is indicated by the LED 37a of the first symbol display device 37. In addition, the first entry slot 64 is also one of the winning openings in which five balls are paid out as prize balls when a ball enters.

A variable winning device 65 is arranged below the first ball opening 64, and a horizontally long rectangular specific winning opening (large opening) 65a is provided in a substantially central portion thereof. In the pachinko machine 10, when the lottery in the main control device 110 becomes a big hit, after a predetermined time (variable time) elapses, the LED 37a of the first symbol display device 37 is turned on and the LED 37a of the first symbol display device 37 is turned on so as to be the stop symbol of the big hit. The stop symbol corresponding to the jackpot is displayed on the third symbol display device 81 to indicate the occurrence of the jackpot. After that, the gaming state transitions to a special gaming state (big hit) where the ball is easy to win. As this special game state, the specific winning opening 65a, which is normally closed, is opened for a predetermined time (for example, until 30 seconds have passed or until 10 balls are won).

The specific winning opening 65a is closed after a lapse of a predetermined time, and after the closing, the specific winning opening 65a is opened again for a predetermined time. The opening / closing operation of the specific winning opening 65a can be repeated up to 16 times (16 rounds), for example. The state in which this opening / closing operation is performed is a form of a special gaming state that is advantageous to the player, and a larger amount of prize balls than usual is paid out to the player as a game value (game value). Is done.

Specifically, the variable winning device 65 includes a horizontally long rectangular opening / closing plate that covers the specific winning opening 65a, and a large opening solenoid (not shown) for driving the opening / closing forward with the lower side of the opening / closing plate as an axis. And have. The specific winning opening 65a is normally closed so that the ball cannot win or it is difficult to win. In the case of a big hit, the large opening solenoid is driven to tilt the opening / closing plate downward on the front surface to temporarily form an open state in which the ball can easily win a prize in the specific winning opening 65a. It operates so as to alternate between the state and the state.

The special gaming state is not limited to the above-described form. A large opening that opens and closes separately from the specific winning opening 65a is provided in the game area, and when the LED 37a corresponding to the big hit is turned on in the first symbol display device 37, the specific winning opening 65a is opened for a predetermined time and the specific winning opening is opened. A special gaming state is a game state in which a large opening port provided separately from the specific winning opening 65a is opened a predetermined number of times for a predetermined time when the ball wins a prize in the specific winning opening 65a while the opening 65a is open. It may be formed.

Attachment spaces K1 and K2 for attaching certificate stamps, identification labels, etc. are provided at the left and right corners on the lower side of the game board 13, and the certificate stamps, etc. attached to the attachment space K1 are the front frame 14. It can be visually recognized through the small window 35 (see FIG. 1).

Further, the game board 13 is provided with an out port 66. Balls that do not enter any of the winning openings 63, 64, 65a are guided through the out opening 66 to a ball discharge path (not shown). A large number of nails are planted on the game board 13 in order to appropriately disperse and adjust the falling direction of the ball, and various members (accessories) such as a windmill are arranged.

As shown in FIG. 3, the control board units 90 and 91 and the back pack unit 94 are mainly provided on the back side of the pachinko machine 10. The control board unit 90 is unitized by mounting a main board (main control device 110), a voice lamp control board (voice lamp control device 113), and a display control board (display control device 114). The control board unit 91 is unitized by mounting a payout control board (payout control device 111), a launch control board (launch control device 112), a power supply board (power supply device 115), and a card unit connection board 116.

In the back pack unit 94, the back pack 92 forming the protective cover portion and the payout unit 93 are unitized. In addition, each control board is used for MPU as a one-chip microcomputer that controls each control, a port for contacting various devices, a random number generator used for various lottery, and for time counting and synchronization. A clock pulse generation circuit, etc. is installed as needed.

The main control device 110, the voice lamp control device 113 and the display control device 114, the payout control device 111 and the launch control device 112, the power supply device 115, and the card unit connection board 116 are housed in the board boxes 100 to 104, respectively. .. The board boxes 100 to 104 include a box base and a box cover that covers an opening of the box base, and the box base and the box cover are connected to each other to house each control device and each board.

Further, in the board box 100 (main control device 110) and the board box 102 (payout control device 111 and launch control device 112), the box base and the box cover are connected by a sealing unit (not shown) so as not to be opened (caulking structure). (Consolidated by). Further, a sealing sticker (not shown) is attached to the connecting portion between the box base and the box cover over the box base and the box cover. This sealing seal is made of a brittle material, and if the sealing seal is to be peeled off in order to open the board boxes 100 and 102, or if the board boxes 100 and 102 are forcibly opened, the box base side and the box cover are used. Cut to the side. Therefore, by checking the sealing unit or the sealing seal, it is possible to know whether or not the substrate boxes 100 and 102 have been opened.

The payout unit 93 includes a tank 130 located at the uppermost portion of the back pack unit 94 and opened upward, a tank rail 131 connected below the tank 130 and gently inclined toward the downstream side, and a downstream of the tank rail 131. A case rail 132 vertically connected to the side and a payout device 133 provided at the most downstream portion of the case rail 132 and paying out balls by a predetermined electrical configuration of a payout motor 216 (see FIG. 5) are provided. ing. The tank 130 is sequentially replenished with balls supplied from the island equipment of the game hall, and the required number of balls are appropriately paid out by the payout device 133. A vibrator 134 for adding vibration to the tank rail 131 is attached to the tank rail 131.

Further, the payout control device 111 is provided with a state return switch 120, the launch control device 112 is provided with a variable resistor operation knob 121, and the power supply device 115 is provided with a RAM erase switch 122. The state return switch 120 is operated to clear the ball clogging (return to the normal state) when a payout error occurs, such as a ball clogging of the payout motor 216 (see FIG. 4). The operation knob 121 is operated to adjust the firing force of the firing solenoid. The RAM erase switch 122 is operated when the power is turned on when it is desired to return the pachinko machine 10 to the initial state.

Next, the internal configuration of the pachinko machine 10 will be described with reference to FIG. FIG. 4 is a perspective view of the pachinko machine 10 in a state where the inner frame 12, the front frame 14, and the lower plate unit 15 are open.

The pachinko machine 10 is provided with an outer frame 11 that forms an outer shell thereof, and the inner frame 12 is openably and closably supported with respect to the outer frame 11. In the amusement park, the outer peripheral surface of the outer frame 11 is fixed to an installation location called an island of the amusement park. Since the inner frame 12, the front frame 14, and the lower plate unit 15 are configured to be openable to the front side with respect to the outer frame 11, the pachinko machine 10 cannot be touched from the front side or the inside. The inspection and adjustment are performed by opening the inner frame 12 and the like to the front side with respect to the outer frame 11.

Metal upper hinges (not shown) and lower hinges (not shown) are attached to the outer frame 11 at two upper and lower positions on the left side of the front view to support the inner frame 12. The inner frame 12 is supported so as to be openable and closable with the side provided with the upper hinge and the lower hinge as the axis for opening and closing.

The inner frame 12 is mainly composed of an inner frame base 52 made of ABS resin formed in a rectangular shape, and a substantially circular central window 52a is formed in the central portion of the inner frame base 52. A mounting portion for the game board 13 is provided on the back surface side of the inner frame base 52, and the game board 13 is detachably mounted.

The lower side of the central window 52a of the inner frame base 52 is formed by being recessed in a concave shape with the front side open, and a flat mounting surface 52b is formed on the back side thereof. A launching unit 140 for launching a ball to the front surface of the game board 13, a passage forming member 53 for forming a passage for discharging the ball to the upper plate 17 and the lower plate 50, and the like are attached to the mounting surface 52b.

Switches SW1 (SW1a, SW1b) for detecting the opening and closing of the inner frame 12 are provided between the outer frame 11 and the inner frame 12, and the front surface is provided between the inner frame 12 and the front frame 14. Switches SW2 (SW2a, SW2b) for detecting the opening and closing of the frame 14 are provided. The switch SW1 is composed of a female switch SW1a arranged on the surface of the outer frame 11 facing the inner frame 12, and a male switch SW1b arranged on the surface of the inner frame 12 facing the outer frame 11. To. Further, the switch SW2 is composed of a female switch SW2a arranged on the surface of the inner frame 12 facing the front frame 14 and a male switch SW2b arranged on the surface of the front frame 14 facing the inner frame 12. It is composed.

Here, the structures of the switch SW1 and the switch SW2 will be described with reference to FIG. Since the switch SW1 and the switch SW2 have the same structure, the structure of the switch SW1 will be described, and the description of the switch SW2 will be omitted.

FIG. 5 is a diagram showing the structure of the switch SW1. FIG. 5A is a diagram showing a state (blocking state) of the switch SW1 in a state where the inner frame 12 is closed. Further, FIG. 5B is a diagram showing a state (conduction state) of the switch SW1 in a state where the inner frame 12 is opened.

As shown in FIG. 5 (a), the female switch SW1a arranged on the surface of the outer frame 11 facing the inner frame 12 contains a pair of terminal pairs SW1c made of metal, which is a conductive member. ing. In the state where the inner frame 12 is closed, the female switch SW1a arranged on the surface of the outer frame 11 facing the inner frame 12 has a male switch SW1a arranged on the surface of the inner frame 12 facing the outer frame 11. The mold switch SW1b is inserted, and the contact between the terminals and the SW1c is hindered. Therefore, in the state where the inner frame 12 is closed, the switch SW1 is in a state where the continuity is cut off.

On the other hand, as shown in FIG. 5B, when the inner frame 12 is open, the female switch SW1a arranged on the surface of the outer frame 11 facing the inner frame 12 is outside the inner frame 12. The male switch SW1b arranged on the surface facing the frame 11 is pulled out. Since the terminal pair SW1c built in the female switch SW1a has a structure in which an urging force is generated in the direction opposite to each other, the terminal pair SW1c are in contact with each other when the male switch SW1b is pulled out from the female switch SW1a. To do. Therefore, when the inner frame 12 is open, the switch SW1 is in a conductive state.

As described above, the switch SW1 is in a cutoff state when the inner frame 12 is closed, and is in a conductive state when the inner frame 12 is open. However, the structure of the switch SW1 is not limited to the shape shown in FIG. 5. When the inner frame 12 is closed, the switch SW1 is shut off, while when the inner frame 12 is open, the switch SW1 is shut off. Any structure may be used as long as the switch SW1 is in a conductive state. This also applies to the structure of the switch SW2.

Next, the electrical configuration of the pachinko machine 10 will be described with reference to FIG. FIG. 6 is a block diagram showing an electrical configuration of the pachinko machine 10.

The main control device 110 is equipped with an MPU 201 as a one-chip microcomputer which is an arithmetic unit. The MPU 201 is a ROM 202 that stores various control programs and fixed value data executed by the MPU 201, and a memory for temporarily storing various data and the like when the control program stored in the ROM 202 is executed. A certain RAM 203 and various other circuits such as an interrupt circuit, a timer circuit, and a data transmission / reception circuit are built in. In order to instruct the operation of the sub control device such as the payout control device 111 and the voice lamp control device 113, various commands are transmitted from the main control device 110 to the sub control device by the data transmission / reception circuit. Such a command is transmitted from the main controller 110 to the sub controller in only one direction.

The RAM 203 has a stack area in which the contents of the internal registers of the MPU 201 and the return address of the control program executed by the MPU 201 are stored, and a work area (work) in which various flags, counters, I / O values, etc. are stored. Area) and. The RAM 203 has a configuration in which a backup voltage is supplied from the power supply device 115 to hold (back up) data even after the power supply of the pachinko machine 10 is cut off, and all the data stored in the RAM 203 is backed up.

When the power supply is cut off due to the occurrence of a power failure or the like, the stack pointer at the time of the power failure (including the time when the power failure occurs; the same applies hereinafter) and the value of each register are stored in the RAM 203. On the other hand, when the power is turned on (including power on due to power failure elimination; the same applies hereinafter), the state of the pachinko machine 10 is restored to the state before the power was cut off based on the information stored in the RAM 203. The writing to the RAM 203 is executed by the main process (see FIG. 12) when the power is cut off, and the restoration of each value written in the RAM 203 is executed in the start-up process (see FIG. 11) when the power is turned on. The NMI terminal (non-maskable interrupt terminal) of the MPU 201 is configured so that a power failure signal SG1 from the power failure monitoring circuit 252 is input when the power is cut off due to a power failure or the like, and the power failure signal SG1 is the MPU201. When input to, the NMI interrupt process (see FIG. 17) as the power failure process is immediately executed.

An input / output port 205 is connected to the MPU 201 of the main control device 110 via a bus line 204 composed of an address bus and a data bus. The input / output port 205 includes a payout control device 111, a voice lamp control device 113, a first symbol display device 37, a second symbol display device 82, various switches 208 including a switch group and a sensor group (not shown), and a specific prize. A solenoid 209 including a large opening solenoid for driving the opening and closing of the opening 65a to the front side and a solenoid for driving an electric accessory is connected to the opening and closing plate of the mouth 65a.

Further, the main control device 110 is provided with a frame opening detection circuit 260 that detects the opening of the inner frame 12 by conducting the switch SW1 and detects the opening of the front frame 14 by conducting the switch SW2. There is. The frame opening detection circuit 260 is connected to a switch SW1 for detecting the opening of the inner frame 12, a switch SW2 for detecting the opening of the front frame 14, and an external output terminal plate 261 configured to be connectable to the hall computer 262. Has been done. In addition, in the connection between the switch SW1 and the switch SW2 and the frame opening detection circuit 260, and the connection between the frame opening detection circuit 260 and the external output terminal board 261, an input / output unit (input / output port 205) that inputs / outputs signals is used. Are connected via different I / O ports, not shown). When the switch SW1 conducts and detects the opening of the inner frame 12, or when the switch SW2 conducts and detects the opening of the front frame 14, the frame opening detection circuit 260 transmits the external output terminal plate 261 to the hall computer 262. A pulse signal having a pulse width of 10 ms is output. The pulse signal output from the external output terminal plate 261 is stored in the hall computer 262. Therefore, the opening of the inner frame 12 or the front frame 14 can be detected by analyzing the pulse signal stored in the hall computer 262.

The frame opening detection circuit 260 is configured to be unconnected to the MPU 201 and the input / output port 205 (input / output port of the MPU 201) of the main control device 110. Therefore, the frame opening detection circuit 260 may be configured to be mounted on a device (circuit board) other than the main control device 110. For example, it may be mounted on a device (circuit board) on which an arithmetic unit such as an MPU or a CPU is not mounted, or a dedicated board for the frame opening detection circuit 260 may be provided and mounted there. Better yet, like the main control device 110, the payout control device 111, and the launch control device 112, the frame opening detection circuit 260 is housed in the board box, and the box base and the box cover provided on the board box are sealed. It is connected so that it cannot be opened by (not shown) (connection by caulking structure). Then, a sealing sticker (not shown) may be attached to the connecting portion between the box base and the box cover over the box cover and the box base.

The payout control device 111 drives the payout motor 216 to control the payout of prize balls and rented balls. The MPU 211, which is an arithmetic unit, has a ROM 212 that stores a control program and fixed value data executed by the MPU 211, and a RAM 213 that is used as a work memory or the like.

The RAM 213 of the payout control device 111, like the RAM 203 of the main control device 110, has a stack area in which the contents of the internal registers of the MPU 211 and the return address of the control program executed by the MPU 211 are stored, and various flags and counters. It has a work area (work area) in which values such as, I / O, etc. are stored. The RAM 213 has a configuration in which a backup voltage is supplied from the power supply device 115 to hold (back up) data even after the power supply of the pachinko machine 10 is cut off, and all the data stored in the RAM 213 is backed up. Similar to the MPU 201 of the main control device 110, the NMI terminal of the MPU 211 is also configured so that the power failure signal SG1 is input from the power failure monitoring circuit 252 when the power is cut off due to the occurrence of a power failure or the like. When input to the MPU 211, the NMI interrupt process (see FIG. 17) as the power failure process is immediately executed.

An input / output port 215 is connected to the MPU 211 of the payout control device 111 via a bus line 214 composed of an address bus and a data bus. A main control device 110, a payout motor 216, a launch control device 112, and the like are connected to the input / output port 215, respectively. Further, although not shown, the payout control device 111 is connected to a prize ball detection switch for detecting the paid out prize balls. The prize ball detection switch is connected to the payout control device 111, but is not connected to the main control device 110.

The launch control device 112 controls the ball launch unit 112a so that when the main control device 110 gives an instruction to launch the ball, the launch strength of the ball corresponds to the amount of rotation of the operation handle 51. The ball launch unit 112a includes a launch solenoid and an electromagnet (not shown), and the launch solenoid and the electromagnet are allowed to be driven when predetermined conditions are met. Specifically, the operation handle is detected by the touch sensor 51a that the player is touching the operation handle 51, and the stop switch 51b for stopping the firing of the ball is turned off (not operated). The firing solenoid is excited in response to the amount of rotation of 51, and the ball is fired with a strength corresponding to the amount of operation of the operation handle 51.

The audio lamp control device 113 is an audio output in an audio output device (speaker or the like (not shown) 226, an on / off output in a lamp display device (illumination units 29 to 33, an indicator lamp 34, etc.), and a display control device 114. It controls the setting of the display mode of the third symbol display device 81 to be performed. The arithmetic unit MPU 221 has a ROM 222 that stores a control program and fixed value data executed by the MPU 221 and a RAM 223 that is used as a work memory or the like.

An input / output port 225 is connected to the MPU 221 of the voice lamp control device 113 via a bus line 224 composed of an address bus and a data bus. A main control device 110, a display control device 114, an audio output device 226, a lamp display device 227, and the like are connected to the input / output port 225, respectively.

The display control device 114 controls the variable display of the third symbol on the third symbol display device (LCD) 81. The display control device 114 includes an MPU 231, a ROM (program ROM) 232, a work RAM 233, a video RAM 234, a character ROM 235, an image controller 236, an input port 237, an output port 238, and a bus line 239, 240. have. The output side of the voice lamp control device 113 is connected to the input side of the input port 237, and the MPU 231, ROM 232, work RAM 233, and image controller 236 are connected to the output side of the input port 237. A video RAM 234 and a character ROM 235 are connected to the image controller 236, and an output port 238 is connected via the bus line 240. A third symbol display device 81 is connected to the output side of the output port 238. Even if the pachinko machine 10 is a different model in which the lottery probability of the jackpot and the number of prize balls to be paid out in one jackpot are different, the model having exactly the same symbol configuration displayed on the third symbol display device 81 is available. Therefore, the display control device 114 is made into a common component to reduce the cost.

The MPU 231 of the display control device 114 controls the display content of the third symbol display device 81 based on the symbol display command input from the voice lamp control device 113. The ROM 232 is a memory for storing various control programs and fixed value data executed by the MPU 231. The work RAM 233 is a memory for temporarily storing work data and flags used when executing various programs by the MPU 231. The character ROM 235 is a memory that stores data for effect such as a symbol (background symbol or third symbol) displayed on the third symbol display device 81. The video RAM 234 is a memory for storing the effect data displayed on the third symbol display device 81, and the display content of the third symbol display device 81 is changed by rewriting the contents of the video RAM 234.

The image controller 236 adjusts the timings of the MPU 231 and the video RAM 234, and the output port 238 to intervene in reading and writing data, and reads out the display data stored in the video RAM 234 at a predetermined timing to read the display data 81. It is to be displayed on.

The power supply device 115 is provided with a power supply unit 251 for supplying power to each part of the pachinko machine 10, a power failure monitoring circuit 252 for monitoring power failure due to a power failure, and a RAM erasing switch 122 (see FIG. 3). It has an erasing switch circuit 253. The power supply unit 251 is a device that supplies the required operating voltage to each of the control devices 110 to 114 and the like through a power supply path (not shown). As an outline, the power supply unit 251 takes in a voltage of 24 volt AC supplied from the outside, and has a voltage of 12 volt for driving various switches such as various switches 208, a solenoid such as a solenoid 209, and a motor. A 5 volt voltage for logic, a backup voltage for RAM backup, and the like are generated, and these 12 volt voltage, 5 volt voltage, and backup voltage are supplied to each control device 110 to 114 and the like.

The power failure monitoring circuit 252 is a circuit for outputting a power failure signal SG1 to each NMI terminal of the MPU 201 of the main control device 110 and the MPU 211 of the payout control device 111 when the power is cut off due to the occurrence of a power failure or the like. The power failure monitoring circuit 252 monitors the DC stable 24 volt voltage, which is the maximum voltage output from the power supply unit 251 and determines that a power failure (power cutoff, power supply cutoff) has occurred when this voltage becomes less than 22 volt. Then, the power failure signal SG1 is output to the main control device 110 and the payout control device 111. By the output of the power failure signal SG1, the main control device 110 and the payout control device 111 recognize the occurrence of the power failure and execute the NMI interrupt process. The power supply unit 251 outputs a voltage of 5 volts, which is the drive voltage of the control system, for a sufficient period of time to execute the NMI interrupt process even after the voltage of DC stable 24 volts becomes less than 22 volts. Is configured to maintain a normal value. Therefore, the main control device 110 and the payout control device 111 can normally execute and complete the NMI interrupt process (see FIG. 17).

The RAM erase switch circuit 253 is a circuit for outputting the RAM erase signal SG2 for clearing the backup data to the main control device 110 when the RAM erase switch 122 is pressed. The main control device 110 and the payout control device 111 clear the respective backup data when the RAM erase signal SG2 is input when the power of the pachinko machine 10 is turned on, and the payout control device 111 clears the backup data. The payout initialization command is transmitted to the payout control device 111.

Next, the frame opening detection circuit 260 and the external output terminal board 261 will be described with reference to FIG. 7. FIG. 7 is a block diagram showing the electrical configuration of the frame opening detection circuit 260 and the external output terminal plate 261. In FIG. 7, the frame opening detection circuit 260 will be described first, and then the external output terminal plate 261 will be described.

The frame opening detection circuit 260 that detects the opening of the inner frame 12 or the opening of the front frame 14 includes a DC power supply DC1 that supplies a DC voltage of 12 volts, a diode D1, capacitors CD1 to CD5, resistors R1 to R4, and the like. It mainly has a timer IC1 (LMC555 manufactured by National Semiconductor) which is a C-MOS timer, and a transistor TR1 provided with an internal resistance R5 and an internal resistance R6.

In order to detect the opening of the inner frame 12 by conducting the switch SW1 and to detect the opening of the front frame 14 by conducting the switch SW2, the above-mentioned parts of the frame opening detection circuit 260 are shown in FIG. Connected according to the block diagram. Since the switch SW1 and the switch SW2 are connected in parallel to the frame opening detection circuit 260, if either switch conducts, the frame opening detection circuit 260 will have the inner frame 12 or the front frame. 14 openings can be detected.

The DC power supply DC1 is a power supply that supplies a DC voltage of 12 volts to the frame opening detection circuit 260 and the external output terminal plate 261. The power (power supply) to the DC power supply DC1 is supplied from the power supply unit 251 provided in the power supply device 115 through a power supply path (not shown). The DC power supply DC1 is connected to the anode terminal of the diode D1. One end of a 0.1F (Farad) capacitor CD1 is connected to the cathode terminal of the diode D1. The other end of the capacitor CD1 is grounded. Further, one end of the capacitor CD1 is connected to one end of the switch SW1, one end of the switch SW2, and the VDD terminal and the RES terminal of the timer IC1.

When the power supply to the pachinko machine 10 is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1, the capacitor CD1 is charged to supply the DC voltage to the frame opening detection circuit 260 and the external output terminal plate 261. It is a component that exerts the function of a battery.

This is because the capacitor CD1 is supplied with power to the pachinko machine 10, and when a DC voltage of 12 volts is supplied from the DC power supply DC1, the capacitor CD1 has a capacity of 0.1 F (farad) and the capacitor CD1. The charge obtained by the product of the applied DC voltage (about 11.3 volt obtained by subtracting the voltage drop of about 0.7 volt at the diode D1 from the 12 volt supplied from the DC power supply DC1) is stored.

On the other hand, the capacitor CD1 is stored in the capacitor CD1 when, for example, the business hours of the amusement park are over and the power supply to the pachinko machine 10 is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1. A DC voltage (about 11.3 volts) based on the generated electric charge is supplied to the frame opening detection circuit 260 and the external output terminal plate 261.

Therefore, the frame opening detection circuit 260 naturally operates when power is supplied to the pachinko machine 10 and a DC voltage of 12 volts is supplied from the DC power supply DC1. Further, for example, a game hall business Even when the power supply to the pachinko machine 10 is cut off at the end of the time and the DC voltage of 12 volts is not supplied from the DC power supply DC1, it operates by the DC voltage supplied by the capacitor CD1. The opening of the frame 12 and the opening of the front frame 14 can be detected. In this embodiment, the capacitor CD1 is used as a component for supplying the DC voltage to the frame opening detection circuit 260 and the external output terminal plate 261 when the DC voltage of 12 volts is not supplied from the DC power supply DC1. .. However, the present invention is not limited to this, and the capacitor CD1 may be a secondary battery (rechargeable battery) having a larger storage capacity or a primary battery that does not need to be charged.

Further, since the cathode terminal of the diode D1 is connected to one end of the capacitor CD1 and the diode D1 functions to prevent the backflow of current, direct current is applied from the capacitor CD1 to the frame opening detection circuit 260 and the external output terminal plate 261. Even when a voltage (about 11.3 volts) is supplied, the DC voltage is not applied to the DC power supply DC1 and the DC power supply DC1 is not damaged.

The timer IC1 is a C-MOS timer, and detects the opening of the inner frame 12 or the opening of the front frame 14 by connecting the resistors R1 to R2 of 100 kΩ and the capacitors CD3 to CD5 of 0.1 μF, and detects the opening of the inner frame 12 and the external output terminal. It functions as a circuit that energizes the photocoupler PR1 of the plate 261 for about 10 ms.

The operating voltage range of the timer IC1 is the MPU 201 mounted on the main control device 110, the MPU 211 mounted on the payout control device 111, the MPU 221 mounted on the voice lamp control device 113, and the MPU 231 mounted on the display control device 114. It is set wider than each operating voltage range. Specifically, the operating voltage range of the timer IC1 is from about 1.5 volts to about 12.0 volts, while the operating voltage range of the MPU 2011, 211, 221, 231 is from about 4.5 volts. It is about 5.5 volts (note that each operating voltage of this embodiment is about 5.0 volts). Therefore, the timer IC1 can operate at a voltage lower than the operating voltages of the MPUs 2011, 211, 221, and 231. Therefore, even if the electric charge stored in the capacitor CD1 is reduced and the voltage supplied by the capacitor CD1 is reduced to less than about 4.5 volts, the timer IC1 can operate sufficiently. Further, for example, when the business hours of the amusement park are over and the power supply to the pachinko machine 10 is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1, the timer IC1 is DC-controlled by the capacitor CD1. It is used both when the voltage is supplied and when the power is supplied to the pachinko machine 10 and the DC voltage of 12 volts is supplied from the DC power supply DC1. Therefore, as a matter of course, the timer IC 1 can operate at a DC voltage of 12 volts or less supplied to the frame opening detection circuit 260 when the power is supplied to the pachinko machine 10. Further, since the timer IC1 is a timer composed of a C-MOS semiconductor, it can suppress power consumption during operation and can operate for a long time.

The VDD terminal of the timer IC1 is a terminal for inputting the DC voltage supplied to the timer IC1 and is connected to one end of the capacitor CD1. Further, the VDD terminal of the timer IC1 is connected to one end of the 0.1 μF capacitor CD4, and the other end of the capacitor CD4 is connected to the GND terminal of the grounded timer IC1. The capacitor CD4 reduces the noise generated in the VDD terminal of the timer IC1 when the switch SW1 and the switch SW2 are conducted or cut off (when the inner frame 12 and the front frame 14 are opened or closed). ..

The RES terminal of the timer IC1 is a terminal for operating a reset function that forcibly puts the voltage output from the OUT terminal into an output stop state (zero volt) when a pulse signal is input to the RES terminal. However, since this reset function is not used in the frame open detection circuit 260, the RES terminal of the timer IC1 is connected to one end of the capacitor CD1 so that the reset function does not operate. Since the VDD terminal of the timer IC1 and the RES terminal of the timer IC1 are connected to one end of the capacitor CD1 as described above, a DC voltage of about 11.3 volts is applied to the VDD terminal and the RES terminal of the timer IC1. It is applied.

The TRG terminal of the timer IC1 reduces the voltage output from the OUT terminal of the timer IC1 when the switch SW1 and the switch SW2 are shut off (when the inner frame 12 and the front frame 14 are closed). Set to 10.6 volt, while either switch SW1 or switch SW2, or both switch SW1 and switch SW2 are in a conductive state (either the inner frame 12 or the front frame 14). Or, when both the inner frame 12 and the front frame 14 are in the open state), it is a terminal for setting the voltage output from the OUT terminal of the timer IC1 from about 10.6 volt to zero volt after about 10 ms. .. The TRG terminal of the timer IC1 is connected to one end of the resistor R2, one end of the capacitor CD5, the other end of the switch SW1, the other end of the switch SW2, one end of the resistor R1, and one end of the resistor R7 of the external output terminal plate 261. The other end of the resistor R2 and the other end of the capacitor CD5 are grounded.

The resistor R2 connected to the TRG terminal of the timer IC1 is a timer when the inner frame 12 and the front frame 14 are in the open state and the switch SW1 and the switch SW2 are in the conductive state (see FIG. 5B). This is a resistor for applying a DC voltage (about 11.3 volts) to the TRG terminal of the IC1. Further, this capacitor CD5 is a capacitor for reducing noise generated in the resistor R2 when the switch SW1 and the switch SW2 are conducted or cut off (when the inner frame 12 and the front frame 14 are opened or closed). Is.

With the above connection, when the switch SW1 and the switch SW2 are in the cutoff state (when the inner frame 12 and the front frame 14 are in the closed state), no voltage is supplied to the resistor R2 and the capacitor CD5, so that the resistor R2 and the capacitor CD5 are supplied with voltage. The applied voltage (the voltage applied to the TRG terminal of the timer IC1) is zero volt. At this time, the voltage output from the OUT terminal of the timer IC1 is about 10.6 volts.

On the other hand, when either one of the switch SW1 or the switch SW2, or both the switch SW1 and the switch SW2 are in a conductive state (either the inner frame 12 or the front frame 14 or both the inner frame 12 and the front frame 14 are in a conductive state). Since the voltage is supplied to the resistor R2 and the capacitor CD5 (when in the open state), the voltage applied to the resistor R2 and the capacitor CD5 (the voltage applied to the TRG terminal of the timer IC1) is applied to one end of the capacitor CD1. It is about 11.3 volts, which is the same as the applied voltage. At this time, the voltage output from the OUT terminal of the timer IC1 is about 10.6 volts for about 10 ms after either the switch SW1 or the switch SW2, or both the switch SW1 and the switch SW2 are in a conductive state. After that, it becomes zero voltage.

In this way, the voltage output from the OUT terminal of the timer IC1 can be set to either about 10.6 volts or zero volts by the voltage applied to the TRG terminal of the timer IC1. The switch SW1 or the switch SW2 is conducted (the inner frame 12 or the front frame 14 is opened), and the voltage applied to the TRG terminal of the timer IC1 (the voltage applied to the resistor R2) is about 11.3 volts from zero volt. When the voltage changes to, as described above, the voltage of about 10.6 volts output from the OUT terminal of the timer IC1 drops to zero volts with a delay of about 10 ms from the rise of the voltage. Then, as will be described in detail later, the time difference between the rise of the voltage applied to the TRG terminal of the timer IC1 (the voltage applied to the resistor R2) and the fall of the voltage output from the OUT terminal of the timer IC1 ( About 10 ms), a current is supplied to one end of the resistor R7 of the external output terminal plate 261 for about 10 ms, and the photocoupler PR1 of the external output terminal plate 261 is energized only for about 10 ms.

The OUT terminal of the timer IC1 has a voltage of about 10.6 volts when the switch SW1 and the switch SW2 are cut off (the inner frame 12 and the front frame 14 are closed) and the voltage applied to the TRG terminal of the timer IC1 becomes zero volt. On the other hand, when the switch SW1 or the switch SW2 is conducted (the inner frame 12 or the front frame 14 is opened) and the voltage applied to the TRG terminal of the timer IC1 rises to about 11.3 volts, the rise is started. It is a terminal that sets the output voltage of about 10.6 volts to zero volts with a delay of about 10 ms. This OUT terminal is connected to one end of a 10 kΩ resistor R3. The other end of the resistor R3 is connected to one end of the capacitor CD2 and one end of the resistor R4 of 10 kΩ, and the other end of the capacitor CD2 and the other end of the resistor R4 are grounded.

The resistor R3 and the resistor R4 are voltage dividing resistors for dividing the voltage output from the OUT terminal of the timer IC1. Therefore, the voltage output from the OUT terminal of the timer IC1 is divided into the resistor R3 and the resistor R4 according to the ratio of the resistance value of the resistor R3 and the resistance value of the resistor R4. Since both the resistor R3 and the resistor R4 are 10 kΩ, the voltage of about 10.6 volt output from the OUT terminal of the timer IC1 is divided into a maximum value of about 5.3 volt by the resistor R3 and the resistor R4, respectively. Be pressured.

The 10 μF capacitor CD2 connected in parallel with the resistor R4 is a capacitor for stabilizing the voltage applied to the resistor R4. One end of the capacitor CD2 is connected to one end of the resistor R4, and the other end of the capacitor CD2 is connected to the other end of the resistor R4 and is grounded. By stabilizing the voltage applied to the resistor R4 by this capacitor CD2, the bias voltage applied between the base terminal b of the transistor TR1 and the emitter terminal e of the transistor TR1 is stabilized, and the transistor TR1 The operation can be stabilized.

The transistor TR1 is a switching element that switches between the collector terminal c of the transistor TR1 and the emitter terminal e of the transistor TR1 to either conduction or interruption based on the voltage applied to the resistor R4. The transistor TR1 is provided with an internal resistance R5 of 10 kΩ. One end of the resistance R4 is connected to one end of the internal resistance R5, and the base terminal b is connected to the other end of the internal resistance R5. Further, the transistor TR1 is provided with an internal resistance R6 of 10 kΩ. The other end of the internal resistance R5 is connected to one end of the internal resistance R6, and the emitter terminal e is connected to the other end of the internal resistance R6.

Therefore, when a voltage of about 10.6 volts is output from the OUT terminal of the timer IC1 (when the inner frame 12 and the front frame 14 are closed, and when the inner frame 12 or the front frame 14 is opened). (If it is within about 10 ms), the voltage is divided by the resistor R3 and the resistor R4, and the voltage applied to the resistor R4 (about 5.3 volts) is combined with one end of the internal resistance R5 of the transistor TR1. It is applied between the emitter terminal e of the transistor TR1. As a result, the collector terminal c of the transistor TR1 and the emitter terminal e of the transistor TR1 are made conductive. At this time, if the switch SW1 or the switch SW2 is in the conductive state (the inner frame 12 or the front frame 14 is in the open state), until the voltage of about 10.6 volt output from the OUT terminal of the timer IC1 is switched to zero volt. That is, a current is supplied to one end of the resistor R7 of the external output terminal plate 261 for about 10 ms after the inner frame 12 or the front frame 14 is opened. If a current is supplied to one end of the resistor R7, the photocoupler PR1 of the external output terminal plate 261 can be energized for about 10 ms, and a pulse signal having a pulse width of about 10 ms can be output to the hall computer 262. However, when the inner frame 12 and the front frame 14 are closed and the switch SW1 and the switch SW2 are cut off, the connection between one end of the capacitor CD1 and the resistor R7 provided on the external output terminal plate 261 is cut off. Therefore, no current is supplied to one end of the resistor R7 of the external output terminal plate 261. Therefore, the photocoupler PR1 of the external output terminal plate 261 is not energized, and the pulse signal is not output to the hall computer 262.

On the other hand, when the OUT terminal voltage of the timer IC1 is zero volt (when about 10 ms has elapsed since the inner frame 12 or the front frame 14 was opened), no voltage is applied to the resistor R4, so that the internal resistance R5 of the transistor TR1 No voltage is applied between one end of the transistor TR1 and the emitter terminal e of the transistor TR1. As a result, the connection between the collector terminal c of the transistor TR1 and the emitter terminal e of the transistor TR1 is cut off. Therefore, even if the switch SW1 or the switch SW2 is in the conductive state (the inner frame 12 or the front frame 14 is in the open state), no current is supplied to one end of the resistor R7 of the external output terminal plate 261. Therefore, the photocoupler PR1 of the external output terminal plate 261 is not energized, and the pulse signal is not output to the hall computer 262.

In this way, when the inner frame 12 or the front frame 14 is in the open state, the photocoupler PR1 of the external output terminal plate 261 can be energized for about 10 ms. Therefore, when the inner frame 12 or the front frame 14 is opened, a pulse signal having a pulse width of about 10 ms can be output from the external output terminal plate 261 to the hall computer 262.

The TH terminal of the timer IC1 is a terminal for measuring the voltage applied to the TH terminal, and is connected to the other end of the resistor R1, one end of the capacitor CD3, and the DCH terminal of the timer IC1. The DCH terminal of the timer IC1 has a voltage (about 7.5 volts) that is two-thirds of the DC voltage (about 11.3 volts) in which the voltage applied to the TH terminal of the timer IC1 is input to the VDD terminal of the timer IC1. It is a terminal that switches the impedance of the DCH terminal from the infinite state to the zero state when it becomes. When the impedance of the DCH terminal becomes zero (ground state), no voltage can be applied to the capacitor CD3. On the other hand, when the impedance of the DCH terminal becomes infinite, a voltage can be applied to the capacitor CD3.

The inner frame 12 or the front frame 14 of the resistor R1 and the capacitor CD3 connected to the TH terminal of the timer IC1 and the DCH terminal of the timer IC1 are opened based on the time constant which is the product of the resistance value of the resistor R1 and the capacitor CD3. When this is done, it is a component for determining the period until the voltage of about 10.6 volts output from the OUT terminal of the timer IC 1 is switched to zero volts to be about 10 ms. One end of the resistor R1 is connected to the other end of the switch SW1, the other end of the switch SW2, and one end of the resistor R7 of the external output terminal plate 261. The other end of the resistor R1 is connected to the TH terminal of the timer IC1, the DCH terminal of the timer IC1, and one end of the capacitor CD3. The other end of the capacitor CD3 is grounded.

Here, the resistor R1 and the capacitor CD3 will be described together with the TRG terminal of the timer IC1, the TH terminal of the timer IC1, the DCH terminal of the timer IC1, and the OUT terminal of the timer IC1.

When the inner frame 12 and the front frame 14 are closed (when the switch SW1 and the switch SW2 are cut off), no voltage is supplied to the resistor R1, so that the voltage applied to the TH terminal of the timer IC1 is zero volt (about 7.5 volt). The impedance of the DCH terminal of the timer IC1 is set to infinite. Therefore, a voltage can be applied to the capacitor CD3, and the capacitor CD3 is in a rechargeable state (a state in which electric charges can be stored). However, when the switch SW1 and the switch SW2 are cut off, the connection between one end of the capacitor CD1 and the resistor R1 is cut off, so that no voltage is applied to the capacitor CD3 and the voltage applied to the capacitor CD3 is zero volt. It becomes. In this way, the capacitor CD3 is in a rechargeable state, but is not charged. At this time, the voltage of the OUT terminal of the timer IC1 is about 10.6 volts, and the collector terminal c and the emitter terminal e of the transistor TR1 are conductive. However, since the switch SW1 and the switch SW2 are in the cutoff state, no current is supplied to one end of the resistor R7 of the external output terminal plate 261. Therefore, the photocoupler PR1 of the external output terminal plate 261 is not energized, and the pulse signal is not output from the external output terminal plate 261 to the hall computer 262.

Next, when the inner frame 12 or the front frame 14 is in the open state (see FIG. 5B) and the switch SW1 or the switch SW2 is in the conductive state, the voltage applied to the TRG terminal of the timer IC1 (to the resistor R7). The applied voltage) switches from zero volt to about 11.3 volt. At this time, the voltage of the OUT terminal of the timer IC1 is about 10.6 volts, and the collector terminal c and the emitter terminal e of the transistor TR1 are conducting. Therefore, the current supply to one end of the resistor R7 is started, and the photocoupler PR1 of the external output terminal plate 261 is energized. As a result, the signal is started to be output to the hall computer 262.

Further, at the same time that the voltage applied to the TRG terminal of the timer IC1 (the voltage applied to the resistor R7) is switched from zero volt to about 11.3 volt, the voltage is applied to the capacitor CD3 to charge the capacitor CD3. It will be started. At this time, the voltage applied to the TH terminal of the timer IC1 starts to rise.

The voltage of the OUT terminal of the timer IC1 is 2 / of the voltage applied to the TH terminal of the timer IC1 (voltage applied to the capacitor CD3) and the voltage input to the VDD terminal of the timer IC1 (about 11.3 volts). Keep about 10.6 volts until it equals the voltage of 3, i.e. about 7.5 volts. When the voltage applied to the TH terminal of the timer IC1 (voltage applied to the capacitor CD2) rises and becomes equal to about 7.5 volts, the impedance of the DCH terminal of the timer IC1 changes from infinite to zero (ground). Switch to the state where it was done). Then, the voltage applied to the capacitor CD3 becomes a zero volt state, and the electric charge stored in the capacitor CD3 is discharged. As a result, the voltage applied to the TH terminal of the timer IC1 is switched from about 7.5 volts to zero volts. By switching the voltage applied to the TH terminal of the timer IC 1, the voltage of the OUT terminal of the timer IC 1 switches from about 10.6 volts to zero volts. Then, the continuity between the collector terminal c and the emitter terminal e of the transistor TR1 is cut off, and the current supply to one end of the resistor R7 is stopped. As a result, the energization of the external output terminal plate 261 to the photocoupler PR1 is stopped, and the output of the signal to the hall computer 262 is stopped.

In this way, when the inner frame 12 or the front frame 14 is in the open state and the switch SW1 or the switch SW2 is in the conductive state (see FIG. 5B), the output is output from the OUT terminal of the timer IC1. The period until the voltage of about 10.6 volts is switched to zero volts, that is, the period until the voltage applied to the TH terminal of the timer IC1 (voltage applied to the capacitor CD3) changes from zero volts to about 7.5 volts. , It is determined to be about 10 ms based on the time constant which is the product of the resistance value of the resistor R1 and the capacitance of the capacitor CD3. Then, when the inner frame 12 or the front frame 14 is opened, the current is started to be supplied to one end of the resistor R7 of the photocoupler PR1 of the external output terminal plate 261. Then, about 10 ms after the start of supplying the current to one end of the resistor R7, the voltage of about 10.6 volt output from the OUT terminal of the timer IC1 is switched to zero volt, and the collector terminal c and the emitter terminal of the transistor TR1 are switched to zero volt. The continuity with e is cut off, and the current supply to one end of the resistor R7 is stopped. As a result, when the inner frame 12 or the front frame 14 is opened, a current is supplied to one end of the resistor R7 of the external output terminal plate 261 by about 10 ms, and the photocoupler PR1 of the external output terminal plate 261 is supplied with the photocoupler PR1 for about 10 ms. It can be energized only during the period. Therefore, when the inner frame 12 or the front frame 14 is opened, a pulse signal having a pulse width of about 10 ms can be output from the external output terminal plate 261 to the hall computer 262.

When the inner frame 12 and the front frame 14 change from the open state to the closed state (the switch SW1 and the switch SW2 are in the cutoff state from the conductive state), that is, the voltage applied to the TRG terminal of the timer IC1 (applied to the resistor R7). When the voltage) is switched from about 11.3 volts to zero volts, the voltage at the OUT terminal of the timer IC1 is switched from zero volts to about 10.6 volts. In this state, as described above, the collector terminal c and the emitter terminal e of the transistor TR1 are conducting, but since the switch SW1 and the switch SW2 are in the cutoff state, they are connected to one end of the resistor R7 of the external output terminal plate 261. Is not supplied with current. Therefore, the photocoupler PR1 of the external output terminal plate 261 is not energized, and the pulse signal is not output from the external output terminal plate 261 to the hall computer 262.

As described above, when the inner frame 12 or the front frame 14 is opened, one end of the resistor R7 of the external output terminal plate 261 is applied based on the time constant which is the product of the resistance value of the resistor R1 and the capacitor CD3. A current is supplied for about 10 ms, and the photocoupler PR1 of the external output terminal plate 261 can be energized for about 10 ms. As a result, when the inner frame 12 or the front frame 14 is opened, a pulse signal having a pulse width of about 10 ms can be output from the external output terminal plate 261 to the hall computer 262.

Returning to the description of FIG. The CNT terminal of the timer IC1 is a terminal that adjusts the output period of the voltage output from the OUT terminal of the timer IC1 according to the signal input to the CNT terminal. However, since the frame open detection circuit 260 does not adjust the output period of the voltage output from the OUT terminal of the timer IC1 (the output period of the voltage output from the OUT terminal of the timer IC1 is fixed at 10 ms), the timer IC1 The CNT terminal is not connected to any of the components of the frame opening detection circuit 260 and the external output terminal plate 261 and is open.

As described above, in the frame open detection circuit 260, when the inner frame 12 or the front frame 14 is in the open state and the switch SW1 or the switch SW2 is in the conductive state (see FIG. 5B), the external output terminal plate 261 Start supplying current to one end of the resistor R7. On the other hand, the frame open detection circuit 260 cuts off the connection between the collector terminal c of the transistor TR1 and the emitter terminal e of the transistor TR1 from the conductive state when about 10 ms has passed since the inner frame 12 or the front frame 14 was opened. The state is switched to, and the current supply to one end of the resistor R7 of the external output terminal plate 261 is stopped. As a result, the photocoupler PR1 of the external output terminal plate 261 is energized for about 10 ms, and a pulse signal having a pulse width of about 10 ms is output from the external output terminal plate 261 to the hall computer 262.

In the door opening detection circuit 260, an LMC555 is used for the timer IC1 to detect the opening of the inner frame 12 or the opening of the front frame 14, and realize a circuit in which the photocoupler PR1 is energized for about 10 ms. It is not limited. That is, by using another integrated circuit or the like for the timer IC 1, a circuit that generates one pulse signal for one opening of the inner frame 12 or one opening of the front frame 14 is realized. The photocoupler PR1 may be energized for a predetermined period based on the pulse signal.

Next, the external output terminal board 261 connected to the frame opening detection circuit 260 and also connected to the hall computer 262 will be described. The external output terminal plate 261 has a function of outputting a pulse signal having a pulse width of about 10 ms to the hall computer 262, and is mainly composed of a 1 kΩ resistor R7 and a photocoupler PR1.

The resistor R7 is a resistor that limits the current supplied to the photocoupler PR1, and one end of the resistor R7 is connected to one end of the resistor R1 of the frame opening detection circuit 260, the other end of the switch SW1, and the other end of the switch SW2. The other end of the resistor R7 is connected to the primary side of the photocoupler PR1 (the anode terminal of the light emitting diode). The photocoupler PR1 is a current switch composed of a light emitting diode and a light receiving element (phototransistor) that receives light emitted by the light emitting diode. As described above, in the light emitting diode on the primary side of the photocoupler PR1, the anode terminal is connected to one end of the resistor R7, and the cathode terminal is connected to the collector terminal c of the transistor TR1 of the frame opening detection circuit 260. Further, the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 is connected to the hall computer 262.

Therefore, the collector terminal c of the transistor TR1 and the emitter terminal e of the transistor TR1 are electrically connected for about 10 ms after the inner frame 12 or the front frame 14 is in the open state (the switch SW1 or the switch SW2 is in the conductive state). Then, a current is supplied to the light emitting diode on the primary side of the photocoupler PR1 via the resistor R7, and the light emitting diode emits light for about 10 ms. Then, the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 receives the emitted light and changes the received light of about 10 ms into a pulse signal (electric signal) having a pulse width of about 10 ms. The pulse signal is output to the hall computer 262. The hall computer 262 can store the pulse signal output from the light receiving element (phototransistor) on the secondary side of the photocoupler PR1. Therefore, it is possible to make the hall computer 262 store that the inner frame 12 has been opened or the front frame 14 has been opened.

On the other hand, when the inner frame 12 and the front frame 14 are closed (when the switch SW1 and the switch SW2 are shut off), no voltage is supplied to one end of the resistor R7, so that the light emitting diode which is the primary side of the photocoupler PR1. No current is supplied to the LED. Therefore, the pulse signal is not output from the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 to the hall computer 262.

Here, the advantage of using the photocoupler PR1 for the external output terminal plate 261 that outputs a pulse signal to the hall computer 262 will be described. The photocoupler PR1 has a configuration (light emission) that converts a current supplied to a light emitting diode on the primary side into light, receives the light on a light receiving element (phototransistor) on the secondary side, and outputs a pulse signal (electric signal). A configuration in which a signal is transmitted from a diode to a light receiving element in one direction). Therefore, an electric signal such as a pulse signal cannot be transmitted from the light receiving element (phototransistor) on the secondary side to the light emitting diode on the primary side. As a result, even if the frame opening detection circuit 260 is connected to the light emitting diode on the primary side of the photocoupler PR1 and the hall computer 262 is connected to the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, the hall computer 262 It is not possible to transmit an electric signal such as a pulse signal from the above to a main control device 110 or the like provided with a frame opening detection circuit 260 or a frame opening detection circuit 260. Therefore, by using the photocoupler PR1, it is possible to prevent the transmission of electric signals such as an illegal pulse signal from the hall computer 262 to the frame opening detection circuit 260, the main control device 110, etc., and from the external output terminal board 261 to the hall computer. There is an advantage that a pulse signal can be transmitted to 262.

Further, in the photocoupler PR1, the light emitting diode on the primary side and the light receiving element (phototransistor) on the secondary side are electrically insulated. Therefore, for example, even if the current supplied to the light emitting diode of the photocoupler PR1 contains electrical noise, the electrical noise is not transmitted to the phototransistor on the secondary side. Therefore, by using the photocoupler PR1, the external output terminal plate 261 has an advantage that an accurate pulse signal can be output to the hall computer 262.

As described above, since the frame opening detection circuit 260 is provided with the 0.1F capacitor CD1, the frame opening detection circuit 260 is supplied with power to the pachinko machine 10 and has a DC power supply of DC1 to 12 volts. It operates naturally when a DC voltage is supplied, and further, for example, when the business hours of the amusement park are over, the power supply to the pachinko machine 10 is cut off, and a DC voltage of 12 volts is supplied from the DC power supply DC1. Even if this is not the case, the opening of the inner frame 12 and the opening of the front frame 14 can be detected. Then, when the opening of the inner frame 12 or the opening of the front frame 14 is detected by the frame opening detection circuit 260, a pulse signal having a pulse width of about 10 ms can be output from the external output terminal plate 261 to the hall computer 262. The pulse signal output from the external output terminal plate 261 to the hall computer 262 is stored in the hall computer 262 that continues to operate for 24 hours.

Here, in general, the amusement park has a crime prevention contract with a private security company, and if there is an intruder into the amusement park, a security guard of the security company immediately rushes to the amusement park. However, since the fraudulent activity is carried out in a short time, when the guards rush in, in most cases, the intruder has already escaped from the amusement park, and it is not possible to determine which pachinko machine 10 the fraudulent activity was committed to. There was a problem. The pachinko machine 10 that has been cheated must be returned to a normal state, but if it is not known which pachinko machine 10 has been cheated, the inner frame 12 and the front frame 14 of all the pachinko machines 10 are used. It had to be opened and inspected one by one, and performing this work in the amusement park where a large number of pachinko machines 10 were installed was a considerable amount of hard work.

However, according to the pachinko machine 10 of the present embodiment, when the opening of the inner frame 12 or the opening of the front frame 14 is detected by the frame opening detection circuit 260, the pulse width from the external output terminal plate 261 to the hall computer 262 is reduced. A pulse signal of 10 ms is output. Then, the output pulse signal is stored in the hall computer 262. Therefore, the pachinko machine 10 in which the inner frame 12 or the front frame 14 is opened can be identified by the pulse signal stored in the hall computer 262. Further, by storing the pulse signal output from the external output terminal plate 261 to the hall computer 262 and the output time of the output pulse signal, the opening time of the inner frame 12 of the specified pachinko machine 10 or the opening time or The opening time of the front frame 14 can be detected.

For example, when the business hours of the amusement park are over, the power supply to the pachinko machine 10 is cut off, and the DC voltage is supplied from the capacitor CD1 to the frame opening detection circuit 260 and the external output terminal plate 261. When the total supply period of the current from the CD1 to the photocoupler PR1 due to the opening of the frame 12 or the front frame 14 is lengthened, or the number of times the opening of the inner frame 12 or the front frame 14 is detected is increased, the capacitor is used. The capacity of the CD1 may be increased (for example, the capacity of the capacitor CD1 is 1F), or the capacitor CD1 may be changed to a secondary battery having a large storage capacity.

Next, referring to FIG. 8, the TRG terminal voltage (external output terminal plate) of the timer IC1 changes according to the state of the switch SW1 (the state of the inner frame 12) and the state of the switch SW2 (the state of the front frame 14). The relationship between the voltage applied to one end of the resistor R7 of 261), the OUT terminal voltage of the timer IC1, and the output of the external output terminal plate 261 (input of the hall computer 262) will be described. FIG. 8 shows the state of the switch SW1 (the state of the inner frame 12), the state of the switch SW2 (the state of the front frame 14), and the TRG terminal voltage of the timer IC1 (the voltage applied to one end of the resistor R7 of the external output terminal plate 261). ), The timing chart showing the relationship between the OUT terminal voltage of the timer IC1 and the output (input of the hall computer 262) of the external output terminal plate 261.

As shown in FIG. 8 (a), when the switch SW1 is in the conductive state (the inner frame 12 is in the open state) at t1, the TRG terminal voltage (external output terminal plate) of the timer IC1 is shown in FIG. 8 (c). The voltage applied to one end of the resistor R7 of 261) switches from zero volt to about 11.3 volt at t1. At this time, as shown in FIG. 8D, the timer IC1 continues to output a voltage of about 10.6 volts from the OUT terminal until about 10 ms elapses from t1 o'clock. As a result, the current supply to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 7) is started (at t1). Then, as shown in FIG. 8E, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from the low state to the high state at t1. It changes. As a result, the output of the pulse signal indicating the opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

Then, when about 10 ms elapses from t1 o'clock, as shown in FIG. 8D, the timer IC1 switches the voltage of the OUT terminal from about 10.6 volts to zero volts. Then, the current supply to one end of the resistor R7 of the external output terminal plate 261 is stopped. Therefore, the output of the external output terminal plate 261 switches from the high state to the low state 10 ms after t1 o'clock. By switching the output of the external output terminal plate 261 in this way, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

As shown in FIG. 8A, when the switch SW1 is in the cutoff state (inner frame 12 is in the closed state) at t2, the TRG terminal voltage (external output) of the timer IC1 is shown in FIG. 8C. The voltage applied to one end of the resistor R7 of the terminal plate 261) switches from about 11.3 volts to zero volts, and the OUT terminal voltage of the timer IC1 switches from zero volts to about 10.6 volts (at t2). As a result, the frame opening detection circuit 260 is set to a state in which the inner frame 12 and the front frame 14 can be detected again.

Next, as shown in FIG. 8 (a), when the switch SW2 is in the conductive state (the front frame 14 is in the open state) at t3, the TRG terminal voltage (external) of the timer IC1 is shown in FIG. 8 (c). The voltage applied to one end of the resistor R7 of the output terminal plate 261) switches from zero volt to about 11.3 volt at t3. At this time, as shown in FIG. 8D, the timer IC1 continues to output a voltage of about 10.6 volts from the OUT terminal until about 10 ms elapses from t3. As a result, the current supply to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 7) is started (at t3). Then, as shown in FIG. 8E, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from the low state to the high state at t3. It changes. As a result, the output of the pulse signal indicating the opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

Then, about 10 ms after t3, as shown in FIG. 8D, the timer IC1 switches the voltage of the OUT terminal from about 10.6 volts to zero volts. Then, the current supply to one end of the resistor R7 of the external output terminal plate 261 is stopped. Therefore, the output of the external output terminal plate 261 switches from the high state to the low state 10 ms after t3 o'clock. By switching the output of the external output terminal plate 261 in this way, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

As shown in FIG. 8A, when the switch SW2 is in the cutoff state (the front frame 14 is in the closed state), the TRG terminal voltage of the timer IC1 (external output terminal plate 261) is shown in FIG. The voltage applied to one end of the resistor R7) switches from about 11.3 volts to zero volts, and the OUT terminal voltage of the timer IC1 switches from zero volts to about 10.6 volts (at t4). As a result, the frame opening detection circuit 260 is set to a state in which the inner frame 12 and the front frame 14 can be detected again.

Finally, a case where the switch SW2 is in the conductive state (the front frame 14 is in the open state) when the switch SW1 is in the conductive state (the inner frame 12 is in the open state) will be described. As shown in FIG. 8 (a), the switch SW1 is in a conductive state (inner frame 12 is in an open state) at t5, and further, as shown in FIG. 8 (b), the switch SW2 is in a conductive state (front surface) at t6. When the frame 14 is in the open state), as shown in FIG. 8C, the TRG terminal voltage of the timer IC1 (the voltage applied to one end of the resistor R7 of the external output terminal plate 261) is about zero volt at t5. Switch to 11.3 volts. At this time, as shown in FIG. 8D, the timer IC1 continues to output a voltage of about 10.6 volts from the OUT terminal until about 10 ms elapses from t5 o'clock. As a result, the current supply to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 7) is started (at t5). Then, as shown in FIG. 8E, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from the low state to the high state at t5. It changes. As a result, the output of the pulse signal indicating the opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

Then, about 10 ms after t5, as shown in FIG. 8D, the timer IC1 switches the voltage of the OUT terminal from about 10.6 volts to zero volts. Then, the current supply to one end of the resistor R7 of the external output terminal plate 261 is stopped. Therefore, the output of the external output terminal plate 261 switches from the high state to the low state 10 ms after t5 o'clock. By switching the output of the external output terminal plate 261 in this way, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

As shown in FIG. 8A, the switch SW1 is in the shutoff state (inner frame 12 is in the closed state) at t7, and as shown in FIG. 8B, the switch SW2 is in the shutoff state at t8. When (the front frame 14 is in the closed state), as shown in FIG. 8C, the TRG terminal voltage of the timer IC1 (the voltage applied to one end of the resistor R7 of the external output terminal plate 261) is about 11.3 volts. At the same time, the OUT terminal voltage of the timer IC1 switches from zero volt to about 10.6 volt (at 8 o'clock). As a result, the frame opening detection circuit 260 is set to a state in which the inner frame 12 and the front frame 14 can be detected again.

In this way, when the switch SW1 is in the conductive state (the inner frame 12 is in the open state), even if the switch SW2 is in the conductive state (the front frame 14 is in the open state), the timer IC1 keeps the continuity period of the switch SW1. (The length of the opening period of the inner frame 12) and the length of the conduction period of the switch SW2 (the length of the opening period of the front frame 14), either the switch SW1 or the switch SW2 is in the conductive state. When about 10 ms has elapsed from the time when either the inner frame 12 or the front frame 14 is in the open state, the voltage of the OUT terminal is switched from about 10.6 volts to zero volts. As a result, the supply period of the current supplied to the photocoupler PR1 of the external output terminal plate 261 becomes about 10 ms.

Therefore, for example, when the business hours of the amusement park are over and the power supply to the pachinko machine 10 is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1 to the frame opening detection circuit 260 and the external output terminal board 261. That is, when a DC voltage of about 11.3 volts is supplied from the capacitor CD1 to the frame open detection circuit 260 and the external output terminal plate 261, the supply period of the current supplied from the capacitor CD1 to the photocoupler PR1 is set as the inner frame. It can be limited to about 10 ms per opening of 12 or the front frame 14. Therefore, the power consumption due to the opening of the inner frame 12 or the front frame 14 can be suppressed to a small value.

Here, since the capacitor CD1 has a capacitance of 0.1 F and the voltage applied to the capacitor CD1 is about 11.3 volts, the electric charge stored in the capacitor CD1 is the capacitance of the capacitor CD1 and the applied voltage of the capacitor CD1. From the product of, it becomes about 1.13C (coulomb). The electric charge of about 1.13C stored in the capacitor CD1 corresponds to about 500 times of current supply when the current supply period from the capacitor CD1 to the photocoupler PR1 is about 10 ms. To do. Therefore, for example, when the business hours of the amusement park are over, the power supply to the pachinko machine 10 is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1, the inner frame 12 is opened (switch SW1). Even when the front frame 14 is opened (conducting) or the front frame 14 is opened (conducting the switch SW2) many times, the frame opening detection circuit 260 still opens the inner frame 12 or the front frame 14 (continuing the switch SW1). The continuity of the switch SW2) can be reliably detected up to about 500 times each time, and a pulse signal can be output from the external output terminal board 261 to the hall computer 262. At this time, when the inner frame 12 is opened or the front frame 14 is opened about 500 times, the electric charge stored in the capacitor CD1 decreases, and the current value supplied from the capacitor CD1 to the photocoupler PR1 decreases, but the hole By increasing the detection sensitivity of the pulse signal of the computer 262 (by lowering the threshold value for the amplitude of the pulse signal), the hall computer 262 can store the pulse signal.

In the present embodiment, when the inner frame 12 or the front frame 14 is open and the switch SW1 or the switch SW2 is electrically connected, a pulse signal is output from the external output terminal plate 261 to the hall computer 262. It is not limited to this. That is, when the connection of each component of the main frame opening detection circuit 260 is changed, the inner frame 12 or the front frame 14 is opened, and the opened inner frame 12 or the front frame 14 is closed, the photocoupler PR1 is connected. A current may be supplied for about 10 ms to output a pulse signal from the external output terminal board 261 to the hall computer 262.

However, in the frame opening detection circuit 260 of the present embodiment, when the inner frame 12 or the front frame 14 is opened and the switch SW1 or the switch SW2 is electrically connected, a pulse signal is transmitted from the external output terminal plate 261 to the hall computer 262. Is configured to output, so that the opening of the inner frame 12 or the front frame 14 can be quickly detected. Therefore, it is possible to detect the opening of the inner frame 12 or the front frame 14 before the inner frame 12 or the front frame 14 is opened and the main control device 110 or the game board 13 is cheated. Therefore, it is possible to prevent abnormal operation due to fraudulent acts that occur when power is being supplied to the pachinko machine 10.

The pulse signal output from the external output terminal plate 261 to the hall computer 262 is stored in the hall computer 262 that continues to operate for 24 hours. Therefore, the pachinko machine 10 in which the inner frame 12 or the front frame 14 is opened can be identified by the pulse signal stored in the hall computer 262. Further, by storing the pulse signal output from the external output terminal plate 261 to the hall computer 262 and the output time of the output pulse signal, the opening time of the inner frame 12 of the specified pachinko machine 10 or the opening time or The opening time of the front frame 14 can be detected.

Further, when the inner frame 12 and the front frame 14 are closed (when the switch SW1 and the switch SW2 are shut off), the OUT terminal voltage of the timer IC1 is about 10.6 volts, so that the frame open detection circuit 260 The collector terminal c of the transistor TR1 and the emitter terminal e (see FIG. 7) of the transistor TR1 are in a conductive state. However, at this time, the only current flowing through the transistor TR1 is the base current. Both the resistor R3 and the resistor R5 that determine the current value of the base current have a resistance value of 10 kΩ, which is sufficiently larger than the resistance value (1 kΩ) of the resistor R7 that limits the current supplied to the photocoupler PR1. Therefore, the current value of the base current can be kept at about 100 μA (note that the current value supplied to the photocoupler PR1 when the switch SW1 and the switch SW2 are conducting is about 11.3 mA). Therefore, the consumption of the electric charge stored in the capacitor CD1 due to the conduction state of the transistor TR1 can be stopped very slightly.

Further, when the inner frame 12 and the front frame 14 are closed (when the switch SW1 and the switch SW2 are shut off), the OUT terminal voltage of the timer IC1 is about 10.6 volts, so that the OUT terminal of the timer IC1 Current is consumed through resistors R3 and R4 connected in series between and ground. However, both the resistor R3 and the resistor R4 have a resistance value of 10 kΩ, which is sufficiently larger than the resistance value (1 kΩ) of the resistor R7 that limits the current supplied to the photocoupler PR1. Therefore, when the inner frame 12 and the front frame 14 are closed, the current value flowing from the OUT terminal of the timer IC1 to the ground via the resistors R3 and R4 can be kept at about 530 μA. Therefore, the consumption of the electric charge stored in the capacitor CD1 by the resistors R3 and R4 can be stopped very slightly.

When the inner frame 12 and the front frame 14 are closed (when the switch SW1 and the switch SW2 are cut off), the consumption of the electric charge stored in the capacitor CD1 due to the base current of the transistor TR1 and the resistance R3 and If it is desired to further suppress the consumption of the electric charge stored in the capacitor CD1 by the resistor R4, the resistance values of the resistors R3, R4 and R5 may be further increased to more than 10 kΩ.

Further, when the inner frame 12 and the front frame 14 are closed and the switch SW1 and the switch SW2 are shut off, the charge stored in the capacitor CD1 due to the base current of the transistor TR1 is consumed and the capacitor CD1 due to the resistors R3 and R4. If you want to reduce the consumption of the electric charge stored in the capacitor to zero, you can use the following configuration. The male switch SW1b and the male switch SW2b are further provided on the switch SW1 and the switch SW2, respectively, and the male switch SW1b and the male switch SW2b arranged on the switch SW1 and the switch SW2 are provided with two male switches SW1b and two male switches SW2b, respectively. Correspondingly, the switch SW1 and the switch SW2 are further provided with the female switch SW1a and the female switch SW2a, respectively, and the female switch SW1a and the female switch SW2a arranged on the switch SW1 and the switch SW2 are provided with 2 respectively. Make them one by one. As a result, one new combination of the male switch SW1b and the female switch SW1a is added to the switch SW1. Similar to the switch SW1, a new combination of the male switch SW2b and the female switch SW2a is added to the switch SW2. Then, the connection between the OUT terminal of the timer IC1 in the frame opening detection circuit 260 and one end of the resistor R3 is disconnected, and the female switch SW1a newly added to the OUT terminal of the timer IC1 after the connection is disconnected is built in. Connect one end of a pair of terminals to SW1c. Then, the other end of the pair of terminals / SW1c built in the newly added female switch SW1a is connected to one end of the resistor R3 after the connection is disconnected. Similarly, one end of a pair of terminals vs. SW2c built in the newly added female switch SW2a is connected to the OUT terminal of the timer IC1 after the connection is disconnected. Then, the other end of the pair of terminals / SW2c built in the newly added female switch SW2a is connected to one end of the resistor R3 after the connection is disconnected. With this configuration, when the inner frame 12 and the front frame 14 are closed and the switch SW1 and the switch SW2 are shut off, about 10.6 volts, which is the OUT terminal voltage of the timer IC1, is the resistor R3. It is not applied to the resistors R4 and R5, and the consumption of the electric charge stored in the capacitor CD1 by the base current of the transistor TR1 and the consumption of the electric charge stored in the capacitor CD1 by the resistors R3 and R4 can be reduced to zero. it can. On the contrary, when one of the inner frame 12 or the front frame 14 or both the inner frame 12 and the front frame 14 are open (one of the switch SW1 or the switch SW2, or both the switch SW1 and the switch SW2). The OUT terminal voltage of the timer IC1 is divided and applied to the resistor R3, the resistor R4, the resistor R5, the resistor R6, and the capacitor CD2 to supply a current to the photocoupler PR1. It can be done normally through the resistor R7.

The location where the connection with the OUT terminal of the timer IC1 is cut off and the terminal pair SW1c and the terminal pair SW2c are connected is not limited to the above. For example, a pair built in a newly added female switch SW1a at the other end of the resistor R3 after cutting the other end of the resistor R3 and one end of the resistor R4, the resistor R5 and the capacitor CD2 and disconnecting the connection. Connect one end of SW1c to the terminal of. Then, the other end of the pair of terminals / SW1c built in the newly added female switch SW1a is connected to one end of the resistor R4, the resistor R5, and the capacitor CD2 after the connection is disconnected. Similarly, one end of a pair of terminals pair SW2c built in the newly added female switch SW2a is connected to the other end of the resistor R3 after the connection is disconnected. Then, the other end of the pair of terminals / SW2c built in the newly added female switch SW2a may be connected to one end of the resistor R4, the resistor R5, and the capacitor CD2 after the connection is disconnected. That is, when the inner frame 12 and the front frame 14 are closed by the newly added male switch SW1b and female switch SW1a and the newly added male switch SW2b and female switch SW2a. (When the switch SW1 and the switch SW2 are cut off), while cutting off the continuity between the OUT terminal of the timer IC1 and the ground, one of the inner frame 12 or the front frame 14, or the inner frame 12 and the front frame 14 When both are open (one of the switch SW1 and the switch SW2, or both the switch SW1 and the switch SW2 are conducting), the resistance R3, the resistance R4, the resistance R5, the resistance R6 and The OUT terminal voltage of the timer IC1 may be divided and applied to the capacitor CD2.

Further, when it is desired to separately store in the hall computer 262 which of the inner frame 12 and the front frame 14 is opened, the following configuration may be used. First, the frame opening detection circuit 260 and the external output terminal plate 261 used in the present embodiment are newly provided one by one, the switch SW2 connected in parallel to the switch SW1 is disconnected, and the disconnected switch SW2 is newly provided. It may be connected to the provided frame opening detection circuit 260. Specifically, one end of the disconnected switch SW2 is connected to one end of the capacitor CD1 of the newly provided frame opening detection circuit 260, the VDD terminal of the timer IC1, one end of the capacitor CD4, and the RES terminal of the timer IC1 and disconnected. The other end of the switch SW2 may be connected to one end of the capacitor CD5 of the newly provided frame opening detection circuit 260, one end of the resistor R1, and one end of the resistor R7 of the external output terminal board 261. In this way, the frame opening detection circuit 260 and the external output terminal plate 261 are newly provided, and only the switch SW2 is connected to the newly provided frame opening detection circuit 260, and the switch is connected to the existing frame opening detection circuit 260. By connecting only SW1, when there is continuity of the switch SW1 (opening of the inner frame 12), the pulse signal output from the existing external output terminal plate 261 and the continuity of the switch SW2 (opening of the front frame 14). ), The pulse signal output from the newly provided external output terminal plate 261 can be output to the hall computer 262 separately. Here, the hall computer 262 has an input terminal for a pulse signal output from the existing external output terminal plate 261 (for detecting continuity of the switch SW1 (for detecting the opening of the inner frame 12)) and a newly provided external output terminal. Separate from the input terminal of the pulse signal output from the plate 261 (for detecting the continuity of the switch SW2 (for detecting the opening of the front frame 14)). With this configuration, the continuity of the switch SW1 (opening of the inner frame 12) and the continuity of the switch SW2 (opening of the front frame 14) can be distinguished and stored in the hall computer 262. Therefore, depending on the pulse signal stored in the hall computer 262, there was continuity of the switch SW1 (opening of the inner frame 12), conduction of the switch SW2 (opening of the front frame 14), or both. Can be detected accurately.

Further, when power is being supplied to the pachinko machine 10, which of the inner frame 12 and the front frame 14 is opened is separately stored in the hall computer 262, and the inner frame 12 and the front frame 14 are combined. If the pachinko machine 10 wants to notify when either of them is opened, the following configuration may be used. First, the frame opening detection circuit 260 and the external output terminal plate 261 used in the present embodiment are newly provided one by one, the switch SW2 connected in parallel to the switch SW1 is disconnected, and the disconnected switch SW2 is newly provided. It is connected to the provided frame opening detection circuit 260. Next, the male switches SW1b and SW2b and the female switches SW1a and SW2a are newly provided on the switch SW1 and the switch SW2, respectively. Then, when the inner frame 12 or the front frame 14 is opened and the switch SW1 or the switch SW2 becomes conductive by using the newly provided male switches SW1b and SW2b and the female switches SW1a and SW2a, a signal is sent to the MPU 201. It may be configured to be input.

Specifically, one end of the disconnected switch SW2 is connected to one end of the capacitor CD1 of the newly provided frame opening detection circuit 260, the VDD terminal of the timer IC1, one end of the capacitor CD4, and the RES terminal of the timer IC1 and disconnected. The other end of the switch SW2 may be connected to one end of the capacitor CD5 of the newly provided frame opening detection circuit 260, one end of the resistor R1, and one end of the resistor R7 of the external output terminal board 261. In this way, the frame opening detection circuit 260 and the external output terminal plate 261 are newly provided, and only the switch SW2 is connected to the newly provided frame opening detection circuit 260, and the switch is connected to the existing frame opening detection circuit 260. By connecting only SW1, when there is continuity of the switch SW1 (opening of the inner frame 12), the pulse signal output from the existing external output terminal plate 261 and the continuity of the switch SW2 (opening of the front frame 14). ), The pulse signal output from the newly provided external output terminal plate 261 can be output to the hall computer 262 separately.

Next, the male switch SW1b and the male switch SW2b are further provided on the switch SW1 and the switch SW2, respectively, and the male switch SW1b and the male switch SW2b arranged on the switch SW1 and the switch SW2 are provided with two male switches SW1b and two male switches SW2b, respectively. To do. Correspondingly, the switch SW1 and the switch SW2 are further provided with the female switch SW1a and the female switch SW2a, respectively, and the female switch SW1a and the female switch SW2a arranged on the switch SW1 and the switch SW2 are provided with 2 respectively. Make them one by one. As a result, one new combination of the male switch SW1b and the female switch SW1a is added to the switch SW1. Further, as in the case of the switch SW1, a new combination of the male switch SW2b and the female switch SW2a is added to the switch SW2. Then, one end of the pair of terminals pair SW1c built in the newly added female switch SW1a is connected to the DC power supply DC1 of the existing frame opening detection circuit 260, and built in the newly added female switch SW1a. The other end of the pair of terminals and SW1c is connected to the input / output port 205 of the MPU 201 via a voltage dividing circuit composed of a resistor. Similarly, one end of the pair of terminals vs. SW2c built into the newly added female switch SW2a is connected to the DC power supply DC1 of the newly provided frame opening detection circuit 260, and the newly added female type is used. The other end of the pair of terminals vs. SW2c built in the switch SW2a is connected to the input / output port 205 of the MPU 201 via a voltage divider circuit composed of a resistor, and to a port different from the other end of the terminal pair SW1c. Further, in the MPU 201, the inner frame 12 or the front frame 14 is opened, the switch SW1 or the switch SW2 is conducted, and a voltage of 5 volts (supplied from the DC power supply DC1 by a voltage dividing circuit) for detecting the opening of the inner frame 12 is provided. The 12 volt voltage is stepped down to 5 volt) or the 5 volt voltage that detects the opening of the inner frame 14 (the voltage divider circuit steps down the 12 volt voltage supplied from the DC power supply DC1 to 5 volt). ) Is input to the input / output port 205, a command indicating that the opening of the inner frame 12 or the front frame 14 is detected is transmitted to the voice lamp control device 113 and the display control device 114. At this time, the commands transmitted from the MPU 201 are a command when the opening of the inner frame 12 is detected (hereinafter, referred to as an "inner frame command") and a command when the front frame 14 is opened (hereinafter, "" It is separated from the "front frame command"). Then, the voice lamp control device 113 that has received each of these commands notifies different modes depending on whether the inner frame command is received or the front frame command is received. For example, the voice output device 226 emits a different warning sound, or the lamp display device 227 is lit differently. Further, the display control device 114 that has received each of these commands displays different modes depending on whether the inner frame command is received or the front frame command is received. For example, when the display control device 114 receives the inner frame command, the third symbol display device 81 displays "the inner frame is open", or when the display control device 114 receives the front frame command. The third symbol display device 81 may be configured to display "the front frame is open".

In this way, one new combination of the male switch SW1b and the female switch SW1a is added to the switch SW1, and the switch SW2 is also newly combined with the male switch SW2b and the female switch SW2a in the same manner as the switch SW1. When the switch SW1 is conducted (when the inner frame 12 is opened), the MPU 201 issues an inner frame command to the voice lamp control device 113 and the display control device 114 by using them. Configure to send. Further, when the switch SW2 is electrically connected (when the front frame 14 is opened), the MPU 201 is configured to transmit a front frame command to the voice lamp control device 113 and the display control device 114. With this configuration, the voice lamp control device 113 and the display control device 114 can be used to perform notification in different modes depending on whether the inner frame 12 is opened or the front frame 14 is opened. Can be done. As a result, the pachinko machine 10 is used to accurately determine whether the switch SW1 is conducting (opening the inner frame 12), the switch SW2 is conducting (opening the front frame 14), or both. Can be detected.

Further, a frame opening detection circuit 260 and an external output terminal plate 261 are newly provided, and only the switch SW2 is connected to the newly provided frame opening detection circuit 260, and the switch SW1 is connected to the existing frame opening detection circuit 260. By connecting only the switch SW1 when there is continuity (opening of the inner frame 12), the pulse signal output from the existing external output terminal plate 261 and the continuity of the switch SW2 (opening of the front frame 14). If there is, the pulse signal output from the newly provided external output terminal plate 261 can be output to the hall computer 262 separately. Therefore, depending on the pulse signal stored in the hall computer 262, there was continuity of the switch SW1 (opening of the inner frame 12), conduction of the switch SW2 (opening of the front frame 14), or both. Can be detected accurately.

In the present embodiment, the pulse signal output from the external output terminal plate 261 is output to the hall computer 262, which is installed at a different location from the pachinko machine 10, but the present invention is not limited to this. A dedicated storage device having the function of the hall computer 262 may be provided for each pachinko machine 10, and the dedicated storage device may be arranged on the back side of each pachinko machine 10 provided with the main control device 110 or the like. In this case, better, a dedicated storage device such as the main control device 110, the payout control device 111, and the launch control device 112 is housed in the board box, and the box base and the box cover provided in the board box. And are connected by a sealing unit (not shown) so that they cannot be opened (connection by a caulking structure). Then, a sealing sticker (not shown) is attached to the connecting portion between the box base and the box cover over the box cover and the box base.

Next, the display contents of the third symbol display device 81 will be described with reference to FIG. FIG. 9 is a drawing for explaining a display screen of the third symbol display device 81, and FIG. 9A is a diagram schematically showing an area division setting and an effective line setting of the display screen. FIG. 9B is a diagram illustrating an actual display screen.

The third symbol is composed of 10 types of main symbols having numbers from "0" to "9" and one type of petal-shaped sub symbol formed smaller than the main symbol. Each main symbol is composed of a rear symbol consisting of a wooden box with numbers from "0" to "9", of which the main symbols with odd numbers (1,3,5,7,9) are , A large number is added to almost the front of the wooden box. On the other hand, the main symbols with even numbers (0,2,4,6,8) are protected almost completely on the front of the wooden box, and attached symbols that imitate characters such as furoshiki and helmets are added. Even numbers are added to the lower right side of the attached symbol so that they are small in green and displayed on the front side of the attached symbol.

Further, in the pachinko machine 10 of the present embodiment, when the lottery result by the main control device 110 is a big hit, a variable display in which the same main symbols are aligned is performed, and a big hit occurs after the variable display is completed. It is configured to do so. When shifting to the high probability state (probability change state) after the jackpot ends, a variable display is performed in which the main symbols with odd numbers added (corresponding to the "high probability symbol") are aligned. On the other hand, when the state shifts to the low-probability state after the jackpot ends, a variable display is performed in which the main symbols to which even numbers are added (corresponding to "low-probability symbols") are aligned. Here, the high-probability state refers to a state in which the probability of a jackpot is increased as an added value after the end of the jackpot, that is, a so-called probability fluctuation (probability change). Further, the normal state (low probability state) refers to a time when the probability is not changed, and means a state in which the jackpot probability is normal, that is, a state in which the jackpot probability is lower than that in the probability change.

As shown in FIG. 9A, the display screen of the third symbol display device 81 is roughly divided into upper and lower halves, and the lower two-thirds are the main display area Dm for variable display of the third symbol, and the rest. The upper 1/3 of is a sub-display area Ds for displaying a notice effect and a character.

In the main display area Dm, three symbol rows Z1, Z2, and Z3 on the left, middle, and right are displayed. In each of the symbol rows Z1 to Z3, the above-mentioned third symbols are displayed in a specified order. That is, in each of the symbol rows Z1 to Z3, the main symbols are arranged in ascending or descending order of numbers, and one sub symbol is arranged between the main symbols. Therefore, a total of 20 third symbols, 10 main symbols and 10 sub-symbols, are set in each symbol row, and each symbol row Z1 to Z3 scrolls from top to bottom with periodicity. The variable display is performed. In particular, in the left symbol row Z1, the numbers of the main symbols appear in descending order, and in the middle symbol row Z2 and the right symbol row Z3, the numbers of the main symbols appear in ascending order.

Further, in the main display area Dm, the third symbol is displayed in the upper, middle, and lower three rows for each symbol row Z1 to Z3. Therefore, the third symbol display device 81 displays a total of nine third symbols in 3 rows × 3 rows. Five effective lines, that is, an upper line L1, a middle line L2, a lower line L3, a right rising line L4, and a left rising line L5 are set in the main display area Dm. Then, in each game, the variable display is stopped in the order of the left symbol row Z1 → the right symbol row Z3 → the middle symbol row Z2, and at the time of the stop, the combination of the jackpot symbols on one of the effective lines (in the present embodiment). If they are aligned with the same combination of main symbols), the jackpot movie will be displayed as a jackpot.

The sub-display area Ds is provided horizontally above the main display area Dm, and is further divided into three notice areas Ds1 to Ds3 in the left-right direction. Here, the left and right notice areas Ds1 and Ds3 are usually covered with a double-door opaque door that is electrically opened and closed by a solenoid (not shown), and sometimes the solenoid is excited to bring the door to the front side. It is a display area that can be visually recognized by the player when it is opened. The central notice area Ds2 is a display area that can always be visually recognized without being covered by the door.

As shown in FIG. 9B, on the actual display screen, a total of nine main symbols and sub-symbols of the third symbol are displayed in the main display area Dm. In the sub-display area Ds, the left and right doors are closed, and the left and right notice areas Ds1 and Ds3 are obscured so that the display screen cannot be visually recognized. If one or both of the left and right doors are opened in the middle of the variable display, a moving image is displayed in the left and right notice areas Ds1 and Ds3, and the player is in a state where it is easier to transition to a jackpot than usual. It is suggested. In the central notice area Ds2, a predetermined character (a boy with a headband in the present embodiment) usually performs a predetermined action, and sometimes a special action different from the predetermined action or another character performs a predetermined action. A notice will be produced by appearing. In principle, the display screen of the third symbol display device 81 is divided into upper and lower display areas Dm and Ds, but the third symbol, characters, and the like are displayed larger across the respective display areas Dm and Ds. Display effects can be performed.

Next, with reference to FIG. 10, a counter and the like provided in the RAM 203 of the main control device 110 will be described. These counters and the like are used in the MPU 201 of the main control device 110 for performing a jackpot lottery, setting the display of the first symbol display device 37, drawing the display result of the second symbol display device 82, and the like.

To set the display of the jackpot lottery and the first symbol display device 37, the first hit random number counter C1 used for the jackpot lottery, the first hit type symbol counter C2 used for selecting the jackpot symbol, and the stop pattern selection counter. C3, the first initial value random number counter CINI1 used for setting the initial value of the first random number counter C1, and the fluctuation type counters CS1, CS2, and CS3 used for the fluctuation pattern selection are used. Further, the second random number counter C4 is used for the lottery of the second symbol display device 82, and the second initial value random number counter CINI2 is used for setting the initial value of the second random number counter C4. Each of these counters is a loop counter in which 1 is added to the previous value each time it is updated, and after reaching the maximum value, it returns to 0.

Each counter is updated at an interval of 4 ms, which is the execution interval of the main process (see FIG. 12), or at an interval of 2 ms, which is the execution interval of the timer interrupt process (see FIG. 15), and the updated value is set in a predetermined area of the RAM 203. It is appropriately stored in the counter buffer. The RAM 203 is provided with a hold ball storage area consisting of one execution area and four hold areas (hold first to fourth areas), and each of these areas has access to the first entry port 64. Each value of the first hit random number counter C1, the first hit type counter C2, and the stop pattern selection counter C3 is stored according to the winning timing of the ball.

Each counter will be described in detail. The first random number counter C1 is configured to be incremented by 1 in order within the range of 0 to 738, and return to 0 after reaching the maximum value (that is, 738). In particular, when the first random number counter C1 makes one round, the value of the first initial value random number counter CINI1 at that time is read as the initial value of the first random number counter C1. Further, the first initial value random number counter CINI1 is configured as a loop counter updated in the same range as the first random number counter C1 (value = 0 to 738), and each time the timer interrupt process (see FIG. 15) is executed. It is updated once and is repeatedly updated within the remaining time of the main process (see FIG. 12). The value of the first random number counter C1 is updated periodically (once for each timer interrupt process in the present embodiment), and the reserved ball is stored in the RAM 203 at the timing when the ball wins the first entry port 64. Stored in the area. The number of random number values that will be a big hit is set for two types, low probability time and high probability time, and the number of random number values that will be a big hit at low probability time is 2, and the value is "373,727". The number of random numbers that are big hits at high probability is 14, and the values are "59,109,163,211,263,317,367,421,479,523,631,683,733".

The first hit type counter C2 determines the display mode of the first symbol display device 37 at the time of a big hit, and in the present embodiment, one is added in order within the range of 0 to 4, and the maximum value ( That is, it is configured to return to 0 after reaching 4). The value of the first hit type counter C2 is updated periodically (once for each timer interrupt process in the present embodiment), and the reserved ball is stored in the RAM 203 at the timing when the ball wins the first entry port 64. Stored in the area. The value of the random number that becomes the high probability state after the big hit is "1, 2, 3", and the value of the random number that becomes the low probability state after the big hit is "0, 4", and two types of hit types are determined. Random numbers. Therefore, the display modes corresponding to the stop symbols displayed on the first symbol display device 37 are a display mode corresponding to two types of jackpots, a high-probability state and a low-probability state, and one type of display mode corresponding to the loss. One of the three display modes in total is selected.

The stop pattern selection counter C3 is configured to be incremented by 1 in order within the range of 0 to 238, and return to 0 after reaching the maximum value (that is, 238). In the present embodiment, the stop pattern selection counter C3 selects the pattern of the effect displayed by the third symbol display device 81, and after the reach occurs, the final stop symbol is shifted by one before and after the reach symbol. A "front-back off reach" (for example, in the range of 0 to 8) that stops, and a "reach other than front-back off" (for example, in the range of 9 to 38) in which the final stop symbol stops outside the front and back of the reach symbol after the same reach occurs. , Three stop (effect) patterns with "complete deviation" (for example, in the range of 39 to 238) where reach does not occur are selected. The value of the stop pattern selection counter C3 is updated periodically (once for each timer interrupt process in the present embodiment), and the reserved ball storage area of the RAM 203 is stored at the timing when the ball wins the first ball entry port 64. Stored in.

Further, the stop pattern selection counter C3 is provided with a plurality of tables having different ranges of random values for which the stop pattern is selected. This depends on whether the current state of the pachinko machine 10 is a high probability state or a low probability state, in which area of the holding ball storage area each random value is stored (that is, the number of holdings), and the like. This is to change the selection ratio of the stop pattern.

For example, in a high-probability state, a table with a wide range of random values of 10 to 238 corresponding to the "completely off" stop pattern is selected so that the reach effect is not selected more than necessary because a big hit is likely to occur. "Completely off" is easily selected. In this table, the "reach outside the front and rear" is narrowed to 0 to 5, and the "reach other than the front and rear" is also narrowed to 6 to 9, making it difficult to select "reach outside the front and back" or "reach other than the front and rear". Further, if each random value is not stored in the reserved ball storage area in the low probability state, the disorder corresponding to the "completely off" stop pattern is used to secure the ball entry time into the first entry port 64. A table with a narrow numerical range of 51 to 238 is selected, and it becomes difficult to select "completely off". In this table, the range of random values corresponding to the stop pattern of "reach other than front-back deviation" is widened to 9 to 50, and "reach other than front-back deviation" can be easily selected. Therefore, in the low probability state, it is possible to secure the ball entry time to the first ball entry port 64, so that the variation display by the third symbol display device 81 can be easily performed continuously.

Of the two variation type counters CS1 and CS2, one variation type counter CS1 is added one by one in order within the range of 0 to 198, for example, reaches the maximum value (that is, 198), and then returns to 0. The other variable type counter CS2 is configured to be incremented by 1 in order within the range of 0 to 240, and return to 0 after reaching the maximum value (that is, 240). In the following description, CS1 is also referred to as "first variation type counter", and CS2 is also referred to as "second variation type counter".

The first variable type counter CS1 determines a rough display mode such as so-called normal reach, super reach, and premium reach. Specifically, the determination of the display mode is the determination of the fluctuation time of the symbol variation. Further, the second variation type counter CS2 determines the variation time (in other words, the number of variation symbols) until the final stop symbol (middle symbol in the present embodiment) stops after the reach occurs. Based on the fluctuation time determined by the fluctuation type counters CS1 and CS2, the display control device 114 determines the reach type and the fine symbol fluctuation mode of the third symbol displayed on the third display device 81. Therefore, by combining these fluctuation type counters CS1 and CS2, it is possible to easily realize a wide variety of fluctuation patterns. Further, it is also possible to determine the symbol variation mode only by the first variation type counter CS1 or to determine the symbol variation mode by combining the first variation type counter CS1 and the stop symbol. The values of the variation type counters CS1 and CS2 are updated once each time the main process (see FIG. 12) described later is executed once, and are repeatedly updated even within the remaining time in the main process.

The value of the variation type counter CS3 is, for example, incremented by 1 in the range of 0 to 162, reaches the maximum value (that is, 162), and then returns to 0. In the following description, CS3 is also referred to as a "third variable type counter". The third symbol display device 81 of the present embodiment performs a decorative effect according to the display mode of the first symbol display device 37, and slides a fluctuating symbol in addition to the fluctuation of the symbol. , A notice effect such as passing a notice character for notifying the occurrence of a reach effect is performed. The effect pattern of the advance notice effect is selected by the variable type counter CS3. Specifically, an effect pattern is selected in which the time required for the advance notice effect is added to the fluctuation time, the fluctuation time is subtracted in order to shorten the time when the fluctuation is displayed, or the fluctuation time is not added or subtracted. .. As with the stop pattern selection counter C3, the variation type counter CS3 is provided with a plurality of tables having different ranges of random numbers for which the effect pattern is selected, and is the current state of the pachinko machine 10 a high probability state? The selection ratio of each effect pattern is configured to be different depending on whether it is in a low probability state or in which area of the reserved ball storage area each random value is stored.

As described above, the fluctuation type counters CS1 and CS2 determine the fluctuation time of the symbol variation, and the fluctuation type counter CS3 determines the time to be added or subtracted from the fluctuation time. Therefore, the final fluctuation time until the final stop symbol is stopped is determined by the fluctuation type counters CS1, CS2, and CS3.

The second random number counter C4 is configured as a loop counter that is incremented by 1 in order within the range of 0 to 250, reaches the maximum value (that is, 250), and then returns to 0. In the present embodiment, the value of the second random number counter C4 is updated periodically, for example, for each timer interrupt process, and the ball has passed through either the left or right second entry port (through gate) 67. Acquired when detected. The number of random numbers to be won is 149, and the range is "5 to 153". The second initial value random number counter CINI2 is configured as a loop counter that is updated in the same range as the second random number counter C4 (value = 0 to 250), and is once for each timer interrupt process (see FIG. 15). At the same time as being updated, it is repeatedly updated within the remaining time of the main process (see FIG. 12).

Next, each control process executed by the MPU 201 in the main control device 110 will be described with reference to the flowcharts of FIGS. 11 to 17. The processing of the MPU 201 is roughly divided into a start-up process that is started when the power is turned on, a main process that is executed after the start-up process, and a timer that is started periodically (at a 2 ms cycle in the present embodiment). There are an interrupt process and an NMI interrupt process that is activated by inputting a power failure signal SG1 to the NMI terminal. For convenience of explanation, the timer interrupt process and the NMI interrupt process are first described, and then the start-up process is performed. The main process will be described.

FIG. 15 is a flowchart showing a timer interrupt process. The timer interrupt process is executed by the MPU 201 of the main control device 110, for example, every 2 ms. In the timer interrupt process, first, the read process of various winning switches is executed (S501). That is, the state of various switches connected to the main control device 110 is read, the state of the switch is determined, and the detection information (winning detection information) is saved.

Next, the first initial value random number counter CINI1 and the second initial value random number counter CINI2 are updated (S502). Specifically, the first initial value random number counter CINI1 is added by 1, and when the counter value reaches the maximum value (738 in the present embodiment), it is cleared to 0. Then, the updated value of the first initial value random number counter CINI1 is stored in the corresponding buffer area of the RAM 203. Similarly, the second initial value random number counter CINI2 is added by 1, and when the counter value reaches the maximum value (250 in the present embodiment), it is cleared to 0 and the second initial value random number counter CINI2 is updated. The value is stored in the corresponding buffer area of RAM 203.

Further, the first hit random number counter C1, the first hit type counter C2, the stop pattern selection counter C3, and the second hit random number counter C4 are updated (S503). Specifically, the first random number counter C1, the first hit type counter C2, the stop pattern selection counter C3, and the second random number counter C4 are each added by 1, and their counter values are the maximum values (the present embodiment). Then, when they reach 738, 4, 238, 250), they clear to 0, respectively. Then, the updated values of the counters C1 to C4 are stored in the corresponding buffer area of the RAM 203.

After that, the start winning process (see FIG. 16) accompanying the winning of the first ball opening 64 is executed (S504), the firing control process is executed (S505), and the timer interrupt process is completed. In the launch control process, the touch sensor 51a detects that the player is touching the operation handle 51, and the launch of the ball is turned on on condition that the stop switch 51b for stopping the launch is not operated. This is the process of determining / off. The main control device 110 instructs the launch control device 112 to launch the ball when the launch of the ball is on.

Here, the start winning process executed in the process of S504 will be described with reference to the flowchart of FIG. FIG. 16 is a flowchart showing a start winning process (S504) executed in the timer interrupt process (see FIG. 15).

When this start winning process is executed, first, it is determined whether or not the ball has won a prize (starting prize) in the first ball opening 64 (S601). When it is determined that the ball has won the first ball entrance 64 (S601: Yes), whether or not the number N of balls on hold for operation of the first symbol display device 37 is less than the upper limit value (4 in the present embodiment). (S602). If there is a prize in the first entry port 64 and the number of operation-reserved balls N <4 (S602: Yes), the number of operation-reserved balls N is added by 1 (S603), and further updated in step S503. Each value of the first hit random number counter C1, the first hit type counter C2, and the stop pattern selection counter C3 is stored in the first free holding area of the holding ball storage area of the RAM 203 (S604). On the other hand, if there is no winning in the first ball opening 64 (S601: No), or even if there is a winning in the first ball opening 64, the number of pending balls N <4 (S602: No). , S603 and S604 are skipped, the start winning process is completed, and the process returns to the timer interrupt process.

FIG. 17 is a flowchart showing the NMI interrupt process. The NMI interrupt process is a process executed by the MPU 201 of the main control device 110 when the power of the pachinko machine 10 is cut off due to the occurrence of a power failure or the like. By this NMI interrupt processing, the power failure occurrence information is stored in the RAM 203. That is, when the power supply of the pachinko machine 10 is cut off due to the occurrence of a power failure or the like, the power failure signal SG1 is output from the power failure monitoring circuit 252 to the NMI terminal of the MPU 201 in the main control device 110. Then, the MPU 201 interrupts the control during execution and starts the NMI interrupt process, stores the power failure occurrence information in the RAM 203 (S701) as a setting of the power failure occurrence information, and ends the NMI interrupt process. To do.

The above NMI interrupt process is also executed in the payout launch control device 111, and the power outage occurrence information is stored in the RAM 213 by the NMI interrupt process. That is, when the power supply of the pachinko machine 10 is cut off due to the occurrence of a power failure or the like, the power failure signal SG1 is output from the power failure monitoring circuit 252 to the NMI terminal of the MPU 211 in the payout launch control device 111, and the MPU 211 interrupts the control during execution. Then, the NMI interrupt process is started.

Next, with reference to FIG. 11, a start-up process when the power is turned on to the main control device 110 will be described. FIG. 11 is a flowchart showing a start-up process executed by the MPU 201 in the main control device 110. This start-up process is started by resetting when the power is turned on. In the start-up process, first, the initial setting process associated with the power-on is executed (S101). Specifically, a predetermined value is set in the stack pointer, and the control devices on the sub side (peripheral control devices such as the voice lamp control device 113 and the payout control device 111) are put into an operable state. In order to wait, a wait process (1 second in the present embodiment) is executed. Next, access to the RAM 203 is permitted (S103).

After that, it is determined whether or not the RAM erase switch 122 (see FIG. 3) provided in the power supply device 115 is turned on (S104), and if it is turned on (S104: Yes), the process shifts to S110. On the other hand, if the RAM erase switch 122 is not turned on (S104: No), it is determined whether or not the power outage occurrence information is stored in the RAM 203 (S105), and if it is not stored (S105: No). Since there is a possibility that the process at the time of the previous power cutoff did not end normally, the process is also shifted to S110 in this case as well.

If the power outage occurrence information is stored in the RAM 203 (S105: Yes), the RAM determination value is calculated (S106), and if the calculated RAM determination value is not normal (S107: No), that is, the calculated RAM If the determination value does not match the RAM determination value saved when the power is cut off, the backed up data is destroyed, and the process is shifted to S110 even in such a case. As will be described later in the process of S213 in FIG. 12, the RAM determination value is, for example, a checksum value at the work area address of the RAM 203. Instead of this RAM determination value, the effectiveness of the backup may be determined based on whether or not the keyword written in the predetermined area of the RAM 203 is correctly saved.

In the process of S111, a payout initialization command is transmitted to initialize the payout control device 111 which is a control device (peripheral control device) on the sub side (S111). Upon receiving this payout initialization command, the payout control device 111 clears an area (work area) other than the stack area of the RAM 213, sets an initial value, and is ready to start payout control of the game ball. After transmitting the payout initialization command, the main control device 110 executes the initialization process (S112, S113) of the RAM 203.

As described above, in the pachinko machine 10, when the RAM data is initialized at the time of turning on the power, for example, when the hall is open for business, the power is turned on while pressing the RAM erasing switch 122. Therefore, if the RAM erase switch 122 is pressed during the start-up process, the RAM initialization process (S112, S113) is executed. Further, the initialization process (S112, S113) of the RAM 203 is similarly executed when the power failure occurrence information is not set or when a backup abnormality is confirmed by the RAM determination value (checksum value, etc.). .. In the RAM initialization process (S112, S113), the used area of the RAM 203 is cleared to 0 (S112), and then the initial value of the RAM 203 is set (S113). After executing the initialization process of the RAM 203, the process proceeds to the process of S110.

On the other hand, if the RAM erase switch 122 is not turned on (S104: No), the power failure occurrence information is stored (S105: Yes), and the RAM determination value (checksum value, etc.) is normal ( S107: Yes), the information on the occurrence of the power failure is cleared while holding the data backed up in the RAM 203 (S108). Next, a payout return command at the time of power recovery for returning the control device (peripheral control device) on the sub side to the gaming state when the drive power is cut off is transmitted (S109), and the process proceeds to S110. When the payout control device 111 receives the payout return command, the payout control device 111 is in a state where the payout control of the game ball can be started while holding the data stored in the RAM 213. In the process of S110, interrupts are permitted and the process proceeds to the main process described later.

Next, with reference to FIG. 12, the main process executed after the above-mentioned start-up process will be described. FIG. 12 is a flowchart showing a main process executed by the MPU 201 in the main control device 110. In this main process, the main process of the game is executed. As an outline, each process of S201 to S206 is executed as a periodic process having a cycle of 4 ms, and the counter update process of S209 and S210 is executed in the remaining time.

In the main process, first, output data such as a command updated in the previous process is transmitted to each control device (peripheral control device) on the sub side (S201). Specifically, the presence / absence of the prize detection information detected by the switch reading process of S501 is determined, and if there is the prize detection information, the prize ball command corresponding to the number of acquired balls is transmitted to the payout control device 111. Further, by this external output processing, the variation pattern command, the stop symbol command, the stop command, the effect time addition command, and the like necessary for the variation display of the third symbol by the third symbol display device 81 are transmitted to the voice lamp control device 113. Further, when launching a ball, a ball launch signal is transmitted to the launch control device 112.

Next, each value of the fluctuation type counters CS1, CS2, and CS3 is updated (S202). Specifically, the variable type counters CS1, CS2, and CS3 are added by 1, and when the counter values reach the maximum values (198, 240, 162 in the present embodiment), they are cleared to 0, respectively. Then, the updated values of the fluctuation type counters CS1, CS2, and CS3 are stored in the corresponding buffer area of the RAM 203.

When the update of the variable type counters CS1, CS2, and CS3 is completed, the prize ball counting signal and the payout abnormality signal received from the payout control device 111 are read (S203), and the process for displaying by the first symbol display device 37 and the first 3 The symbol display device 81 executes a variation process for setting a variation pattern of the third symbol and the like (S204). The details of the variation processing will be described later with reference to FIG.

After the variation processing is completed, the large opening opening / closing process for opening or closing the specific winning opening (large opening opening) 65a of the variable winning device 65 is executed in the case of a big hit state (S205). That is, the specific winning opening 65a is opened for each round in the jackpot state, and it is determined whether the maximum opening time of the specific winning opening 65a has elapsed or whether the specified number of balls have won the specific winning opening 65a. Then, when any of these conditions is satisfied, the specific winning opening 65a is closed. The opening and closing of the specific winning opening 65a is repeatedly executed for a predetermined number of rounds.

Next, the display control process of the second symbol (for example, the symbol of "○" or "x") by the second symbol display device 82 is executed (S206). Briefly, on condition that the ball has passed through the second entry port (through gate) 67, the value of the second random number counter C4 is acquired at the timing of the passage, and the second symbol display device 82 The variable display of the second symbol is carried out on the display unit 83 of. Then, a lottery for the second symbol is carried out based on the value of the second random number counter C4, and when the second symbol is in the winning state, the electric accessory attached to the first entry port 64 is opened for a predetermined time.

After that, it is determined whether or not the power failure occurrence information is stored in the RAM 203 (S207), and if the power failure occurrence information is not stored in the RAM 203 (S207: No), the power failure signal from the power failure monitoring circuit 252 SG1 is not output and the power supply is not cut off. Therefore, in such a case, it is determined whether or not the execution timing of the next main process has been reached, that is, whether or not a predetermined time (4 ms in the present embodiment) has elapsed from the start of the previous main process (S208). If the predetermined time has already passed (S208: Yes), the process is shifted to S201, and each process after S201 described above is repeatedly executed.

On the other hand, if the predetermined time has not yet elapsed from the start of the previous main process (S208: No), the first is within the period until the predetermined time is reached, that is, within the remaining time until the execution timing of the next main process is reached. 1 The initial value random number counter CINI1, the second initial value random number counter CINI2, and the variation type counters CS1, CS2, and CS3 are repeatedly updated (S209, S210).

First, the first initial value random number counter CINI1 and the second initial value random number counter CINI2 are updated (S209). Specifically, the first initial value random number counter CINI1 and the second initial value random number counter CINI2 are added by 1, and when the counter value reaches the maximum value (738, 250 in the present embodiment), it is cleared to 0. To do. Then, the updated values of the first initial value random number counter CINI1 and the second initial value random number counter CINI2 are stored in the corresponding buffer areas of the RAM 203, respectively.

Next, the variation type counters CS1, CS2, and CS3 are updated (S210). Specifically, the variable type counters CS1, CS2, and CS3 are added by 1, and when the counter values reach the maximum values (198, 240, 162 in the present embodiment), they are cleared to 0, respectively. Then, the update values of the fluctuation type counters CS1, CS2, and CS3 are stored in the corresponding buffer areas of the RAM 203, respectively.

Here, since the execution time of each process of S201 to S206 changes according to the state of the game, the remaining time until the execution timing of the next main process is not constant and fluctuates. Therefore, by repeatedly updating the first initial value random number counter CINI1 and the second initial value random number counter CINI2 using the remaining time, the first initial value random number counter CINI1 and the second initial value random number counter CINI2 (that is, , The initial value of the first random number counter C1 and the initial value of the second random number counter C4) can be updated at random, and similarly, the variable type counters CS1, CS2, and CS3 can be updated at random.

Further, in the processing of S207, if the power failure occurrence information is stored in the RAM 203 (S207: Yes), the power is cut off due to the occurrence of a power failure or the power is turned off, and the power failure signal SG1 is output from the power failure monitoring circuit 252. As a result, since the NMI interrupt process shown in FIG. 17 has been executed, the process when the power is cut off after S211 is executed. First, the occurrence of each interrupt process is prohibited (S211), and a power cutoff notification command indicating that the power is cut off is sent to another control device (peripheral control device such as payout control device 111 or voice lamp control device 113). (S212). Then, the RAM determination value is calculated, the value is saved (S213), the access of the RAM 203 is prohibited (S214), and the infinite loop is continued until the power supply is completely shut off and the process cannot be executed. Here, the RAM determination value is, for example, a checksum value in the backed up stack area and work area of the RAM 203.

The process of S207 is performed at the end of a series of processes corresponding to the state change of the game performed in S201 to S206, or at the end of one cycle of the processes of S209 and S210 performed within the remaining time. It is running. Therefore, in the main process of the main control device 110, the power off occurrence information is confirmed at the timing when each setting is completed. Therefore, when returning from the power cut state, the process is performed after the start-up process is completed. It can be started from the process of S201. That is, the process can be started from the process of S201 as in the case of being initialized in the start-up process. Therefore, in the process when the power is cut off, the stack pointer is used in the initial setting process (S101) without saving the contents of each register used by the MPU 201 to the stack area or saving the value of the stack pointer. By setting a predetermined value (initial value), it is possible to start from the process of S201. Therefore, the control load of the main control device 110 can be reduced, and accurate control can be performed without the main control device 110 malfunctioning or running out of control.

Next, the variation processing (S204) will be described with reference to FIG. FIG. 13 is a flowchart showing a variation process (S204) executed in the main process (see FIG. 12). In this fluctuation processing, first, it is determined whether or not the jackpot is currently being hit (S301). The jackpot includes during the jackpot game displayed by the third symbol display device 81 and the first symbol display device 37 at the time of the jackpot, and during a predetermined time after the jackpot game ends. As a result of the determination, if the jackpot is in progress (S301: Yes), this process is terminated as it is.

If it is not a big hit (S301: No), it is determined whether or not the display mode of the first symbol display device 37 is changing (S302), and if the display mode of the first symbol display device 37 is not changing. (S302: No), it is determined whether or not the number of operation-holding balls N is larger than 0 (S303). If the number of balls on hold for operation N is 0 (S303: No), this process ends as it is. If the number of operation-holding balls N> 0 (S303: Yes), the number of operation-holding balls N is subtracted by 1 (S304), and the data stored in the hold ball storage area is shifted (S305). This data shift process is a process of sequentially shifting the data stored in the hold 1st to 4th areas of the hold ball storage area to the execution area side, and is a process of shifting the hold ball storage area to the execution area side in order. The data in each area is shifted such as the hold 1st area, the hold 3rd area → the hold 2nd area, the hold 4th area → the hold 3rd area. After the data shift processing, the fluctuation start processing of the first symbol display device 37 is executed (S306). The fluctuation start processing will be described later with reference to FIG.

In the process of S302, when it is determined that the display mode of the first symbol display device 37 is changing (S302: Yes), it is determined whether or not the fluctuation time has elapsed (S307). The display time during fluctuation of the first symbol display device 37 is determined according to the fluctuation pattern selected by the fluctuation type counters CS1 and CS2 and the addition time selected by the fluctuation type counter CS3, and the fluctuation time is determined. If it has not elapsed (S307: No), the display of the first symbol display device 37 is updated (S308).

In the present embodiment, among the LEDs 37a of the first symbol display device 37, from the start of the fluctuation until the fluctuation time elapses, for example, if the currently lit LED is red, the red LED is used. Turn off and turn on the green LED, if the green LED is on, turn off the green LED and turn on the blue LED, and if the blue LED is on, turn on the blue LED. A display mode is set in which the red LED is turned on as well as turned off.

The variation processing is executed every 4 ms, but if the LED lighting color is changed each time the variation processing is executed, the player cannot confirm the change in the LED lighting color. Therefore, a counter (not shown) is counted by 1 each time the fluctuation process is executed so that the player can confirm the change in the lighting color of the LED, and when the counter reaches 100, the LED is displayed. Change the lighting color of. That is, the lighting color of the LED is changed every 0.4 s. The value of the counter is reset to 0 when the lighting color of the LED is changed.

On the other hand, if the fluctuation time of the first symbol display device 37 has elapsed (S307: Yes), the display mode corresponding to the stop symbol of the first symbol display device 37 is set (S309). In the setting of the stop symbol, whether or not it is a big hit is determined according to the value of the first hit random number counter C1, and if it is a big hit, the symbol that becomes a high probability state after the big hit is determined by the value of the first hit type counter C2. It is determined whether the symbol is in a low probability state. In the present embodiment, the red LED is turned on when the high probability state is reached after the big hit, the green LED is turned on when the low probability state is reached, and the blue LED is turned on when the probability is off. .. The display of each LED is turned off when the next fluctuation display is started, but it may be turned on only for a few seconds after the fluctuation is stopped.

When the display mode of the first symbol display device 37 corresponding to the stop symbol is set in the process of S309, the fluctuation stop of the third symbol display device 81 is stopped in order to synchronize with the lighting of the LED in the first symbol display device 37. The command is set (S310). Upon receiving this stop command, the voice lamp control device 113 gives a stop instruction to the display control device 114. The third symbol display device 81 stops the fluctuation when the fluctuation time elapses, and when the stop command is received, the fluctuation effect of 1 in the third symbol display device 81 ends.

Next, the fluctuation start processing will be described with reference to FIG. FIG. 14 is a flowchart showing the fluctuation start processing (S306) executed in the fluctuation processing (see FIG. 13). In the fluctuation start processing (S306), first, it is determined whether or not it is a big hit based on the value of the first random number counter C1 stored in the execution area of the reserved ball storage area (S401). Whether or not it is a big hit is determined based on the relationship between the value of the first random number counter C1 and the mode at that time. As described above, "373,727" out of the numerical values 0 to 738 of the first random number counter C1 is the winning value at the time of normal low probability, and "59,109,163,21,263,317,367" at the time of high probability. 421,479,523,631,683,733 ”is the winning value.

When it is determined that the jackpot is a big hit (S401: Yes), the value of the first hit type counter C2 stored in the execution area of the reserved ball storage area is confirmed, and the display mode at the time of the jackpot is set (S402). ). In the process of S402, it is set whether to shift to the high probability state or the low probability state after the big hit based on the value of the first hit type counter C2. When the transition state after the big hit is set, the display mode (lighting state of the LED 37a) of the first symbol display device 37 is set. Further, based on the transition state after the jackpot, the jackpot stop symbol that is stopped and displayed by the third symbol display device 81 is set by the voice lamp control device 113 and the display control device 114. That is, the stop symbol in the third symbol display device 81 is set by setting the transition state after the big hit by the process of S402. Of the numerical values 0 to 4 of the first type counter C2, in the case of "0,4", the state shifts to the low probability state, and in the case of "1,2,3", the state shifts to the high probability state. ..

Next, the fluctuation pattern at the time of big hit is determined (S403). When the fluctuation pattern is set in the process of S403, the display time of the first symbol display device 37 is set, and the fluctuation time of the third symbol until the third symbol display device 81 stops at the jackpot symbol is determined. To. At this time, the values of the fluctuation type counters CS1 and CS2 stored in the counter buffer of the RAM 203 are confirmed, and the rough symbol fluctuations such as normal reach, super reach, and premium reach are performed based on the values of the first fluctuation type counter CS1. The fluctuation time is determined, and the fluctuation time (in other words, the number of fluctuation symbols) until the final stop symbol (middle symbol Z2 in the present embodiment) stops after the reach occurs is determined based on the value of the second fluctuation type counter CS2. decide.

The relationship between the numerical value of the first fluctuation type counter CS1 and the fluctuation time, and the relationship between the numerical value of the second fluctuation type counter CS2 and the fluctuation time are defined in advance by a table or the like. However, the fluctuation time can be set by using only the value of the first fluctuation type counter CS1 without using the value of the second fluctuation type counter CS2, and is set only by the value of the first fluctuation type counter CS1. Whether or not to set with both values of both variable type counters CS1 and CS2 is appropriately determined according to the value of the first variable type counter CS1 and the game conditions each time.

If it is determined in the process of S401 that it is not a big hit (S401: No), the display mode at the time of disconnection is set (S404). In the process of S404, the display mode of the first symbol display device 37 is set to the display mode corresponding to the outlier symbol, and based on the value of the stop pattern selection counter C3 stored in the execution area of the hold ball storage area, the display mode is set. It is set whether the effect to be displayed on the third symbol display device 81 is a front-rear reach, a reach other than the front-rear reach, or a complete loss. In the present embodiment, as described above, the range of values corresponding to each stop pattern of the stop pattern selection counter C3 is set according to the high probability state, the low probability state, and the number of operation hold N. The tables are set differently.

Next, the fluctuation pattern at the time of disconnection is determined (S405), the display time of the first symbol display device 37 is set, and the fluctuation time of the third symbol until the third symbol display device 81 stops at the disengaged symbol. Is determined. At this time, similarly to the processing of S403, the values of the variable type counters CS1 and CS2 stored in the counter buffer of the RAM 203 are confirmed, and the normal reach, super reach, and premium reach are confirmed based on the values of the first variable type counter CS1. The fluctuation time of the symbol fluctuation such as, etc. is determined, and the fluctuation time until the final stop symbol (middle symbol Z2 in the present embodiment) stops after the reach occurs based on the value of the second fluctuation type counter CS2 (in other words). For example, the number of variable symbols) is determined.

When the processing of S403 or the processing of S405 is completed, the effect time to be added / subtracted to the fluctuation time determined by the first and second type counters CS1 and CS2 is determined (S406). At this time, addition / subtraction of the effect time is determined based on the value of the third type counter CS3 stored in the counter buffer of the RAM 203, the display time of the first symbol display device 37 is set, and the third symbol display is performed. The fluctuation time of the device 81 is set. In the present embodiment, the addition / subtraction of the effect time is determined by setting the variation display time to 2 when the variation display time is not changed and when the variation display time is added by 1 second according to the value of the third variation type counter CS3. When adding seconds, four types of addition values are determined, one is when the fluctuation display time is subtracted by 1 second.

When the variable display time is added or subtracted, the third symbol display device 81 raises the expected value of the jackpot. An effect of displaying the notice character, an effect of making the fluctuation time of the fluctuation symbol of 1 shorter than usual and immediately stopping, etc.) is performed. Further, when the value of the random number counter C1 per first is a big hit, the probability that the added value of 2 seconds is selected is set high, so that the player expects a big hit by checking the advance notice effect. Can be done.

Next, the fluctuation pattern command is set according to the fluctuation pattern (variation time) determined in the process of S403 or S405 (S407), and the stop symbol command is set according to the stop symbol set in the process of S402 or S404. (S408). Then, the effect time addition command is set according to the effect time addition value determined in the process of S406 (S409), and the process returns to the variation process.

As described above, according to the pachinko machine 10, when the inner frame 12 or the front frame 14 is in the open state and the switch SW1 or the switch SW2 is in the conductive state (see FIG. 5B), the frame open detection is detected. The circuit 260 supplies a current to one end of the resistor R7 of the external output terminal plate 261 until about 10 ms elapses (for about 10 ms) after the inner frame 12 or the front frame 14 is opened. Then, a current is supplied to the light emitting diode on the primary side of the photocoupler PR1 provided on the external output terminal plate 261 via the resistor R7, and the light emitting diode emits light for about 10 ms. Then, when the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 receives the light of the light emitting diode, the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 receives the light of about 10 ms in pulse width. Converts into a pulse signal (electrical signal) of about 10 ms, and outputs the pulse signal to the hall computer 262. The output pulse signal is stored in the hall computer 262. Therefore, by using the frame opening detection circuit 260 and the external output terminal plate 261, it is possible to store the hall computer 262 that the inner frame 12 has been opened or the front frame 14 has been opened. The hall computer 262 has been operated for 24 hours. Therefore, in the frame opening detection circuit 260, the pulse signal is output from the external output terminal plate 261 and the time when the pulse signal is output, that is, the opening time of the inner frame 12 and the opening time of the front frame 14 is also the hall computer. It can be stored in 262.

Further, since the frame opening detection circuit 260 is provided with a 0.1F capacitor CD1, the frame opening detection circuit 260 supplies power to the pachinko machine 10 and has a DC voltage of 12 volts from the DC power supply DC1. When is supplied, it operates naturally, and further, for example, when the business hours of the amusement park are over, the power supply to the pachinko machine 10 is cut off, and a DC voltage of 12 volts is supplied from the DC power supply DC1. Even if there is no such case, the opening of the inner frame 12 and the opening of the front frame 14 can be detected. Therefore, for example, even when the business hours of the amusement park are over and the power supply to the pachinko machine 10 is cut off, a pulse signal having a pulse width of about 10 ms is output from the external output terminal plate 261 to the hall computer 262. can do.

Next, the pachinko machine of the second embodiment will be described with reference to FIGS. 18 and 19. The pachinko machine of the second embodiment is obtained by changing the frame opening detection circuit 260 of the pachinko machine 10 of the first embodiment to a frame opening detection circuit 270 having a different configuration. The frame opening detection circuit 270 of the second embodiment simplifies the circuit configuration with respect to the frame opening detection circuit 260 of the first embodiment. Specifically, the frame opening detection circuit 270 of the second embodiment removes the timer IC1, the resistors R1 to R3, and the capacitors CD3 to CD5 from the frame opening detection circuit 260 of the first embodiment, and the capacitors CD1 have different capacities. The circuit configuration is simplified by changing to the capacitor CD6 and changing the connection of each component.

According to the frame opening detection circuit 270 of the second embodiment, a high signal whose output period fluctuates according to the opening period of the inner frame 12 or the front frame 14 can be output to the hall computer 262, so that the inner frame 12 can be output. Alternatively, in addition to being able to detect the opening of the front frame 14, it is also possible to detect the opening period of the inner frame 12 or the front frame 14.

FIG. 18 is a block diagram showing an electrical configuration of the frame opening detection circuit 270 of the second embodiment. In FIG. 7, the same parts as those of the frame opening detection circuit 260 of the first embodiment described above are assigned the same numbers, the description thereof will be omitted, and only the different parts will be described.

The capacitor CD6 is obtained by changing the capacitance of the capacitor CD1 used in the frame opening detection circuit 260 of the first embodiment from 0.1F (farad) to 1F (farad). The capacitor CD6 is a component that functions as a rechargeable battery like the capacitor CD1 of the frame opening detection circuit 260 of the first embodiment. One end of the capacitor CD6 is connected to the cathode of the diode D1, and the other end of the capacitor CD6 is grounded. There is.

Similar to the capacitor CD1 (see FIG. 7) described above, the capacitor CD6 is supplied with power to the pachinko machine of the second embodiment, and when a DC voltage of 12 volts is supplied from the DC power supply DC1. It is obtained by the product of the capacity 1F of the capacitor CD6 and the DC voltage applied to the capacitor CD6 (about 11.3 volts obtained by subtracting the voltage drop 0.7 volt at the diode D1 from the 12 volt supplied from the DC power supply DC1). Stores charge.

On the other hand, for example, when the business hours of the amusement park are over, the power supply to the pachinko machine of the second embodiment is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1, the capacitor CD6 is used. , A DC voltage (about 11.3 volts) based on the electric charge stored in the capacitor CD6 is supplied to the frame opening detection circuit 270 and the external output terminal plate 261.

Specifically, since the capacitor CD6 has a capacitance of 1F (farad) and the voltage applied to the capacitor CD6 is about 11.3 volts, the electric charge stored in the capacitor CD6 is the capacitance of the capacitor CD6 and that of the capacitor CD6. From the product of the applied voltages, it becomes about 11.3 C (Coulomb). The electric charge of about 11.3C stored in the capacitor CD6 is about 10 minutes in the output period of the high signal output from the external output terminal plate 261 to the hall computer 262. Therefore, for example, even when the business hours of the amusement park are closed, the power supply to the pachinko machine of the second embodiment is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1 to the outside. The frame opening detection circuit 270 can detect the opening of the inner frame 12 or the front frame 14 until the total output period of the high signal output from the output terminal plate 261 is about 10 minutes. Further, the frame opening detection circuit 270 can also detect the opening period of the inner frame 12 or the front frame 14. When the total output period of opening the inner frame 12 or opening the front frame 14 approaches about 10 minutes, the electric charge stored in the capacitor CD6 decreases, and the current value supplied from the capacitor CD6 to the photocoupler PR1 decreases. However, by increasing the detection sensitivity of the high signal of the hall computer 262 (by lowering the threshold value for the amplitude of the high signal), the hall computer 262 can store the high signal.

In this way, when the power is supplied to the pachinko machine of the second embodiment and the DC voltage of 12 volts is supplied from the DC power supply DC1, it naturally operates, and further, for example, the business hours of the amusement park. Is completed, the power supply to the pachinko machine of the second embodiment is cut off, and even when the DC voltage of 12 volts is not supplied from the DC power supply DC1, the frame opening detection circuit 270 is on the 1st floor (1F). Since the capacitor CD6 of Farad) is provided, the frame opening detection circuit 270 can detect the opening of the inner frame 12 and the opening of the front frame 14. A cathode terminal of a diode D1 is connected to one end of the capacitor CD6, and since this diode D1 functions to prevent backflow of current, direct current is applied from the capacitor CD6 to the frame opening detection circuit 270 and the external output terminal plate 261. Even when a voltage (about 11.3 volts) is supplied, the DC voltage is not applied to the DC power supply DC1 and the DC power supply DC1 is not damaged. In this embodiment, the capacitor CD6 is used as a component for supplying the DC voltage to the frame opening detection circuit 270 and the external output terminal plate 261 when the DC voltage of 12 volts is not supplied from the DC power supply DC1. .. However, the present invention is not limited to this, and the capacitor CD6 may be a secondary battery (rechargeable battery) having a larger storage capacity or a primary battery that does not need to be charged.

One end of the capacitor CD6 is connected to one end of the switch SW1 and the switch SW2, and is also connected to one end of the resistor R7 of the external output terminal plate 261. One end of the resistor R9 is connected to the other ends of the switch SW1 and the switch SW2. One end of the capacitor CD2, one end of the resistor R4, and one end of the internal resistance R5 of the transistor TR1 are connected to the other end of the resistor R9.

By this connection, one of the switch SW1 and the switch SW2 (one of the inner frame 12 or the front frame 14), or both the switch SW1 and the switch SW2 are in a conductive state (both the inner frame 12 and the front frame 14 are in an open state). Since a DC voltage is supplied to the resistor R4 during a certain period, the terminals c of the collector terminal c of the transistor TR1 and the emitter terminal e of the transistor TR1 become conductive. Then, during this period, a current is supplied to the light emitting diode on the primary side of the photocoupler PR1 via the resistor R7 of the external output terminal plate 261. As a result, one of the switch SW1 and the switch SW2 (one of the inner frame 12 and the front frame 14), or both the switch SW1 and the switch SW2 are in the conductive state (both the inner frame 12 and the front frame 14 are in the open state). ) During the period, a high signal is output from the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 to the hall computer 262. Therefore, according to the frame opening detection circuit 270 of the second embodiment, since the frame opening detection circuit 270 is provided with the capacitor CD6 on the 1st floor (Farad), the power supply to the pachinko machine of the second embodiment can be supplied. Even when the DC power supply DC1 is cut off and a DC voltage of 12 volts is not supplied, a high signal whose output period fluctuates according to the opening period of the inner frame 12 or the front frame 14 is transmitted to the external output terminal board 261. Can be output to the hall computer 262. Therefore, in addition to being able to detect the opening of the inner frame 12 or the front frame 14, it is also possible to detect the opening period of the inner frame 12 or the front frame 14. The hall computer 262 has been operated for 24 hours. Therefore, in the frame opening detection circuit 270, the high signal is output from the external output terminal plate 261 and the time when the high signal is output, that is, the opening time of the inner frame 12 and the opening time of the front frame 14 is also the hall computer. It can be stored in 262.

Further, for example, when the business hours of the amusement park are over and the power supply to the pachinko machine 10 is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1 to the frame opening detection circuit 270 and the external output terminal board 261. That is, when a DC voltage of about 11.3 volts is supplied from the capacitor CD6 to the frame open detection circuit 270 and the external output terminal plate 261, the supply period of the current supplied from the capacitor CD6 to the photocoupler PR1 is set as the inner frame. It can be kept in the period when the 12 or the front frame 14 is opened. Therefore, the power consumption due to the opening of the inner frame 12 or the front frame 14 can be suppressed to a small value.

For example, when the business hours of the amusement park are over and the power supply to the pachinko machine is cut off and the DC voltage is supplied from the capacitor CD6 to the frame opening detection circuit 270 and the external output terminal plate 261, the inner frame When the total supply period of the current from the capacitor CD6 to the photocoupler PR1 due to the opening of the 12 or the front frame 14 is lengthened, or the number of times the opening of the inner frame 12 or the front frame 14 is detected is increased, the capacitor CD6 is used. (For example, the capacity of the capacitor CD6 is 10F), or the capacitor CD6 may be changed to a secondary battery having a large storage capacity.

Next, with reference to FIG. 19, the voltage of A of the frame opening detection circuit 270 that changes according to the state of the switch SW1 (the state of the inner frame 12) and the state of the switch SW2 (the state of the front frame 14) (FIG. 19). 18) and the output of the external output terminal board 261 (input of the hall computer 262) will be described. FIG. 19 shows the state of the switch SW1 (the state of the inner frame 12), the state of the switch SW2 (the state of the front frame 14), the voltage of A of the frame opening detection circuit 270, and the output of the external output terminal plate 261 (of the hall computer 262). It is a timing chart showing the relationship of (input). It should be noted that each time from t1 o'clock to t8 o'clock shown in FIG. 19 is the same as each time from t1 o'clock to t8 o'clock shown in the timing chart of the frame opening detection circuit 260 of the first embodiment shown in FIG. is there.

As shown in FIG. 19 (a), when the switch SW1 is in the conductive state (the inner frame 12 is in the open state) at t1, the frame open detection circuit 270 is followed as shown in FIG. 19 (c). The voltage of A (see FIG. 18) switches from zero volt to about 11.3 volt (at t1). Then, as shown in FIG. 19D, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 switches from the low state to the high state (t1). Time). As a result, the output of the high signal indicating the opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

Then, as shown in FIG. 19 (a), when the switch SW1 is in the cutoff state (the inner frame 12 is in the closed state) at t2, the voltage of A of the frame open detection circuit 270 is as shown in FIG. 19 (c). Switches from about 11.3 volts to zero volts (at t2). Then, following this, as shown in FIG. 19D, the output of the external output terminal plate 261 switches from the high state to the low state (at t2).

The switching of the output of the external output terminal board 261 becomes a high signal, and the high signal is output from the external output terminal board 261 to the hall computer 262 from t1 o'clock to t2 o'clock. That is, a high signal having a pulse width of the output period from t1 to t2 is output from the external output terminal board 261 to the hall computer 262.

Next, as shown in FIG. 19 (a), when the switch SW1 is in the conductive state (the inner frame 12 is in the open state) at t3, the frame is opened as shown in FIG. 19 (c) following this. The voltage A of the detection circuit 270 (see FIG. 18) switches from zero volt to about 11.3 volt (at t3). Then, as shown in FIG. 19D, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 switches from the low state to the high state (t3). Time). As a result, the output of the high signal indicating the opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

Then, as shown in FIG. 19 (a), when the switch SW1 is in the cutoff state (the inner frame 12 is in the closed state) at t4, the voltage of A of the frame open detection circuit 270 is as shown in FIG. 19 (c). Switches from about 11.3 volts to zero volts (at t4). Then, following this, as shown in FIG. 19D, the output of the external output terminal plate 261 switches from the high state to the low state (at t4).

The switching of the output of the external output terminal board 261 becomes a high signal, and the high signal is output from the external output terminal board 261 to the hall computer 262 from t3 o'clock to t4 o'clock. That is, a high signal having a pulse width of the output period from t3 to t4 is output from the external output terminal board 261 to the hall computer 262.

Finally, a case where the switch SW2 is in the conductive state (the front frame 14 is in the open state) when the switch SW1 is in the conductive state (the inner frame 12 is in the open state) will be described. As shown in FIG. 19A, the switch SW1 is in a conductive state (inner frame 12 is in an open state) at t5, and further, as shown in FIG. 19B, the switch SW2 is in a conductive state (front surface) at t6. When the frame 14 is in the open state), as shown in FIG. 19C, the voltage A of the frame open detection circuit 270 (see FIG. 18) switches from zero volt to about 11.3 volt at t5. Then, following this, as shown in FIG. 19 (d), as shown in FIG. 19 (d), the output of the external output terminal plate 261 switches from the low state to the high state (at 5 o'clock). As a result, the output of the high signal indicating the opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

Then, as shown in FIG. 19A, the switch SW1 is in the shutoff state (inner frame 12 is in the closed state) at t7, and as shown in FIG. 19B, the switch SW2 is in the shutoff state at t8. When (the front frame 14 is in the closed state), as shown in FIG. 19C, the voltage of A of the frame opening detection circuit 270 switches from zero volt to about 11.3 volt at t8. Then, following this, as shown in FIG. 19D, the output of the external output terminal plate 261 switches from the high state to the low state (at 8 o'clock).

The switching of the output of the external output terminal board 261 becomes a high signal, and the high signal is output from the external output terminal board 261 to the hall computer 262 from t5 o'clock to t8 o'clock. That is, a high signal having a pulse width of the output period from t5 to t8 is output from the external output terminal board 261 to the hall computer 262.

In this way, when the switch SW1 and the switch SW2 are in the conductive state (the inner frame 12 and the front frame 14 are in the open state), in the frame open detection circuit 270, either the switch SW1 or the switch SW2 is in the conductive state (inner frame). External from when either 12 or the front frame 14 is in the open state until both the switch SW1 and the switch SW2 are in the cutoff state (both the inner frame 12 and the front frame 14 are in the closed state). A high signal can be output from the output terminal board 261 to the hall computer 262. Therefore, in addition to being able to detect the opening of the inner frame 12 or the front frame 14, both the inner frame 12 and the front frame 14 have been in the open state since either the inner frame 12 or the front frame 14 was opened. It is possible to detect the opening period until the is closed.

As described above, according to the pachinko machine of the second embodiment, since the frame opening detection circuit 270 is provided with the capacitor CD6 on the 1st floor (farad), the power supply to the pachinko machine of the second embodiment is cut off. Even when a DC voltage of 12 volts is not supplied from the DC power supply DC1, the frame opening detection circuit 270 provides a high signal whose output period fluctuates according to the opening period of the inner frame 12 or the front frame 14. It can be output to the hall computer 262. Then, the opening of the inner frame 12 or the front frame 14 can be detected by storing the high signal output from the external output terminal plate 261 to the hall computer 262 and the output period of the output high signal. In addition to being able to do so, the opening period of the inner frame 12 or the front frame 14 can also be detected. Further, the high signal output from the external output terminal board 261 to the hall computer 262 is stored in the hall computer 262 that continues to operate for 24 hours. Therefore, the pachinko machine in which the inner frame 12 or the front frame 14 is opened can be identified by the high signal stored in the hall computer 262. Furthermore, the hall computer 262 outputs a high signal from the external output terminal board 261 and stores the output time of the output high signal so that the opening time or the front surface of the specified pachinko machine inner frame 12 can be stored. The opening time of the frame 14 can also be detected.

Next, the pachinko machine of the third embodiment will be described with reference to FIGS. 20 and 21. The pachinko machine of the third embodiment is obtained by changing the frame opening detection circuit 260 of the pachinko machine 10 of the first embodiment to a frame opening detection circuit 280 having a different configuration. The frame opening detection circuit 280 of the third embodiment simplifies the circuit configuration with respect to the frame opening detection circuit 260 of the first embodiment. Specifically, the frame opening detection circuit 280 of the third embodiment removes the resistor R2, the capacitor CD4 and CD5 from the frame opening detection circuit 260 of the first embodiment, and removes the resistor R1, the capacitor CD3, the resistor R7, and the switch SW1. And, each connection of the switch SW2 is changed, the timer IC1 functions as a monostable multivibrator, and the integrator circuit 281 composed of the resistor 10 and the capacitor CD7 is connected to the front stage of the TRG terminal of the timer IC1 to configure the circuit. Is a simplification of. Then, the frame opening detection circuit 280 of the third embodiment outputs the mode of the voltage applied to the TRG terminal of the timer IC 1 and the OUT terminal of the timer IC 1 to the frame opening detection circuit 260 of the first embodiment. The mode of voltage is changed.

According to the frame opening detection circuit 280 of the third embodiment, the integrator circuit 281 keeps the falling period of the voltage applied to the TRG terminal of the timer IC 1 constant regardless of the opening period of the inner frame 12 or the front frame 14. By setting the period (about 2 ms), the falling period of the voltage applied to the TRG terminal of the timer IC1 is set to be larger than the period (about 10 ms) in which the voltage of about 9.6 volts is output from the OUT terminal of the timer IC1. Can be adjusted short. Therefore, regardless of the opening period of the inner frame 12 or the front frame 14, the supply period of the current supplied from the capacitor CD1 to the photocoupler PR1 is limited to about 10 ms for each opening of the inner frame 12 or the front frame 14. be able to. Therefore, the frame opening detection circuit 280 can simplify the circuit configuration as compared with the frame opening detection circuit 260, and the period during which a voltage of about 9.6 volts is output from the OUT terminal of the timer IC1 is limited to about 10 ms. Therefore, the power consumption due to the opening of the inner frame 12 or the front frame 14 can be further suppressed to be smaller than that of the frame opening detection circuit 260.

FIG. 20 is a block diagram showing an electrical configuration of the frame opening detection circuit 280 of the third embodiment. In FIG. 7, the same parts as those of the frame opening detection circuit 260 of the first embodiment described above are assigned the same numbers, the description thereof will be omitted, and only the different parts will be described.

When the power supply to the pachinko machine is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1, one end of the capacitor CD1 that supplies the DC voltage to the frame opening detection circuit 280 and the external output terminal board 261 It is connected to one end of the 100 kΩ resistor R10, and is also connected to the VDD terminal of the timer IC1, one end of the 100 KΩ resistor R1a, the RES terminal of the timer IC 1, and one end of the 1 KΩ resistor R7a.

The other end of the resistor R1a is connected to one end of the 0.1 μF capacitor CD3a, and is also connected to the DCH terminal of the timer IC1 and the TH terminal of the timer IC1. The other end of the capacitor CD3a is grounded. By connecting the capacitor CD3a and the resistor R1a, the inner frame 12 or the front frame 14 of the timer IC1 is opened, so that the switch SW1 or the switch SW2 is conducted and the voltage applied to the TRG terminal of the timer IC1 is applied. When the voltage drops to zero volt, it functions as a monostable multivibrator that raises the voltage of the OUT terminal of the timer IC1 from zero volt to about 9.6 volt for about 10 ms. The period for raising the voltage of the OUT terminal of the timer IC1 from zero volt to about 9.6 volt is about 10 ms, which is the product of the resistance value of the resistor R1a (100 kΩ) and the capacitance value of the capacitor CD3a (0.1 μF). It is determined by a certain time constant.

The resistor R10 is a resistor that stabilizes the voltage applied to the TRG terminal of the timer IC 1, and is a resistor that constitutes the integrating circuit 281 with the capacitor CD7. The other end of the resistor R10 is connected to the anode terminal of the diode D2, the cathode terminal of the diode D2 is connected to the TRG terminal of the timer IC1, and the Zener voltage limiting voltage (Zener voltage) is about 10.5 volts. It is connected to the cathode terminal of the diode D3 and one end of each of the switches SW1 and SW2 connected in parallel. Therefore, when the inner frame 12 and the front frame 14 are closed and the switch SW1 and the switch SW2 are shut off, the voltage applied to the TRG terminal of the timer IC1 is about 11.3 volts supplied from the capacitor CD1. The voltage drop at the resistor R10 is about 0.3 volt, and the voltage drop at the diode D2 is about 0.7 volt, which is subtracted from the voltage of about 10.3 volt.

The 0.02 μF capacitor CD7 is a capacitor that constitutes an integrating circuit 281 with a resistor R10 and controls the voltage applied to the TRG terminal of the timer IC1. The other ends of the switch SW1 and the switch SW2 are connected to one end of the capacitor CD7, and the other end of the capacitor CD7 is grounded. The integrating circuit 281 composed of the capacitor CD7 and the resistor R10 is applied to the TRG terminal of the timer IC1 when the switch SW1 or the switch SW2 becomes conductive due to the inner frame 12 or the front frame 14 being opened. It is a circuit that lowers the voltage of about 10.3 volt to zero volt, and returns the TRG terminal voltage of the timer IC1 to about 10.3 volt again about 2 ms after the lowering.

Specifically, when the inner frame 12 or the front frame 14 is opened and the switch SW1 or the switch SW2 is conducted according to the opening, a voltage of about 10.3 volts supplied from the capacitor CD1 is applied to the capacitor CD7. The application is started, and the charging of the capacitor CD7 is started. At the start of charging, the voltage applied to the capacitor CD7 momentarily becomes zero volt, so that the voltage applied to the TRG terminal of the timer IC 1 momentarily becomes zero volt. Then, as the capacitor CD7 is charged, the capacitor CD7 raises the voltage applied to the TRG terminal of the timer IC1 and finally controls the voltage applied to the TRG terminal of the timer IC1 to about 10.3 volts. It is.

The period until the capacitor CD7 is fully charged, that is, the voltage of about 10.3 volts applied to the TRG terminal of the timer IC1 drops to zero volt, and the voltage of the TRG terminal of the timer IC1 drops from that drop. The period of about 2 ms until the voltage returns to about 10.3 volts is determined by the time constant which is the product of the resistance value of the resistor R10 (100 kΩ) and the capacitance value of the capacitor CD7 (0.02 μF).

In this way, the voltage applied to the TRG terminal of the timer IC1 drops, and the period (about 2 ms) from the fall until the TRG terminal voltage of the timer IC1 returns to about 10.3 volts is the integrator circuit 281. Therefore, regardless of the opening period of the inner frame 12 and the front frame 14, the voltage of the OUT terminal of the timer IC1 is adjusted to a period shorter than the period (about 10 ms) in which the voltage of the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volt. By changing the resistance value of the resistor R10 and the capacitance value of the capacitor CD7, the voltage applied to the TRG terminal of the timer IC1 drops, and then the voltage of the TRG terminal of the timer IC1 drops to about 10.3 volts. The period until the voltage returns to the timer IC1 can be freely changed within about 10 ms, which is the period until the voltage of the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volt.

Here, the monostable multivibrator does not normally output a signal from the output terminal unless the input period of the signal input to the input terminal is shorter than the output period of the signal output from the output terminal (from the output terminal). The signal continues to be output). Therefore, when the timer IC1 is made to function as a monostable multivibrator without using the integrating circuit 281, the timer IC1 is longer than the period in which the voltage of the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volt. The period from zero volt to the return of the TRG terminal voltage to about 10.3 volt, that is, the opening period of the inner frame 12 and the front frame 14 (conduction period of the switch SW1 and the switch SW2) must be short. However, since it is completely unpredictable how long the opening period of the inner frame 12 and the front frame 14 will be, the inner frame 12 and the front frame 14 and the front frame 14 have a longer opening period than the period when the voltage of the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volt. In order to keep the opening period of the front frame 14 always short, it is necessary to set the period during which the voltage of the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volt with a sufficient margin. For example, if the opening period of the inner frame 12 and the front frame 14 is predicted to be from several tens of seconds to several minutes, the period during which the voltage of the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volt is sufficiently sufficient. Must be set from a few minutes to a few tens of minutes. Then, during this set period, the DC voltage is continuously supplied from the capacitor CD1 to the frame opening detection circuit 280 and the external output terminal plate 261, so that the capacitor CD1 is significantly consumed. Therefore, in order to make the timer IC1 function as a monostable multivibrator without using the integrating circuit 281 and further suppress the consumption of the electric charge stored in the capacitor CD1, a special circuit configuration is required. there were.

However, when the inner frame 12 or the front frame 14 is opened by providing the integrator circuit 281 in front of the TRG terminal of the timer IC1, the timer IC1 is opened regardless of the opening period (conduction period of the switch SW1 and the switch SW2). Adjust the period from when the voltage applied to the TRG terminal of the timer IC1 drops to about 10.3 volts until it returns to about 10.3 volts shorter than the period when the voltage of the OUT terminal of the timer IC1 rises from zero volts to about 9.6 volts. can do. In this way, the integrator circuit 281 makes the timer IC1 normal by setting the falling period of the TRG terminal voltage of the timer IC1 to a fixed period (about 2 ms) regardless of the opening period of the inner frame 12 and the front frame 14. By operating the timer IC1, the period during which the voltage of the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volt can be limited to about 10 ms.

Then, when the voltage of the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volt for about 10 ms, the collector terminal and the emitter terminal of the transistor TR1 conduct for about 10 ms, and pass through the resistor R7a. A current is supplied from the capacitor CD1 to the photocoupler PR1 for about 10 ms. As a result, a pulse signal having a pulse width of about 10 ms is output from the external output terminal plate 261 to the hall computer 262 for each opening of the inner frame 12 or the front frame 14. In this way, even if the timer IC1 functions as a monostable multivibrator, the integration circuit 281 is provided in front of the TRG terminal of the timer IC1 to suppress the consumption of the electric charge stored in the capacitor CD1 and is special. The output period of the pulse signal output from the external output terminal board 261 to the hall computer 262 can be limited to about 10 ms without adopting a simple circuit configuration.

The TRG terminal of the timer IC1 is connected to the cathode terminal of the Zener diode D3 having a limiting voltage (Zener voltage) of about 10.5 volts, and the ground is connected to the anode terminal of the Zener diode D3. In this Zener diode D3, when the inner frame 12 or the front frame 14 is opened and the switch SW1 or the switch SW2 is conducted, the electric charge stored in the capacitor CD7 and the voltage supplied from the capacitor CD1 are superimposed. This is an element that prevents an overvoltage (for example, a voltage of 12.3 volts) having a magnitude that destroys the timer IC1 from being applied to the TRG terminal of the timer IC1. Specifically, the inner frame 12 or the front frame 14 is opened, the switch SW1 or the switch SW2 is conducted, and the electric charge stored in the capacitor CD7 is returned to the inner frame 12 or the front frame within a relatively short period of time. When the next opening of 14 is performed and the switch SW1 or the switch SW2 is conducted, the electric charge is discharged from the other end side to the one end side of the switch SW1 or the switch SW2. The voltage of about 10.3 volts discharged from the capacitor CD7 and the voltage of about 10.3 volts supplied from the capacitor CD1 are superimposed, and an overvoltage of a magnitude that destroys the timer IC1 is applied to the TRG terminal of the timer IC1. Can be applied. However, since the Zener diode D3 having a limiting voltage (Zener voltage) of about 10.5 volts is connected between the TRG terminal of the timer IC1 and the ground, the voltage applied to the TRG terminal of the timer IC1 is increased. The maximum value is about 10.5 volts, and an overvoltage large enough to destroy the timer IC1 is not applied to the TRG terminal of the timer IC1. As described above, by using the Zener diode D3 having a simple structure and being inexpensive, it is possible to prevent an overvoltage of a magnitude that destroys the timer IC1 from being applied to the TRG terminal of the timer IC1 and prevent damage to the timer IC1. it can.

As described above, since the limiting depressurization (Zener voltage) of the Zener diode D3 is about 10.5 volts, the inner frame 12 and the front frame 14 are closed, and the switch SW1 and the switch SW2 are shut off. In that case, the current supplied from the capacitor CD1 does not flow to the ground via the Zener diode D3, and the electric charge of the capacitor CD1 is not consumed. Further, the cathode terminal of the diode D2 is connected to one end of the switch SW1 and the switch SW2, and since this diode D2 exerts a current backflow prevention function, the voltage of about 10.3 volts discharged from the capacitor CD7. However, it is applied to the VDD terminals of the capacitor CD1 and the timer IC1 so that they are not damaged.

As described above, in the timer IC1 of the frame opening detection circuit 280, the inner frame 12 or the front frame 14 is opened, the switch SW1 or the switch SW2 is conducted, and the voltage applied to the TRG terminal of the timer IC1 drops to zero volt. Then, for about 10 ms from this fall, it functions as a monostable multivibrator that raises the voltage of the OUT terminal of the timer IC1 from zero volt to about 9.6 volt. Then, by providing the integrating circuit 281 in front of the TRG terminal of the timer IC 1, when the inner frame 12 or the front frame 14 is opened, the timer IC 1 is operated regardless of the opening period of the inner frame 12 and the front frame 14. Adjust the period from when the voltage applied to the TRG terminal drops to about 10.3 volts until it returns to about 10.3 volts, which is shorter than the period when the voltage at the OUT terminal of the timer IC1 rises from zero volts to about 9.6 volts. Can be done. In this way, the integrator circuit 281 sets the fall period of the TRG terminal voltage of the timer IC1 to a fixed period (about 2 ms) regardless of the open period of the inner frame 12 and the front frame 14, thereby forming a monostable multivibrator. The functioning timer IC1 can be operated normally, and the period during which the voltage of the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volt can be limited to about 10 ms. As a result, the period during which the current is supplied from the capacitor CD1 to the photocoupler PR1 can be limited to about 10 ms, and the output period of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms. it can.

Further, since the frame opening detection circuit 280 is provided with a 0.1F capacitor CD1, the frame opening detection circuit 280 supplies power to the pachinko machine, and a DC voltage of 12 volts is applied from the DC power supply DC1. If it is supplied, it naturally operates, and further, for example, when the business hours of the amusement park are over and the power supply to the pachinko machine is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1. Even so, the opening of the inner frame 12 and the opening of the front frame 14 can be detected. Then, when the opening of the inner frame 12 or the opening of the front frame 14 is detected by the frame opening detection circuit 280, a pulse signal having a pulse width of about 10 ms is transmitted from the external output terminal plate 261 to the hall computer 262 for each detection. Can be output. The pulse signal output from the external output terminal plate 261 to the hall computer 262 is stored in the hall computer 262 that continues to operate for 24 hours. Therefore, the pachinko machine in which the inner frame 12 or the front frame 14 is opened can be identified by the pulse signal stored in the hall computer 262. Further, by storing the pulse signal output from the external output terminal plate 261 to the hall computer 262 and the output time of the output pulse signal, the opening time or the front surface of the specified pachinko machine inner frame 12 is stored. The opening time of the frame 14 can be detected.

In the door opening detection circuit 280, an LMC555 is used for the timer IC1 to detect the opening of the inner frame 12 or the opening of the front frame 14, and realize a circuit in which the photocoupler PR1 is energized for about 10 ms. It is not limited. That is, by using another integrated circuit or the like for the timer IC 1, a circuit that generates one pulse signal for one opening of the inner frame 12 or one opening of the front frame 14 is realized. The photocoupler PR1 may be energized for a predetermined period based on the pulse signal.

Further, for example, when the business hours of the amusement park are over and the power supply to the pachinko machine is cut off and the DC voltage is supplied from the capacitor CD1 to the frame opening detection circuit 280 and the external output terminal plate 261, the inner frame When the total supply period of the current from the capacitor CD1 to the photocoupler PR1 due to the opening of the 12 or the front frame 14 is lengthened, or the number of times the opening of the inner frame 12 or the front frame 14 is detected is increased, the capacitor CD1 (For example, the capacity of the capacitor CD1 is 1F), or the capacitor CD1 may be changed to a secondary battery having a large storage capacity.

Next, referring to FIG. 21, the TRG terminal voltage of the timer IC1 that changes according to the state of the switch SW1 (the state of the inner frame 12) and the state of the switch SW2 (the state of the front frame 14), and the timer IC1 The relationship between the OUT terminal voltage and the output of the external output terminal plate 261 (input of the hall computer 262) will be described. FIG. 21 shows the state of the switch SW1 (the state of the inner frame 12), the state of the switch SW2 (the state of the front frame 14), the TRG terminal voltage of the timer IC1, the OUT terminal voltage of the timer IC1, and the output of the external output terminal plate 261 (the state of the external output terminal plate 261). It is a timing chart which showed the relationship (input of a hall computer 262). It should be noted that each time from t1 o'clock to t8 o'clock shown in FIG. 21 is the same as each time from t1 o'clock to t8 o'clock shown in the timing chart of the frame opening detection circuit 260 of the first embodiment shown in FIG. is there.

As shown in FIG. 21A, when the switch SW1 becomes conductive (the inner frame 12 is in the open state) at t1, charging of the capacitor CD7 is started, and as shown in FIG. 21C, the timer IC1 The TRG terminal voltage drops from about 10.3 volts to zero volts (at t1). Then, following this, as shown in FIG. 21D, the OUT terminal voltage of the timer IC1 rises from zero volt to about 9.6 volt (at t1). As a result, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are conducted, and the current supply is started to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 20). (At t1). Then, as shown in FIG. 21 (e), the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from the low state to the high state at t1. It will change. As a result, the output of the pulse signal indicating the opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

Next, as shown in FIG. 21 (c), when about 2 ms elapses from t1 o'clock, the charging of the capacitor CD7 is completed, and the TRG terminal voltage of the timer IC1 returns from zero volt to about 10.3 volt again. However, since about 10 ms has not passed since the voltage of the OUT terminal of the timer IC1 rose from zero volt to about 9.6 volt (from t1 o'clock), the OUT terminal voltage of the timer IC1 is about 9.6 volt. Maintaining the state.

Then, when about 10 ms elapses from t1 o'clock, the timer IC1 switches the voltage of the OUT terminal from about 9.6 volts to zero volts, as shown in FIG. 21 (d). Then, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are cut off, and the current supply to one end of the resistor R7a of the external output terminal plate 261 is stopped. Therefore, the output of the external output terminal plate 261 switches from the high state to the low state after about 10 ms has elapsed from t1 o'clock, as shown in FIG. 21 (e). As a result, the output of the pulse signal output to the hall computer 262 is stopped. By switching the output of the external output terminal plate 261 in this way, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

As shown in FIG. 21A, when the switch SW1 is in the cutoff state (the inner frame 12 is in the closed state) at t2, the frame opening detection circuit 280 again detects the inner frame 12 and the front frame 14. It is set to the possible state.

Next, as shown in FIG. 21 (b), when the switch SW2 becomes conductive (the front frame 14 is in the open state) at t3, charging of the capacitor CD7 is started, and as shown in FIG. 21 (c), charging is started. The TRG terminal voltage of the timer IC1 drops from about 10.3 volts to zero volts (at t3). Then, following this, as shown in FIG. 21D, the OUT terminal voltage of the timer IC1 rises from zero volt to about 9.6 volt (at t3). As a result, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are conducted, and the current supply is started to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 20). (T3 o'clock). Then, as shown in FIG. 21 (e), the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from the low state to the high state at t3. It changes. As a result, the output of the pulse signal indicating the opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

The electric charge stored in the capacitor CD7 between t1 and t2 is instantaneously completed to be discharged via the Zener diode D3 at t3. The discharge period of the capacitor CD7 is a period much smaller than about 2 ms, when the voltage of the TRG terminal of the timer IC1 changes from about 10.3 volts to zero volts and becomes about 10.3 volts again, so that the TRG of the timer IC1 It does not significantly affect the voltage applied to the terminals. Further, in addition to this discharge, the electric charge stored in the capacitor CD7 from t1 to t2 is also discharged by the self-discharge of the capacitor CD7.

Further, at t3, a voltage of about 10.3 volts supplied from the capacitor CD1 and a voltage of about 10.3 volts associated with the electric charge stored in the capacitor CD7 are superimposed on the TRG terminal of the timer IC1. An overvoltage large enough to destroy the timer IC1 can be applied. However, since the Zener diode D3 having a limiting voltage (Zener voltage) of about 10.5 volts is connected to the front stage of the TRG terminal of the timer IC1, the maximum value of the voltage applied to the TRG terminal of the timer IC1 is An overvoltage of about 10.5 volts, which is large enough to destroy the timer IC1, is not applied to the TRG terminal of the timer IC1.

Next, as shown in FIG. 21 (c), when about 2 ms elapses from t3, the charging of the capacitor CD7 is completed, and the TRG terminal voltage of the timer IC1 returns from zero volt to about 10.3 volt again. However, since about 10 ms has not passed since the voltage of the OUT terminal of the timer IC1 rose from zero volt to about 9.6 volt (from t3 o'clock), the OUT terminal voltage of the timer IC1 is about 9.6 volt. Maintaining the state.

Then, about 10 ms after t3, the timer IC1 switches the voltage of the OUT terminal from about 9.6 volts to zero volts, as shown in FIG. 21 (d). Then, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are cut off, and the current supply to one end of the resistor R7a of the external output terminal plate 261 is stopped. Therefore, the output of the external output terminal plate 261 switches from the high state to the low state as shown in FIG. 21 (e) when about 10 ms elapses from t3 o'clock. As a result, the output of the pulse signal output to the hall computer 262 is stopped. By switching the output of the external output terminal plate 261 in this way, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

As shown in FIG. 21B, when the switch SW2 is shut off (the front frame 14 is closed) at t4, the frame opening detection circuit 280 again detects the inner frame 12 and the front frame 14. It is set to the possible state.

Finally, a case where the switch SW2 is in the conductive state (the front frame 14 is in the open state) when the switch SW1 is in the conductive state (the inner frame 12 is in the open state) will be described. As shown in FIG. 21 (a), the switch SW1 is in a conductive state (inner frame 12 is in an open state) at t5, and further, as shown in FIG. 21 (b), the switch SW2 is in a conductive state (front surface) at t6. When the frame 14 is in the open state), charging of the capacitor CD7 is started at t5, and as shown in FIG. 21 (c), the TRG terminal voltage of the timer IC1 drops from about 10.3 volts to zero volts (t5). Time). Then, following this, as shown in FIG. 21D, the OUT terminal voltage of the timer IC1 rises from zero volt to about 9.6 volt (at t5). As a result, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are conducted, and the current supply is started to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 20). (T5 o'clock). Then, as shown in FIG. 21 (e), the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from the low state to the high state at t5. It changes. As a result, the output of the pulse signal indicating the opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

The electric charge stored in the capacitor CD7 between t3 and t4 is instantaneously completed to be discharged via the Zener diode D3 at t5, which significantly affects the voltage applied to the TRG terminal of the timer IC1. is not it. Further, in addition to this discharge, the electric charge stored in the capacitor CD7 from t3 to t4 is also discharged by the self-discharge of the capacitor CD7.

Further, at t5, a voltage of about 10.3 volts supplied from the capacitor CD1 and a voltage of about 10.3 volts associated with the electric charge stored in the capacitor CD7 are superimposed on the TRG terminal of the timer IC1. An overvoltage large enough to destroy the timer IC1 can be applied. However, since the maximum value of the voltage applied to the TRG terminal of the timer IC1 by the Zener diode D3 is about 10.5 volts, an overvoltage large enough to destroy the timer IC1 is applied to the TRG terminal of the timer IC1. There is no.

Next, as shown in FIG. 21 (c), when about 2 ms elapses from t5, the charging of the capacitor CD7 is completed, and the TRG terminal voltage of the timer IC1 returns from zero volt to about 10.3 volt again. However, since about 10 ms has not passed since the voltage of the OUT terminal of the timer IC1 rose from zero volt to about 9.6 volt (from t5 o'clock), the OUT terminal voltage of the timer IC1 is about 9.6 volt. Maintaining the state.

Then, about 10 ms after t5, as shown in FIG. 21 (d), the timer IC1 switches the voltage of the OUT terminal from about 9.6 volts to zero volts. Then, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are cut off, and the current supply to one end of the resistor R7a of the external output terminal plate 261 is stopped. Therefore, the output of the external output terminal plate 261 switches from the high state to the low state as shown in FIG. 21 (e) when about 10 ms elapses from t5 o'clock. As a result, the output of the pulse signal output to the hall computer 262 is stopped. By switching the output of the external output terminal plate 261 in this way, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

As shown in FIG. 21A, the switch SW1 is in the shutoff state (inner frame 12 is in the closed state) at t7, and the switch SW2 is in the shutoff state at t8 as shown in FIG. 21B. When (the front frame 14 is in the closed state), the frame opening detection circuit 280 is set to a state in which the inner frame 12 and the front frame 14 can be detected again.

In this way, when the switch SW1 is in the conductive state (the inner frame 12 is in the open state), even if the switch SW2 is in the conductive state (the front frame 14 is in the open state), the timer IC1 keeps the continuity period of the switch SW1. Regardless of the (opening period of the inner frame 12) and the conduction period of the switch SW2 (opening period of the front frame 14), either the switch SW1 or the switch SW2 is in a conductive state (either the inner frame 12 or the front frame 14). Is in the open state), and when about 10 ms elapses after the TRG terminal voltage of the timer IC1 drops from about 10.3 volts to zero volts, the voltage of the OUT terminal of the timer IC1 is switched from about 9.6 volts to zero volts. As a result, the supply period of the current supplied to the photocoupler PR1 of the external output terminal plate 261 becomes about 10 ms.

Therefore, for example, when the business hours of the amusement park are over and the power supply to the pachinko machine is cut off, and the DC power supply DC1 to the DC voltage of 12 volts is not supplied to the frame opening detection circuit 280 and the external output terminal board 261. When a DC voltage of about 10.3 volts is supplied from the capacitor CD1 to the frame open detection circuit 280 and the external output terminal plate 261, the supply period of the current supplied from the capacitor CD1 to the photocoupler PR1 is set to the inner frame 12 Alternatively, it can be limited to about 10 ms per opening of the front frame 14. Therefore, the power consumption due to the opening of the inner frame 12 or the front frame 14 can be suppressed to a small value.

Here, since the capacitor CD1 has a capacitance of 0.1 F and the voltage applied to the capacitor CD1 is about 11.3 volts, the electric charge stored in the capacitor CD1 is the capacitance of the capacitor CD1 and the applied voltage of the capacitor CD1. From the product of, it becomes about 1.13C (coulomb). The electric charge of about 1.13C stored in the capacitor CD1 corresponds to about 500 times of current supply when the current supply period from the capacitor CD1 to the photocoupler PR1 is about 10 ms. To do. Therefore, for example, when the business hours of the amusement park are over, the power supply to the pachinko machine is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1, the inner frame 12 is opened (the continuity of the switch SW1). ) Or the front frame 14 is opened (conduction of the switch SW2) many times, the frame opening detection circuit 280 opens the inner frame 12 or the front frame 14 (conduction of the switch SW1 or the switch). (Conduction of SW2) can be reliably detected up to about 500 times each time, and a pulse signal can be output from the external output terminal board 261 to the hall computer 262. At this time, when the inner frame 12 is opened or the front frame 14 is opened about 500 times, the electric charge stored in the capacitor CD1 decreases, and the current value supplied from the capacitor CD1 to the photocoupler PR1 decreases, but the hole By increasing the detection sensitivity of the pulse signal of the computer 262 (by lowering the threshold value for the amplitude of the pulse signal), the hall computer 262 can store the pulse signal.

As described above, according to the pachinko machine of the third embodiment, when the inner frame 12 or the front frame 14 is in the open state and the switch SW1 or the switch SW2 is in the conductive state, the integrator circuit 281 causes the inner frame. Regardless of the opening period of 12 or the front frame 14, the falling period of the voltage applied to the TRG terminal of the timer IC 1 is set to a fixed period (about 2 ms). Then, the timer IC1 functioning as a monostable multivibrator operates normally, and the voltage of the OUT terminal of the timer IC1 is reduced from zero volt until about 10 ms elapses after the TRG terminal voltage of the timer IC1 drops to zero volt. Start up to 9.6 volts. As a result, a current is supplied to the light emitting diode on the primary side of the photocoupler PR1 provided on the external output terminal plate 261 via the resistor R7a, and the light emitting diode emits light for about 10 ms. Then, when the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 receives the light of the light emitting diode, the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 receives the light of about 10 ms in pulse width. Converts into a pulse signal (electrical signal) of about 10 ms, and outputs the pulse signal to the hall computer 262. The output pulse signal is stored in the hall computer 262. Therefore, by using the frame opening detection circuit 280 provided with the integrating circuit 281 and the external output terminal plate 261, it is possible to make the hall computer 262 remember that the inner frame 12 has been opened or the front frame 14 has been opened. it can. The hall computer 262 has been operated for 24 hours. Therefore, in the frame opening detection circuit 280, the pulse signal is output from the external output terminal plate 261 and the time when the pulse signal is output, that is, the opening time of the inner frame 12 and the opening time of the front frame 14 is also the hall computer. It can be stored in 262.

Further, since the frame opening detection circuit 280 is provided with a 0.1F capacitor CD1, the frame opening detection circuit 280 supplies power to the pachinko machine, and a DC voltage of 12 volts is applied from the DC power supply DC1. If it is supplied, it naturally operates, and further, for example, when the business hours of the amusement park are over and the power supply to the pachinko machine is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1. Even so, the opening of the inner frame 12 and the opening of the front frame 14 can be detected. Therefore, for example, even when the business hours of the amusement park are over and the power supply to the pachinko machine is cut off, a pulse signal having a pulse width of about 10 ms is output from the external output terminal plate 261 to the hall computer 262. be able to.

In the present embodiment, when the inner frame 12 or the front frame 14 is open and the switch SW1 or the switch SW2 is electrically connected, a pulse signal is output from the external output terminal plate 261 to the hall computer 262. It is not limited to this. That is, when the connection of each component of the main frame opening detection circuit 280 is changed, the inner frame 12 or the front frame 14 is opened, and the opened inner frame 12 or the front frame 14 is closed, the photocoupler PR1 is connected. A current may be supplied for about 10 ms to output a pulse signal from the external output terminal board 261 to the hall computer 262.

However, in the frame opening detection circuit 280 of the present embodiment, when the inner frame 12 or the front frame 14 is opened and the switch SW1 or the switch SW2 is electrically connected, a pulse signal is transmitted from the external output terminal plate 261 to the hall computer 262. Is configured to output, so that the opening of the inner frame 12 or the front frame 14 can be quickly detected. Therefore, it is possible to detect the opening of the inner frame 12 or the front frame 14 before the inner frame 12 or the front frame 14 is opened and the main control device 110 or the game board 13 is cheated. Therefore, it is possible to prevent abnormal operation due to fraudulent acts that occur when power is being supplied to the pachinko machine.

Further, when it is desired to separately store in the hall computer 262 which of the inner frame 12 and the front frame 14 is opened, the following configuration may be used. First, the frame opening detection circuit 280 and the external output terminal plate 261 used in the present embodiment are newly provided one by one, the switch SW2 connected in parallel to the switch SW1 is disconnected, and the disconnected switch SW2 is newly provided. It may be connected to the provided frame opening detection circuit 280. Specifically, one end of the disconnected switch SW2 is connected to the cathode terminal of the diode D2 of the newly provided frame opening detection circuit 280, the cathode terminal of the diode D3, and the TRG terminal of the timer IC1, and the disconnected switch SW2 is connected. The other end may be connected to one end of the capacitor CD7 of the newly provided frame opening detection circuit 280. In this way, the frame opening detection circuit 280 and the external output terminal plate 261 are newly provided, and only the switch SW2 is connected to the newly provided frame opening detection circuit 280, and the switch is connected to the existing frame opening detection circuit 280. By connecting only SW1, when there is continuity of the switch SW1 (opening of the inner frame 12), the pulse signal output from the existing external output terminal plate 261 and the continuity of the switch SW2 (opening of the front frame 14). ), The pulse signal output from the newly provided external output terminal plate 261 can be output to the hall computer 262 separately. Here, the hall computer 262 has an input terminal for a pulse signal output from the existing external output terminal plate 261 (for detecting continuity of the switch SW1 (for detecting the opening of the inner frame 12)) and a newly provided external output terminal. Separate from the input terminal of the pulse signal output from the plate 261 (for detecting the continuity of the switch SW2 (for detecting the opening of the front frame 14)). With this configuration, the continuity of the switch SW1 (opening of the inner frame 12) and the continuity of the switch SW2 (opening of the front frame 14) can be distinguished and stored in the hall computer 262. Therefore, depending on the pulse signal stored in the hall computer 262, there was continuity of the switch SW1 (opening of the inner frame 12), conduction of the switch SW2 (opening of the front frame 14), or both. Can be detected accurately.

Further, when power is being supplied to the pachinko machine, which of the inner frame 12 and the front frame 14 is opened is separately stored in the hall computer 262, and which of the inner frame 12 and the front frame 14 is opened. If you want to use a pachinko machine to notify you when the machine is open, you can use the following configuration. First, the frame opening detection circuit 280 and the external output terminal plate 261 used in the present embodiment are newly provided one by one, the switch SW2 connected in parallel to the switch SW1 is disconnected, and the disconnected switch SW2 is newly provided. It is connected to the provided frame opening detection circuit 280. Next, the male switches SW1b and SW2b and the female switches SW1a and SW2a are newly provided on the switch SW1 and the switch SW2, respectively. Then, when the inner frame 12 or the front frame 14 is opened and the switch SW1 or the switch SW2 becomes conductive by using the newly provided male switches SW1b and SW2b and the female switches SW1a and SW2a, a signal is sent to the MPU 201. It may be configured to be input.

Specifically, one end of the disconnected switch SW2 is connected to the cathode terminal of the diode D2 of the newly provided frame opening detection circuit 280, the cathode terminal of the diode D3, and the TRG terminal of the timer IC1, and the disconnected switch SW2 is connected. The other end may be connected to one end of the capacitor CD7 of the newly provided frame opening detection circuit 280. In this way, the frame opening detection circuit 280 and the external output terminal plate 261 are newly provided, and only the switch SW2 is connected to the newly provided frame opening detection circuit 280, and the switch is connected to the existing frame opening detection circuit 280. By connecting only SW1, when there is continuity of the switch SW1 (opening of the inner frame 12), the pulse signal output from the existing external output terminal plate 261 and the continuity of the switch SW2 (opening of the front frame 14). ), The pulse signal output from the newly provided external output terminal plate 261 can be output to the hall computer 262 separately.

Next, the male switch SW1b and the male switch SW2b are further provided on the switch SW1 and the switch SW2, respectively, and the male switch SW1b and the male switch SW2b arranged on the switch SW1 and the switch SW2 are provided with two male switches SW1b and two male switches SW2b, respectively. To do. Correspondingly, the switch SW1 and the switch SW2 are further provided with the female switch SW1a and the female switch SW2a, respectively, and the female switch SW1a and the female switch SW2a arranged on the switch SW1 and the switch SW2 are provided with 2 respectively. Make them one by one. As a result, one new combination of the male switch SW1b and the female switch SW1a is added to the switch SW1. Further, as in the case of the switch SW1, a new combination of the male switch SW2b and the female switch SW2a is added to the switch SW2. Then, one end of the pair of terminals pair SW1c built in the newly added female switch SW1a is connected to the DC power supply DC1 of the existing frame opening detection circuit 280, and built in the newly added female switch SW1a. The other end of the pair of terminals and SW1c is connected to the input / output port 205 of the MPU 201. Similarly, one end of the pair of terminals vs. SW2c built into the newly added female switch SW2a is connected to the DC power supply DC1 of the newly provided frame opening detection circuit 280, and the newly added female type is used. The other end of the pair of terminal pairs SW2c built in the switch SW2a is connected to the input / output port 205 of the MPU 201, and is connected to a port different from the other end of the terminal pair SW1c. Further, the MPU 201 detects a 12-volt voltage (signal) or an opening of the inner frame 14 when the inner frame 12 or the front frame 14 is opened and the switch SW1 or the switch SW2 conducts to detect the opening of the inner frame 12. When a voltage (signal) of 12 volts is input to the input / output port 205, a command indicating that the opening of the inner frame 12 or the front frame 14 is detected is transmitted to the voice lamp control device 113 and the display control device 114. To do. At this time, the commands transmitted from the MPU 201 are a command when the opening of the inner frame 12 is detected (hereinafter, referred to as an "inner frame command") and a command when the front frame 14 is opened (hereinafter, "" It is separated from the "front frame command"). Then, the voice lamp control device 113 that has received each of these commands notifies different modes depending on whether the inner frame command is received or the front frame command is received. For example, the voice output device 226 emits a different warning sound, or the lamp display device 227 is lit differently. Further, the display control device 114 that has received each of these commands displays different modes depending on whether the inner frame command is received or the front frame command is received. For example, when the display control device 114 receives the inner frame command, the third symbol display device 81 displays "the inner frame is open", or when the display control device 114 receives the front frame command. The third symbol display device 81 may be configured to display "the front frame is open".

In this way, one new combination of the male switch SW1b and the female switch SW1a is added to the switch SW1, and the switch SW2 is also newly combined with the male switch SW2b and the female switch SW2a in the same manner as the switch SW1. When the switch SW1 is conducted (when the inner frame 12 is opened), the MPU 201 issues an inner frame command to the voice lamp control device 113 and the display control device 114 by using them. Configure to send. Further, when the switch SW2 is electrically connected (when the front frame 14 is opened), the MPU 201 is configured to transmit a front frame command to the voice lamp control device 113 and the display control device 114. With this configuration, the voice lamp control device 113 and the display control device 114 can be used to perform notification in different modes depending on whether the inner frame 12 is opened or the front frame 14 is opened. Can be done. As a result, using a pachinko machine, it is possible to accurately determine whether the switch SW1 is conducting (opening the inner frame 12), the switch SW2 is conducting (opening the front frame 14), or both. Can be detected.

Further, a frame opening detection circuit 280 and an external output terminal plate 261 are newly provided, and only the switch SW2 is connected to the newly provided frame opening detection circuit 280, and the switch SW1 is connected to the existing frame opening detection circuit 280. When there is continuity of the switch SW1 (opening of the inner frame 12) by connecting only, the pulse signal output from the existing external output terminal plate 261 and the continuity of the switch SW2 (opening of the front frame 14). If there is, the pulse signal output from the newly provided external output terminal plate 261 can be output to the hall computer 262 separately. Therefore, depending on the pulse signal stored in the hall computer 262, there was continuity of the switch SW1 (opening of the inner frame 12), conduction of the switch SW2 (opening of the front frame 14), or both. Can be detected accurately.

In the present embodiment, the pulse signal output from the external output terminal plate 261 is output to the hall computer 262, which is installed at a different location from the pachinko machine, but the present invention is not limited to this. A dedicated storage device having the function of the hall computer 262 may be provided for each pachinko machine, and the dedicated storage device may be arranged on the back side of each pachinko machine provided with the main control device 110 or the like. In this case, better, a dedicated storage device such as the main control device 110, the payout control device 111, and the launch control device 112 is housed in the board box, and the box base and the box cover provided in the board box. And are connected by a sealing unit (not shown) so that they cannot be opened (connection by a caulking structure). Then, a sealing sticker (not shown) is attached to the connecting portion between the box base and the box cover over the box cover and the box base.

Although the present invention has been described above based on one embodiment, the present invention is not limited to the above-described embodiment, and it is easy that various modifications and improvements can be made without departing from the spirit of the present invention. It can be inferred from.

For example, in each of the above embodiments, each command is transmitted from the main control device 110 to the voice lamp control device 113, and the voice lamp control device 113 gives a display instruction to the display control device 114. However, the command may be directly transmitted from the main control device 110 to the display control device 114. Further, the voice lamp control device may be connected to the display control device, and a command for instructing the output of each voice and the lighting of the lamp may be transmitted from the display control device to the voice lamp control device. Further, the voice lamp control device and the display control device may be configured as one control device.

Further, in the above embodiment, the winning of the first ball opening 64 and the passage of the second ball opening 67 are each held up to 4 times, but the maximum number of times of holding is 4 times. The number of times is not limited, and may be set to 3 times or less, or 5 times or more (for example, 8 times). Further, the number of times the variable display is held based on the winning of the first ball opening 64 is different by the number of times the variable display is held even in a part of the third symbol display device 81, or the area divided into four is changed by the number of times of holding. It may be displayed in an aspect (for example, a color or a lighting pattern), and a light emitting member such as a lamp is provided separately from the first symbol display device 37, and the light emitting member is configured to notify the number of hold times. You may.

Further, as shown in the above embodiment, the variable display, which is a kind of dynamic display, is not limited to the one in which the symbol as the identification information is scrolled vertically on the display screen of the third symbol display device 81. The design may be moved and displayed along a predetermined path such as a horizontal direction or an L-shape. Further, the dynamic display of the identification information is not limited to the variable display of the symbol, for example, one or a plurality of characters are displayed together with the symbol or in a wide variety of motion display or change display separately from the symbol. It also includes the effect display. In this case, one or more characters are used as the third symbol.

The present invention may be implemented in a pachinko machine or the like of a type different from the above-described embodiment. For example, it may be carried out on a so-called second-class pachinko gaming machine having a winning device having a special area such as a V zone. Further, in addition to the pachinko machine, it may be implemented as another game machine such as an arepachi or a sparrow ball.

The present invention may be implemented in a pachinko machine or the like of a type different from the above-described embodiment. For example, once a jackpot is hit, a pachinko machine (commonly known as a two-time right item, a three-time right item) that raises the expected value of the jackpot until multiple times (for example, two or three times) a big hit state occurs including that. It may be carried out as). Further, after the jackpot symbol is displayed, it may be implemented as a pachinko machine that generates a special game that gives a player a predetermined game value on the condition that a ball is won in a predetermined area. Further, it may be carried out on a pachinko machine that has a winning device having a special area such as a V zone and is in a special gaming state on the condition that a ball is won in the special area. Further, in addition to the pachinko machine, it may be implemented as various game machines such as a pachinko machine, a sparrow ball, a slot machine, a so-called pachinko machine and a slot machine.

In the slot machine, for example, the symbol is changed by operating the operation lever in a state where a coin is inserted to determine the symbol effective line, and the symbol is stopped and confirmed by operating the stop button. It is a thing. Therefore, the basic concept of the slot machine is "provided with a display device for displaying the identification information in a variable manner after displaying the identification information string composed of a plurality of identification information in a variable manner, and the operation of the starting operation means (for example, the operation lever) is caused. The variable display of the identification information is started, and the variable display of the identification information is stopped and confirmed and displayed due to the operation of the stop operation means (for example, the stop button) or after a predetermined time has elapsed, and the stop is stopped. It becomes a "slot machine that generates a special game that gives a player a predetermined game value on the condition that the combination of time identification information is specific". In this case, the game medium is represented by coins, medals, etc. Take as an example.

Further, as a specific example of a gaming machine in which a pachinko machine and a slot machine are fused, a display device for variably displaying a symbol sequence consisting of a plurality of symbols and then confirming the symbol is provided, and a handle for launching a ball is provided. Some are not. In this case, after a predetermined amount of balls are thrown in based on a predetermined operation (button operation), the symbol variation is started due to, for example, the operation of the operation lever, and for example, due to the operation of the stop button or a predetermined amount. As time elapses, the fluctuation of the symbol is stopped, and a special game is generated that gives the player a predetermined game value on the condition that the confirmed symbol at the time of the stop is a so-called jackpot symbol, and the player is given a predetermined game value. Is for paying out a large amount of balls to the lower saucer.

The gaming machine and modified examples of the present invention are shown below. In a gaming machine provided with a main body, a door body that opens and closes the front surface of the main body, and a control means provided in a space formed by the door body and the main body to control a game, the door to the main body is provided. The door opening detecting means for detecting the opening of the body and the output means for outputting the detection result to the specific device when the opening of the door body is detected by the door opening detecting means are provided. The gaming machine 1 is characterized in that when the power of the gaming machine is turned off and the control means is stopped, the detection result by the door opening detecting means can be output to the specific device.

According to the gaming machine 1, even when the power of the gaming machine is turned off and the control means is stopped, when the opening of the door body is detected by the door opening detecting means, the detection result is specified by the output means. Output to the device. Therefore, for example, even if the door body is opened due to an illegal act by someone after the store is closed with all the gaming machines turned off, the game machine with the opened door body can be determined by the specific device.

The space formed by the door body and the main body indicates the back surface or the back surface side of the door body that cannot be touched when the door body is closed. Further, the detection result output from the output means provided for each of the plurality of gaming machines may be received by one specific device, or a specific device is provided for each gaming machine and the specific device is distributed to each gaming machine. You may set it. When the specific device is arranged in each gaming machine, the box base and the box cover covering the opening of the box base are connected to each other and specified in the space formed by the box cover and the box base. Store the device. Then, the box cover and the box base are connected by the sealing unit so as not to be opened. Further, a sealing sticker is attached to the connecting portion between the box cover and the box base over the box cover and the box base. On top of that, the specific device may be arranged on the back surface or the back surface side of the door body.

In a gaming machine provided with a main body, a door body that opens and closes the front surface of the main body, and a control means provided in a space formed by the door body and the main body to control a game, the door to the main body is provided. A door opening detecting means for detecting the opening of the body, an output means for outputting the detection result to a specific device when the opening of the door body is detected by the door opening detecting means, and one time by the output means. A game characterized by comprising an output period limiting means for keeping an output period within a predetermined period, and an off-time operating means for operating the output period limiting means and the output means while the power of the gaming machine is off. Machine 2.

According to the gaming machine 2, when the door opening detecting means detects the opening of the door body, the detection result is output to the specific device by the output means. Since the output means operates by receiving power supply from the operating means during the off while the power of the gaming machine is off, if the door opening detecting means detects the opening of the door body even when the power of the gaming machine is off. , The detection result can be output to a specific device. Therefore, for example, even if the door body is opened due to an illegal act by someone after the store is closed with all the gaming machines turned off, the game machine with the opened door body can be determined by the specific device.

Moreover, one output period by the output means is kept within a predetermined period by the output period limiting means. Like the output means, the output period limiting means also operates by receiving power supply from the operating means during the off while the power of the gaming machine is turned off, so that the operating period of the output means by opening the door once is within a predetermined period. It is possible to suppress the consumption of the operating means during the off while the power of the gaming machine is off. Therefore, the number of times that the output means can be operated can be increased, and the number of times that the opening of the door body can be detected can be increased.

In a gaming machine provided with a main body, a door body that opens and closes the front surface of the main body, and a control means provided in a space formed by the door body and the main body to control a game, the door to the main body is provided. A door opening detecting means for detecting the opening of the body, an output means for outputting the detection result to a specific device when the opening of the door body is detected by the door opening detecting means, and one time by the output means. The output means is provided with an output period limiting means for keeping the output period within a predetermined period, an off-time operating means for operating the output period limiting means and the output means while the power of the gaming machine is off, and the output means is the output. The detection result is output to the specific device based on the output from the period limiting means, and the output period limiting means is said to be said during the predetermined period when the opening of the door body is detected by the door opening detecting means. A gaming machine 3 characterized by outputting to an output means.

According to the gaming machine 3, when the door opening detecting means detects the opening of the door body, the detection result is output to the specific device by the output means. Since the output means operates by receiving power supply from the operating means during the off while the power of the gaming machine is off, if the door opening detecting means detects the opening of the door body even when the power of the gaming machine is off. , The detection result can be output to a specific device. Therefore, for example, even if the door body is opened due to an illegal act by someone after the store is closed with all the gaming machines turned off, the game machine with the opened door body can be determined by the specific device.

Moreover, one output period by the output means is kept within a predetermined period by the output period limiting means. Like the output means, the output period limiting means also operates by receiving power supply from the operating means during the off while the power of the gaming machine is turned off, so that the operating period of the output means by opening the door once is within a predetermined period. It is possible to suppress the consumption of the operating means during the off while the power of the gaming machine is off. Therefore, the number of times that the output means can be operated can be increased, and the number of times that the opening of the door body can be detected can be increased.

Further, the output means for outputting the detection result to the specific device based on the output from the output period limiting means is provided by the output period limiting means during a predetermined period when the opening of the door body is detected by the door opening detecting means. Output is done. Therefore, the output operation to the output means by the output period limiting means can be stopped within a predetermined period for each opening of the door body. Therefore, it is possible to suppress the consumption of the operating means while the gaming machine is turned off, and to increase the number of times the output means can be operated to increase the number of times that the opening of the door body can be detected.

In a gaming machine provided with a main body, a door body that opens and closes the front surface of the main body, and a control means provided in a space formed by the door body and the main body to control a game, the door to the main body is provided. A door opening detecting means for detecting the opening of the body, an output means for outputting the detection result to a specific device when the opening of the door body is detected by the door opening detecting means, and one time by the output means. The output means is provided with an output period limiting means for keeping the output period within a predetermined period, an off-time operating means for operating the output period limiting means and the output means while the power of the gaming machine is off, and the output means is the output. The detection result is output to the specific device based on the output from the period limiting means, and the output period limiting means outputs to the output means when the opening of the door body is not detected by the door opening detecting means. 4. A gaming machine characterized by stopping the door 4.

According to the gaming machine 4, when the door opening detecting means detects the opening of the door body, the detection result is output to the specific device by the output means. Since the output means operates by receiving power supply from the operating means during the off while the power of the gaming machine is off, if the door opening detecting means detects the opening of the door body even when the power of the gaming machine is off. , The detection result can be output to a specific device. Therefore, for example, even if the door body is opened due to an illegal act by someone after the store is closed with all the gaming machines turned off, the game machine with the opened door body can be determined by the specific device.

Moreover, one output period by the output means is kept within a predetermined period by the output period limiting means. Like the output means, the output period limiting means also operates by receiving power supply from the operating means during the off while the power of the gaming machine is turned off, so that the operating period of the output means by opening the door once is within a predetermined period. It is possible to suppress the consumption of the operating means during the off while the power of the gaming machine is off. Therefore, the number of times that the output means can be operated can be increased, and the number of times that the opening of the door body can be detected can be increased.

Further, the output of the output period limiting means to the output means for outputting the detection result to the specific device is stopped when the opening of the door body is not detected by the door opening detecting means. Therefore, when the door opening detecting means does not detect the opening of the door body, the power consumed by the output operation of the output period limiting means can be suppressed. Therefore, it is possible to suppress the consumption of the operating means while the gaming machine is turned off, and to increase the number of times the output means can be operated to increase the number of times that the opening of the door body can be detected.

In a gaming machine provided with a main body, a door body that opens and closes the front surface of the main body, and a control means provided in a space formed by the door body and the main body to control a game, the door to the main body is provided. A door opening detecting means for detecting the opening of the body, an output means for outputting the detection result to a specific device when the opening of the door body is detected by the door opening detecting means, and one time by the output means. The output when the output period limiting means using a monostable multi-vibrator that keeps the output period within a predetermined period and the output period limiting means are connected and the door opening detecting means detects the opening of the door body. The power of the game machine is turned off by the input period adjusting means for adjusting the signal input to the period limiting means to a period shorter than the predetermined period regardless of the opening period of the door body, and the output period limiting means and the output means. The gaming machine 5. The gaming machine is provided with an off-middle operation means for operating the inside.

According to the gaming machine 5, when the door opening detecting means detects the opening of the door body, the detection result is output to the specific device by the output means. Since the output means operates by receiving power supply from the operating means during the off while the power of the gaming machine is off, if the door opening detecting means detects the opening of the door body even when the power of the gaming machine is off. , The detection result can be output to a specific device. Therefore, for example, even if the door body is opened due to an illegal act by someone after the store is closed with all the gaming machines turned off, the game machine with the opened door body can be determined by the specific device.

Moreover, one output period by the output means is kept within a predetermined period by the output period limiting means. Like the output means, the output period limiting means also operates by receiving power supply from the operating means during the off while the power of the gaming machine is turned off, so that the operating period of the output means by opening the door once is within a predetermined period. It is possible to suppress the consumption of the operating means during the off while the power of the gaming machine is off. Therefore, the number of times that the output means can be operated can be increased, and the number of times that the opening of the door body can be detected can be increased.

Further, the signal input to the output period limiting means using the monostable multivibrator is shorter than the predetermined period, which is one output period by the output means, regardless of the opening period of the door body by the input period adjusting means. It will be adjusted. Here, the monostable multivibrator continues to output the signal unless the input period of the input signal is shorter than the output period of the output signal. Therefore, when the monostable multivibrator is used as the output period limiting means, it is input to the output period limiting means more than the output period of the output signal, that is, the predetermined period limited by the output period limiting means. The input period of the signal, that is, the opening period of the door body must be short. However, since it is completely unpredictable how long the opening period of the door body will be, in order to make the opening period of the door body always shorter than the predetermined period limited by the output period limiting means, the predetermined period is required. It is necessary to set the setting to a sufficient period. For example, if the opening period of the door body is predicted to be from several tens of seconds to several minutes, the predetermined period limited by the output period limiting means is set from several minutes to several tens of minutes with sufficient margin. Must. Then, during this predetermined period, power is continuously supplied to the output period limiting means and the output means from the off operating means, so that the off operating means is significantly consumed. Therefore, in order to suppress the consumption of the operating means during off after using the monostable multivibrator as the output period limiting means, a special circuit configuration is required. However, according to the gaming machine 5, the input period adjusting means can adjust the signal input to the output period limiting means to be shorter than a predetermined period regardless of the opening period of the door body. Therefore, regardless of the opening period of the door body, the output period limiting means can be operated normally, so that one output period by the output means can be kept within a predetermined period by the output period limiting means. As described above, according to the gaming machine 5, by providing the input period adjusting means, the consumption of the operating means during off is suppressed, and the output is performed by using the monostable multivibrator without adopting a special circuit configuration. A time limiting means can be realized.

The gaming machine 6 is characterized in that the input period adjusting means is configured by using an integrator circuit in the gaming machine 5.

According to the gaming machine 6, since the input period adjusting means is configured by using the integrating circuit, the signal input to the output period limiting means is adjusted shorter than the predetermined period without using a complicated circuit or signal processing. can do. Further, by adjusting the resistance value of the resistor used in the integrating circuit and the capacitance value of the capacitor, the input period of the signal input to the output period limiting means can be freely adjusted within a predetermined period.

The gaming machine 5 or 6 is characterized in that the input period adjusting means includes a constant voltage means for stabilizing the maximum voltage of a signal input to the output period limiting means.

According to the gaming machine 7, since the constant voltage means is provided, the maximum voltage of the signal input to the output period limiting means is made constant, the signal input to the output period limiting means is stabilized, and the output means is used. One output period can be stably maintained within a predetermined period.

When the input period adjusting means is configured by using the integrating circuit, a charge is stored in the capacitor used in the integrating circuit, and the voltage due to this charge is superimposed on the signal input to the output period limiting means. , There is a risk that an overvoltage that can destroy the output period limiting means will be applied to the output period limiting means. However, according to the gaming machine 7, since the maximum voltage of the signal input to the output period limiting means is made constant by the constant voltage means, the overvoltage that can destroy the output period limiting means is not applied to the output period limiting means. .. Therefore, it is possible to prevent the output period limiting means from being destroyed.

The gaming machine 8 is characterized in that the constant voltage means is composed of a Zener diode in the gaming machine 7.

According to the game machine 8, since the constant voltage means is composed of the Zener diode, it is input to the output period limiting means with a simple structure and at a low cost as compared with a constant voltage circuit composed of a complicated circuit or the like. The maximum voltage of the signal can be kept constant. Therefore, by using a simple configuration and an inexpensive Zener diode, the signal input to the output period limiting means is stabilized, and one output period by the output means is stably kept within a predetermined period while the output period is limited. It is possible to prevent an overvoltage that can destroy the means from being applied to the output period limiting means.

In the gaming machines 1 to 8, the door body includes an inner frame that is opened and closed with respect to the main body, and a transparent plate support door that is opened and closed with respect to the inner frame. Are provided on the inner frame and the transparent plate support door, respectively, and are connected in parallel to the output means, and the output means is connected to at least one of the inner frame or the transparent plate support door by the door opening detecting means. The gaming machine 9 is characterized in that when an opening is detected, the detection result is output to the specific device.

According to the gaming machine 9, the door opening detecting means is provided in the inner frame and the transparent plate supporting door, respectively, and is connected in parallel to the output means. Therefore, the door opening detecting means of the inner frame or the transparent plate supporting door is used. When at least one of the open doors is detected, the detection result is output to the specific device by the output means. Therefore, even if either the inner frame or the transparent plate support door constituting the door body is opened, the opening can be notified to the specific device by the output means of 1.

In any one of the gaming machines 1 to 9, the door opening detecting means is configured to be conductive when the door body is open, while being shut off when the door body is closed. A gaming machine 10 characterized by being played. According to the gaming machine 10, the door opening detecting means is conducted when the door body is open, and is shut off when the door body is closed, so that it is a time when a fraudulent act is executed. The power consumption can be kept small by operating the output means only while the door body is open.

One of the gaming machines 1 to 10 includes an off-time operating means that is charged while the gaming machine is powered on, and the output means operates by the electric charge or electric power charged in the off-operating operating means. A gaming machine 11 characterized by this. According to the game machine 11, the operating means during off is charged by the electric power supplied to the game machine while the power of the game machine is on, so that the power of the game machine is turned on according to the business hours of the game hall. Only the operating means can be charged while off. Therefore, if the door is opened while the power of the gaming machine is turned off after the game hall is closed, the output means (and the output period limiting means) are operated by the operating means during the off, and the door is opened. The detection result by the open detection means can be notified to the specific device.

In any of the gaming machines 1 to 11, the control means includes a main control means for performing main control of the game, and the output means is mounted on the main control means. ..

The gaming machine 13 according to any one of the gaming machines 1 to 11, wherein the output means is mounted on a substrate different from the control means.

In any of the gaming machines 1 to 13, the output means includes a photocoupler, and the detection result by the door open detection means is output to the specific device by the output of the photocoupler. Machine 14.

In any of the gaming machines 2 to 14, the output period limiting means and the output means are configured to be operable even if the voltage is lower than the operating voltage of the control means. .. According to the gaming machine 15, since the output period limiting means and the output means are configured to be able to operate even at a voltage lower than the operating voltage of the control means, the charge amount of the operating means during off is reduced. Even if the output voltage of the operating means during off becomes lower than the operating voltage of the control means, the output period limiting means and the output means can be operated to notify the specific device of the opening of the door body. That is, it is possible to detect the opening of the door body for a long time when the power of the gaming machine is turned off.

In any of the gaming machines 2 to 15, the output period limiting means and the output means are characterized in that the operable range voltage thereof is configured to be wider than the operable range voltage of the control means. 16. According to the gaming machine 16, the output period limiting means and the output means are configured such that the operable range voltage thereof is wider than the operating range voltage of the control means. Therefore, when the power of the gaming machine is turned off, the output period limiting means and the output means can be operated for a long time by the operating means during the off, so that the opening of the door body is detected for a long time when the power of the gaming machine is turned off. Can be done.

In any of the gaming machines 2 to 16, the gaming machine 17 is characterized in that the output period limiting means includes a C-MOS semiconductor. According to the gaming machine 17, the output period limiting means includes a C-MOS semiconductor. Here, the C-MOS semiconductor generally consumes less power during operation. Therefore, according to the gaming machine 17, it is possible to reduce the consumption of the operating means during the off and to detect the opening of the door body when the power of the gaming machine is turned off for a long time.

The gaming machine 18 according to any one of the gaming machines 1 to 17, wherein the gaming machine is a pachinko gaming machine. Among them, the basic configuration of the pachinko gaming machine is provided with an operation handle, and the ball is launched into a predetermined game area according to the operation of the operation handle, and the ball is placed in a predetermined position in the game area. As a prerequisite for winning a prize (or passing through the operating port), the identification information dynamically displayed on the display device may be fixedly stopped after a predetermined time. In addition, when a special gaming state occurs, a variable winning device (specific winning opening) arranged at a predetermined position in the gaming area is opened in a predetermined manner to enable a ball to be won, and is valuable according to the number of winnings. Some are given value (including not only prize balls but also data written on a magnetic card).

A game machine 19 in any one of the game machines 1 to 17, wherein the game machine is a slot machine. Among them, as a basic configuration of a slot machine, "a variable display means for dynamically displaying an identification information string composed of a plurality of identification information and then confirming the identification information is provided for operating a starting operation means (for example, an operation lever). Due to this, the dynamic display of the identification information is started, and the dynamic display of the identification information is stopped due to the operation of the stop operation means (stop button) or after a predetermined time has elapsed, and at the time of the stop. A gaming machine provided with a special gaming state generating means for generating a special gaming state advantageous to the player, provided that the definite identification information of the above is the specific identification information. In this case, coins, medals, and the like are typical examples of the game medium.

In any one of the gaming machines 1 to 17, the gaming machine 20 is characterized in that the gaming machine is a fusion of a pachinko gaming machine and a slot machine. Among them, as a basic configuration of the fused gaming machine, "a variable display means for dynamically displaying an identification information string composed of a plurality of identification information and then confirming and displaying the identification information is provided, and a starting operation means (for example, an operation lever). The variation of the identification information is started due to the operation of, and the dynamic display of the identification information is stopped due to the operation of the stop operation means (for example, the stop button) or after a predetermined time elapses. A special gaming state generating means for generating a special gaming state advantageous to the player is provided on the condition that the definite identification information at the time of stopping is the specific identification information, the ball is used as the game medium, and the identification information is described. A game machine that requires a predetermined number of balls to start the dynamic display of the game, and is configured to pay out a large number of balls when a special game state occurs. "
<Others>
In the pachinko machine, when a ball driven into the game area enters the symbol operating port, a lottery is performed at the timing of the entry. Further, in a spinning machine using a slot machine or a game ball, when the start lever is operated, a lottery is performed at the timing of the operation. As a result of the lottery, for example, when a big hit occurs, a large number of prize balls and coins can be paid out. Since the control for determining the lottery and the jackpot is performed by the main control device, the main control device is likely to be the target of fraudulent activity.
As a specific fraudulent act, for example, the main controller is replaced with a fraudulent one in which a jackpot occurs frequently, or a fraudulent board (for example, a "hanging board") is connected to the main controller to make a jackpot. There are things that illegally generate. Further, in the case of a pachinko machine, there is also a fraudulent act of illegally bending a nail driven on the surface of the game board to make it easier for the ball to enter the winning opening or the symbol operating opening.
In the case of pachinko machines, the main controller is mounted on the back of the game board. On the other hand, a glass frame is provided on the front surface of the game board, and the glass frame can be opened and closed individually with respect to the inner frame body on which the game board is mounted. Therefore, when a fraudster commits a fraudulent act against the game board surface or the main control device, the inner frame or the glass frame must be opened, but when the inner frame or the glass frame is opened, the inner frame or the glass frame must be opened. Since the opening is detected by the sensor and notified to the hall computer that manages the amusement park, it is possible to easily grasp which pachinko machine the fraudulent act was committed against (for example, Patent Document 1: Japanese Patent Application Laid-Open No. 2001-). 1983332).
However, if an intruder invades, for example, at midnight after the amusement park is closed and the intruder opens the inner frame or the glass frame and commits an illegal act, the power of the pachinko machine is turned off at that time. Since the pachinko machine is stopped, there is a problem that the opening of the inner frame or the glass frame cannot be detected and the opening cannot be notified to the hall computer.
This technical idea is made to solve the above-exemplified problems and the like, and can notify a specific device of the opening of the door body even when the power of the gaming machine is turned off. Is intended to provide.
<Means>
In order to achieve this purpose, the game machine of the technical idea 1 is provided in the space formed by the main body, the door body that opens and closes the front surface of the main body, and the door body and the main body to control the game. The door opening detecting means for detecting the opening of the door body with respect to the main body and the detection result when the opening of the door body is detected by the door opening detecting means are provided. The output means includes an output means for outputting to the specific device, and the output means outputs the detection result by the door open detection means to the specific device when the power of the game machine is turned off and the control means is stopped. It is configured to be possible. The space formed by the door body and the main body indicates the back surface or the back surface side of the door body that cannot be touched when the door body is closed.
The gaming machine of the technical idea 2 is the gaming machine described in the technical idea 1. The door body includes an inner frame that opens and closes with respect to the main body and a transparent plate support door that opens and closes with respect to the inner frame. The door opening detecting means is provided on the inner frame and the transparent plate support door, respectively, and is connected in parallel to the output means. The output means is provided by the door opening detecting means. When the opening of at least one of the inner frame or the transparent plate support door is detected, the detection result is output to the specific device.
The gaming machine of the technical idea 3 is the gaming machine according to the technical idea 1 or 2, in which the door opening detecting means is conducted when the door body is open, while the door body is closed. If so, it is configured to be blocked.
The gaming machine of the technical idea 4 is the gaming machine according to any one of the technical ideas 1 to 3, and includes an off-time operating means that is charged while the power of the gaming machine is on. It operates by the electric charge or electric power charged in the operating means during the off.
<Effect>
According to the gaming machine described in Technical Thought 1, even when the power of the gaming machine is turned off and the control means is stopped, when the opening of the door body is detected by the door opening detecting means, the detection result is obtained. Is output to a specific device by the output means. Therefore, for example, even if the door body is opened due to an illegal act by someone after the store is closed with all the gaming machines turned off, there is an effect that the game machine with the opened door body can be identified by a specific device. is there.
According to the gaming machine described in Technical Thought 2, the following effects are exhibited in addition to the effects of the gaming machine described in Technical Thought 1. That is, since the door opening detecting means is provided on the inner frame and the transparent plate support door, respectively, and is connected in parallel to the output means, at least one of the inner frame and the transparent plate supporting door can be opened by the door opening detecting means. If it is detected, the output means outputs the detection result to the specific device. Therefore, even if either the inner frame or the transparent plate support door constituting the door body is opened, there is an effect that the opening can be notified to the specific device by the output means of 1.
According to the gaming machine described in Technical Thought 3, in addition to the effects of the gaming machine described in Technical Thought 1 or 2, the door opening detecting means is conducted when the door body is open, while the door opening detecting means is conducted. When the door body is closed, it is shut off, so that the output means can be operated only while the door body is open, which is the time when a fraudulent act is executed, and the power consumption can be suppressed to a small value.
According to the gaming machine described in Technical Thought 4, in addition to the effect of the gaming machine described in any one of Technical Thoughts 1 to 3, it is provided with an off-time operating means that is charged while the gaming machine is powered on. Since the output means operates by the electric charge or electric power charged in the operating means during the off, there is an effect that the output means can be operated even after the power of the gaming machine is turned off.

10 Pachinko machine (game machine)
11 Outer frame (main body)
12 Inner frame (part of the door body)
14 Front frame (transparent plate support door, part of door body)
110 Main control unit (part of control means, main control means)
260, 270, 280 Frame open detection circuit (part of output means)
261 External output terminal board (part of output means)
281 Integrator circuit (input period adjusting means)
CD1, CD6 capacitors (operating means while off)
D3 Zener diode (constant voltage means)
IC1 timer (output period limiting means)
PR1 photocoupler (part of output means)
SW1 and SW2 switches (door open detection means)

Claims (4)

In a gaming machine provided with a main body, a door body that opens and closes the front surface of the main body, and a control means provided in a space formed by the door body and the main body to control a game.
A door opening detecting means for detecting the opening of the door body with respect to the main body,
When the door opening detecting means detects the opening of the door body, the door opening detecting means is provided with an output means for outputting the detection result to a specific device.
The output means is configured to be able to output the detection result by the door open detection means to the specific device when the power of the gaming machine is turned off and the control means is stopped. Pachinko machine. The door body includes an inner frame that opens and closes with respect to the main body, and a transparent plate support door that opens and closes with respect to the inner frame.
The door open detection means is provided on the inner frame and the transparent plate support door, respectively, and is connected in parallel to the output means.
The first aspect of the present invention is characterized in that, when the door opening detecting means detects the opening of at least one of the inner frame or the transparent plate support door, the output means outputs the detection result to the specific device. Gaming machine. A claim, wherein the door opening detecting means is configured to conduct conduction when the door body is open, but to shut off when the door body is closed. The gaming machine according to 1 or 2. It is equipped with an off-time operating means that is charged while the power of the gaming machine is on.
The gaming machine according to any one of claims 1 to 3, wherein the output means operates by an electric charge or electric power charged in the operating means while the operating means is off.

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