JP2021065648A - Game machine - Google Patents

Abstract

To suitably execute processing in control means.SOLUTION: A value of a monitoring period counter provided in a main side RAM 74 is incremented by one periodically. When one is further added in a situation in which a value of the monitoring period counter is a maximum value, each bit of the monitoring period counter is inverted. In this case, a value of the monitoring period counter is returned to the maximum value since a value of the monitoring period counter is decremented by one. More specifically, when a value of the monitoring period counter reaches the maximum value, the value of the monitoring period counter is maintained to be at the maximum value even if an opportunity for adding one to the value of the monitoring period counter occurs. In this case, maintaining the maximum value as in the above is performed by executing an instruction for generating carry-down of the upper-byte digit when the lower byte is decreased by one in two-byte numerical value information.SELECTED DRAWING: Figure 9

Description

The present invention relates to a gaming machine.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko gaming machine is provided with a storage unit for storing game balls, and the game balls stored in the storage unit are guided by a game ball launching device and directed toward a game area according to a player's launch operation. Is fired. Then, for example, when the game ball enters the ball entry portion provided in the game area, for example, a lottery process is executed, or, for example, a process for increasing the number of game balls that can be used by the player is executed. To.

In a slot machine, when a start lever is operated to start a new game in a situation where a game value such as a medal is bet, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination (see, for example, Patent Document 1).

Japanese Unexamined Patent Publication No. 2014-045989

Here, in a gaming machine such as the above example, it is necessary that the processing in the control means is preferably executed, and there is still room for improvement in this respect.

The present invention has been made in view of the above-exemplified circumstances and the like, and an object of the present invention is to provide a gaming machine capable of preferably performing processing in a control means.

The invention according to claim 1 in order to solve the above problems includes a predetermined calculation means for executing a predetermined calculation process on numerical information to be calculated, and a predetermined calculation means.
A corresponding storage area in which limit-exceeding correspondence information is stored when the calculation target numerical information exceeds a predetermined limit value as a result of the predetermined calculation processing by the predetermined calculation means.
When the limit-exceeding correspondence information is stored in the correspondence storage area, the limit value setting means for setting the calculation target numerical information as the predetermined limit value, and
It is characterized by having.

According to the present invention, it is possible to preferably execute the processing in the control means.

It is a front view of the slot machine in 1st Embodiment. It is a perspective view of the slot machine which shows the state which the front door is opened. It is a front view of a housing. It is a figure which shows the symbol arrangement of each reel. It is explanatory drawing which shows the relationship between the design which becomes visible from a display window part, and a combination line. It is explanatory drawing which shows the relationship between the winning mode and the privilege given. (A) is a front view of a common display area, and (b) is an explanatory view for explaining the content of information corresponding to the stop order displayed on the combined display unit. (A), (b) It is explanatory drawing for demonstrating the relationship between the notification content of the stop order in an image display device, and the display content of a stop order in a dual-purpose display unit. It is an electric block diagram of a slot machine. It is a flowchart which shows the main process which is executed in the main MPU. It is explanatory drawing for demonstrating the signal path of a power failure signal. (A) to (e) are time charts showing a state in which the progress of the processing is waited until the power failure signal reaches the HI level when the main processing is started. It is a flowchart which shows the process for power failure which is executed in the main MPU. (A)-(d) It is a time chart which shows a mode to identify that the information abnormality has occurred in the main RAM by using the information abnormality flag. It is a flowchart which shows the setting change process executed by the main MPU. It is explanatory drawing for demonstrating the contents of the storage area of a main RAM. It is a time chart which shows the state that the clear process of the main side RAM is executed by the setting change process (a)-(h). It is a flowchart which shows the setting change execution process which is executed in the main MPU. It is a flowchart which shows the timer interrupt processing executed in the main MPU. (A) It is a flowchart which shows the sensor monitoring process executed by the main side MPU, and (b) is explanatory drawing for explaining the content of the storage area provided in the main side RAM. (A) to (k) When the supply of operating power is started while the reset button is pressed, the set value to be selected is changed by the maintained pressing operation of the reset button. It is a time chart showing that there is no such thing. It is a flowchart which shows the monitoring process of the door opening sensor executed in the main MPU. It is a flowchart which shows the notification process which is executed in the main MPU. (A) to (i) are time charts showing how various notifications are executed when the supply of operating power is started and the setting change process is executed. It is a flowchart which shows the normal process which is executed in the main MPU. It is a flowchart which shows the start waiting process which is executed in the main MPU. It is a flowchart which shows the bet correspondence processing executed in the main MPU. It is a flowchart which shows the control process of the bet display part executed by the main MPU. It is explanatory drawing for demonstrating the content of an index value. It is explanatory drawing for demonstrating the relationship between the stop order of reels, and the winning mode to be established. (A) It is explanatory drawing for demonstrating the content of the data of the main side ROM for performing a lottery process of a combination, and (b) the content of the storage area of the main side RAM for performing the lottery process of a combination is explained. It is explanatory drawing for this. It is explanatory drawing for demonstrating the content of the combination lottery table group. (A) It is explanatory drawing for explaining the data group for IV = 1, (b) it is explanatory drawing for explaining the data group for IV = 16, and (c) the data group for IV = 17 is explained. It is explanatory drawing for this. It is a flowchart which shows the lottery process of the combination executed by the main MPU. It is a flowchart which shows the acquisition process of the determination value executed by the main MPU. It is a flowchart which shows the acquisition process of PV executed in the main MPU. It is a flowchart which shows the acquisition process of the winning data executed by the main MPU. It is a flowchart which shows the reel control processing which is executed in the main MPU. It is a flowchart which shows the correspondence process at the end of a game executed by the main MPU. It is explanatory drawing for demonstrating the game state and the game section existing in a slot machine. (A) It is explanatory drawing for explaining the 1st section and 2nd section, and (b) is explanatory drawing for explaining the content of each game state in 2nd section. (A) It is explanatory drawing for explaining the 1st CB combination and 2nd CB combination, and (b) is explanatory drawing for explaining the 1st CB state and the 2nd CB state. It is a flowchart which shows the 1st control process of the game section executed by the main MPU. It is a flowchart which shows the 2nd control process of the game section executed by the main MPU. It is a flowchart which shows the ending correspondence processing which is executed in the main MPU. It is a flowchart which shows the advantageous lottery process at the start of a game executed by the main MPU. It is a flowchart which shows the normal process which is executed in the main MPU. (A) It is explanatory drawing for explaining the selection probability of the game number mode, and (b) is explanatory diagram for explaining the selection probability of a winning rate mode. (A) An explanatory diagram for explaining a latch area, (b) an explanatory diagram for explaining an example of a second random number stored in the latch area, and (c) for explaining an example of an upper byte. It is explanatory drawing for demonstrating (d) an example of a 7-bit random number. It is a flowchart which shows the 2nd start setting process which is executed in the main MPU. It is explanatory drawing for demonstrating (a) game number mode lottery table, and (b) explanatory diagram for demonstrating the winning rate mode lottery table. It is a flowchart which shows the acquisition process of LV executed in the main MPU. It is a flowchart which shows the freeze setting process at the time of bonus transition executed in the main MPU. (A) to (e) It is a time chart which shows how the freeze period is set. It is a flowchart which shows the process for advantageous state at the start of a game executed by the main MPU. It is a flowchart which shows the pseudo-bonus process which is executed in the main MPU. It is a flowchart which shows the clearing process at the end of a bonus executed by the main MPU. (A) to (e) are time charts showing execution timings of various processes when the pseudo-bonus state ends. It is a flowchart which shows the process for AT state at the start of a game executed by the main MPU. It is a flowchart which shows the process for AT which is executed in the main MPU. It is a flowchart which shows the external output setting process which is executed in the main MPU. It is a flowchart which shows the process for external output executed in the main MPU. (A) to (h) is a time chart showing how the output modes of the first external signal and the second external signal are appropriately changed. It is explanatory drawing for demonstrating the electrical structure of the main MPU in 2nd Embodiment. It is explanatory drawing for demonstrating the state of the jump status flag at the time of (a), (b) the CLR execution circuit clearing a predetermined storage area "0". It is explanatory drawing for demonstrating the state of the jump status flag at the time (a), (b) the value of a specific storage area is subtracted by 1 by a DEC execution circuit. It is explanatory drawing for demonstrating (a) the data structure of a JR instruction, and (b) is an explanatory diagram for demonstrating the data structure of a JR instruction. It is explanatory drawing for demonstrating an example of the contents of the program which executed both the JR instruction and the JRS instruction as a JP instruction. It is explanatory drawing for demonstrating the stack area provided in the main side RAM in 3rd Embodiment (a)-(c). It is a flowchart which shows the advantageous lottery process at the start of a game executed by the main MPU. It is a flowchart which shows the process for advantageous state at the start of a game executed by the main MPU. It is a flowchart which shows the process for AT state at the start of a game executed by the main MPU. It is a flowchart which shows the ending determination process which is executed in the main MPU. It is a flowchart which shows the ending determination processing of the comparative example. It is a flowchart which shows the process for advantageous state at the time of starting a game of a comparative example. It is a flowchart which shows the calculation process of the weight period executed by the main MPU in 4th Embodiment. It is explanatory drawing for demonstrating the content of the subtraction process of the weight counter (a)-(c). It is a flowchart which shows the medal monitoring process which is executed in the main MPU. It is explanatory drawing for demonstrating (a) to (c) the content of the addition process of a monitoring period counter, and (d) the content of the comparative example which executes the addition process of a monitoring period counter without executing "SBC" instruction. It is explanatory drawing for demonstrating. It is a flowchart which shows the calculation process of the weight period executed by the main MPU in 5th Embodiment. (A), (b) It is explanatory drawing for demonstrating the content of the addition process of a weight counter. It is a flowchart which shows the medal monitoring process which is executed in the main MPU. It is explanatory drawing for demonstrating (a), (b) the content of the subtraction process of a monitoring period counter, and (c) the content of the comparative example which executes the subtraction process of a monitoring period counter without executing "ADC" instruction. It is explanatory drawing for demonstrating. It is a flowchart which shows the main process executed by the main MPU in 6th Embodiment. It is a flowchart which shows the main process executed by the main MPU in 7th Embodiment.

<First Embodiment>
Hereinafter, the first embodiment in the case where the present invention is applied to the slot machine 10, which is a kind of gaming machine, will be described in detail with reference to the drawings. FIG. 1 is a front view of the slot machine 10, FIG. 2 is a perspective view of the slot machine 10 with the front door 12 open, and FIG. 3 is a front view of the housing 11.

As shown in FIGS. 2 and 3, the slot machine 10 includes a housing 11 that forms an outer shell thereof. The housing 11 is formed in a box shape that is open forward as a whole by fixing a plurality of wooden panels.

As shown in FIGS. 1 and 2, a front door 12 is attached to the front side of the housing 11. The front door 12 is supported by the housing 11 so as to be able to open and close the internal space of the housing 11 with the shaft portion 15 provided on the left side of the housing 11 as a rotating shaft. The front door 12 is locked in an unopenable state by a locking device 13 provided on the back surface thereof, and this locked state is released by an unlocking operation with a predetermined key on the key cylinder 14.

A door opening sensor 16 is provided on the upper part of the housing 11. The door opening sensor 16 is for detecting whether or not the front door 12 is in the open state with respect to the housing 11. The door opening sensor 16 is electrically connected to the main control device 70 described later, and when the front door 12 is closed with respect to the housing 11, the door opening sensor 16 closes to the main control device 70. A signal corresponding to the state is transmitted, and when the front door 12 is in the open state with respect to the housing 11, the door open sensor 16 transmits a signal corresponding to the open state to the main control device 70.

As shown in FIG. 1, a game panel 20 is provided near the center of the front door 12. The game panel 20 is formed so that three vertically long display window portions 21L, 21M, and 21R are arranged side by side. The display window portions 21L, 21M, 21R are formed of a transparent or translucent material, and the inside of the slot machine 10 can be visually recognized through the display window portions 21L, 21M, 21R.

As shown in FIGS. 2 and 3, the inside of the housing 11 is divided into upper and lower parts by a partition plate 11a, and a reel unit 31 is attached to the upper part of the partition plate 11a. The reel unit 31 includes a left reel 32L, a middle reel 32M, and a right reel 32R, which are formed in a cylindrical shape, respectively. Each reel 32L, 32M, 32R is rotatably supported so that its central axis is the rotation axis of the reels 32L, 32M, 32R. The rotation axes of the reels 32L, 32M, 32R are arranged on the same axis extending in the substantially horizontal direction, and the reels 32L, 32M, 32R correspond one-to-one with the display window portions 21L, 21M, 21R. There is. Therefore, a part of the surface of each reel 32L, 32M, 32R is visible through the corresponding display window portions 21L, 21M, 21R, respectively. Further, when the reels 32L, 32M, 32R rotate in the forward direction, the surfaces of the reels 32L, 32M, 32R are projected as if they are moving from top to bottom through the display window portions 21L, 21M, 21R.

As shown in FIG. 1, a start lever 41 operated to start the rotation of each reel 32L, 32M, 32R is provided on the lower left side of the game panel 20. If the start lever 41 is operated while a predetermined number or more of game media (or game values), which are either medals or virtual medals, are bet, the reels 32L, 32M, and 32R start rotating all at once.

On the right side of the start lever 41, stop buttons 42, 43, 44 that are operated to individually stop the rotating reels 32L, 32M, 32R are provided. The stop buttons 42, 43, and 44 are arranged directly below the display window portions 21L, 21M, and 21R corresponding to the reels 32L, 32M, and 32R to be stopped, respectively. The stop buttons 42, 43, and 44 are in a state in which they can be stopped after a predetermined time has elapsed from the start of rotation of the left reel 32L.

The rotation of each reel 32L, 32M, 32R is started based on the operation of the start lever 41, and the rotation of each reel 32L, 32M, 32R is stopped based on the operation of the stop buttons 42, 43, 44, and the game medium. It corresponds to one game (game times) until the execution of various processes such as the granting of the game and the management of the game state is completed.

A medal insertion slot 45 for inserting medals is provided on the lower right side of the display window portions 21L, 21M, 21R. As shown in FIG. 2, the medals inserted from the medal insertion slot 45 are guided to the hopper device 53 by the selector 52 provided on the back surface of the front door 12 when reception is permitted, and when reception is prohibited. The medal discharge port 58 provided at the lower part of the front surface of the front door 12 leads to the medal tray 59 (see FIG. 1). The hopper device 53 has a function of paying out the medals stored in the storage tank to the medal tray 59 through the medal discharge port 58 when a prize corresponding to the granting of the game medium is established on the main line ML described later. Have. Below the medal insertion slot 45, as shown in FIG. 1, a return button 46 that is pressed when the medal inserted in the medal insertion slot 45 is jammed in the selector 52 is provided.

On the lower left side of the display windows 21L, 21M, 21R, there is a first credit insertion button 47 for inserting the maximum number of credited virtual medals that can be bet at a time, and two virtual medals at a time. A second credit insertion button 48 is provided. In the slot machine 10, there are a situation where the number of game media (medals or virtual medals) that can be bet (that is, bet setting) at one time is "3" and a situation where the number is "2".

The first credit insertion button 47 is operated in a situation where the number of bets that can be bet at one time is "3", the current number of bets is "0", and three or more virtual medals are stored and stored. In that case, the number of bets becomes "3" instead of reducing the number of virtual medals by three. The first credit insertion button 47 is operated in a situation where the number of bets that can be bet at one time is "3", the current number of bets is "1", and two or more virtual medals are stored and stored. In that case, the number of bets becomes "3" instead of reducing the number of virtual medals by two. The first credit insertion button 47 is operated in a situation where the number of bets that can be bet at one time is "3", the current number of bets is "2", and one or more virtual medals are stored and stored. In that case, the number of bets becomes "3" instead of reducing one virtual medal. The first credit insertion button 47 is operated in a situation where the number of bets that can be bet at one time is "2", the current number of bets is "0", and two or more virtual medals are stored and stored. In that case, the number of bets becomes "2" instead of reducing the number of virtual medals by two. The first credit insertion button 47 is operated in a situation where the number of bets that can be bet at one time is "2", the current number of bets is "1", and one or more virtual medals are stored and stored. In that case, the number of bets becomes "2" instead of reducing one virtual medal.

If the first credit insertion button 47 is operated when the number of stored virtual medals is less than the difference between the current number of bets and the number of bets that can be bet, the number of bets is the number of the virtual medals. As the number of medals increases, the number of virtual medals becomes 0.

The second credit insertion button 48 is operated in a situation where the number of bets that can be bet at one time is "3", the current number of bets is "0", and two or more virtual medals are stored and stored. In that case, the number of bets becomes "2" instead of reducing the number of virtual medals by two. The second credit insertion button 48 is operated in a situation where the number of bets that can be bet at one time is "3", the current number of bets is "1", and one or more virtual medals are stored and stored. In that case, the number of bets becomes "2" instead of reducing one virtual medal. The second credit insertion button 48 is operated in a situation where the number of bets that can be bet at one time is "2", the current number of bets is "0", and two or more virtual medals are stored and stored. In that case, the number of bets becomes "2" instead of reducing the number of virtual medals by two. The second credit insertion button 48 is operated in a situation where the number of bets that can be bet at one time is "2", the current number of bets is "1", and one or more virtual medals are stored and stored. In that case, the number of bets becomes "2" instead of reducing one virtual medal.

If the second credit insertion button 48 is operated in a situation where the number of virtual medals stored and stored is one and the current number of bets is "0", the number of bets is "1". At the same time, the number of virtual medals becomes 0.

The first credit insertion button 47 has a wider pressing surface than the second credit insertion button 48, which is pressed when the player operates the button. As a result, the operability of the first credit insertion button 47 is enhanced.

A settlement button 51 is provided on the left side of the start lever 41. The slot machine 10 has a credit function of storing and storing surplus inserted medals and medals paid out at the time of winning as virtual medals until the predetermined maximum value (50 medals) is reached. When the settlement button 51 is operated in a situation where the virtual medals are stored and stored, the virtual medals are paid out from the medal outlet 58 as actual medals.

As shown in FIGS. 2 and 3, a power supply device 54 is provided on the left side of the hopper device 53 inside the housing 11. The power supply device 54 includes a power switch 55 that is operated when the power is turned on or off, a reset button 56 for resetting various states of the slot machine 10, and setting values of the slot machine 10 from "1" to "6". In order to change within the range of "", a setting key insertion hole 57 is provided in which a setting key owned by the manager of the game hall is inserted and operated.

Next, the symbols attached to the reels 32L, 32M, 32R will be described.

FIG. 4 shows a symbol arrangement of the left reel 32L, the middle reel 32M, and the right reel 32R. As shown in the figure, 21 symbols are arranged in a row on each of the reels 32L, 32M, and 32R. Further, numbers are assigned from "0" to "20" corresponding to each reel 32L, 32M, 32R, and these numbers can be visually recognized by the main control device 70 described later from the display window portions 21L, 21M, 21R. It is a number for recognizing a symbol in such a state, and is not actually attached to the reels 32L, 32M, 32R. However, in the following description, the number will be used for explanation.

The symbols include a "bell" symbol (for example, the 20th of the left reel 32L), a "replay" symbol (for example, the 19th of the left reel 32L), a "watermelon" symbol (for example, the 18th of the left reel 32L), and " "Red 7" symbol (for example, 15th on left reel 32L), "BAR" symbol (for example, 10th on left reel 32L), "Cherry" symbol (for example, 9th on left reel 32L), "White 7" symbol There are seven types (for example, the fifth of the left reel 32L). The number and arrangement order of various symbols are different in each reel 32L, 32M, 32R.

FIG. 5 is a front view of the display window portions 21L, 21M, 21R. Each display window portion 21L, 21M, 21R is formed so that three of the 21 symbols attached to the corresponding reels 32L, 32M, 32R can be visually recognized. Therefore, when all the reels 32L, 32M, and 32R are stopped, 3 × 3 = 9 symbols can be visually recognized through the display window portions 21L, 21M, 21R.

In the slot machine 10, one main line ML is set so as to connect the positions where the symbols of the reels 32L, 32M, and 32R can be visually recognized. The main line ML is a line connecting the middle symbol of the left reel 32L, the middle symbol of the middle reel 32M, and the middle symbol of the right reel 32R. When the rotation of each reel 32L, 32M, 32R is started with a predetermined number or more of game media bet, and a prize corresponding to the winning combination is established on the main line ML, the profit of granting the game medium is obtained. , The benefit of replaying, or the transition of the gaming state is granted.

That is, in the slot machine 10, only one main line ML is set as a line on which a prize can be established. The main line ML is set as a line extending in a straight line. Therefore, the sub-line SL1 connecting the upper symbol of the left reel 32L, the middle symbol of the middle reel 32M and the lower symbol of the right reel 32R, and the upper symbol of the left reel 32L, the upper symbol of the middle reel 32M and the upper symbol of the right reel 32R are combined. Subline SL3 connecting the connected subline SL2 and the lower symbol of the left reel 32L, the lower symbol of the middle reel 32M and the lower symbol of the right reel 32R, the lower symbol of the left reel 32L, the middle symbol of the middle reel 32M and the right reel 32R Even if a combination of symbols to be won is established on a line extending in a straight line such as the sub line SL4 connecting the upper symbols, the prize is not established.

Hereinafter, with reference to FIG. 6, the correspondence relationship between the combination of the symbols to be won and the privilege given when the prize is won will be described. FIG. 6 is an explanatory diagram for explaining the correspondence between the combination of the symbols to be won and the privilege given when the prize is won.

The small winning combination prizes in which the game medium is given include the 1st supplementary prize, the 2nd supplementary prize, the 3rd supplementary prize, the 4th supplementary prize, the 5th supplementary prize, the 6th supplementary prize, the 7th supplementary prize, and the 8th supplementary prize. There are supplementary prizes, 9th supplementary prizes, 1st bell prizes, 2nd bell prizes, 1st watermelon prizes, 2nd watermelon prizes and cherry prizes. Specifically, when the stop symbol of the left reel 32L is the "bell" symbol, the stop symbol of the middle reel 32M is the "bell" symbol, and the stop symbol of the right reel 32R is the "red 7" symbol in the main line ML, It will be the first supplementary prize. In the main line ML, if the stop symbol of the left reel 32L is the "bell" symbol, the stop symbol of the middle reel 32M is the "red 7" symbol, and the stop symbol of the right reel 32R is the "bell" symbol, the second supplementary prize is won. Will be. In the main line ML, if the stop symbol of the left reel 32L is the "red 7" symbol, the stop symbol of the middle reel 32M is the "bell" symbol, and the stop symbol of the right reel 32R is the "bell" symbol, the third supplementary prize is won. Will be. In the main line ML, if the stop symbol of the left reel 32L is the "bell" symbol, the stop symbol of the middle reel 32M is the "bell" symbol, and the stop symbol of the right reel 32R is the "BAR" symbol, the fourth supplementary prize is awarded. Become. In the main line ML, if the stop symbol of the left reel 32L is the "bell" symbol, the stop symbol of the middle reel 32M is the "BAR" symbol, and the stop symbol of the right reel 32R is the "bell" symbol, the fifth supplementary prize is awarded. Become. In the main line ML, if the stop symbol of the left reel 32L is the "BAR" symbol, the stop symbol of the middle reel 32M is the "bell" symbol, and the stop symbol of the right reel 32R is the "bell" symbol, the sixth supplementary prize is awarded. Become. In the main line ML, if the stop symbol of the left reel 32L is the "bell" symbol, the stop symbol of the middle reel 32M is the "bell" symbol, and the stop symbol of the right reel 32R is the "white 7" symbol, the 7th supplementary prize is won. Will be. In the main line ML, if the stop symbol of the left reel 32L is the "bell" symbol, the stop symbol of the middle reel 32M is the "white 7" symbol, and the stop symbol of the right reel 32R is the "bell" symbol, the eighth supplementary prize is won. Will be. In the main line ML, if the stop symbol of the left reel 32L is the "white 7" symbol, the stop symbol of the middle reel 32M is the "bell" symbol, and the stop symbol of the right reel 32R is the "bell" symbol, the ninth supplementary prize is won. Will be. In the case of any of the 1st supplementary prize to the 9th supplementary prize, the number of game media to be granted is "1".

If the stop symbol of the left reel 32L is the "bell" symbol, the stop symbol of the middle reel 32M is the "bell" symbol, and the stop symbol of the right reel 32R is the "bell" symbol on the main line ML, the first bell is won. Will be. If the stop symbol of the left reel 32L is the "bell" symbol, the stop symbol of the middle reel 32M is the "bell" symbol, and the stop symbol of the right reel 32R is the "replay" symbol on the main line ML, the second bell is won. Will be. If either the 1st bell prize or the 2nd bell prize is won, the number of game media to be granted is "15".

If the stop symbol of the left reel 32L is the "watermelon" symbol, the stop symbol of the middle reel 32M is the "watermelon" symbol, and the stop symbol of the right reel 32R is the "watermelon" symbol on the main line ML, the first watermelon wins. It becomes. If the stop symbol of the left reel 32L is the "watermelon" symbol, the stop symbol of the middle reel 32M is the "watermelon" symbol, and the stop symbol of the right reel 32R is the "BAR" symbol on the main line ML, the second watermelon wins. Will be. If either the first watermelon prize or the second watermelon prize is awarded, the number of game media to be granted is "5". When the stop symbol of the left reel 32L is the "cherry" symbol on the main line ML, the cherry prize is won regardless of which of the stop symbol of the middle reel 32M and the stop symbol of the right reel 32R. In the case of a cherry prize, the number of game media to be granted is "2".

There are a normal replay prize, a first chance replay prize, and a second chance replay prize as prizes to which the privilege of the re-game that enables the game of the next game to be performed without betting the game medium is given. Specifically, when the stop symbol of the left reel 32L is the "replay" symbol, the stop symbol of the middle reel 32M is the "replay" symbol, and the stop symbol of the right reel 32R is the "replay" symbol on the main line ML, When the stop symbol of the left reel 32L is the "Red 7" symbol, the stop symbol of the middle reel 32M is the "Red 7" symbol, and the stop symbol of the right reel 32R is the "BAR" symbol on the main line ML, the main line When the stop symbol of the left reel 32L is the "replay" symbol, the stop symbol of the middle reel 32M is the "red 7" symbol, and the stop symbol of the right reel 32R is the "replay" symbol on the ML, on the main line ML. When the stop symbol of the left reel 32L is the "replay" symbol, the stop symbol of the middle reel 32M is the "red 7" symbol, and the stop symbol of the right reel 32R is the "BAR" symbol, or on the main line ML, the left reel When the stop symbol of 32L is the "watermelon" symbol, the stop symbol of the middle reel 32M is the "red 7" symbol, and the stop symbol of the right reel 32R is the "bell" symbol, a normal replay prize is won. When the stop symbol of the left reel 32L is the "replay" symbol, the stop symbol of the middle reel 32M is the "cherry" symbol, and the stop symbol of the right reel 32R is the "bell" symbol on the main line ML, the first chance replay It will be a prize. If the stop symbol of the left reel 32L is the "watermelon" symbol, the stop symbol of the middle reel 32M is the "bell" symbol, and the stop symbol of the right reel 32R is the "replay" symbol on the main line ML, the second chance replay It will be a prize.

If any of the above replay prizes are won, a replay privilege that enables the next game to be played while eliminating the need for betting on the game medium is given. Specifically, if any of the replay prizes is won in the game in which the game medium of "3" is bet, the bet of the game medium is not required, and the game medium of "3" is bet in the next game. It becomes possible to start the game. In addition, if any of the replay prizes is won in the game in which the game medium of "2" is bet, the game of the next game is started with the game medium of "2" bet while eliminating the need to bet on the game medium. It becomes possible to do.

There are a first CB prize and a second CB prize as a state transition prize in which only the transition of the gaming state is performed. Specifically, on the main line ML, the stop symbol of the left reel 32L is the "red 7" symbol, the stop symbol of the middle reel 32M is the "red 7" symbol, and the stop symbol of the right reel 32R is the "white 7" symbol. If there is, it will be the first CB prize. When the stop symbol of the left reel 32L is the "white 7" symbol, the stop symbol of the middle reel 32M is the "white 7" symbol, and the stop symbol of the right reel 32R is the "red 7" symbol on the main line ML, the second It will be a 2CB prize. When the first CB winning is established, the gaming state shifts to the first CB state ST2, and when the second CB winning is established, the gaming state shifts to the second CB state ST3 (see FIG. 40).

The first CB state ST2 and the second CB state ST3 are game states in which when the combination of symbols corresponding to the small winning combination is stopped in the main line ML, medals are paid out as winning winnings regardless of whether or not there is a winning combination. For example, even when the winning data corresponding to the first bell winning is not set, the game medium is given to the player when the combination of the symbols corresponding to the first bell winning is stopped on the main line ML. On the other hand, the replay prize is established on the condition that the corresponding role is won in the lottery.

In the first CB state ST2 and the second CB state ST3, reel control different from that in the non-CB state is performed. In the non-CB state, reel control capable of sliding up to four symbols after the stop buttons 42 to 44 are operated is performed for each reel 32L, 32M, 32R. That is, in the non-CB state, reel control for stopping each reel 32L, 32M, 32R is performed for each reel 32L, 32M, 32R to stop until a specified time (190 milliseconds) elapses after the stop buttons 42 to 44 are operated. On the other hand, in the first CB state ST2 and the second CB state ST3, the reel control is performed on the middle reel 32M and the right reel 32R, that is, the reel control similar to that in the normal game is performed, but the reel control is not performed on the left reel 32L. For the left reel 32L, reel control is performed in which the left stop button 42 is operated and then only one symbol can be slid. That is, in the first CB state ST2 and the second CB state ST3, reel control for stopping the left reel 32L is performed for the left reel 32L until a specified time (75 msec) shorter than the specified time elapses after the left stop button 42 is operated.

In the first CB state ST2 and the second CB state ST3, the reel control that slides only up to one symbol is not limited to the left reel 32L, and the reel corresponding to the first operated stop button has a maximum of 1. A control that slides only up to a symbol may be performed, or a reel control that slides only a maximum of one symbol may be performed only for a predetermined reel. Furthermore, the stop buttons operated in a certain order, such as reel control that slides only up to one symbol for the reel corresponding to the second operated stop button or the last operated stop button. Reel control may be performed so that only one symbol can be slipped on the reel corresponding to the above.

In the first CB state ST2 and the second CB state ST3, if the winning combination corresponding to the replay winning is won, the replay winning is prioritized, and if the replay winning is not possible, the first bell winning can be established. In addition, the first bell prize can be established even if the role corresponding to the replay prize is not won.

Both the first CB state ST2 and the second CB state ST3 are gaming states that do not increase the gaming medium owned by the player. Furthermore, both the first CB state ST2 and the second CB state ST3 are game media owned by the player at the end of the game state rather than the number of game media owned by the player at the start of the game state. It is a game state that reduces the number of. Details of the first CB state ST2 and the second CB state ST3 will be described later.

Next, a device for executing various notifications and various effects will be described.

As shown in FIG. 1, an upper lamp 61 and a speaker 62 are provided on the upper part of the front door 12, and an image display device 63 is provided. When an abnormality occurs in the slot machine 10, the upper lamp 61 is controlled to emit light in a manner corresponding to the abnormality, and is also controlled to emit light in a manner corresponding to the winning result. Further, the upper lamp 61 is light-emitting controlled so as to perform a light-emitting effect corresponding to the display effect in the image display device 63. The speakers 62 are provided as a pair on the left and right, and when an abnormality occurs in the slot machine 10, the sound output is controlled so that the sound or voice corresponding to the abnormality is output, and the sound or voice corresponding to the winning result is output. Sound output is controlled so that Further, the speaker 62 is controlled in sound output so that the sound output effect corresponding to the display effect in the image display device 63 is performed.

The image display device 63 has a display surface and is configured as a liquid crystal display device provided with a liquid crystal display, but is not limited to the liquid crystal display device, such as a plasma display device, an organic EL display device, or a CRT. It may be another display device having a display surface, or it may be a dot matrix display. When an abnormality occurs in the slot machine 10, the display is controlled so that the image corresponding to the abnormality is displayed on the display surface. Further, the image display device 63 is displayed and controlled so that an image corresponding to the winning result of the winning combination in the internal lottery and the winning result in each game is displayed on the display surface. That is, the image display device 63 executes the display effect.

The game panel 20 of the front door 12 has a bet display unit 64 that displays the number of game media currently bet at positions below the display window units 21L, 21M, and 21R, and the number of stored virtual medals. The credit display unit 65 for displaying, and the number of game media to be granted at the time of winning a small winning combination are displayed, and when the stop order of the reels 32L, 32M, 32R is notified on the image display device 63, the notified content. Display corresponding to, and further, a combined display unit 66 for notifying the management result of the game history, and a section display unit 67 for displaying the game section corresponding to the second section. And are provided.

In the bed display unit 64, three light emitting units are arranged side by side in the vertical direction, and a single color light emitting type LED such as red is used for each light emitting unit. When the number of game media currently bet is "1", the light emitting part at the bottom is turned on and the remaining light emitting parts are turned off. When the number of game media currently bet is "2", the light emitting parts at the bottom and the center are turned on, and the light emitting parts at the top are turned off. When the number of game media currently bet is "3", all three light emitting units are lit. After the rotation of all the reels 32L, 32M, and 32R is stopped in one game, all the light emitting units of the bet display unit 64 are turned off regardless of whether or not any of the replay prizes is established in the game. In this case, in the case of the final game of the pseudo-bonus state ST4 described later, when the process for terminating the pseudo-bonus state ST4 is executed, all the light emitting units of the bet display unit 64 are turned off. In the case of a game other than the final game, when all the processing of one game is completed, all the light emitting units of the bet display unit 64 are turned off. If the replay prize is not established, the light emitting state of each light emitting unit is maintained until a new bet of the game medium is generated, and if any of the replay prizes is established, a predetermined period (for example, 2) is maintained. After being kept in the off state for (seconds), the same number of light emitting parts as in the game in which the replay winning is established are turned on. The credit display unit 65 is composed of a 7-segment display, and a monochromatic light emitting type LED such as green is used for each segment.

FIG. 7A is a front view of the common display area 68 provided with the combined display unit 66 and the section display unit 67. In the common display area 68, as shown in FIG. 7A, a section display unit including a combined display unit 66 in which two 7-segment displays 66a and 66b are arranged side by side in the horizontal direction and one light emitting unit. 67 and are aggregated.

When any of the small winning combination prizes (1st to 9th supplementary prizes, 1st bell prize, 2nd bell prize, 1st watermelon prize, 2nd watermelon prize or cherry prize) corresponding to the grant of the game medium are established. At the end of the game in which the small winning combination is established, the number of game media granted corresponding to the small winning combination is displayed on the combined display unit 66. Specifically, when any of the 1st to 9th supplementary prizes is established in the non-CB state, the 7-segment display 66a on the left side is hidden and "1" is displayed on the 7-segment display 66b on the right side. By displaying it, it is notified that the game medium of "1" has been added. If either the 1st bell prize or the 2nd bell prize is established in the non-CB state, "1" is displayed on the left 7-segment display 66a and "5" is displayed on the right 7-segment display 66b. By displaying it, it is notified that the game medium of "15" has been added. If either the first watermelon prize or the second watermelon prize is established in the non-CB state, the left 7-segment display 66a is hidden and the right 7-segment display 66b displays "5". By doing so, it is notified that the game medium of "5" has been added. Further, when the cherry winning is established in the non-CB state, the 7-segment display 66a on the left side is hidden and "2" is displayed on the 7-segment display 66b on the right side, so that the game medium of "2" is displayed. Is notified that has been given.

In the first CB state ST2 and the second CB state ST3, the number of game media given by winning a small winning combination is "1", as will be described in detail later. Therefore, when a small winning combination is established in the first CB state ST2 or the second CB state ST3, the left 7-segment display 66a is hidden and "1" is displayed on the right 7-segment display 66b. As a result, it is notified that the game medium of "1" has been added.

On the other hand, even if a prize without a game medium such as one of the replay prizes and one of the CB prizes is established, the display corresponding to the prize is not displayed on the combined display unit 66, and in this case, each The 7-segment displays 66a and 66b are maintained in a hidden state. The display of the number of game media granted on the combined display unit 66 ends when the game medium is bet to start the next game of the game in which the display is performed, and each 7-segment display is displayed at the bet timing. The vessels 66a and 66b are hidden.

When the stop order of the reels 32L, 32M, 32R is notified in the image display device 63, the information corresponding to the notified stop order is displayed on the combined display unit 66. FIG. 7B is an explanatory diagram for explaining the content of the information corresponding to the stop order displayed on the combined display unit 66. As shown in FIG. 7B, in the slot machine 10, the first stop is the left reel 32L and the second stop is the middle reel as the stop order of the reels 32L, 32M, 32R notified by the image display device 63. The stop order is 32M and the third stop is the right reel 32R, the stop order is the first stop is the left reel 32L, the second stop is the right reel 32R and the third stop is the middle reel 32M, and the first stop. Is the middle reel 32M, the second stop is the left reel 32L, the third stop is the right reel 32R, and the first stop is the middle reel 32M, the second stop is the right reel 32R, and the third stop is. The stop order is the left reel 32L, the first stop is the right reel 32R, the second stop is the left reel 32L, the third stop is the middle reel 32M, and the first stop is the right reel 32R. The 2 stops are the middle reel 32M and the 3rd stop is the left reel 32L, the stop order is the 1st stop is the left reel 32L and the rest is arbitrary, and the 1st stop is the middle reel 32M and the rest is There is an arbitrary stop order and a stop order in which the first stop is the right reel 32R and the rest are arbitrary.

The notification of the stop order in the image display device 63 is when a combination including the first bell winning data and any of the first to sixth supplementary winning data is won in the combination lottery process in the non-CB state, or It can be executed when a winning combination including the 2nd bell winning data and any of the 7th to 9th supplementary winning data is won. Specifically, when a winning combination including the 1st bell winning data and any of the 1st to 6th supplementary winning data is won, the reel 32L is in the stop order corresponding to the current winning combination among the above stop orders. , 32M, 32R are stopped, the first bell prize is established, and if the reels 32L, 32M, 32R are not stopped in the stop order corresponding to the winning combination this time, the first to sixth supplementary prizes are awarded. Either can be true. If the 1st bell prize is established, the game medium of "15" is given to the player as already explained, and if any of the 1st to 6th supplementary prizes is established, "1" is given as already explained. The game medium of is given to the player.

When a winning combination including the 2nd bell winning data and any of the 7th to 9th supplementary winning data is won, the reels 32L, 32M, 32R are placed in the stop order corresponding to the current winning combination among the above stop orders. If the reels are stopped, the second bell prize is established, and if the reels 32L, 32M, 32R are not stopped in the stop order corresponding to the winning combination this time, one of the 7th to 9th supplementary prizes is established. obtain. If the 2nd bell prize is established, the game medium of "15" is given to the player as already explained, and if any of the 7th to 9th supplementary prizes is established, "1" as already explained. The game medium of is given to the player.

When any of the above stop orders is notified by the image display device 63, the left 7-segment display 66a in the combined display unit 66 is maintained in a hidden state, while the right 7-segment display 66b is maintained. Is displayed according to the stop order of the notification target. This display content is as shown in FIG. 7B, and the display content of the stop order of the dual-purpose display unit 66 is set to correspond one-to-one with the notification content of the stop order in the image display device 63. .. However, the present invention is not limited to this, and as a configuration in which a plurality of types of display contents of the dual-purpose display unit 66 are set to correspond to a part or all of the notification contents of the stop order in the image display device 63. May be good.

The display content of the stop order on the combined display unit 66 is different from the display content to be displayed when the display corresponding to the addition of the game medium is performed on the combined display unit 66. As a result, it becomes easy to distinguish whether the content displayed on the combined display unit 66 corresponds to the number of game media provided or the stop order of the reels 32L, 32M, 32R.

8 (a) and 8 (b) are explanatory views for explaining the relationship between the notification content of the stop order in the image display device 63 and the display content of the stop order in the combined display unit 66.

When the stop order of the reels 32L, 32M, 32R is notified in the image display device 63, as shown in FIG. 8A, the image display device 63 has the same number of stop operations required to end the game. The unit display images G1 to G3 are displayed, and the image display corresponding to the stop order of the reels 32L, 32M, 32R is performed in each unit display image G1 to G3. Specifically, the left unit display image G1 corresponding to the left reel 32L, the middle unit display image G2 corresponding to the middle reel 32M, and the right unit display image G3 corresponding to the right reel 32R are displayed. Further, in FIG. 8A, the stop order is notified when the first stop is the middle reel 32M, the second stop is the left reel 32L, and the third stop is the right reel 32R. , The image of "2" corresponding to the stop order of the left reel 32L is displayed on the left unit display image G1, and the image of "1" corresponding to the stop order of the middle reel 32M is displayed on the middle unit display image G2. , The image of "3" corresponding to the stop order of the right reel 32R is displayed on the right unit display image G3.

In the image display device 63, an image notifying the stop order itself of the reels 32L, 32M, 32R is displayed as described above, whereas in the combined display unit 66, as shown in FIG. 8B, the reels are displayed. "L" corresponding to the stop order of 32L, 32M, 32R is displayed. That is, in the image display device 63, the unit display images G1 to G3 corresponding to the number of reels 32L, 32M, 32R are displayed, and the reels 32L, 32M, 32R corresponding to each unit display image G1 to G3 are stopped in the stop order. While the corresponding image display is performed, the combined display unit 66 displays a display irrelevant to the number of reels 32L, 32M, 32R. As a result, even if the combined display unit 66 displays the reels 32L, 32M, 32R corresponding to the notification content of the stop order, the player can pay attention to the display content on the image display device 63.

The display range of the combined display unit 66 is narrower than the display range of the image display device 63. From this point as well, it is possible to reduce the degree of attention of the player to the combined display unit 66 as compared with the image display device 63. Further, the combined display unit 66 exists on the side opposite to the image display device 63 side with the display window units 21L, 21M, 21R that make the reels 32L, 32M, 32R visible. As a result, the combined display unit 66 is arranged at a position separated from the image display device 63, which also makes it possible to reduce the player's attention to the combined display unit 66.

When the stop order of the reels 32L, 32M, 32R is notified, the display corresponding to the stop order of the reels 32L, 32M, 32R on the combined display unit 66 and the stop order of the reels 32L, 32M, 32R on the image display device 63 are supported. The display is started after the winning combination lottery process is performed and before the stop operation of the reels 32L, 32M, 32R is activated. In this case, the display corresponding to the stop order of the reels 32L, 32M, 32R on the combined display unit 66 is started before the display corresponding to the stop order of the reels 32L, 32M, 32R on the image display device 63. However, these displays may be started at the same time or substantially at the same time, and the display start order may be reversed. Further, the display corresponding to the stop order of the reels 32L, 32M, 32R in the combined display unit 66 and the image display device 63 is a stop command for all the reels 32L, 32M, 32R in the game to which the display is executed. Is terminated when

The combined display unit 66 is arranged on the center side in the common display area 68, while the section display unit 67 is arranged on the corner side of the common display area 68. The section display unit 67 is a display unit for notifying that the game section is the second section SC2 of the first section SC1 and the second section SC2. The second section SC2 is a reel 32L, 32M, 32R that enables the player to establish a winning prize that is advantageous to the player when the winning combination to be established is different depending on the stop order of the reels 32L, 32M, 32R. The expected value of acquisition of game media in one game (value obtained by subtracting "the number of game media bet in one game" from "the expected number of game media granted in one game") is 1 or more by notifying the stop order of. It is a section in which an advantageous gaming state (specifically, pseudo-bonus state ST4 and AT state ST5) that can be possible can be started, and the advantageous gaming state can be continued. On the other hand, the first section SC1 is a section in which the advantageous gaming state is not started and the advantageous gaming state does not continue.

When the section display unit 67 wins a winning combination with different winning targets depending on the stop order of the reels 32L, 32M, 32R or a winning combination with different winning positions depending on the stopping order of the reels 32L, 32M, 32R. When the stop order of the reels 32L, 32M, 32R, which enables the player to win a prize, is notified, and the expected value of the game medium is 1 or more, the reels are lit. Become. In this case, the pseudo-bonus state ST4 and the AT state ST5 correspond to the advantageous gaming state, while the second section SC2, which is neither the pseudo-bonus state ST4 nor the AT state ST5, does not correspond to the advantageous gaming state. Therefore, when shifting from the first section SC1 to the second section SC2, the section display unit 67 may or may not switch from the off state to the lit state. When the section display unit 67 is maintained in the off state when shifting to the second section SC2, the section display unit 67 is released from the off state when the pseudo bonus state ST4 or the AT state ST5 is started in the second section SC2. It will be lit. When the section display unit 67 becomes lit, the lit state is maintained until the second section SC2 ends, and when the second section SC2 ends and the first section SC1 shifts to the lit state, the section display unit 67 is turned off. Become.

As described above, the section display unit 67 is provided in the common display area 68 in a configuration in which the lighting state is maintained until the end of the second section SC2 once the lighting state is set in the second section SC2. The combined display unit 66 is turned on when the game medium is added and turned off at the start of the next game, and the stop order of the reels 32L, 32M, 32R is displayed on the image display device 63. When it is turned on, it is turned on and when the game ends, it is turned off. Therefore, in the configuration in which the section display unit 67 is arranged in the common display area 68 so as not to be too conspicuous to the player, only the section display unit 67 is in the common display area 68 in the situation of the second section SC2. It is possible to positively generate a situation in which the lighting state is lit, and it is possible for the manager of the game hall to easily confirm the section display unit 67.

In the second section SC2, instead of the configuration in which the lighting state of the section display unit 67 is maintained, in the second section SC2, the section display unit 67 may perform blinking display at a predetermined cycle. Further, other display devices such as a liquid crystal display device may be used as the combined display unit 66 and the section display unit 67.

The slot machine 10 is provided with various control devices. Specifically, as shown in FIG. 3, a main control device 70 is provided above the reel unit 31. The main control device 70 is attached to a back plate 11b that raises the back surface of the housing 11. The main control device 70 is configured such that the main control board 71 is housed in the board box 81. The MPU 72 is mounted on the element mounting surface, which is one plate surface of the main control board 71. The substrate box 81 is transparently formed so that the MPU 72 housed in the substrate box 81 can be visually recognized from the outside of the substrate box 81. Although the substrate box 81 is formed to be colorless and transparent, it may be formed to be colored and transparent as long as the MPU 72 housed in the substrate box 81 can be visually recognized from the outside of the substrate box 81. The main control device 70 is mounted on the back plate 11b of the housing 11 so that the facing wall portion 82 facing the element mounting surface of the main control board 71 faces the front of the slot machine 10 in the board box 81. Therefore, by opening the front door 12 to the front of the slot machine 10 with respect to the housing 11 to expose the internal space of the housing 11, the facing wall portion 82 of the board box 81 can be visually recognized. The MPU 72 can be visually observed through the facing wall portion 82.

The substrate box 81 is formed by combining a plurality of case bodies in the front-rear direction, and the plurality of case bodies are used to prevent the case bodies from being separated and to leave a trace thereof when the case bodies are separated. A connecting portion 83 is provided. A plurality of connecting portions 83 are arranged side by side on one side of the substantially rectangular parallelepiped substrate box 81. As a result, even if the case body is separated by destroying the part of the joint portion 83 in a state where the separation of the case body is prevented by using a part of the joint portion 83, another joint portion is subsequently separated. By putting 83 in the bonded state, it is possible to prevent the separation of the case body again. Further, when the case body is separated, the joint portion 83 is destroyed and its trace remains, so that it is possible to grasp whether or not the case body is illegally separated by visually checking the joint portion 83. Become. Further, in the substrate box 81, a sealing seal 84 is attached so as to straddle the boundary between the case bodies on one side different from the one side on which the connecting portions 83 are arranged side by side. When the sealing seal 84 is peeled off, an adhesive layer remains on the case body. As a result, when the sealing seal 84 is peeled off when the case body is separated, it is possible to leave a trace thereof.

As shown in FIG. 2, the slot machine 10 is provided with an effect control device 90 in addition to the main control device 70. The effect control device 90 is arranged so as to be overlapped behind the image display device 63 at the front door 12. The effect control device 90 executes control of the upper lamp 61, the speaker 62, and the image display device 63 based on the command received from the main control device 70. The effect control device 90 has a control board housed in a board box in the same manner as the main control device 70.

Next, the electrical configuration of the slot machine 10 will be described with reference to the block diagram of FIG.

The MPU 72 is mounted on the main control board 71 of the main control device 70 as described above. The MPU 72 is a ROM 73 that stores various control programs and fixed value data executed by the MPU 72, and a memory for temporarily storing various data and the like when the control program stored in the ROM 73 is executed. A RAM 74, a first random number circuit 75 that sequentially updates the first random number within a predetermined numerical range based on the clock signal output from the clock circuit, and a second random number based on the clock signal output from the clock circuit. A second random number circuit 76 that is sequentially updated within a predetermined numerical range and a clock circuit that outputs a rectangular wave having a predetermined frequency are provided. In addition to that, the MPU 72 has an interrupt circuit, a data input / output circuit, and the like. It is not essential that the ROM 73 and the RAM 74 are integrated into one chip with respect to the MPU 72, and each may be individually chipped.

The MPU 72 is provided with an input port and an output port, respectively. On the input side of the MPU 72, there are a door opening sensor 16, a reel unit 31, a start detection sensor 41a that detects the operation of the start lever 41, and stop detection sensors 42a, 43a that individually detect the operation of the stop buttons 42, 43, 44. , 44a, insertion medal detection sensor 45a that detects the medals inserted from the medal insertion slot 45, credit insertion detection sensors 47a, 48a that individually detect the operation of each credit insertion button 47, 48, and detection of the operation of the settlement button 51. The settlement detection sensor 51a, the payout detection sensor of the hopper device 53, the reset detection sensor that detects the operation of the reset button 56 provided in the power supply device 54, and the setting key insertion hole 57 detect that the setting key has been inserted. Various sensors such as a setting key detection sensor are connected, and signals from each of these sensors are input to the MPU 72.

On the output side of the MPU 72, the reel unit 31, the selector drive unit 52a provided in the selector 52, the payout motor of the hopper device 53, the bet display unit 64, the credit display unit 65 (not shown in FIG. 9), and the combined display unit 66 , The section display unit 67, the external output terminal plate 78, the effect control device 90, and the like are connected. In each game, the rotation drive control of each reel 32L, 32M, 32R of the reel unit 31 is performed by the MPU 72. The selector 52 detects the medal inserted from the medal insertion slot 45 by the insertion medal detection sensor 45a when acceptance is permitted, and then guides the medal to the hopper device 53, and when reception is prohibited, the selector 52 guides the insertion medal detection sensor 45a. It has a function of discharging to the medal tray 59 without detecting the medal. The selector drive unit 52a has a function for switching the state of the selector 52 between the reception permission state and the reception prohibition state. Specifically, the passage switching piece provided in the selector 52 is positioned for reception permission. And operate between the reception prohibition position. The MPU 72 switches the state of the selector 52 between the reception permitted state and the reception prohibited state by switching the output state and the stop state of the drive signal to the selector drive unit 52a.

The MPU 72 executes drive control of the hopper device 53 when a small winning combination is established and medals are paid out. Further, the MPU 72 displays and controls the bet display unit 64 so that when a bet on the game medium occurs, the number of bets is notified. Further, the MPU 72 displays and controls the credit display unit 65 so that when the virtual game medium is stored and stored, the number of the stored and stored virtual game media is displayed. Further, the MPU 72 displays and controls the combined display unit 66 so that when the game medium is given, the number of the game media to be given is displayed. Further, the MPU 72 displays and controls the section display unit 67 so that the notification of the second section SC2 is performed when the notification start trigger occurs in the case of the second section SC2. Further, the MPU 72 controls the display of the combined display unit 66 so that the display corresponding to the management result of the game is performed. Further, the external output terminal plate 78 is installed on the internal space side of the housing 11, and the MPU 72 outputs a signal to the external output terminal plate 78 to send a signal to the management computer of the game hall through the external output terminal plate 78. Specifically, the external output of the first external signal and the second external signal) is performed.

When the MPU 72 transmits a command to the effect control device 90 at each timing of each game and also transmits a command to notify the effect control device 90 of the stop order of the reels 32L, 32M, 32R in the image display device 63. Executes the display control of the combined display unit 66 so that the display corresponding to the content to be notified is performed. In this case, the direct display control of the image display device 63 is performed by the effect control device 90, whereas the direct display control of the combined display unit 66 is performed by the MPU 72. That is, for the image display device 63 that is the execution target of the relatively complicated display control, the direct display control is executed by the effect control device 90, and the combined display unit 66 that is the execution target of the relatively simple display control. Direct display control is executed in the MPU 72. As a result, it is possible to perform both a display that emphasizes the improvement of attention to the effect and a display that emphasizes reliability while reducing the processing load of the MPU 72.

A power failure monitoring circuit 54b provided in the power supply device 54 is connected to the input side of the MPU 72 (see FIG. 11). The power supply device 54 includes a power supply unit 54a and a power failure monitoring circuit 54b that supply drive power to each electronic device of the slot machine 10 including the main control device 70, and the power failure monitoring circuit 54b is powered by an external power source. The voltage applied to the unit 54a is monitored, and if the voltage exceeds the reference voltage (for example, 5V), the output level of the power failure signal to the MPU 72 is set to the HI level, and the voltage becomes equal to or lower than the reference voltage. In this case, the output level of the power failure signal to the MPU 72 is set to the LOW level. The MPU 72 executes the power failure processing by receiving the LOW level power failure signal, and makes it possible to return to the processing state before the power failure after the power is restored. Further, the power supply device 54 is provided with a power supply unit during power failure to supply backup power to the RAM 74 as power during power failure in a situation where the supply of operating power from an external power source is cut off. As a result, even if the supply of operating power from the external power supply is cut off, the data is stored and retained in the RAM 74 in a situation where backup power can be supplied by the power supply unit during power failure (for example, 1 day or 2 days). Will be done.

The effect control device 90 includes an effect control board 91 for controlling various notifications and execution of various effects. The MPU 92 is mounted on the effect control board 91. The MPU 92 is a ROM 93 that stores various control programs and fixed value data executed by the MPU 92, and a memory for temporarily storing various data and the like when the control program stored in the ROM 93 is executed. A RAM 94 is built in, and a clock circuit, an interrupt circuit, a data input / output circuit, a random number generation circuit, and the like that output a rectangular wave of a predetermined frequency are built in.

It is not essential that the ROM 93 and the RAM 94 are integrated into one chip with respect to the MPU 92, and each may be individually chipped. Further, the RAM 94 is configured such that the backup power is not supplied from the power supply unit during the power failure of the power supply device 54 when the supply of the operating power from the external power supply is cut off, but the backup power is supplied to the RAM 94. May be good.

The MPU 92 is provided with an input port and an output port, respectively. As described above, the MPU 72 of the main control device 70 is connected to the input side of the MPU 92, and various commands are received from the MPU 72. An upper lamp 61, a speaker 62, and an image display device 63 are connected to the output side of the MPU 92. Based on the command received from the MPU 72 of the main control device 70, the MPU 92 executes various notifications and various effects by executing light emission control of the upper lamp 61, sound output control of the speaker 62, and display control of the image display device 63. To be done.

Although not shown, the effect control board 91 is equipped with a video display processor (VDP), a character ROM, a video RAM, and the like in addition to the MPU 92. The VDP is a kind of drawing circuit that directly operates an image processing device as a liquid crystal display unit driver incorporated in the image display device 63. The VDP intervenes in reading and writing data in the video RAM, and reads the image data stored in the video RAM from the character ROM at a predetermined timing and displays it on the image display device 63. The character ROM plays a role as an image data library for storing character data such as a symbol displayed on the image display device 63. The character ROM holds bitmap format image data of various display symbols, a color palette table to be referred to when determining the expression color of each dot of the bitmap image, and the like. The video RAM is a memory for storing display data to be displayed on the image display device 63. When the MPU 92 determines the execution content of the effect based on the command received from the MPU 72 of the main control device 70, the MPU 92 sets the VDP as a drawing list instructing the content of the image corresponding to each update timing according to the execution content of the determined effect. Output. The VDP reads image data from the character ROM according to the drawing list, and creates display data in the video RAM using the read image data. Then, the VDP outputs an image signal corresponding to the created display data to the image display device 63, so that the image display device 63 displays an image corresponding to the display data.

In the following description, for convenience of explanation, the MPU 72, ROM 73, and RAM 74 of the main control device 70 are referred to as the main MPU 72, the main ROM 73, and the main RAM 74, respectively, and the MPU 92, ROM 93, and RAM 94 of the effect control device 90 are referred to as the effect side, respectively. It is called MPU 92, directing side ROM 93, and directing side RAM 94.

<About various processes executed by the main MPU 72>
Next, the process executed by the main MPU 72 will be described. First, the main process executed by the main MPU 72 when the supply of the operating power to the main MPU 72 is started will be described with reference to the flowchart of FIG.

First, the power failure signal is read (step S101). Here, the power failure signal will be described. FIG. 11 is an explanatory diagram for explaining the signal path of the power failure signal. As shown in FIG. 11, the power supply device 54 includes a power supply unit 54a that supplies operating power to various electronic devices including the main control device 70 by using the power supplied from the external power supply, and a power supply unit from the external power supply. It is provided with a power failure monitoring circuit 54b that monitors the voltage applied to 54a and sets the output level of the power failure signal to the LOW level when the voltage becomes equal to or lower than the reference voltage. The power supply unit 54a and the main control device 70 are electrically connected by a power supply line ELN, and operating power is supplied from the power supply unit 54a to the main control device 70 through the power supply line ELN.

The power failure monitoring circuit 54b and the main MPU 72 are electrically connected by a signal line LN, and a power failure signal is transmitted from the power failure monitoring circuit 54b to the main MPU 72 through the signal line LN. The main MPU 72 is provided with an input port 72a, and information corresponding to the state of the power failure signal is stored in a predetermined bit (specifically, the most significant bit) of the input port 72a. In this case, when power is normally supplied from the external power source to the power supply unit 54a, a power failure signal of HI level is transmitted from the power failure monitoring circuit 54b to the main MPU 72. Specifically, a 5V signal is transmitted as a HI level power failure signal, and the voltage of this power failure signal is arbitrary. When the HI level power failure signal is transmitted, the information "1", which is one of the binary information, is stored in the predetermined bit of the input port 72a as the information corresponding to the power failure signal. When power is not normally supplied from the external power source to the power supply unit 54a, a LOW level power failure signal is transmitted from the power failure monitoring circuit 54b to the main MPU 72. The LOW level power failure signal is specifically a signal of less than 5V. When a LOW level power failure signal is transmitted, the predetermined bit of the input port 72a stores information of "0", which is the other of the binary information, as information corresponding to the power failure signal. The relationship between the HI and LOW of the power failure signal may be reversed, and when the power is normally supplied from the external power supply to the power supply unit 54a, the power failure signal is transmitted and the power is normal from the external power supply to the power supply unit 54a. The power failure signal may not be transmitted when the power is not supplied to the power supply.

The main MPU 72 basically periodically identifies the presence or absence of a power failure by monitoring the predetermined bit of the input port 72a in the power failure process (step S503) in the timer interrupt process (FIG. 19) described later. It is a composition. However, the execution of the timer interrupt process (FIG. 19) is prohibited at the timing when the main process is started, and the execution of the timer interrupt process (FIG. 19) is first permitted when the main process ends. Is. Therefore, at the start of supplying the operating power, the presence or absence of a power failure is specified by monitoring the predetermined bit of the input port 72a in step S101 without waiting for the execution of the timer interrupt process (FIG. 19). After that, it is determined whether or not the power failure signal received from the power failure monitoring circuit 54b is at the HI level by determining whether or not "1" is stored in the predetermined bit of the input port 72a (step). S102).

When the power failure signal is at the LOW level (step S102: NO), the process returns to step S101, and the information stored in the predetermined bit of the input port 72a is read again (step S101), and the information is "1". By determining whether or not the power failure signal is received from the power failure monitoring circuit 54b, it is determined whether or not the power failure signal is at the HI level (step S102). If the power failure signal is at the HI level (step S102: YES), the process proceeds to step S103 and subsequent steps.

A state in which the progress of the processing is waited until the power failure signal reaches the HI level when the main processing is started will be described with reference to the time chart of FIG. FIG. 12 (a) shows the period during which the operating power is supplied to the main MPU 72, FIG. 12 (b) shows the state of the power failure signal transmitted from the power failure monitoring circuit 54b, and FIG. 12 (c) shows the state of the power failure signal transmitted from the power failure monitoring circuit 54b. The period during which the main process is being executed by the MPU 72 is shown, FIG. 12 (d) shows the period during which the progress of the main process is awaited, and FIG. 12 (e) shows a power failure signal in the timer interrupt process (FIG. 19). Indicates the period during which the processing at the time of power failure is executed when it is specified that is at the LOW level.

At the timing of t1, the supply of operating power from the power supply unit 54a to the main MPU 72 is started as shown in FIG. 12 (a), and the main process is performed by the main MPU 72 as shown in FIG. 12 (c) (FIG. 10). ) Is started. In this case, the voltage level of the power failure signal may not be stable because the power supply is not stable immediately after the power supply to the power supply unit 54a is started. In the case illustrated by the time chart of FIG. 12, as shown in FIG. 12B, the voltage of the power failure signal becomes unstable from the timing of t1 to the timing of t2 when the voltage is less than 5V. On the other hand, in the main process (FIG. 10), since the processes of step S101 and step S102 are executed as already described, the power failure signal is signaled from the timing of t1 to the timing of t2 as shown in FIG. 12 (d). Will wait until the level reaches the HI level without proceeding to the processing after step S103.

After that, at the timing of t2, as shown in FIG. 12B, the power failure signal becomes stable at the HI level. Therefore, as shown in FIG. 12D, the state in which the progress of the process is awaited (that is, the state in which the negative determination is made in step S102) is released, and the process proceeds to the process in step S103 and subsequent steps. As a result, it is possible to complete the main process (FIG. 10) under a stable condition where the power failure signal is at the HI level, and start the process for advancing the subsequent game.

After that, at the timing of t3, the main process (FIG. 10) ends as shown in FIG. 12 (c). In this case, the execution of the timer interrupt process (FIG. 19) is changed from the prohibited state to the permitted state. When the execution of the timer interrupt process (FIG. 19) is permitted, the timer interrupt process (FIG. 19) is periodically executed, and at the same time, the timer interrupt process (FIG. 19) sets the predetermined bit of the input port 72a to ". By determining whether or not "1" is stored, it is determined whether or not the power failure signal is at the HI level.

After that, at the timing of t4, the supply of the operating power from the external power supply to the power supply unit 54a is stopped as shown in FIG. 12 (a), so that the power failure signal changes from the HI level to the LOW level as shown in FIG. 12 (b). It becomes. Then, it is specified by the timer interrupt process (FIG. 19) that the power failure signal has reached the LOW level, so that when a power failure occurs as shown in FIG. 12 (e) from the timing of t4 to the timing of t5. The process is executed.

FIG. 13 is a flowchart showing a power failure processing executed in step S503 of the timer interrupt processing (FIG. 19).

In the power failure process, first, it is determined whether or not "1" is stored in the predetermined bit of the input port 72a, thereby determining whether or not the power failure signal is at the HI level (step S201). When the power failure signal is at the HI level (step S201: YES), the power failure processing is terminated without executing the power failure processing shown in steps S202 to S205.

When the value of the predetermined bit of the input port 72a is "0", that is, when the power failure signal is at the LOW level (step S201: NO), "1" is set in the power failure flag provided in the main RAM 74 (step S201: NO). Step S202), a checksum is calculated using the information stored in the checksum calculation target area among a large number of storage areas provided in the main RAM 74 (step S203), and the calculated checksum is used as the main side. In the storage area of the RAM 74, the checksum is stored in an area that is not a target for calculation (step S204). Then, after clearing all the output ports of the main MPU 72 to "0" (step S205), an infinite loop occurs. This infinite loop continues until the supply of operating power to the main MPU 72 during a power failure is completely stopped. As a result, when the processing at the time of power failure is normally executed when the supply of operating power to the main MPU 72 is stopped, the power failure flag of the main RAM 74 is set to "1", and the main RAM 74 is further set to "1". The checksum is stored.

As described above, when the supply of the operating power to the main MPU 72 is started, the execution of the processes after step S103 in the main process (FIG. 10) is waited until the power failure signal stabilizes at the HI level. This makes it possible to start the process for advancing the game in a situation where the HI level power failure signal is stably output.

When the main process (FIG. 10) is started, the execution of the timer interrupt process (FIG. 19) is prohibited, so that the power failure process is not executed even if the power failure signal is not stable at the HI level. Along with this, the processing at the time of power failure is not executed. In this case, in the main process (FIG. 10), the predetermined bit of the input port 72a is repeatedly monitored until the power failure signal reaches the HI level. As a result, it is possible to monitor whether or not the power failure signal is at the HI level even in a situation where the execution of the timer interrupt process (FIG. 19) is prohibited.

Returning to the description of the main process (FIG. 10), if an affirmative determination is made in step S102, the internal function setting process is executed (step S103). In the internal function setting process, various initial settings are performed for the register group in the main MPU 72, the I / O device, and the like.

After that, "1" is set in the information abnormality flag 74g (see FIG. 9) provided in the main RAM 74 (step S104). The information abnormality flag 74g is a flag for the main MPU 72 to specify whether or not an information abnormality has occurred in the main RAM 74 when the supply of operating power is started.

After that, in order to identify whether or not an information abnormality has occurred, it is first determined whether or not "1" is set in the power failure flag of the main RAM 74 (step S105). Further, a checksum is calculated using the information stored in the checksum calculation target area among a large number of storage areas provided in the main RAM 74 (step S106), and the calculated checksum is the previous operation. It is determined whether or not the checksum calculated in step S203 of the power failure processing (FIG. 13) when the power supply is stopped matches the checksum stored in the main RAM 74 (steps S107 and S108). Further, it is determined whether or not the set value data stored in the set value storage area provided in the main RAM 74 is 6 or more (step S109). The setting value data of "0" corresponds to the setting value of "1", the setting value data of "1" corresponds to the setting value of "2", and the setting value data of "2" corresponds to "3". The setting value data of "3" corresponds to the setting value of "4", and the setting value data of "4" corresponds to the setting value of "5". The set value data of "5" corresponds to the set value of "6". The set value data of "0" to "5" is normal, and if it is 6 or more, it becomes abnormal.

When "1" is set in the power failure flag (step S105: YES), the checksums match (step S108: YES), and the set value data is less than 6 (step S109: NO), the main It means that no information abnormality has occurred in the side RAM 74. In this case, the information abnormality flag 74g of the main RAM 74 is cleared to "0" (step S110). On the other hand, when "1" is not set in the power failure flag (step S105: NO), when the checksums do not match (step S108: NO), or when the set value data is 6 or more (step S109: NO). YES), the state in which "1" is set in the information abnormality flag 74g is maintained.

When a negative determination is made in step S105, a negative determination is made in step S108, an affirmative determination is made in step S109, or the process of step S110 is executed, a setting change operation is performed at the start of supply of operating power. Is determined (step S111). Specifically, it is determined whether or not the setting key inserted in the setting key insertion hole 57 is turned on. When the setting change operation is not performed (step S111: NO), it is determined whether or not "1" is set in the information error flag 74g of the main RAM 74 (step S112).

When "1" is not set in the information abnormality flag 74g (step S112: NO), it means that the power failure processing at the time of the previous power failure is normally executed and no information abnormality has occurred in the main RAM 74. means. In this case, the value of the stack pointer stored in the main RAM 74 is written to the stack pointer of the main MPU 72, and the data saved in the main RAM 74 is returned to the register of the main MPU 72, so that the register of the main MPU 72 The state is returned to the state before the power was cut off (step S113). Further, the power failure flag of the main RAM 74 is cleared to "0" (step S114). In addition, a power recovery command for recognizing the execution of the power recovery process is transmitted to the effector MPU 92 (step S115).

After that, the execution of the timer interrupt process (FIG. 19) is permitted (step S116). Execution of the timer interrupt process (FIG. 19) is not permitted at the timing when the supply of operating power to the main MPU 72 is started, but the timer interrupt process (FIG. 19) is executed by executing the process of step S116. Execution is allowed. As a result, the timer interrupt process (FIG. 19) is periodically started. After that, the address returns to the address before the power was cut off (step S117).

When "1" is set in the information abnormality flag 74g (step S112: YES), the operation prohibition process is executed. In the operation prohibition process, by clearing all the output ports of the main MPU 72 to "0", all the actuators connected to the output ports are turned off (step S118), and the hall manager and the like are notified of the occurrence of an error. The error notification process is executed (step S119). Then, it becomes an infinite loop. Even if the supply of operating power to the main MPU 72 is stopped, the operation prohibition process is executed again when the supply of operating power is started until the setting change process (FIG. 15) described later is executed. To. When the setting change process (FIG. 15) described later is executed, the execution of the operation prohibition process is avoided.

FIG. 14 is a time chart showing how the information abnormality flag 74g is used to identify that an information abnormality has occurred in the main RAM 74. FIG. 14 (a) shows the period during which the main process (FIG. 10) is executed, FIG. 14 (b) shows the state of the information abnormality flag 74 g, and FIG. 14 (c) shows the process for grasping the abnormality (step S105). ~ Step S109) is executed, and FIG. 14D shows the period during which the operation prohibition process (step S118 and step S119) is executed.

First, a case where no information abnormality has occurred in the main RAM 74 will be described.

When the supply of the operating power to the main MPU 72 is started, the main process (FIG. 10) is started at the main MPU 72 at the timing of t1 as shown in FIG. 14 (a). Then, after the information abnormality flag 74g is set to "1" at the timing of t2 as shown in FIG. 14 (b), the abnormality is grasped from the timing of t3 to the timing of t4 as shown in FIG. 14 (c). (Steps S105 to S109) are executed. In this case, in the process for grasping the abnormality (steps S105 to S109), it is not specified that an information abnormality has occurred in the main RAM 74. Therefore, since the information abnormality flag 74g is cleared to “0” at the timing of t4 as shown in FIG. 14 (b), the operation prohibition process (step S118 and step S119) is not executed as shown in FIG. 14 (d). .. After that, at the timing of t5, the main process (FIG. 10) ends as shown in FIG. 14 (a), and the process for advancing the game (timer interrupt process (FIG. 19), normal process (FIG. 25)) starts. Will be done.

Next, a case where an information abnormality has occurred in the main RAM 74 will be described.

When the supply of the operating power to the main MPU 72 is started, the main process (FIG. 10) is started at the main MPU 72 at the timing of t6 as shown in FIG. 14 (a). Then, after the information abnormality flag 74g is set to "1" at the timing of t7 as shown in FIG. 14 (b), the abnormality is grasped from the timing of t8 to the timing of t9 as shown in FIG. 14 (c). (Steps S105 to S109) are executed. In this case, in the process for grasping the abnormality (steps S105 to S109), it is specified that an information abnormality has occurred in the main RAM 74. Therefore, by maintaining the state in which "1" is set in the information abnormality flag 74g as shown in FIG. 14B, the operation prohibition process (step S118) is performed at the timing of t9 as shown in FIG. 14D. And step S119) is started.

As described above, after "1" is set in the information abnormality flag 74g, which is a flag for specifying whether or not an information abnormality has occurred in the main RAM 74 by the main MPU 72, an information abnormality occurs in the main RAM 74. A process for grasping an abnormality is executed to execute various determinations as to whether or not it has occurred. Then, when it is specified that an information abnormality has occurred in the main RAM 74 in the abnormality grasping process, the state in which "1" is set in the information abnormality flag 74g is maintained, and the abnormality grasping is performed. When it is specified that no information abnormality has occurred in the main RAM 74 in the process of, the information abnormality flag 74g is cleared to "0". If the state in which "1" is set in the information error flag 74g is maintained, the operation prohibition process is executed, and if the value of the information error flag 74g is "0", the operation prohibition process is executed. The process for advancing the game is started. In this way, when the information error flag 74g is first set to "1" and then it is specified that no information error has occurred in the main RAM 74, the information error flag 74g is cleared to "0". As a result, even if various determinations are made as to whether or not an information abnormality has occurred in the main RAM 74 due to the generation of electrical noise even though the information abnormality has actually occurred, the operation is prohibited. It is possible to have the process executed.

Returning to the description of the main process (FIG. 10), when the setting key inserted in the setting key insertion hole 57 is turned on at the start of supplying the operating power, that is, when the setting change operation is performed (step S111). : YES), after executing the setting change process (step S120), the normal process is executed (step S121).

FIG. 15 is a flowchart showing the setting change process in step S120.

First, the start address setting process is executed (step S301). In the start address setting process, when the clear process for clearing and initializing the storage area of the main RAM 74 at the start of the setting change process is executed, the main RAM 74 to be the start target of the clear process is executed. Set the address of the storage area. FIG. 16 is an explanatory diagram for explaining the contents of the storage area of the main RAM 74. As shown in FIG. 16, an address is set in each storage area of the main RAM 74. The address is set as serial number information. Specifically, the address of "0000" is set as the initial address, the address of "0001" is set as the address of the next order, and the address of "0002" is set as the address of the next order. The address is set so that it will be a serial number even after that.

As a storage area corresponding to the start address "0000", a second CB winning data area, which is an area for storing the second CB winning data, is set. When the second CB winning data is selected in the lottery process (FIG. 34) of the winning combination described later, the second CB winning data is set in the second CB winning data area, and when the second CB winning is established, the second CB winning data. The second CB winning data is cleared from the area.

The first CB winning data area, which is an area for storing the first CB winning data, is set as the storage area corresponding to the next order "0001" with respect to the starting address "0000". When the first CB winning data is selected in the lottery process (FIG. 34) of the winning combination described later, the first CB winning data is set in the first CB winning data area, and when the first CB winning is established, the first CB winning data. The first CB winning data is cleared from the area.

As a storage area corresponding to "0002", which is the next order with respect to "0001", a set value storage area, which is an area for storing the set value to be used, is set. The set value selected in the setting change process (FIG. 15) is stored in the set value storage area.

The continuous game number counter 74c is set as the storage area corresponding to "0003", the total acquisition number counter 74d is set as the storage area corresponding to "0004", and the credit is set as the storage area corresponding to "0005". The counter 74b is set, and the door state area 74e is set as the storage area corresponding to "0006". Further, various storage areas are also set in the storage areas corresponding to "0007" to "k-3". The various storage areas include a second section flag and the like, which will be described later. Further, the bet number history counter 74f is set as a storage area corresponding to "k-2", and the grant number history counter is set as a storage area corresponding to "k-1", which corresponds to "k". A pseudo-bonus state flag is set as a storage area to be used, a pseudo-bonus continuation counter is set as a storage area corresponding to "k + 1", and a bet number setting counter 74a is set as a storage area corresponding to "k + 2". A medium grant counter is set as a storage area corresponding to "k + 3". Further, for example, an information abnormality flag 74g is set as a storage area for addresses after "k + 4". The information abnormality flag 74g has already been described, and the counters 74a to 74e and various areas 74f other than the information abnormality flag 74g will be described later.

In the start address setting process in step S301, "0001" is set as the start address in the clear target address provided in the register of the main MPU 72. Although the details will be described later, "0" of the storage area of the main RAM 74 is cleared and initialized for the storage area of the address set as the clear target address, and then the clear target address is changed to the address in the next order. The clear target address is added by 1, and "0" clearing and initialization are executed for the storage area corresponding to the clear target address after the 1 addition. In this case, if "0001" is set as the start address for the address to be cleared, the storage area corresponding to the address after "0001" is subject to "0" clearing and initialization, and is set to the address "0000". The corresponding storage area will not be subject to "0" clearing and initialization.

After that, by determining whether or not "1" is set in the information abnormality flag 74g of the main RAM 74, it is determined whether or not an information abnormality has occurred in the main RAM 74 (step S302). Further, it is determined whether or not the reset button 56 is pressed at the start of supplying the operating power (step S303). If a negative determination is made in both steps S302 and S303, the start address correction process is executed (step S304). In the correction process of the start address, "0000" is overwritten as the corrected start address in the clear target address of the main MPU 72. When "0000" is set as the start address for the clear target address, all the storage areas of the main RAM 74 are subject to "0" clearing and initialization.

That is, if an information error has occurred in the main RAM 74 and the setting change process is started in a situation where the information error flag 74g is set to "1", the setting change process is executed at the start of the setting change process. The storage area to be cleared and initialized is all the storage areas of the main RAM 74. Further, even if the setting change process is started in a situation where no information error has occurred in the main RAM 74 and the value of the information error flag 74g is "0", the setting key is used when starting the supply of operating power. When not only the ON operation of the above but also the pressing operation of the reset button 56 is executed, the storage area to be cleared and initialized to "0" executed at the start of the setting change process is all of the main RAM 74. It becomes a storage area of.

When an affirmative determination is made in step S302, an affirmative determination is made in step S303, or the process of step S304 is executed, the storage area of the main RAM 74 corresponding to the address set as the clear target address is set to ". "0" is cleared and initialization is executed (step S305). After that, the update process of the clear target address is executed (step S306). In the update process, by adding 1 to the value of the address to be cleared, the address set as the address to be cleared is changed to the address in the next order in the order of the addresses of the main RAM 74. Then, it is determined whether or not the updated address exceeds the end address, which is the last ordered address in the main RAM 74 (step S307). If a negative determination is made in step S307, the updated address storage area is cleared to "0" and initialization is executed (step S305), and the processes of steps S306 and S307 are executed again. If an affirmative determination is made in step S307, it means that the clearing process of the main RAM 74 has been completed. In this case, the process proceeds to step S308.

Here, a state in which the clear processing of the main RAM 74 is executed in the setting change processing will be described with reference to the time chart of FIG. FIG. 17 (a) shows the period during which the operating power is supplied to the main MPU 72, and FIG. 17 (b) shows the period during which the main process (FIG. 10) is executed by the main MPU 72. c) shows the period during which the setting key inserted into the setting key insertion hole 57 is turned on as the setting change operation, and FIG. 17 (d) shows the period during which the reset button 56 is pressed. 17 (e) shows the state of the information abnormality flag 74g, FIG. 17 (f) shows the period during which the setting change process (FIG. 15) is executed by the main MPU 72, and FIG. 17 (g) shows the main RAM 74. The period during which the clearing process is executed for a part of the storage area of the main RAM 74 is shown, and FIG. 17 (h) shows the period during which the clearing process is executed for the entire storage area of the main RAM 74.

First, a case where the supply of the operating power is started without executing the pressing operation of the reset button 56 and the setting change process is executed in a situation where the information abnormality of the main RAM 74 has not occurred will be described.

At the timing of t1, the supply of operating power to the main MPU 72 is started as shown in FIG. 17 (a), and at the timing of t1, the main process is performed by the main MPU 72 as shown in FIG. 17 (b) (FIG. 10). ) Is started. Further, as shown in FIG. 17C, a setting change operation is performed when the supply of operating power is started. After that, at the timing of t2, “1” is set in the information abnormality flag 74g as shown in FIG. 17 (e), but in the processing for grasping the abnormality (steps S105 to S109) in the main processing (FIG. 10). Since it is specified that no information abnormality has occurred in the main RAM 74, the information abnormality flag 74g is cleared to "0" at the timing of t3.

After that, at the timing of t4, the setting change process (FIG. 15) is started on the main MPU 72 as shown in FIG. 17 (f). When the setting change process (FIG. 15) is started, the clear process of the main RAM 74 is executed, but since the information abnormality of the main RAM 74 has not occurred at the start of the supply of the operating power this time. As shown in FIG. 17 (e), the value of the information abnormality flag 74g is “0”, and the reset button 56 is not pressed as shown in FIG. 17 (d) at the start of the supply of the operating power this time. .. Therefore, in the clearing process of the main RAM 74 this time, as shown in FIG. 17 (g), a partial clearing process in which "0001" is set as the start address is executed. In this case, as described above, the second CB winning data area, which is the storage area in which the initial address is set in the main RAM 74, is excluded from the targets of "0" clearing and initialization, and the storage area other than the area concerned is excluded. “0” clearing and initialization are sequentially executed, and the process ends at the timing of t5 as shown in FIG. 17 (g). As a result, even when the setting change process (FIG. 15) is executed, the information in the second CB winning data area can be maintained in the state before the previous stop of the supply of the operating power.

Next, when the supply of operating power is started in the situation where the pressing operation of the reset button 56 is being executed and the setting change processing is executed in the situation where the information abnormality of the main RAM 74 has not occurred. explain.

At the timing of t6, the supply of operating power to the main MPU 72 is started as shown in FIG. 17 (a), and at the timing of t6, the main process is performed by the main MPU 72 as shown in FIG. 17 (b) (FIG. 10). ) Is started. Further, as shown in FIG. 17 (c), a setting change operation is performed when the supply of operating power is started, and a reset button 56 is pressed as shown in FIG. 17 (d). After that, at the timing of t7, “1” is set in the information abnormality flag 74g as shown in FIG. 17 (e), but in the processing for grasping the abnormality (steps S105 to S109) in the main processing (FIG. 10). Since it is specified that no information abnormality has occurred in the main RAM 74, the information abnormality flag 74g is cleared to "0" at the timing of t8.

After that, at the timing of t9, the setting change process (FIG. 15) is started on the main MPU 72 as shown in FIG. 17 (f). When the setting change process (FIG. 15) is started, the clear process of the main RAM 74 is executed, but since the information abnormality of the main RAM 74 has not occurred at the start of the supply of the operating power this time. As shown in FIG. 17E, the value of the information abnormality flag 74g is “0”. On the other hand, at the start of the supply of the operating power this time, the reset button 56 is pressed as shown in FIG. 17D, and the pressing operation is continued at the timing of t9. Therefore, in the clearing process of the main RAM 74 this time, as shown in FIG. 17 (h), the all clearing process in which "0000" is set as the start address is executed. In this case, as described above, "0" clearing and initialization are sequentially executed for all the storage areas of the main RAM 74 including the second CB winning data area which is the storage area where the initial address is set in the main RAM 74. Then, as shown in FIG. 17 (h), the process ends at the timing of t10. This makes it possible to initialize the entire storage area of the main RAM 74 when the setting change process (FIG. 15) is executed.

Next, when the supply of operating power is started in the situation where the pressing operation of the reset button 56 is not executed and the setting change process is executed in the situation where the information abnormality of the main RAM 74 occurs. explain.

At the timing of t11, the supply of operating power to the main MPU 72 is started as shown in FIG. 17 (a), and at the timing of t11, the main process is performed by the main MPU 72 as shown in FIG. 17 (b) (FIG. 10). ) Is started. Further, as shown in FIG. 17C, a setting change operation is performed when the supply of operating power is started. After that, at the timing of t12, “1” is set in the information abnormality flag 74g as shown in FIG. 17 (e), and further, the main processing (steps S105 to S109) for grasping the abnormality in the main processing (FIG. 10) is performed. By identifying that an information abnormality has occurred in the side RAM 74, the state in which "1" is set in the information abnormality flag 74g is maintained.

After that, at the timing of t13, the setting change process (FIG. 15) is started on the main MPU 72 as shown in FIG. 17 (f). When the setting change process (FIG. 15) is started, the clear process of the main RAM 74 is executed, but since an information abnormality of the main RAM 74 has occurred at the start of the supply of the operating power this time. As shown in FIG. 17E, the value of the information abnormality flag 74g is “1”. Therefore, in the clearing process of the main RAM 74 this time, as shown in FIG. 17 (h), the all clearing process in which "0000" is set as the start address is executed. In this case, as described above, "0" clearing and initialization are sequentially executed for all the storage areas of the main RAM 74 including the second CB winning data area which is the storage area where the initial address is set in the main RAM 74. Then, as shown in FIG. 17 (h), the process ends at the timing of t14. As a result, when the setting change process (FIG. 15) is executed in the situation where the information abnormality of the main RAM 74 occurs, the set value is changed after initializing the entire storage area of the main RAM 74. It is possible to start the process for

Returning to the description of the setting change process (FIG. 15), when an affirmative determination is made in step S307, a setting change start command is transmitted to the effect side MPU 92 (step S308). When the effecting side MPU 92 receives the setting change start command, it controls the upper lamp 61, the speaker 62, and the image display device 63 so that the notification indicating that the setting value is being changed is executed. In this case, the image display device 63 may be configured to display an image that allows the manager of the game hall to recognize the operation content for changing the set value.

After that, the setting change execution process is executed (step S309). FIG. 18 is a flowchart showing the setting change execution process.

First, the execution of the timer interrupt process (FIG. 19) is permitted (step S401). Execution of the timer interrupt process (FIG. 19) is not permitted at the timing when the supply of operating power to the main MPU 72 is started, but the setting change process (FIG. 15) is executed in the main process (FIG. 10). In this case, the timer interrupt process (FIG. 19) is permitted to be executed by executing the process of step S401 of the setting change execution process (FIG. 18). As a result, the timer interrupt process (FIG. 19) is periodically started.

FIG. 19 is a flowchart showing timer interrupt processing. The timer interrupt process is started every 1.49 milliseconds, for example.

First, further interrupts in the timer interrupt process (FIG. 19) are prohibited (step S501). After that, the register save process is executed (step S502). In the register save process, the values of all the registers in the main MPU 72 used in the normal process (FIG. 25) described later are saved in the main RAM 74. After that, the power failure process is executed (step S503). The processing contents of the power failure processing are as described above. After that, in order to rotate the reels 32L, 32M, 32R, a stepping motor control process for driving the stepping motors provided on the reels 32L, 32M, 32R is performed (step S504). Further, the sensor monitoring process is executed (step S505).

FIG. 20A is a flowchart showing the sensor monitoring process. First, the shift process of the detection state storage area is executed (step S601). FIG. 20B is an explanatory diagram for explaining the contents of the detection state storage area provided in the main RAM 74. As shown in FIG. 20B, the main RAM 74 is provided with a reset current storage area 74h and a reset previous storage area 74i as detection state storage areas. In the reset current state storage area 74h, information corresponding to the state of the reset button 56 grasped in the sensor monitoring process (FIG. 20A) of the latest processing time is stored. Specifically, in the sensor monitoring process (FIG. 20A) of the latest processing time, a HI level signal indicating that the reset button 56 is being pressed is received as a detection signal from the reset button 56. If so, the information of "1" is stored in the reset current state storage area 74h, and if a LOW level signal indicating that the reset button 56 is not pressed is received, the reset current state storage area 74h is stored. Clear "0". Further, in the reset previous storage area 74i, information corresponding to the state of the reset button 56 grasped in the sensor monitoring process (FIG. 20A) of the previous processing time is stored. Specifically, as a detection signal from the reset button 56 in the sensor monitoring process (FIG. 20A) of the previous process, a HI level signal indicating that the reset button 56 is being pressed is used. If it has been reset, the information of "1" is stored in the storage area 74i last time, and if a LOW level signal indicating that the reset button 56 has not been pressed has been received, it is reset last time. The information in the storage area 74i is "0".

In the shift process of the detection state storage area in step S601, the information stored in the reset current storage area 74h is overwritten in the reset previous storage area 74i. After that, the signal received from the reset button 56 is specified, and if the specified signal is at the HI level (step S602: YES), "1" is set in the reset current storage area 74h (step S603). If the specified signal is at the LOW level (step S602: NO), the reset current storage area 74h is cleared to "0" (step S604).

When the process of step S603 or step S604 is executed, other processes are executed (step S605). In other processes, a process for specifying the content of the detection signal from various sensors other than the sensor that detects the pressing operation of the reset button 56 is executed.

Returning to the description of the timer interrupt process (FIG. 19), after executing the sensor monitoring process, the timer subtraction process for subtracting the values of each counter and the timer is executed (step S506). In addition, a command output process for transmitting various commands to the effect side MPU 92 is executed (step S507). In addition, a port output process for outputting data corresponding to the I / O device from the input / output port is executed (step S508). In the port output process, the dual-purpose display unit 66 is displayed so that a number corresponding to the value of the medium assignment counter of the main RAM 74, which will be described later, is displayed in a situation where the notification of the stop order of the reels 32L, 32M, 32R is not executed. Display control. If the value of the medium addition counter is "0" in a situation where the notification of the stop order of the reels 32L, 32M, 32R is not executed, the dual-purpose display unit 66 is turned off. Further, the control process of the bet display unit 64 is executed so that the display corresponding to the number of bets is executed on the bet display unit 64 (step S509). In addition, a management process for managing the game history and displaying the content corresponding to the management result on the combined display unit 66 is executed (step S510). Specifically, the ratio of the total number of games in the second section SC2, which will be described later, to the total number of games is calculated, and the ratio of the calculation result is displayed on the combined display unit 66. After that, the value of each register saved in the main RAM 74 in the previous step S502 is returned to the corresponding register in the main MPU 72 (step S511), and the execution of the next timer interrupt process (FIG. 19) is permitted. (Step S512).

Returning to the description of the setting change execution process (FIG. 18), after permitting the execution of the timer interrupt process (FIG. 19) in step S401, it is determined whether or not the timer interrupt process (FIG. 19) has been executed (step). S402), wait in step S402 until the timer interrupt process (FIG. 19) is executed. The processing configuration for specifying whether or not the timer interrupt processing (FIG. 19) has been executed is arbitrary, but in this slot machine 10, the execution flag is provided in the register of the main MPU 72, and the main MPU 72 is reached. When the supply of the operating power of is started, the executed flag is cleared to "0", and every time the timer interrupt process (FIG. 19) is executed thereafter, the executed flag is set to "1". To execute the processing of. In this case, in step S402, it is determined whether or not "1" is set in the executed flag in the register of the main MPU 72, and if "1" is not set in the executed flag, it is denied in step S402. A determination is made, and if "1" is set in the executed flag, an affirmative determination is made in step S402. If an affirmative determination is made in step S402, the executed flag of the register of the main MPU 72 is cleared to "0" (step S403).

After that, it is determined whether or not the value of the set value storage area provided in the main RAM 74 is 6 or more (step S404). The set value storage area is an area for specifying the set value currently selected by the main MPU 72. When the value of the set value storage area is "0", the set value to be selected is "1", and when the value of the set value storage area is "1", it is selected. If the set value is "2" and the value in the set value storage area is "2", the set value to be selected is "3" and the value in the set value storage area is "3". If, the set value to be selected is "4", and if the value in the set value storage area is "4", the set value to be selected is "5". When the value of the set value storage area is "5", the set value to be selected is "6". When the value of the set value storage area is 6 or more, it means that the value of the set value storage area exceeds the maximum value, so that the set value storage area is cleared to "0" (step S405). As a result, the set value to be selected becomes "1".

When a negative determination is made in step S404, or when the process of step S405 is executed, it is determined whether or not the timer interrupt process (FIG. 19) has been executed (step S406), and the timer interrupt process (FIG. 19) is executed. It waits in step S406 until it is done. Specifically, as in step S402, it is determined whether or not "1" is set in the executed flag in the register of the main MPU 72. The executed flag is cleared to "0" when an affirmative judgment is made in step S402, and as described above, "1" is set to the executed flag each time the timer interrupt process (FIG. 19) is executed. The process for doing so is executed. Therefore, in step S406, after making an affirmative determination in step S402, it is determined whether or not the timer interrupt process (FIG. 19) has been executed at least once. If "1" is not set in the executed flag, a negative determination is made in step S406, and if "1" is set in the executed flag, an affirmative determination is made in step S406. If an affirmative determination is made in step S406, the executed flag of the register of the main MPU 72 is cleared to "0" (step S407).

After that, it is determined whether or not the start lever 41 is turned on (step S408). When the start lever 41 is turned ON while the setting change execution process is being executed, the set value to be selected is determined as the target to be used. When the start lever 41 is not turned on (step S408: NO), it is determined whether or not the pressing operation of the reset button 56 has been started (step S409). Specifically, the information stored in the reset previous storage area 74i of the main RAM 74 is "0" corresponding to the fact that the reset button 56 has not been pressed, and the reset current storage area of the main RAM 74. It is determined whether or not the information stored in 74h is "1" corresponding to the pressing operation of the reset button 56. If a negative determination is made in step S409, the process returns to step S406. If an affirmative determination is made in step S409, the value in the set value storage area of the main RAM 74 is added by 1 (step S410). After that, the process returns to step S404, and if the value of the set value storage area after 1 addition is 6 or more (step S404: YES), the set value storage area is cleared to "0" (step S405), and then the step. The processing after S406 is executed. When the start lever 41 is turned on (step S408: YES), it waits until the setting key inserted in the setting key insertion hole 57 is turned off (step S411: NO), and the setting key is pressed. When the OFF operation is performed (step S411: YES), the setting change execution process is terminated.

That is, in the situation where the setting change execution process is being executed, each time the reset button 56 is pressed, the set value to be selected is changed to the set value of the advantage one step higher. Further, when the reset button 56 is pressed when the set value is already the most advantageous "6", the set value storage area is cleared to "0", so that the lowest advantage is "1". It is set to the value of. Further, when the start lever 41 is turned ON, the set value to be selected is determined as the target to be used, and then the setting key inserted in the setting key insertion hole 57 is turned OFF to change the setting. The execution process ends.

In the setting change execution process, the processes of steps S402 and S406 are executed as described above, so that the first step of whether or not the pressing operation of the reset button 56 is started after the setting change execution process (FIG. 18) is started. By the time the determination process is started, the interrupt wait period, which is a period for waiting for the progress of the process until the timer interrupt process (FIG. 19) is newly executed, occurs twice. By setting these interrupt standby periods, the supply of operating power to the main MPU 72 is started when the reset button 56 is pressed, and the setting is changed when the reset button 56 is pressed. Even if the execution process (FIG. 18) is started, the set value to be selected is not changed by the maintained pressing operation of the reset button 56. This content will be described with reference to the time chart of FIG.

FIG. 21 shows a state in which when the supply of operating power is started while the reset button 56 is pressed, the set value to be selected is not changed by the maintained pressing operation of the reset button 56. It is a time chart showing. FIG. 21 (a) shows the period during which the operating power is supplied to the main MPU 72, and FIG. 21 (b) shows the period during which the main process (FIG. 10) is executed by the main MPU 72. c) shows the period during which the ON operation is performed by the setting key inserted into the setting key insertion hole 57, and FIG. 21 (d) shows the period during which the reset button 56 is pressed. e) shows the period during which the clearing process is executed for the entire storage area of the main RAM 74, FIG. 21 (f) shows the period during which the setting change execution process (FIG. 18) is executed, and FIG. 21 (g) shows. ) Indicates the period during which the timer interrupt process (FIG. 19) is executed, FIG. 21 (h) indicates the interrupt standby period according to steps S402 and step S406 of the setting change execution process (FIG. 18), and FIG. 21 (i) shows. 21 (j) shows the state of the reset current storage area 74h of the main RAM 74, FIG. 21 (j) shows the state of the previous reset storage area 74i of the main RAM 74, and FIG. 21 (k) shows the change trigger of the set value to be selected. Indicates the specific timing of.

At the timing of t1, the supply of operating power to the main MPU 72 is started as shown in FIG. 21 (a), and at the timing of t1, the main process is performed by the main MPU 72 as shown in FIG. 21 (b) (FIG. 10). ) Is started. Further, as shown in FIG. 21 (c), an ON operation is performed by the setting key at the start of supplying the operating power, and a pressing operation of the reset button 56 is performed as shown in FIG. 21 (d).

Since the ON operation is performed by the setting key as described above, the setting change process (FIG. 15) is started after that. When the setting change process (FIG. 15) is started, the clear process of the main RAM 74 is executed, but the reset button 56 is pressed as described above when the supply of the operating power this time is started. , The pressing operation is continued at the timing of t2. Therefore, at the timing of t2, as shown in FIG. 21 (e), the clearing process for the entire storage area of the main RAM 74 is started. In this case, the reset current storage area 74h and the reset previous storage area 74i are also cleared to "0" by the clearing process.

After that, the clearing process is completed at the timing of t3 as shown in FIG. 21 (e). At the timing of t3, the setting change execution process (FIG. 18) is started as shown in FIG. 21 (f). In this case, in the setting change execution process (FIG. 18), the execution of the timer interrupt process (FIG. 19) is permitted in step S401, and the process waits until the timer interrupt process (FIG. 19) is executed in step S402. That is, as shown in FIG. 21 (h), an interrupt standby period occurs.

As shown in FIG. 21 (g), the timer interrupt process (FIG. 19) is executed by interrupting the setting change execution process (FIG. 18) at the timing of t4 in the interrupt standby period. The reset button is executed by executing the sensor monitoring process (FIG. 20 (a)) of step S505 in the timer interrupt process (FIG. 19) at the timing of t5, which is the situation in which the timer interrupt process (FIG. 19) is being executed. Whether or not the 56 is pressed is specified. At the timing of t5, the pressing operation of the reset button 56 is continued as shown in FIG. 21 (d). Therefore, at the timing of t5, “1” is set in the reset current storage area 74h as shown in FIG. 21 (i). The information in the reset previous storage area 74i is maintained at "0". The timer interrupt process (FIG. 19) ends at the timing of t6 as shown in FIG. 21 (g). As a result, the process executed by the main MPU 72 returns to the setting change execution process (FIG. 18).

Since the setting change execution process (FIG. 18) has already executed the timer interrupt process (FIG. 19), an affirmative determination is made in step S402 and the processes after step S403 are executed. Then, in step S406, the timer interrupt process (FIG. 19) is waited until it is executed again. That is, as shown in FIG. 21 (h), the interrupt standby period occurs at the timing of t7.

As shown in FIG. 21 (g), the timer interrupt process (FIG. 19) is executed by interrupting the setting change execution process (FIG. 18) at the timing of t8 in the interrupt standby period. At the timing of t9, which is the situation in which the timer interrupt process (FIG. 19) is being executed, the sensor monitoring process (FIG. 20 (a)) in step S505 in the timer interrupt process (FIG. 19) is executed. In this case, first, the information stored in the reset current storage area 74h is shifted to the reset previous storage area 74i, but since "1" is already set in the reset current storage area 74h, at the timing of t9. As shown in FIG. 21 (j), "1" is set in the reset previous storage area 74i. Further, it is specified whether or not the reset button 56 is pressed in the sensor monitoring process (FIG. 20A). At the timing of t9, the pressing operation of the reset button 56 is continued as shown in FIG. 21 (d). Therefore, at the timing of t9, “1” is set in the reset current storage area 74h as shown in FIG. 21 (i). The timer interrupt process (FIG. 19) ends at the timing of t10 as shown in FIG. 21 (g). As a result, the process executed by the main MPU 72 returns to the setting change execution process (FIG. 18).

Since the setting change execution process (FIG. 18) has already executed the timer interrupt process (FIG. 19), an affirmative determination is made in step S406 and the processes after step S408 are executed. Then, at the timing of t11, as shown in FIG. 21 (k), a process for determining whether or not the pressing operation of the reset button 56 in step S409 is started is executed. Specifically, the information stored in the reset previous storage area 74i of the main RAM 74 is "0" corresponding to the fact that the reset button 56 has not been pressed, and the reset current storage area of the main RAM 74. It is determined whether or not the information stored in 74h is "1" corresponding to the pressing operation of the reset button 56. In this case, the information in the reset previous storage area 74i is "1" as shown in FIG. 21 (j), and the information in the reset current storage area 74h is "1" as shown in FIG. 21 (i). Therefore, in step S409, it is not determined that the pressing operation of the reset button 56 has been started. As a result, when the supply of operating power is started while the reset button 56 is pressed, the set value to be selected is not changed by the maintained pressing operation of the reset button 56. It becomes possible to.

After that, at the timing of t12, step S406 of the setting change execution process (FIG. 18) is executed. Wait until the timer interrupt process (FIG. 19) is executed again in step S406. That is, as shown in FIG. 21 (h), the interrupt standby period occurs at the timing of t12. As shown in FIG. 21D, the pressing operation of the reset button 56 is released at the timing of t13 in the interrupt standby period. Further, at the timing of t14, as shown in FIG. 21 (g), the timer interrupt process (FIG. 19) is executed by interrupting the setting change execution process (FIG. 18). At the timing of t15, which is the situation in which the timer interrupt process (FIG. 19) is being executed, the sensor monitoring process (FIG. 20 (a)) in step S505 in the timer interrupt process (FIG. 19) is executed. In this case, the information stored in the reset current storage area 74h is first shifted to the reset previous storage area 74i, but since "1" is already set in the reset current storage area 74h, at the timing of t15. As shown in FIG. 21 (j), "1" is set in the reset previous storage area 74i. Further, it is specified whether or not the reset button 56 is pressed in the sensor monitoring process (FIG. 20A). At the timing of t15, the reset button 56 is not pressed as shown in FIG. 21 (d). Therefore, at the timing of t15, the reset current storage area 74h is cleared to “0” as shown in FIG. 21 (i). The timer interrupt process (FIG. 19) ends at the timing of t16 as shown in FIG. 21 (g). As a result, the process executed by the main MPU 72 returns to the setting change execution process (FIG. 18).

Since the setting change execution process (FIG. 18) has already executed the timer interrupt process (FIG. 19), an affirmative determination is made in step S406 and the processes after step S408 are executed. Then, at the timing of t17, as shown in FIG. 21 (k), a process for determining whether or not the pressing operation of the reset button 56 in step S409 is started is executed. Specifically, the information stored in the reset previous storage area 74i of the main RAM 74 is "0" corresponding to the fact that the reset button 56 has not been pressed, and the reset current storage area of the main RAM 74. It is determined whether or not the information stored in 74h is "1" corresponding to the pressing operation of the reset button 56. In this case, the information of the reset previous storage area 74i is "1" as shown in FIG. 21 (j), and the information of the reset current storage area 74h is "0" as shown in FIG. 21 (i). Therefore, in step S409, it is not determined that the pressing operation of the reset button 56 has been started.

After that, at the timing of t18, step S406 of the setting change execution process (FIG. 18) is executed. Wait until the timer interrupt process (FIG. 19) is executed again in step S406. That is, as shown in FIG. 21 (h), the interrupt standby period occurs at the timing of t18. As shown in FIG. 21 (g), the timer interrupt process (FIG. 19) is executed by interrupting the setting change execution process (FIG. 18) at the timing of t19 in the interrupt standby period. At the timing of t20, which is the situation in which the timer interrupt process (FIG. 19) is being executed, the sensor monitoring process (FIG. 20 (a)) in step S505 in the timer interrupt process (FIG. 19) is executed. In this case, first, the information stored in the reset current storage area 74h is shifted to the reset previous storage area 74i, but since the information in the reset current storage area 74h is "0", FIG. As shown in j), the reset previous storage area 74i is cleared to "0". Further, it is specified whether or not the reset button 56 is pressed in the sensor monitoring process (FIG. 20A). At the timing of t20, the reset button 56 is not pressed as shown in FIG. 21 (d). Therefore, at the timing of t20, the reset current storage area 74h is cleared to "0" as shown in FIG. 21 (i). The timer interrupt process (FIG. 19) ends at the timing of t21 as shown in FIG. 21 (g). As a result, the process executed by the main MPU 72 returns to the setting change execution process (FIG. 18).

If an affirmative determination is made in step S406, the executed flag of the main MPU 72 is cleared to "0" in step S407, and the process of step S407 is executed until step S406 is executed again. The timer interrupt process (FIG. 19) is not executed. Therefore, if an affirmative determination is made in step S406 and then step S406 is executed again, an interrupt waiting period is surely generated at that time, and timer interrupt processing (FIG. 19) is performed once during the interrupt waiting period. It is canceled by being executed.

As described above, in the setting change execution process (FIG. 18), by executing the processes of steps S402 and S406, whether or not the pressing operation of the reset button 56 is started after the setting change execution process (FIG. 18) is started. By the time the first determination process is started, the interrupt wait period, which is a period for waiting for the progress of the process until the timer interrupt process (FIG. 19) is newly executed, occurs twice. By setting these interrupt standby periods, the supply of operating power to the main MPU 72 is started when the reset button 56 is pressed, and the setting is changed when the reset button 56 is pressed. Even if the execution process (FIG. 18) is started, it is reset when the first determination process of whether or not the pressing operation of the reset button 56 is started after the setting change execution process (FIG. 18) is started is started. The contents of the information in the previous storage area 74i and the reset current storage area 74h indicate that the pressing operation of the reset button 56 is being continued. Therefore, in step S409, it is not determined that the pressing operation of the reset button 56 has been started. As a result, when the supply of operating power is started while the reset button 56 is pressed, the set value to be selected is not changed by the maintained pressing operation of the reset button 56. It becomes possible to.

Returning to the description of the setting change process (FIG. 15), after executing the setting change execution process in step S309, the setting change end command is transmitted to the effect side MPU 92 (step S310). When the effector MPU 92 receives the setting change end command, it controls the upper lamp 61, the speaker 62, and the image display device 63 so that the notification indicating that the set value is being changed is terminated. After that, the reset state information is set in the door state area 74e of the main RAM 74 (step S311).

The door state area 74e is an area referred to when the main MPU 72 specifies whether or not a change in the open / closed state of the front door 12 with respect to the housing 11 has occurred. FIG. 22 is a flowchart showing a monitoring process of the door opening sensor 16 executed in another process (step S605) of the sensor monitoring process (FIG. 20A) in the main MPU 72.

When a signal corresponding to the open state of the front door 12 is received from the door open sensor 16 (step S701: YES), whether or not the information stored in the door state area 74e is open information is determined. Determine (step S702). The open information is information indicating that a signal corresponding to the open state of the front door 12 has been received from the door open sensor 16 in the processing round immediately before the main monitoring process. When the opening information is stored in the door state area 74e (step S702: YES), the main monitoring process is terminated as it is. When the information in the door state area 74e is information other than the open information (step S702: NO), that is, when the closed information is stored in the door state area 74e, the reset state information is stored in the door state area 74e. In this case, or when the information of the door state area 74e is "0", the release command is transmitted to the effect side MPU 92 (step S703). When the effecting side MPU 92 receives the opening command, it controls the upper lamp 61, the speaker 62, and the image display device 63 so that the notification indicating that the front door 12 is in the open state is executed.

After that, the opening information is stored in the door state area 74e (step S704). As a result, even if the reception of the signal corresponding to the front door 12 being in the open state from the door opening sensor 16 is continued in the next processing round of this monitoring process, the opening information is stored in the door state area 74e. By making an affirmative determination in step S702, a new release command is not transmitted. Therefore, it is possible to prevent the opening command from being repeatedly transmitted in the situation where the front door 12 is maintained in the open state.

When a signal corresponding to the closed state of the front door 12 is received from the door opening sensor 16 (step S701: NO), it is determined whether or not the information stored in the door state area 74e is the closed information. Determine (step S705). The closing information is information indicating that a signal corresponding to the closed state of the front door 12 has been received from the door opening sensor 16 in the processing round immediately before the main monitoring processing. When the closing information is stored in the door state area 74e (step S705: YES), the main monitoring process is terminated as it is. When information other than the closing information is stored in the door state area 74e (step S705: NO), that is, when the opening information is stored in the door state area 74e, the reset state information is stored in the door state area 74e. If there is, or if the information of the door state area 74e is "0", a closing command is transmitted to the effect side MPU 92 (step S706). When the production side MPU 92 receives the closing command, the notification indicating that the front door 12 has changed from the open state to the closed state is executed after the notification indicating that the front door 12 is in the open state is terminated. Controls the upper lamp 61, the speaker 62, and the image display device 63. The notification indicating that the closed state has been reached is continued for 30 seconds unless the front door 12 is newly opened. When the front door 12 is newly opened, the notification indicating that the front door 12 is in the open state is restarted.

After that, the closing information is stored in the door state area 74e (step S707). As a result, even if the reception of the signal corresponding to the closed state of the front door 12 from the door opening sensor 16 is continued in the next processing round of this monitoring process, the closing information is stored in the door state area 74e. By making an affirmative determination in step S705, a new closing command is not transmitted. Therefore, it is possible to prevent the closing command from being repeatedly transmitted in the situation where the front door 12 is maintained in the closed state.

FIG. 23 is a flowchart showing a notification process executed by the effect side MPU 92. The notification process is repeatedly executed by the effector MPU 92 at a relatively short cycle (for example, 2 milliseconds).

When the setting change start command is received (step S801: YES), the setting change notification start process is executed (step S802). In the start processing, the upper lamp 61, the speaker 62, and the image display device 63 are controlled so that the notification during the setting change indicating that the setting value is being changed is started. In this case, the image display device 63 may be configured to display an image that allows the manager of the game hall to recognize the operation content for changing the set value. Further, after the start process is executed, until the setting change end command is received from the main MPU 72, the upper lamp 61 so that the content of the setting change notification is continued or updated in other processes in step S818. , The speaker 62 and the image display device 63 are controlled.

When the release command is received (step S803: YES), and when the setting change notification is being executed (step S804: YES), this notification is performed without executing any processing for the reception of the release command. End the process. As a result, the setting change notification can be prioritized over the door opening notification indicating that the front door 12 is in the open state. When the opening command is received (step S803: YES) and the setting changing notification is not being executed (step S804: NO), the door opening notification start process is executed (step S805). In the start process, the upper lamp 61, the speaker 62, and the image display device 63 are controlled so that the door opening notification indicating that the front door 12 is in the open state is started. Further, after the start process is executed, the upper lamp 61 and the speaker are used so that the content of the door opening notification is continued or updated in other processes in step S818 until a close command is received from the main MPU 72. It controls 62 and the image display device 63.

When the setting change end command is received (step S806: YES), the end processing of the setting change notification is executed (step S807). In the termination process, the upper lamp 61, the speaker 62, and the image display device 63 are controlled so that the notification during the setting change is terminated. Further, the clearing process of the effect side RAM 94 is executed (step S808). In the clearing process, each storage area of the effect side RAM 94 is cleared to "0" and initialized. As a result, when the set value to be used is set in the main MPU 72, it is possible to initialize not only each storage area of the main RAM 74 but also each storage area of the production side RAM 94. Become. When the effect side RAM 94 is initialized, the upper lamp 61, the speaker 62, and the image display device 63 execute the post-initialization notification.

If a close command has been received (step S809: YES) and a setting change notification is being executed (step S810: YES), this notification is performed without executing any processing for the reception of the close command. End the process. As a result, the setting change notification can be prioritized over the door closing notification indicating that the front door 12 has changed from the open state to the closed state. When the closing command is received (step S809: YES) and the setting changing notification is not being executed (step S810: NO), the end processing of the door opening notification is executed (step S811). In the termination process, the upper lamp 61, the speaker 62, and the image display device 63 are controlled so that the door opening notification indicating that the front door 12 is in the open state is terminated.

After that, the start processing of the door closing notification is executed (step S812). In the start process, the upper lamp 61, the speaker 62, and the image display device 63 are controlled so that the door closing notification indicating that the front door 12 has changed from the open state to the closed state is started. Further, after the start processing is executed, the content of the door closing notification is continued or updated in the other processing in step S818 until the door closing notification period (specifically, 30 seconds) elapses. It controls the upper lamp 61, the speaker 62, and the image display device 63. Further, the setting process of the door closing notification counter provided in the effect side RAM 94 is executed (step S813). In the setting process, information corresponding to the door closing notification period (specifically, 30 seconds) is set in the door closing notification counter.

When the value of the door closing notification counter of the effect side RAM 94 is 1 or more (step S814: YES), the value of the door closing notification counter is subtracted by 1 (step S815). Then, by determining whether or not the value of the door closing notification counter after the subtraction of 1 is "0", it is determined whether or not the door closing notification period has elapsed since the door closing notification was started ( Step S816). When the value of the door closing notification counter is "0" (step S816: YES), the end processing of the door closing notification is executed (step S817). In the termination process, the upper lamp 61, the speaker 62, and the image display device 63 are controlled so that the door closing notification indicating that the front door 12 has changed from the open state to the closed state is terminated.

Next, a state in which various notifications are executed when the supply of operating power is started and the setting change process (FIG. 15) is executed will be described with reference to the time chart of FIG. 24. FIG. 24 (a) shows the period during which the operating power is supplied to the main MPU 72, and FIG. 24 (b) shows the period during which the main process (FIG. 10) is executed by the main MPU 72. c) shows the period during which the front door 12 is in the open state, FIG. 24 (d) shows the period during which the clearing process of the storage area of the main RAM 74 is executed, and FIG. 24 (e) shows the setting change execution. FIG. 24 (f) shows the period during which the process (FIG. 18) is being executed, FIG. 24 (f) shows the period during which the notification during setting change is being executed, and FIG. 24 (g) is the reset state in the door state area 74e of the main RAM 74. The timing in which the information is set is shown, FIG. 24 (h) shows the period during which the door opening notification is executed, and FIG. 24 (i) shows the period during which the door closing notification is executed.

As shown in FIG. 24 (a), the supply of operating power to the main MPU 72 is started at the timing of t1 when the front door 12 is in the open state as shown in FIG. 24 (a), and the t1 At the timing of, the main process (FIG. 10) is started at the main MPU 72 as shown in FIG. 24 (b). Further, since the front door 12 is opened and the ON operation is performed by the setting key when the supply of the operating power is started, the setting change process (FIG. 15) is started at the timing of t2. When the setting change process (FIG. 15) is started, the clear process of the main RAM 74 is executed, but the reset button 56 is not pressed at the start of the supply of the operating power this time, and further. No information abnormality has occurred in the main RAM 74. Therefore, at the timing of t2, as shown in FIG. 24D, the clearing process for a part of the storage area of the main RAM 74 is started. In this case, since the door state area 74e is also cleared to "0" by the clearing process, neither the open information nor the closed information is stored in the door state area 74e. The state in which the execution of the timer interrupt process (FIG. 19) is prohibited has continued since the start of supply of the operating power.

After that, the clearing process is completed at the timing of t3 as shown in FIG. 24 (d). At the timing of t3, the setting change execution process (FIG. 18) is started as shown in FIG. 24 (e). Further, the process of step S308 in the setting change process (FIG. 15) is executed immediately before the setting change execution process (FIG. 18) is started, so that the setting change start command is transmitted from the main MPU 72 to the effect side MPU 92. To. Therefore, as shown in FIG. 24 (f), the setting change notification is started at the timing of t3. In the setting change execution process (FIG. 18), the execution of the timer interrupt process (FIG. 19) is permitted in step S401, and the open information is not stored in the door state area 74e. Therefore, the timer interrupt process (FIG. 19). The opening command is transmitted to the effector MPU 92 in the monitoring process of the door opening sensor 16 in 19), but the notification during the door opening is not started because the notification during the setting change has already been started.

After that, at the timing of t4, the setting change execution process (FIG. 18) ends as shown in FIG. 24 (e). In this case, the setting change end command is transmitted from the main MPU 72 to the effect side MPU 92 by executing the process of step S310 in the setting change process (FIG. 15). Therefore, as shown in FIG. 24 (e), the setting change notification is terminated at the timing of t4.

After that, the process of step S311 in the setting change process (FIG. 15) is executed at the timing of t5, so that the reset state information that is neither open information nor closed information is stored in the door state area 74e. After that, the timer interrupt process (FIG. 19) is executed, and the door open sensor 16 monitoring process (FIG. 22) is executed by the timer interrupt process (FIG. 19) at the timing of t6. In this case, as shown in FIG. 24C, since the reset state information is stored in the door state area 74e in the situation where the front door 12 is in the open state, the release command is transmitted to the effect side MPU 92. Therefore, at the timing of t6, the notification during door opening is started as shown in FIG. 24 (h). Since the opening information is set in the door state area 74e at the timing of t6, the reset state information is not stored in the door state area 74e as shown in FIG. 24 (g).

After that, at the timing of t7, the front door 12 is closed as shown in FIG. 24 (c). In this case, since the opening information is stored in the door state area 74e, the closing command is issued to the effect side MPU 92 when the monitoring process (FIG. 22) of the door opening sensor 16 is executed by the timer interrupt processing (FIG. 19). Will be sent to. Therefore, at the timing of t7, the door opening notification is terminated as shown in FIG. 24 (h), and the door closing notification is started as shown in FIG. 24 (i). The closing information is set in the door state area 74e at the timing of 7. After that, when the door closing notification period (specifically, 30 seconds) elapses at the timing of t8, the door closing notification is terminated as shown in FIG. 24 (i).

In a configuration in which the storage area of the main RAM 74 is cleared when the setting change process (FIG. 15) is executed to set the setting value to be used as described above, the setting change execution process (FIG. 18). ) Is completed, the reset state information that is neither open information nor closed information is stored in the door state area 74e. As a result, when the front door 12 is in the open state in the situation where the setting change execution process (FIG. 18) is completed, the setting change notification is terminated and the door opening notification is started. Further, when the front door 12 is in the closed state in the situation where the setting change execution process (FIG. 18) is completed, the door closing notification is started after the setting change notification is terminated. Therefore, when the setting change execution process (FIG. 18) is completed, it is possible to execute either the door opening notification or the door closing notification following the setting change notification. Therefore, it is possible to reliably notify either that the front door 12 is in the open state or that the front door 12 is in the closed state.

If the front door 12 is in the closed state at the timing when the setting change execution process (FIG. 18) is completed and the reset state information is set in the door state area 74e, the timer interrupt process (FIG. 19) is performed. In the monitoring process of the door opening sensor 16 (FIG. 22), it is specified that the front door 12 is in the closed state in the situation where the reset state information is stored in the door state area 74e, so that the closing command is issued to the production side. It is transmitted to the MPU 92. In this case, the door closing notification is executed instead of the door opening notification after the setting change notification.

Next, the normal processing executed by the main MPU 72 will be described with reference to the flowchart of FIG.

First, the start waiting process is executed (step S901). FIG. 26 is a flowchart showing the start waiting process. First, it is determined whether or not "1" is set in the bet set flag at the time of replay provided in the main RAM 74 (step S1001). The bet set flag at the time of replay specifies whether or not the same number of bets as the previous number of bets have already been set by the main MPU 72 when any of the replay prizes has been established in the previous game. It is a flag to do. If a negative determination is made in step S1001, the bet number setting counter 74a provided in the main RAM 74 (FIG. 9), provided that one of the replay winnings has been established in the previous game (step S1002: YES). (See), the value of the bet number history counter 74f also provided in the main RAM 74 is set (step S1003). The bet number setting counter 74a is a counter for specifying the bet number of the game to be executed by the main MPU 72, and the bet number history counter 74f is for specifying the bet number of the previous game by the main MPU 72. It is a counter. After that, "1" is set in the bet set flag at the time of replay (step S1004).

When a positive determination is made in step S1001, a negative determination is made in step S1002, or the process of step S1004 is executed, the bet handling process is executed (step S1005). FIG. 27 is a flowchart showing the bet handling process.

When the current game state is not the second CB state ST3 (step S1101: NO), "3" is set as the upper limit number of bets that is the upper limit number of game media that can be bet in this game (step S1102). When the current game state is the second CB state ST3 (step S1101: YES), "2" is set as the upper limit number of bets that is the upper limit number of game media that can be bet in this game (step S1103). That is, in the slot machine 10, the upper limit of bets is set to "2" when the second CB state is ST3, and the upper limit of bets is set to "3" when the second CB state is not ST3.

When the process of step S1102 or step S1103 is executed, the stored virtual medals are stored on condition that the value of the bet number setting counter 74a of the main RAM 74 is not the current bet upper limit number (step S1104: NO). It is determined whether or not one or more cards have been used and a valid betting operation has been performed (step S1105). The main RAM 74 is provided with a credit counter 74b (see FIG. 9) as an area for storing the number of virtual medals stored and stored. In step S1105, it is determined whether or not the value of the credit counter 74b is 1 or more, thereby determining whether or not the number of stored virtual medals is 1 or more. Further, when the first credit insertion button 47 is operated, it is determined that a valid bet operation has been performed, and when the second credit insertion button 48 is operated, the value of the bet number setting counter 74a is set. It is determined that a valid betting operation has been performed on condition that the value is 1 or less.

If an affirmative determination is made in step S1105, the bet setting process is executed (step S1106). In the bet setting process, when the first credit insertion button 47 is operated, if the sum of the value of the bet number setting counter 74a and the value of the credit counter 74b is equal to or greater than the bet upper limit number, the value of the bet number setting counter 74a is set. In addition to setting the maximum number of bets, the value for the number of virtual medals used in the setting is subtracted from the credit counter 74b, and the sum of the value of the number of bets setting counter 74a and the value of the credit counter 74b is less than the maximum number of bets. If so, the value of the credit counter 74b is cleared to "0" after the value of the credit counter 74b is added to the bet number setting counter 74a. Further, in the bet number setting process, when the second credit insertion button 48 is operated, if the sum of the value of the bet number setting counter 74a and the value of the credit counter 74b is 2 or more, the value of the bet number setting counter 74a. Is set to "2", the value for the number of virtual medals used in the setting is subtracted from the credit counter 74b, and the sum of the value of the bet number setting counter 74a and the value of the credit counter 74b is less than 2. If so, the value of the credit counter 74b is added to the bet number setting counter 74a, and then the value of the credit counter 74b is cleared to "0".

When a positive determination is made in step S1104, a negative determination is made in step S1105, or the process of step S1106 is executed, the inserted medal detection sensor 45a indicates that a medal has been inserted into the medal insertion slot 45. It is determined whether or not one medal has been detected (step S1107). When an affirmative determination is made in step S1107, if the value of the bet number setting counter 74a of the main RAM 74 is less than the upper limit number of bets (step S1108: NO), the value of the bet number setting counter 74a is added by 1 (step S1109). ), If the value of the bet number setting counter 74a is equal to or greater than the bet upper limit number (step S1108: YES), the value of the credit counter 74b of the main RAM 74 is added by 1 (step S1110). When the process of step S1109 or step S1110 is executed, the value of the bet number setting counter 74a is equal to or greater than the upper limit number of bets, and the value of the credit counter 74b is equal to or greater than the upper limit storage storage number (specifically, "50"). (Step S1111: YES), the acceptance prohibition process is executed (step S1112). By executing the acceptance prohibition process, even if a medal is inserted into the medal insertion slot 45, the medal is discharged to the medal tray 59 without being detected by the insertion medal detection sensor 45a.

When a negative determination is made in step S1107, a negative determination is made in step S1111, or the process of step S1112 is executed, it is determined whether or not the current gaming state is the first CB state ST2 (step S1113). ). When the current gaming state is the first CB state ST2 (step S1113: YES), the bet number setting counter 74a is provided in the main RAM 74 on condition that the value is “3” (step S1114: YES). “1” is set in the bet set flag at the time of acceptance (step S1115). On the other hand, when the current gaming state is not the first CB state ST2 (step S1113: NO), the bet has been set at the time of acceptance, provided that the value of the bet number setting counter 74a is 2 or more (step S1116: YES). Set the flag to "1" (step S1115).

The bet set flag at the time of acceptance is a flag for the main MPU 72 to specify whether or not the number of game media that can start one game is bet. When the game state is the first CB state ST2, one game cannot be started in a situation where the game medium of "3" is not bet, and the game medium of "3" is bet. It is possible to start one game. Further, when the game state is not the first CB state ST2, one game cannot be started in a situation where two or more game media are not bet, and two or more game media are bet. It is possible to start one game.

Returning to the description of the start waiting process (FIG. 26), after executing the bet handling process in step S1005, it is determined whether or not the settlement button 51 has been operated (step S1006). When the settlement button 51 is operated (step S1006: YES), after executing the settlement process (step S1007), the bet set flag at the time of receiving the main RAM 74 is cleared to "0" (step S1008). In the settlement process of step S1007, when "1" is not set in the bet set flag at the time of replay of the main RAM 74, the number of sheets corresponding to the sum of the value of the bet number setting counter 74a and the value of the credit counter 74b. The hopper device 53 is driven and controlled so that the medals of No. 1 are ejected to the medal tray 59. In this case, the bet number setting counter 74a is cleared to "0" and the credit counter 74b is cleared to "0". On the other hand, when "1" is set in the bet set flag at the time of replay of the main RAM 74, the hopper device 53 is set so that the number of medals corresponding to the value of the credit counter 74b is discharged to the medal tray 59. Drive control. In this case, the credit counter 74b is cleared to "0".

The bet number setting counter 74a is set by executing the start waiting process as described above. As described above, the slot machine 10 is provided with a bet display unit 64 on the front surface of the slot machine 10, and the bet display unit 64 displays a value corresponding to the value of the bet number setting counter 74a. The display control of the bet display unit 64 is executed by the control process of the bet display unit 64 in step S509 of the timer interrupt process (FIG. 19). FIG. 28 is a flowchart showing the control process of the bet display unit 64.

When the value of the bet number setting counter 74a is "0" (step S1201: YES), the all extinguishing process is executed (step S1202). By executing the all extinguishing process, all three light emitting units arranged side by side in the vertical direction on the bet display unit 64 are turned off.

When the value of the bet number setting counter 74a is "1" (step S1203: YES), the first lighting process is executed (step S1204). When the first lighting process is executed, the lowermost light emitting unit among the three light emitting units arranged side by side in the vertical direction on the bed display unit 64 is turned on, and the remaining light emitting units are turned off.

When the value of the bet number setting counter 74a is "2" (step S1205: YES), the second lighting process is executed (step S1206). By executing the second lighting process, the light emitting parts at the bottom and the center of the three light emitting parts arranged side by side in the vertical direction on the bed display unit 64 are turned on and the light emitting parts at the top are turned off. It becomes a state.

When the value of the bet number setting counter 74a is "3" (step S1205: NO), the third lighting process is executed (step S1207). When the third lighting process is executed, all three light emitting units arranged side by side in the vertical direction on the bet display unit 64 are turned on.

Returning to the description of the normal process (FIG. 25), after executing the start waiting process in step S901, "1" is set for either the bet set flag at the time of replay or the bet set flag at the time of acceptance in the main RAM 74. Is set or not (step S902). If a negative determination is made in step S902, the process returns to step S901. If an affirmative determination is made in step S902, it is determined whether or not the start lever 41 has been operated (step S903). If the start lever 41 is not operated, the process returns to step S901.

When the start lever 41 is operated (step S903: YES), the reception prohibition process is executed after the main line ML is activated (step S904). By executing the acceptance prohibition process, even if a medal is inserted into the medal insertion slot 45, the medal is discharged to the medal tray 59 without being detected by the insertion medal detection sensor 45a. In addition, the setting process at the start for making various settings when the game is started in step S905 is executed. In the setting process at the start, both the bet set flag at the time of replay and the bet set flag at the time of acceptance are cleared to "0".

After that, in step S906, the winning combination lottery process for drawing the winning combination in this game is executed, and in step S907, the freeze period for waiting for the start of rotation of the reels 32L, 32M, 32R in this game is set. The freeze setting process at the time of bonus transition is executed, and when the freeze period is set in step S908, the execution of the subsequent process is waited for. When the freeze period is not set or the measurement of the freeze period is completed, in step S909, each reel 32L, 32M, 32R is driven and controlled in a manner corresponding to the result of the lottery process of this combination. Execute reel control processing.

After that, the medium addition process is executed in step S910. In the medium granting process, when a small winning combination is established in this game, a process for granting a number of game media corresponding to the small winning combination to the player is executed. Specifically, when a virtual medal is given, the value corresponding to the current small winning combination is added to the credit counter 74b of the main RAM 74, and the value of the credit counter 74b reaches the upper limit storage storage number. Drives and controls the hopper device 53 so that a number of medals exceeding the upper limit storage storage number are paid out to the medal tray 59. Further, in the medium giving process, information on the number of game media to be given this time is stored in the medium giving counter provided in the main RAM 74. In the situation where the notification of the stop order of the reels 32L, 32M, 32R is not executed on the combined display unit 66, it is stored in the medium assignment counter in the port output process (step S508) in the timer interrupt process (FIG. 19). The display control of the dual-purpose display unit 66 is performed so that the value corresponding to the information is displayed. As a result, when the small winning combination is established, the player can grasp the number of game media given by the establishment of the small winning combination by checking the combined display unit 66. The information stored in the medium grant counter is cleared to "0" at the end of the pseudo-bonus state ST4 or when a new bet on the game medium is made. When the value of the medium addition counter becomes "0" in the situation where the notification of the stop order of the reels 32L, 32M, 32R is not executed, the number "0" is not displayed on the dual-purpose display unit 66. , The combined display unit 66 is turned off.

After that, the history storage process is executed in step S911 (step S911). In the history storage process, the value of the bet number setting counter 74a of the main RAM 74 is set in the bet number history counter 74f of the main RAM 74. Further, the value of the medium grant counter of the main RAM 74 is set in the grant number history counter of the main RAM 74.

After that, in step S912, a corresponding process at the end of the game is executed to enable the setting of the game state and the game section corresponding to the result of the current game. Further, in step S913, an external output setting process for outputting the state of the slot machine 10 to the management computer of the game hall is executed. After that, the reception permission process is executed in step S914. By executing the reception permission process, the medals inserted from the medal insertion slot 45 are collected by the hopper device 53 after being detected by the insertion medal detection sensor 45a.

<About the lottery process for roles>
Next, the lottery process of the winning combination executed in step S906 of the normal process (FIG. 25) will be described.

In the combination lottery process, the index value IV is drawn using the first random number acquired from the first random number circuit 75. FIG. 29 is an explanatory diagram for explaining the content of the index value IV. Seventeen index values IV of "1" to "17" are set, and winning data is set corresponding to each index value IV. In the following description, the explanatory diagram of FIG. 30 will be referred to as appropriate.

As shown in FIG. 29, the index values IV = 1 to 6 are set with the first bell winning data and any of the first to sixth supplementary winning data. When the winning is achieved with the index value IV = 1, as shown in FIG. 30, the first stop (the reel on which the stop command is first generated) is the left reel 32L, and the second stop (the second stop command is generated). When the reel) is the middle reel 32M and the third stop (the reel for which the stop command was last issued) is the right reel 32R, the first bell winning is certain regardless of the operation timing of each stop button 42 to 44. In other cases, the first supplementary prize may be established. When winning with an index value IV = 2, when the first stop is the left reel 32L, the second stop is the right reel 32R, and the third stop is the middle reel 32M, each stop button 42 to 44 The first bell prize can be surely established regardless of the operation timing of, and the fourth supplementary prize can be established in other cases. When the index value IV = 3 is won, each stop button 42 to 44 is when the first stop is the middle reel 32M, the second stop is the left reel 32L, and the third stop is the right reel 32R. The first bell prize is surely established regardless of the operation timing of, and in other cases, the third supplementary prize can be established. When winning with an index value IV = 4, when the first stop is the middle reel 32M, the second stop is the right reel 32R, and the third stop is the left reel 32L, each stop button 42 to 44 The first bell prize can be surely established regardless of the operation timing of, and the sixth supplementary prize can be established in other cases. When winning with an index value IV = 5, when the first stop is the right reel 32R, the second stop is the left reel 32L, and the third stop is the middle reel 32M, each stop button 42 to 44 The first bell prize can be surely established regardless of the operation timing of, and the second supplementary prize can be established in other cases. When winning with an index value IV = 6, when the first stop is the right reel 32R, the second stop is the middle reel 32M, and the third stop is the left reel 32L, each stop button 42 to 44 The first bell prize is surely established regardless of the operation timing of, and in other cases, the fifth supplementary prize can be established.

In this slot machine 10, as described above, in the non-CB state, reel control capable of sliding up to 4 symbols after the stop buttons 42 to 44 are operated is applied to each reel 32L, 32M, 32R. Will be done. In other words, reel control for stopping the reels 32L, 32M, 32R is performed for each reel 32L, 32M, 32R after the stop buttons 42 to 44 are operated until a predetermined time (190 milliseconds) elapses. By performing such reel control, it becomes possible to easily establish a prize corresponding to the winning combination, and it is possible to prevent the winning corresponding to the unwinning combination from being established. It becomes possible. However, since the amount of rotation of the reels 32L, 32M, 32R that can be slid is limited as described above, a combination of symbols for establishing a prize is formed in one reel 32L, 32M, 32R. If there are five or more symbols between the constituent symbols, the constituent symbols may not stop on the main line ML depending on the operation timing of the corresponding stop buttons 42 to 44 (the event is also called "missing"). Say). The 1st bell prize, the 2nd bell prize, and various replay prizes are prize modes in which the reels 32L, 32M, and 32R are stopped in the corresponding order so that they are not missed. The 1st to 9th supplementary prizes and the 1st The watermelon prize, the second watermelon prize, the cherry prize, the first CB prize, and the second CB prize are prize modes in which omission may occur depending on the stop operation timing of the stop buttons 42 to 44 with respect to the rotation positions of the reels 32L, 32M, and 32R.

As shown in FIG. 29, the index values IV = 7 to 9 are set with the second bell winning data and any of the seventh to ninth supplementary winning data. When winning with an index value IV = 7, as shown in FIG. 30, when the first stop is the left reel 32L, the types of the second stop target and the third stop target reels 32L, 32M, 32R and each of them. The second bell winning is surely established regardless of the operation timing of the stop buttons 42 to 44, and in other cases, the seventh supplementary winning can be established. When winning with an index value IV = 8, when the first stop is the middle reel 32M, the types of the reels 32L, 32M, 32R to be stopped second and the reels 32M, 32R to be stopped third, and the operations of the stop buttons 42 to 44 are performed. The second bell prize can be surely established regardless of the timing, and the ninth supplementary prize can be established in other cases. When winning with an index value IV = 9, when the first stop is the right reel 32R, the types of the reels 32L, 32M, 32R to be stopped second and the reels 32M, 32R to be stopped third, and the operations of the stop buttons 42 to 44. The second bell prize can be surely established regardless of the timing, and the eighth supplementary prize can be established in other cases.

As shown in FIG. 29, the first bell winning data is set at the index value IV = 10. When winning with an index value IV = 10, as shown in FIG. 30, the first bell winning is surely established regardless of the stop order of the reels 32L, 32M, 32R and the operation timing of each of the stop buttons 42 to 44. ..

As shown in FIG. 29, only the first watermelon winning data is set in the index value IV = 11. When the winning is achieved with the index value IV = 11, as shown in FIG. 30, the first watermelon winning can be established regardless of the stop order of the reels 32L, 32M, 32R. However, depending on the operation timing of each of the stop buttons 42 to 44, the first watermelon winning may not be established. As shown in FIG. 29, only the second watermelon winning data is set in the index value IV = 12. When the winning is achieved with the index value IV = 12, as shown in FIG. 30, the second watermelon winning can be established regardless of the stop order of the reels 32L, 32M, 32R. However, depending on the operation timing of each of the stop buttons 42 to 44, the second watermelon winning may not be established.

As shown in FIG. 29, only the cherry winning data is set in the index value IV = 13. When the winning is achieved with the index value IV = 13, as shown in FIG. 30, the cherry winning can be established regardless of the stop order of the reels 32L, 32M, 32R. However, depending on the operation timing of the left stop button 42 with respect to the rotation position of the left reel 32L, the cherry winning may not be established.

As shown in FIG. 29, only the first chance replay winning data is set in the index value IV = 14. When winning with an index value IV = 14, as shown in FIG. 30, the first chance replay winning is surely established regardless of the stop order of the reels 32L, 32M, 32R and the operation timing of each stop button 42 to 44. To do. Further, as shown in FIG. 29, only the second chance replay winning data is set in the index value IV = 15. When winning with an index value IV = 15, as shown in FIG. 30, the second chance replay winning is surely established regardless of the stop order of the reels 32L, 32M, 32R and the operation timing of each stop button 42 to 44. To do. Further, as shown in FIG. 29, only the normal replay winning data is set for the index value IV = 16. When the winning is achieved with the index value IV = 16, as shown in FIG. 30, the normal replay winning is surely established regardless of the stop order of the reels 32L, 32M, 32R and the operation timing of each of the stop buttons 42 to 44.

As shown in FIG. 29, only the CB winning data is set in the index value IV = 17. In this case, if the number of bets on the game medium is "3" and the index value IV = 17 is won, the first CB winning data is won, and the number of bets on the game medium is "2". In this case, if the index value IV = 17 is won, it means that the second CB winning data is won. That is, the first CB winning data is data that is set as a winning combination only when the number of bets on the game medium is "3". Then, the first CB prize can be established only when the number of bets on the game medium is "3". Further, the second CB winning data is data that is set as a winning combination only when the number of bets on the game medium is "2". Then, the second CB winning can be established only when the number of bets on the game medium is "2". When the first CB winning data is set and the number of bets on the game medium is "3", as shown in FIG. 30, the first CB winning can be established regardless of the stop order of the reels 32L, 32M, 32R. However, depending on the operation timing of each of the stop buttons 42 to 44, the first CB prize may not be established. When the second CB winning data is set and the number of bets on the game medium is "2", as shown in FIG. 30, the second CB winning can be established regardless of the stop order of the reels 32L, 32M, 32R. However, depending on the operation timing of each of the stop buttons 42 to 44, the second CB prize may not be established.

Here, the winning data other than the 1st CB winning data and the 2nd CB winning data are deleted in the winning game regardless of whether or not the corresponding winning is established, and the game after the winning game is displayed. Will not be carried over. On the other hand, the first CB winning data and the second CB winning data are used until the corresponding prize is established even in the next and subsequent games of the winning game, except when the main RAM 74 is cleared. It is stored in memory. In this case, in the game in which either the first CB winning data or the second CB winning data is carried over, the index value IV corresponding to the first CB winning data and the second CB winning data is excluded from the lottery target.

That is, as a result of the game being played in a situation where the number of bets is "3", the first CB winning data is set in the main RAM 74 and the first CB winning data is carried over because the first CB winning is not established. If the game is played in a situation where the number of bets is "3" after that, the index value IV corresponding to the first CB winning data is excluded from the lottery target, and then the number of bets is increased. Even if the game is played in the situation of "2", the index value IV corresponding to the second CB winning data is excluded from the lottery target. Further, as a result of the game being played in a situation where the number of bets is "2", the second CB winning data is set in the main RAM 74 and the second CB winning data is carried over because the second CB winning is not established. If the game is played in a situation where the number of bets is "3" after that, the index value IV corresponding to the first CB winning data is excluded from the lottery target, and then the number of bets is increased. Even if the game is played in the situation of "2", the index value IV corresponding to the second CB winning data is excluded from the lottery target. As a result, even though either the 1st CB winning data or the 2nd CB winning data is already stored in the memory, either the 1st CB winning data or the 2nd CB winning data is not newly stored. It becomes possible to prevent a plurality of CB winning data from being accumulated and stored.

The second CB winning data is stored in the second CB winning data area corresponding to the address "0000" in the main RAM 74, and the first CB winning data is stored in the first CB winning data area corresponding to the address "0001" in the main RAM 74. (See FIG. 16). When the setting change process (FIG. 15) is executed as described above, the clear process of the main RAM 74 is executed. In this case, if the reset button 56 is not pressed and the information abnormality of the main RAM 74 does not occur when the supply of the operating power is started, the main RAM 74 excluding the second CB winning data area While the clearing process is executed for the storage area, when the reset button 56 is pressed when the supply of operating power is started, or when an information error in the main RAM 74 has occurred. Is executed for all the storage areas of the main RAM 74 including the second CB winning data area. As a result, it is possible to select whether or not to delete the second CB winning data depending on the presence or absence of the pressing operation of the reset button 56 in the situation where the information abnormality of the main RAM 74 has not occurred. Further, when an information abnormality in the main RAM 74 has occurred, it is possible to execute the clearing process for all the storage areas of the main RAM 74 including the second CB winning data.

In the configuration in which the index value IV is set as described above, the point value PV is set for each index value IV corresponding to each gaming state. Specifically, in the case of the first CB state ST2 or the second CB state ST3, only the index value IV = 16 is set as the lottery target, and the index values IV = 1 to 15, 17 are set as the lottery target. Absent. Further, in the non-CB state in which neither the first CB winning data nor the second CB winning data is stored, all of the index values IV = 1 to 17 are set as lottery targets, and in the non-CB state. In the situation where either the 1st CB winning data or the 2nd CB winning data is stored, the index value IV = 1 to 16 is set as the lottery target, but the index value IV = 17 is set as the lottery target. Absent.

When the number of bets is "2" in the non-CB state, the index values IV = 1 to 16 are set, regardless of whether the first CB winning data or the second CB winning data is stored. The point value PV is the same. As a result, when the number of bets is "2" in the non-CB state, either the first CB winning data or the second CB winning data is stored as the winning probability of each of the index values IV = 1 to 16. It is the same in the case where both the first CB winning data and the second CB winning data are not stored. Further, when the number of bets is "3" in the non-CB state, the index values IV = 1 to 16 are set respectively regardless of whether or not either the first CB winning data or the second CB winning data is stored. The point value PV is the same. As a result, when the number of bets is "3" in the non-CB state, either the first CB winning data or the second CB winning data is stored as the winning probability of each of the index values IV = 1 to 16. It is the same in the case where both the first CB winning data and the second CB winning data are not stored.

When the number of bets is "2" in the non-CB state, the probability of winning at each of the index values IV = 1 to 16 is lower than the probability of winning when the number of bets is "3" in the non-CB state. Specifically, when the number of bets is "2" in the non-CB state, the probability of winning in each of the index values IV = 1 to 16 is the probability when the number of bets is "3" in the non-CB state. The probability is less than 2/3 of. As a result, the game executed in the situation where the number of bets is "3" is smaller than the game executed in the situation where the number of bets is "2". It is possible to increase the probability of occurrence of a replay prize in which is given.

However, in the non-CB state, when neither the first CB winning data nor the second CB winning data is stored, the probability of winning when the index value IV = 17 is about 1 / 2.2. On the other hand, in the non-CB state, when neither the first CB winning data nor the second CB winning data is stored, the probability of winning when the index value IV = 17 is about 1 / 3.3. As a result, a game in which the number of bets is "2" is executed in a situation where neither the first CB winning data nor the second CB winning data is stored in the non-CB state, and the second CB winning data is stored in the main RAM 74. The probability of being stored is mainly the first CB winning data when the game in which the number of bets is "3" is executed in a situation where neither the first CB winning data nor the second CB winning data is stored in the non-CB state. It is possible to increase the probability of being stored in the side RAM 74.

In this slot machine 10, 6 levels of setting values from "1" to "6" are prepared in advance, and by executing the setting change process (FIG. 15) already described, the setting values to be used can be set. It is possible to set. Then, in the winning combination lottery process, a lottery of the index value IV to be won is performed according to the winning probability corresponding to the set value to be used. If the set value is "n + 1" rather than "n", the winning probability is more advantageous for the player. Specifically, since the winning probability of the predetermined index value IV (that is, the predetermined combination) is higher when the set value is "n + 1" than when the set value is "n", the set value is "n + 1" rather than "n". It is more advantageous for the player. In the non-CB state, the winning probability of each index value IV changes according to the set value. However, the present invention is not limited to this, and some index values IV may have a winning probability that varies depending on the set value, while other index values IV may have a configuration in which the winning probability does not change according to the set value. The point value PV illustrated in FIG. 29 has a set value of “3”. In the CB state, as described above, only the index value IV = 16 is subject to the lottery, but the point value PV of the index value IV is the same regardless of the set value.

A specific configuration for performing the winning combination lottery process will be described. FIG. 31A is an explanatory diagram for explaining the contents of the data of the main ROM 73 for performing the lottery process of the winning combination.

In the main ROM 73, as data to be referred to when executing the lottery process of the winning combination, the winning combination lottery table group 73a for setting 1 to be referred to when the setting value of the usage target is "1", and the combination lottery table group 73a to be used. The winning combination lottery table group 73b for setting 2 referred to when the setting value is "2", and the winning combination lottery table group 73c for setting 3 referred to when the setting value to be used is "3". , The winning combination lottery table group 73d for setting 4 that is referred to when the setting value of the usage target is "4", and the winning combination lottery for setting 5 that is referred to when the setting value of the usage target is "5". The table group 73e and the winning combination lottery table group 73f for setting 6 which is referred to when the set value of the object to be used is "6" are stored in advance. In each of the winning combination lottery table groups 73a to 73f, as shown in FIG. 29, it is possible to execute the winning combination lottery process based on the relationship between the index value IV and the point value PV in each gaming state at the corresponding set values. Data is set.

FIG. 32 is an explanatory diagram for explaining the contents of the combination lottery table groups 73a to 73f. Although the combination lottery table group 73c for setting 3 is illustrated in FIG. 32, the other combination lottery table groups 73a, 73b, 73d to 73f also have different specific point value PV contents, but basic data. The configuration is the same.

Data groups 101a to 10q are set in the combination lottery table groups 73a to 73f corresponding to each of the index values IV = 1 to 17. Specifically, it is referred to when the lottery process for the combination is executed for the index value IV = 1 and the data group 101a for IV = 1 is referred to when the lottery process for the combination is executed for the index value IV = 2. When executing the combination lottery process for the IV = 2 data group 101b and the IV = 3 data group 101c and the index value IV = 4, which are referred to when executing the combination lottery process for the index value IV = 3. The IV = 4 data group 101d referred to in the above, the IV = 5 data group 101e referred to when the combination lottery process is executed for the index value IV = 5, and the combination lottery process for the index value IV = 6. About the IV = 6 data group 101f referred to when executing, the IV = 7 data group 101g referred to when executing the lottery process for the index value IV = 7, and the index value IV = 8. The IV = 8 data group 101h referred to when executing the winning combination lottery process, the IV = 9 data group 101i referred to when executing the winning combination lottery process for the index value IV = 9, and the index value. The IV = 10 data group 101j referred to when executing the winning combination lottery process for IV = 10 and the IV = 11 data group 101k referred to when executing the winning combination lottery process for the index value IV = 11. And, the data group 101l for IV = 12, which is referred to when the lottery process of the combination is executed for the index value IV = 12, and IV = 13, which is referred to when the lottery process of the combination is executed for the index value IV = 13. Referenced when executing the combination lottery process for the IV = 14 data group 101m and the index value IV = 14, which is referred to when executing the combination lottery process for the IV = 14 data group 101n and the index value IV = 15. The combination lottery process is executed for the IV = 15 data group 101o and the IV = 16 data group 101p and the index value IV = 17, which are referred to when the combination lottery process is executed for the index value IV = 16. The data group 101q for IV = 17 referred to in the case is set.

Although the details will be described later, in the lottery process of the winning combination regardless of the gaming state, each data group 101a to 101q is referred to in order from the IV = 1 data group 101a. Each of these data groups 101a to 101q includes data indicating whether or not the game is subject to lottery in each of the gaming states, data indicating the type of winning data set when the corresponding index value IV is won, and data indicating the type of winning data. Data indicating the point value PV in each game state to be drawn is set.

The contents of the data groups 101a to 101q will be described with reference to the explanatory diagram of FIG. 33. 33 (a) is an explanatory diagram for explaining the data group 101a for IV = 1, and FIG. 33 (b) is an explanatory diagram for explaining the data group 101p for IV = 16, and FIG. 33 (c) is an explanatory diagram for explaining the data group 101p for IV = 16. ) Is an explanatory diagram for explaining the data group 101q for IV = 17. The data groups 101b to 101o for IV = 2 to 15 also have the same basic data structure, although the data contents are different.

As shown in FIGS. 33 (a) to 33 (c), the game state data 102a, 103a are shown in the data groups 101a, 101p, 101q as data indicating whether or not each of the game states is a lottery target. , 104a are set. The game state data 102a, 103a, 104a has a data capacity of 1 byte. The gaming states classified in the game state data 102a, 103a, 104a include CB state (first CB state ST2 or second CB state ST3) and non-CB state CB winning data (first CB winning data or second CB winning data). ) Is not stored and the number of bets is "2" (hereinafter referred to as "two-card bet state in non-internal"), and CB winning data (first CB winning data or second CB) in a non-CB state. Winning data) is not stored and the number of bets is "3" (hereinafter referred to as "three-card bet state in non-internal"), non-CB state and CB winning data (first CB winning data or The second CB winning data) is stored and the number of bets is "2" (hereinafter referred to as the two-card betting state inside), and the non-CB state is the CB winning data (first CB winning). There are five types in which the data or the second CB winning data) is stored and the number of bets is "3" (hereinafter, referred to as a three-card bet state in the inside). Of these five types of game states, the lowest bit D0 in the game state data 102a, 103a, 104a is assigned to the CB state, and the game state data 102a, 103a, The second bit D1 from the lower rank in 104a is assigned, and the third bit D2 from the lower rank in the game state data 102a, 103a, 104a is assigned to the three-card bet state in the non-internal. The fourth bit D3 from the bottom in the game state data 102a, 103a, 104a is assigned to the two-card bet state, and the fifth bit D3 from the bottom in the game state data 102a, 103a, 104a is assigned to the three-card bet state inside. Bit D4 is assigned. The remaining bits D5 to D7 in the game state data 102a, 103a, 104a are blanks that are not assigned to any of the game states.

Regarding the data group 101a for IV = 1, as described above, the index value IV = 1 is not set as a lottery target in the CB state, and is in the non-internal 2-bet state and non-internal 3 bets. The lottery target is set in the bet state, the two bet state inside, and the three bet state inside. Therefore, as shown in FIG. 33A, in the game state data 102a, "0" is set for the lowest bit D0, and "1" is set for the second to fifth bits D1 to D4 from the lowermost. Is set. The content of this data is the same for the data groups 101b to 101o for IV = 2 to 15.

Regarding the data group 101p for IV = 16, as described above, the index value IV = 16 has a CB state, a non-internal 2-card bet state, a non-internal 3-card bet state, and an internal 2-card bet. It is set as a lottery target in all of the states and the three-card bet state inside. Therefore, as shown in FIG. 33B, in the game state data 103a, "1" is set in the lowest to fifth bits D0 to D4.

Regarding the data group 101q for IV = 17, as described above, the index value IV = 17 is set as a lottery target in the CB state, the internal 2-card bet state, and the internal 3-card bet state. However, in the non-internal 2-card bet state and the non-internal 3-card bet state, the lottery target is set. Therefore, as shown in FIG. 33 (c), in the game state data 104a, "0" is set for the lowest bit D0, the fourth bit D3 from the lower order, and the fifth bit D4 from the lower order, and the lower bits are set. "1" is set in the second bit D1 and the third bit D2 from the lower.

By setting the game state data 102a, 103a, 104a as described above, the data group 101a corresponding to the bit corresponding to the bit in which "1" is set in the game state data 102a, 103a, 104a. It is possible to specify whether or not the index value IV of 101q is a lottery target.

As shown in FIGS. 33 (a) to 33 (c), each data group 101a, 101p, 101q is a winning target as data indicating the type of winning data set when the corresponding index value IV is won. Data 102b, 103b, 104b are set. The winning target data 102b, 103b, 104b has a data capacity of 2 bytes. Regarding the data group 101a for IV = 1, as shown in FIG. 33A in detail, the first bell winning data and the first supplementary winning data are set in the winning target data 102b. Regarding the data group 101p for IV = 16, as shown in FIG. 33 (b) in detail, the normal replay winning data is set in the winning target data 103b. For the data group 101q for IV = 17, CB winning data is set in the winning target data 104b as shown in FIG. 33 (c) in detail.

Since the winning target data 102b, 103b, 104b are set as described above, as a result of performing the winning combination lottery process with reference to the data groups 101a to 101q, the index value IV of the predetermined data group 101a to 101q is set. In the case of winning, the type of winning data that has been won can be specified by referring to the predetermined data group 101a to 101q.

As shown in FIGS. 33 (a) to 33 (c), the point value data 102c, 103c, 104c are shown in the data groups 101a, 101p, 101q as data indicating the point value PV in each game state to be drawn. Is set. In the point value data 102c, 103c, 104c, the combination of the address data having a 1-byte data capacity and the point value PV having a 2-byte data capacity is "1" in the corresponding game state data 102a, 103a, 104a. Is set for the number of bits in which is set, and is set corresponding to each of the bits in which "1" is set. In this case, when there are a plurality of combinations of the address data and the point value PV in the point value data 102c, 103c, 104c, the combination corresponding to the lower bit in the corresponding game state data 102a, 103a, 104a , The addresses are set in the order of the front side in the address data.

Regarding the data group 101a for IV = 1, as described above, the index value IV = 1 is not set as a lottery target in the CB state, and is in the non-internal 2-bet state and non-internal 3 bets. The lottery target is set in the bet state, the two bet state inside, and the three bet state inside. In this case, as shown in FIG. 33A, four types of combinations of the address data and the point value PV are set in the point value data 102c. The earliest address data, A (0), corresponds to the second bit D1 from the bottom in the game state data 102a, that is, the two-card bet state in the non-internal, and is associated with the A (0). A point value PV of "900" is set. The address data A (1) in the next order corresponds to the third bit D2 from the bottom in the game state data 102a, that is, the three-card bet state in the non-internal, and is associated with the A (1). A point value PV of "3000" is set. A (2), which is the address data in the next order, corresponds to the fourth bit D3 from the bottom in the game state data 102a, that is, the two-card bet state in the inside, and is associated with the A (2). A point value PV of "900" is set. A (3), which is the address data in the next order, corresponds to the fourth bit D3 from the bottom in the game state data 102a, that is, the three-card bet state in the inside, and is associated with the A (3). A point value PV of "3000" is set.

Regarding the data group 101p for IV = 16, as described above, the index value IV = 16 has a CB state, a non-internal 2-card bet state, a non-internal 3-card bet state, and an internal 2-card bet. It is set as a lottery target in all of the states and the three-card bet state inside. In this case, as shown in FIG. 33B, five types of combinations of the address data and the point value PV are set in the point value data 103c. B (0), which is the earliest address data, corresponds to the lowest bit D0 in the game state data 103a, that is, the CB state, and the point value PV of "9000" is set in association with the B (0). Has been done. B (1), which is the address data in the next order, corresponds to the second bit D1 from the lower order in the game state data 103a, that is, the two-card bet state in the non-internal, and is associated with the B (1). A point value PV of "5500" is set. B (2), which is the address data in the next order, corresponds to the third bit D2 from the bottom in the game state data 103a, that is, the three-card bet state in the non-internal, and is associated with the B (2). A point value PV of "9000" is set. B (3), which is the address data in the next order, corresponds to the fourth bit D3 from the bottom in the game state data 103a, that is, the two-card bet state in the inside, and is associated with the B (3). A point value PV of "5500" is set. B (4), which is the address data in the next order, corresponds to the fourth bit D3 from the bottom in the game state data 103a, that is, the three-card bet state in the inside, and is associated with the B (4). A point value PV of "9000" is set.

Regarding the data group 101q for IV = 17, as described above, the index value IV = 17 is set as a lottery target in the CB state, the internal 2-card bet state, and the internal 3-card bet state. However, in the non-internal 2-card bet state and the non-internal 3-card bet state, the lottery target is set. In this case, as shown in FIG. 33 (c), two types of combinations of the address data and the point value PV are set in the point value data 104c. C (0), which is the earliest address data, corresponds to the second bit D1 from the bottom in the game state data 102a, that is, the two-card bet state in the non-internal, and is associated with the C (0). A point value PV of "30000" is set. C (1), which is the address data in the next order, corresponds to the third bit D2 from the bottom in the game state data 102a, that is, the three-card bet state in the non-internal, and is associated with the C (1). A point value PV of "20000" is set.

By setting the point value data 102c, 103c, 104c as described above, it is specified that the player is a lottery target in the current game state by referring to the game state data 102a, 103a, 104a of the data groups 101a to 101q. In this case, the point value PV corresponding to the current gaming state can be specified by referring to the point value data 102c, 103c, 104c.

As described above, the winning combination lottery process is executed using the IV = 1 to 17 data groups 101a to 101q, and various areas of the main RAM 74 are used in the winning combination lottery process. FIG. 31B is an explanatory diagram for explaining the contents of the storage area of the main RAM 74 for performing the winning combination lottery process.

As shown in FIG. 31B, the main RAM 74 is provided with a determination value counter 74j, a lottery number counter 74k, and an address counter 74l. The determination value counter 74j has any of the current gaming states of the CB state, the non-internal 2-card bet state, the non-internal 3-card bet state, the internal 2-card bet state, and the internal 3-card bet state. It is used to identify whether it is. The lottery number counter 74k is used to identify which index value IV is the lottery target of the winning combination lottery process. The address counter 74l is used to identify which of the point value data 102c, 103c, and 104c of the IV = 1 to 17 data groups 101a to 101q to be referred to is the reference target. It will be used.

Hereinafter, the processing configuration of the winning combination lottery process will be described with reference to the flowchart of FIG. 34.

First, a first random number used when determining whether or not a combination is correct is acquired (step S1301). The slot machine 10 has a configuration in which when the start lever 41 is operated, the first random number at that time is latched from the first random number circuit 75. The first random number circuit 75 generates the first random numbers of "0" to "65535", and the main MPU 72 uses the value latched in the first random number circuit 75 as the main side when the operation of the start lever 41 is confirmed. It is stored in the RAM 74. With such a configuration, it is possible to quickly acquire the first random number at the timing when the start lever 41 is operated. The first random number circuit 75 is configured to latch the value of the free run counter each time the start lever 41 is operated.

After acquiring the first random number, the set value to be used is grasped by referring to the set value storage area of the main RAM 74, and the combination lottery table groups 73a to 73f corresponding to the grasped set value are mainly used. Read from the side ROM 73 to the main RAM 74 (step S1302). In this case, if the set value to be used is "1", the winning combination lottery table group 73a for setting 1 is read, and if the setting value to be used is "2", the winning combination for setting 2 is read. The lottery table group 73b is read, and if the set value to be used is "3", the combination lottery table group 73c for setting 3 is read, and if the set value to be used is "4", the setting is set. The winning combination lottery table group 73d for setting 4 is read, and if the set value to be used is "5", the winning combination lottery table group 73e for setting 5 is read out and the setting value to be used is "6". If so, the winning combination lottery table group 73f for setting 6 is read out.

After that, the determination value acquisition process is executed (step S1303). FIG. 35 is a flowchart showing a determination value acquisition process. When the current gaming state is the CB state (first CB state ST2 or second CB state ST3) (step S1401: YES), after setting "1" in the determination value counter 74j of the main RAM 74 (step S1402), this The acquisition process ends. The determination value counter 74j is cleared to "0" when the determination value acquisition process is started. Therefore, when the process of step S1402 is executed, the value of the determination value counter 74j becomes “1”.

When the current gaming state is not the CB state (step S1401: NO), the value of the bet number setting counter 74a of the main RAM 74 is added to the determination value counter 74j (step S1403). In this case, when the value of the bet number setting counter 74a is "2", that is, when the bet number of the current game is "2", the value of the determination value counter 74j is "2", and the bet number setting counter 74a When the value of is "3", that is, when the number of bets in the current game is "3", the value of the determination value counter 74j is "3".

After that, when the CB winning data (first CB winning data or the second CB winning data) is stored in the main RAM 74 (step S1404: YES), after adding "2" to the determination value counter 74j (step S1405), This acquisition process ends. If the CB winning data (first CB winning data or second CB winning data) is not stored in the main RAM 74 (step S1404: NO), the main acquisition process is terminated as it is.

By executing the determination value acquisition process (FIG. 35) as described above, when the gaming state is the CB state, the value of the determination value counter 74j becomes "1", and the gaming state is 2 in the non-internal state. When the bet state is a three-card bet state, the value of the judgment value counter 74j is "2", and when the game state is a non-internal three-card bet state, the value of the judgment value counter 74j is "3", and the game state. The value of the determination value counter 74j is "4" when is in the internal 2-card bet state, and the value of the determination value counter 74j is "5" when the game state is in the internal 3-card bet state. It becomes. As a result, by confirming the value of the determination value counter 74j, the current gaming state is the CB state, the non-internal 2-card bet state, the non-internal 3-card bet state, the internal 2-card bet state, and the internal. It is possible to specify which of the three bets is in the state.

Returning to the description of the winning combination lottery process (FIG. 34), after executing the determination value acquisition process in step S1303, "1" is set in the lottery number counter 74k of the main RAM 74 (step S1304). As already described, the lottery number counter 74k is used to identify which index value IV is the lottery target of the winning combination lottery process. When "1" is set in the lottery number counter 74k, the index value IV that is the lottery target of the lottery process of the winning combination is "1".

After that, the PV acquisition process is executed (step S1305). FIG. 36 is a flowchart showing a PV acquisition process. First, of the IV = 1 to 17 data groups 101a to 101q in the combination lottery table groups 73a to 73f read into the main RAM 74 in step S1302 of the combination lottery process (FIG. 34), the lottery of the main RAM 74 is performed. The data group 101a to 101q corresponding to the value of the number counter 74k is read out (step S1501). In this case, if the value of the lottery number counter 74k is X (any of X = 1 to 17), the IV = X data group 101a to 101q is read out.

After that, each bit of the game state data 102a to 104a in the data group 101a to 101q read in step S1501 is shifted to the lower side (that is, the right side) by one bit (step S1502). For example, in the case of the game state data 102a of FIG. 33A, the bit data of Dm (any of m = 1 to 7) is shifted to the bit of D (m-1). Further, the data of the bit of D0, which is the lowest bit, is shifted to the carry flag 77 (see FIG. 9) provided on the main MPU 72. After that, it is determined whether or not the value of the carry flag 77 is "1" (step S1503). In the case of the game state data 102a of FIG. 33 (a), the value of the carry flag 77 is “0” when the process of step S1502 is executed once, and the game state data 103a of FIG. 33 (b). In the case of, the value of the carry flag 77 is "1" when the process of step S1502 is executed once.

If the value of the carry flag 77 is "1" (step S1503: YES), the value of the address counter 74l of the main RAM 74 is added by 1 (step S1504). As already explained, the address counter 74l indicates which of the point value data 102c, 103c, and 104c of the IV = 1 to 17 data groups 101a to 101q to be referred to is the reference target. Used to identify. The address counter 74l is cleared to "0" when the process of step S1501 is executed.

When a negative determination is made in step S1503 or the process of step S1504 is executed, the value of the determination value counter 74j of the main RAM 74 is subtracted by 1 (step S1505). As described above, the determination value counter 74j is set with a value corresponding to the current gaming state in step S1303 in the winning combination lottery process (FIG. 34). Then, it is determined whether or not the value of the determination value counter 74j after the 1 subtraction is "0" (step S1506). If the value of the determination value counter 74j is not "0" (step S1506: NO), the processes of steps S1502 to S1505 are executed again.

When the value of the determination value counter 74j is "0" (step S1506: YES), it is determined whether or not the value of the carry flag 77 of the main MPU 72 is "1" (step S1507). When the value of the carry flag 77 is "1" (step S1507: YES), of the point value data 102c to 104c in the data groups 101a to 101q read in step S1501, the current address counter 74l in the main RAM 74 The address data corresponding to the value is specified, and the point value PV corresponding to the specified address data is acquired from the point value data 102c to 104c (step S1508). The point value PV is the point value PV of the index value IV that is currently the target of the lottery. On the other hand, when the value of the carry flag is "0" (step S1507: NO), "0" is grasped as the point value PV of the index value IV currently subject to the lottery (step S1509).

As described above, in the PV acquisition process (FIG. 36), when the value of the determination value counter 74j is subtracted by 1 in step S1505 and the value of the determination value counter 74j after the subtraction becomes "0", step S1507 -The process for acquiring the point value PV in step S1509 is executed. Therefore, if the gaming state is the CB state, when the processing of steps S1502 to S1505 is executed once, the processing for acquiring the point value PV of steps S1507 to S1509 is executed, and the gaming state is non-internal. In the case of the two-card bet state, when the processes of steps S1502 to S1505 are executed twice, the process for acquiring the point value PV of steps S1507 to S1509 is executed, and the game state is 3 in the non-internal state. In the case of a bet state, when the processes of steps S1502 to S1505 are executed three times, the process for acquiring the point value PV of steps S1507 to S1509 is executed, and the game state is the two-card bet state inside. If this is the case, the process for acquiring the point value PV of steps S1507 to S1509 is executed when the processes of steps S1502 to S1505 are executed four times, and if the gaming state is a three-card bet state inside. When the processes of steps S1502 to S1505 are executed five times, the process for acquiring the point value PV of steps S1507 to S1509 is executed.

On the other hand, in step S1502, the shift processing of the game state data 102a to 104a is executed, and as a result of the shift processing, when "1" is set in the carry flag 77 of the main MPU 72, the main step S1504 is performed. The value of the address counter 74l of the side RAM 74 is added by 1. Further, in the process for acquiring the point value PV in steps S1507 to S1509, when the value of the determination value counter 74j becomes "0" in step S1506, the carry flag 77 is performed in the shift process in step S1502 immediately before. If the value set in is "1", the point value PV having a pair relationship with the address data corresponding to the address counter 74l of the main RAM 74 in the point value data 102c to 104c is acquired, and the carry flag 77 If the value is "0", the point value PV is "0".

In the CB state, when the processes of steps S1502 to S1505 are executed once as described above, the process for acquiring the point value PV of steps S1507 to S1509 is executed. Therefore, in the CB state, if the carry flag 77 in the case where the processes of steps S1502 to S1505 are executed once is "1", the point value PV corresponding to the first address data is the point value data 102c to 104c. If the carry flag 77 is "0", the point value PV becomes "0".

If the gaming state is a non-internal two-card bet state, the process for acquiring the point value PV of steps S1507 to S1509 is executed when the processes of steps S1502 to S1505 are executed twice as described above. To. Therefore, if the carry flag 77 is "1" when the processes of steps S1502 to S1505 are executed twice in the non-internal two-card bet state, the point value PV corresponding to the address data at that time is If it is acquired from the point value data 102c to 104c and the carry flag 77 is "0", the point value PV becomes "0".

If the gaming state is a non-internal three-card bet state, the process for acquiring the point value PV of steps S1507 to S1509 is executed when the processes of steps S1502 to S1505 are executed three times as described above. To. Therefore, if the carry flag 77 is "1" when the processes of steps S1502 to S1505 are executed three times in the non-internal three-card bet state, the point value PV corresponding to the address data at that time is If it is acquired from the point value data 102c to 104c and the carry flag 77 is "0", the point value PV becomes "0".

If the gaming state is a two-card bet state inside, the process for acquiring the point value PV of steps S1507 to S1509 is executed when the processes of steps S1502 to S1505 are executed four times as described above. .. Therefore, if the carry flag 77 is "1" when the processes of steps S1502 to S1505 are executed four times in the two-card bet state inside, the point value PV corresponding to the address data at that time is the point. If it is acquired from the value data 102c to 104c and the carry flag 77 is "0", the point value PV becomes "0".

If the gaming state is a three-card bet state inside, the process for acquiring the point value PV of steps S1507 to S1509 is executed when the processes of steps S1502 to S1505 are executed five times as described above. .. Therefore, if the carry flag 77 is "1" when the processes of steps S1502 to S1505 are executed five times in the state of three bets inside, the point value PV corresponding to the address data at that time is the point. If it is acquired from the value data 102c to 104c and the carry flag 77 is "0", the point value PV becomes "0".

When the value of the lottery number counter 74k of the main RAM 74 is "1" and the IV = 1 data group 101a is read in step S1501, the game state data 102a is as shown in FIG. 33 (a). The lowest bit D0 is "0", and the second to fifth bits D1 to D4 from the lowest are set to "1". Therefore, the value of the carry flag 77 becomes "0" when step S1502 in the PV acquisition process (FIG. 36) is executed once, and the carry flag 77 is executed when step S1502 is executed 2 to 5 times. The value of is "1".

That is, in the CB state, the carry flag 77 is "0" when the process for acquiring the point value PV in steps S1507 to S1509 is executed, so that the point value PV is "0". In the non-internal two-card bet state, the carry flag 77 is "1" when the process for acquiring the point value PV in steps S1507 to S1509 is executed, and further, in steps S1507 to S1509. Since the process of step S1504 is executed once before the process is executed, the value of the address counter 74l is "1". Therefore, the address data corresponding to the value of the address counter 74l becomes A (0), and the point value PV of “900” corresponding to the address data is acquired. In the non-internal three-card bet state, the carry flag 77 is "1" when the process for acquiring the point value PV in steps S1507 to S1509 is executed, and further, in steps S1507 to S1509. Since the process of step S1504 is executed twice before the process is executed, the value of the address counter 74l is "2". Therefore, the address data corresponding to the value of the address counter 74l becomes A (1), and the point value PV of “3000” corresponding to the address data is acquired. The carry flag 77 is "1" when the process for acquiring the point value PV of steps S1507 to S1509 is executed in the state of two bets inside, and the process of steps S1507 to S1509 is further performed. Is executed, the process of step S1504 has been executed three times, so that the value of the address counter 74l is “3”. Therefore, the address data corresponding to the value of the address counter 74l becomes A (2), and the point value PV of “900” corresponding to the address data is acquired. The carry flag 77 is "1" when the process for acquiring the point value PV of steps S1507 to S1509 is executed in the state of three-card betting inside, and the process of steps S1507 to S1509 is further performed. Is executed, the process of step S1504 has been executed four times, so that the value of the address counter 74l is “4”. Therefore, the address data corresponding to the value of the address counter 74l becomes A (3), and the point value PV of “3000” corresponding to the address data is acquired.

When the value of the lottery number counter 74k of the main RAM 74 is "16" and the IV = 16 data group 101p is read in step S1501, the game state data 102a is as shown in FIG. 33 (b). Is set to "1" in all of the lowest to fifth bits D0 to D4. Therefore, the carry flag 77 is "1" when the process for acquiring the point value PV of Tep S1507 to Step S1509 is executed.

That is, in the CB state, the carry flag 77 is "1" when the process for acquiring the point value PV of steps S1507 to S1509 is executed, and the processes of steps S1507 to S1509 are further executed. Since the process of step S1504 has been executed once, the value of the address counter 74l is "1". Therefore, the address data corresponding to the value of the address counter 74l becomes B (0), and the point value PV of “9000” corresponding to the address data is acquired. In the non-internal two-card bet state, the carry flag 77 is "1" when the process for acquiring the point value PV in steps S1507 to S1509 is executed, and further, in steps S1507 to S1509. Since the process of step S1504 is executed twice before the process is executed, the value of the address counter 74l is "2". Therefore, the address data corresponding to the value of the address counter 74l becomes B (1), and the point value PV of “5500” corresponding to the address data is acquired. In the non-internal three-card bet state, the carry flag 77 is "1" when the process for acquiring the point value PV in steps S1507 to S1509 is executed, and further, in steps S1507 to S1509. Since the process of step S1504 has been executed three times before the process is executed, the value of the address counter 74l is "3". Therefore, the address data corresponding to the value of the address counter 74l becomes B (2), and the point value PV of “9000” corresponding to the address data is acquired. The carry flag 77 is "1" when the process for acquiring the point value PV of steps S1507 to S1509 is executed in the state of two bets inside, and the process of steps S1507 to S1509 is further performed. Is executed, the process of step S1504 has been executed four times, so that the value of the address counter 74l is “4”. Therefore, the address data corresponding to the value of the address counter 74l becomes B (3), and the point value PV of “5500” corresponding to the address data is acquired. The carry flag 77 is "1" when the process for acquiring the point value PV of steps S1507 to S1509 is executed in the state of three-card betting inside, and the process of steps S1507 to S1509 is further performed. Is executed, the process of step S1504 has been executed five times, so that the value of the address counter 74l is “5”. Therefore, the address data corresponding to the value of the address counter 74l becomes B (4), and the point value PV of “9000” corresponding to the address data is acquired.

When the value of the lottery number counter 74k of the main RAM 74 is “17” and the IV = 17 data group 101q is read in step S1501, the game state data 102a is as shown in FIG. 33 (c). Is set to the lowest bit D0, the fourth bit D3 from the lowest, and the fifth bit D4 from the lower, and "0" is set to the second bit D1 from the lower and the third bit D2 from the lower. "1" is set. Therefore, when step S1502 in the PV acquisition process (FIG. 36) is executed once, when it is executed four times, or when it is executed five times, the value of the carry flag 77 becomes "0", and step S1502 is performed. When executed twice or executed three times, the value of the carry flag 77 becomes "1".

That is, in the CB state, the carry flag 77 is "0" when the process for acquiring the point value PV in steps S1507 to S1509 is executed, so that the point value PV is "0". In the non-internal two-card bet state, the carry flag 77 is "1" when the process for acquiring the point value PV in steps S1507 to S1509 is executed, and further, in steps S1507 to S1509. Since the process of step S1504 is executed once before the process is executed, the value of the address counter 74l is "1". Therefore, the address data corresponding to the value of the address counter 74l becomes C (0), and the point value PV of “30000” corresponding to the address data is acquired. In the non-internal three-card bet state, the carry flag 77 is "1" when the process for acquiring the point value PV in steps S1507 to S1509 is executed, and further, in steps S1507 to S1509. Since the process of step S1504 is executed twice before the process is executed, the value of the address counter 74l is "2". Therefore, the address data corresponding to the value of the address counter 74l becomes C (1), and the point value PV of “20,000” corresponding to the address data is acquired. Since the carry flag 77 is "0" when the process for acquiring the point value PV of steps S1507 to S1509 is executed in the state of two bets inside, the point value PV is set to "0". Become. If the three-card bet state inside is executed, the carry flag 77 is "0" when the process for acquiring the point value PV in steps S1507 to S1509 is executed, so the point value PV becomes "0". ..

In the configuration in which the types of index values IV in which the point value PV of 1 or more is set according to the game state can be different as described above, the numerical range of the index value IV may be different depending on each game state. An index in which a point value PV of 1 or more is set in a certain range while setting the index value IV in a certain range and making the types of winning data associated with each index value IV the same. The type of value IV is different. As a result, it is not necessary to change the numerical range of the index value IV for each game state or change the correspondence between the index value IV and the winning data for each game state, so that the data format is simplified. It becomes possible.

Data groups 101a to 101q for IV = 1 to 17 are provided in a one-to-one correspondence with each of the index values IV = 1 to 17, and each of the data groups 101a to 101q for IV = 1 to 17 is provided. Data for acquiring the point value PV (including "0") in the game state is set. As a result, it is not necessary to prepare a lottery table individually for each game state, so that the data structure can be simplified.

Judgment values corresponding to each game state are calculated, and the bits set with "1" in the game state data 102a to 104a set in each of the IV = 1 to 17 data groups 101a to 101q and their judgment values are When corresponding, the point value PV corresponding to the bit in which "1" is set is acquired from the point value data 102c to 104c of the data group 101a to 101q for IV = 1 to 17. As a result, even if the data groups 101a to 101q for IV = 1 to 17 are set so as to be common to each game state, it is possible to acquire the point value PV corresponding to each game state. It becomes.

Returning to the description of the winning combination lottery process (FIG. 34), after executing the PV acquisition process in step S1305, the lottery value DV used for determining the winning or not of the winning combination is set (step S1306). In such a lottery value setting process, a new lottery value DV is set by adding the point value PV acquired in step S1305 to the current lottery value DV. In the first lottery value setting process, the value of the first random number (any of 0 to 65535) acquired in step S1301 is set as the current lottery value DV, and the point value acquired in step S1305 is used as the value of this first random number. PV is added to obtain a new lottery value DV. When the point value PV acquired in step S1305 is "0", the lottery value DV does not change even if the process of step S1306 is executed. That is, if the point value PV is "0" in the first lottery value setting process, the first random number (any of 0 to 65535) becomes the lottery value DV as it is, and the point value PV is set in the second and subsequent lottery value setting processes. If it is "0", the lottery value DV in the previous lottery value setting process becomes the current lottery value DV as it is.

After that, the winning / failing determination of the winning combination is performed for the index value IV corresponding to the current value of the lottery number counter 74k (step S1307). In the winning / failing determination of the winning combination, it is determined whether or not the lottery value DV exceeds "65535". When "65535" is exceeded (step S1307: YES), the winning data acquisition process is executed (step S1308). FIG. 37 is a flowchart showing the acquisition process of winning data.

First, by referring to the winning target data 102b to 104b of the data group 101a to 101q corresponding to the current value in the lottery number counter 74k of the main RAM 74, the winning data corresponding to the index value IV won this time is grasped. (Step S1601). When the winning data is CB winning data (step S1602: YES), if the value of the bet number setting counter 74a of the main RAM 74 is "3" (step S1603: YES), the first CB winning data is stored in the main RAM 74. (Step S1604), and if the value of the bet number setting counter 74a is "2" (step S1603: NO), the second CB winning data is stored in the main RAM 74 (step S1605). Further, when the winning data corresponding to the index value IV won this time is not the CB winning data (step S1602: NO), the winning data grasped in step S1601 is stored in the main RAM 74 as it is (step S1606).

Returning to the explanation of the winning combination lottery process (FIG. 34), if the lottery value DV does not exceed "65535" (step S1307: NO), it means that the winning combination corresponds to the index value IV. In such a case, after adding 1 to the value of the lottery counter 74k of the main RAM 74 (step S1309), it is determined whether or not there is a role corresponding to the index value IV, that is, whether or not there is a selection target to be determined. Determine (step S1310). Specifically, it is determined whether or not the value of the lottery number counter 74k added by 1 exceeds the maximum value "17". When the value of the lottery number counter 74k is equal to or less than the maximum value (step S1310: NO), the process returns to step S1305 and the winning / losing determination of the winning combination is continued. At this time, in step S1305, the data group 101a to 101q corresponding to the value of the lottery number counter 74k after 1 addition is read out to acquire the point value PV, and in step S1306, the lottery value DV (used for determining whether or not the previous combination is successful). That is, the point value PV newly acquired in step S1305 is added to the current lottery value DV) to obtain a new lottery value DV, and in step S1307, the winning or losing of the winning combination is determined based on the lottery value DV.

When the process of step S1308 is executed, or when an affirmative determination is made in step S1310, it means that the winning / failing determination of the winning combination is completed. In this case, the first stop information setting process for setting the stop information for reel stop control is performed (step S1311). After that, in step S1312, the first control process of the game section is executed, and in step S1313, the advantageous lottery process at the start of the game is executed. The processing contents of steps S131 to S1313 will be described in detail later.

After that, the stop order notification control process is executed (step S1314). In the stop order notification control process, the index value IV = 1 to 6 on condition that the game state is the pseudo bonus state ST4 or the AT state ST5 described later and the number of bets on the game medium is "3". The stop order of the reels 32L, 32M, 32R that enables the establishment of the first bell prize when winning is notified, and the second bell winning can be established when any of the index values IV = 7 to 9 is won. The display control of the dual-purpose display unit 66 is executed so that the stop order of the reels 32L, 32M, 32R is notified, and a command is transmitted to the effect side MPU 92 so that the notification is executed by the image display device 63. To do.

After that, the game start command transmission process is executed (step S1315). In the transmission process, if any of the winning roles is won in the lottery process (Fig. 34) of this time, the information corresponding to the winning combination and the information corresponding to the current gaming state. And the information corresponding to the processing results of step S1312 and step S1313 are set in the game start command, and the game start command is transmitted to the production side MPU 92. The game start command is a command for causing the production side MPU 92 to recognize that a new game has started, and is a command for causing the production side MPU 92 to recognize various information determined by the main side MPU 72. ..

When the production side MPU 92 receives the game start command, it grasps various information in the current game from the game start command. Then, the production side MPU 92 determines the content of the production in a manner corresponding to the various information grasped. Then, a data table corresponding to the determined content of the effect is read from the effect side ROM 93 to the effect side RAM 94, and according to the read data table, the light emission control of the upper lamp 61, the sound output control of the speaker 62, and the display of the image display device 63 are performed. Take control.

Next, the reel control process executed in step S909 of the normal process (FIG. 25) will be described with reference to the flowchart of FIG. 38.

First, a rotation start process for starting the rotation of each reel 32L, 32M, 32R is performed (step S1701). In the rotation start process, it is confirmed whether or not a predetermined weight time (specifically, 4.1 seconds) has elapsed from the time when the rotation of the reels 32L, 32M, 32R was started in the previous game, and the process has elapsed. If not, wait until the weight time elapses. When the weight time has elapsed, the weight time for the next game is reset, and the rotation start information is set in the motor control storage area provided in the main RAM 74. By performing this process, the stepping motor control process in step S504 in the timer interrupt process (FIG. 19) starts the stepping motor acceleration process, and the reels 32L, 32M, and 32R start rotating. After that, it waits until each reel 32L, 32M, 32R rotates at a constant speed at a predetermined rotation speed, and ends the rotation start process. Further, the main MPU 72 can generate a stop command by lighting and displaying a lamp (not shown) of each stop button 42 to 44 when the rotation speed of each reel 32L, 32M, 32R becomes a constant speed. Notify the players and the like.

After that, it is determined whether or not any of the stop buttons 42 to 44 has been operated (step S1702). If none of the stop buttons 42 to 44 is operated, the process of step S1702 is repeatedly executed until any of the stop buttons 42 to 44 is operated. When it is determined that any of the stop buttons 42 to 44 has been operated, whether or not the rotating reels 32L, 32M, 32R and the corresponding stop buttons 42 to 44 have been operated, that is, whether or not a stop command has been generated. (Step S1703). If the stop command has not been generated, the process returns to step S1702, and the process of step S1702 is repeatedly executed until any of the stop buttons 42 to 44 is operated. When a stop command is generated, the stop command command is transmitted to the effect side MPU 92 (step S1704). The stop command command is a command for causing the effector MPU 92 to recognize which of the stop buttons 42 to 44 is operated to generate the stop command. When the stop command command is transmitted, the stop control process shown in steps S1705 to S1711 is performed in order to stop the rotating reel.

In the stop control process, the symbol number of the arrival symbol that has reached the base point position (specifically, the lower row) at the timing when the stop buttons 42 to 44 are operated is confirmed (step S1705). Specifically, the symbol number of the arrival symbol that has reached the base point position is confirmed by the number of excitation pulses output from the time when the detection signal of the reel index sensor is input. After that, based on the stop information stored in the main RAM 74, the number of slips of the reels 32L, 32M, 32R to be stopped this time is calculated (step S1706).

In this slot machine 10, as a stop mode for stopping each reel 32L, 32M, 32R, a stop mode for stopping the arrival symbol reaching the base point position as it is when the stop buttons 42 to 44 are operated corresponds to the stop mode. A stop mode in which the reels 32L, 32M, and 32R are slid for one symbol and then stopped, a stop mode in which the reels 32L, 32M, and 32R are stopped after being slid by two symbols, a stop mode in which the reels 32L, 32M, and 32R are stopped after being slid by three symbols, and four symbols. Five patterns of stopping modes are prepared, one is a stopping mode in which the machine is stopped after sliding. Therefore, in step S1706, any value of "0" to "4" is calculated as the slip number based on the stop information stored in the main RAM 74.

After that, the calculated number of slips is added to the symbol number of the reached symbol, and the symbol number of the stop symbol that is actually stopped at the base point position is determined (step S1707). Then, it is determined whether or not the symbol number of the arrival symbol of the reels 32L, 32M, 32R to be stopped this time and the symbol number of the stop symbol are equal (step S1708), and if they are equal, the reels 32L, 32M, 32R The reel stop process for stopping the rotation of the reel is performed (step S1709). After that, it is determined whether or not all the reels 32L, 32M, 32R have stopped (step S1710). If all the reels 32L, 32M, 32R are not stopped, the stop information second setting process is performed (step S1711), and the process returns to step S1702.

Here, the stop information is information for making the stop mode of each reel 32L, 32M, 32R correspond to the result of the lottery process (FIG. 34) of the winning combination, and by using the stop information. , It is possible to calculate the number of slips (specifically, "0" to "4") for the arrival symbol that has reached the base point position when each of the stop buttons 42 to 44 is stopped. As the stop information, the slide number data indicating the correspondence relationship between each symbol and the slide number is stored in advance in the main ROM 73 in correspondence with each lottery result and the stop order of each reel 32L, 32M, 32R. However, the present invention is not limited to this, and the slide number data corresponding to each lottery result and the stop order of each reel 32L, 32M, 32R may be derived while the reels 32L, 32M, 32R are rotating. ..

As the process for setting the stop information, the stop information first setting process executed in step S1311 of the winning combination lottery process (FIG. 34) and the stop information first setting process executed in step S1711 of the reel control process (FIG. 38) are executed. There is a stop information second setting process. In the stop information first setting process, stop information is set according to the result of the lottery process of the winning combination. In the stop information second setting process, the stop information stored in the main RAM 74 in the stop information first setting process or the previous stop information second setting process is changed after some reels 32L, 32M, 32R are stopped. It is a process. In the stop information second setting process, the stop information is changed based on the set winning data, the stop order of the reels 32L, 32M, 32R, and the stop result of the stopped reels 32L, 32M, 32R. ..

If it is determined in step S1710 that all reels 32L, 32M, 32R are stopped, the winning determination process is executed in step S1712. In the winning determination process, the types of symbols stopped on the main line ML on each reel 32L, 32M, 32R are grasped. Then, based on the contents of the winning data stored in the main RAM 74, the combination of the symbols stopped and displayed on the main line ML in each reel 32L, 32M, 32R becomes the winning combination in the winning combination process. It is determined whether or not the combination of symbols corresponds to each other, and if the combination of symbols corresponds to the winning combination, the winning combination process is executed as the winning combination is established. In the winning processing, if the winning is a small winning combination, information on the number of game media to be granted is set in the main RAM 74 so that the gaming media can be granted in the medium granting process. On the other hand, if the winning is a replay winning, a flag setting process is executed so that the re-game setting process is executed in the next start waiting process (FIG. 26).

After the winning determination process is executed, the winning result command is transmitted to the directing MPU 92 (step S1713). The winning result command includes data indicating whether or not the winning is successful this time, and if the winning is successful, data indicating the type of the winning is included.

Next, the corresponding processing at the end of the game executed in step S912 of the normal processing (FIG. 25) will be described with reference to the flowchart of FIG. 39. Since the process of step S912 in the normal process (FIG. 25) is executed after the reel control process (step S909), all the rotations of the reels 32L, 32M, and 32R are stopped in one game as the corresponding process at the end of the game. It will be executed after it is done.

First, CB processing for performing transition control and progress control of the first CB state ST2 and the second CB state ST3 is executed (step S1801). In the CB processing, when the first CB winning is established, "1" is set in the first CB state flag provided in the main RAM 74, and the first CB stored in the first CB winning data area of the main RAM 74 is set. Clear the winning data. Then, a first CB winning command indicating that the state has shifted to the first CB state ST2 is transmitted to the production side MPU 92. As a result, the gaming state becomes the first CB state ST2. In the first CB state ST2, as described above, the game is executed only in the situation where the game medium of "3" is bet. In the CB processing, when the second CB winning is established, "1" is set in the second CB state flag provided in the main RAM 74, and the second CB stored in the second CB winning data area of the main RAM 74 is set. Clear the winning data. Then, a second CB winning command indicating that the state has shifted to the second CB state ST3 is transmitted to the production side MPU 92. As a result, the gaming state becomes the second CB state ST3. In the second CB state ST3, as described above, the game is executed only in the situation where the game medium of "2" is bet.

In the CB processing, if the current game state is the CB state (first CB state ST2 or second CB state ST3), if the first bell winning is established in this game, it is provided in the main RAM 74. Add 1 to the value of the total grant counter. The total grant counter is a counter for specifying the total number of game media granted in the CB state by the main MPU 72, and is cleared to "0" when the CB state is started. When the value of the total grant counter after 1 addition becomes "30", which is the end reference number of the CB state, the CB state flag corresponding to the current CB state is cleared to "0". Then, a CB end command indicating that the current CB state has ended is transmitted to the effect side MPU 92.

On condition that it is not in the CB state (step S1802: NO), it jumps to the process corresponding to the current gaming state (step S1803). Specifically, when the gaming state is the normal gaming state ST1, the normal processing is executed (step S1804), and when the gaming state is the pseudo-bonus state ST4, the pseudo-bonus processing is executed (step S1805). ), When the game state is the AT state ST5, the AT process is executed (step S1806), and when the game state is the end preparation state ST6, the second control process of the game section is executed (step S1807). .. Further, the second control process (step S1807) of the game section is also executed when any of the normal process of step S1804, the pseudo-bonus process of step S1805, and the AT process of step S1806 is executed. Further, even in the CB state, the second control process (step S1807) of the game section is executed. The processing contents of steps S1804 to S1807 will be described in detail later.

When the current gaming state is the CB state, a positive determination is made in step S1802, so that the normal processing in step S1804, the pseudo-bonus processing in step S1805, and the AT processing in step S1806 are not executed. Therefore, in the case of the CB state, the process for advancing the normal game state ST1, the process for advancing the pseudo bonus state ST4, and the process for advancing the AT state ST5 are not executed. On the other hand, even if the current gaming state is the CB state, the second control process of the gaming section in step S1807 is executed. Therefore, even in the CB state, the process for advancing the second section SC2 is executed.

<About game status and game section>
Next, the game state and the game section will be described. FIG. 40 is an explanatory diagram for explaining a gaming state and a gaming section existing in the slot machine 10.

In the slot machine 10, there are a normal game state ST1, a first CB state ST2, a second CB state ST3, a pseudo bonus state ST4, an AT state ST5, and an end preparation state ST6 as game states. These gaming states ST1 to ST6 do not overlap with each other.

The normal game state ST1 is a game state in which the player stays by executing the clearing process (steps S301 to S307) of the main RAM 74. Further, when the first CB state ST2 or the second CB state ST3 generated in the normal game state ST1 ends, or when the end preparation state ST6 ends, the game state becomes the normal game state ST1. In the normal game state ST1, one game can be executed regardless of whether the number of bets on the game medium is "3" or "2".

In the normal game state ST1, the net increase expected value of the game medium in one game (“the expected number of game media granted in one game” to “the game bet in one game” regardless of whether the three-card bet or the two-card bet is used. The value obtained by subtracting the "number of media") is less than 1. Further, in the normal game state ST1, either the first CB winning data or the second CB winning data is not stored in the main RAM 74 in the non-internal state, or either the first CB winning data or the second CB winning data is the main side. There is an internal state stored in the RAM 74.

The first CB state ST2 is a gaming state that shifts when the first CB winning is established in a situation where the first CB winning data is stored in the first CB winning data area of the main RAM 74. In the first CB state ST2, one game can be executed when the number of bets on the game medium is "3", while one game is executed when the number of bets on the game medium is "2". I can't. The second CB state ST3 is a gaming state in which the second CB winning data is stored in the second CB winning data area of the main RAM 74, and the second CB winning state is established. In the second CB state ST3, one game can be executed when the number of bets on the game medium is "2", while the upper limit of bets is set to "2", so that the game medium of "3" is bet. Can not do it.

The first CB state ST2 and the second CB state ST3 are game states that do not increase the game medium owned by the player. Furthermore, both the first CB state ST2 and the second CB state ST3 are game media owned by the player at the end of the game state rather than the number of game media owned by the player at the start of the game state. It is a game state that reduces the number of.

The pseudo-bonus state ST4 is a gaming state in which the transition to the pseudo-bonus state ST4 is satisfied in the normal gaming state ST1. The pseudo-bonus state ST4 ends when the number of remaining continuous games in the pseudo-bonus state ST4 becomes "0" or when the ending condition of the second section SC2 is satisfied. If the pseudo-bonus state ST4 ends without satisfying the ending condition of the second section SC2 described later and the transition condition to the AT state ST5 is not satisfied, the process shifts to the end preparation state ST6. Further, when the pseudo bonus state ST4 ends when the ending condition of the second section SC2 described later is satisfied, the state shifts to the normal game state ST1.

In the pseudo-bonus state ST4, one game can be executed regardless of whether the number of bets on the game medium is "3" or "2". In the pseudo-bonus state ST4, a non-internal state in which neither the first CB winning data nor the second CB winning data is stored in the main RAM 74, or one of the first CB winning data and the second CB winning data is stored in the main RAM 74. There is a memorized internal state.

In the pseudo-bonus state ST4, when any of the index values IV = 1 to 6 is won, if the number of bets on the game medium is "3", the reels 32L, 32M, 32R that enable the establishment of the first bell winning. The stop order is notified. Further, in the pseudo-bonus state ST4, when any of the index values IV = 7 to 9 is won, if the number of bets on the game medium is "3", the reels 32L, 32M, which enable the establishment of the second bell winning, The stop order of 32R is notified. When the first bell prize or the second bell prize is established, the game medium of "15" is given. As a result, it is possible to increase the expected number of game media in one game in the pseudo-bonus state ST4. In the situation of pseudo-bonus state ST4, the expected net increase value of the game medium in one game is 1 or more when three bets are made, and in the situation of pseudo-bonus state ST4, when two bets are made, the expected value of the game medium in one game The expected net increase is less than 1.

The AT state ST5 is a gaming state in which the transition to the AT state ST5 is satisfied in the pseudo bonus state ST4. The AT state ST5 ends when the number of remaining continuous games in the AT state ST5 becomes "0" or when the ending condition of the second section SC2 is satisfied. When the AT state ST5 ends without satisfying the ending condition of the second section SC2 described later, the state shifts to the end preparation state ST6. Further, when the AT state ST5 ends when the ending condition of the second section SC2 described later is satisfied, the state shifts to the normal game state ST1.

In the AT state ST5, one game can be executed regardless of whether the number of bets on the game medium is "3" or "2". In the AT state ST5, a non-internal state in which neither the first CB winning data nor the second CB winning data is stored in the main RAM 74, or one of the first CB winning data and the second CB winning data is stored in the main RAM 74. There is an internal state that is being done.

In the AT state ST5, when any of the index values IV = 1 to 6 is won, if the number of bets on the game medium is "3", the reels 32L, 32M, 32R that enable the establishment of the first bell winning are stopped. The order is notified. Further, in the AT state ST5, when any of the index values IV = 7 to 9 is won, if the number of bets on the game medium is "3", the reels 32L, 32M, 32R that enable the establishment of the second bell winning. The stop order of is notified. When the first bell prize or the second bell prize is established, the game medium of "15" is given. This makes it possible to increase the expected number of game media in one game in the AT state ST5. In the situation of AT state ST5, the expected net increase of the game medium in one game is 1 or more when three bets are made, and in the situation of AT state ST5, the expected net increase of the game medium in one game is expected when two bets are made. The value is less than 1.

The end preparation state ST6 is a gaming state that shifts when the pseudo bonus state ST4 ends without satisfying the ending condition of the second section SC2 described later and without satisfying the transition condition to the AT state ST5. Further, the end preparation state ST6 is a gaming state that shifts when the AT state ST5 ends without satisfying the ending condition of the second section SC2 described later.

The end preparation state ST6 ends when one game is executed. When the end preparation state ST6 ends, it shifts to the normal game state ST1. In the end preparation state ST6, one game can be executed regardless of whether the number of bets on the game medium is "3" or "2". The end preparation state ST6 is a game state in which the expected net increase value of the game medium in one game is less than 1 regardless of whether it is a 3-card bet or a 2-card bet. Further, in the end preparation state ST6, a non-internal state in which neither the first CB winning data nor the second CB winning data is stored in the main RAM 74, or one of the first CB winning data and the second CB winning data is the main side. There is an internal state stored in the RAM 74.

In the configuration in which various game states ST1 to ST6 exist as described above, a game section is set separately from these game states ST1 to ST6. A first section SC1 and a second section SC2 are set as game sections. That is, in this slot machine 10, as factors that determine the game situation, the number of bets of the game media of "2" and "3", the set values of "1" to "6", and various game states ST1 to ST6 are used. There are game sections of the first section SC1 and the second section SC2.

The first section SC1 is a reel 32L, 32M, 32R that enables the player to establish a winning prize that is advantageous to the player when the winning combination to be established is different depending on the stop order of the reels 32L, 32M, 32R. By notifying the stop order of, the expected net increase value of the game media in one game (the value obtained by subtracting the "number of game media bet in one game" from the "expected number of game media granted in one game") is 1 or more. It is a section in which the advantageous gaming state (pseudo-bonus state ST4 and AT state ST5) that can be possible is not started, and the above-mentioned advantageous gaming state does not continue. When the clearing process (steps S301 to S307) of the main RAM 74 is executed, the normal game state ST1 is set and the first section SC1 is set. Further, when the initialization process of the second section SC2 is executed in the second section SC2, it also becomes the first section SC1. The second section SC2 is a section in which the advantageous gaming state can be started and the section in which the advantageous gaming state can be continued.

FIG. 41A is an explanatory diagram for explaining the first section SC1 and the second section SC2. When the clearing process of the main RAM 74 (steps S301 to S307) is executed as described above, the first section SC1 is set, and when the initialization process of the second section SC2 is executed, the first section SC1 is set. Become. On the other hand, the second section SC2 shifts from the first section SC1 when a transition to the second section SC2 occurs based on the winning combination lottery process (FIG. 34) in the first section SC1. In this case, if a game in which the number of bets is "3" is executed in the first section SC1, a transition to the second section SC2 may occur, while the number of bets is "2" in the first section SC1. Even if a certain game is executed, the opportunity to shift to the second section SC2 does not occur. Therefore, the player who expects the transition to the second section SC2 in the first section SC1 needs to execute the game in which the number of bets is "3" instead of executing the game in which the number of bets is "2". There is.

In the first section SC1, the expected net increase value of the game medium in one game is surely less than 1, whereas in the second section SC2, only when the expected net increase value of the game medium in one game is less than 1. It may be 1 or more. Therefore, the second section SC2 is more advantageous than the first section SC1. Therefore, the player expects to shift to the second section SC2 in the first section SC1.

The first section SC1 ends when a transition to the second section SC2 occurs, and shifts to the second section SC2. On the other hand, the second section SC2 ends when the pseudo bonus state ST4, the AT state ST5, or the end preparation state ST6 ends and shifts to the normal game state ST1. When the second section SC2 is completed, the process shifts to the first section SC1. Further, as an end condition of the second section SC2, the total number of games executed by continuing the second section SC2 without the transition to the first section SC1 occurs is the upper limit number of games (specifically, 1500 games). ), And by continuing the second section SC2 without the transition to the first section SC1, the limited total net increase of the game medium becomes the upper limit net increase (specifically, 2400). An ending condition is set that one of the conditions for reaching is satisfied. The limited total net increase in the number of game media is "the total number of game media granted by the game executed in the situation where the second section SC2 is continued (in the situation where the game medium is not granted," 0. ")" To "the total number of game media digested to execute the game in the situation where the second section SC2 is continued (" 0 "in the situation where the game is not executed)" is subtracted. In the case of a difference number of sheets, it is the number of sheets increased by the predetermined difference number of sheets from the predetermined reference value with the minimum value of the predetermined difference number of sheets as a predetermined reference value.

That is, when the second section SC2 is continued and the limited total net increase number of game media from the start of the second section SC2 reaches the upper limit net increase number, the second section SC2 ends and the second section SC2 ends. Shift to 1 section SC1. Further, when the second section SC2 is continued and the number of games executed from the start of the second section SC2 reaches the upper limit number of games, the second section SC2 ends and becomes the first section SC1. Transition. Then, when any one of these ending conditions is satisfied, the pseudo bonus state ST4 or the AT state ST5 is terminated in the game in which the ending condition is satisfied even in the middle of the pseudo bonus state ST4 or the AT state ST5. At the same time, the second section SC2 is terminated, and the game shifts to the situation where the first section SC1 is in the normal game state ST1. This makes it possible to prevent the second section SC2 from continuing excessively.

As shown in FIG. 40, the normal game state ST1, the first CB state ST2, and the second CB state ST3 may stay in any of the first section SC1 and the second section SC2. On the other hand, the pseudo-bonus state ST4, the AT state ST5, and the end preparation state ST6 do not stay in the first section SC1, but stay only in the second section SC2.

FIG. 41B is an explanatory diagram for explaining the contents of each gaming state ST1 to ST6 in the second section SC2. As described above, in the normal game state ST1, the pseudo bonus state ST4, the AT state ST5, and the end preparation state ST6, the game is executed in any of the situations where the number of bets on the game medium is "3" and "2". Is possible. The first CB state ST2 can execute the game only when the number of bets on the game medium is "3", and the second CB state ST3 plays the game only when the number of bets on the game medium is "2". It is possible to do it.

In the case of the normal gaming state ST1 in the second section SC2, regardless of whether the game in which the number of bets is "3" is executed or the game in which the number of bets is "2" is executed. The expected net increase in game media is less than one. In this case, in the normal game state ST1 in the second section SC2, as will be described later, the transition lottery process to the pseudo bonus state ST4 can be executed based on the result of the lottery process (FIG. 34) of the winning combination in each game. , The transition lottery process is executed in the game in which the number of bets is "3", but is not executed in the game in which the number of bets is "2". Further, in the normal game state ST1 in the second section SC2, as will be described later, the value of the release game number counter provided in the main RAM 74 is decremented by 1 each time one game is executed, and the release after the deduction is 1. If the value of the game number counter is "0", the transition to the pseudo-bonus state ST4 is confirmed, but the subtraction of the release game number counter is executed in the game in which the bet number is "3". On the other hand, it is not executed in the game in which the number of bets is "2". Therefore, in the normal game state ST1 in the second section SC2, it is better to execute the game having the bet number "3" than to execute the game having the bet number "2". It is advantageous for the player.

In the pseudo-bonus state ST4, when the game in which the number of bets is "3" is executed, the expected net increase value of the game medium can be 1 or more, whereas the game in which the number of bets is "2" When executed, the expected net increase in the gaming medium is less than one. Therefore, in the pseudo-bonus state ST4, it is better for the player to execute the game with the bet number "3" than to execute the game with the bet number "2". It is advantageous. In the pseudo-bonus state ST4, as will be described later, the transition lottery process to the AT state ST5 can be executed based on the result of the lottery process (FIG. 34) of the winning combination in each game. It is executed in the game of "3", but not in the game of "2". Therefore, from this point as well, in the pseudo-bonus state ST4, it is better to execute the game with the number of bets "3" than to execute the game with the number of bets "2". It is advantageous for the person.

In the AT state ST5, when the game in which the number of bets is "3" is executed, the expected net increase value of the game medium can be 1 or more, whereas the game in which the number of bets is "2" is executed. If so, the expected net increase in the gaming medium is less than one. Therefore, in the AT state ST5, it is more advantageous for the player to execute the game having the bet number "3" than to execute the game having the bet number "2". Is. In the AT state ST5, as will be described later, an additional lottery process for determining whether or not to increase the number of remaining sets in the AT state ST5 based on the result of the lottery process (FIG. 34) of the winning combination in each game. , And the transition lottery process to the additional period in which the number of remaining sets of the AT state ST5 is likely to increase can be executed, but these additional lottery processing and the transition lottery processing are executed in the game in which the number of bets is "3". On the other hand, it is not executed in the game in which the number of bets is "2". Therefore, from this point as well, in the AT state ST5, it is better to execute the game with the bet number "3" than to execute the game with the bet number "2". It is advantageous for.

As described above, even if it is advantageous to execute the game in which the number of bets is "3" in the normal game state ST1, the pseudo bonus state ST4, and the AT state ST5 in the second section SC2. , The number of game media granted in the game in which the number of bets is "2" in any of the normal game state ST1, the pseudo bonus state ST4, and the AT state ST5 in the second section SC2 is the number of the game media in the second section SC2. In addition to being added as a limited total net increase, the second section SC2 is continued for the game in which the number of bets is "2" in any of the normal game state ST1, the pseudo bonus state ST4, and the AT state ST5 in the second section SC2. It will be added as the total number of games played. That is, although the game in which the number of bets is "2" in any of the normal game state ST1, the pseudo bonus state ST4, and the AT state ST5 in the second section SC2 is disadvantageous to the player, the game is the second. It will contribute to the side that satisfies the ending condition of the section SC2. From this point as well, in the case of any of the normal game state ST1, the pseudo bonus state ST4, and the AT state ST5 in the second section SC2, it is better to execute the game in which the number of bets is "3". It is more advantageous for the player than allowing the game of number "2" to be played.

Even in the second section SC2, the first CB prize can be established and the second CB prize can be established as in the case of the first section SC1. When the first CB prize is established in the second section SC2, the first CB state ST2 is set in the second section SC2, and the second section SC2 is maintained even after the first CB state ST2 and the first CB state ST2 are completed. To. Further, when the second CB prize is established in the second section SC2, the second section SC2 becomes the second CB state ST3, and when the second section SC2 is in the second CB state ST3 and after the second CB state ST3 ends, the second section SC2 remains. Be maintained. As described above, both the first CB state ST2 and the second CB state ST3 are games owned by the player at the end of the game state rather than the number of game media owned by the player at the start of the game state. It is a gaming state in which the number of media is reduced. That is, the first CB state ST2 and the second CB state ST3 are disadvantageous gaming states for the player. On the other hand, the games executed in either the first CB state ST2 or the second CB state ST3 in the second section SC2 are added as the total number of games executed by the continuation of the second section SC2. That is, although the game executed in the first CB state ST2 and the second CB state ST3 is disadvantageous to the player, the game contributes to the side that satisfies the ending condition of the second section SC2. .. Therefore, when the first CB state ST2 or the second CB state ST3 occurs in the second section SC2, it becomes more disadvantageous for the player.

The end preparation state ST6 is the game medium regardless of whether the game in which the number of bets is "3" is executed or the game in which the number of bets is "2" is executed in the second section SC2. Although the expected net increase value is less than 1, it is a gaming state in which only one game is executed while the second section SC2 ends with the end of the pseudo-bonus state ST4 or the AT state ST5. Therefore, the game executed in the end preparation state ST6 does not contribute to the limited total net increase in the number of game media in the second section SC2, and does not contribute to the total number of games in the second section SC2. However, the present invention is not limited to this, and even if the game is executed in the end preparation state ST6, it contributes to the limited total net increase in the number of game media in the second section SC2, and further in the second section SC2. It may be configured to contribute to the total number of games.

<About CB states ST2 and ST3>
Next, the first CB state ST2 and the second CB state ST3 will be described in detail. FIG. 42 (a) shows that the first CB combination (that is, the index value IV in which the first CB winning data is stored in the main RAM 74) and the second CB combination (that is, the second CB winning data is stored in the main RAM 74). FIG. 42B is an explanatory diagram for explaining the index value IV), and FIG. 42B is an explanatory diagram for explaining the first CB state ST2 and the second CB state ST3.

As shown in FIG. 42 (a), the first CB combination can be won in a game in which the number of bets is "3", whereas it cannot be won in a game in which the number of bets is "2". In a game in which the number of bets is "3", the first CB combination is won with a probability of about 1 / 3.3. However, the winning state of the first CB combination (that is, the state in which the first CB winning data is stored in the main RAM 74), the winning state of the second CB combination (that is, the state in which the second CB winning data is stored in the main RAM 74), In the case of either the first CB state ST2 or the second CB state ST3, the first CB combination is excluded from the lottery target in the combination lottery process (FIG. 34).

The second CB combination can be won in a game in which the number of bets is "2", whereas it cannot be won in a game in which the number of bets is "3". In a game in which the number of bets is "2", there is a probability of winning the second CB combination with a probability of about 1 / 2.2. However, the winning state of the first CB combination (that is, the state in which the first CB winning data is stored in the main RAM 74), the winning state of the second CB combination (that is, the state in which the second CB winning data is stored in the main RAM 74), In the case of either the first CB state ST2 or the second CB state ST3, the second CB combination is excluded from the lottery target in the combination lottery process (FIG. 34).

In the winning state of the first CB combination, the first CB prize can be established in the game in which the number of bets is "3", while the first CB prize is not established in the game in which the number of bets is "2". Therefore, even if a game in which the number of bets is "2" is executed in the winning state of the first CB winning combination, no index value IV is won in the winning combination lottery process (FIG. 34). , The first CB prize is not established regardless of the stop order of the reels 32L, 32M, 32R and the stop operation timing of the stop buttons 42 to 44. Further, even if the index value IV, which may cause so-called omission, is won in the lottery process (FIG. 34) of the winning combination when the game in which the number of bets is "2" is executed in the winning state of the first CB winning combination, the reel The first CB prize is not established regardless of the stop order of 32L, 32M, 32R and the stop operation timing of the stop buttons 42 to 44. When the game in which the number of bets is "3" is executed in the winning state of the first CB combination and the first CB winning is established, the first CB state ST2 is set.

As shown in FIG. 42 (b), in the first CB state ST2, it is possible to execute the game in which the number of bets is "3", and in the situation where the number of bets is 2 or less, the game can be executed. It is impossible. In the first CB state ST2, the normal replay winning data is stored in the main RAM 74 with a probability of 3/10 in the winning combination process (FIG. 34) in each game, and when the normal replay winning data is stored, the left stop is performed. If the operation timing of the button 42 is a predetermined timing, the normal replay winning is established regardless of the stop order of the reels 32L, 32M, 32R. If the operation timing of the left stop button 42 is not a predetermined timing, the normal replay winning is not established even if the normal replay winning data is stored.

In the first CB state ST2, when the normal replay winning data is not stored in the main RAM 74 in the winning combination lottery process (FIG. 34), or when the normal replay winning data is stored in the main RAM 74 but the left stop button 42 If the normal replay winning cannot be established because the operation timing is not a predetermined timing, the first bell winning can be established. In this case, the first bell winning is established regardless of the stop order of the reels 32L, 32M, 32R, but the first bell winning may not be established depending on the stop operation timing of the left stop button 42.

However, the present invention is not limited to this, and when the normal replay winning data is stored in the main RAM 74 in the winning combination lottery process (FIG. 34) in the first CB state ST2, the reels 32L, 32M, 32R are stopped in order. And, the normal replay winning may be surely established regardless of the stop operation timing of each of the stop buttons 42 to 44. Further, when the normal replay winning data is not stored in the main RAM 74 in the winning combination lottery process (FIG. 34) in the first CB state ST2, the stop order of the reels 32L, 32M, 32R and the stops of the stop buttons 42 to 44 are stopped. The first bell winning may be surely established regardless of the operation timing.

When the first bell winning is established in the first CB state ST2, the game medium of "1" is given. As described above, in the first CB state ST2, the game can be executed only when the game medium of "3" is bet. On the other hand, the number of game media given in the game in the first CB state ST2 is "1". Then, the first CB state ST2 ends when the game medium of "30" is given. Therefore, in the first CB state ST2, it is necessary to generate the event that the game medium of "1" is given 30 times in the game executed by betting the game medium of "3". In this case, From the start to the end of the first CB state ST2, the game medium owned by the player is reduced by at least 60. Therefore, the first CB state ST2 becomes a disadvantageous gaming state for the player.

Further, in the first CB state ST2, as described above, the normal replay prize may be established, and both the normal replay prize and the first bell prize may not be established. Then, when the first CB state ST2 occurs in the second section SC2, the first CB state ST2, which is disadvantageous to the player, continues for 30 games or more, and the number of games is executed in the second section SC2. It will be added to the total number of games played.

In the winning state of the second CB combination, the second CB winning can be established in the game in which the number of bets is "2", while the second CB winning is not established in the game in which the number of bets is "3". Therefore, even if a game in which the number of bets is "3" is executed in the winning state of the second CB winning combination, the winning combination is not won in any index value IV in the winning combination lottery process (FIG. 34). , The second CB prize is not established regardless of the stop order of the reels 32L, 32M, 32R and the stop operation timing of the stop buttons 42 to 44. Further, even if the index value IV, which may cause so-called omission, is won in the winning combination lottery process (FIG. 34) when the game in which the number of bets is "3" is executed in the winning state of the second CB winning combination, the reel The second CB prize is not established regardless of the stop order of 32L, 32M, 32R and the stop operation timing of the stop buttons 42 to 44. When the game in which the number of bets is "2" is executed in the winning state of the second CB combination and the second CB winning is established, the second CB state ST3 is set.

As shown in FIG. 42B, in the second CB state ST3, the game can be executed in a situation where the number of bets is "2", and the maximum number of bets on the game medium is "2". In the second CB state ST3, the normal replay winning data is stored in the main RAM 74 with a probability of 3/10 in the winning combination process (FIG. 34) in each game, and when the normal replay winning data is stored, the left stop is performed. If the operation timing of the button 42 is a predetermined timing, the normal replay winning is established regardless of the stop order of the reels 32L, 32M, 32R. If the operation timing of the left stop button 42 is not a predetermined timing, the normal replay winning is not established even if the normal replay winning data is stored.

In the second CB state ST3, when the normal replay winning data is not stored in the main RAM 74 in the winning combination lottery process (FIG. 34), or when the normal replay winning data is stored in the main RAM 74 but the left stop button 42 If the normal replay winning cannot be established because the operation timing is not a predetermined timing, the first bell winning can be established. In this case, the first bell winning is established regardless of the stop order of the reels 32L, 32M, 32R, but the first bell winning may not be established depending on the stop operation timing of the left stop button 42.

However, the present invention is not limited to this, and when the normal replay winning data is stored in the main RAM 74 in the winning combination lottery process (FIG. 34) in the second CB state ST3, the reels 32L, 32M, 32R are stopped in order. And, the normal replay winning may be surely established regardless of the stop operation timing of each of the stop buttons 42 to 44. Further, when the normal replay winning data is not stored in the main RAM 74 in the winning combination lottery process (FIG. 34) in the second CB state ST3, the stop order of the reels 32L, 32M, 32R and the stops of the stop buttons 42 to 44 are stopped. The configuration may be such that the first bell winning is surely established regardless of the operation timing.

If the first bell prize is established in the second CB state ST3, the game medium of "1" is given. As described above, in the second CB state ST3, the game can be executed only when the game medium of "2" is bet. On the other hand, the number of game media given in the game in the second CB state ST3 is "1". Then, the second CB state ST3 ends when the game medium of "30" is given. Therefore, in the second CB state ST3, it is necessary to generate the event that the game medium of "1" is given 30 times in the game executed by betting the game medium of "2". In this case, From the start to the end of the second CB state ST3, the game medium owned by the player is reduced by at least 30. Therefore, the second CB state ST3 is a disadvantageous gaming state for the player. However, this disadvantage of the second CB state ST3 is lower than that of the first CB state ST2.

Further, in the second CB state ST3, as described above, the normal replay prize may be established, and both the normal replay prize and the first bell prize may not be established. Then, when the second CB state ST3 occurs in the second section SC2, the second CB state ST3, which is disadvantageous to the player, continues for 30 games or more, and the number of games is executed in the second section SC2. It will be added to the total number of games played.

In the configuration in which the first CB state ST2 and the second CB state ST3 are set as the game states that are disadvantageous to the player as described above, the winning state of the second CB combination is obtained by executing the game in which the number of bets is "2". By executing the game in which the number of bets is "3" after preventing the second CB winning from being established, the reels 32L, 32M, and 32R are stopped as a result of the lottery process (FIG. 34) of the winning combination in each game. Regardless of the order and the stop operation timing of each of the stop buttons 42 to 44, it is possible to play the game while preventing the transition to the first CB state ST2 and the second CB state ST3. That is, when the game in which the number of bets is "2" is executed and the second CB combination is won, the game in which the number of bets is "3" is executed thereafter to obtain the second CB combination. The second CB prize is not established even in the winning state of. Further, in the winning state of the second CB combination, even if the game in which the number of bets is "3" is executed, the first CB combination is excluded from the lottery target in the combination lottery process (FIG. 34), so that the first CB combination Will not be in the winning state. Then, the first CB prize is not established because the first CB combination is not won, and the gaming state does not shift to the first CB state ST2. As a result, it is possible to execute the game in which the number of bets is "3" while preventing the transition to the first CB state ST2 and the second CB state ST3 from occurring. Then, by executing the game in which the number of bets is "3", the transition to the second section SC2 may occur and the transition to the pseudo bonus state ST4 may occur as described above.

As shown in FIG. 42 (a), in a game in which the number of bets is "2", the probability of winning the second CB combination is about 1 / 2.2, whereas in the game in which the number of bets is "3". The probability of winning the first CB combination is about 1 / 3.3. That is, the probability of winning the second CB combination is set higher than the probability of winning the first CB combination. As a result, when a game in which the number of bets is "2" is executed in a game hall or the like to win the second CB combination, the number of games required to reach the winning state of the second CB combination is reduced. Is possible. On the other hand, even if the game in which the number of bets is "3" is executed before the second CB combination is mistakenly won, the probability of winning the first CB combination is higher than the probability of winning the second CB combination. If it is low, it becomes difficult to win the first CB role.

The probability of winning the 2nd CB combination is not limited to a higher probability than the probability of winning the 1st CB combination, and the probability of winning the 1st CB combination is higher than the probability of winning the 2nd CB combination. The configuration may be high, and the probability of winning the first CB combination and the probability of winning the second CB combination may be the same or substantially the same.

<About the second section SC2>
Next, the second section SC2 will be described. First, the first control process of the game section executed by the main MPU 72 will be described with reference to the flowchart of FIG. 43. The first control process of the game section is executed in step S1312 after the winning / failing determination of the winning combination is completed in the winning combination lottery processing (FIG. 34) and before the advantageous lottery processing (step S1313) at the start of the game. ..

First, it is determined whether or not "1" is set in the second section flag of the main RAM 74 (step S1901). The second section flag is a flag for the main MPU 72 to specify whether or not the game section is the second section SC2, and when "1" is set in the second section flag, the second section SC2 The case where the value of the second section flag is "0" is the first section SC1. If "1" is set in the second section flag (step S1901: YES), the processing after step S1902 is not executed. As a result, in the case of the second section SC2, the lottery process for the number of released games in step S1906 is not executed.

When "1" is not set in the second section flag (step S1901: NO), it is determined whether or not the current gaming state is the first CB state ST2 or the second CB state ST3 (step S1902). When the current gaming state is the first CB state ST2 or the second CB state ST3 (step S1902: YES), the processes after step S1903 are not executed. As a result, even if it is the first section SC1, if it is the first CB state ST2 or the second CB state ST3, the process for setting the second section SC2 in step S1905 and the lottery process for the number of released games in step S1906. Will not be executed.

When the current gaming state is neither the first CB state ST2 nor the second CB state ST3 (step S1902: NO), it is determined whether or not the value of the bet number setting counter 74a of the main RAM 74 is "3". Then, it is determined whether or not the number of bets in this game is "3" (step S1903). If the number of bets in this game is "2" (step S1903: NO), the processes after step S1904 are not executed. As a result, in the game in which the number of bets is "2" even in the first section SC1, the process for setting the second section SC2 in step S1905 and the lottery process for the number of released games in step S1906 are not executed. It will be.

When the number of bets in the current game is "3" (step S1903: YES), it is determined whether or not any index value IV has been won in the lottery process (FIG. 34) of the current combination (step S1904). ). If the lottery process (FIG. 34) for this combination is out of order (step S1904: NO), the processes after step S1905 are not executed. As a result, even if it is the first section SC1, if the winning combination is lost in the lottery process (FIG. 34), the process for setting the second section SC2 in step S1905 and the number of games to be released in step S1906. The lottery process will not be executed.

When any index value IV is won in the lottery process (FIG. 34) of this combination (step S1904: YES), "1" is set in the second section flag of the main RAM 74, and the main RAM 74 Clear each of the continuous game number counter 74c (see FIG. 9) and the total acquisition number counter 74d (see FIG. 9) provided in the above (step S1905). When "1" is set in the second section flag, it becomes the second section SC2.

The continuous game number counter 74c is used by the main MPU 72 to specify the number of times the game has been executed since the start of the second section SC2 when the second section SC2 is continued without sandwiching the first section SC1. It is a counter of. When the value of the continuous game number counter 74c reaches the value corresponding to the upper limit number of games (specifically, 1500 games) in the second section SC2, even if it is in the middle of the pseudo bonus state ST4 or the AT state ST5, The second section SC2 is terminated in the reached game, and the situation shifts to the situation in which the first section SC1 is in the normal game state ST1.

The total acquisition number counter 74d sets the limited total net increase number of game media from the start of the second section SC2 to the main MPU 72 when the second section SC2 is continued without sandwiching the first section SC1. It is a counter for identifying. As already explained, the limited total net increase in the number of game media is the total number of game media granted by the game executed in the situation where the second section SC2 is continued (the grant of game media occurs). The total number of game media digested to execute the game in the situation where the second section SC2 is continued from "0" in the situation where the game is not executed (" 0" in the situation where the game is not executed). When the value obtained by subtracting "" is used as the predetermined difference number of sheets, the number of sheets increased by the predetermined difference number of sheets from the predetermined reference value with the minimum value of the predetermined difference number of sheets as the predetermined reference value. When the value of the total acquired number counter 74d reaches the value corresponding to the upper limit net increase number (specifically, 2400 sheets) in the second section SC2, even if it is in the middle of the pseudo bonus state ST4 or the AT state ST5, The second section SC2 is terminated in the reached game, and the situation shifts to the situation in which the first section SC1 is in the normal gaming state ST1.

After that, the lottery process for the number of released games is executed (step S1906). The number of released games is a counter for the main MPU 72 to specify the number of games required until the transition to the pseudo-bonus state ST4 occurs when the transition to the pseudo-bonus state ST4 is not won. In the lottery process for the number of released games, first, the lottery table for the number of released games stored in advance in the main ROM 73 is read, and numerical information is acquired from the lottery counter that is periodically updated in the main RAM 74. Then, the number of released games is selected by collating the numerical information acquired from the lottery counter with the lottery table for the number of released games. In this case, any one of 50 games, 100 games, 200 games, 300 games, 400 games, 500 games, 600 games, 700 games and 800 games is selected as the number of released games. Moreover, the selection probability of each of these release games is the same. However, the present invention is not limited to this, and the probability that the number of released games with a large number of games is selected may be set high, and the probability that the number of released games with a small number of games is selected is set high. It may be configured as such. After executing the lottery process for the number of released games, the number of released games selected in the lottery process for the number of released games is set in the number of released games counter provided in the main RAM 74 (step S1907). The release game number counter is a counter for specifying the remaining number of release games on the main MPU 72.

After that, the lighting lottery process of the section display unit 67 is executed (step S1908). In the lighting lottery process of the section display unit 67, the lighting lottery table provided in the main ROM 73 and the lottery counter that is periodically updated in the main RAM 74 are used to set the second section SC2 from the beginning. It is determined by lottery whether the section display unit 67 is lit (that is, immediately lit) or the section display unit 67 is lit (that is, waiting for lighting) at the time of the subsequent transition to the pseudo-bonus state ST4. In the role lottery process (Fig. 34) in this game, if any of the index values IV = 1 to 10 is won, immediate lighting is selected with a 50% probability and lighting standby is performed with a 50% probability. Is selected, and when the index value IV = 11 is won, immediate lighting is selected with a probability of 65%, lighting standby is selected with a probability of 35%, and when the index value IV = 12 is won. Has a 62% probability of selecting immediate lighting and a 38% probability of selecting lighting standby, and if the index value IV = 13 is won, an 80% probability of immediate lighting is selected and a 20% probability of 20%. When lighting standby is selected and the index value IV = 14 is won, immediate lighting is selected with a probability of 75%, lighting standby is selected with a probability of 25%, and the index value IV = 15 is won. In the case, immediate lighting is selected with a probability of 70%, lighting standby is selected with a probability of 30%, and if the index value IV = 16 is won, immediate lighting is selected with a probability of 40% and 60%. Lighting standby is selected with a probability, and when the index value IV = 17 is won, immediate lighting is selected with a probability of 30% and lighting standby is selected with a probability of 70%. In this case, the index value IV, which has a lower probability of winning in the winning combination lottery process (FIG. 34), has a higher probability of selecting immediate lighting.

When immediate lighting is selected in the lighting lottery process (step S1908) of the section display unit 67 (step S1909: YES), the lighting process of the section display unit 67 is executed (step S1910). In the lighting process of the section display unit 67, the section display unit 67 is switched from the off state to the lit state. As a result, the notification of the second section SC2 is started by the section display unit 67.

On the other hand, when lighting standby is selected in the lighting lottery process (step S1908) of the section display unit 67 (step S1909: NO), "1" is set in the lighting standby flag provided in the main RAM 74 (step S1909: NO). Step S1911). The lighting standby flag is a flag for the main MPU 72 to specify in the second section SC2 that the section display unit 67 is waiting to be switched from the off state to the lighting state.

Next, the second control process of the game section executed by the main MPU 72 will be described with reference to the flowchart of FIG. The second control process of the game section is executed in step S1807 in the corresponding process (FIG. 39) at the end of the game. As described above, since the corresponding processing at the end of the game is executed after all the rotations of the reels 32L, 32M, 32R in one game are stopped, the second control processing of the game section is also the rotation of the reels 32L, 32M, 32R in one game. Is executed after all are stopped.

When "1" is set in the second section flag of the main RAM 74 and the current game section is the second section SC2 (step S2001: YES), the current state of the flag of the main RAM 74 is confirmed. It is determined whether or not the game state is the end preparation state ST6 (step S2002). The end preparation state ST6 is a case where the pseudo bonus state ST4 or the AT state ST5 ends without satisfying the ending condition of the second section SC2, which will be described later, and the second section SC2 at the time of the subsequent transition to the normal game state ST1. It is a game state that shifts when is finished.

When the end preparation state is ST6 (step S2002: YES), it is determined whether or not "1" is set in the end preparation completion flag provided in the main RAM 74 (step S2003). The end preparation completion flag is a flag for the main MPU 72 to specify whether or not one game has been executed in the end preparation state ST6. In the pseudo-bonus processing (step S1805) in the corresponding processing at the end of the game (FIG. 39), it is specified that the remaining number of continuous games in the pseudo-bonus state ST4 is 0 games and then shifts to the normal game state ST1. If this is the case, the flag for setting the end preparation state ST6 is set and the end preparation completion flag is cleared to "0". Further, in the AT process (step S1806) in the corresponding process at the end of the game (FIG. 39), one set is completed in the situation where the remaining number of sets of the AT state ST5 is 0, and the process shifts to the normal game state ST1. When it is specified, the flag for setting the end preparation state ST6 is set and the end preparation completion flag is cleared to "0".

If "1" is not set in the end preparation completion flag (step S2003: NO), after setting "1" in the end preparation completion flag (step S2004), the processes after step S2005 are executed. When "1" is set in the end preparation completion flag (step S2003: YES), it means that one game has been executed in the end preparation state ST6. In this case, the process for terminating the second section SC2 is executed.

Specifically, first, the initialization process of the second section SC2 is executed (step S2014). In the initialization process of the second section SC2, the second section flag of the main RAM 74 is cleared to "0". As a result, the game section becomes the first section SC1. Further, in the initialization process of the second section SC2, even if the player stays in the AT state ST5, it is shown that the AT state ST5 includes a counter for storing the remaining number of continuous games in the AT state ST5. By clearing various data (including the AT state flag), the game state is shifted to the normal game state ST1. Although the second section SC2 is terminated by executing the initialization process of the second section SC2 even in the middle of the first CB state ST2 and the second CB state ST3, the first CB state ST2 and the second CB state ST3 Continues as it is without being terminated.

After that, when the section display unit 67 is in the lit state, the section display unit 67 is switched from the lit state to the extinguished state (step S2015). As a result, the notification that the section display unit 67 is the second section SC2 is completed. After that, a second section initialization command indicating that the second section SC2 has been initialized is transmitted to the effect side MPU 92 (step S2016). As a result, the effect side MPU 92 makes the effect corresponding to the end of the second section SC2 executed.

When the end preparation state is not ST6 (step S2002: NO), or when the process of step S2004 is executed, the value of the continuous game number counter 74c of the main RAM 74 is added by 1 (step S2005). As already explained, the continuous game number counter 74c sets the number of game executions from the start of the second section SC2 to the main MPU 72 when the second section SC2 is continued without sandwiching the first section SC1. It is a counter for identifying.

After that, it is determined whether or not the value of the continuous game number counter 74c after 1 addition is 1500 or more, which is the upper limit number of games (step S2006). When the value of the continuous game number counter 74c is 1500 or more, it means that the ending condition of the second section SC2 is satisfied. In this case, an affirmative determination is made in step S2006, and a process for terminating the second section SC2 in steps S2014 to S2016 is executed. The processing contents of steps S2014 to S2016 are as described above. As a result, the second section SC2 ends and becomes the first section SC1, and when the AT state ST5 is in the middle, the AT state ST5 is forcibly ended and becomes the normal game state ST1.

When the value of the continuous game number counter 74c is less than 1500 (step S2006: NO), whether the replay prize of the first chance replay prize, the second chance replay prize, or the normal replay prize is established in this game. Whether or not it is determined (step S2007). In this case, regardless of whether the number of bets in this game is "2" or "3", it is subject to the determination in step S2007, and this game is in the normal game state ST1, the first CB state ST2, and the second CB. Regardless of which of the game states ST3, pseudo-bonus state ST4, and AT state ST5, the game is subject to the determination in step S2007.

When none of the replay winnings is established (step S2007: NO), the number of bets of the current game is subtracted from the total number of acquisition counters 74d of the main RAM 74 (step S2008). In this case, the number of bets in the current game is grasped from the value of the bet number history counter 74f instead of the value of the bet number setting counter 74a. As described above, in the normal processing (FIG. 25), the timing after the rotation of all the reels 32L, 32M, 32R is completed in one game is higher than the timing at which the corresponding processing (step S912) at the end of the game is started. At the previous timing, the value of the bet number setting counter 74a is set in the bet number history counter 74f. Therefore, the bet number of the current game number is set in the bet number history counter 74f at the timing when the second control process (FIG. 44) of the game section is started. Further, even if the replay winning is established in the previous game and the current game is a game corresponding to the replay due to the establishment of the replay winning, the number of bets in this game (that is, the bet number history counter 74f) Value) is subtracted from the total number of acquisitions counter 74d.

As already explained, the total acquisition number counter 74d determines the total net increase in the number of game media with restrictions from the start of the second section SC2 when the second section SC2 is continued without sandwiching the first section SC1. It is a counter for specifying by the main MPU 72. As already explained, the limited total net increase in the number of game media is the total number of game media granted by the game executed in the situation where the second section SC2 is continued (the grant of game media occurs). The total number of game media digested to execute the game in the situation where the second section SC2 is continued from "0" in the situation where the game is not executed (" 0" in the situation where the game is not executed). When the value obtained by subtracting "" is used as the predetermined difference number of sheets, the number of sheets increased by the predetermined difference number of sheets from the predetermined reference value with the minimum value of the predetermined difference number of sheets as the predetermined reference value.

After that, one of the small winning combination prizes (1st to 9th supplementary prizes, 1st bell prize, 2nd bell prize, 1st watermelon prize, 2nd watermelon prize and cherry prize) in which the game medium is given in this game ) Is determined (step S2009). In this case, regardless of whether the number of bets in this game is "2" or "3", it is subject to the determination in step S2009, and this game is in the normal game state ST1, the first CB state ST2, and the second CB. Regardless of which of the game states ST3, pseudo-bonus state ST4, and AT state ST5, the game is subject to the determination in step S2009.

If an affirmative determination is made in step S2009, the number of game media given in this game is added to the total acquisition number counter 74d of the main RAM 74 (step S2010). In this case, the number of game media granted in this game is grasped from the value of the grant number history counter instead of the value of the medium grant counter. As described above, in the normal process (FIG. 25), the corresponding process at the end of the game is the timing after the rotation of all the reels 32L, 32M, 32R is completed and the medium addition process (step S910) is completed in one game. The value of the medium grant counter is set in the grant number history counter at a timing prior to the timing at which (step S912) is started. Therefore, at the timing when the second control process (FIG. 44) of the game section is started, the number of game media given in this game is set in the grant number history counter.

When a negative determination is made in step S2009, or when the process of step S2010 is executed, it is determined whether or not the value of the total acquisition number counter 74d of the main RAM 74 is 0 or more (step S2011). When the value of the total acquisition number counter 74d is less than 0 (step S2011: NO), the total acquisition number counter 74d is cleared to "0" (step S2012).

As described above, since the bet number of the current game number is subtracted from the total acquisition number counter 74d in step S2008, for example, any small winning combination is established in the game in the normal game state ST1 immediately after the transition to the second section SC2. If not, the value of the total acquisition number counter 74d will be less than 0. In this case, by making a negative determination in step S2011, the total acquisition number counter 74d is cleared to "0" in step S2012. As a result, from "the total number of game media granted by the game executed in the situation where the second section SC2 is continued (" 0 "in the situation where the game medium is not granted)" to "the second section". When the value obtained by subtracting the total number of game media digested to execute the game in the situation where SC2 is continued (“0” in the situation where the game is not executed) ”is set as the predetermined difference number. With the minimum value of the predetermined difference number as the predetermined reference value, the limited total net increase number of game media, which is the number of the increase of the predetermined difference number from the predetermined reference value, is measured by using the total acquisition number counter 74d. It becomes possible.

When the affirmative judgment is made in step S2007, when the affirmative judgment is made in step S2011, or when the process of step S2012 is executed, whether the value of the total acquisition number counter 74d exceeds the upper limit net increase number "2400". Whether or not it is determined (step S2013). When the value of the total acquisition number counter 74d exceeds "2400", it means that the ending condition of the second section SC2 is satisfied. In this case, an affirmative determination is made in step S2013, and a process for terminating the second section SC2 in steps S2014 to S2016 is executed. The processing contents of steps S2014 to S2016 are as described above. As a result, the second section SC2 ends and becomes the first section SC1, and when the AT state ST5 is in the middle, the AT state ST5 is forcibly ended and becomes the normal game state ST1.

Here, if any of the replay prizes is established, the process of steps S2008 to S2012 is not executed by making an affirmative determination in step S2007. In a game in which a replay prize is established, the game medium owned by the player is used when setting a bet at the start of the game, but the profit from the establishment of the replay prize is the same as the number of bets in the game in which the replay prize is established. It is possible to replay a new game based on the number of bets. That is, the number of game media owned by the player does not change in the game in which the replay prize is established. In this case, by not executing the processes of steps S2008 to S2012 in the game in which the replay prize is established, the value of the total acquisition number counter 74d in the game in which the number of game media owned by the player does not change. It is possible to omit the execution of the process for changing the above, and it is possible to omit the unnecessary execution of the process.

On the other hand, even in the game in which the replay winning is established, in step S2013, it is determined whether or not the value of the total acquisition number counter 74d exceeds the upper limit net increase number "2400". As a result, in the game before the game in which the replay prize was established, the value of the total acquisition number counter 74d has already exceeded the upper limit net increase of "2400", but the second cause is noise or the like. Even if the initialization process of the section SC2 is not executed, it is specified that the value of the total acquisition number counter 74d exceeds the upper limit net increase number "2400" in the game in which the subsequent replay winning is established. This makes it possible to execute the initialization process of the second section SC2.

If a negative determination is made in step S2013, the ending correspondence process is executed (step S2017). FIG. 45 is a flowchart showing the ending correspondence process.

First, it is determined whether or not "1" is set in the first ending flag provided in the main RAM 74 (step S2101). The first ending flag is a flag for the main MPU 72 to specify that the number of game executions in the second section SC2, which is measured using the continuous game number counter 74c, is likely to reach the upper limit number of games. Is.

When "1" is not set in the first ending flag (step S2101: NO), the value of the continuous game number counter 74c of the main RAM 74, the value of the AT continuation counter provided in the main RAM 74, and the main side Whether or not the sum of the value of the set count counter provided in the RAM 74 and the value of the number of initial continuous games (50 games) in one set of the AT state ST5 is equal to or greater than the upper limit number of games in the second section SC2. Is determined (step S2102). The AT continuation counter is a counter for specifying the number of remaining continuous games in one set in the AT state ST5 by the main MPU 72. The initial number of continuous games in one set of the AT state ST5 is 50 games, and the number of remaining continuous games can be increased by satisfying the addition condition in the middle of the one set. The set count counter is a counter for specifying the remaining number of sets in the AT state ST5 by the main MPU 72. The maximum number of games in the second section SC2 is set to 1500 games as already described. The maximum number of games in the second section SC2 is not limited to 1500 games, and may be less than 1500 games or more than 1500 games.

If an affirmative determination is made in step S2102, "1" is set in the first ending flag (step S2103). When "1" is set in the first ending flag, the number of continuous games remaining and the number of remaining sets will not be added in the AT state ST5, which will be described in detail later. As a result, in a situation where the ending condition of the second section SC2 is satisfied, it is possible to prevent further addition of the remaining number of continuous games and the remaining number of sets in the AT state ST5. Become.

After that, the first ending command is transmitted to the production side MPU 92 (step S2104). The first ending command contains information on the number of games required until the ending condition of the second section SC2 is satisfied, that is, information corresponding to the difference in the value of the continuous game number counter 74c with respect to the upper limit number of games in the second section SC2. included.

By receiving the first ending command, the directing MPU 92 can grasp that the first ending flag is set to "1" in the main MPU 72. When the production side MPU 92 receives the first ending command in a situation where the production according to the execution mode corresponding to the ending period has not yet started, the execution mode of the production in the upper lamp 61, the speaker 62, and the image display device 63 is set to the ending period. Make sure that the corresponding execution mode is used. The situation in which "1" is set in the first ending flag basically occurs in the AT state ST5, but it can also occur in the first CB state ST2 or the second CB state ST3.

When an affirmative determination is made in step S2101, a negative determination is made in step S2102, or the process of step S2104 is executed, is "1" set in the second ending flag provided in the main RAM 74? It is determined whether or not (step S2105). The second ending flag is for the main MPU 72 to specify that the limited total net increase number of game media measured by using the total acquisition number counter 74d is likely to reach the upper limit net increase number. It is a flag.

When "1" is not set in the second ending flag (step S2105: NO), the value of the AT continuation counter, the value of the set count counter, and the value of the initial number of continuous games in one set of the AT state ST5 (50 games). ) Is added to the value of the total acquisition number counter 74d by adding the expected acquisition value of the game medium in the AT state ST5 to the sum of the responsibilities of). (Step S2106). The expected acquisition value of the game medium in one game of the pseudo bonus state ST4 and the AT state ST5 is about five. The upper limit net increase number of the second section SC2 is set to 2400 as already explained. The upper limit net increase number of the second section SC2 is not limited to 2400, and may be less than 2400 or more than 2400.

If an affirmative determination is made in step S2106, "1" is set in the second ending flag (step S2107). When "1" is set in the second ending flag, the number of continuous games remaining and the number of remaining sets will not be added in the AT state ST5, which will be described in detail later. As a result, in a situation where the ending condition of the second section SC2 is satisfied, it is possible to prevent further addition of the remaining number of continuous games and the remaining number of sets in the AT state ST5. Become.

After that, the second ending command is transmitted to the production side MPU 92 (step S2108). The second ending command contains information on the limited total net increase of the game media required until the ending condition of the second section SC2 is satisfied, that is, the value of the total acquisition counter 74d with respect to the upper limit net increase of the second section SC2. Contains information corresponding to the difference between.

By receiving the second ending command, the directing MPU 92 can grasp that the second ending flag is set to "1" in the main MPU 72. When the production side MPU 92 receives the second ending command in a situation where the production according to the execution mode corresponding to the ending period has not yet started, the execution mode of the production in the upper lamp 61, the speaker 62, and the image display device 63 is set to the ending period. Make sure that the corresponding execution mode is used. The situation where "1" is set in the second ending flag occurs in the AT state ST5, but does not occur in other gaming states.

<About normal game state ST1>
Next, the processing contents in the normal game state ST1 will be described. FIG. 46 is a flowchart showing an advantageous lottery process at the start of the game executed by the main MPU 72. The advantageous lottery process at the start of the game is performed after the winning / failing determination of the combination and the first control process (step S1312) of the game section are completed in the combination lottery process (FIG. 34) from the stop order notification control process (step S1314). Is executed in step S1313, which is a process executed before.

First, it is determined whether or not "1" is set in the second section flag of the main RAM 74 (step S2201). As already explained, the second section flag is a flag for specifying whether or not the game section is the second section SC2 by the main MPU 72, and "1" may be set in the second section flag. The second section SC2, and the case where the value of the second section flag is "0" is the first section SC1. If "1" is not set in the second section flag (step S2201: NO), the processes after step S2202 are not executed. As a result, in the case of the first section SC1, the process for shifting the gaming state from step S2207 to the pseudo-bonus state ST4 is not executed.

When "1" is set in the second section flag (step S2201: YES), if the current gaming state is the pseudo bonus state ST4 or the AT state ST5 (step S2202: YES), the advantageous state at the start of the game. Process is executed (step S2203). The processing for the advantageous state at the start of the game will be described later.

When "1" is set in the second section flag (step S2201: YES) and the game state is neither the pseudo bonus state ST4 nor the AT state ST5 (step S2202: NO), the current game It is determined whether or not the state is the first CB state ST2 or the second CB state ST3 (step S2204). When the current gaming state is the first CB state ST2 or the second CB state ST3 (step S2204: YES), the processes after step S2205 are not executed. As a result, even if it is the second section SC2, in the case of the first CB state ST2 or the second CB state ST3, the process for shifting the gaming state from step S2207 to the pseudo bonus state ST4 is not executed. ..

When the current gaming state is neither the first CB state ST2 nor the second CB state ST3 (step S2204: NO), it is determined whether or not the value of the bet number setting counter 74a of the main RAM 74 is "3". Then, it is determined whether or not the number of bets in this game is "3" (step S2205). If the number of bets in this game is "2" (step S2205: NO), the processes after step S2206 are not executed. As a result, even in the second section SC2, in the game in which the number of bets is "2", the process for shifting the gaming state in step S2207 or later to the pseudo bonus state ST4 is not executed.

When the number of bets in this game is "3" (step S2205: YES), it is determined whether or not "1" is set in the second transition confirmation flag provided in the main RAM 74 (step S2206). .. The second transition confirmation flag is a flag for the main MPU 72 to specify that the transition to the pseudo bonus state ST4 has already been won in the transition lottery process (step S2215) described later. If "1" is set in the second transition confirmation flag (step S2206: YES), the processes after step S2207 are not executed. As a result, in the situation where the transition to the pseudo-bonus state ST4 has already been confirmed, the process for shifting the gaming state from step S2207 to the pseudo-bonus state ST4 is not executed.

When "1" is not set in the second transition confirmation flag (step S2206: NO), it is determined whether or not the winning data corresponding to the direct hit is stored in the main RAM 74 (step S2207). The winning data for direct hits is the cherry winning data. That is, when the winning combination is won at the index value IV = 13 in the winning combination lottery process (FIG. 34) in this game, an affirmative determination is made in step S2207. If an affirmative determination is made in step S2207, the direct hit lottery process is executed (step S2208). In the direct hit lottery process, whether or not to shift to the pseudo bonus state ST4 at the end of this game by using the direct hit lottery table provided in the main ROM 73 and the lottery counter that is regularly updated in the main RAM 74. Will be decided by lottery. The probability of winning a direct hit in the direct hit lottery process is arbitrary, but in this slot machine 10, there is a 25% probability of winning a direct hit.

When a direct hit is won in the direct hit lottery process (step S2209: YES), "1" is set in the first transition confirmation flag provided in the main RAM 74 (step S2210). The first transition confirmation flag is a flag for the main MPU 72 to specify that the direct hit has been won. After that, the freeze counter setting process is executed (step S2211). In the setting process, information on the freeze period corresponding to the direct hit winning is set in the freeze counter provided in the main RAM 74. The freeze counter is a counter for the main MPU 72 to specify that the freeze period is set, and is a counter for the main MPU 72 to specify the remaining period of the freeze period.

The freeze period is a period during which the player's operation on the rotation of the reels 32L, 32M, 32R at which the reel control corresponding to the result of the winning combination lottery process (FIG. 34) is executed is invalidated. As described above, in the normal process (FIG. 25), whether the freeze counter value is 1 or more after the winning combination lottery process (step S906) is executed and before the reel control process (step S909) is started. Whether or not it is determined (step S908), and if the value of the freeze counter is 1 or more, the process waits in step S908. The value of the freeze counter is decremented in the timer subtraction process (step S506) each time the timer interrupt process (FIG. 19) is activated. That is, in the slot machine 10, the freeze period is a period in which the start of rotation of the reels 32L, 32M, 32R is forcibly waited for the operation of the start lever 41 for starting one game. However, the present invention is not limited to this, and the period in which the operation of the stop buttons 42 to 44 is invalidated after the start of rotation of the reels 32L, 32M, 32R may be the freeze period, and the reels 32L, 32M, 32R may be invalidated. The freeze period may be the period during which the operations of the stop buttons 42 to 44 on which the stop control corresponding to the result of the winning combination lottery process (FIG. 34) is executed after the start of rotation of the reels are invalidated. The freeze period is specifically 30 seconds, but is arbitrary.

After that, "1" is set in the direct hit freeze generation flag provided in the main RAM 74 (step S2212). The direct hit freeze occurrence flag is a flag for the main MPU 72 to specify that the freeze period has been set when the direct hit is won. Further, a direct hit freeze command is transmitted to the directing MPU 92 (step S2213). When the direct hit freeze command is received, the direct hit MPU 92 sets the execution mode of the effect on the upper lamp 61, the speaker 62, and the image display device 63 to be the execution mode corresponding to the direct hit winning. By confirming the effect, the player can grasp that the transition to the pseudo-bonus state ST4 triggered by the direct hit winning is performed.

When a negative determination is made in step S2207 or a negative determination is made in step S2209, it is determined whether or not the winning data corresponding to the transition is stored in the main RAM 74 (step S2214). The winning data corresponding to the transition is any one of the first watermelon winning data, the second watermelon winning data, the cherry winning data, the first chance replay winning data, and the second chance replay winning data. That is, if any of the index values IV = 11 to 15 is won in the winning combination lottery process (FIG. 34) in this game, an affirmative determination is made in step S2214. If an affirmative determination is made in step S2214, the transition lottery process is executed (step S2215).

In the shift lottery process, it is determined by lottery whether or not to shift to the pseudo-bonus state ST4 by using the shift lottery table provided in the main ROM 73 and the lottery counter that is periodically updated in the main RAM 74. In the role lottery process (Fig. 34) in this game, if the first watermelon winning data is stored in the main RAM 74 (when the index value IV = 11 is won), there is a 20% probability. If the transition of the pseudo bonus state ST4 is won and the second watermelon winning data is stored in the main RAM 74 (when the index value IV = 12 is won), there is a 10% chance that the pseudo bonus state ST4 will be transferred. If the player wins and the cherry winning data is stored in the main RAM 74 (when the index value IV = 13 is won), there is a 40% chance that the pseudo bonus state ST4 will be won and the main RAM 74 will be the first. If the 1 chance replay winning data is stored (when the index value IV = 14 is won), there is a 30% chance that the pseudo bonus state ST4 will be won, and the 2nd chance replay winning data will be stored in the main RAM 74. If is stored (when the index value IV = 15 is won), there is a 20% chance that the pseudo bonus state ST4 will be won. In this case, the index value IV, which has a lower probability of winning in the winning combination lottery process (FIG. 34), has a higher probability of winning the transition to the pseudo-bonus state ST4. As a result, it is possible to increase the advantage of winning the index value IV having a low winning probability in the winning combination lottery process (FIG. 34).

When the transition winning of the pseudo bonus state ST4 is obtained in the transition lottery process (step S2216: YES), "1" is set in the second transition confirmation flag of the main RAM 74 (step S2217). The second transition confirmation flag is a flag for the main MPU 72 to specify that the transition to the pseudo-bonus state ST4 has already been won in the transition lottery process (step S2215) as described above. Further, a value corresponding to the number of transition standby games (specifically, 5 games) is set in the transition standby counter provided in the main RAM 74 (step S2118). The transition standby counter is a counter for the main MPU 72 to specify that the number of transition standby games (specifically, 5 games) has been consumed since the second transition confirmation flag was set to "1". By winning the transition in the transition lottery process (step S2215), not only the second transition confirmation flag is set to "1", but also the transition standby counter is set to a value corresponding to the number of transition standby games. Every time one game is digested in the situation where "1" is set in the second transition confirmation flag, the value of the transition standby counter is decremented by 1. Then, in the situation where "1" is set in the second transition confirmation flag, the value of the transition standby counter becomes "0", so that the gaming state shifts to the pseudo bonus state ST4. Therefore, after the transition is won in the transition lottery process (step S2215), the number of transition waiting games is exhausted, so that the transition to the pseudo-bonus state ST4 occurs.

Next, the normal processing executed by the main MPU 72 will be described with reference to the flowchart of FIG. 47. The normal processing is executed in step S1804 in the corresponding processing (FIG. 39) at the end of the game. As described above, since the corresponding processing at the end of the game is executed after all the rotations of the reels 32L, 32M, 32R in one game are stopped, the normal processing is also executed after all the rotations of the reels 32L, 32M, 32R in one game are stopped. Will be executed later. As described above, in the corresponding process at the end of the game (FIG. 39), when the first CB state ST2 or the second CB state ST3 is determined, the normal process (step S1804) is executed by making an affirmative determination in step S1802. Not done.

When "1" is set in the second section flag of the main RAM 74 and the current game section is the second section SC2 (step S2301: YES), "1" is set in the first transition confirmation flag of the main RAM 74. It is determined whether or not it is set (step S2302). If a direct hit is won in the direct hit lottery process (step S2208) executed at the start of this game, "1" is set in the first transition confirmation flag.

When "1" is set in the first transition confirmation flag (step S2302: YES), the first start setting process is executed (step S2303). In the first start setting process, "1" is set in the pseudo bonus state flag provided in the main RAM 74. Further, in the first start setting process, a value corresponding to 100 games is set as the initial number of continuous games in the pseudo-bonus state ST4 in the pseudo-bonus continuation counter provided in the main RAM 74. Further, in the first start setting process, "1" is set in the AT transition confirmation flag indicating that the transition to the AT state ST5 is confirmed after the end of the pseudo bonus state ST4. That is, when a direct hit is won in the direct hit lottery process (step S2208), not only the transition to the pseudo bonus state ST4 occurs, but also the transition to the AT state ST5 after the end of the pseudo bonus state ST4 may occur. Determine. The pseudo-bonus state flag is a flag for the main MPU 72 to specify whether or not the game state is the pseudo-bonus state ST4, and the pseudo-bonus continuation counter mainly consists of the remaining number of continuous games in the pseudo-bonus state ST4. It is a counter for specifying by the side MPU 72. Further, the AT transition confirmation flag is a flag for the main MPU 72 to specify that the shift to the AT state ST5 is performed after the end of the pseudo bonus state ST4. After that, "1" is set in the first output start flag provided in the main RAM 74 (step S2304). The first output start flag is a flag for the main MPU 72 to specify that the external output corresponding to the start of the pseudo bonus state ST4 should be executed.

When "1" is not set in the first transition confirmation flag (step S2302: NO), this time by determining whether or not the value of the bet number setting counter 74a of the main RAM 74 is "3". It is determined whether or not the number of bets in the game is "3" (step S2305). If the number of bets in this game is "2" (step S2305: NO), the processes after step S2306 are not executed. As described above, in the processes after step S2306, the process of subtracting the number of games required to shift to the pseudo-bonus state ST4 with the digestion of one game is executed, and the shift to the pseudo-bonus state ST4 with the digestion of the game is executed. When the condition is satisfied, the process for shifting to the pseudo bonus state ST4 is executed. In this case, if the game in which the number of bets is "2" is executed, the processing after step S2306 is not executed, so that even if the game in which the number of bets is "2" is digested, it is pseudo. It is possible to prevent it from becoming a factor that brings the transition to the bonus state ST4 closer.

When the number of bets in this game is "3" (step S2305: YES), it is determined whether or not "1" is set in the second transition confirmation flag of the main RAM 74 (step S2306). The second transition confirmation flag is a flag for the main MPU 72 to specify whether or not the transition has been won in the transition lottery process (step S2215) as described above.

When "1" is set in the second shift confirmation flag (step S2306: YES), the value of the shift standby counter of the main RAM 74 is subtracted by 1 (step S2307). As already explained, the transition standby counter is a counter for the main MPU 72 to specify that the number of transition standby games (specifically, 5 games) has been consumed since the second transition confirmation flag was set to "1". Is. When the value of the transition standby counter after 1 subtraction is "0" (step S2308: YES), the second start setting process is executed (step S2309). Details will be described later, but in the second start setting process, a process for shifting to the pseudo bonus state ST4 is executed. After that, "1" is set in the first output start flag provided in the main RAM 74 (step S2310). The first output start flag is a flag for the main MPU 72 to specify that the external output corresponding to the start of the pseudo bonus state ST4 should be executed.

When "1" is not set in the second transition confirmation flag (step S2306: NO), the value of the release game number counter of the main RAM 74 is subtracted by 1 (step S2311). The release game number counter is the remaining number of games required to shift to the pseudo-bonus state ST4 in a situation where "1" is not set in any of the first and second shift confirmation flags of the main RAM 74. This is a counter for specifying the number of games on the main MPU 72. When the game section shifts from the first section SC1 to the second section SC2, the number of released games is set for the number of released games counter. When the value of the release game number counter after 1 subtraction is "0" (step S2312: YES), the second start setting process is executed (step S2309). Details will be described later, but in the second start setting process, a process for shifting to the pseudo bonus state ST4 is executed. After that, "1" is set in the first output start flag provided in the main RAM 74 (step S2310). The first output start flag is a flag for the main MPU 72 to specify that the external output corresponding to the start of the pseudo bonus state ST4 should be executed.

When the process of step S2310 is executed, it is determined whether or not "1" is set in the lighting standby flag of the main RAM 74 (step S2313). As already described, the lighting standby flag is a flag for the main MPU 72 to specify in the second section SC2 that the section display unit 67 is waiting to be switched from the off state to the lighting state. When "1" is set in the lighting standby flag (step S2313: YES), the lighting processing of the section display unit 67 is executed (step S2314). In the lighting process of the section display unit 67, the section display unit 67 is switched from the off state to the lit state. As a result, the notification of the second section SC2 is started by the section display unit 67. When the process of step S2314 is executed, the lighting standby flag is cleared to "0".

When the transition to the pseudo bonus state ST4 occurs in the situation where "1" is set in the lighting standby flag as described above, the section display unit 67 is switched from the off state to the lighting state. In the pseudo-bonus state ST4, the expected net increase value of the game medium in one game (the value obtained by subtracting the "number of game media bet in one game" from the "expected number of game media granted in one game") can be 1 or more. It is in a state. That is, although the section display unit 67 can be maintained in the off state even if it shifts to the second section SC2, it is surely turned on when it shifts to the game state in which the expected net increase value of the game medium can be 1 or more. .. As a result, in a game state in which the expected net increase value of the game medium can be 1 or more, it is possible to notify the manager of the game hall or the like that the game state is the game state.

<About the second start setting process>
Next, the second start setting process executed in step S2309 of the normal process (FIG. 47) will be described.

In the second start setting process, the AT transition lottery process at the start is executed with the transition to the pseudo bonus state ST4 this time as an opportunity. By winning the AT transition in the AT transition lottery process at the start, the transition to the AT status ST5 is performed after the end of the pseudo bonus state ST4 this time. Further, in the second start setting process, the number of initial continuous games in the pseudo-bonus state ST4 to be transferred this time is determined by lottery. Further, in the pseudo bonus state ST4, the AT transition lottery process is executed when a transition lottery opportunity occurs in each game, and the AT transition lottery process results in the AT transition winning, so that the pseudo bonus state ST4 ends this time. Later, it will shift to the AT state ST5. In this case, in the second start setting process, the probability of winning the AT transition in the AT transition lottery process in the pseudo-bonus state ST4 to be transitioned this time is determined by lottery.

FIG. 48 (a) is an explanatory diagram for explaining the selection probability of the game number mode that determines the initial number of continuous games in the pseudo-bonus state ST4, and FIG. 48 (b) is an AT transition in each game in the pseudo-bonus state ST4. It is explanatory drawing for demonstrating the selection probability of the winning rate mode which determines the probability of winning AT transition in a lottery process.

As shown in FIG. 48 (a), a plurality of types of game number modes are set. Specifically, the first game number mode in which the initial number of continuous games in the pseudo-bonus state ST4 is 20 games, and the thirty games. Two game number modes, a third game number mode of 40 games, a fourth game number mode of 50 games, and a fifth game number mode of 60 games are set. When the set value of the use target is "1", the first to fourth game number modes are the selection target, and the fifth game number mode is not the selection target. Further, the selection probability of each of the first to fourth game number modes is 25%, which is the same. When the set value of the use target is "2", the first to fourth game number modes are the selection target, and the fifth game number mode is not the selection target. Further, the selection probability of each of the third game number mode and the fourth game number mode is higher than the selection probability of each of the first game number mode and the second game number mode. When the set value of the use target is "3", the first to fourth game number modes are the selection target, and the fifth game number mode is not the selection target. In addition, the number of games mode in which the number of initial continuous games is large has a higher selection probability than the number of games mode in which the number of initial continuous games is small. When the set value of the use target is "4", the first to fourth game number modes are the selection target, and the fifth game number mode is not the selection target. Further, the selection probability of each of the third game number mode and the fourth game number mode is higher than the selection probability of each of the first game number mode and the second game number mode. When the set value of the target to be used is "5", the first to fifth game number modes are selected. In addition, the selection probability of the third game number mode and the fourth game number mode is the highest, the selection probability of the first game number mode and the second game number mode is the next highest, and the selection probability of the fifth game number mode is the lowest. .. When the set value of the target to be used is "6", the first to fifth game number modes are selected. Further, the selection probability of each of the first to fifth game number modes is 20%, which is the same.

With the above configuration, the expected value of the number of initial continuous games in the pseudo-bonus state ST4 increases as the set value of the larger value increases. As a result, it is possible to generate advantages / disadvantages depending on the set value for the number of initial continuous games in the pseudo-bonus state ST4. Further, when compared in the same number of games mode, the selection probabilities may differ depending on the set value. Further, in the fifth game number mode, if the setting value is 4 or less, the selection target is not performed, and if the setting value is 5 or more, the selection target is selected.

As shown in FIG. 48 (b), a plurality of types of winning rate modes are set. Specifically, the first winning rate at which the expected value of the probability of winning the AT transition in the pseudo bonus state ST4 this time is about 20%. The mode, the second winning rate mode of about 30%, the third winning rate mode of about 40%, the fourth winning rate mode of about 60%, and the fifth winning rate mode of about 75%. Is set. When the set value of the target to be used is "1", the first to fifth winning rate modes are selected. Further, the selection probabilities of the first to fifth winning rate modes are the same at 20%. When the set value of the target to be used is "2", the first to fifth winning rate modes are selected. In addition, the selection probability of the third winning rate mode is the highest, the selection probability of the fourth winning rate mode and the fifth winning rate mode is the next highest, and the selection probability of the first winning rate mode and the second winning rate mode is the lowest. .. When the set value of the target to be used is "3", the first to fifth winning rate modes are selected. In addition, the selection probability of the 4th winning rate mode is the highest, the selection probability of the 3rd winning rate mode and the 5th winning rate mode is the next highest, and the selection probability of the 1st winning rate mode and the 2nd winning rate mode is the lowest. .. When the set value of the target to be used is "4", the first to fifth winning rate modes are selected. In addition, the selection probability of the 5th winning rate mode is the highest, the selection probability of the 4th winning rate mode is the next highest, and the selection probability of the 1st winning rate mode, the 2nd winning rate mode, and the 3rd winning rate mode is the lowest. .. When the set value of the target to be used is "5", the first to fifth winning rate modes are selected. In addition, the selection probability of the 5th winning rate mode is the highest, the selection probability of the 3rd winning rate mode and the 4th winning rate mode is the next highest, and the selection probability of the 1st winning rate mode and the 2nd winning rate mode is the lowest. .. When the set value of the target to be used is "6", the second to fifth winning rate modes are selected targets, and the first winning rate mode is not selected. Further, the selection probability of each of the second to fifth game number modes is 25%, which is the same.

With the above configuration, the expected value of the probability of winning the AT transition in the pseudo-bonus state ST4 increases as the set value of the larger value increases. As a result, it is possible to generate advantages / disadvantages depending on the set value regarding the probability of winning the AT transition in the pseudo-bonus state ST4. Further, when compared in the same winning rate mode, the selection probabilities may differ depending on the set value. Further, in the first winning rate mode, if the set value is "6", the selection target is not performed, and if the setting value is 5 or less, the selection target is selected.

In the second start setting process, the AT transition lottery process at the start, the lottery process in the game number mode, and the lottery process in the winning rate mode are executed as described above. In these lottery processes, a random number is acquired from the second random number circuit 76 of the main MPU 72, and the lottery is executed using the acquired random number. FIG. 49A is an explanatory diagram for explaining a latch area 111 for latching the second random number updated in the second random number circuit 76.

The latch area 111 is provided in the second random number circuit 76. As described above, the second random number circuit 76 sequentially updates the second random number within a predetermined numerical range based on the clock signal (specifically, a period of 0.1 nanoseconds) output from the clock circuit. When the second random number updated in the second random number circuit 76 is used in the main MPU 72, a latch signal is transmitted from the main MPU 72 to the second random number circuit 76. When the second random number circuit 76 receives the latch signal, the second random number circuit 76 stores the second random number at that time in the latch area 111. Since the second random number updated in the second random number circuit 76 has a data capacity of 2 bytes, the latch area 111 also has a data capacity of 2 bytes correspondingly. The upper 1 byte of the second random number is stored in the upper area 111a of the latch area 111, and the lower 1 byte of the second random number is stored in the lower area 111b of the latch area 111.

When the AT transition lottery process at the start is executed in the second start setting process, the second is stored in the latch area 111 based on the fact that the latch signal is transmitted from the main MPU 72 to the second random number circuit 76. Random numbers are used as they are. That is, the random number used in the AT transition lottery process at the start has a data capacity of 2 bytes, and 0 to 65535 is a numerical range of the random number. For example, when the second random number stored in the latch area 111 is a binary number of "10110011" or "1010101" as shown in FIG. 49 (b), this numerical value is used as it is in the AT transition lottery process at the start. It is used as a random number.

When the lottery process of the number of games mode is executed in the second start setting process, the second random number stored in the latch area 111 based on the fact that the latch signal is transmitted from the main MPU 72 to the second random number circuit 76. Of these, only the upper byte stored in the upper area 111a is used. That is, the random number used in the lottery process in the game number mode has a data capacity of 1 byte, and 0 to 255 is a numerical range of the random number. For example, when the second random number stored in the latch area 111 is "10110011" or "1010101" in binary as shown in FIG. 49 (b), the higher rank among them is shown in FIG. 49 (c). The byte "10110011" is used as a random number in the lottery process in the game number mode.

When the lottery process of the winning rate mode is executed in the second start setting process, the second random number stored in the latch area 111 based on the fact that the latch signal is transmitted from the main MPU 72 to the second random number circuit 76. Of the upper bytes stored in the upper area 111a, only the lower 7 bits are used. That is, the random number used in the lottery process in the winning rate mode has a data capacity of 7 bits, and 0 to 127 is a numerical range of the random number.

When acquiring the 7-bit random number, first, the second random number is stored in the latch area 111 based on the fact that the latch signal is transmitted from the main MPU 72 to the second random number circuit 76. After that, the random number of the upper byte stored in the upper area 111a of the latch area 111 is acquired in the register of the main MPU 72. Then, the most significant bit of the random number of the high-order byte is cleared to "0". This makes it possible to acquire a 7-bit random number by using the 2-byte second random number latched in the second random number circuit 76.

For example, when the second random number stored in the latch area 111 is "10110011" or "1010101" in binary as shown in FIG. 49 (b), the higher rank among them is shown in FIG. 49 (c). The byte "10110011" is acquired in the register of the main MPU 72. Then, the most significant bit of the acquired 1-byte information is cleared to "0", so that the random number information stored in the register of the main MPU 72 becomes "" as shown in FIG. 49 (d). 00110011 ". The random number information is used in the lottery process in the winning rate mode. In this case, the random number information is treated as 1-byte information of "00110011", but the most significant bit is forcibly cleared to "0", which contributes to actually generating a numerical range of the random number. Is the lower 7 bits excluding the most significant bit.

Here, a configuration in which the information of the random number is held as 7-bit information is also conceivable. However, in this case, the random number information cannot be handled as byte-based information, and the handling of the information becomes complicated. On the other hand, even if it is 7 bits that contributes to the generation of the numerical range of the random number in the implementation, the random number information is treated as byte-based information because the random number information is 1 byte. Is possible. Further, even if the random number information is 1 byte in this way, the most significant bit is cleared to "0", so that the numerical range of the random number exceeds the range of 0 to 127 corresponding to 7 bits. It is possible to prevent the absence of.

As described above, it is possible to acquire a plurality of types of random numbers having different numerical ranges of random numbers by using the 2-byte second random number updated in the second random number circuit 76. As a result, the number of random number circuits can be reduced and the hardware configuration can be simplified as compared with the configuration in which different random number circuits are individually provided corresponding to each of the different numerical ranges.

FIG. 50 is a flowchart showing a second start setting process executed in step S2309 of the normal process (FIG. 47).

First, a second random number is acquired (step S2401). Specifically, by transmitting the latch signal to the second random number circuit 76, the information of the second random number after the latest update in the second random number circuit 76 is stored in the latch area 111. Then, when the second random number is stored in the latch area 111, the second random number is acquired in the register of the main MPU 72.

After that, the AT transition lottery table at the start is read from the main ROM 73 (step S2402). In the AT transition lottery table at the start, the numerical value included in the numerical range of the second random number from 0 to 65535 is set to either the AT transition winning or the transition out of the numerical range. Specifically, the probability of winning the AT transition is set to be 10%.

After that, the AT transition lottery process at the start is executed (step S2403). In the AT transition lottery process at the start, the second random number acquired in step S2401 is collated with the AT transition lottery table at the start read in step S2402. As a result, if the AT transition is won (step S2404: YES), "1" is set in the AT transition confirmation flag of the main RAM 74 (step S2405). As already described, the AT transition confirmation flag is a flag for the main MPU 72 to specify that the shift to the AT state ST5 is performed after the end of the pseudo bonus state ST4.

When a negative determination is made in step S2404 or the process of step S2405 is executed, the upper byte of the second random number is acquired from the second random number circuit 76 (step S2406). Specifically, by transmitting the latch signal to the second random number circuit 76, the information of the second random number after the latest update in the second random number circuit 76 is stored in the latch area 111. Then, the information of the upper byte stored in the upper area 111a in the latch area 111 is acquired in the register of the main MPU 72.

Here, in the second start setting process, a latch signal is transmitted so that the second random number is latched in the second random number circuit 76 in step S2401, and the second random number circuit 76 is second in step S2406. The latch signal is transmitted so that the random numbers are latched. In this case, in the second random number circuit 76, the second random number is sequentially updated based on the clock signal output from the clock circuit, and the update cycle is 0.1 nanosecond. Then, during the period from the execution of the process of step S2401 to the execution of the process of step S2406, the second random number updated in 0.1 nanoseconds as described above makes one round in the numerical range of 0 to 65535. The period is longer than the period required to do so. Further, the period from the execution of the process of step S2401 to the execution of the process of step S2406 is within a predetermined period range in each of the case where the process of step S2405 is executed and the case where the process of step S2405 is not executed. It fluctuates, and this fluctuation is large in relation to the update cycle of the second random number. Therefore, even if the latch signal is transmitted to the second random number circuit 76 in each of step S2401 and step S2406 in one processing time of the second start setting process (FIG. 50), the latch signal is transmitted by the transmission of the latch signal in step S2401. There is no regularity between the second random number stored in the area 111 and the second random number stored in the latch area 111 due to the transmission of the latch signal in step S2406.

After that, "1" is set in the lottery number counter 74k of the main RAM 74 (step S2407). As described above, the lottery counter 74k is used to identify which index value IV is the lottery target of the winning combination lottery process (FIG. 34), but in the game number mode lottery process. It is used by the main MPU 72 to specify which of the first to fifth game number modes is the lottery target of the lottery process. When the value of the lottery counter 74k is "1" in the lottery process of the game number mode, the second game number mode is the lottery target of the lottery process, and the value of the lottery counter 74k is "1" in the lottery process of the game number mode. If it is "2", the third game number mode is the lottery target of the lottery process, and if the value of the lottery number counter 74k is "3" in the lottery process of the game number mode, the fourth game number mode is the lottery process. If the value of the lottery counter 74k is "4" in the lottery process of the game number mode, the fifth game number mode is the lottery target of the lottery process. Then, if the value of the lottery number counter 74k is not won in any of 1 to 4, it means that the first game number mode is won.

After that, the start address for the game number mode lottery is set in the address reference register in the main MPU 72 (step S2408). The start address is the start address of the game number mode lottery table 112 provided in the main ROM 73. FIG. 51A is an explanatory diagram for explaining the game number mode lottery table 112.

In the game number mode lottery table 112, a plurality of address information D (1) to D (24) are set, and the plurality of address information D (1) to D (24) are associated with each other on a one-to-one basis. The determination value LV is set. Each address information D (1) to D (24) has a data capacity of 1 byte and is a serial number. The address information D (1) to D (4) in the first range corresponds to the set value of "1", and the address information D (5) to D (8) in the second range correspond to the set value of "2". The address information D (9) to D (12) in the third range corresponds to the set value of "3", and the address information D (13) to D (16) in the fourth range correspond to. The address information D (17) to D (20) in the fifth range corresponds to the set value of "4", and the address information D (21) in the sixth range corresponds to the set value of "5". ~ D (24) corresponds to the set value of "6". That is, when the set value is n (n is an integer of 1 to 6), the set value of n is in the range of address information D ((n-1) × 4 + 1) to D ((n-1) × 4 + 4). It corresponds.

Further, in the range of address information corresponding to each set value, the first address information D (1), D (5), D (9), D (13), D (17), and D (21) are second. The judgment value LV of the two game number mode is associated with the second address information D (2), D (6), D (10), D (14), D (18), D (22). Is associated with the determination value LV of the third game number mode, and the third address information D (3), D (7), D (11), D (15), D (19), D (23). ) Is associated with the determination value LV of the fourth game number mode, and the final address information D (4), D (8), D (12), D (16), D (20), D ( 24) is associated with the determination value LV of the fifth game number mode. That is, when the set value is n (n is an integer of 1 to 6), the judgment value LV of the mth game number mode (m is an integer of 2 to 4) is the address information D ((n-1) × 4 +. (M-1)).

In a configuration in which the selection probability of each game number mode differs depending on the set value to be used, the game number mode lottery table 112 contains address information D (0) to D (24) according to each set value. A range is set, and in the range of address information D (0) to D (24) of each set value, the allocation order of the second to fifth game number modes is common to each set value. As a result, in a configuration in which the number of tables is reduced by providing one game number mode lottery table 112 corresponding to all the set values instead of providing a different table for each set value, the set values to be used and the set values to be used When the determination value LV corresponding to the combination of the game number modes to be drawn is read from the game number mode lottery table 112, the determination value LV can be read according to a certain rule.

For example, the determination value LV set in the address information D (1) is "64", and the numerical range of the random number in the lottery process in the game number mode is 0 to 255, so the set value is "1". In a certain case, the selection probability of the second game number mode is 25% as shown in FIG. 48 (a). Further, for example, since the determination value LV set in the address information D (8) is "0", the selection probability of the fifth game number mode when the set value is "2" is shown in FIG. 48 (a). As shown, it becomes 0%. Further, as described above, if the lottery process of the game number mode is performed, the first game number mode is set regardless of the set value. Therefore, the game number mode lottery table 112 shows the number of first games. The determination value LV corresponding to the mode is not set.

Returning to the description of the second start setting process (FIG. 50), as already described in step S2408, the start address of the game number mode lottery table 112 is set in the address reference register in the main MPU 72. In this case, the game number mode lottery table 112 is read from the main ROM 73 to the main RAM 74.

After that, the LV acquisition process is executed (step S2409). FIG. 52 is a flowchart showing the LV acquisition process.

First, the information of the set value to be used is read from the set value storage area of the main RAM 74, and the read set value information is set in the B register provided in the main MPU 72 (step S2501). After that, the information of the lottery number counter 74k of the main RAM 74 is read, and the read information is set in the C register provided in the main MPU 72 (step S2502). Then, the offset value of the address information is calculated by executing the operation (B-1) × 4 + C (step S2503).

After that, the offset value of the address information calculated in step S2503 is added to the start address set in step S2408 of the second start setting process (FIG. 50) (step S2504). Then, the determination value LV corresponding to the target address of the addition result in step S2504 is read from the game number mode lottery table 112 (step S2505). As a result, the determination value LV corresponding to the combination of the set value to be used and the game number mode to be drawn is read from the game number mode lottery table 112.

Returning to the explanation of the second start setting process (FIG. 50), after acquiring the determination value LV in step S2409, the lottery value JV used when determining whether or not the number of games mode that is the target of the lottery is correct is set. (Step S2410). In such processing, a new lottery value JV is set by adding the determination value LV acquired in step S2409 to the current lottery value JV. In the first process of step S2410 after the processes of steps S2406 to S2408 are executed, the value of the 1-byte random number information (any of 0 to 255) acquired in step S2406 is set as the current lottery value JV. , The determination value LV acquired in step S2409 is added to the 1-byte random number information to obtain a new lottery value JV. When the determination value LV acquired in step S2409 is "0", the lottery value JV does not change even if the process of step S2410 is executed. That is, if the judgment value LV is "0" in the first setting process, the 1-byte random number information (any of 0 to 255) becomes the lottery value JV as it is, and the judgment value LV becomes "0" in the second and subsequent setting processes. If it is "0", the lottery value JV in the previous setting process becomes the current lottery value JV as it is.

After that, a winning / failing determination is made for the game number mode corresponding to the current value of the lottery number counter 74k (step S2411). In this winning / failing determination, it is determined whether or not the lottery value JV exceeds "255". If it does not exceed "255" (step S2411: NO), it means that the game number mode corresponding to the current value of the lottery number counter 74k has been entered. In this case, after adding 1 to the value of the lottery number counter 74k of the main RAM 74 (step S2412), it is determined whether or not there is still a game number mode to be determined to be successful (step S2413). Specifically, when the value of the lottery number counter 74k added by 1 is not "5" (step S2413: NO), the process returns to step S2409 and the success / failure determination of the game number mode is continued. At this time, in the LV acquisition process (FIG. 52) in step S2409, although the set values set as the objects to be used are the same, the value of the lottery number counter 74k is the value at the time of the previous execution of the main acquisition process. It is a value obtained by adding 1 to the value. Therefore, in step S2503 in the LV acquisition process (FIG. 52), a value obtained by adding 1 to the offset value of the address information acquired in the previous main acquisition process is calculated as the offset value of the current address information. Along with this, the address information D (0) to D (24) in the order one after the address information D (0) to D (24) that was the reference target in the previous acquisition process is supported. The determination value LV to be used is acquired. Then, using the newly acquired determination value LV, a new lottery value JV is calculated in step S2410, and it is determined whether or not the calculated lottery value JV exceeds "255". As a result, the winning / failing determination of the game number mode corresponding to the current value of the lottery number counter 74k is performed.

When the lottery value JV exceeds "255" (step S2411: YES), it means that the game number mode corresponding to the current value of the lottery number counter 74k has been won. Further, when the lottery value JV does not exceed "255" (step S2411: NO) and the value of the lottery number counter 74k after 1 addition is "5" (step S2413: YES), the second It means that none of the 5th game number modes was won, and in this case, it means that the 1st game number mode was won. In these cases, the storage process of the number of games is executed (step S2414).

In the storage process of the number of games, if an affirmative determination is made in step S2413, it means that the number of games mode this time is the first number of games mode. Set a value corresponding to 20 games, which is the minimum number of games, as the initial number of continuous games of ST4. Further, in the storage processing of the number of games, if an affirmative determination is made in step S2411, it means that the number of games mode this time is the number of games mode corresponding to the current value of the lottery number counter 74k. The value of the initial continuation game number of the pseudo bonus state ST4 corresponding to the game number mode is set in the pseudo bonus continuation counter of the main RAM 74. Specifically, if the value of the lottery counter 74k is "1", the value of 30 games corresponding to the second game number mode is set in the pseudo bonus continuation counter, and the value of the lottery counter 74k is "2". If there is, the value of 40 games corresponding to the third game number mode is set in the pseudo bonus continuation counter, and if the value of the lottery number counter 74k is "3", the value of 50 games corresponding to the fourth game number mode is simulated. It is set in the bonus continuation counter, and if the value of the lottery number counter 74k is "4", the value of 60 games corresponding to the fifth game number mode is set in the pseudo bonus continuation counter. The pseudo-bonus continuation counter is a counter for specifying the remaining number of continuous games in the pseudo-bonus state ST4 by the main MPU 72 as described above.

When the process of step S2414 is executed, the high-order byte of the second random number is acquired from the second random number circuit 76 (step S2415). Specifically, by transmitting the latch signal to the second random number circuit 76, the information of the second random number after the latest update in the second random number circuit 76 is stored in the latch area 111. Then, the information of the upper byte stored in the upper area 111a in the latch area 111 is acquired in the register of the main MPU 72. Then, the most significant bit in the acquired high-order byte information is cleared to "0" (step S2416). This makes it possible to acquire a 7-bit random number.

Here, in the second start setting process, a latch signal is transmitted so that the second random number is latched in the second random number circuit 76 in step S2406, and the second random number circuit 76 is second in step S2415. The latch signal is transmitted so that the random numbers are latched. In this case, in the second random number circuit 76, the second random number is sequentially updated based on the clock signal output from the clock circuit, and the update cycle is 0.1 nanosecond. Then, during the period from the execution of the process of step S2406 to the execution of the process of step S2415, the second random number updated in 0.1 nanoseconds as described above makes one round in the numerical range of 0 to 65535. The period is longer than the period required to do so. Further, the period from the execution of the process of step S2406 to the execution of the process of step S2415 fluctuates within a predetermined period range, and this fluctuation is large in relation to the update cycle of the second random number. Is. Therefore, even if the latch signal is transmitted to the second random number circuit 76 in each of step S2406 and step S2415 in one processing time of the second start setting process (FIG. 50), the latch signal is transmitted by the transmission of the latch signal in step S2406. There is no regularity between the second random number stored in the area 111 and the second random number stored in the latch area 111 due to the transmission of the latch signal in step S2415.

After that, "1" is set in the lottery number counter 74k of the main RAM 74 (step S2417). As described above, the lottery counter 74k is used to identify which index value IV is the target of the lottery for the winning combination (FIG. 34), and the lottery for the lottery process in the game number mode. It is used to identify which game number mode is the target, but in the lottery process of the winning rate mode, the main side determines which of the winning rate modes is the lottery target of the lottery process. Used to identify in MPU72. When the value of the lottery counter 74k is "1" in the lottery process of the winning rate mode, the second winning rate mode is the lottery target of the lottery process, and the value of the lottery counter 74k is "1" in the lottery process of the winning rate mode. If it is "2", the third winning rate mode is the lottery target of the lottery process, and if the value of the lottery counter 74k is "3" in the lottery process of the winning rate mode, the fourth winning rate mode is the lottery process. If the value of the lottery counter 74k is "4" in the lottery process of the winning rate mode, the fifth winning rate mode is the lottery target of the lottery process. Then, if the value of the lottery number counter 74k is not won in any of 1 to 4, it means that the first winning rate mode is won.

After that, the start address for the winning rate mode lottery is set in the address reference register in the main MPU 72 (step S2418). The start address is the start address of the winning rate mode lottery table 113 provided in the main ROM 73. FIG. 51B is an explanatory diagram for explaining the winning rate mode lottery table 113.

In the winning rate mode lottery table 113, a plurality of address information E (1) to E (24) are set, and the plurality of address information E (1) to E (24) are associated with each other on a one-to-one basis. The determination value LV is set. Each address information E (1) to E (24) has a data capacity of 1 byte and is a serial number. The address information E (1) to E (4) in the first range corresponds to the set value of "1", and the address information E (5) to E (8) in the second range correspond to the set value of "2". The address information E (9) to E (12) in the third range corresponds to the set value of "3", and the address information E (13) to E (16) in the fourth range correspond to. The address information E (17) to E (20) in the fifth range corresponds to the set value of "4", and the address information E (21) in the sixth range corresponds to the set value of "5". ~ E (24) corresponds to the set value of "6". That is, when the set value is n (n is an integer of 1 to 6), the set value of n is in the range of address information E ((n-1) × 4 + 1) to E ((n-1) × 4 + 4). It corresponds.

Further, in the range of address information corresponding to each set value, the first address information E (1), E (5), E (9), E (13), E (17), E (21) is the first. 2 The judgment value LV of the winning rate mode is associated with the second address information E (2), E (6), E (10), E (14), E (18), E (22). Is associated with the judgment value LV of the third winning rate mode, and the third address information E (3), E (7), E (11), E (15), E (19), E (23). ) Is associated with the determination value LV of the fourth winning rate mode, and the final address information E (4), E (8), E (12), E (16), E (20), E ( 24) is associated with the determination value LV of the fifth winning rate mode. That is, when the set value is n (n is an integer of 1 to 6), the judgment value LV of the mth winning rate mode (m is an integer of 2 to 4) is the address information E ((n-1) × 4 +. (M-1)).

In a configuration in which the selection probability of each winning rate mode differs depending on the set value to be used, the winning rate mode lottery table 113 shows the address information E (0) to E (24) according to each setting value. A range is set, and in the range of address information E (0) to E (24) of each set value, the allocation order of the second to fifth winning rate modes is common to each set value. As a result, in a configuration in which the number of tables is reduced by providing one winning rate mode lottery table 113 corresponding to all the set values instead of providing a different table for each set value, the set values to be used and the set values to be used When the determination value LV corresponding to the combination of the winning rate modes to be drawn is read from the winning rate mode lottery table 113, the determination value LV can be read according to a certain rule.

For example, the determination value LV set in the address information E (1) is "25", and the numerical range of the random number in the lottery process in the game number mode is 0 to 127, so the set value is "1". In a certain case, the selection probability of the second game number mode is about 20% as shown in FIG. 48 (b). In addition, as already explained, if the lottery process of the winning rate mode fails, the setting value of "1" to "5" will be the first winning rate mode, and the setting value of "6" will be used. Since the first winning rate mode is not included in the lottery target, the determination value LV corresponding to the first winning rate mode is not set in the winning rate mode lottery table 113.

Returning to the description of the second start setting process (FIG. 50), as already described in step S2418, the start address of the winning rate mode lottery table 113 is set in the address reference register in the main MPU 72. In this case, the winning rate mode lottery table 113 is read from the main ROM 73 to the main RAM 74.

After that, the LV acquisition process is executed (step S2419). FIG. 52 is a flowchart showing the LV acquisition process.

First, the information of the set value to be used is read from the set value storage area of the main RAM 74, and the read set value information is set in the B register provided in the main MPU 72 (step S2501). After that, the information of the lottery number counter 74k of the main RAM 74 is read, and the read information is set in the C register provided in the main MPU 72 (step S2502). Then, the offset value of the address information is calculated by executing the operation (B-1) × 4 + C (step S2503).

After that, the offset value of the address information calculated in step S2503 is added to the start address set in step S2418 of the second start setting process (FIG. 50) (step S2504). Then, the determination value LV corresponding to the target address of the addition result in step S2504 is read from the winning rate mode lottery table 113 (step S2505). As a result, the determination value LV corresponding to the combination of the set value of the use target and the winning rate mode of the lottery target is read from the winning rate mode lottery table 113.

Returning to the explanation of the second start setting process (FIG. 50), after acquiring the determination value LV in step S2419, the lottery value JV used when determining the winning or not of the winning rate mode that is the target of the lottery is set. (Step S2420). In such a process, a new lottery value JV is set by adding the determination value LV acquired in step S2419 to the current lottery value JV. In the first process of step S2420 after the processes of steps S2415 to S2418 are executed, the value of the 7-bit random number information (any of 0 to 127) acquired in steps S2415 and S2416 is selected by the current lottery. The value JV is set, and the determination value LV acquired in step S2419 is added to the 7-bit random number information to obtain a new lottery value JV. When the determination value LV acquired in step S2419 is "0", the lottery value JV does not change even if the process of step S2420 is executed. That is, if the judgment value LV is "0" in the first setting process, the 7-bit random number information (any of 0 to 127) becomes the lottery value JV as it is, and the judgment value LV becomes "0" in the second and subsequent setting processes. If it is "0", the lottery value JV in the previous setting process becomes the current lottery value JV as it is.

After that, the winning / failing determination is performed for the winning rate mode corresponding to the current value of the lottery number counter 74k (step S2421). In this winning / failing determination, it is determined whether or not the lottery value JV exceeds "127". If it does not exceed "127" (step S2421: NO), it means that the winning rate mode corresponding to the current value of the lottery counter 74k has been entered. In this case, after adding 1 to the value of the lottery number counter 74k of the main RAM 74 (step S2422), it is determined whether or not the winning rate mode to be determined to be successful still exists (step S2423). Specifically, when the value of the lottery number counter 74k added by 1 is not "5" (step S2423: NO), the process returns to step S2419 and the winning / failing determination of the winning rate mode is continued. At this time, in the LV acquisition process (FIG. 52) in step S2419, although the set values set as the objects to be used are the same, the value of the lottery counter 74k is the value at the time of the previous execution of the main acquisition process. It is a value obtained by adding 1 to the value. Therefore, in step S2503 in the LV acquisition process (FIG. 52), a value obtained by adding 1 to the offset value of the address information acquired in the previous main acquisition process is calculated as the offset value of the current address information. Along with this, the address information E (0) to E (24) in the order one after the address information E (0) to E (24) that was the reference target in the previous acquisition process is supported. The determination value LV to be used is acquired. Then, using the newly acquired determination value LV, a new lottery value JV is calculated in step S2420, and it is determined whether or not the calculated lottery value JV exceeds "127". As a result, the winning / failing determination of the winning rate mode corresponding to the current value of the lottery number counter 74k is performed.

When the lottery value JV exceeds "127" (step S2421: YES), it means that the winning rate mode corresponding to the current value of the lottery number counter 74k has been won. Further, when the lottery value JV does not exceed "127" (step S2421: NO) and the value of the lottery number counter 74k after 1 addition is "5" (step S2423: YES), the second It means that none of the 5th winning rate modes was won, and in this case, it means that the 1st winning rate mode was won. In these cases, the storage process of the winning rate mode is executed (step S2424).

In the storage process of the winning rate mode, if an affirmative determination is made in step S2423, it means that the winning rate mode this time is the first winning rate mode. Stored in the main RAM 74. Further, in the storage process of the winning rate mode, if an affirmative determination is made in step S2421, it means that the winning rate mode this time is the winning rate mode corresponding to the current value of the lottery counter 74k. Information corresponding to the winning rate mode is stored in the main RAM 74. Specifically, if the value of the lottery counter 74k is "1", the information corresponding to the second winning rate mode is stored in the main RAM 74, and if the value of the lottery counter 74k is "2", the third The information corresponding to the winning rate mode is stored in the main RAM 74, and if the value of the lottery counter 74k is "3", the information corresponding to the fourth winning rate mode is stored in the main RAM 74, and the lottery counter 74k If the value is "4", the information corresponding to the fifth winning rate mode is stored in the main RAM 74.

After executing the process of step S2424, "1" is set in the pseudo bonus state flag of the main RAM 74 (step S2425). As described above, the pseudo-bonus state flag is a flag for the main MPU 72 to specify whether or not the game state is the pseudo-bonus state ST4.

<About freeze setting processing at the time of bonus transition>
Next, the freeze setting process at the time of bonus transition executed in step S907 of the normal process (FIG. 25) will be described.

In a configuration in which the game state shifts to the pseudo-bonus state ST4 when the transition condition is satisfied in the normal game state ST1, a freeze period basically occurs at the start of the game first executed in the pseudo-bonus state ST4. As already explained, the freeze period is a period during which the player's operation on the rotation of the reels 32L, 32M, 32R at which the reel control corresponding to the result of the winning combination lottery process (FIG. 34) is executed is invalidated. In this slot machine 10, the start of rotation of the reels 32L, 32M, 32R is forcibly waited for the operation of the start lever 41 for starting one game. The freeze period set at the start of the pseudo-bonus state ST4 differs depending on the type of the number of games mode and the winning rate mode determined when shifting to the pseudo-bonus state ST4.

Specifically, when the number of games mode is any of the first to third number of games modes, the winning rate mode corresponds to the first combination regardless of the winning rate mode, and the winning rate modes are the first to first. If it is any of the third winning rate modes, it corresponds to the first combination regardless of the number of games mode. When the first combination is applicable, 10 seconds is set as the freeze period at the start of the pseudo-bonus state ST4. When the number of games mode is the fourth number of games mode and the winning rate mode is the fourth winning rate mode or the fifth winning rate mode, it corresponds to the second combination, and the winning rate mode is the fourth winning rate mode. If the number of games mode is the fourth number of games mode or the fifth number of games mode, it corresponds to the second combination. If the second combination is applicable, 20 seconds is set as the freeze period at the start of the pseudo-bonus state ST4. When the number of games mode is the fifth number of games mode and the winning rate mode is the fifth winning rate mode, it corresponds to the third combination. If the third combination is applicable, 30 seconds is set as the freeze period at the start of the pseudo-bonus state ST4.

As described above, at the start of the pseudo-bonus state ST4, a freeze period corresponding to a combination of the number of games mode and the winning rate mode is basically set. However, the first start setting process (step S2303) is executed when the direct hit lottery process (step S2208) is won in the normal game state ST1, and the first start setting process is executed. If the transition to the pseudo-bonus state ST4 occurs in, the game won by the direct hit lottery process (step S2208) freezes for 30 seconds before the rotation of the reels 32L, 32M, 32R is started. The period is set. Since the game in which this freeze period is set is the game one time before the game first executed in the pseudo-bonus state ST4, the freeze period is further extended in the game first executed in the pseudo-bonus state ST4. If set, it may be annoying to the player. On the other hand, in the slot machine 10, the freeze period at the start of the first game is not set in the pseudo-bonus state ST4, which is shifted when the direct hit is won in the direct hit lottery process (step S2208). It has become.

The processing configuration for realizing the configuration will be described below. FIG. 53 is a flowchart showing a freeze setting process at the time of bonus transition executed by the main MPU 72.

When this game is the first game executed in the pseudo-bonus state ST4 (step S2601: YES), it is determined whether or not "1" is set in the direct hit freeze occurrence flag of the main RAM 74 (step S2602). ). As described above, the direct hit freeze occurrence flag is set to "1" in step S2212 when the direct hit lottery process (step S2208) in the advantageous lottery process (FIG. 46) at the start of the game results in a direct hit winning. When "1" is set in the direct hit freeze occurrence flag (step S2602: YES), after clearing the direct hit freeze occurrence flag "0" (step S2603), the process for setting the freeze period after step S2604 is performed. The freeze setting process at the time of this bonus transition is terminated without executing.

When a direct hit is won in the direct hit lottery process (step S2208), the freeze counter setting process is executed in step S2211 in the advantageous lottery process (FIG. 46) at the start of the game, so that the main RAM 74 Information corresponding to the freeze period of 30 seconds is set in the freeze counter, and in the normal process (FIG. 25), if the value of the freeze counter is 1 or more in the subsequent step S908, the freeze counter is set in the step S908. By waiting, the start of rotation of the reels 32L, 32M, 32R is waited for. The value of the freeze counter is decremented in the timer subtraction process (step S506) each time the timer interrupt process (FIG. 19) is activated. With such a configuration, when a direct hit is won in the direct hit lottery process (step S2208), the rotation start of the reels 32L, 32M, 32R in the game in which the direct hit is won is over a freeze period of 30 seconds. Wait. Then, since the transition to the pseudo-bonus state ST4 occurs at the end of the game in which the freeze period occurs, the next game of the game becomes the first game to be executed in the pseudo-bonus state ST4. In such a situation, when "1" is set in the direct hit freeze occurrence flag, the process for setting the freeze period after step S2604 is not executed, so that the direct hit is won. In the game following the game in which the freeze period is generated, it is possible to prevent the freeze period at the start of the pseudo-bonus state ST4 from occurring further.

When "1" is not set in the direct hit freeze occurrence flag (step S2602: NO), it is determined whether or not the combination of the number of games mode and the winning rate mode in the pseudo bonus state ST4 this time is the first combination. (Step S2604). As described above, when the number of games mode is any of the first to third number of games modes, the winning rate mode corresponds to the first combination regardless of which the winning rate mode is, and the winning rate modes are the first to first. 3 If any of the winning rate modes is used, the first combination is applicable regardless of the number of games mode. In the case of the first combination (step S2604: YES), the first freeze setting process is executed (step S2605). In the first freeze setting process, information corresponding to 10 seconds corresponding to the first freeze period is set in the freeze counter of the main RAM 74. As a result, in the normal process (FIG. 25) after the freeze setting process at the time of the transition to the bonus is completed, a positive determination is made in step S908 and the player waits until the first freeze period elapses. Therefore, the start of rotation of the reels 32L, 32M, 32R in this game is waited for during the first freeze period.

After that, the first freeze command is transmitted to the production side MPU 92 (step S2606). When the effecting side MPU 92 receives the first freeze command, the effecting mode in the upper lamp 61, the speaker 62, and the image display device 63 is set to the execution mode corresponding to the first freeze period. By confirming the effect, the player can grasp that the pseudo-bonus state ST4 in which the combination of the number of games mode and the winning rate mode is the first combination has occurred.

When the combination of the number of games mode and the winning rate mode in the pseudo bonus state ST4 this time is not the first combination (step S2604: NO), the combination of the number of games mode and the winning rate mode in the pseudo bonus state ST4 this time is the first combination. It is determined whether or not the combination is two (step S2607). As described above, when the number of games mode is the fourth number of games mode and the winning rate mode is the fourth winning rate mode or the fifth winning rate mode, it corresponds to the second combination, and the winning rate mode is the fourth. When the winning rate mode is the number of games mode and the number of games mode is the fourth number of games mode or the fifth number of games mode, the second combination is applicable. In the case of the second combination (step S2607: YES), the second freeze setting process is executed (step S2608). In the second freeze setting process, information corresponding to 20 seconds corresponding to the second freeze period is set in the freeze counter of the main RAM 74. As a result, in the normal process (FIG. 25) after the freeze setting process at the time of the transition to the bonus is completed, a positive determination is made in step S908 and the player waits until the second freeze period elapses. Therefore, the start of rotation of the reels 32L, 32M, 32R in this game is waited for during the second freeze period.

After that, the second freeze command is transmitted to the production side MPU 92 (step S2609). When the effecting side MPU 92 receives the second freeze command, the effecting mode in the upper lamp 61, the speaker 62, and the image display device 63 is set to the execution mode corresponding to the second freeze period. By confirming the effect, the player can grasp that the pseudo-bonus state ST4 in which the combination of the number of games mode and the winning rate mode is the second combination has occurred.

When the combination of the number of games mode and the winning rate mode in the pseudo bonus state ST4 this time is not the second combination (step S2607: NO), the combination of the number of games mode and the winning rate mode in the pseudo bonus state ST4 this time is the first. It means that it is a combination of three. As described above, when the number of games mode is the fifth number of games mode and the winning rate mode is the fifth winning rate mode, it corresponds to the third combination. In the case of the third combination (step S2607: NO), the third freeze setting process is executed (step S2610). In the third freeze setting process, information corresponding to 30 seconds corresponding to the third freeze period is set in the freeze counter of the main RAM 74. As a result, in the normal process (FIG. 25) after the freeze setting process at the time of the transition to the bonus is completed, a positive determination is made in step S908 and the player waits until the third freeze period elapses. Therefore, the start of rotation of the reels 32L, 32M, 32R in this game is waited for during the third freeze period.

After that, the third freeze command is transmitted to the directing MPU 92 (step S2611). When the effecting side MPU 92 receives the third freeze command, the effecting mode in the upper lamp 61, the speaker 62, and the image display device 63 is set to the execution mode corresponding to the third freeze period. By confirming the effect, the player can grasp that the pseudo-bonus state ST4 in which the combination of the number of games mode and the winning rate mode is the third combination has occurred.

Next, how the freeze period is set will be described with reference to the time chart of FIG. 54. FIG. 54 (a) shows the execution period of one game, FIG. 54 (b) shows the period of the normal game state ST1, and FIG. 54 (c) shows the period of the pseudo-bonus state ST4. ) Indicates the freeze period, and FIG. 54 (e) indicates the timing at which the direct hit lottery process (step S2208) resulted in the direct hit winning.

First, a case where the transition to the pseudo-bonus state ST4 occurs without winning the direct hit in the direct hit lottery process (step S2208) will be described.

As shown in FIG. 54 (b), in the situation of the normal game state ST1, the game is executed at the timing of t1 to the timing of t2 and the timing of t3 to the timing of t4 as shown in FIG. 54 (a). Then, in the game executed from the timing of t3 to the timing of t4, the value of the transition standby counter or the number of released games counter of the main RAM 74 becomes "0", so that the gaming state is shifted to the pseudo bonus state ST4. The second start setting process (FIG. 50) is executed. Therefore, at the timing of t4, as shown in FIGS. 54 (b) and 54 (c), the normal game state ST1 ends and the pseudo bonus state ST4 starts.

Then, at the timing of t5, the first game in the pseudo-bonus state ST4 is started as shown in FIG. 54 (a). This pseudo-bonus state ST4 does not take the opportunity of being directly hit in the direct hit lottery process (step S2208), but being transferred in the transition lottery process (step S2215) or the number of released games. It is triggered by the execution of the game. Therefore, as shown in FIG. 54 (d), the freeze period is set from the timing of t5 to the timing of t6, which is the timing at which the game is started. As already described, this freeze period is any of 10 seconds, 20 seconds, and 30 seconds depending on the type of combination of the number of games mode and the winning rate mode in the pseudo bonus state ST4 this time. By making an affirmative decision in step S908 in the normal process (FIG. 25) until the freeze period elapses, the rotation of the reels 32L, 32M, 32R is started even after the winning combination lottery process (FIG. 34) is executed. Is waiting. Then, when the freeze period elapses at the timing of t6, the rotation of the reels 32L, 32M, 32R is started. After that, as shown in FIG. 54 (a), the current game ends at the timing of t7, and a new game in the pseudo-bonus state ST4 is executed from the timing of t8 to the timing of t9.

As described above, the occurrence of the freeze period makes it possible for the player to clearly recognize that the pseudo-bonus state ST4 has been started. Further, in the freeze period, the effect corresponding to the freeze period is executed by the upper lamp 61, the speaker 62, and the image display device 63. As a result, it is possible to increase the satisfaction of the player with the start of the pseudo-bonus state ST4.

Next, a case where the transition to the pseudo-bonus state ST4 occurs due to the direct hit winning in the direct hit lottery process (step S2208) will be described.

As shown in FIG. 54 (b), in the situation of the normal game state ST1, the game is executed at the timing of t10 to the timing of t11 and the timing of t12 to the timing of t14 as shown in FIG. 54 (a). In this case, at the timing of t12, as shown in FIG. 54 (e), the direct hit lottery process (step S2208) results in a direct hit winning. Therefore, as shown in FIG. 54 (d), the freeze period is set from the timing of t12 to the timing of t13. As already explained, the freeze period triggered by the direct hit is fixed at 30 seconds. Until the freeze period elapses, by making an affirmative determination in step S908 in the normal process (FIG. 25), the rotation of the reels 32L, 32M, 32R can be started even after the winning combination lottery process (FIG. 34) is executed. Wait. Then, when the freeze period elapses at the timing of t13, the rotation of the reels 32L, 32M, 32R is started.

It is possible to make the player clearly recognize that the transition to the pseudo-bonus state ST4 has occurred due to the occurrence of the freeze period in this way. Further, in the freeze period, the effect corresponding to the freeze period is executed by the upper lamp 61, the speaker 62, and the image display device 63. As a result, it is possible to increase the satisfaction of the player with the occurrence of the opportunity to shift to the pseudo-bonus state ST4.

After that, at the timing of t14, this game ends as shown in FIG. 54 (a). In this case, by executing the first start setting process (step S2303), the normal game state ST1 ends and the pseudo bonus state ST4 starts as shown in FIGS. 54 (b) and 54 (c). .. Since the pseudo-bonus state ST4 is triggered by the direct hit winning, it surely shifts to the AT state ST5 after the pseudo-bonus state ST4 ends.

Then, at the timing of t15, the first game in the pseudo-bonus state ST4 is started as shown in FIG. 54 (a). This pseudo-bonus state ST4 is triggered by the fact that the direct hit lottery process (step S2208) resulted in the direct hit winning, and the freeze period triggered by the direct hit winning has already occurred. Therefore, the freeze period triggered by the start of the first game in the pseudo-bonus state ST4 does not occur. This makes it possible to prevent the freeze period from occurring excessively. After that, as shown in FIG. 54 (a), the current game ends at the timing of t16, and a new game in the pseudo-bonus state ST4 is executed from the timing of t17 to the timing of t18.

<About pseudo bonus state ST4>
Next, the processing contents in the pseudo bonus state ST4 and the AT state ST5 will be described. FIG. 55 is a flowchart showing the advantageous state processing at the start of the game executed by the main MPU 72. The advantageous lottery process (FIG. 46) at the start of the game is performed after the winning / failing determination of the winning combination is completed in the winning combination lottery processing (FIG. 34) and the first control processing (step S1312) of the game section is executed as described above. Therefore, it is executed in step S1313, which is a process executed before the stop order notification control process (step S1314). Then, the advantageous state processing at the start of the game is executed in step S2203 in the advantageous lottery processing (FIG. 46) at the start of the game.

First, by determining whether or not the value of the bet number setting counter 74a of the main RAM 74 is "3", it is determined whether or not the bet number of this game is "3" (step S2701). If the number of bets in this game is "2" (step S2701: NO), the processes after step S2702 are not executed. As a result, even in the pseudo-bonus state ST4 or the AT state ST5, in the game in which the number of bets is "2", the processing after step S2702 is not executed.

When the number of bets in the current game is "3" (step S2701: YES), it is determined whether or not the current gaming state is the first CB state ST2 or the second CB state ST3 (step S2702). When the current gaming state is the first CB state ST2 or the second CB state ST3 (step S2702: YES), the processes after step S2703 are not executed. As a result, even if "1" is set in the pseudo bonus state flag or AT state flag of the main RAM 74, if the first CB state ST2 or the second CB state ST3 is set, the processing after step S2703 It will not be executed.

When the current gaming state is not the first CB state ST2 and the second CB state ST3 (step S2702: NO), the current state is determined by determining whether or not "1" is set in the pseudo bonus state flag of the main RAM 74. It is determined whether or not the gaming state of is the pseudo bonus state ST4 (step S2703). When the current game state is not the pseudo bonus state ST4 (step S2703: NO), it means that the current game state is the AT state ST5, so the AT state process at the start of the game is executed (step S2704). .. The processing for the AT state at the start of the game will be described later.

When the current gaming state is the pseudo bonus state ST4 (step S2703: YES), it is determined whether or not "1" is set in the AT transition confirmation flag provided in the main RAM 74 (step S2705). The AT transition confirmation flag is a flag for the main MPU 72 to specify whether or not the transition condition to the AT state ST5 has already been satisfied in the pseudo bonus state ST4. When "1" is already set in the AT transition confirmation flag (step S2705: YES), it means that the transition condition to the AT state ST5 has already been satisfied in the pseudo bonus state ST4 this time, so step S2706. The process for determining whether or not to shift to the AT state ST5 in the subsequent steps is not executed.

When "1" is not set in the AT transition confirmation flag (step S2705: NO), it is determined whether or not the transfer-corresponding winning data is stored in the main RAM 74 (step S2706). The winning data corresponding to the transition is any one of the first watermelon winning data, the second watermelon winning data, the cherry winning data, the first chance replay winning data, and the second chance replay winning data. That is, if any of the index values IV = 11 to 15 is won in the winning combination lottery process (FIG. 34) in this game, an affirmative determination is made in step S2706. If an affirmative determination is made in step S2706, the AT transition lottery process is executed (step S2707).

In the AT transition lottery process, the AT transition lottery table provided in the main ROM 73 and the lottery counter that is periodically updated in the main RAM 74 are used to shift to the AT status ST5 after the end of the pseudo bonus state ST4 this time. It is decided by lottery whether or not to let it. In the role lottery process (Fig. 34) in this game, if the first watermelon winning data is stored in the main RAM 74 (when the index value IV = 11 is won), there is a 20% probability. If the AT transition is won and the second watermelon winning data is stored in the main RAM 74 (when the index value IV = 12 is won), there is a 10% chance that the AT transition will be won and the cherry will be in the main RAM 74. When the winning data is stored (when the index value IV = 13 is won), there is a 40% chance that the AT transition will be won, and when the first chance replay winning data is stored in the main RAM 74 (when the first chance replay winning data is stored). If the index value IV = 14 is won), there is a 30% chance that the AT transition will be won, and if the second chance replay winning data is stored in the main RAM 74 (the index value IV = 15 will be won). If there is), there is a 20% chance that you will win the AT transition. In this case, the index value IV, which has a lower probability of winning in the winning combination lottery process (FIG. 34), has a higher probability of winning the AT transition. As a result, it is possible to increase the advantage of winning the index value IV having a low winning probability in the winning combination lottery process (FIG. 34).

When the AT transition is won (step S2708: YES), "1" is set in the AT transition confirmation flag of the main RAM 74 (step S2709). After that, an AT transition winning command indicating that the AT transition has been won is transmitted to the production side MPU 92 (step S2710). When the production side MPU 92 receives the AT transition winning command, the effect indicating that the AT transition has been won is executed by the upper lamp 61, the speaker 62, and the image display device 63.

Next, the pseudo-bonus process executed by the main MPU 72 will be described with reference to the flowchart of FIG. The pseudo-bonus process is executed in step S1805 in the corresponding process (FIG. 39) at the end of the game. As described above, since the corresponding processing at the end of the game is executed after all the rotations of the reels 32L, 32M, 32R in one game are stopped, the pseudo bonus processing is also executed after all the rotations of the reels 32L, 32M, 32R in one game are stopped. Is executed after.

First, by determining whether or not the value of the bet number setting counter 74a of the main RAM 74 is "3", it is determined whether or not the bet number of this game is "3" (step S2801). If the number of bets in this game is "2" (step S2801: NO), the processes after step S2802 are not executed. As a result, even if the game in which the number of bets is "2" is executed in the pseudo-bonus state ST4, the remaining number of continuous games in the pseudo-bonus state ST4 is not subtracted.

In the case of the CB state (first CB state ST2 or second CB state ST3), the pseudo-bonus process (FIG. 56) itself is not executed, so even if the CB state is started in the middle of the pseudo-bonus state ST4, the CB state is CB. The number of games played in the state is not treated as the number of games digested in the pseudo-bonus state ST4. Therefore, even if the game shifts to the CB state in the middle of the pseudo-bonus state ST4, the pseudo-bonus state ST4 is restarted from the state of the remaining number of continuous games immediately before the transition to the CB state after the end of the CB state. ..

When the number of bets in this game is "3" (step S2801: YES), the value of the pseudo-bonus continuation counter of the main RAM 74 is subtracted by 1 (step S2802). After that, it is determined whether or not the value of the pseudo-bonus continuation counter is "0" (step S2803). When the value of the pseudo-bonus continuation counter is "0" (step S2803: YES), it is determined whether or not "1" is set in the AT transition confirmation flag of the main RAM 74 (step S2804).

When "1" is set in the AT transition confirmation flag (step S2804: YES), the lottery process for the number of sets is executed (step S2805). In the set count lottery process, the initial set count of the AT state ST5 is determined by lottery by using the set count table provided in the main ROM 73 and the lottery counter that is periodically updated in the main RAM 74. As described above, the initial number of continuous games in one set of AT state ST5 is 50 games, and the number of remaining continuous games can be increased by satisfying the addition condition in the middle of the one set. When one set is completed and the remaining number of sets is "0", the AT state ST5 ends.

In the lottery process for the number of sets, if the transition trigger of the pseudo-bonus state ST4 that ended this time is triggered by a direct hit winning, or if the winning rate mode of the pseudo-bonus state ST4 that ended this time is the fifth winning rate mode, The number of initial sets of one time is selected with a probability of 20%, the number of initial sets of two times is selected with a probability of 30%, and the number of initial sets of three times is selected with a probability of 50%. In addition, when the winning rate mode of the pseudo-bonus state ST4 that has ended this time is the 4th winning rate mode or the 3rd winning rate mode, the number of initial sets of one time is selected with a probability of 30%, and two times. The initial set count is selected with a 50% probability, and the three initial set counts are selected with a 20% probability. In addition, when the winning rate mode of the pseudo-bonus state ST4 that has ended this time is the second winning rate mode or the first winning rate mode, the number of initial sets of one time is selected with a probability of 50%, and two times. The initial set count is selected with a 30% probability, and the three initial set counts are selected with a 20% probability.

After that, the storage process of the set number of times is executed (step S2806). In the set count storage process, the information on the initial set count selected in the set count lottery process is set in the set count counter of the main RAM 74. As already described, the set count counter is a counter for specifying the remaining number of sets in the AT state ST5 by the main MPU 72.

After that, "50" is set in the AT continuation counter of the main RAM 74 as information on the number of initial continuation games (step S2807). As already described, the AT continuation counter is a counter for specifying the number of remaining continuous games in one set in the AT state ST5 by the main MPU 72. Further, "1" is set in the AT state flag provided in the main RAM 74 (step S2808). The AT state flag is a flag for the main MPU 72 to specify whether or not the game state is the AT state ST5. Then, an AT transition command indicating that the transition to the AT state ST5 occurs is transmitted to the effect side MPU 92 (step S2809). When the effecting side MPU 92 receives the AT transition command, the effect indicating that the transition to the AT state ST5 occurs is executed by the upper lamp 61, the speaker 62, and the image display device 63.

After that, "1" is set in the second output start flag provided in the main RAM 74 (step S2810). The second output start flag is a flag for the main MPU 72 to specify that the external output corresponding to the start of the AT state ST5 should be executed.

On the other hand, when "1" is not set in the AT transition confirmation flag (step S2804: NO), the setting process of the end preparation state ST6 is executed (step S2811). In the setting process, "1" is set in the end preparation state flag provided in the main RAM 74. The end preparation state flag is a flag for the main MPU 72 to specify that it is the end preparation state ST6, and when the end preparation state flag is set to "1", the game state becomes the end preparation state ST6. Further, the end preparation completion flag of the main RAM 74 is cleared to "0" (step S2812). As described above, the end preparation completion flag is a flag for the main MPU 72 to specify whether or not one game has been executed in the end preparation state ST6.

In the end preparation state ST6, as described above, when an affirmative determination is made in step S2002 in the second control process (FIG. 44) of the game section and "1" is not set in the end preparation completion flag (step). S2003: NO), after setting the end preparation completion flag to "1", a process for specifying whether or not the ending condition of the second section SC2 is satisfied is executed, and the second control process of the game section in this game ( FIG. 44) ends. On the other hand, when "1" is set in the end preparation completion flag (step S2003: YES), the process for terminating the second section SC2 and shifting to the first section SC1 is executed (steps S2014 to S2016). ). As a result, the second section SC2 ends when the game following the game in which the pseudo-bonus state ST4 ends ends.

After executing the process of step S2812 in the pseudo-bonus process (FIG. 56), a bonus end command indicating that the pseudo-bonus state ST4 has ended is transmitted to the effect side MPU 92 (step S2813). When the production side MPU 92 receives the bonus end command, the upper lamp 61 is turned off. The off state continues until a new game is started. Further, when the effect side MPU 92 receives the bonus end command, the effect indicating that the pseudo bonus state ST4 has ended is executed by the speaker 62 and the image display device 63. After that, "1" is set in the external output end flag provided in the main RAM 74 (step S2814). The external output end flag is used by the main MPU 72 to specify that the external output end flag should be in the external output state corresponding to the end of the pseudo bonus state ST4 or the AT state ST5 and the transition to the normal game state ST1. It is a flag.

When the process of step S2810 or the process of step S2814 is executed, the clear process at the end of the bonus is executed (step S2815). In the clearing process at the end of the bonus, a process for clearing the area of the main RAM 74 is executed in correspondence with the end of the pseudo-bonus state ST4.

FIG. 57 is a flowchart showing a clearing process at the end of the bonus.

First, "k" is set as the start address in the clearing process in the clear target address provided in the register of the main MPU 72 (step S2901). Here, the contents of the storage area of the main RAM 74 will be described again with reference to FIG. As shown in FIG. 16, an address is set in each storage area of the main RAM 74. The address is set as serial number information. Specifically, the address of "0000" is set as the initial address, the address of "0001" is set as the address of the next order, and the address of "0002" is set as the address of the next order. The address is set so that it will be a serial number even after that.

The second CB winning data area, which is an area for storing the second CB winning data, is set as the storage area corresponding to the start address "0000", and the storage area corresponding to the next order "0001". The first CB winning data area, which is an area for storing the first CB winning data, is set, and the set value to be used is stored as the storage area corresponding to the next order "0002". A set value storage area, which is an area for the operation, is set, and a continuous game number counter 74c is set as a storage area corresponding to the next order "0003", and the next order "0004" is set. The total number of acquisitions counter 74d is set as the corresponding storage area, and the credit counter 74b is set as the storage area corresponding to the next order "0005", which corresponds to the next order "0006". A door state area 74e is set as a storage area. Further, in the storage area corresponding to "0007" to "k-3", the second section flag, the set count counter, the AT continuation counter, the AT status flag, the second output start flag, the end preparation status flag, and the end preparation completion flag , Various storage areas such as an external output end flag and a storage area for storing information indicating whether or not the replay winning is established are set. Further, the bet number history counter 74f is set as a storage area corresponding to "k-2", and the grant number history counter is set as a storage area corresponding to "k-1" which is the next order. A pseudo-bonus state flag is set as a storage area corresponding to the next order "k", and a pseudo-bonus continuation counter is set as a storage area corresponding to the next order "k + 1". The bet number setting counter 74a is set as a storage area corresponding to the order "k + 2", and the medium grant counter is set as a storage area corresponding to the next order "k + 3". Further, as the storage area of the address after "k + 4", for example, an information abnormality flag 74g, an area for storing information of the number of games mode, an area for storing information of the winning rate mode, and the like are included.

After setting "k" for the clear target address of the main MPU 72 in step S2901, the storage area of the main RAM 74 corresponding to the address set as the clear target address is cleared to "0" and initialization is executed. (Step S2902). After that, the update process of the clear target address is executed (step S2903). In the update process, by adding 1 to the value of the address to be cleared, the address set as the address to be cleared is changed to the address in the next order in the order of the addresses of the main RAM 74. Then, it is determined whether or not the updated address exceeds the end address, which is the last ordered address in the main RAM 74 (step S2904). If a negative determination is made in step S2904, the updated address storage area is cleared to "0" and initialization is executed (step S2902), and the processes of steps S2903 and S2904 are executed again. When an affirmative determination is made in step S2904, it means that the clearing process of the main RAM 74 at the end of the pseudo bonus state ST4 is completed. In this case, the clearing process at the end of this bonus ends.

When the pseudo-bonus state ST4 ends by executing the clearing process at the end of the bonus as described above, the storage area corresponding to the addresses "0000" to "k-1" in the main RAM 74 is "0". It is not cleared. The storage area corresponding to "0000" is set to the second CB winning data area as described above, and the storage area corresponding to "0001" is set to the first CB winning data area as described above. Since these storage areas are excluded from the execution target of the clearing process at the end of the bonus, even if the pseudo bonus state ST4 ends in the situation where the first CB winning data is stored in the main RAM 74, the first CB winning data remains. It is not erased, and even if the pseudo bonus state ST4 ends in the situation where the second CB winning data is stored in the main RAM 74, the second CB winning data is not erased.

As the storage area corresponding to "0002", the set value storage area is set as described above. Since the storage area is excluded from the execution target of the clearing process at the end of the bonus, the set value to be used is not deleted even when the pseudo bonus state ST4 ends. The storage area corresponding to "0003" is set with the continuous game number counter 74c as described above, and the storage area corresponding to "0004" is set with the total acquisition number counter 74d as described above. Since these storage areas are excluded from the execution target of the clearing process at the end of the bonus, the information for identifying the trigger for the establishment of the ending condition of the second section SC2 is deleted even if the pseudo bonus state ST4 ends. There is no such thing. The credit counter 74b is set in the storage area corresponding to "0005" as described above. Since the storage area is excluded from the execution target of the clearing process at the end of the bonus, the information of the credited virtual medal is not deleted even when the pseudo bonus state ST4 ends. As the storage area corresponding to "0006", the door state area 74e is set as described above. Since the storage area is excluded from the execution target of the clearing process at the end of the bonus, the information on the monitoring state of the front door 12 is not deleted even when the pseudo bonus state ST4 ends. A second section flag is set in the storage area corresponding to "0007" to "k-3". Since the second section flag is excluded from the execution target of the clearing process at the end of the bonus, the second section SC2 does not end when the pseudo bonus state ST4 ends and shifts to the AT state ST5. It becomes possible to. Further, in the storage area corresponding to "0007" to "k-3", a set count counter, an AT continuation counter, an AT status flag, a second output start flag, an end preparation status flag, an end preparation completion flag, and an external output end flag are stored. It is included. By excluding these storage areas from the execution target of the clearing process at the end of the bonus, the information referred to after the end of the pseudo-bonus state ST4 is prevented from being erased at the end of the pseudo-bonus state ST4. It becomes possible. Further, the storage area corresponding to "0007" to "k-3" includes a storage area in which information indicating whether or not the replay winning is established is stored. Since the storage area is excluded from the execution target of the clearing process at the end of the bonus, when the replay prize is established in the final game of the pseudo bonus state ST4, the profit of the replay due to the establishment of the replay prize is the pseudo bonus state. It is possible to prevent it from being erased at the end of ST4.

As described above, the bet number history counter 74f is set in the storage area corresponding to “k-2”. Since the value of the bet number setting counter 74a is set in the bet number history counter 74f in step S911 in the normal process (FIG. 25), the bet number history counter is set at the timing when the pseudo bonus process (FIG. 56) is executed. The number of bets of this game is stored in 74f. The clearing process (FIG. 57) at the end of the bonus is executed in the pseudo-bonus process (FIG. 56), and the pseudo-bonus process (FIG. 56) is executed in the corresponding process (FIG. 39) at the end of the game. However, in the corresponding process at the end of the game (FIG. 39), the second control process (FIG. 44) of the game section is executed after the pseudo-bonus process (FIG. 56) is completed. In the second control process (FIG. 44) of the game section, the value of the total acquisition number counter 74d is made to correspond to the content of the current game in order to specify whether or not the ending condition of the second section SC2 is satisfied as already explained. The updating process (steps S2007 to S2012) is executed, and in step S2008 in the updating process, a process of subtracting the number of bets of the current number of games from the value of the total acquired number counter 74d is executed. At the time of this subtraction, the value of the bet number history counter 74f is subtracted from the value of the total acquisition number counter 74d. Under such circumstances, since the bet number history counter 74f is excluded from the execution target of the clearing process at the end of the bonus, the second control process of the game section after the clearing process at the end of the bonus is executed (FIG. Even if the process of subtracting the number of bets of the current game from the value of the total number of acquisition counters 74d is executed in 44), the subtraction process can be appropriately performed.

As described above, the grant number history counter is set in the storage area corresponding to "k-1". Since the value of the medium grant counter is set in the grant number history counter in step S911 in the normal process (FIG. 25), the grant number history counter this time is set at the timing when the pseudo bonus process (FIG. 56) is executed. The number of game media given in the game of is stored. The clearing process (FIG. 57) at the end of the bonus is executed in the pseudo-bonus process (FIG. 56), and the pseudo-bonus process (FIG. 56) is executed in the corresponding process (FIG. 39) at the end of the game. However, in the corresponding process at the end of the game (FIG. 39), the second control process (FIG. 44) of the game section is executed after the pseudo-bonus process (FIG. 56) is completed. In the second control process (FIG. 44) of the game section, the value of the total acquisition number counter 74d is made to correspond to the content of the current game in order to specify whether or not the ending condition of the second section SC2 is satisfied as already explained. The updating process (steps S2007 to S2012) is executed, and in step S2010 in the updating process, a process of adding the number of game media given in the current game to the value of the total acquisition number counter 74d is executed. To. At the time of this addition, the value of the grant number history counter is added to the value of the total acquisition number counter 74d. Under such circumstances, since the grant number history counter is excluded from the execution target of the clearing process at the end of the bonus, the second control process of the game section (FIG. 44) after the clearing process at the end of the bonus is executed. ), Even if the process of adding the number of game media given in the current game to the value of the total acquired number counter 74d is executed, it is possible to appropriately perform the process of adding. ..

On the other hand, when the pseudo-bonus state ST4 ends, the storage area corresponding to the address after "k" in the main RAM 74 is cleared to "0" and initialized. The pseudo-bonus state flag is set in the storage area corresponding to "k" as described above, and the pseudo-bonus continuation counter is set in the storage area corresponding to "k + 1" as described above. Further, as the storage area of the address after "k + 4", an area for storing the information of the number of games mode and the area for storing the information of the winning rate mode are included. Since these storage areas are included in the execution target of the clear process at the end of the bonus, the storage area used in the pseudo-bonus state ST4 is cleared to "0" and initialized at the end of the pseudo-bonus state ST4. It becomes possible to.

The bet number setting counter 74a is set in the storage area corresponding to "k + 2" as described above, and the medium grant counter is set in the storage area corresponding to "k + 3" as described above. As described above, the number of bets for one game is set in the bet number setting counter 74a, and the display content of the bet display unit 64 is the display content corresponding to the information stored in the bet number setting counter 74a. When the value of the bet number setting counter 74a is "0", all three light emitting units of the bet display unit 64 are turned off. Further, as described above, the number of game media assigned in one game is set in the medium assignment counter, and the display content of the dual-purpose display unit 66 is not notified of the stop order of the reels 32L, 32M, 32R. The display content corresponds to the information stored in the medium grant counter in the situation. When the value of the medium addition counter is "0" in the situation where the notification of the stop order of the reels 32L, 32M, 32R is not executed, all the light emitting units of the dual-purpose display unit 66 are turned off. In such a configuration, since the bet number setting counter 74a and the medium grant counter are included in the execution target of the clearing process at the end of the bonus, the bet display unit 64 and the combined display unit 66 are turned off at the end of the pseudo bonus state ST4. It becomes possible to make it into a state. The off state of the bet display unit 64 is continued until a value of 1 or more is set in the bet number setting counter 74a, and the off state of the combined display unit 66 is newly started to notify the stop order of the reels 32L, 32M, 32R. It is continued until the value is set to 1 or more in the medium grant counter.

The execution timing of various processes when the pseudo-bonus state ST4 ends will be described with reference to the time chart of FIG. 58. FIG. 58 (a) shows the execution period of one game, FIG. 58 (b) shows the period in which the pseudo-bonus state ST4 is present, and FIG. 58 (c) shows the history storage process (step S911) of the normal process (FIG. 25). 58 (d) shows the timing at which the bet display unit 64 and the combined display unit 66 are all turned off, and FIG. 58 (e) shows the second control process of the game section (FIG. 44). Indicates when is executed.

As shown in FIG. 58 (b), in the situation of the pseudo bonus state ST4, a new game is started at the timing of t1 as shown in FIG. 58 (a). The game is the final game in the pseudo-bonus state ST4. After that, at the timing of t2, which is the timing after all the rotations of the reels 32L, 32M, and 32R in this game are stopped and the medium addition process (step S910) of the normal process (FIG. 25) is completed, FIG. 58 (c) is shown. As shown in FIG. 25, the history storage process (step S911) of the normal process (FIG. 25) is executed. As a result, the value of the bet number setting counter 74a of the main RAM 74 is set in the bet number history counter 74f of the main RAM 74, and the value of the medium grant counter of the main RAM 74 is set in the grant number history counter of the main RAM 74. Will be done.

After that, the pseudo-bonus state flag of the main RAM 74 is cleared to "0" by executing the clear process (FIG. 57) at the end of the bonus in the pseudo-bonus process (FIG. 56) at the timing of t3. Therefore, at the timing of t3, the pseudo bonus state ST4 ends as shown in FIG. 58 (b). Further, in the clearing process at the end of the bonus (FIG. 57), the bet number setting counter 74a of the main RAM 74 is cleared by "0" and the medium grant counter of the main RAM 74 is cleared by "0". Therefore, at the timing of t3, the bet display unit 64 and the combined display unit 66 are turned off as shown in FIG. 58 (d). If the dual-purpose display unit 66 has already been turned off, the turned-off state is maintained.

When the pseudo-bonus state ST4 ends, the bet display unit 64 and the combined display unit 66 are turned off, so that the player can easily recognize that the pseudo-bonus state ST4 has ended. Further, the manager of the game hall confirms whether or not the bet display unit 64 and the combined display unit 66 are turned off, so that the pseudo bonus state ST4 is set on the image display device 63 whose display is controlled by the production side MPU 92. It is possible to confirm whether or not it is a legitimate one when the effect indicating that the transition to the AT state ST5 occurs after the end is executed.

After that, at the timing of t4, the second control process (FIG. 44) of the game section is executed as shown in FIG. 58 (e). As described above, since the history storage process (step S911) is executed at the timing of t2, which is the timing before the timing of t3 at which the clear process (FIG. 57) at the end of the bonus is executed, the main RAM 74 The value of the bet number setting counter 74a is set in the bet number history counter 74f of the main RAM 74, and the value of the medium grant counter of the main RAM 74 is set in the grant number history counter of the main RAM 74. Then, in the second control process (FIG. 44) of the game section, a process for updating the value of the total acquisition number counter 74d is executed by using the information stored in the bet number history counter 74f and the grant number history counter. .. As a result, even if the clearing process (FIG. 57) at the end of the bonus is executed as described above, the value of the total acquisition number counter 74d can be appropriately updated. After that, as shown in FIG. 58 (a), the current game ends at the timing of t5, and a new game starts at the timing of t6.

<About AT state ST5>
Next, the processing contents executed in the AT state ST5 will be described. FIG. 59 is a flowchart showing the AT state processing at the start of the game executed by the main MPU 72. The AT state process at the start of the game is executed in step S2704 in the advantageous state process (FIG. 55) at the start of the game as described above.

First, it is determined whether or not "1" is set in any of the first ending flag and the second ending flag of the main RAM 74 (step S3001). As already explained, the first ending flag is for the main MPU 72 to specify that the number of game executions in the second section SC2 measured by using the continuous game number counter 74c reaches the upper limit number of games. It is a flag. As already explained, the second ending flag has a high possibility that the limited total net increase number of the game medium measured using the total acquisition number counter 74d will reach the upper limit net increase number at the main MPU 72. It is a flag to identify. If "1" is set in either the first ending flag or the second ending flag (step S3001: YES), the processes after step S3002 are not executed. As a result, in a situation where the number of times the game is executed in the second section SC2 reaches the upper limit number of games, or a situation where the total net increase number with restrictions on the game medium is likely to reach the upper limit net increase number, in step S3002 or later. The process for adding the number of continuous games or the number of sets in the AT state ST5 will not be executed.

When "1" is not set in both the first ending flag and the second ending flag (step S3001: NO), it is determined whether or not the value of the addition period counter provided in the main RAM 74 is 1 or more. By doing so, it is determined whether or not the current state is the additional period in the AT state ST5 (step S3002). The additional period counter is a counter for the main MPU 72 to specify whether or not it is an additional period and the number of continuous games remaining in the additional period.

When the value of the addition period counter is "0" and not the addition period (step S3002: NO), it is determined whether or not the transfer-corresponding winning data is stored in the main RAM 74 (step S3003). The winning data corresponding to the transition is any one of the first watermelon winning data, the second watermelon winning data, the cherry winning data, the first chance replay winning data, and the second chance replay winning data. That is, if any of the index values IV = 11 to 15 is won in the winning combination lottery process (FIG. 34) in this game, an affirmative determination is made in step S3003. If an affirmative determination is made in step S3003, the transition lottery process for the additional period is executed (step S3004).

In the addition period transition lottery process, the addition of the remaining number of sets in the AT state ST5 is performed by using the addition period transition lottery table provided in the main ROM 73 and the lottery counter that is periodically updated in the main RAM 74. It is decided by lottery whether or not to shift to the additional period that is likely to occur. In the role lottery process (FIG. 34) in this game, if the first watermelon winning data is stored in the main RAM 74 (when the index value IV = 11 is won), there is a 10% probability. If the transfer of the additional period is won and the second watermelon winning data is stored in the main RAM 74 (when the index value IV = 12 is won), there is a 5% chance that the transfer of the additional period will be won. If the cherry winning data is stored in the side RAM 74 (when the index value IV = 13 is won), there is a 20% chance that the additional period will be won, and the first chance replay winning data will be stored in the main RAM 74. If it is stored (if the index value IV = 14 is won), there is a 15% chance that the additional period will be won, and if the second chance replay winning data is stored in the main RAM 74 (index). If the value IV = 15 is won), there is a 10% chance that the additional period will be won. In this case, the index value IV, which has a lower probability of winning in the winning combination lottery process (FIG. 34), has a higher probability of winning the transition of the additional period. As a result, it is possible to increase the advantage of winning the index value IV having a low winning probability in the winning combination lottery process (FIG. 34).

If the transition of the additional period is won (step S3005: YES), the addition process of the number of continuous games is executed (step S3006). In the process of adding the number of continuous games, the number of games equal to or greater than the number of continuous games for which the additional period will continue is added to the value of the AT continuation counter of the main RAM 74. Specifically, the addition period will continue for 10 games, but in step S3006, 20 games, which is the number of games of 10 games or more, is added to the value of the AT continuation counter of the main RAM 74. As a result, it is possible to prevent the number of continuous games remaining in the AT state ST5 from becoming "0" in the middle of the addition period.

After that, the first addition command is transmitted to the effect side MPU 92 (step S3007). The first addition command is a command for causing the production side MPU 92 to recognize that an addition of the number of games has occurred at the time of transition to the addition period. In addition, the first addition command includes information on 20 games, which is the number of games to be added this time. When the production side MPU 92 receives the first addition command, the production indicating that the number of games has been added at the time of transition to the addition period is executed by the upper lamp 61, the speaker 62, and the image display device 63. To do. After that, "1" is set in the additional winning flag provided in the main RAM 74 (step S3008). The additional winning flag is a flag for the main MPU 72 to specify that the transition winning of the additional period has been achieved in the transition lottery process (step S3004) of the additional period.

If the transition winning of the addition period is not achieved in the transition lottery process of the addition period (step S3004) (step S3005: NO), the first addition lottery process is executed (step S3009). In the first additional lottery process, the remaining number of sets of the AT state ST5 is increased by using the first additional lottery table provided in the main ROM 73 and the lottery counter that is periodically updated in the main RAM 74. It is decided by lottery whether or not to generate the additional addition. When the first watermelon winning data is stored in the main RAM 74 (when the index value IV = 11 is won), one set of addition is selected with a probability of 10%, and 2 with a probability of 10%. The addition of the set is selected, and there is an 80% chance that it will be missed. When the second watermelon winning data is stored in the main RAM 74 (when the index value IV = 12 is won), one set of addition is selected with a probability of 5%, and 2 with a probability of 5%. The addition of the set is selected, and there is a 90% chance that it will be missed. When the cherry winning data is stored in the main RAM 74 (when the index value IV = 13 is won), one set is selected with a 20% probability, and two sets are selected with a 20% probability. An extra is selected and there is a 60% chance that it will be missed. When the first chance replay winning data is stored in the main RAM 74 (when the index value IV = 14 is won), one set of addition is selected with a probability of 15%, and there is a probability of 15%. Two sets of extras are selected and there is a 70% chance that they will be missed. When the second chance replay winning data is stored in the main RAM 74 (when the index value IV = 15 is won), one set of addition is selected with a probability of 10%, and there is a probability of 10%. Two sets of extras are selected and there is an 80% chance that they will be missed. In this case, the index value IV, which has a lower probability of winning in the winning combination lottery process (FIG. 34), has a higher probability of being additionally won. In addition, the index value IV, which has a lower probability of winning in the winning combination lottery process (FIG. 34), increases the expected value of the number of sets to be added. As a result, it is possible to increase the advantage of winning the index value IV having a low winning probability in the winning combination lottery process (FIG. 34).

When either one set of addition or two sets of addition is selected in the first addition lottery process (step S3009) and the addition is won (step S3010: YES), the addition process of the number of sets is executed (step S3010: YES). S3011). In the set number addition process, the set number selected in the first additional lottery process (step S3009) is added to the set number counter of the main RAM 74. After that, the second addition command is transmitted to the production side MPU 92 (step S3012). The second addition command is for causing the production side MPU 92 to recognize that the additional set has been won in the first additional lottery process (step S3009) and the number of additional sets selected in the first additional lottery process (step S3009). It is a command, and the second addition command includes information corresponding to the number of additional sets selected in the first additional lottery process (step S3009). When the effect side MPU 92 receives the second addition command, the effect indicating that the addition of the number of sets has occurred is executed by the upper lamp 61, the speaker 62, and the image display device 63.

When the value of the addition period counter of the main RAM 74 is 1 or more and the addition period is set (step S3002: YES), the second addition lottery process is executed (step S3013). In the second additional lottery process, a set to be added to the remaining number of sets in the AT state ST5 by using the second additional lottery table provided in the main ROM 73 and the lottery counter that is periodically updated in the main RAM 74. The number of times is decided by lottery.

In the second addition lottery process (step S3013), when an index value IV other than the index value IV = 11 to 15 is won, one set of addition is selected with a probability of 80%, and two sets are selected with a probability of 10%. An extra is selected, and there is a 10% chance that 3 sets of extras will be selected. When the first watermelon winning data is stored in the main RAM 74 (when the index value IV = 11 is won), one set of addition is selected with a probability of 50%, and 2 with a probability of 25%. A set addition is selected, and there is a 25% chance that 3 sets will be added. When the second watermelon winning data is stored in the main RAM 74 (when the index value IV = 12 is won), one set of addition is selected with a probability of 60%, and 2 with a probability of 20%. A set addition is selected, and there is a 20% chance that 3 sets will be added. When the cherry winning data is stored in the main RAM 74 (when the index value IV = 13 is won), one set is selected with a 20% probability, and two sets are selected with a 40% probability. Additions are selected, and there is a 40% chance that 3 sets of additions will be selected. When the first chance replay winning data is stored in the main RAM 74 (when the index value IV = 14 is won), one set of addition is selected with a probability of 30%, and there is a probability of 35%. Two sets of additions are selected, and there is a 35% chance that three sets of additions will be selected. When the second chance replay winning data is stored in the main RAM 74 (when the index value IV = 15 is won), one set of addition is selected with a probability of 50%, and there is a probability of 25%. Two sets of additions are selected, and there is a 25% chance that three sets of additions will be selected. In this case, the lower the index value IV, which has a lower probability of winning in the winning combination lottery process (FIG. 34), the higher the expected value of the number of sets to be added. As a result, it is possible to increase the advantage of winning the index value IV having a low winning probability in the winning combination lottery process (FIG. 34).

After that, the process of adding the number of sets is executed (step S3014). In the set count addition process, the set count selected in the second additional lottery process (step S3013) is added to the set count counter of the main RAM 74. After that, the third addition command is transmitted to the effect side MPU 92 (step S3015). The third addition command is a command for causing the production side MPU 92 to recognize the number of sets selected in the second addition lottery process (step S3013), and the second addition lottery process (step S3013) is applied to the third addition command. Contains information corresponding to the number of additional sets selected in. When the effect side MPU 92 receives the third addition command, the effect indicating that the addition of the number of sets has occurred is executed by the upper lamp 61, the speaker 62, and the image display device 63.

FIG. 60 is a flowchart showing an AT process executed by the main MPU 72. The AT process is executed in step S1806 in the corresponding process (FIG. 39) at the end of the game. As described above, since the corresponding processing at the end of the game is executed after all the rotations of the reels 32L, 32M, 32R in one game are stopped, the AT processing is also executed after all the rotations of the reels 32L, 32M, 32R in one game are stopped. Will be executed later.

First, by determining whether or not the value of the bet number setting counter 74a of the main RAM 74 is "3", it is determined whether or not the bet number of this game is "3" (step S3101). If the number of bets in this game is "2" (step S3101: NO), the processes after step S3102 are not executed. As a result, even if the game in which the number of bets is "2" is executed in the AT state ST5, the remaining number of continuous games in the AT state ST5 is not subtracted, and the remaining additional period in the AT state ST5 remains. The number of continuous games is not subtracted.

In the case of the CB state (first CB state ST2 or second CB state ST3), the AT process (FIG. 60) itself is not executed. Therefore, even if the CB state is started in the middle of the AT state ST5, the CB state is used. The number of games executed is not treated as the number of games digested in the AT state ST5. Therefore, even if the game shifts to the CB state in the middle of the AT state ST5, the AT state ST5 is restarted from the state of the remaining number of continuous games immediately before the transition to the CB state after the end of the CB state.

When the number of bets in this game is "3" (step S3101: YES), the value of the AT continuation counter of the main RAM 74 is subtracted by 1 (step S3102). After that, by determining whether or not the value of the addition period counter of the main RAM 74 is 1 or more, it is determined whether or not the current state is the addition period (step S3103).

When the value of the addition period counter is "0" and not the addition period (step S3103: NO), it is determined whether or not "1" is set in the addition winning flag of the main RAM 74 (step S3104). At the start of this game, if the transition winning of the addition period is achieved in the addition period transition lottery process (step S3004), the additional winning flag is set to "1".

When "1" is set in the addition winning flag (step S3104: YES), the addition period setting process is executed (step S3105). In the addition period setting process, a value corresponding to 10 games, which is the initial number of continuous games of the addition period, is set in the addition period counter of the main RAM 74. Then, after clearing the additional winning flag "0" (step S3106), the start command of the additional period is transmitted to the production side MPU 92 (step S3107). The start command of the addition period is a command for causing the production side MPU 92 to recognize that the addition period has been started. When the effecting side MPU 92 receives the command to start the addition period, the effect indicating that the addition period has started and the effect indicating that the addition period has started are executed by the upper lamp 61, the speaker 62, and the image display device 63. To do so.

When the value of the addition period counter is 1 or more and it is the addition period (step S3103: YES), the value of the addition period counter is subtracted by 1 (step S3108). Then, when the value of the addition period counter after the 1 subtraction becomes "0" (step S3109: YES), the end command of the addition period is transmitted to the effect side MPU 92 (step S3110). The end command of the addition period is a command for causing the effector MPU 92 to recognize that the addition period has ended. When the effecting side MPU 92 receives the end command of the addition period, the effect indicating that the addition period has ended is executed by the upper lamp 61, the speaker 62, and the image display device 63.

When a negative determination is made in step S3104, when the process of step S3107 is executed, when a negative determination is made in step S3109, or when the process of step S3110 is executed, the value of the AT continuation counter of the main RAM 74 is "0". (Step S3111). When the value of the AT continuation counter is "0" (step S3111: YES), the value of the set count counter of the main RAM 74 is subtracted by 1 (step S3112). Then, it is determined whether or not the value of the set count counter after the 1 subtraction is "0" (step S3113).

When the value of the set count counter is 1 or more (step S3113: NO), the process for starting a new set in the AT state ST5 is executed. Specifically, first, "50" is set as the initial number of continuous games of a new set in the AT continuation counter of the main RAM 74 (step S3114). After that, the AT continuation command is transmitted to the production side MPU 92 (step S3115). The AT continuation command is a command for causing the directing MPU 92 to recognize that a new set of the AT state ST5 has been started. When the effect side MPU 92 receives the AT continuation command, the effect indicating that a new set of the AT state ST5 has been started is executed by the upper lamp 61, the speaker 62, and the image display device 63.

After that, "1" is set in the third output start flag provided in the main RAM 74 (step S3116). The third output start flag is a flag for the main MPU 72 to specify that the external output corresponding to the start of a new set of the AT state ST5 should be executed.

When the value of the set count counter is "0" (step S3113: YES), the setting process of the end preparation state ST6 is executed (step S3117). In the setting process, "1" is set in the end preparation state flag provided in the main RAM 74. The end preparation state flag is a flag for the main MPU 72 to specify that it is the end preparation state ST6, and when the end preparation state flag is set to "1", the game state becomes the end preparation state ST6. Further, the end preparation completion flag of the main RAM 74 is cleared to "0" (step S3118). As described above, the end preparation completion flag is a flag for the main MPU 72 to specify whether or not one game has been executed in the end preparation state ST6.

In the end preparation state ST6, as described above, when an affirmative determination is made in step S2002 in the second control process (FIG. 44) of the game section and "1" is not set in the end preparation completion flag (step). S2003: NO), after setting the end preparation completion flag to "1", a process for specifying whether or not the ending condition of the second section SC2 is satisfied is executed, and the second control process of the game section in this game ( FIG. 44) ends. On the other hand, when "1" is set in the end preparation completion flag (step S2003: YES), the process for terminating the second section SC2 and shifting to the first section SC1 is executed (steps S2014 to S2016). ). As a result, the second section SC2 ends when the game following the game in which the AT state ST5 has ended ends.

After executing the process of step S3118 in the AT process (FIG. 60), the AT state flag of the main RAM 74 is cleared to "0" (step S3119). As a result, the AT state ST5 ends, and the gaming state becomes the normal gaming state ST1. Further, an AT end command indicating that the AT state ST5 has ended is transmitted to the effect side MPU 92 (step S3120). When the effect side MPU 92 receives the AT end command, the effect indicating that the AT state ST5 has ended is executed by the upper lamp 61, the speaker 62, and the image display device 63. After that, "1" is set in the external output end flag of the main RAM 74 (step S3121). The external output end flag is used by the main MPU 72 to specify that the external output end flag should be in the external output state corresponding to the end of the pseudo bonus state ST4 or the AT state ST5 and the transition to the normal game state ST1. It is a flag.

<About external output setting processing>
Next, the external output setting process executed in step S913 of the normal process (FIG. 25) will be described. The external output setting process is executed after all the rotations of the reels 32L, 32M, and 32R are stopped, and the process for shifting the game state is completed in the corresponding process (FIG. 39) at the end of the game.

In the external output setting process, a process for externally outputting an external signal to the management computer of the game hall is executed through each output terminal provided on the external output terminal plate 78. The external output terminal plate 78 is provided with a first output terminal and a second output terminal.

The first output terminal and the main MPU 72 are electrically connected through the first signal path, and the HI level first external signal is transmitted from the main MPU 72 through the first signal path to obtain the first output. The HI level first external signal is transmitted to the management computer of the game hall through the terminal. The details will be described later, but in the case of the pseudo-bonus state ST4, the first external signal becomes the HI level, and even when one set of the AT state ST5 is continued, the first external signal becomes the HI level, and other than that. In this case, the first external signal becomes the LOW level. In the game hall management computer, the slot machine 10 is in the pseudo bonus state ST4 or the AT state ST5 by knowing that the first external signal output externally from the slot machine 10 is at the HI level. By measuring the number of times the output state of the first external signal is switched from the LOW level to the HI level, the number of times the pseudo bonus state ST4 is generated and the number of times the AT state ST5 is set are generated in the slot machine 10. It is possible to specify the total number of times with the number of times.

The second output terminal and the main MPU 72 are electrically connected through the second signal path, and the second output is obtained by transmitting the HI level second external signal from the main MPU 72 through the second signal path. The HI level second external signal is transmitted to the management computer of the game hall through the terminal. Although the details will be described later, when the transition from the pseudo bonus state ST4 to the AT state ST5 occurs, the second external signal becomes the HI level, and in other cases, the second external signal becomes the LOW level. The management computer of the game hall shifts the slot machine 10 from the pseudo bonus state ST4 to the AT state ST5 by knowing that the second external signal output externally from the slot machine 10 is at the HI level. By identifying the situation and measuring the number of times the output state of the second external signal is switched from the LOW level to the HI level, the transition from the pseudo bonus state ST4 to the AT state ST5 in the slot machine 10 can be performed. It is possible to specify the number of times it has occurred.

FIG. 61 is a flowchart showing an external output setting process.

First, it is determined whether or not "1" is set in the first output start flag of the main RAM 74 (step S3201). As described above, the first output start flag is set to "1" when the game state shifts from the normal game state ST1 to the pseudo bonus state ST4. When "1" is set in the first output start flag (step S3201: YES), the first output start flag is cleared to "0" (step S3202). Then, "1" is set in the output timing counter provided in the main RAM 74 (step S3203). The output timing counter is a counter for the main MPU 72 to specify whether or not the first external signal needs to be changed from the LOW level to the HI level, and the first external signal is changed from the LOW level to the HI level. It is a counter for specifying the timing by the main MPU 72. The details will be described later, but by setting "1" in the output timing counter, the first external signal is switched from the LOW level to the HI level at the end of this game.

In the external output setting process, it is determined whether or not "1" is set in the second output start flag of the main RAM 74 (step S3204). As described above, the second output start flag is set to "1" when the gaming state shifts from the pseudo bonus state ST4 to the AT state ST5. When "1" is set in the second output start flag (step S3204: YES), the second output start flag is cleared to "0" (step S3205). Then, "2" is set in the output timing counter of the main RAM 74 (step S3206). Details will be described later, but by setting "2" to the output timing counter, the first external signal is switched from the HI level to the LOW level at the end of this game, and the first external signal is further at the end of the next game. Is switched from the LOW level to the HI level.

After that, the ON setting process of the second external signal is executed (step S3207). In the ON setting process, the output state of the second external signal is switched from the LOW level to the HI level. As a result, the HI level second external signal is transmitted from the main MPU 72 to the second output terminal through the second signal path, and the HI level second external signal is externally output to the management computer of the game hall through the second output terminal. Will be done.

In the external output setting process, it is determined whether or not "1" is set in the third output start flag of the main RAM 74 (step S3208). As described above, the third output start flag is set to "1" when a new set of the AT state ST5 is started. When "1" is set in the third output start flag (step S3208: YES), the third output start flag is cleared to "0" (step S3209). Then, "2" is set in the output timing counter of the main RAM 74 (step S3210). Details will be described later, but by setting "2" to the output timing counter, the first external signal is switched from the HI level to the LOW level at the end of this game, and the first external signal is further at the end of the next game. Is switched from the LOW level to the HI level.

In the external output setting process, the external output process is executed after the processes of steps S3201 to S3210 are executed (step S3211). FIG. 62 is a flowchart showing a process for external output.

When the value of the output timing counter of the main RAM 74 is 1 or more (step S3301: YES), the value of the output timing counter is subtracted by 1 (step S3302). Then, it is determined whether or not the value of the output timing counter after the subtraction of 1 is "1" (step S3303). When the value of the output timing counter after 1 subtraction becomes "1", the output timing is set in step S3206 of the external output setting process (FIG. 61) when the transition from the pseudo bonus state ST4 to the AT state ST5 occurs. When "2" is set in the counter, or when "2" is set in the output timing counter in step S3210 of the external output setting process (FIG. 61) when a new set of the AT state ST5 is started. Is.

When the value of the output timing counter after 1 subtraction is "1" (step S3303: YES), after executing the OFF setting process of the first external signal (step S3304), the external output process ends. In the OFF setting process, the output state of the first external signal is switched from the HI level to the LOW level. As a result, the LOW level first external signal is transmitted from the main MPU 72 to the first output terminal through the first signal path, and the LOW level first external signal is externally output to the management computer of the game hall through the first output terminal. Will be done.

If the value of the output timing counter after subtraction is not "1", it means that the value of the output timing counter is "0". This is because "1" or "2" is set in the output timing counter in the external output setting process (FIG. 61). When the value of the output timing counter after 1 subtraction is "0", it means that the transition from the normal game state ST1 to the pseudo bonus state ST4 has occurred in this game, and the external output setting process (FIG. 61). This corresponds to the case where "1" is set in the output timing counter in this processing time. In addition to that, "2" is set in the output timing counter in the previous processing times of the external output setting processing (FIG. 61) due to the transition from the pseudo bonus state ST4 to the AT state ST5 in the previous game. When it is set, or when a new set of AT state ST5 is started in the previous game and "2" is set in the output timing counter in the previous processing times of the external output setting processing (FIG. 61). The case where the first game is executed in the AT state ST5 shifted from the pseudo-bonus state ST4 or the case where the first game is executed in the new set of the AT state ST5 is applicable.

When the value of the output timing counter is "0" (step S3303: NO), the OFF setting process of the second external signal is executed (step S3305). In the OFF setting process, the output state of the second external signal is switched from the HI level to the LOW level. As a result, the LOW level second external signal is transmitted from the main MPU 72 to the second output terminal through the second signal path, and the LOW level second external signal is externally output to the management computer of the game hall through the second output terminal. Will be done. If the output state of the second external signal is already at the LOW level, the LOW level state is maintained.

Then, after executing the ON setting process of the first external signal (step S3306), the external output process is terminated. In the ON setting process, the output state of the first external signal is switched from the LOW level to the HI level. As a result, the HI level first external signal is transmitted from the main MPU 72 to the first output terminal through the first signal path, and the HI level first external signal is externally output to the management computer of the game hall through the first output terminal. Will be done.

In the external output process, when it is determined in step S3301 that the value of the output timing counter is "0", it is determined whether or not "1" is set in the external output end flag of the main RAM 74 (step S3307). ). As described above, the external output end flag is set to "1" when the pseudo bonus state ST4 or the AT state ST5 ends and shifts to the normal game state ST1. When "1" is set in the external output end flag (step S3307: YES), the external output end flag is cleared to "0" (step S3308). Then, after executing the OFF setting process of the first external signal (step S3309), the external output process is terminated. In the OFF setting process, the output state of the first external signal is switched from the HI level to the LOW level. As a result, the LOW level first external signal is transmitted from the main MPU 72 to the first output terminal through the first signal path, and the LOW level first external signal is externally output to the management computer of the game hall through the first output terminal. Will be done.

Next, how the output modes of the first external signal and the second external signal are appropriately changed will be described with reference to the time chart of FIG. 63. FIG. 63 (a) shows the execution period of one game, FIG. 63 (b) shows the period of the normal game state ST1, and FIG. 63 (c) shows the period of the pseudo-bonus state ST4. ) Indicates the period during which the AT state is ST5, FIG. 63 (e) indicates the timing at which a new set is started in the AT state ST5, and FIG. 63 (f) indicates the timing at which one set is completed in the AT state ST5. 63 (g) shows the output state of the first external signal, and FIG. 63 (h) shows the output state of the second external signal.

As shown in FIG. 63 (b), in the situation where the normal game state is ST1, a new game is started at the timing of t1 as shown in FIG. 63 (a). The game is a game that triggers a transition from the normal game state ST1 to the pseudo-bonus state ST4. Therefore, at the end of the game, the gaming state shifts from the normal gaming state ST1 to the pseudo-bonus state ST4 as shown in FIGS. 63 (b) and 63 (c). Further, since "1" is set in the output timing counter of the main RAM 74 in step S3203 of the external output setting process (FIG. 61) in the game, the output timing is set in step S3302 in the external output process (FIG. 62). Since the value of the counter is subtracted by 1 and the value of the output timing counter after the subtraction is 1 becomes "0", the ON setting process (step S3306) of the first external signal is executed. Therefore, at the timing of t2, the state of the external output of the first external signal is switched from the LOW level to the HI level as shown in FIG. 63 (g).

After that, as shown in FIG. 63 (c), in a situation where the pseudo-bonus state ST4 continues, as shown in FIG. 63 (a), a plurality of timings including t3 timing to t4 timing and t5 timing to t6 timing are included. Game is executed repeatedly. Then, the game from the timing of t5 to the timing of t6 becomes the final game of the pseudo bonus state ST4. Since the transition condition to the AT state ST5 is satisfied in the pseudo bonus state ST4, the gaming state changes from the pseudo bonus state ST4 to the AT state ST5 at the timing of t6 as shown in FIGS. 63 (c) and 63 (d). Move to. Further, since "2" is set in the output timing counter of the main RAM 74 in step S3206 of the external output setting process (FIG. 61) in the game, the output timing is set in step S3302 in the external output process (FIG. 62). Since the value of the counter is subtracted by 1 and the value of the output timing counter after the subtraction is 1 is "1", the OFF setting process (step S3304) of the first external signal is executed. Therefore, at the timing of t6, the state of the external output of the first external signal is switched from the HI level to the LOW level as shown in FIG. 63 (g). Further, since the ON setting process of the second external signal is executed in step S3207 of the external output setting process (FIG. 61) in the game, the second external signal of the second external signal is executed at the timing of t6 as shown in FIG. 63 (h). The state of the external output is switched from the LOW level to the HI level.

After that, as shown in FIG. 63A, the first game in the AT state ST5 started this time is started at the timing of t7. In this case, at the timing of t7, a new set of AT state ST5 is started as shown in FIG. 63 (e). After that, as shown in FIG. 63A, the first game ends at the timing of t8. In this case, the value of the output timing counter of the main RAM 74 is "1" when the external output setting process (FIG. 61) at the end of the game is started. Therefore, in the external output process (FIG. 62), the value of the output timing counter is subtracted by 1 in step S3302, and the value of the output timing counter after the subtraction is 1 becomes "0", so that the second external signal is turned off. The setting process (step S3305) is executed, and the ON setting process (step S3306) of the first external signal is executed. Therefore, at the timing of t8, the state of the external output of the second external signal is switched from the HI level to the LOW level as shown in FIG. 63 (h), and the state of the first external signal is switched as shown in FIG. 63 (g). The state of the external output is switched from the LOW level to the HI level.

That is, when the transition from the pseudo bonus state ST4 to the AT state ST5 occurs, the output state of the first external signal is first switched from the previous HI level to the LOW level at the end of the final game of the pseudo bonus state ST4. At the same time, the output state of the second external signal is switched from the previous LOW level to the HI level. Then, when the first game in the AT state ST5 is started and the game ends, the output state of the second external signal is switched from the previous HI level to the LOW level, and the output state of the first external signal is changed. The previous LOW level can be switched to the HI level. In the game hall management computer, by grasping that the output period of the first external signal of the HI level is generated with the output period of the second external signal of the HI level in between in this way, the slot machine 10 has a pseudo bonus. It is possible to specify that the state ST4 has ended and the AT state ST5 has been newly started.

Further, from the end of the final game in the pseudo-bonus state ST4 to the end of the first game in the AT state ST5, the first external signal is maintained at the LOW level and the second external signal is maintained at the HI level. This makes it possible to set the period during which the first external signal is maintained at the LOW level and the period during which the second external signal is maintained at the HI level to be longer than the shortest period required to execute one game. Become. Therefore, it is possible to reduce the possibility that the output period of the first external signal of the HI level is overlooked by the management computer of the game hall with the output period of the second external signal of the HI level in between. It becomes.

After that, as shown in FIG. 63A, the final game of the current set in the AT state ST5 is started at the timing of t9. Then, at the timing of t10, as shown in FIGS. 63 (a) and 63 (f), the current final game of one set ends. In this case, in the external output setting process (FIG. 62), “2” is set in the output timing counter of the main RAM 74 in step S3210. Therefore, in the external output process (FIG. 62), the output timing counter is set in step S3302. Since the value is subtracted by 1 and the value of the output timing counter after the subtraction is 1 is "1", the OFF setting process (step S3304) of the first external signal is executed. Therefore, at the timing of t10, the state of the external output of the first external signal is switched from the HI level to the LOW level as shown in FIG. 63 (g).

After that, as shown in FIGS. 63 (a) and 63 (e), the first game of the new set of the AT state ST5 is started at the timing of t11. After that, as shown in FIG. 63A, the first game ends at the timing of t12. In this case, the value of the output timing counter of the main RAM 74 is "1" when the external output setting process (FIG. 61) at the end of the game is started. Therefore, in the external output process (FIG. 62), the value of the output timing counter is subtracted by 1 in step S3302, and the value of the output timing counter after the subtraction is 1 becomes "0". Therefore, the first external signal is turned on. The setting process (step S3306) is executed. Therefore, at the timing of t12, the state of the external output of the first external signal is switched from the LOW level to the HI level as shown in FIG. 63 (g).

That is, when one set of the AT state ST5 ends and a new set is started, the output state of the first external signal changes from the previous HI level to LOW at the end of the final game of the one set that ends first. Switch to level. In this case, the output state of the second external signal is maintained at the LOW level. Then, when the first game of the new set in the AT state ST5 is started and the game is finished, the output state of the first external signal is switched from the previous LOW level to the HI level. In the game hall management computer, in the situation where the second external signal is maintained at the LOW level in this way, the first external signal is once switched from the HI level to the LOW level, and then switched again from the LOW level to the HI level. By grasping that, it is possible to specify that a new set of the AT state ST5 has been started in the slot machine 10.

Further, the first external signal is maintained at the LOW level from the end of the end game of one set in the AT state ST5 to the end of the first game in the new set of the AT state ST5. As a result, the period during which the first external signal is maintained at the LOW level can be set to a period equal to or longer than the shortest period required to execute one game. Therefore, in the situation where the second external signal is maintained at the LOW level, the first external signal is once switched from the HI level to the LOW level and then switched again from the LOW level to the HI level. It is possible to reduce the possibility of being overlooked by the management computer.

After that, at the timing of t13 to t16, similarly to the timing of t9 to t12, when one set in the AT state ST5 ends and a new set of the AT state ST5 is started, the first 2 In a situation where the external signal is maintained at the LOW level, the first external signal is once switched from the HI level to the LOW level, and then switched again from the LOW level to the HI level.

After that, as shown in FIG. 63A, the final game of the current set in the AT state ST5 is started at the timing of t17. Then, at the timing of t18, as shown in FIGS. 63 (a) and 63 (f), the current final game of one set ends. When the set is completed, the remaining number of sets in the AT state ST5 is "0". Therefore, at the timing of t18, the AT state ST5 ends as shown in FIGS. 63 (b) and 63 (d), and the game state becomes the normal game state ST1. Since "1" is set in the external output end flag of the main RAM 74 at the end of the AT state ST5, the first external signal OFF setting process (step S3309) is executed in the external output process (FIG. 62). .. Therefore, at the timing of t18, as shown in FIG. 63 (g), the state of the external output of the first external signal is switched from the HI level to the LOW level. As a result, the management computer of the game hall can specify that one set of the AT state ST5 has been completed in the slot machine 10. After that, as shown in FIG. 63A, the first game in the normal game state ST1 is executed from the timing of t19 to the timing of t20.

According to the present embodiment described in detail above, the following excellent effects are obtained.

When the supply of operating power to the main MPU 72 is started in a configuration in which the main MPU 72 executes power failure processing based on the fact that the output level of the power failure signal is specified to be the LOW level. Waits for the progress of the process until it is confirmed that the output level of the power failure signal is the HI level. This makes it possible to prevent the processing from proceeding even though the reception status of the power failure signal is not stable when the supply of the operating power is started. Therefore, when the supply of operating power is started, the output level of the power failure signal becomes the LOW level due to the unstable reception status of the power failure signal in the situation where the processing is in progress, which is unexpected. It is possible to prevent the process from being executed at the timing. Therefore, it is possible to preferably execute the process when the supply of the operating power is started.

This is a case where the supply of operating power is started in the configuration in which the power failure processing is executed based on the fact that the output level of the power failure signal is specified to be the LOW level in the timer interrupt processing (FIG. 19). Before the execution of the timer interrupt process (FIG. 19) is permitted, the progress of the process is waited until the output level of the power failure signal is confirmed to be the HI level in the main process (FIG. 10). This prevents the timer interrupt process (FIG. 19) from specifying whether or not the output level of the power failure signal is the LOW level before the power failure signal reception status stabilizes. It becomes possible.

Further, in the state of waiting for the progress of the process in this way, it is confirmed whether or not the output level of the power failure signal has reached the HI level in the process in the state of waiting for the progress of the process, and the output level of the power failure signal is confirmed. The state of waiting for the progress of the process is released based on the confirmation that the HI level has been reached. As a result, it is possible to specify whether or not the reception status of the power failure signal is stable even if the timer interrupt processing (FIG. 19) is not executed in the state where the progress of the processing is waiting, and the power failure occurs. It is possible to allow the processing to proceed in a situation where the signal reception status is stable.

An information error occurs in the main RAM 74 after "1" is set in the information error flag 74g, which is a flag for the main MPU 72 to specify whether or not an information error has occurred in the main RAM 74. A process for grasping an abnormality is executed to execute various determinations as to whether or not the presence is present. Then, when it is specified that an information abnormality has occurred in the main RAM 74 in the abnormality grasping process, the state in which "1" is set in the information abnormality flag 74g is maintained, and the abnormality grasping is performed. When it is specified that no information abnormality has occurred in the main RAM 74 in the process of, the information abnormality flag 74g is cleared to "0". If the state in which "1" is set in the information error flag 74g is maintained, the operation prohibition process is executed, and if the value of the information error flag 74g is "0", the operation prohibition process is executed. The process for advancing the game is started. In this way, when the information error flag 74g is first set to "1" and then it is specified that no information error has occurred in the main RAM 74, the information error flag 74g is cleared to "0". As a result, it operates when various determinations as to whether or not an information abnormality has occurred in the main RAM 74 are not performed due to the generation of electrical noise even though the information abnormality has actually occurred. It is possible to execute the prohibition process.

As information error of the main RAM 74, it is set that "1" is not set in the power failure flag, the checksum does not match, and the set value is abnormal, and it is assumed that any of these information errors has occurred. In the configuration in which the operation prohibition process is executed, "1" is set in the information error flag 74g before the determination process of whether or not each of these information abnormalities has occurred is executed, and any of the above information abnormalities has occurred. Based on the fact that it is specified that there is no information abnormality flag 74g, "0" is cleared. As a result, the required storage capacity can be reduced as compared with the configuration in which the information abnormality flag 74g is provided corresponding to each of the above information abnormalities.

Even if the information error flag 74g is set to "1" in the configuration in which the setting change process (FIG. 15) is executed when the setting change operation is performed when the supply of operating power is started. When the setting change operation is performed, the execution of the setting change process has priority over the execution of the operation prohibition process. As a result, it is possible to prioritize the execution of the setting change process (FIG. 15) with respect to the occurrence of the setting change operation.

In the setting change process (FIG. 15), the clear process of the main RAM 74 is executed. When the clearing process is executed, the information abnormality flag 74g is also cleared to "0". As a result, even if "1" is set in the information error flag 74g before the setting change process (FIG. 15) is executed, the information error flag 74g is set to "1" after the setting change process (FIG. 15) is executed. "Is not set.

Even when "1" is set in the information error flag 74g, the information error flag is flagged when the setting change process (FIG. 15) is executed in the configuration in which the execution of the setting change process (FIG. 15) is prioritized. When "1" is set in 74g, the number of storage areas of the main RAM 74 to be executed for the clear process is larger than when "1" is not set in the information abnormality flag 74g. More specifically, when "1" is not set in the information abnormality flag 74g, a part of the storage area of the main RAM 74 is not the execution target of the clear process, whereas the information abnormality flag 74g is set to "1". When "1" is set, all the storage areas of the main RAM 74 are the targets for executing the clear process. As a result, when an information abnormality in the main RAM 74 has occurred, it is possible to carefully perform the clearing process of the main RAM 74 in the setting change process (FIG. 15).

Not only when "1" is set in the information abnormality flag 74g, but also when the reset button 56 is turned on together with the setting change operation when the supply of operating power is started, all the storage of the main RAM 74 is stored. The area is the target of the clear process. As a result, when the supply of operating power is started and the administrator of the game hall not only changes the setting but also presses the reset button 56, the entire storage area of the main RAM 74 is cleared. It is possible to have the process executed.

In the setting change execution process (FIG. 18), the processes of steps S402 and S406 are executed, so that whether or not the pressing operation of the reset button 56 is started after the setting change execution process (FIG. 18) is started is the first. By the time the determination process is started, the interrupt wait period, which is a period for waiting for the progress of the process until the timer interrupt process (FIG. 19) is newly executed, occurs twice. By setting these interrupt standby periods, the supply of operating power to the main MPU 72 is started when the reset button 56 is pressed, and the setting is changed when the reset button 56 is pressed. Even if the execution process (FIG. 18) is started, from the start of the setting change execution process (FIG. 18) to the start of the first determination process of whether or not the pressing operation of the reset button 56 is started. The contents of the information in the reset previous storage area 74i and the reset current storage area 74h indicate that the pressing operation of the reset button 56 is being continued. Therefore, in step S409, it is not determined that the pressing operation of the reset button 56 has been started. As a result, when the supply of operating power is started while the reset button 56 is pressed, the set value to be selected is not changed by the maintained pressing operation of the reset button 56. It becomes possible to.

Whether or not the reset button 56 has been pressed is grasped by the sensor monitoring process (FIG. 20), and the results of the grasping a plurality of times are stored in the reset current storage area 74h and the reset previous storage area 74i. Then, when the contents of the information stored in the reset current storage area 74h and the reset previous storage area 74i correspond to the start of the operation of the reset button 56, the set value to be selected is changed. As a result, it is possible to update the set value of the selection target once for each pressing operation of the reset button 56. In this case, before the process for specifying the presence / absence of the pressing operation of the reset button 56 in the setting change process (FIG. 15) is first executed, the reset current storage area 74h and the reset previous storage area 74i are respectively settled. By setting the information corresponding to the operation state of the reset button 56, when the setting change process (FIG. 15) is started in the situation where the operation of the reset button 56 is continued, the operation of the reset button 56 causes the reset button 56 to operate. The configuration is such that the set value to be selected is not updated. That is, the sensor monitoring process (FIG. 20) in the timer interrupt process (FIG. 19) is executed before the process for specifying the presence / absence of the press operation of the reset button 56 in the setting change process (FIG. 15) is first executed. Due to the simple configuration of guaranteeing, when the setting change process (FIG. 15) is started in a situation where the pressing operation of the reset button 56 is continued, the setting value selected by the pressing operation of the reset button 56 is selected. It is possible to prevent the update of.

The setting change execution process (FIG. 18) is completed in the configuration in which the clearing process of the storage area of the main RAM 74 is executed when the setting change process (FIG. 15) is executed to change the setting value to be used. If this is done, reset state information that is neither open information nor closed information is stored in the door state area 74e. As a result, when the front door 12 is in the open state in the situation where the setting change execution process (FIG. 18) is completed, the setting change notification is terminated and the door opening notification is started. Further, when the front door 12 is in the closed state in the situation where the setting change execution process (FIG. 18) is completed, the door closing notification is started after the setting change notification is terminated. Therefore, when the setting change execution process (FIG. 18) is completed, it is possible to execute either the door opening notification or the door closing notification following the setting change notification. Therefore, it is possible to reliably notify either that the front door 12 is in the open state or that the front door 12 is in the closed state.

When the storage area of the main RAM 74 is cleared in the setting change process (FIG. 15), reset state information different from the closing information is set in the door state area 74e. As a result, even if the setting change process (FIG. 15) is illegally executed while the front door 12 is kept in the closed state, the front door 12 is kept in the closed state in this case. Even so, the front door 12 is in the closed state because it is specified that the front door 12 is in the closed state after the clear processing of the storage area of the main RAM 74 is executed and the reset state information is set in the door state area 74e. Notification of the existence is executed. This makes it possible to deal with the fraudulent activity.

Since the display corresponding to the number of bets stored in the bet number setting counter 74a is displayed on the bet display unit 64, the player can grasp the number of bets by checking the bet display unit 64. In this case, in the final game in the pseudo-bonus state ST4, clearing at the end of the bonus after all the rotations of the reels 32L, 32M, and 32R have stopped and before the second control process (FIG. 44) of the game section is executed. When the process (FIG. 57) is executed, the information on the number of bets stored in the bet number setting counter 74a is deleted. By deleting the bet number information of the bet number setting counter 74a, the bet display unit 64 is turned off. As a result, it is possible to notify that the final game of the pseudo-bonus state ST4 has ended, and when all the rotations of the reels 32L, 32M, and 32R in the final game have stopped, the notification is performed at an early stage. Is possible.

Further, in the final game of the pseudo-bonus state ST4, the bet number information of the bet number setting counter 74a is stored in the bet number history counter 74f and the game is played before the bet number information of the bet number setting counter 74a is deleted. In the second control process (FIG. 44) of the section, a process for updating the value of the total acquired number counter 74d is executed by using the information of the number of bets stored in the bet number history counter 74f. As a result, after all the rotations of the reels 32L, 32M, 32R are stopped, the value of the total acquisition number counter 74d can be updated by using the information on the number of bets, and the rotations of the reels 32L, 32M, 32R as described above. It is possible to turn off the bet display unit 64 at an early stage when all of the above are stopped.

Since the display corresponding to the number of game media granted stored in the medium grant counter of the main RAM 74 is displayed on the dual-purpose display unit 66, the player can grasp the number of game media granted by checking the dual-purpose display unit 66. It becomes possible to do. In this case, in the final game in the pseudo-bonus state ST4, clearing at the end of the bonus after all the rotations of the reels 32L, 32M, and 32R have stopped and before the second control process (FIG. 44) of the game section is executed. When the process (FIG. 57) is executed, the information on the number of grants stored in the medium grant counter is deleted. By erasing the information on the number of grants of the medium grant counter, the combined display unit 66 is turned off. As a result, it is possible to notify that the final game of the pseudo-bonus state ST4 has ended, and when all the rotations of the reels 32L, 32M, and 32R in the final game have stopped, the notification is performed at an early stage. Is possible.

Further, in the final game of the pseudo-bonus state ST4, before the information on the number of grants of the medium grant counter is erased, the information on the number of grants of the medium grant counter is stored in the grant number history counter of the main RAM 74, and the game section. In the second control process (FIG. 44), a process for updating the value of the total acquisition number counter 74d is executed by using the information of the number of grants stored in the grant number history counter. As a result, after all the rotations of the reels 32L, 32M, 32R are stopped, the value of the total acquisition number counter 74d can be updated by using the information of the number of grants, and the rotations of the reels 32L, 32M, 32R as described above. When all of the above stops, it is possible to turn off the combined display unit 66 at an early stage.

If the transition to the pseudo-bonus state ST4 occurs without winning the direct hit in the direct hit lottery process (step S2208), the freeze period occurs in the first game of the pseudo-bonus state ST4, and the reels 32L, 32M , The start of rotation of 32R is awaited. This makes it possible for the player to clearly recognize that the pseudo-bonus state ST4 has been started. Further, when a direct hit is won in the direct hit lottery process (step S2208), a freeze period occurs in the game, and the start of rotation of the reels 32L, 32M, 32R is awaited. As a result, it is possible to make the player clearly recognize that the transition to the pseudo-bonus state ST4 has been confirmed by winning the direct hit in the direct hit lottery process (step S2208). In this case, if a direct hit is won in the direct hit lottery process (step S2208), the freeze period is set in the game, whereas the freeze period in the first game of the pseudo bonus state ST4 is not set. .. This makes it possible to prevent the freeze period from being repeated in a short period of time.

Of the first to fifth game number modes, the game number mode to be executed is determined by lottery. The probability of being selected by the lottery of the first to fifth game number modes may differ depending on the type of game number mode and also depending on the set value to be used. In this case, in the game number mode lottery table 112, a determination value LV of a number corresponding to the product of the number of game number mode types that can be the lottery target and the number of set value types that can be set as the use target is set. ing. As a result, the game number mode lottery table 112 can be made common to all combinations of the game number mode that can be the lottery target and the set value that can be set as the use target. Further, since the determination value LV of the number of types of set values is set in any of the game number modes that can be the lottery target, the game number mode set as the lottery target and the set value to be used are used. It is possible to standardize the processing when the determination value LV corresponding to the combination of is read from the game number mode lottery table 112.

Even if the fifth game number mode is not won depending on the type of the set value to be used, the game number mode lottery table 112 shows the numerical information corresponding to the non-winning as the judgment value LV corresponding to the combination. Is set to "0". As a result, even in the fifth game number mode in which there is a set value that is surely non-winning, there is a number of determination value LVs corresponding to the number of types of set values. Therefore, the judgment value LV of the number corresponding to the number of types of the set value is set in any of the game number modes that can be the lottery target, and the game number mode set as the lottery target and the game number mode to be used are used. It is possible to standardize the processing when the determination value LV corresponding to the combination of the set values is read from the game number mode lottery table 112.

In the game number mode lottery table 112, the address information D (0) to D (24) on the data is serially numbered as the judgment value LV of the number corresponding to the number of types of the set value corresponding to one type of game number mode. Is set to. As a result, in the game number mode lottery table 112, the judgment value LV of the number corresponding to the number of types of the set value is collectively set for each type of the game number mode, and the number of games targeted for the lottery Of the determination value LVs corresponding to the modes, it becomes easy to acquire the determination value LV corresponding to the set value set as the target of use.

In the game number mode lottery table 112, the judgment value LV of the number corresponding to the number of types of set values aggregated for each type of game number mode corresponds to the order of address information D (0) to D (24) on the data. The order is fixed according to the type of set value to be set. As a result, the address information D (0) to D on the data in which the judgment value LV corresponding to the set value to be used is set among the judgment value LV corresponding to the number of games mode to be drawn. The order of (24) is uniquely determined according to the type of the set value. Therefore, it becomes easy to acquire the determination value LV corresponding to the set value to be used among the determination value LV corresponding to the number of games mode to be drawn.

Numerical information corresponding to the arrangement order in the game number mode lottery table 112 of the game number mode to be drawn, and numerical information corresponding to the arrangement order in the game number mode lottery table 112 of the set value to be used at present. By executing the arithmetic processing for address derivation (step S2503 in the LV acquisition processing (FIG. 52)), the game number mode and the game number mode to be used in the game number mode lottery table 112 are obtained. The address information D (0) to D (24) on the data in which the determination value LV corresponding to the combination of the set values is set is acquired. As a result, it is possible to reduce the processing load when acquiring the determination value LV corresponding to the combination of the number of games mode to be drawn and the set value to be used.

In a configuration in which a 2-byte second random number is updated in the second random number circuit 76 each time an update trigger occurs, the AT transition lottery process (step S2403) at the start is executed using the 2-byte second random number. The case where the lottery process (step S2407 to step S2413) of the game number mode is executed using a 1-byte random number which is a bit number smaller than 2 bytes among the second random numbers, and the above-mentioned first. The lottery process (steps S2417 to S2423) in the winning rate mode may be executed using a 7-bit random number having a number of bits less than 2 bytes out of the 2 random numbers. This makes it possible to increase the number of lottery processes while suppressing the increase in the number of random number circuits.

When the AT transition lottery process (step S2403) at the start is executed using the 2-byte second random number, the second random number is used in the configuration in which the 2-byte second random number is read from the latch area 111. Even when the lottery process is executed using the used 1-byte random number or 7-bit random number, a 2-byte second random number is read from the latch area 111, and a 1-byte random number is read from the read second random number. Alternatively, a 7-bit random number is derived. As a result, it is possible to derive random numbers having different data capacities while having a common configuration for reading random numbers from the second random number circuit 76.

When acquiring a 7-bit random number, first, the second random number is stored in the latch area 111 based on the fact that the latch signal is transmitted from the main MPU 72 to the second random number circuit 76. After that, the random number of the upper byte stored in the upper area 111a of the latch area 111 is acquired in the register of the main MPU 72. Then, the most significant bit of the random number of the high-order byte is cleared to "0". As a result, it is possible to acquire a 7-bit random number by using the 2-byte second random number latched in the second random number circuit 76, and the processing configuration for acquiring the 7-bit random number is simplified. It becomes possible to make a random number.

Even when a 7-bit random number is used, the random number is treated as 1-byte data. As a result, even when a 7-bit random number is used, it can be treated as byte unit data.

In step S2401, the latch signal is transmitted so that the second random number is latched in the second random number circuit 76, and in step S2406, the latch signal is transmitted so that the second random number is latched in the second random number circuit 76. Will be done. In this case, in the second random number circuit 76, the second random number is sequentially updated based on the clock signal output from the clock circuit, and the update cycle is 0.1 nanosecond. Then, during the period from the execution of the process of step S2401 to the execution of the process of step S2406, the second random number updated in 0.1 nanoseconds as described above makes one round in the numerical range of 0 to 65535. The period is longer than the period required to do so. Further, the period from the execution of the process of step S2401 to the execution of the process of step S2406 is within a predetermined period range in each of the case where the process of step S2405 is executed and the case where the process of step S2405 is not executed. It fluctuates, and this fluctuation is large in relation to the update cycle of the second random number. Therefore, even if the latch signal is transmitted to the second random number circuit 76 in each of step S2401 and step S2406 in one processing time of the second start setting process (FIG. 50), the latch signal is transmitted by the transmission of the latch signal in step S2401. There is no regularity between the second random number stored in the area 111 and the second random number stored in the latch area 111 due to the transmission of the latch signal in step S2406.

In step S2406, the latch signal is transmitted so that the second random number is latched in the second random number circuit 76, and in step S2415, the latch signal is transmitted so that the second random number is latched in the second random number circuit 76. Will be done. In this case, in the second random number circuit 76, the second random number is sequentially updated based on the clock signal output from the clock circuit, and the update cycle is 0.1 nanosecond. Then, during the period from the execution of the process of step S2406 to the execution of the process of step S2415, the second random number updated in 0.1 nanoseconds as described above makes one round in the numerical range of 0 to 65535. The period is longer than the period required to do so. Further, the period from the execution of the process of step S2406 to the execution of the process of step S2415 fluctuates within a predetermined period range, and this fluctuation is large in relation to the update cycle of the second random number. Is. Therefore, even if the latch signal is transmitted to the second random number circuit 76 in each of step S2406 and step S2415 in one processing time of the second start setting process (FIG. 50), the latch signal is transmitted by the transmission of the latch signal in step S2406. There is no regularity between the second random number stored in the area 111 and the second random number stored in the latch area 111 due to the transmission of the latch signal in step S2415.

When shifting from the pseudo bonus state ST4 to the AT state ST5, or when the AT state ST5 set continues, the configuration is such that the external output of the first external signal is temporarily stopped and then the external output of the first external signal is restarted. In, first, "2" is set in the output timing counter of the main RAM 74, and then when the output level of the first external signal becomes the LOW level, the value of the output timing counter is subtracted by 1, and the value of the output timing counter. When is "1", the output level of the first external signal is set to the HI level after the value of the output timing counter is subtracted by 1. As a result, it is possible to temporarily stop the external output of the first external signal and then restart the external output of the first external signal simply by sequentially updating the value of the output timing counter. Therefore, it is possible to preferably perform the process for externally outputting the first external signal.

When the pseudo bonus state ST4 is started, the output level of the first external signal is set to the HI level in the situation where the output level of the first external signal is the LOW level. In this case, "1" is set in the output timing counter of the main RAM 74, and when the value of the output timing counter is "1", the first value is subtracted by 1 as described above. The output level of the external signal is defined as the HI level. As a result, when the output level of the first external signal is once set to the LOW level by using the output timing counter and then the output level of the first external signal is set to the HI level again, and the output level of the first external signal is set. It is possible to control the output of the first external signal in each case where is simply set to the HI level.

When the value of the output timing counter of the main RAM 74 is "0", the output level of the first external signal is not changed based on the value of the output timing counter. This makes it possible to create a situation in which the output level of the first external signal is not changed based on the value of the output timing counter.

When the game state is the CB state, "1" is set in the value of the judgment value counter 74j, and when the game state is the non-CB state and the CB winning data is stored in the main RAM 74, the judgment value. "2" is added to the value of the counter 74j. Further, when the game state is the non-CB state, if the number of bets in the game is "2", "2" is added to the value of the determination value counter 74j, and if the number of bets in the game is "3", the determination is made. "3" is added to the value of the value counter 74j. Therefore, when the gaming state is the CB state, the value of the determination value counter 74j is "1", and when the gaming state is the non-internal two-card bet state, the value of the determination value counter 74j is "2". Therefore, the value of the determination value counter 74j becomes "3" when the gaming state is the non-internal 3-card bet state, and when the game state is the internal 2-card bet state, the determination value counter 74j When the value becomes "4" and the game state is the three-card bet state inside, the value of the determination value counter 74j becomes "5". As a result, by confirming the value of the determination value counter 74j, the current gaming state is the CB state, the non-internal 2-card bet state, the non-internal 3-card bet state, the internal 2-card bet state, and the internal. It is possible to specify which of the three bets is in the state.

When the game state is the CB state, "1" is set in the determination value counter 74j, whereas the value corresponding to the number of bets is not added to the determination value counter 74j. As a result, in a configuration in which the number of bets does not affect the execution content of the lottery process (FIG. 34) in the CB state, there are a plurality of types of values of the determination value counter 74j for the situation. It is possible to prevent it.

In a configuration in which the type of index value IV in which a point value PV of 1 or more is set depending on the game state can be different, the index value is not different in the numerical range of the index value IV according to each game state. A type of index value IV in which a point value PV of 1 or more is set in a certain range while setting IV to a certain range and the same type of winning data associated with each index value IV. Is different. As a result, it is not necessary to change the numerical range of the index value IV for each game state or change the correspondence between the index value IV and the winning data for each game state, so that the data format is simplified. It becomes possible.

Data groups 101a to 101q for IV = 1 to 17 are provided in a one-to-one correspondence with each of the index values IV = 1 to 17, and each of the data groups 101a to 101q for IV = 1 to 17 is provided. Data for acquiring the point value PV (including "0") in the game state is set. As a result, it is not necessary to prepare a lottery table individually for each game state, so that the data structure can be simplified.

Judgment values corresponding to each game state are calculated, and the bits set with "1" in the game state data 102a to 104a set in each of the IV = 1 to 17 data groups 101a to 101q and their judgment values are When corresponding, the point value PV corresponding to the bit in which "1" is set is acquired from the point value data 102c to 104c of the data group 101a to 101q for IV = 1 to 17. As a result, even if the data groups 101a to 101q for IV = 1 to 17 are set so as to be common to each game state, it is possible to acquire the point value PV corresponding to each game state. It becomes.

Judgment values corresponding to each game state are calculated, and the bits set with "0" in the game state data 102a to 104a set in each of the IV = 1 to 17 data groups 101a to 101q and their judgment values are If it corresponds, the point value PV of "0", which is the numerical information corresponding to non-winning, is not set in the point value data 102c to 104c of the data group 101a to 101q for IV = 1 to 17, and is not set in the processing. Derived separately. As a result, it is not necessary to set the numerical information corresponding to non-winning in the point value data 102c to 104c, so that the data capacity of the data group 101a to 101q for IV = 1 to 17 can be suppressed.

<Second embodiment>
In the present embodiment, the hardware configuration of the main MPU 72 and the execution mode of the process are different from those in the first embodiment. Hereinafter, a configuration different from that of the first embodiment will be described. The description of the same configuration as that of the first embodiment will be basically omitted.

FIG. 64 is an explanatory diagram for explaining the electrical configuration of the main MPU 72.

The main MPU 72 is provided with a jump status flag 121, a CLR execution circuit 122, and a DEC execution circuit 123. When the predetermined storage area is cleared to "0" in the CLR execution circuit 122, the jump status flag 121 mainly determines whether or not the information of the predetermined storage area before the "0" is cleared is "0". It is referred to when specifying when executing the process by the program of the side MPU 72. Further, the jump status flag 121 mainly determines whether or not the information of the specific storage area after the subtraction of 1 is "0" when the value of the specific storage area is subtracted by 1 in the DEC execution circuit 123. It is referred to when specifying when executing the process by the program of MPU72.

The CLR execution circuit 122 is a dedicated circuit for clearing a predetermined storage area to "0". The predetermined storage area is not a fixed area, but is appropriately changed according to the execution content of the processing by the program of the main MPU 72. 65 (a) and 65 (b) are explanatory views for explaining the state of the jump status flag 121 when the predetermined storage area is cleared to "0" by the CLR execution circuit 122. When the predetermined storage area is cleared to "0" by the CLR execution circuit 122, the information of the predetermined storage area is first provided in the CLR execution circuit 122 as shown in FIGS. 65 (a1) and 65 (b1). It is stored in the CLR pre-storage buffer 122a. The CLR pre-storage buffer 122a has a data capacity of 1 byte. Further, although the area that can be a predetermined storage area has a data capacity of 8 bits or less, a flag of a 1-bit data capacity is also included. When the flag of the data capacity of 1 bit is a predetermined storage area, the information of the flag is stored in the least significant bit of the CLR pre-storage buffer 122a.

Each bit of the CLR pre-storage buffer 122a is connected to the NOR circuit 122b, and the information stored in each of these bits is logically operated by NOR in the NOR circuit 122b. Then, the calculation result is stored in the jump status flag 121. Specifically, when the information of the predetermined storage area before the "0" clear is executed is all "0" as shown in FIG. 65 (a1), the logical operation by NOR is executed. In, "1" is stored in the jump status flag 121. Further, when the information of the predetermined storage area before the "0" clear is executed is "00000001" as shown in FIG. 65 (b1), the logical operation by NOR is executed and the jump status flag is flagged. "0" is stored in 121.

The information stored in the CLR pre-storage buffer 122a is cleared to "0" by the CLR execution circuit 122, and the result is overwritten in a predetermined storage area as shown in FIGS. 65 (a2) and 65 (b2). As a result, the predetermined storage area is cleared to "0". When the predetermined storage area is a 1-bit data capacity flag, the 1-bit flag is cleared to "0".

The DEC execution circuit 123 is a dedicated circuit for subtracting 1 from the value of a specific storage area. The specific storage area is not a fixed area, but is appropriately changed according to the execution content of the processing by the program of the main MPU 72. 66 (a) and 66 (b) are explanatory views for explaining the state of the jump status flag 121 when the value of the specific storage area is subtracted by 1 by the DEC execution circuit 123. When the value of the specific storage area is subtracted by 1 by the DEC execution circuit 123, the information of the specific storage area is first provided in the DEC execution circuit 123 as shown in FIGS. 66 (a1) and 66 (b1). It is stored in the DEC pre-storage buffer 123a. The DEC pre-storage buffer 123a has a data capacity of 1 byte. Further, the area that can be a specific storage area has a data capacity of 8 bits or less.

The information stored in the DEC pre-storage buffer 123a is subtracted by 1 by the DEC execution circuit 123. Then, the result after 1 subtraction is stored in the post-DEC storage buffer 123b provided in the DEC execution circuit 123 as shown in FIGS. 66 (a2) and 66 (b2). The post-DEC storage buffer 123b has a data capacity of 1 byte. The information stored in the post-DEC storage buffer 123b is overwritten in a specific storage area.

Each bit of the post-DEC storage buffer 123b is connected to the OR circuit 123c, and the information stored in each of these bits is logically operated by the OR in the OR circuit 123c. Then, the calculation result is stored in the jump status flag 121. Specifically, when the information of the specific storage area before 1 subtraction is "000000010" as shown in FIG. 66 (a1), after 1 subtraction, it is "00000001" as shown in FIG. 66 (a2). It becomes. Then, in this case, "1" is stored in the jump status flag 121 by executing the logical operation by OR. Further, when the information of the specific storage area before 1 subtraction is "00000001" as shown in FIG. 66 (b1), it becomes "0000000000" after 1 subtraction as shown in FIG. 66 (b2). Then, in this case, "0" is stored in the jump status flag 121 by executing the logical operation by OR.

When executing the processing by the program, the main MPU 72 basically executes various instructions by the program in the order determined by the program address. However, when a JP instruction is set by the program, if the conditions specified by the JP instruction are satisfied, the JP instruction is not an instruction with the program address in the next order, but the JP. The instruction of the program address advanced by the difference specified in the instruction is executed. As the JP instruction, a JR instruction and a JRS instruction are set in the slot machine 10.

FIG. 67A is an explanatory diagram for explaining the data structure of the JR instruction. As shown in FIG. 67 (a), the JR instruction has a data capacity of 2 bytes. Conditional data that defines conditions for jumping the program address to the program address advanced by the difference specified in the JR instruction instead of the program address in the next order is set in the upper 1 byte of the 2-byte data. ing. Address data that defines the difference between the program addresses when the program address is jumped is set in the lower 1 byte of the 2-byte data.

FIG. 67B is an explanatory diagram for explaining the data structure of the JRS instruction. As shown in FIG. 67 (b), the JRS instruction has a data capacity of 1 byte. Conditional data that defines conditions for jumping the program address to the program address advanced by the difference specified in the JRS instruction is set in the upper 5 bits of the 1-byte data instead of the program address in the next order. There is. Address data that defines the difference between the program addresses when the program address is jumped is set in the lower 3 bits of the 1-byte data.

Since the JR instruction and the JRS instruction are set as described above, using the JR instruction with a relatively small data capacity as the JP instruction is better than using the JR instruction with a relatively large data capacity. It is also possible to compress the program capacity. However, both the condition data and the address data of the JR instruction are smaller than those of the JR instruction.

With the JR instruction, a 1-byte data capacity is set as the condition data, so complicated conditions can be set as the conditions for jumping, whereas with the JR instruction, the condition data has a 5-bit data capacity. Therefore, it is not possible to set complicated conditions as conditions for jumping. In this case, the condition data of the JRS instruction includes data that the jump is executed if the jump status flag 121 of the 1-bit data capacity is "0", or the jump status flag 121 of the 1-bit data capacity is "1". If so, the data to execute the jump is set.

If it is a JR instruction, a data capacity of 1 byte is set as the address data, so the range defined as the difference between the program addresses for jumping is in the range of 0 to 255. On the other hand, in the JRS instruction, since the address data has a data capacity of 3 bits, the range defined as the difference between the program addresses for jumping is in the range of 0 to 7.

Since the JR instruction and the JRS instruction are set as the JP instructions as described above, when it is necessary to set complicated conditions as the conditions for jumping, or the difference between the program addresses for jumping is 8 or more. In this case, the JR instruction is used, and when the condition for jumping is the condition corresponding to the binary value of the jump status flag 121 and the difference between the program addresses for jumping is 7 or less, the JR instruction is used. I am using. This makes it possible to compress the program capacity while allowing the program to be executed appropriately.

FIG. 68 is an explanatory diagram for explaining an example of the contents of a program in which both a JR instruction and a JRS instruction are executed as JP instructions. In this example, the external output setting process (FIG. 61) in the first embodiment is constructed by using the jump status flag 121, the CLR execution circuit 122, the DEC execution circuit 123, the JR instruction, and the JRS instruction. The contents of the program.

As shown in FIG. 68, "1001" to "1027" are set as the program addresses in this program. The instruction "CLR (SK1FG), 0" is set in the program address of "1001". “CLR” is an instruction to clear “0” by the CLR execution circuit 122, and “SK1FG” is the first output start flag of the main RAM 74 in the first embodiment. Therefore, the instruction "CLR (SK1FG), 0" is an instruction to clear the first output start flag by "0" by the CLR execution circuit 122.

The instruction "JRS (JPSFG) = 1, 2" is set in the program address of "1002". "JRS" is a JRS instruction. "JPSFG" is a jump status flag 121. Therefore, the instruction "JRS (JPSFG) = 1, 2" is the program address if the value of the jump status flag 121 is "1" as a result of the instruction by the latest program address (specifically, "1001"). It is an instruction to jump to "1004" which is obtained by adding "2" to "1002", and if the value of the jump status flag 121 is "0", proceed to "1003" which is the program address in the next order. That is, if the value of the first output start flag is "0" before the CLR instruction with the program address of "1001" is executed, the instruction with the program address of "1003" is not executed and "1004" is executed. If the value of the first output start flag is "1" before the CLR instruction by the program address of "1001" is executed, the process proceeds to the program address of "1003". It becomes.

The instruction "SET (STC), 1" is set in the program address of "1003". “STC” is an output timing counter of the main RAM 74 in the first embodiment. Therefore, the instruction "SET (STC), 1" is an instruction to set "1" in the output timing counter.

"SECP1" is set for the program address of "1004". This is not an instruction but data that is referred to when the developer of the slot machine 10 confirms the program. Therefore, when the program address is advanced to "1004", the program address is advanced to "1005" without executing any instruction.

The instruction "CLR (SK2FG), 0" is set in the program address of "1005". “SK2FG” is the second output start flag of the main RAM 74 in the first embodiment. Therefore, the instruction "CLR (SK2FG), 0" is an instruction to clear the second output start flag by "0" by the CLR execution circuit 122.

The instruction "JRS (JPSFG) = 1,3" is set in the program address of "1006". This instruction is the result of the instruction by the latest program address (specifically, "1005"). If the value of the jump status flag 121 is "1", the program address is "1006" plus "3", which is "1009". , And if the value of the jump status flag 121 is "0", it is an instruction to proceed to the next program address "1007". That is, if the value of the second output start flag is "0" before the CLR instruction with the program address of "1005" is executed, the instructions with the program addresses of "1007" and "1008" are executed. If the value of the second output start flag is "1" before the CLR instruction by the program address of "1005" is executed without jumping to the program address of "1009", the program of "1007" You will proceed to the address.

The instruction "SET (STC), 2" is set in the program address of "1007". This instruction is an instruction to set "2" in the output timing counter. An instruction "CALL ONSET2" is set in the program address of "1008". “ONSET2” is the ON setting process (step S3207) of the second external signal in the external output setting process (FIG. 61) in the first embodiment. Therefore, the instruction "CALL ONSET2" is an instruction to read the subroutine called the ON setting process (step S3207) of the second external signal. When the subroutine of the ON setting process (step S3207) of the second external signal is completed, the process proceeds to the program address of "1009".

"SECP2" is set for the program address of "1009". This is not an instruction but data that is referred to when the developer of the slot machine 10 confirms the program. Therefore, when the program address is "1009", the program address is "1010" without any instruction being executed.

The instruction "CLR (SK3FG), 0" is set in the program address of "1010". “SK3FG” is the third output start flag of the main RAM 74 in the first embodiment. Therefore, the instruction "CLR (SK3FG), 0" is an instruction to clear the third output start flag by "0" by the CLR execution circuit 122.

The instruction "JRS (JPSFG) = 1, 2" is set in the program address of "1011". If the value of the jump status flag 121 is "1" as a result of the instruction by the latest program address (specifically, "1010"), this instruction is the program address "1011" plus "2" "1013". , And if the value of the jump status flag 121 is "0", it is an instruction to proceed to the next program address "1012". That is, if the value of the third output start flag is "0" before the CLR instruction with the program address of "1010" is executed, the instruction with the program address of "1012" is not executed and "1013" is executed. If the value of the third output start flag is "1" before the CLR instruction by the program address of "1010" is executed, the process proceeds to the program address of "1012". It becomes. The instruction "SET (STC), 2" is set in the program address of "1012". This instruction is an instruction to set "2" in the output timing counter.

"SECP3" is set for the program address of "1013". This is not an instruction but data that is referred to when the developer of the slot machine 10 confirms the program. Therefore, when the program address is "1013", the program address is "1014" without any instruction being executed.

The instruction "JR (STC) = 0.9" is set in the program address of "1014". This instruction jumps the program address to "1023", which is obtained by adding "9" to "1014" when the value of the output timing counter of the main RAM 74 is "0", and when the value of the output timing counter is "0". If not, it is an instruction to proceed to the next program address "1015". In this JP instruction, since the condition data is not the condition data corresponding to the value of the jump status flag 121 and the difference between the program addresses is 8 or more, the JR instruction is used instead of the JR instruction.

An instruction "DEC (STC)" is set in the program address of "1015". “DEC” is an instruction of 1 subtraction by the DEC execution circuit 123, and “STC” is an output timing counter of the main RAM 74 as described above. Therefore, the instruction "DEC (STC)" is an instruction to subtract 1 from the value of the output timing counter by the DEC execution circuit 123.

The instruction "JRS (JPSFG) = 0,3" is set in the program address of "1016". If the value of the jump status flag 121 is "0" as a result of the instruction by the latest program address (specifically, "1015"), this instruction is the program address "1016" plus "3" added to "1019". , And if the value of the jump status flag 121 is "1", it is an instruction to proceed to the next program address "1017". That is, if the value of the output timing counter is "0" after the DEC instruction with the program address of "1015" is executed, the instruction with the program addresses of "1017" and "1018" is not executed. It jumps to the program address of "1019", and if the value of the output timing counter is "1" after the DEC instruction by the program address of "1015" is executed, it advances to the program address of "1017". ..

An instruction "CALL OFFSET1" is set in the program address of "1017". “OFFSET1” is the OFF setting process (step S3304) of the first external signal in the external output process (FIG. 62) in the first embodiment. Therefore, the instruction "CALL OFFSET1" is an instruction to read the subroutine called the OFF setting process (step S3304) of the first external signal. When the subroutine of the OFF setting process (step S3304) of the first external signal is completed, the process proceeds to the program address of "1018".

An instruction "RET" is set in the program address of "1018". In the first embodiment, the external output setting process (FIG. 61) is a subroutine executed in step S913 of the normal process (FIG. 25). Therefore, when the instruction "RET" is executed, the process proceeds to step S914 of the normal process (FIG. 25).

"SECP4" is set for the program address of "1019". This is not an instruction but data that is referred to when the developer of the slot machine 10 confirms the program. Therefore, when the program address is "1019", the program address is "1020" without any instruction being executed.

The instruction "CALL OFFSET2" is set in the program address of "1020". “OFFSET2” is the OFF setting process (step S3305) of the second external signal in the external output process (FIG. 62) in the first embodiment. Therefore, the instruction "CALL OFFSET2" is an instruction to read the subroutine called the OFF setting process (step S3305) of the second external signal. When the subroutine of the OFF setting process (step S3305) of the second external signal is completed, the process proceeds to the program address of "1021".

The instruction "CALL ONSET1" is set in the program address of "1021". “ONSET1” is an ON setting process (step S3306) of the first external signal in the external output process (FIG. 62) in the first embodiment. Therefore, the instruction "CALL ONSET1" is an instruction to read the subroutine called the ON setting process (step S3306) of the first external signal. When the subroutine of the ON setting process (step S3306) of the first external signal is completed, the process proceeds to the program address of "1022".

An instruction "RET" is set in the program address of "1022". In the first embodiment, the external output setting process (FIG. 61) is a subroutine executed in step S913 of the normal process (FIG. 25). Therefore, when the instruction "RET" is executed, the process proceeds to step S914 of the normal process (FIG. 25).

"SECP5" is set for the program address of "1023". This is not an instruction but data that is referred to when the developer of the slot machine 10 confirms the program. Therefore, when the program address is advanced to "10243", the program address is advanced to "1024" without executing any instruction.

The instruction "CLR (GSSFG), 0" is set in the program address of "1024". "GSSFG" is an external output end flag of the main RAM 74 in the first embodiment. Therefore, the instruction "CLR (GSSFG), 0" is an instruction to clear the external output end flag by "0" by the CLR execution circuit 122.

The instruction "JRS (JPSFG) = 1, 2" is set in the program address of "1025". If the value of the jump status flag 121 is "1" as a result of the instruction by the latest program address (specifically, "1024"), this instruction is the program address "1025" plus "2" "1027". , And if the value of the jump status flag 121 is "0", it is an instruction to proceed to the next program address "1026". That is, if the value of the external output end flag is "0" before the CLR instruction with the program address of "1024" is executed, "1027" is executed without executing the instruction with the program address of "1026". If the value of the external output end flag is "1" before the CLR instruction by the program address of "1024" is executed, the process proceeds to the program address of "1026". ..

The instruction "CALL OFFSET1" is set in the program address of "1026". “OFFSET1” is the OFF setting process (step S3309) of the first external signal in the external output process (FIG. 62) in the first embodiment. Therefore, the instruction "CALL OFFSET1" is an instruction to read the subroutine called the OFF setting process (step S3309) of the first external signal. When the subroutine of the first external signal OFF setting process (step S3309) is completed, the process proceeds to the program address of "1027".

An instruction "RET" is set in the program address of "1027". In the first embodiment, the external output setting process (FIG. 61) is a subroutine executed in step S913 of the normal process (FIG. 25). Therefore, when the instruction "RET" is executed, the process proceeds to step S914 of the normal process (FIG. 25).

According to the present embodiment described in detail above, the following excellent effects are obtained.

When any of the first output start flag, the second output start flag, the third output start flag, and the external output end flag of the main RAM 74 is cleared by the CLR execution circuit 122, the "0" clear is cleared. If the value of the target flag is "0" before the execution, "1" is set in the jump status flag 121, and the value of the target flag is set before the "0" clear is executed. When is "1", the value of the jump status flag 121 becomes "0". Then, different processing is executed depending on whether the value of the jump status flag 121 is "1" or "0". As a result, when the target flag is cleared by "0" in the CLR execution circuit 122 which is a dedicated circuit, it corresponds to the value set in the target flag before the "0" clear is executed. The value to be set is naturally set in the jump status flag 121, and the process corresponding to the value set in the jump status flag 121 can be executed. As a result, while reducing the processing load using the program, the processing corresponding to the value set in the flag before the target flag "0" clear and the "0" clear is executed is executed. It becomes possible to do.

When the value of the output timing counter of the main RAM 74 is subtracted by 1 by the DEC execution circuit 123, if the value of the output timing counter after the subtraction of 1 is other than "0", the jump status flag 121 is set. When "1" is set and the value of the output timing counter after the subtraction of 1 is "0", the value of the jump status flag 121 becomes "0". Then, different processing is executed depending on whether the value of the jump status flag 121 is "1" or "0". As a result, when the value of the output timing counter is subtracted by 1 in the DEC execution circuit 123, which is a dedicated circuit, the value corresponding to the value of the output timing counter after the subtraction of 1 is naturally set in the jump status flag 121. , It becomes possible to execute the process corresponding to the value set in the jump status flag 121. As a result, it is possible to execute the process of subtracting 1 from the value of the output timing counter and the process corresponding to the value of the output timing counter after 1 subtraction while reducing the processing load using the program.

In the configuration that enables the CLR execution circuit 122 to clear "0" and the DEC execution circuit 123 to subtract 1 as described above, by setting the CLR instruction in the program, the CLR execution circuit 122 clears "0" and the CLR execution circuit 122 clears "0". The value of the jump status flag 121 can be set, and by setting the DEC instruction, 1 subtraction by the DEC execution circuit 123 and the value of the jump status flag 121 can be set. As a result, it is possible to achieve the above-mentioned excellent effects while reducing the program capacity.

As a jump instruction, a JR instruction having a relatively large data capacity and a JR instruction having a relatively small data capacity are set. As a result, the program capacity can be reduced by properly using the JR instruction and the JRS instruction as needed.

The JR instruction has a smaller data capacity than the JR instruction, although the address range that can be jumped when the jump condition is satisfied is narrower than that of the JR instruction. Therefore, if the address range to be jumped is narrow, the JRS instruction is used, and if the address range to be jumped is wide, the JR instruction is used to appropriately execute the jump instruction and reduce the program capacity. Is possible.

The JR instruction has a smaller data capacity of condition data for which jump conditions can be set than the JR instruction, but has a smaller data capacity than the JR instruction. Therefore, by using the JR instruction when the jump condition is simple and by using the JR instruction when the jump condition is complicated, it is possible to reduce the program capacity while appropriately executing the jump instruction. It becomes.

The dedicated circuit provided in the main MPU 72 for changing the numerical information in a predetermined mode is limited to the CLR execution circuit 122 for clearing "0" and the DEC execution circuit 123 for subtracting one. Instead, for example, it may be a circuit for adding 1 or a circuit for inverting numerical information. Even in these circuits, different information is set in the jump status flag 121 depending on whether the numerical information before or after the change by the circuit is the predetermined target numerical information or not. It is preferable that the configuration is as follows.

Further, the JRS instruction has a configuration in which the data capacity of both the condition data and the address data is smaller than that of the JR instruction, but the data capacity of the condition data is not limited to this, and the data capacity of the condition data is the JR instruction and the JRS instruction. Although it is the same, the data capacity of the address data may be smaller in the JRS instruction than in the JR instruction, and the data capacity of the address data is the same in the JR instruction and the JRS instruction, but the data capacity of the condition data is the JRS instruction. May be smaller than the JR command.

Further, the JRS instruction is not limited to the configuration in which the data related to the value of the jump status flag 121 is set as the condition data, and the condition data unrelated to the jump status flag 121 is the condition data of the JRS instruction. The configuration may be set as.

<Third embodiment>
In this embodiment, a part of the processing configuration of the main MPU 72 is different from that of the first embodiment. Hereinafter, a configuration different from that of the first embodiment will be described. The description of the same configuration as that of the first embodiment will be basically omitted.

69 (a) to 69 (c) are explanatory views for explaining the stack area 125 provided in the main RAM 74.

In a situation where the main MPU 72 is executing a predetermined process using a program, the process to be executed may be transferred to the process of the subroutine by a CALL instruction or the like. In this case, when the processing of the subroutine is completed, the process returns to the predetermined process, but the information of the return address on the program (specifically, the program address) in the predetermined process is used to perform the return. It will be evacuated. At the time of this evacuation, the information of the return address on the program is evacuated to the stack area 125 of the main RAM 74.

When writing information to the stack area 125, a PUSH instruction is executed by the main MPU 72, and when reading information from the stack area 125, a POP instruction is executed by the main MPU 72. Further, when reading the information from the stack area 125, the writing order to the stack area 125 is read first from the later information.

Specifically, as shown in FIGS. 69 (a) to 69 (c), the stack area 125 is a unit storage area capable of storing information on the target return address when the PUSH instruction is executed. A plurality of 125a are set. The storage area addresses are set in a one-to-one correspondence with the plurality of unit storage areas 125a, and the storage area addresses are set to be serial numbers. A reference pointer for storing the storage area address information is set in the dedicated register of the main MPU 72, and when the PUSH instruction is executed, the value stored in the reference pointer is added by 1, and the value is added by 1. The information of the return address is stored in the unit storage area 125a corresponding to the storage area address of the value. On the other hand, when the POP instruction is executed, the return address information is read from the unit storage area 125a corresponding to the storage area address of the value stored in the reference pointer, and the process proceeds to the process corresponding to the read return address information. To do. When the return address information is read, the value of the reference pointer is subtracted by 1.

Specifically, as shown in FIG. 69A, when the return address information is stored in each unit storage area 125a up to the storage area address of "k", the reference pointer contains "k". Information is stored. When the PUSH instruction is executed by the main MPU 72 in this situation, the value of the reference pointer is first added by 1, so that the information of the reference pointer becomes "k + 1". Then, as shown in FIG. 69 (b) in the unit storage area 125a corresponding to the storage area address of "k + 1" which is the information of the reference pointer, the information of the return address by the PUSH instruction this time (specifically, "return"). Address B ") is stored. When the POP instruction is executed on the main MPU 72 in this situation, the "return address B" is read from the unit storage area 125a corresponding to the storage area address of "k + 1" which is the information of the reference pointer, and the "return address B" is read out. It returns to the process (that is, the instruction) corresponding to "address B". In this case, as shown in FIG. 69 (c), the return address information is not stored in the unit storage area 125a corresponding to the storage area address of “k + 1”. After that, since the value of the reference pointer is subtracted by 1, the information of the reference pointer becomes "k".

Next, the execution contents of the processing using the PUSH instruction and the POP instruction as described above will be described below. FIG. 70 is a flowchart showing an advantageous lottery process at the start of the game in the present embodiment executed by the main MPU 72.

When "1" is set in the second section flag of the main RAM 74 and the current gaming state is neither the pseudo bonus state ST4 nor the AT state ST5 (step S3401: YES, step S3402: NO). , Other processing is executed (step S3404). In other processes, the same processes as in steps S2204 to S2218 in the advantageous lottery process (FIG. 46) at the start of the game in the first embodiment are executed.

When "1" is set in the second section flag of the main RAM 74 and the current game state is the pseudo bonus state ST4 or the AT state ST5 (step S3401: YES, step S3402: YES), PUSH After executing the instruction (step S3404), the advantageous state processing at the start of the game is executed as a subroutine (step S3405). In the PUSH instruction in step S3404, after the value of the reference pointer of the main MPU 72 is added by 1, the unit storage area 125a corresponding to the storage area address of the value of the reference pointer after the addition of 1 is added to the unit storage area 125a for the advantageous state at the start of the game. Stores the information of the return address after finishing. The return address information becomes the address information corresponding to the processing of step S3406.

The advantageous state processing at the start of the game in step S3405 will be described later. After executing the process of step S3405, the lottery process of the advantageous middle effect is executed (step S3406). In the lottery process of the advantageous effect, the type of the advantageous effect to be executed in the pseudo bonus state ST4 or the AT state ST5 is determined by lottery. The advantageous middle effect is an effect executed by the upper lamp 61, the speaker 62, and the image display device 63 in a state where the start of rotation of the reels 32L, 32M, 32R is made to wait for the freeze period. In the lottery process of the advantageous middle production, if the pseudo bonus state ST4, the situation where the transition to the AT state ST5 is confirmed has a longer freeze period than the situation where the transition to the AT state ST5 is not confirmed. A lottery is performed so that the middle production is selected and higher, and if the AT state is ST5, the freeze period will be longer in the situation where the transition to the additional period is confirmed than in the situation where the transition to the additional period is not confirmed. A lottery will be held so that the type of advantageous medium production will be selected higher.

After that, the setting process of the advantageous middle effect is executed (step S3407). In the setting process, a process for causing a freeze period of the type selected in the lottery process of the advantageous medium effect is executed, and a advantageous medium effect command corresponding to the freeze period is transmitted to the effect side MPU 92. To do. As a result, the advantageous medium effect of the type selected this time is executed.

When a negative determination is made in step S3401, the process of step S3403 is executed, or the process of step S3407 is executed, the RET instruction is executed (step S3408). In the RET instruction, the return address information is read from the unit storage area 125a corresponding to the storage area address of the value of the reference pointer in the main MPU 72 by first executing the POP instruction. When the information of the return address is read, the value of the reference pointer is subtracted by 1. Then, the process proceeds to the process corresponding to the read return address information. Specifically, the process proceeds to step S1314 in the winning combination lottery process (FIG. 34).

FIG. 71 is a flowchart showing an advantageous state processing at the start of the game in step S3405 in the advantageous lottery process at the start of the game (FIG. 70).

When the value of the bet number setting counter 74a is "3" or more, not in the CB state, and in the pseudo bonus state ST4 (step S3501: YES, step S3502: NO, step S3503: YES), the PUSH instruction is executed. After that (step S3504), the ending determination process is executed as a subroutine (step S3505). In the PUSH instruction in step S3504, after the value of the reference pointer of the main MPU 72 is added by 1, the ending determination process is completed in the unit storage area 125a corresponding to the storage area address of the value of the reference pointer after the addition of 1. Stores return address information. The return address information is the address information corresponding to the processing in step S3506.

The ending determination process in step S3505 will be described later. After executing the process of step S3505, the processes of steps S3506 to S3511 are executed. The processes of steps S3506 to S3511 are the same as steps S2705-step S2710 in the advantageous state process (FIG. 55) at the start of the game in the first embodiment. That is, the AT transition lottery process is executed under predetermined conditions, and when the AT transition is won, the process for confirming the transition to the AT state ST5 is executed.

On the other hand, if the pseudo bonus state is ST4 and a negative determination is made in step S3503, the AT state process at the start of the game is executed as a subroutine after the PUSH instruction is executed (step S3512). In the PUSH instruction in step S3512, after the value of the reference pointer of the main MPU 72 is added by 1, the AT state processing at the start of the game is added to the unit storage area 125a corresponding to the storage area address of the value of the reference pointer after the addition of 1. Stores the information of the return address after finishing. The return address information is the address information corresponding to the processing in step S3514.

When a negative judgment is made in step S3501, when a positive judgment is made in step S3502, when a positive judgment is made in step S3506, when a negative judgment is made in step S3507, when a negative judgment is made in step S3509, When the process of step S3511 is executed, or when the process of step S3513 is executed, the RET instruction is executed (step S3514). In the RET instruction, the return address information is read from the unit storage area 125a corresponding to the storage area address of the value of the reference pointer in the main MPU 72 by first executing the POP instruction. When the information of the return address is read, the value of the reference pointer is subtracted by 1. Then, the process proceeds to the process corresponding to the read return address information. Specifically, the process proceeds to step S3406 in the advantageous lottery process (FIG. 70) at the start of the game.

FIG. 72 is a flowchart showing the AT state processing at the start of the game in step S3513 in the advantageous state processing at the start of the game (FIG. 71).

First, after executing the PUSH instruction (step S3601), the ending determination process is executed as a subroutine (step S3602). In the PUSH instruction in step S3601, after the value of the reference pointer of the main MPU 72 is added by 1, the ending determination process is completed in the unit storage area 125a corresponding to the storage area address of the value of the reference pointer after the addition of 1. Stores return address information. The information of the return address becomes the information of the address corresponding to the processing of step S3603.

The ending determination process in step S3602 will be described later. After executing the process of step S3602, the processes of steps S3603 to S3616 are executed. The processes of steps S3603 to S3616 are the same as steps S3002 to S015 in the AT state process (FIG. 59) at the start of the game in the first embodiment. That is, if it is not the additional period, the transfer lottery process for the additional period is executed under predetermined conditions, and if the transfer is won for the additional period, the process for confirming the transition to the additional period is executed. In addition, if the transition winning of the additional period is not achieved, the first additional lottery process is executed under predetermined conditions, and if the additional winning is achieved, a process for increasing the remaining number of sets in the AT state ST5. To execute. Further, in the case of the addition period, the second addition lottery process is executed, and the number of times selected in the second addition lottery process is added to the remaining number of sets in the AT state ST5.

When a negative determination is made in step S3604, when the process of step S3609 is executed, when a negative determination is made in step S3611, when the process of step S3613 is executed, or when the process of step S3616 is executed, a RET instruction is issued. Is executed (step S3617). In the RET instruction, the return address information is read from the unit storage area 125a corresponding to the storage area address of the value of the reference pointer in the main MPU 72 by first executing the POP instruction. When the information of the return address is read, the value of the reference pointer is subtracted by 1. Then, the process proceeds to the process corresponding to the read return address information. Specifically, the process proceeds to step S3514 in the state processing (FIG. 71) at the start of the game.

Next, the flowchart of FIG. 73 regarding the ending determination process executed as a subroutine in step S3505 in the advantageous state process (FIG. 71) at the start of the game or step S3602 in the AT state process (FIG. 72) at the start of the game. Will be explained with reference to.

In the ending determination process, it is specified whether or not the ending condition of the second section SC2 is determined to be satisfied, and if the ending condition is determined to be satisfied, a pseudo situation is determined. In the case of the bonus state ST4, the AT transition lottery process (step S3508) is prevented from being executed, and in the case of the AT state ST5, the transition lottery process (step S3605), the first additional lottery process (step S3610) and the second addition of the additional period are performed. The lottery process (step S3614) is prevented from being executed. In the present embodiment, even if the pseudo bonus state ST4 ends and the normal game state ST1 shifts to the normal game state ST1 without the transition to the AT state ST5, the second section SC2 can be continued and the AT state ST5 ends. The second section SC2 can be continued even if the normal game state ST1 is entered. Therefore, it can be determined that the ending condition of the second section SC2 is satisfied and the ending condition of the second section SC2 is satisfied not only in the middle of the AT state ST5 but also in the middle of the pseudo bonus state ST4.

Regarding the ending determination process, first, it is determined whether or not the number of target games is equal to or greater than the maximum number of games (step S3701). Specifically, in the pseudo-bonus state ST4, the sum of the value of the continuous game number counter 74c of the main RAM 74 and the value of the pseudo-bonus continuation counter of the main RAM 74 is equal to or greater than the upper limit number of games in the second section SC2. Determine if it is. Further, in the AT state ST5, the value of the continuous game number counter 74c of the main RAM 74, the value of the AT continuation counter of the main RAM 74, the value of the set count counter of the main RAM 74, and one set of the AT state ST5. It is determined whether or not the sum of the value of the number of initial continuous games (50 games) and the responsibility is equal to or greater than the maximum number of games in the second section SC2.

Further, it is determined whether or not the target number of sheets is equal to or more than the upper limit net increase number (step S3702). Specifically, in the pseudo-bonus state ST4, the result of adding the value obtained by adding the expected value of the game medium in the pseudo-bonus state ST4 to the value of the pseudo-bonus continuation counter is added to the value of the total acquisition number counter 74d. It is determined whether or not the number of sheets is equal to or more than the upper limit net increase number of the second section SC2. Further, in the case of the AT state ST5, the game in the AT state ST5 is the sum of the value of the AT continuation counter, the value of the set count counter, and the value of the number of initial continuation games (50 games) in one set of the AT state ST5. It is determined whether or not the result of adding the value of the result of integrating the expected acquisition values of the media to the value of the total acquisition number counter 74d is equal to or more than the upper limit net increase number of sheets in the second section SC2.

If a negative determination is made in both step S3701 and step S3702, the RET instruction is executed (step S3703). In the RET instruction, the return address information is read from the unit storage area 125a corresponding to the storage area address of the value of the reference pointer in the main MPU 72 by first executing the POP instruction. When the information of the return address is read, the value of the reference pointer is subtracted by 1. Then, the process proceeds to the process corresponding to the read return address information. Specifically, if the ending determination process is executed in step S3505 in the advantageous state process at the start of the game (FIG. 71), the process proceeds to step 3506 in the advantageous state process (FIG. 71) at the start of the game. Further, if the ending determination process is executed in step S3602 in the AT state process at the start of the game (FIG. 72), the process proceeds to step S3603 in the AT state process (FIG. 72) at the start of the game.

On the other hand, if an affirmative determination is made in either step S3701 or step S3702, the POP instruction is executed (step S3704). Specifically, the return address information is read from the unit storage area 125a corresponding to the storage area address of the value of the reference pointer in the main MPU 72. When the information of the return address is read, the value of the reference pointer is subtracted by 1. However, even if the information of the return address is read out, the processing of the information of the return address does not proceed.

After that, the RET instruction is executed (step S3705). In the RET instruction, the return address information is read from the unit storage area 125a corresponding to the storage area address of the value of the reference pointer in the main MPU 72 by first executing the POP instruction. When the information of the return address is read, the value of the reference pointer is subtracted by 1. Then, the process proceeds to the process corresponding to the read return address information.

Here, as described above, the POP instruction is executed in step S3704 before the POP instruction included in the RET instruction in step S3705 is executed. Therefore, the information of the return address to be read by the POP instruction included in the RET instruction of step S3705 is one for the storage area address of the value of the reference pointer when the ending determination process (FIG. 73) is started. It is the value of the storage area address in the previous order. Then, the RET instruction in step S3705 does not return to the processing in the subroutine that was executed immediately before the ending determination process (FIG. 73) is executed, but in the subroutine that was executed immediately before the subroutine was executed. It will return to the process.

In the pseudo-bonus state ST4, since the subroutine of the ending determination process (FIG. 73) is executed in step S3505 in the advantageous state process (FIG. 71) at the start of the game, the RET instruction in step S3705 starts the game. The process shifts to the process of step S3406 in the advantageous lottery process (FIG. 70) at the start of the game, which is shifted by the RET command in step S3514 in the time advantageous state process (FIG. 71). That is, when the RET instruction of step S3705 is executed in the pseudo bonus state ST4, the processes of steps S3506 to S3511 are not executed in the advantageous state process (FIG. 71) at the start of the game, so that the AT transition lottery process is executed. Not done. As a result, the AT transition lottery process is not executed in the situation where it is confirmed that the ending condition is satisfied in the pseudo bonus state ST4.

In the AT state ST5, since the subroutine of the ending determination process (FIG. 73) is executed in step S3602 in the AT state process (FIG. 72) at the start of the game, the RET instruction in step S3705 is used at the start of the game. The process shifts to the process of step S3514 in the advantageous state process (FIG. 71) at the start of the game, which is shifted by the RET instruction in step S3617 in the AT state process (FIG. 72). That is, when the RET instruction of step S3705 is executed in the AT state ST5, the processes of steps S3603 to S3617 are not executed in the AT state process (FIG. 72) at the start of the game. The first additional lottery process and the second additional lottery process are not executed. As a result, in the situation where it is confirmed that the ending condition is satisfied in the AT state ST5, the transition lottery process for the additional period, the first additional lottery process, and the second additional lottery process are not executed.

Here, instead of executing the POP instruction once extra, the second section uses the information of the main RAM 74 indicating that the ending condition of the second section SC2 is satisfied. The contents of the comparative example adopting the configuration of skipping the execution of the processing that should not be executed in the situation where it is confirmed that the ending condition of SC2 is satisfied will be described.

FIG. 74 is a flowchart showing the ending determination process in the comparative example.

In steps SA101 to SA103, the same processing as in steps S3701 to S3703 of the ending determination processing (FIG. 73) in the slot machine 10 is executed. When an affirmative determination is made in either step SA101 or step SA102, "1" is set in the regulation compliance flag provided in the main RAM in the comparative example (step SA104). After that, the RET instruction is executed (step SA105). In the RET instruction, first, the POP instruction is executed to read the return address information from the unit storage area corresponding to the storage area address of the value of the reference pointer provided in the main MPU in the comparative example. When the information of the return address is read, the value of the reference pointer is subtracted by 1. Then, the process proceeds to the process corresponding to the read return address information. If it is in the pseudo bonus state, it returns to the advantageous state processing (FIG. 75) at the start of the game.

FIG. 75 is a flowchart showing the advantageous state processing at the start of the game in the comparative example.

In steps SA111 to SA115 and steps SA117 to SA124, the same processing as in steps S3501 to 514 of the advantageous state processing (FIG. 71) at the start of the game in the slot machine 10 is executed. In the advantageous state processing at the start of the game in the comparative example, after the ending determination processing is executed in step SA115, it is determined whether or not "1" is set in the regulation correspondence flag of the main RAM in the comparative example ( Step SA116). When "1" is not set in the regulation compliance flag (step SA116: NO), the processing after step SA117 is executed, whereas when "1" is set in the regulation compliance flag, the process is executed. (Step SA116: YES), the processing for the advantageous state at the start of this game is terminated as it is.

As described above, in the comparative example, even if it is specified in the ending determination process (FIG. 74) that the ending condition of the second section SC2 is satisfied, the regulation-compliant flag of the main RAM is set to "1". After setting, if it is in the pseudo-bonus state, it returns to the advantageous state processing (FIG. 75) at the start of the game, and whether or not "1" is set in the regulation compliance flag in step SA116 of the processing. If it is determined intentionally and "1" is set in the regulation compliance flag, the advantageous state processing (FIG. 75) at the start of the game is terminated as it is. In this case, when it is specified that the ending condition of the second section SC2 is satisfied, the execution of the processing after step SA117 is skipped in the advantageous state processing (FIG. 75) at the start of the game. In order to do so, it is necessary to set the processing (that is, instruction) of step SA104 and step SA116 as a program, and it is necessary to provide a regulation compliance flag in the main RAM. In the comparative example, it is necessary to adopt such a configuration for the AT state processing at the start of the game, which is executed in the AT state.

On the other hand, in the slot machine 10, when it is confirmed that the ending condition of the second section SC2 is satisfied in the pseudo bonus state ST4 or the AT state ST5, the POP instruction is executed once extra and returned. By forcibly adjusting the address to the previous return address, the execution of processing that should not be executed in the situation where it is confirmed that the ending condition of the second section SC2 is satisfied is skipped. As a result, while reducing the program capacity and the storage capacity required in the main RAM 74, the execution of processing that should not be executed in the situation where the ending condition of the second section SC2 is determined to be satisfied is skipped. It becomes possible to do.

The number of extra POP instructions to be executed is not limited to one, and may be a plurality of times such as two or three times.

<Fourth Embodiment>
In this embodiment, a part of the processing configuration of the main MPU 72 is different from that of the first embodiment. Hereinafter, a configuration different from that of the first embodiment will be described. The description of the same configuration as that of the first embodiment will be basically omitted.

FIG. 76 is a flowchart showing a weight period calculation process executed by the main MPU 72. The weight period is the same as in the first embodiment, from the time when the rotation of the reels 32L, 32M, 32R is started in the predetermined game to the start of the rotation of the reels 32L, 32M, 32R in the next game. It is a period that is compulsorily secured as the period of. Further, the calculation process of the weight period is executed in the timer subtraction process (step S506) of the timer interrupt process (FIG. 19).

When the weight period is set, that is, when the rotation of the reels 32L, 32M, 32R is started (step S3801: YES), the weight counter 126 provided in the main RAM 74 (see FIG. 77A). ) Set the information corresponding to the weight period (specifically, 4.1 seconds) (step S3802). Further, "1" is set in the weight flag provided in the main RAM 74 (step S3803). The weight flag is a flag for the main MPU 72 to specify that the status is in the middle of measuring the weight period, and the weight counter 126 is a counter for the main MPU 72 to specify the remaining period of the weight period. .. When "1" is set in the weight flag, the start of rotation of the reels 32L, 32M, 32R is waited even after one game is started and the lottery process (FIG. 34) of the winning combination is completed. , When the weight flag is not set to "1", the rotation of the reels 32L, 32M, 32R is started.

When a negative determination is made in step S3801, the subtraction process of the weight counter 126 is executed on condition that "1" is set in the weight flag of the main RAM 74 (step S3804: YES) (step S3805). In the subtraction process, the value of the weight counter 126 is subtracted by 1, although the details will be described later. Then, when the value of the weight counter 126 after subtraction is "0" (step S3806: YES), the weight flag is cleared to "0" (step S3807).

77 (a) to 77 (c) are explanatory views for explaining the content of the subtraction process of the weight counter 126 in step S3805. FIG. 77 (a) is an explanatory diagram for explaining the configuration of the weight counter 126, and FIG. 77 (b) is an explanatory diagram for explaining the content of a specific instruction for the subtraction process of the weight counter 126. FIG. 77 (c) is an explanatory diagram for explaining how the digit of the upper byte TK1 is carried down in the weight counter 126.

As shown in FIG. 77 (a), the weight counter 126 has a 2-byte configuration having a high-order byte TK1 consisting of 1 byte and a low-order byte TK2 consisting of 1 byte. In step S3802 in the weight period calculation process (FIG. 76), information corresponding to the weight period (specifically, 4.1 seconds) is set in the weight counter 126 having a 2-byte structure.

In the subtraction process of the weight counter 126 in step S3805 in the weight period calculation process (FIG. 76), the instruction shown in FIG. 77 (b) is executed. Specifically, the instruction "SUB (TK2), 1" is set in the program address of "4101". "SUB" is an instruction to subtract a specified numerical value by a specified value. Therefore, the instruction "SUB (TK2), 1" is an instruction to subtract the value of the lower byte TK2 of the weight counter 126 by 1. As a result of executing the instruction, the value of the lower byte TK2 is subtracted by 1, but as shown in FIG. 77 (c1), the value of the lower byte TK2 is subtracted by 1. If this is the case, "1" is set in the carry flag CF provided on the main MPU 72, and the value of the lower byte TK2 is inverted to become "11111111" as shown in FIG. 77 (c2).

The instruction "SBC (TK1), 1" is set in the subsequent program address of "4102". The instruction "SBC" is an instruction to subtract the specified numerical value by the specified value when "1" is set in the carry flag CF of the main MPU 72 in the immediately preceding instruction. Therefore, the instruction "SBC (TK1), 1" is weighted when "1" is set in the carry flag CF as a result of subtracting 1 from the value of the lower byte TK2 in the immediately preceding instruction "4101". This is an instruction to subtract 1 from the value of the high-order byte TK1 of the counter 126. In this case, if "1" is not set in the carry flag CF in the immediately preceding "4101" instruction, the value of the high-order byte TK1 is maintained in the "4102" instruction, and the carry is carried in the immediately preceding "4101" instruction. When "1" is set in the flag CF, the value of the high-order byte TK1 is subtracted by 1 in the instruction of "4102". That is, as shown in FIG. 77 (c1), when the value of the upper byte TK1 is "00000010" and the value of the lower byte TK2 is subtracted by 1 and the carry flag CF is set to "1", the upper byte is higher. The value of the byte TK1 is subtracted by 1 to obtain "00000001" as shown in FIG. 77 (c2).

An instruction "RET" is set in the subsequent program address of "4103". When the "RET" command is executed, the process proceeds to step S3806 of the weight period calculation process (FIG. 76).

FIG. 78 is a flowchart showing a medal monitoring process executed by the main MPU 72. The medal monitoring process is executed in the sensor monitoring process (step S505) of the timer interrupt process (FIG. 19).

In the present embodiment, in a situation where acceptance of medals is permitted, the first inserted medal as the inserted medal detection sensor 45a is provided in the medal passage of the selector 52 for guiding the medal inserted in the medal insertion slot 45 to the hopper device 53. A detection sensor and a second inserted medal detection sensor are provided. These first inserted medal detection sensor and second inserted medal detection sensor are arranged side by side in the medal passing direction so that the first inserted medal detection sensor is on the upstream side and the second inserted medal detection sensor is on the downstream side. There is. Then, when a medal is detected by the second inserted medal detection sensor before the predetermined monitoring period elapses after the medal is detected by the first inserted medal detection sensor, the main MPU 72 passes through the medal insertion slot 45. It is specified that one medal has been inserted. In the medal monitoring process, the period from the detection of a medal by the first inserted medal detection sensor to the detection of a medal by the second inserted medal detection sensor is monitored, and when this period exceeds a predetermined monitoring period. Execute the process for executing the abnormality notification.

Specifically, first, the addition process of the monitoring period counter KK (see FIG. 79 (a)) provided in the main RAM 74 is executed (step S3901). The monitoring period counter KK uses the main MPU 72 to determine whether or not the period from the detection of the medal by the first inserted medal detection sensor to the detection of the medal by the second inserted medal detection sensor exceeds the predetermined monitoring period. It is a counter for identification.

Then, on condition that the medal is detected by the first inserted medal detection sensor (step S3902: YES), the monitoring period counter KK is cleared to "0" (step S3903). Further, when a medal is detected by the second inserted medal detection sensor (step S3904: YES), it is determined whether or not the value of the monitoring period counter KK is the maximum value (step S3905). When the value of the monitoring period counter KK is the maximum value (step S3905: YES), "1" is set in the abnormality flag provided in the main RAM 74 (step S3906), and the effect side MPU 92 is abnormal. The command is transmitted (step S3907). As a result, the abnormality signal is output to the outside, and the abnormality notification is executed by the upper lamp 61, the speaker 62, and the image display device 63.

79 (a) to 79 (c) are explanatory views for explaining the content of the addition process of the monitoring period counter KK in step S3901. FIG. 79 (a) is an explanatory diagram for explaining the configuration of the monitoring period counter KK, and FIG. 79 (b) is an explanatory diagram for explaining the content of a specific instruction for the addition process of the monitoring period counter KK. FIG. 79 (c) is an explanatory diagram for explaining how the state of reaching the maximum value is maintained when the value of the monitoring period counter KK reaches the maximum value.

As shown in FIG. 79 (a), the monitoring period counter KK has a 1-byte configuration. In the addition process of the monitoring period counter KK in step S3901 in the medal monitoring process (FIG. 78), the instruction shown in FIG. 79 (b) is executed. Specifically, an instruction such as "ADD (KK), 1" is set in the program address of "5101". "ADD" is an instruction to add a specified numerical value by a specified value. Therefore, the instruction "ADD (KK), 1" is an instruction to add 1 to the value of the monitoring period counter KK. As a result of executing the instruction, the value of the monitoring period counter KK is incremented by 1, but as shown in FIG. 79 (c1), the value of the monitoring period counter KK is "111111111". When 1 is added, "1" is set in the carry flag CF provided on the main MPU 72, and the value of the monitoring period counter KK is inverted to "00000000000" as shown in FIG. 79 (c2). Become.

The instruction "SBC (KK), 1" is set in the subsequent program address of "5102". As already explained, the instruction "SBC" is an instruction to subtract the specified numerical value by the specified value when "1" is set in the carry flag CF of the main MPU 72 in the immediately preceding instruction. .. Therefore, the instruction "SBC (KK), 1" is used when the carry flag CF is set to "1" as a result of adding 1 to the value of the monitoring period counter KK in the immediately preceding instruction "5101". It is an instruction to subtract 1 from the value of the monitoring period counter KK. In this case, if the carry flag CF is not set to "1" in the immediately preceding "5101" instruction, the value of the monitoring period counter KK is maintained in the "5102" instruction, and in the immediately preceding "5101" instruction. When "1" is set in the carry flag CF, the value of the monitoring period counter KK is decremented by 1 in the instruction of "5102". That is, in the situation where the value of the monitoring period counter KK is "111111111" as shown in FIG. 79 (c1), the value of the monitoring period counter KK is incremented by 1 and added to the carry flag CF as shown in FIG. 79 (c2). When "1" is set and the value of the monitoring period counter KK becomes "00000000000", the value of the monitoring period counter KK is subtracted by 1 and the monitoring period counter KK is shown in FIG. 79 (c3). The value of is "11111111". As a result, when the process of step S3901 is executed in a situation where the value of the monitoring period counter KK has already reached the maximum value, the value of the monitoring period counter KK is maintained at the maximum value. Since a value smaller than this maximum value by "1" corresponds to the predetermined monitoring period, when the value of the monitoring period counter KK reaches the maximum value, it corresponds to a state in which the monitoring period exceeds the predetermined monitoring period. Then, in this situation, when the medal is detected by the second inserted medal detection sensor, an affirmative determination is made in step S3904 and step S3905, and the abnormality notification is executed.

An instruction "RET" is set in the subsequent program address of "5103". When the "RET" command is executed, the process proceeds to step S3902 of the medal monitoring process (FIG. 78).

Here, a configuration in which the "SBC" instruction is not used in the addition process of the monitoring period counter KK in step S3901 is also conceivable. FIG. 79 (d) is an explanatory diagram for explaining the content of a comparative example in which the addition process of the monitoring period counter KK is executed without executing the “SBC” instruction.

In the comparative example, the instruction "ADD (KK), 1" is set for the program address of "5101". As already explained, this instruction is an instruction to add 1 to the value of the monitoring period counter KK. As a result of executing the instruction, the value of the monitoring period counter KK is incremented by 1.

The instruction "JR NCF, 2" is set in the subsequent program address of "5102". This instruction adds "2" to the program address "5102" when "1" is not set in the carry flag CF as a result of the instruction by the latest program address (specifically, "5101"). It is an instruction to jump to "5104" and proceed to "5103" which is the program address in the next order when "1" is set in the carry flag CF.

The instruction "LD (KK), 255" is set in the program address of "5103". This instruction is an instruction to set the value of the monitoring period counter KK to the maximum value "11111111". As a result, as a result of adding 1 to the value of the monitoring period counter KK in the situation of "11111111", the value of the monitoring period counter KK is inverted to "00000000000" and the carry flag CF is set to "1". Will return to "11111111", which is the maximum value of the monitoring period counter KK.

An instruction "RET" is set in the program address of "5104". When the "RET" command is executed, the process proceeds to step S3902 of the medal monitoring process (FIG. 78).

In the comparative example in which the "SBC" command is not used in the process for returning to the maximum value when the value of the monitoring period counter KK exceeds the maximum value as a result of adding 1 to the value of the monitoring period counter KK as described above. While four instructions are required for the process, three instructions are sufficient for the process by using the "SBC" instruction as in the slot machine 10. This makes it possible to reduce the program capacity.

Further, as described above, the "SBC" instruction is used to generate a carry of the digit of the upper byte TK1 in the weight counter 126 in the subtraction process (step S3805) of the weight counter 126 in the weight period calculation process (FIG. 76). It is an instruction to be given. That is, it is possible to reduce the program capacity as described above by using an instruction used for another purpose in other processing.

<Fifth Embodiment>
In the present embodiment, the configuration of the weight period calculation process and the medal monitoring process is different from that of the fourth embodiment. Hereinafter, a configuration different from the fourth embodiment will be described. The description of the same configuration as that of the fourth embodiment will be basically omitted.

FIG. 80 is a flowchart showing a weight period calculation process in the present embodiment executed by the main MPU 72.

When the weight period is set, that is, when the rotation of the reels 32L, 32M, 32R is started (step S4001: YES), the weight counter 126 provided in the main RAM 74 is cleared to "0" (step S4001: YES). Step S4002). The configuration of the weight counter 126 is the same as that of the fourth embodiment. Further, "1" is set in the weight flag of the main RAM 74 (step S4003).

When a negative determination is made in step S4001, the addition process of the weight counter 126 is executed on condition that "1" is set in the weight flag of the main RAM 74 (step S4004: YES) (step S4005). In the addition process, the value of the weight counter 126 is added by 1 as described in detail later. Then, when the value of the weight counter 126 after 1 addition is a value corresponding to the weight period (step S4006: YES), the weight flag is cleared to "0" (step S4007).

81 (a) and 81 (b) are explanatory views for explaining the content of the addition process of the weight counter 126 in step S4005. FIG. 81 (a) is an explanatory diagram for explaining the content of a specific instruction of the addition process of the weight counter 126, and FIG. 81 (b) shows the carry of the digit of the upper byte TK1 in the weight counter 126. It is explanatory drawing for demonstrating the situation.

In the addition process of the weight counter 126 in step S4005 in the weight period calculation process (FIG. 80), the instruction shown in FIG. 81 (a) is executed. Specifically, the instruction "ADD (TK2), 1" is set in the program address of "4101". This instruction is an instruction to add 1 to the value of the lower byte TK2. As a result of executing the instruction, the value of the lower byte TK2 is added by 1, but as shown in FIG. 81 (b1), the value of the lower byte TK2 is added by 1 in the situation where the value of the lower byte TK2 is "11111111". If this is the case, "1" is set in the carry flag CF provided on the main MPU 72, and the value of the lower byte TK2 is inverted to "00000000000" as shown in FIG. 81 (b2).

The instruction "ADC (TK1), 1" is set in the subsequent program address of "4102". The instruction "ADC" is an instruction to add the specified numerical value by the specified value when "1" is set in the carry flag CF of the main MPU 72 in the immediately preceding instruction. Therefore, the instruction "ADC (TK1), 1" is weighted when "1" is set in the carry flag CF as a result of adding 1 to the value of the lower byte TK2 in the immediately preceding instruction "4101". It is an instruction to add 1 to the value of the upper byte TK1 of the counter 126. In this case, if "1" is not set in the carry flag CF in the immediately preceding "4101" instruction, the value of the high-order byte TK1 is maintained in the "4102" instruction, and the carry is carried in the immediately preceding "4101" instruction. When "1" is set in the flag CF, the value of the high-order byte TK1 is added by 1 in the instruction of "4102". That is, as shown in FIG. 81 (b1), when the value of the upper byte TK1 is "00000001" and the value of the lower byte TK2 is added by 1 and the carry flag CF is set to "1", the upper byte is higher. The value of the byte TK1 is added by 1, and the value of the upper byte TK1 becomes "00000010" as shown in FIG. 81 (b2).

An instruction "RET" is set in the subsequent program address of "4103". When the "RET" command is executed, the process proceeds to step S4006 of the weight period calculation process (FIG. 80).

FIG. 82 is a flowchart showing the medal monitoring process in the present embodiment executed by the main MPU 72.

First, the subtraction process of the monitoring period counter KK of the main RAM 74 is executed (step S4101). Then, on condition that a medal is detected by the first inserted medal detection sensor (step S4102: YES), the maximum value is set in the monitoring period counter KK (step S4103). As a result, the monitoring period counter KK becomes "11111111". Further, when a medal is detected by the second inserted medal detection sensor (step S4104: YES), it is determined whether or not the value of the monitoring period counter KK is “0” (step S4105). When the value of the monitoring period counter KK is "0" (step S4105: YES), the abnormality flag of the main RAM 74 is set to "1" (step S4106), and an abnormality command is issued to the production side MPU 92. Transmit (step S4107). As a result, the abnormality signal is output to the outside, and the abnormality notification is executed by the upper lamp 61, the speaker 62, and the image display device 63.

83 (a) and 83 (b) are explanatory views for explaining the content of the subtraction process of the monitoring period counter KK in step S4101. FIG. 83 (a) is an explanatory diagram for explaining the content of a specific instruction of the addition process of the monitoring period counter KK, and FIG. 83 (b) shows the case where the value of the monitoring period counter KK reaches the maximum value. It is explanatory drawing for demonstrating how the state which reached the minimum value is maintained.

In the subtraction process of the monitoring period counter KK in step S4101 in the medal monitoring process (FIG. 82), the instruction shown in FIG. 83 (a) is executed. Specifically, an instruction such as "SUB (KK), 1" is set in the program address of "5101". This instruction is an instruction to subtract 1 from the value of the monitoring period counter KK. As a result of executing the instruction, the value of the monitoring period counter KK is subtracted by 1, but as shown in FIG. 83 (b1), the value of the monitoring period counter KK is "00000000000". When 1 is subtracted, "1" is set in the carry flag CF provided on the main MPU 72, and the value of the monitoring period counter KK is inverted to "11111111" as shown in FIG. 83 (b2). Become.

The instruction "ADC (KK), 1" is set in the subsequent program address of "5102". As already explained, the instruction "ADC" is an instruction to add the specified numerical value by the specified value when "1" is set in the carry flag CF of the main MPU 72 in the immediately preceding instruction. .. Therefore, the instruction "ADC (KK), 1" is used when the carry flag CF is set to "1" as a result of subtracting 1 from the value of the monitoring period counter KK in the immediately preceding instruction "5101". It is an instruction to add 1 to the value of the monitoring period counter KK. In this case, if the carry flag CF is not set to "1" in the immediately preceding "5101" instruction, the value of the monitoring period counter KK is maintained in the "5102" instruction, and in the immediately preceding "5101" instruction. When "1" is set in the carry flag CF, the value of the monitoring period counter KK is incremented by 1 in the instruction of "5102". That is, as shown in FIG. 83 (b1), the value of the monitoring period counter KK is decremented by 1 in the situation where the value of the monitoring period counter KK is "00000000000", and the carry flag CF is displayed as shown in FIG. 83 (b2). When "1" is set and the value of the monitoring period counter KK becomes "111111111", the value of the monitoring period counter KK is incremented by 1 and the monitoring period counter KK is shown in FIG. 83 (b3). The value of is "0000000000". As a result, when the process of step S4101 is executed in a situation where the value of the monitoring period counter KK is already the minimum value, the value of the monitoring period counter KK is maintained at the initial value. Since the situation where the value of the monitoring period counter KK is "00000001" corresponds to the predetermined monitoring period, when the value of the monitoring period counter KK becomes the minimum value, it corresponds to the state where the monitoring period exceeds the predetermined monitoring period. To do. Then, in this situation, when the medal is detected by the second inserted medal detection sensor, an affirmative determination is made in step S4104 and step S4105, and the abnormality notification is executed.

An instruction "RET" is set in the subsequent program address of "5103". When the "RET" command is executed, the process proceeds to step S4102 of the medal monitoring process (FIG. 82).

Here, a configuration in which the "ADC" instruction is not used in the subtraction process of the monitoring period counter KK in step S4101 is also conceivable. FIG. 83 (c) is an explanatory diagram for explaining the content of a comparative example in which the subtraction process of the monitoring period counter KK is executed without executing the “ADC” instruction.

In the comparative example, the instruction "SUB (KK), 1" is set for the program address of "5101". As already explained, this instruction is an instruction to subtract 1 from the value of the monitoring period counter KK. As a result of executing the instruction, the value of the monitoring period counter KK is subtracted by 1.

The instruction "JR NCF, 2" is set in the subsequent program address of "5102". This instruction adds "2" to the program address "5102" when "1" is not set in the carry flag CF as a result of the instruction by the latest program address (specifically, "5101"). It is an instruction to jump to "5104" and proceed to "5103" which is the program address in the next order when "1" is set in the carry flag CF.

The instruction "LD (KK), 0" is set in the program address of "5103". This instruction is an instruction to set the value of the monitoring period counter KK to the minimum value "000000000000". As a result, as a result of subtracting 1 from the value of the monitoring period counter KK in the situation of "00000000000", it is inverted to "11111111" and when "1" is set in the carry flag CF, the monitoring period counter KK The value will return to the minimum value of "00000000000".

An instruction "RET" is set in the program address of "5104". When the "RET" command is executed, the process proceeds to step S4102 of the medal monitoring process (FIG. 82).

In the comparative example in which the "ADC" instruction is not used in the process for returning to the minimum value when the value of the monitoring period counter KK is less than the minimum value as a result of subtracting 1 from the value of the monitoring period counter KK as described above. While four instructions are required for the process, three instructions are sufficient for the process by using the "ADC" instruction as in the slot machine 10. This makes it possible to reduce the program capacity.

Further, as described above, the "ADC" instruction is used to generate the carry of the digit of the upper byte TK1 in the weight counter 126 in the addition process (step S4005) of the weight counter 126 in the weight period calculation process (FIG. 80). It is an instruction to be given. That is, it is possible to reduce the program capacity as described above by using an instruction used for another purpose in other processing.

<Sixth Embodiment>
In the present embodiment, the configuration of the main process executed by the main MPU 72 is different from that of the first embodiment. Hereinafter, a configuration different from that of the first embodiment will be described. The description of the same configuration as that of the first embodiment will be basically omitted.

FIG. 84 is a flowchart showing the main process in the present embodiment executed by the main MPU 72.

First, the power failure signal is read in the same manner as in step S101 of the main process (FIG. 10) in the first embodiment (step S4201). In this case, the presence or absence of a power failure is specified by monitoring the predetermined bit of the input port 72a. After that, it is determined whether or not the power failure signal received from the power failure monitoring circuit 54b is at the HI level by determining whether or not "1" is stored in the predetermined bit of the input port 72a (step S4202). ). When the power failure signal is not at the HI level (step S4202: NO), the confirmation counter provided in the main RAM 74 is cleared to "0" (step S4203), and when the power failure signal is at the HI level. (Step S4202: YES) adds 1 to the value of the confirmation counter of the main RAM 74 (step S4204). The confirmation counter is a counter for the main MPU 72 to specify the number of times that the power failure signal is continuously confirmed to be at the HI level.

When the process of step S4203 or the process of step S4204 is executed, it is determined whether or not the value of the confirmation counter of the main RAM 74 is equal to or greater than the progress permission value (step S4205). The progress permission value is arbitrary as long as it is an integer of 2 or more, but is set to "5" in this embodiment. If the value of the confirmation counter is less than the progress permission value (step S4205: NO), that is, if the number of consecutive confirmations that the power failure signal is at the HI level is less than the progress permission value, the process returns to step S4201. Check again whether the power failure signal is HI.

When the value of the confirmation counter is equal to or greater than the progress permission value (step S4205: YES), that is, when the number of consecutive confirmations that the power failure signal is at the HI level is equal to or greater than the progress permission value, the internal function setting process is performed. Execute (step S4206). In the internal function setting process, various initial settings are performed for the register group in the main MPU 72, the I / O device, and the like. After that, other processing is executed (step S4207). In other processes, the same processes as those of steps S104 to S121 of the main process (FIG. 10) in the first embodiment are executed.

According to the above configuration, when the supply of operating power to the main MPU 72 is started, the power failure signal is in the HI level state continuously for a number of times equal to or greater than the progress permission value, which is an integer of 2 or more. The execution of the processing after step S4206 in the main processing (FIG. 84) is awaited until it is confirmed. This makes it possible to start the process for advancing the game in a situation where the HI level power failure signal is stably output.

<7th Embodiment>
In the present embodiment, the configuration of the main process executed by the main MPU 72 is different from that of the first embodiment. Hereinafter, a configuration different from that of the first embodiment will be described. The description of the same configuration as that of the first embodiment will be basically omitted.

FIG. 85 is a flowchart showing the main processing in the present embodiment executed by the main MPU 72.

First, the execution of the timer interrupt process (FIG. 19) is permitted (step S4301). The timer interrupt process (FIG. 19) is started at a cycle of 1.49 milliseconds as in the first embodiment, but when the execution of the timer interrupt process (FIG. 19) is permitted in the process of step S4301 The timer interrupt process (FIG. 19) is activated when 1.49 milliseconds have elapsed from this timing.

After that, it waits until the timer interrupt process (FIG. 19) occurs once (step S4302). The processing period from the execution of step S4301 to the execution of step S4302 on the main MPU 72 is several microseconds, and a negative determination is made in step S4302 until the processing of step S4302 is executed again. Since the processing period is also several microseconds, the negative determination in step S4302 is executed about 500 times before the timer interrupt processing (FIG. 19) is executed once.

When the timer interrupt process (FIG. 19) is executed once, the internal function setting process is executed (step S4303). In the internal function setting process, various initial settings are performed for the register group in the main MPU 72, the I / O device, and the like. After that, other processing is executed (step S4304). In other processes, the same processes as those of steps S104 to S121 of the main process (FIG. 10) in the first embodiment are executed.

According to the above configuration, when the supply of operating power to the main MPU 72 is started, 1.49 milliseconds, which is the interrupt cycle of the timer interrupt processing (FIG. 19), elapses and the timer interrupt processing (FIG. 19). Waits for the execution of the processes after step S4303 in the main process (FIG. 85) until the execution of is completed. The period expected for stable output of the HI level power failure signal is shorter than the interrupt cycle of the timer interrupt process (FIG. 19) of 1.49 milliseconds. Therefore, it is possible to start the process for advancing the game in a situation where the HI level power failure signal is stably output.

In the timer interrupt processing (FIG. 19), the first processing round occurs when 1.49 milliseconds have passed since the supply of operating power to the main MPU 72 was started. As described above, the timer interrupt processing (FIG. 19) is at the HI level. Since the period expected until the power failure signal is stably output is shorter than the interrupt cycle of 1.49 milliseconds in the timer interrupt process (FIG. 19), the power failure occurs in the timer interrupt process (FIG. 19). Even if the timer processing (step S503) is executed, the power failure signal at the HI level is stably output by the time the power failure processing is started. Therefore, in the timer interrupt process (FIG. 19) that is executed first after the supply of operating power is started, a situation occurs in which the power failure process is executed due to the unstable output state of the power failure signal. It is possible to avoid it.

<Other Embodiments>
It should be noted that the description is not limited to the above-described embodiments, and various modifications and improvements can be made without departing from the spirit of the present invention. For example, it may be changed as follows. Incidentally, the following configurations of other embodiments may be applied individually to the configurations of the above-described embodiments, or may be applied in combination. Further, the configurations of the above embodiments may be applied in combination with each other, or the configurations of the following different embodiments may be applied individually or in combination to the configurations in which the configurations of the above embodiments are combined with each other. Good.

(1) The power failure monitoring circuit 54b outputs a LOW level power failure signal to the main MPU 72 when the voltage applied to the power supply unit 54a from the external power supply exceeds the reference voltage, and outputs the LOW level power failure signal to the power supply unit 54a from the external power supply. When the applied voltage becomes equal to or lower than the reference voltage, a HI level power failure signal may be output to the main MPU 72. In this case, when it is confirmed in the power failure processing (FIG. 13) that the output level of the power failure signal has changed from the HI level to the LOW level, the main MPU 72 executes the power failure processing shown in steps S202 to S205. Will be done. Further, in the main process (FIG. 10) in the first embodiment, the process waits without proceeding to the process after step S103 until it is confirmed in step S102 that the output level of the power failure signal becomes the LOW level, and the sixth step is described above. In the main process (FIG. 84) of the embodiment, when it is confirmed in step S4202 that the output level of the power failure signal is the LOW level, the process of step S4204 is executed, and in step S4202, the output level of the power failure signal is HI. When it is confirmed that the level is reached, the process of step S4203 is executed.

(2) When the voltage applied to the power supply unit 54a from the external power supply exceeds the reference voltage, the power failure monitoring circuit 54b does not output any signal related to the power failure to the main MPU 72, and the power supply unit 54a from the external power supply. When the voltage applied to is equal to or lower than the reference voltage, a power failure signal may be output to the main MPU 72. In this case, when the main MPU 72 confirms that the power failure signal has been received in the power failure processing (FIG. 13), the main MPU 72 executes the power failure processing shown in steps S202 to S205. Further, in the main process (FIG. 10) in the first embodiment, the process waits without proceeding to the processes after step S103 until it is confirmed in step S102 that the power failure signal is not received, and the sixth embodiment is described above. In the main process (FIG. 84) in the above, when it is confirmed that the power failure signal is not received in step S4202, the process of step S4204 is executed, and when it is confirmed that the power failure signal is received in step S4202. The process of step S4203 is executed.

(3) The configuration is not limited to the configuration of waiting for the progress of the processing in the main processing (FIGS. 10, 84, 85) until the reception status of the power failure signal stabilizes, and instead of or in addition to the configuration, the main processing The configuration may be such that the progress of the processing in the main processing (FIGS. 10, 84, 85) is waited until the reception status of the reset signal output to the side MPU 72 becomes stable.

(4) In the seventh embodiment, the main process (FIG. 85) is configured to wait for the progress of the process after step S4303 until the timer interrupt process (FIG. 19) is executed once, but the present invention is limited to this. It may be configured to wait for the progress of the processing after step S4303 until the timer interrupt processing (FIG. 19) is executed twice, and until the timer interrupt processing (FIG. 19) is executed three times. The process may be configured to wait for the progress of the process after step S4303, and the progress of the process after step S4303 is waited until a predetermined number of times the timer interrupt process (FIG. 19) is executed is executed. It may be configured.

(5) One information abnormality flag 74g is provided in common for the information abnormality of the power failure flag, the checksum abnormality, and the set value abnormality, but the configuration is not limited to this, and the power failure flag The information abnormality flag 74g may be provided in a one-to-one correspondence with each of the information abnormality, the checksum abnormality, and the set value abnormality. Even in this case, "1" is set in the information abnormality flag 74g corresponding to the information abnormality of the power failure flag before the process for identifying whether or not the information abnormality of the power failure flag has occurred is executed. The information error flag 74g corresponding to the checksum abnormality is set to "1" before the process for identifying whether or not the checksum abnormality has occurred is executed, and the set value abnormality occurs. The information abnormality flag 74g corresponding to the set value abnormality may be set to "1" before the process for specifying whether or not the setting value is executed is executed. In this configuration, after all the processes for identifying whether or not each information abnormality has occurred are executed, it is determined whether or not "1" is set in any of the information abnormality flags 74g. When "1" is set in any of the information abnormality flags 74g, it is preferable that the operation prohibition process is executed.

(6) After setting "1" to the information abnormality flag 74g, it is determined whether or not an information abnormality has occurred, and if no information abnormality has occurred, the information abnormality flag 74g is cleared to "0", while the information abnormality flag 74g is cleared. When an information abnormality has occurred, a configuration in which "1" is set in the information abnormality flag 74g may be applied to a configuration for abnormality monitoring different from the information abnormality. As different abnormality monitoring, for example, a configuration for detecting an illegal radio wave and a configuration for detecting an illegal magnet can be considered.

(7) When "1" is set in the information error flag 74g, the operation prohibition process is executed without executing the setting change process (FIG. 15) even if the setting change operation is performed. May be. In this case, it is possible to prioritize the execution of the operation prohibition process for the occurrence of the information abnormality over the execution of the setting change process (FIG. 15).

(8) When the setting change process (FIG. 15) is executed, the storage area of the main RAM 74 is cleared (steps S301 to S307) regardless of whether or not the information error flag 74g is set to "1". ) Is executed, but the present invention is not limited to this, and when "1" is not set in the information abnormality flag 74g, the storage area of the main RAM 74 in the setting change process (FIG. 15). The clear process is not executed, and when "1" is set in the information error flag 74 g, the clear process of the storage area of the main RAM 74 is executed in the setting change process (FIG. 15). Good. Further, when "1" is set for the information abnormality flag 74g in the configuration, the information abnormality flag 74g is cleared to "0" in the setting change process (FIG. 15), and the other storage areas of the main RAM 74 are set. The configuration may not be the execution target of the clear process.

(9) If the setting change process (FIG. 15) is executed in the situation where "1" is set in the information error flag 74g, the operation prohibition process is executed after the setting change process (FIG. 15) is completed. It may be configured as such. In this case, at least the information abnormality flag 74g is cleared to "0" in the setting change process (FIG. 15), so that the power is turned off and then turned on again, so that the setting change executed before the power is turned off. It is possible to play the game with the set value selected in the process (FIG. 15).

(10) Clearing the storage area of the main RAM 74 in the setting change process (FIG. 15) depending on whether the information error flag 74g is set to "1" or not (step S301). -The configuration may be such that the execution mode of step S307) is the same. In this case, in the clearing process, the information abnormality flag 74g is cleared to "0", so that the setting change processing (FIG. 15) is executed in the situation where the information abnormality flag 74g is set to "1". Even so, after the setting change process (FIG. 15) is completed, the information abnormality flag 74g is cleared to "0".

(11) The setting change operation is not limited to the configuration in which the supply of operating power is started when the setting key inserted in the setting key insertion hole 57 is turned on, and the reset button 56 is pressed. The setting change operation may be such that the supply of the operating power is started in the operated situation, and the operating power is supplied in the situation where the setting key is turned on and the reset button 56 is pressed. The configuration may be such that starting is a setting change operation. In this case, there is a high possibility that the setting change process (FIG. 15) is started while the pressing operation of the reset button 56 is continued, but the setting change process (FIG. 18) is the same as in the first embodiment. The reset button 56 is specified for a predetermined number of times in the sensor monitoring process (FIG. 20) of the timer interrupt process (FIG. 19) before it is first determined whether or not the reset button 56 is pressed. By setting this, it is possible to prevent the set value to be selected from being changed by the continuous pressing operation of the reset button 56.

(12) The configuration is not limited to the configuration in which the reset current storage area 74h and the reset previous storage area 74i are provided in the main RAM 74, and only the reset previous storage area 74i is provided, and timer interrupt processing (FIG. 19). ) In the sensor monitoring process (FIG. 20), when it is specified that the reset button 56 is pressed, "1" is set in the reset previous storage area 74i, and the reset button 56 is not pressed. If specified, the reset previous storage area 74i may be cleared to "0". In this case, in step S409 in the setting change execution process (FIG. 18), the reset button 56 receives information from the reset button 56 in a situation where the information indicating that the reset button 56 has not been pressed is not stored in the reset previous storage area 74i. When the signal reaches the HI level corresponding to the pressing operation of the reset button 56, the set value to be selected is changed assuming that the pressing operation of the reset button 56 has started. In this configuration, the execution of one timer interrupt process (FIG. 19) is guaranteed from the start of the setting change process (FIG. 15) to the first execution of the process of step S409. Therefore, it is possible to prevent the set value to be selected from being changed by the continuous pressing operation of the reset button 56 when the setting change process (FIG. 15) is started.

(13) When the supply of operating power to the main MPU 72 is started, both the reset current storage area 74h and the reset previous storage area 74i are performed in the internal function setting process (step S103) of the main process (FIG. 10). "1" may be set in, or "1" may be set only in the reset current storage area 74h. In this case, even if the process of step S402 is not executed in the setting change execution process (FIG. 18), it is selected by pressing the reset button 56 that is continued when the setting change process (FIG. 15) is started. It is possible to prevent the target setting value from being changed.

(14) In a configuration in which the execution content of the effect executed by the image display device 63 can be selected by the operation of the selection button by the player, the selection is made by the continuous operation of the selection button started before the selectable situation starts. A process for specifying whether or not the reset button 56 is pressed in the setting change execution process (FIG. 18) of the first embodiment above so that the execution content of the target effect is not switched. The configuration (step S402 and step S406) may be applied.

(15) In the setting change process (FIG. 15), the process of step S311 may not be executed. In this case, when the storage area clearing process (steps S301 to S307) of the main RAM 74 in the setting change process (FIG. 15) is executed, the door state area 74e is cleared to "0", and the door state area 74e is cleared. The situation in which the information of is "0" is maintained until the next monitoring process of the door opening sensor 16 (FIG. 22) is executed. In this configuration, the "open information" set in the door state area 74e when the front door 12 is specified to be in the open state, and the door state when the front door 12 is specified to be in the closed state. By setting both the "closed information" set in the area 74e to information other than "0", the front door 12 is opened after the clear processing (steps S301 to S307) of the storage area of the main RAM 74 is executed. When the state is specified by the monitoring process of the door opening sensor 16 (FIG. 22), an opening command is transmitted to the effect side MPU 92, and the storage area of the main RAM 74 is cleared (steps S301 to S307). If it is specified by the monitoring process (FIG. 22) of the door opening sensor 16 that the front door 12 is in the closed state after the execution of the above, a closing command is transmitted to the effect side MPU 92. When the opening command is received, the production side MPU 92 starts the door opening notification and issues the closing command regardless of whether or not the setting change process (FIG. 15) is being executed by the main side MPU 72. By configuring the door closing notification to start when it is received, the notification corresponding to the state of the front door 12 after the clear processing (steps S301 to S307) of the storage area of the main RAM 74 is executed is executed. It becomes possible to be done.

(16) The information set in the door state area 74e in step S311 in the setting change process (FIG. 15) is not the reset state information but the "open information" indicating that the front door 12 is in the open state. Good. In this case, if the front door 12 is in the closed state when the setting change process (FIG. 15) is completed, a closing command is transmitted to the effect side MPU 92, and the door closing notification is executed. Further, the information set in the door state area 74e in step S311 in the setting change process (FIG. 15) may not be the reset state information but may be "closed information" indicating that the front door 12 is in the closed state. .. In this case, if the front door 12 is in the open state when the setting change process (FIG. 15) is completed, the opening command is transmitted to the effect side MPU 92, and the door opening notification is executed.

(17) The timing at which the value of the bet number setting counter 74a is stored in the bet number history counter 74f in the normal process (FIG. 25) is not limited to the timing after the medium addition process (step S910) is executed. For example, it may be the timing before the lottery process (step S906) of the winning combination is started, or it may be the timing when the rotation of a part of the reels 32L, 32M, 32R is stopped, and all the reels 32L, It may be the timing when the rotation of 32M and 32R is stopped.

(18) When the clearing process (FIG. 57) at the end of the bonus is executed, a turn-off instruction command is transmitted to the effect side MPU 92, and when the effect side MPU 92 receives the turn-off instruction command, the upper lamp 61 is turned off. The processing and the blackout processing of the image display device 63 may be executed. In this case, when the final game in the pseudo-bonus state ST4 ends, the bet display unit 64 and the combined display unit 66 are turned off, the upper lamp 61 is turned off, and the image display device 63 is black. It will be out. This makes it possible for the player to clearly recognize that the pseudo-bonus state ST4 ends.

(19) In addition to or instead of the configuration in which the clearing process at the end of the bonus (FIG. 57) is executed when the final game of the pseudo bonus state ST4 ends, clearing at the end of the bonus when the AT state ST5 ends. The process (FIG. 57) may be executed.

(20) If the freeze period is set when the direct hit is won in the direct hit lottery process and the transition to the pseudo bonus state ST4 is confirmed, the pseudo bonus which is the next game for the game in the freeze period. Instead of the configuration in which the freeze period is prevented from occurring in the first game of the state ST4, if any freeze period occurs, the freeze period is within a predetermined number of games from the game in which the freeze period occurs. Even if the occurrence of the above occurs, the freeze period may be prevented from occurring. In this case, the occurrence of a new freeze period is prevented over a predetermined number of games triggered by the occurrence of the freeze period. The predetermined number of games is arbitrary, and may be one game, two games, or three or more games.

(21) In a configuration in which there are multiple types of triggers for a freeze period to occur within the range of one game, if the freeze period occurs once within the range of one game, a further freeze period will occur in the game. The configuration may be such that the occurrence is prevented. This makes it possible to prevent the freeze period from occurring a plurality of times within the range of one game.

(22) The period from the start of rotation of the reels 32L, 32M, 32R to the next start of rotation of the reels 32L, 32M, 32R is set to a predetermined weight period (for example, 4.1 seconds) or more. , In the configuration in which the start of rotation of the reels 32L, 32M, 32R in this game is waited until the predetermined weight period elapses from the previous rotation start timing of the reels 32L, 32M, 32R when the game is started. If a weight period longer than the regulation period occurs between the time when the start condition of the predetermined game is satisfied and the time when the rotation of the reels 32L, 32M, 32R is started, a freeze period occurs in the predetermined game. Even if this is done, the configuration may be such that the occurrence of the freeze period is prevented. This makes it possible to prevent the waiting period of the game from being excessively generated. The regulation period needs to be a period equal to or less than the predetermined weight period, and may be, for example, 1 second, 2 seconds, 3 seconds, or the like.

(23) The game number mode lottery table 112 has a configuration in which the determination value LV is aggregated and set for each of the first to fifth game number modes to be selected in the lottery process of the game number mode, but for each set value. The determination value LV may be aggregated and set in. In this case, it is preferable that the determination value LV aggregated for each set value is arranged so that the order of the addresses in the game number mode lottery table 112 is either ascending order or descending order of the set value. The configuration may be applied to the winning rate mode lottery table 113.

(24) In the lottery process of the number of games mode, if none of the data set in the number of games mode lottery table 112 is won, the first number of games mode is selected. Therefore, the determination value LV of the first game number mode may also be set in the game number mode lottery table 112. In this case, since the determination value LV corresponding to each of the first to fifth game number modes is set in the game number mode lottery table 112, the game number mode lottery table 112 is set in the game number mode lottery process. You will win any of the data set in. The configuration may be applied to the winning rate mode lottery table 113.

(25) When extracting a 7-bit random number in the lottery process in the winning rate mode, the upper byte of the 2-byte second random number updated in the second random number circuit 76 is used. The configuration may be such that the lower byte of the 2-byte second random number is used. Further, when extracting a 1-byte random number in the lottery process in the game number mode, the upper byte of the 2-byte second random number updated in the second random number circuit 76 is used. The configuration is not limited, and the lower byte of the 2-byte second random number may be used.

(26) In the lottery process in the game number mode, a 1-byte random number is extracted by using one of the upper byte and the lower byte of the 2-byte second random number updated by the second random number circuit 76, and the winning rate. In the mode lottery process, a 7-bit random number may be extracted by using the other of the upper byte and the lower byte of the 2-byte second random number updated by the second random number circuit 76. Further, in this way, a configuration in which one of the upper byte and the lower byte of the 2-byte second random number is used to extract a predetermined random number and the other is used to extract a specific random number is defined as these predetermined random numbers. It may be applied not when the number of bits of the specific random number is different, but when the number of bits of the predetermined random number and the specific random number are the same.

(27) When extracting a 7-bit random bit in the lottery process in the winning rate mode, the most significant bit of the high-order bytes of the second random number is cleared to "0", but this is limited to this. Instead, a 7-bit random number may be extracted by shifting the least significant bit to the lower bit side by 1 bit after the least significant bit is cleared to "0".

(28) In the lottery process in the winning rate mode, the 7-bit random number is treated as 1-byte data, but the present invention is not limited to this, and the 7-bit random number may be treated as 7-bit data.

(29) In the pseudo-bonus state ST4, the output level of the first external signal is set to the HI level, but the present invention is not limited to this, and in the pseudo-bonus state ST4, the output level of the first external signal is set to the HI level. The configuration may be maintained at the LOW level. In this case, it is not necessary to switch the output level of the first external signal from the HI level to the LOW level when the AT state ST5 is started, and the output level of the first external signal is set to the LOW level when the AT state ST5 is started. When the AT state ST5 is started, that is, when the second output start flag of the main RAM 74 is set to "1", the output timing counter of the main RAM 74 is set to "1". "Is just set. In this configuration, the output level of the second external signal is maintained at the HI level in the pseudo-bonus state ST4, and the output level of the second external signal is maintained at the HI level in the gaming states other than the pseudo-bonus state ST4 including the AT state ST5. The configuration may be maintained at the LOW level.

(30) The end signal can be output externally separately from the first external signal and the second external signal, and when the AT state ST5 ends, the output level of the end signal is switched from the LOW level to the HI level, and the HI level is changed. The output state of the above may be maintained for a predetermined period (for example, 2 seconds).

(31) When the AT state ST5 is started, or when one set is completed and a new set is started in the AT state ST5, the period during which the output level of the first external signal is maintained at the LOW level is 1 The configuration is not limited to the game, and for example, at the start of the next game of the game in which the output level of the first external signal is changed from the HI level to the LOW level, the rotation of the reels 32L, 32M, 32R is started. The output level of the first external signal may be changed to the HI level at a timing in the middle of the game, such as the timing when the rotation of some reels 32L, 32M, 32R is stopped.

Further, the output level of the first external signal may be changed to the HI level after two games or three games with respect to the game in which the output level of the first external signal is changed from the HI level to the LOW level. For example, in a configuration in which the output level of the first external signal is changed to the HI level after two games for a game in which the output level of the first external signal is changed from the HI level to the LOW level, the AT state ST5 is started. In the case, or when one set is completed and a new set is started in the AT state ST5, "3" is set in the output timing counter of the main RAM 74, and the value of the output timing counter is "3". When step S3302 of the external output process (FIG. 62) is executed and the value of the output timing counter becomes "2", the output level of the first external signal is changed from the HI level to the LOW level, and the output timing counter When step S3302 of the external output process (FIG. 62) is executed and the value of the output timing counter becomes "1" in the situation where the value of is "2", the output level of the first external signal is set to the LOW level. When step S3302 of the external output process (FIG. 62) is executed and the value of the output timing counter becomes "0" in the situation where the value of the output timing counter is "1", the first external The signal output level may be changed from the LOW level to the HI level.

(32) The value of the output timing counter of the main RAM 74 does not have to be a subtraction type, and may be an addition type. In this configuration, "1" is set in the output timing counter of the main RAM 74 when the AT state ST5 is started, or when one set is completed and a new set is started in the AT state ST5. Then, in the external output process (FIG. 62), when the value of the output timing counter is "1", the output level of the first external signal is changed from the HI level to the LOW level, and the value of the output timing counter is set to 1. By adding and changing the output level of the first external signal from the LOW level to the HI level and clearing the value of the output timing counter to "0" when the value of the output timing counter is "2". The output level of the first external signal becomes the HI level with a maintenance period of the LOW level in one game.

(33) The output level of the first external signal is switched between the LOW level and the HI level, but the present invention is not limited to this, and the state in which the first external signal is not output externally and the first external signal May be configured to be switched between the state in which is output to the outside. In this case, the state in which the first external signal is not output to the outside corresponds to the state in which the output level of the first external signal in the first embodiment is the LOW level, and the state in which the first external signal is output to the outside corresponds to the above-mentioned first. Corresponds to the state where the output level of the first external signal in the first embodiment is the HI level. Further, the relationship between the HI and LOW of the output level of the first external signal may be the opposite of that of the first embodiment.

(34) The output level of the second external signal is switched between the LOW level and the HI level, but the present invention is not limited to this, and the state in which the second external signal is not output externally and the second external signal May be configured to be switched between the state in which is output to the outside. In this case, the state in which the second external signal is not output to the outside corresponds to the state in which the output level of the second external signal in the first embodiment is the LOW level, and the state in which the second external signal is output to the outside corresponds to the above-mentioned first. Corresponds to the state where the output level of the second external signal in the first embodiment is the HI level. Further, the relationship between the HI and LOW of the output level of the second external signal may be the opposite of that of the first embodiment.

(35) The gaming states distinguished by using the determination value counter 74j are the CB state, the non-CB state in which the CB winning data is stored, and the non-CB state in which the CB winning data is stored. Not limited to no state. For example, in a configuration in which a BB state that is advantageous to the player or an RB state that is advantageous to the player but less advantageous than the BB state exists instead of the CB state, the BB state, the RB state, and the non-CB state are present. A state in which BB winning data is stored in a state, a state in which RB winning data is stored in a non-CB state, and a state in which both BB winning data and RB winning data are stored in a non-CB state. The non-existent state may be distinguished by using the determination value counter 74j.

(36) The process to be the target of differentiating the execution mode of the process using the determination value counter 74j is not limited to the combination lottery process (FIG. 34), for example, a process for determining the effect content, or a process for determining the effect content. It may be a process for setting a freeze period or a process for determining the number of game media to be awarded when a prize is generated corresponding to the grant of the game medium.

(37) The judgment value counter 74j is configured to add a value corresponding to the presence / absence of the CB state, the presence / absence of the CB winning data, and the number of bets, but the judgment value counter 74j has an initial value of 1 or more. It may be set so that the value corresponding to the presence / absence of the CB state, the presence / absence of the CB winning data, and the number of bets is subtracted from the initial value.

(38) The determination value counter 74j is configured to add a value corresponding to the presence / absence of the CB state, the presence / absence of the CB winning data, and the number of bets, but in addition to these game situations or in place of some game situations. , The set value to be used may be added to the determination value counter 74j. In this case, the lottery according to the set value in the winning combination lottery process (FIG. 34) can be performed by using the determination value counter 74j.

(39) In the data groups 101a to 101q for IV = 1 to 17, the point value data 102c to 104c are set so that the point value PV corresponding to the game situation that is surely out of order is not set, but the configuration is limited to this. It may be configured in which "0" is set as the point value PV corresponding to the game situation that is surely out of the game. In this case, it is possible to acquire the point value PV from the point value data 102c to 104c of the data groups 101a to 101q for IV = 1 to 17 even in the game situation where the game is surely out of order.

(40) The configuration is not limited to the configuration in which the number of effective lines is only one of the main line ML, and the configuration may be such that the number of effective lines is two, three, or four or more. In this case, the number of effective lines may increase as the number of bet game media increases, or the maximum number of effective lines may be set regardless of the number of bet game media.

(41) In each of the above embodiments, the privilege of paying out medals when a small winning combination is established is given, but the configuration is not limited to such a configuration, and some privilege is given to the player. It should be. For example, a prize other than a medal may be paid out when a small winning combination is established. Further, in a slot machine that does not have an actual medal insertion or medal payout function and manages medals owned by a player by credit, an increase in credited medals corresponds to granting a privilege.

(42) The present invention may be applied to a so-called B type slot machine, and a C type, an A type and a C type composite type, a B type and a C type composite type, and an RT game, a CT game, or an AT. The invention may be applied to any slot machine, such as a type with a game. In addition, there may be a configuration in which a bonus state that is advantageous to the player exists.

(43) The design of each reel 32L, 32M, 32R is not limited to a picture, a number, a character, etc., but may be a geometric line, a figure, or the like. Further, the design can be composed of light, color, or the like, the design can be composed of a three-dimensional shape or the like, and the design can be composed even if these are combined. That is, the design may have a function as information having distinctiveness.

(44) In each of the above embodiments, a specific example of the slot machine 10 is shown, but it may be applied to a pachinko machine in which a game is played by using a game ball as a game medium, and the slot machine and the pachinko machine may be applied. It may be applied to a gaming machine in a form fused with the machine.

<About the invention group extracted from the above embodiment>
Hereinafter, the characteristics of the invention group extracted from the above-described embodiments will be described while showing the effects and the like as necessary. In the following, for the sake of easy understanding, the corresponding configurations in the above-described embodiment are appropriately shown in parentheses or the like, but the present invention is not limited to the specific configurations shown in the parentheses or the like.

<Characteristic A group>
Features A1. Control means (main side MPU72) that controls the game,
A signal transmission means (power failure monitoring circuit 54b) capable of transmitting a predetermined signal (power failure signal) to the control means, and
With
The control means is a gaming machine having a configuration in which processing is not executed based on the reception status of the predetermined signal being a specific status (reception of a LOW level power failure signal).
The control means waits for the progress of the process until a predetermined progress condition is satisfied when the supply of the operating power is started (in the first embodiment, the processes of steps S101 and S102 in the main MPU 72). In the sixth embodiment, the function of executing the processes of steps S4201 to S4205 in the main MPU 72, and in the seventh embodiment, the function of executing the processes of steps S4301 and S4302 in the main MPU 72). A gaming machine characterized by being equipped.

According to the feature A1, in a configuration in which the control means does not execute the process based on the reception status of the predetermined signal becoming the specific status, the predetermined progress condition is set when the supply of the operating power is started. The progress of the process is waited until it is established. This makes it possible to prevent the processing from proceeding even though the reception status of the predetermined signal is not stable when the supply of the operating power is started. Therefore, it is unexpected that the reception status of the predetermined signal becomes a specific status due to the unstable reception status of the predetermined signal in the situation where the processing is in progress when the supply of the operating power is started. It is possible to prevent the process from being executed at the timing. Therefore, it is possible to preferably execute the process when the supply of the operating power is started.

Feature A2. The standby means is characterized in that when the supply of operating power is started, the progress of the process is made to stand by so that the process does not proceed until the reception status of the predetermined signal becomes stable. The gaming machine according to feature A1.

According to the feature A2, when the supply of the operating power is started, it is possible to prevent the processing from proceeding until the reception status of the predetermined signal becomes stable.

Feature A3. The control means
A means for executing interrupt processing based on the elapse of the interrupt support period (a function for executing timer interrupt processing in the main MPU 72) and
A situation specifying means (a function of executing the process of step S201 in the main MPU 72) for specifying whether or not the reception status of the predetermined signal is the specific status in the interrupt processing, and
Means for preventing the processing from being executed based on the fact that the reception status of the predetermined signal is the specific status specified by the status identification means (processes after step S202 in the main MPU 72). Function to execute) and
With
The gaming machine according to feature A1 or A2, wherein the standby means waits for the progress of the processing even when the supply of operating power is started and before the execution of the interrupt processing is permitted.

According to the feature A3, when the supply of the operating power is started in the configuration in which the processing is not executed based on the fact that the reception status of the predetermined signal is specified to be the specific status in the interrupt processing. Therefore, the progress of processing is waited before the execution of interrupt processing is permitted. As a result, it is possible to prevent the interrupt processing from specifying whether or not the reception status of the predetermined signal is in the specific status before the reception status of the predetermined signal is stabilized. ..

Feature A4. The signal transmitting means makes the reception status of the predetermined signal in the control means change from the predetermined status (reception of the HI level power failure signal) to the specific status when the supply of the operating power is stopped. The gaming machine according to any one of features A1 to A3.

According to the feature A4, the reception status of the predetermined signal changes from the predetermined status to the specific status when the supply of the operating power is stopped, and the control means does not execute the process when the reception status of the predetermined signal changes to the specific status. It becomes. As a result, when the supply of operating power is stopped, it is possible to prevent the control means from executing the process. In this case, it is assumed that the reception status of the predetermined signal is not stable immediately after the supply of the operating power is started. On the other hand, the configuration of the above feature A1 is provided, and when the supply of operating power is started, the progress of the process is waited until a predetermined progress condition is satisfied. This makes it possible to prevent the processing from proceeding even though the reception status of the predetermined signal is not stable when the supply of the operating power is started.

Feature A5. The standby means releases the state of waiting for the progress of the process based on the confirmation that the reception status of the predetermined signal has changed to the predetermined status when the supply of the operating power is started. The gaming machine according to feature A4, characterized in that (a function of executing the process of step S102 of the main MPU 72 in the first embodiment).

According to the feature A5, when the supply of the operating power is started, the state of waiting for the progress of the process is released based on the confirmation that the reception status of the predetermined signal has become the predetermined status. This makes it possible to prevent the processing from proceeding when the reception status of the predetermined signal can be a specific status when the supply of the operating power is started.

Feature A6. The standby means continuously confirms that the reception status of the predetermined signal is in the predetermined status when the supply of the operating power is started over a plurality of predetermined confirmation times. The gaming machine according to the feature A4 or A5, wherein the state of waiting for the progress of the process is released (a function of executing the process of step S4205 of the main MPU 72 in the sixth embodiment).

According to the feature A6, it is based on the fact that when the supply of the operating power is started, the reception status of the predetermined signal is continuously confirmed to be the predetermined status for more than the predetermined confirmation number of times. The state of waiting for the progress of processing is released. This makes it possible to prevent the processing from proceeding when the reception status of the predetermined signal can be a specific status when the supply of the operating power is started.

Feature A7. The control means
A means for executing interrupt processing based on the elapse of the interrupt support period (a function for executing timer interrupt processing in the main MPU 72) and
A first specific means (a function of executing the process of step S201 in the main MPU 72) for specifying whether or not the reception status of the predetermined signal is the specific status in the interrupt process, and
Means for preventing processing from being executed based on the fact that the reception status of the predetermined signal is the specific status specified by the first specific means (step S202 and subsequent steps in the main MPU 72). Function to execute processing) and
With
The standby means
Means for making the progress of the process wait before the execution of the interrupt process is permitted even when the supply of operating power is started (in the first embodiment, the function of executing the process of step S102 in the main MPU 72, In the sixth embodiment, the function of executing the process of step S4205 in the main MPU 72) and
A second specific means for specifying whether or not the reception status of the predetermined signal is in the predetermined status while waiting for the progress of the process (in the first embodiment, the process of step S101 in the main MPU 72 is executed. (Function of executing the process of step S4201 in the main MPU 72 in the sixth embodiment) and
A means for releasing the state of waiting for the progress of the process based on the fact that the reception status of the predetermined signal is the predetermined status by the second specific means (first embodiment). Then, the function of making an affirmative judgment in step S102 in the main MPU 72, and the function of making an affirmative judgment in step S4205 in the main MPU 72 in the sixth embodiment).
The gaming machine according to any one of features A4 to A6, characterized in that

According to the feature A7, when the supply of the operating power is started in the configuration in which the processing is not executed based on the fact that the reception status of the predetermined signal is specified to be the specific status in the interrupt processing. Therefore, the progress of processing is waited before the execution of interrupt processing is permitted. As a result, it is possible to prevent the interrupt processing from specifying whether or not the reception status of the predetermined signal is in the specific status before the reception status of the predetermined signal is stabilized. ..

Further, in the state where the progress of the processing is waiting, it is confirmed whether or not the reception status of the predetermined signal is the predetermined status in the processing in the situation of waiting for the progress, and the reception status of the predetermined signal is predetermined. Based on the confirmation that the situation has occurred, the state of waiting for the progress of processing is released. As a result, it is possible to specify whether or not the reception status of the predetermined signal is stable even if the interrupt processing is not executed in the state where the progress of the processing is waiting, and the reception status of the predetermined signal can be changed. It is possible to ensure that the process proceeds in a stable situation.

Feature A8. The control means includes means for executing interrupt processing based on the elapse of the interrupt response period (a function for executing timer interrupt processing in the main MPU 72).
The standby means waits for the progress of the processing at the start of supplying the operating power until the interrupt processing is executed once even when the supply of the operating power is started (main MPU 72 in the seventh embodiment). The gaming machine according to feature A1 or A2, characterized in that (a function of executing the process of step S4302 of the above).

According to the feature A8, when the supply of the operating power is started, the progress of the processing at the start of the supply of the operating power is waited until the interrupt processing is executed once. As a result, it is possible to prevent the processing at the start of supply of the operating power from proceeding until the reception status of the predetermined signal becomes stable, and the existing opportunity to release the standby state of the progress of the processing is existing. It can be generated by using the configuration for executing interrupt processing.

In addition, with respect to the composition of the features A1 to A8, the features A1 to A8, the features B1 to B8, the features C1 to C7, the features D1 to D6, the features E1 to E7, the features F1 to F6, the features G1 to G6, and the features H1 to H1 H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Characteristic B group>
Feature B1. Based on the occurrence of a predetermined event (power failure flag information abnormality, checksum abnormality, set value abnormality), the progress of the game is prevented by making an affirmative determination in the predetermined event response state (step S112 in the main MPU 72). In the game machine that becomes
A storage execution means (a function of executing the process of step S104 of the main MPU 72 in the first embodiment) for storing event correspondence information in the event correspondence storage area (information abnormality flag 74g), and
Event occurrence specifying means (main MPU 72 in the first embodiment) for specifying whether or not the predetermined event has occurred after the event correspondence information is stored in the event correspondence storage area by the storage execution means. (Function to execute the process of steps S105 to S109) and
Information erasing means for erasing the event correspondence information from the event correspondence storage area based on the fact that the predetermined event has not occurred by the event occurrence identification means (main in the first embodiment). (Function to execute the process of step S110 of the side MPU 72) and
After specifying whether or not the predetermined event has occurred by the event occurrence specifying means, the predetermined event correspondence is based on the fact that the event correspondence information is stored in the event correspondence storage area. A state-corresponding means for making a state (a function of executing the processes of steps S118 and S119 of the main MPU 72 in the first embodiment) and
A gaming machine characterized by being equipped with.

According to the feature B1, in the configuration in which the event correspondence state is set based on the event correspondence information being stored in the event correspondence storage area, the event correspondence storage area is set before specifying whether or not the predetermined event has occurred. The event correspondence information is stored in, and the event correspondence information is deleted from the event correspondence storage area based on the fact that it is specified that the predetermined event has not occurred after that, while it is specified that the predetermined event has occurred. When this is done, the event correspondence information is held in the event correspondence storage area, so that the predetermined event correspondence state is set. As a result, unless it is specified that the predetermined event has not occurred in the event occurrence specifying means, the event correspondence information is stored in the event correspondence storage area, and the predetermined event correspondence is based on the fact that the event correspondence information is stored. It becomes a state. Therefore, it is possible to be in the predetermined event response state when the predetermined event is actually generated but the event occurrence identification means is not specified due to the generation of electrical noise. Become. Therefore, the process can be preferably executed.

Feature B2. The predetermined event includes at least the first predetermined event (information abnormality of the power failure flag) and the second predetermined event (abnormality of the checksum).
The event occurrence identification means is
A first event occurrence specifying means (first embodiment) for specifying whether or not the first predetermined event has occurred after the event correspondence information is stored in the event correspondence storage area by the storage execution means. (Function to execute the process of step S105 of the main MPU 72) in
A second event occurrence specifying means (first embodiment) for specifying whether or not the second predetermined event has occurred after the event correspondence information is stored in the event correspondence storage area by the storage execution means. (Function to execute the processes of steps S106 to S108) of the main MPU 72 in
With
When the first predetermined event is identified by the first event occurrence specifying means, the information erasing means does not erase the event correspondence information from the event correspondence storage area. When it is specified that the second predetermined event has occurred by the second event occurrence specifying means, the event correspondence information is not deleted from the event correspondence storage area.
In the state-responsive means, after the first event occurrence specifying means has specified whether or not the first predetermined event has occurred, the second event occurrence specifying means causes the second predetermined event. After specifying whether or not the event has occurred, the event response information is stored in the event response storage area, so that the predetermined event response state is set. The gaming machine according to feature B1.

According to the feature B2, whether or not the first predetermined event has occurred in the configuration in which the predetermined event correspondence state is obtained regardless of whether the first predetermined event has occurred or the second predetermined event has occurred. The event correspondence information is stored in the event correspondence storage area before the identification and the presence / absence of the occurrence of the second predetermined event are performed, and it is specified that both the first predetermined event and the second predetermined event have not occurred. Based on this, the event correspondence information is deleted from the event correspondence storage area. As a result, it is possible to reduce the required storage capacity as compared with the configuration in which the event-corresponding storage area is provided corresponding to each of the first predetermined event and the second predetermined event.

Feature B3. It is provided with a means (a function of executing the main process of the main MPU 72 in the first embodiment) for executing the process (main process) at the start of the supply of the operating power when the supply of the operating power is started.
Feature B1 or B2 characterized in that each of the processing of the storage executing means, the event occurrence specifying means, the information erasing means, and the state handling means is executed in the processing at the start of supplying the operating power. The gaming machine described in.

According to the feature B3, when the predetermined event occurs when the supply of the operating power is started, the predetermined event corresponding state is set. Therefore, when the predetermined event occurs, before the game is started. It becomes possible to deal with it.

Feature B4. After the event occurrence specifying means has specified whether or not the predetermined event has occurred, and before the process for setting the predetermined event response state is executed by the state response means. An opportunity specifying means for identifying whether or not a special execution trigger (setting change operation) has occurred (a function of executing the process of step S111 of the main MPU 72 in the first embodiment) and
A special process execution means (step of the main MPU 72 in the first embodiment) that executes a special process (setting change process) based on the fact that the special execution trigger has been identified by the trigger identification means. Function to execute the processing of S120) and
With
Even if the event response information is stored in the event response storage area after the event occurrence identification means has specified whether or not the predetermined event has occurred. The game according to any one of features B1 to B3, wherein when the special execution trigger is specified by the trigger identification means, the predetermined event response state is prevented. Machine.

According to the feature B4, in the configuration in which the special processing is executed when the special execution trigger occurs, even if the event correspondence information is stored in the event correspondence storage area, the special execution trigger occurs. Priority is given to the execution of special processing over the setting of the predetermined event response status. This makes it possible to prioritize the execution of special processing in response to the occurrence of a special execution trigger.

Feature B5. Means for executing profit-giving processing (role lottery processing) in a manner corresponding to the setting value set as the target of use from the setting values of a plurality of stages corresponding to the player's advantage (the combination in the main MPU 72). Has a function to execute the lottery process)
The gaming machine according to feature B4, wherein the special process is a changeable process (setting change process) in which the set value to be used can be changed.

According to the feature B5, it is possible to prioritize the execution of the changeable process in which the set value to be used can be changed over the setting of the predetermined event response state.

Feature B6. When the changeable process is executed, the initialization means for executing the initialization of the storage area including the event-corresponding storage area (execution of the processes of steps S301 to S307 of the main MPU 72 in the first embodiment). The gaming machine according to feature B5, which is characterized by having a function of performing.

According to feature B6, when the changeable process is executed, the storage area including the event-corresponding storage area is initialized, so that the event-corresponding storage area is dealt with before the changeable process is executed. Even if the information is stored, it is possible to set the event response information to a state in which it is not stored after the changeable process is executed.

Feature B7. The initialization means is more initial when the event correspondence information is stored in the event correspondence storage area than when the event correspondence information is not stored in the event correspondence storage area. The gaming machine according to feature B6, wherein the number of the storage areas to be converted is increased.

According to the feature B7, even when the event correspondence information is stored in the event correspondence storage area, the event correspondence information is stored when the changeable processing is executed in the configuration in which the execution of the changeable processing is prioritized. When the event correspondence information is stored, the number of storage areas to be initialized is larger than when the event correspondence information is not stored. As a result, when a predetermined event occurs, the storage area can be carefully initialized.

Feature B8. The gaming machine according to any one of features B1 to B7, wherein the predetermined event is an information abnormality of the storage means provided with the event-corresponding storage area.

According to the feature B8, it is possible to appropriately deal with the occurrence of an information abnormality of the storage means.

In addition, with respect to the composition of the features B1 to B8, the features A1 to A8, the features B1 to B8, the features C1 to C7, the features D1 to D6, the features E1 to E7, the features F1 to F6, the features G1 to G6, and the features H1 to H1 H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Characteristic C group>
Feature C1. Means for executing profit-giving processing (role lottery processing) in a manner corresponding to the setting value set as the target of use from the setting values of a plurality of stages corresponding to the player's advantage (the combination in the main MPU 72). Function to execute the lottery process) and
Changeable means (first implementation) that executes changeable processing (setting change processing) that can change the setting value to be used based on the change response trigger (setting change operation). Function to execute the setting change processing of the main MPU 72 in the form) and
The process of step S105 to step S110 of the main MPU 72 in the first embodiment for determining whether or not a predetermined abnormality (information abnormality of power failure flag, abnormality of checksum, abnormality of set value) has occurred. Function to execute) and
Based on the fact that the predetermined abnormality has been identified by the abnormality identifying means, the processing of the state handling means (step S118 and step S119 of the main MPU 72 in the first embodiment) for setting the abnormality handling state is performed. Function to execute) and
With
The changeable means is characterized in that even if it is specified by the abnormality identifying means that the predetermined abnormality has occurred, the changeable processing is executed when the change response opportunity has occurred. Pachinko machine.

According to the feature C1, since the profit-giving process is executed in a manner corresponding to the set value set as the target of use, the player can find that the set value set as the target of use is advantageous. You will expect it. Further, since the abnormality response state is set based on the fact that the predetermined abnormality has been identified, it is possible to deal with the occurrence of the predetermined abnormality. In this case, even if it is specified that a predetermined abnormality has occurred, if a change response opportunity has occurred, a changeable process that can change the set value to be used is executed. To. As a result, it is possible to prioritize the execution of the changeable process over the abnormal response state, and the execution of the changeable process is hindered by the occurrence of a predetermined abnormality even though the change response opportunity has occurred. It is possible to prevent it from being stowed. Therefore, it is possible to make the process preferably executed.

Feature C2. The gaming machine according to feature C1, wherein when the changeable process is executed in a situation where the predetermined abnormality has been specified by the abnormality identifying means, the abnormality-corresponding state is not obtained.

According to the feature C2, even in the situation where it is specified that a predetermined abnormality has occurred, when the changeable process is executed, the changeable process is not entered, so that the changeable process is executed after the changeable process is executed. It is possible to prevent the situation from becoming an abnormal response state.

Feature C3. When it is identified by the abnormality identifying means that the predetermined abnormality has occurred, the abnormality information is stored in the abnormality information storage area (information abnormality flag 74g).
The state-corresponding means sets the abnormality-corresponding state based on the fact that the abnormality information is stored in the abnormality information storage area.
The gaming machine is provided with a predetermined erasing means (a function of executing the processes of steps S301 to S307 of the main MPU 72 in the first embodiment) for erasing the abnormal information when the changeable process is executed. The gaming machine according to the feature C1 or C2, which is characterized by being present.

According to the feature C3, the abnormality information is deleted when the changeable process is executed. As a result, even in a situation where it is specified that a predetermined abnormality has occurred, it is possible to prevent the state from being in the abnormality response state when the changeable process is executed.

Feature C4. The abnormal information storage area is provided in an information storage means (main side RAM 74) having a plurality of storage areas.
When the changeable process is executed, the predetermined erasing means stores the abnormal information in the abnormal information storage area, as compared with the case where the abnormal information is not stored in the abnormal information storage area. Specific erasing means (step S302 and step S302 in the first embodiment) for increasing the number of the storage areas to be executed for the erasing process capable of erasing information among the plurality of storage areas provided in the information storage means. The gaming machine according to feature C3, which comprises a function of making an affirmative determination in each of steps S303 and executing the processes of steps S305 to S307).

According to the feature C4, in the configuration in which the information in the storage area of the information storage means is erased when the changeable process is executed, the abnormal information is stored in the abnormal information storage area when the changeable process is executed. If the error information is stored in the error information storage area, the number of storage areas to be executed for the erasing process that enables the information to be erased is larger than that in the case where the error information is not stored in the error information storage area. In some cases, it is possible to carefully erase the information in the storage area of the information storage means when the changeable process is executed.

Feature C5. The gaming machine according to feature C4, wherein the specific erasing means executes the erasing process on all of the plurality of storage areas provided in the information storage means.

According to the feature C5, when the changeable process is executed in the situation where it is specified that a predetermined abnormality has occurred, the erase process is performed on all of the plurality of storage areas provided in the information storage means. Since it is executed, it is possible to deal with the occurrence of a predetermined abnormality.

Feature C6. In the specific erasing means, when the changeable process is executed, an erasing trigger (ON operation of the reset button 56) occurs even in a situation where the abnormal information is not stored in the abnormal information storage area. In this case, the gaming machine according to feature C4 or C5, wherein the same storage area as in the case where the abnormal information is stored in the abnormal information storage area is targeted for execution of the erasing process.

According to the feature C6, when the changeable process is executed, the erase process is executed for many storage areas not only when a predetermined abnormality occurs but also when an erase trigger occurs. .. As a result, it is possible to include the situation in which the erasure process is executed for many storage areas when the changeable process is executed, not only when a predetermined abnormality occurs but also when an erasure trigger occurs. ..

Feature C7. The gaming machine according to any one of features C1 to C6, wherein the predetermined abnormality is an information abnormality of the information storage means (main side RAM 74).

According to the feature C7, it is possible to appropriately deal with the information abnormality of the information storage means.

It should be noted that, with respect to the configuration of the features C1 to C7, the features A1 to A8, the features B1 to B8, the features C1 to C7, the features D1 to D6, the features E1 to E7, the features F1 to F6, the features G1 to G6, and the features H1 to H1 H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Feature D group>
Feature D1. In step S111 of the main MPU 72 in the first embodiment, a special setting means for setting a special execution status (a status in which the setting change process is executed) based on the occurrence of a special execution trigger (setting change operation). Function to make an affirmative judgment)
The content (set value) of the special information stored in the special storage area (set value storage area of the main RAM 74) based on the operation of the predetermined operation means (reset button 56) being specified in the special execution situation. Information updating means for updating (a function of executing the process of step S410 of the main MPU 72 in the first embodiment) and
With
A configuration in which the information updating means does not update the contents of the special information by the operation of the predetermined operating means when the special execution status is reached while the operation of the predetermined operating means is continued (first implementation). A gaming machine characterized in that it is step S402) of the main MPU 72 in the form.

According to the feature D1, in the configuration in which the content of the special information is updated based on the fact that the operation of the predetermined operation means is specified in the special execution status, the special execution status is in the situation where the operation of the predetermined operation means is continued. In the case of, the update of the contents of the special information is not executed by the operation of the predetermined operation means. This makes it possible to prevent the contents of the special information from being updated due to the operation of the predetermined operating means that is not intended to update the contents of the special information. Therefore, it is possible to make the process preferably executed.

Feature D2. Means for executing profit-giving processing (role lottery processing) in a manner corresponding to the setting value set as the target of use from the setting values of a plurality of stages corresponding to the player's advantage (the combination in the main MPU 72). Has a function to execute the lottery process)
The special execution status is a situation in which the set value can be changed.
The special information is information of the set value to be selected, and is
The gaming machine according to feature D1, wherein the set value selected in the special execution situation is the target of use.

According to the feature D2, when the special execution status is reached, the set value to be selected is changed based on the operation of the predetermined operation means, and the set value selected in the special execution status is to be used. , It is possible to set the set value to be used to a desired value. In this case, if a special execution status occurs while continuing the operation of the predetermined operation means without intending to change the setting value of the selection target, the setting to be selected by the operation of the predetermined operation means. If the value is changed, there is a risk that the work of changing the set value cannot be performed favorably. On the other hand, when the configuration of the above feature D1 is provided and the operation of the predetermined operation means is continued and the special execution status is reached, the set value of the selection target is changed by the operation of the predetermined operation means. Absent. As a result, it is possible to prevent the set value of the selection target from being changed due to the operation of the predetermined operation means that is not intended to change the setting value of the selection target.

Feature D3. The special setting means sets the special execution status based on the occurrence of the special execution trigger when the supply of operating power is started.
Based on the fact that the predetermined operating means is operated when the supply of operating power is started, the gaming machine supports a predetermined operation different from the setting of the special execution status and the update of the content of the special information. Means for executing the process (steps S305 to S307 after making an affirmative determination in step S303) (Affirmative determination is made in step S303 of the main MPU 72 in the first embodiment, and the process of steps S305 to S307 is performed. The gaming machine according to feature D1 or D2, which comprises a function to execute).

According to the feature D3, when the supply of the operating power is started, the predetermined operation corresponding process is executed based on the fact that the predetermined operation means is operated. As a result, the predetermined operation means operated to update the contents of the special information in the special execution status is used as an operation means for executing the predetermined operation correspondence process when the supply of the operating power is started. It can be used for both purposes. However, in the configuration, if the operation of the predetermined operation means for executing the predetermined operation corresponding process is continued even in the special execution situation, the content of the special information may be updated by the operation of the predetermined operation means. .. On the other hand, the configuration of the above feature D1 is provided, and the content of the special information is not updated by the operation of the predetermined operation means when the special execution status is reached in the situation where the operation of the predetermined operation means is continued. .. As a result, it is possible to prevent the contents of the special information from being updated due to the operation of the predetermined operation means for executing the predetermined operation correspondence process.

Feature D4. An operation grasping means (a function of executing the process of step S602 of the main MPU 72 in the first embodiment) for executing a grasping process (step S602) for grasping whether or not the predetermined operating means has been operated, and
It has a plurality of result storage areas (reset current storage area 74h, reset previous storage area 74i) for storing information on the grasping result by the grasping process, and the information stored in these plurality of result storage areas is used a plurality of times. An information storage means (main side RAM 74) that makes it possible to specify the grasping result of the grasping process, and
Based on the execution of the grasping process, the information on the grasping result of the grasping process for a specific number of times (twice) including the execution times of the grasping process this time is stored in the plurality of results. Means for making the state stored in the area (a function of executing the processes of steps S601, S603 and S604 of the main MPU 72 in the first embodiment) and
In the special execution situation, it is specified whether or not the content of the information stored in the plurality of result storage areas is the operation corresponding content (reset previous storage area 74i is "0", reset current storage area 74h is "1"). Means for executing the content specifying process (step S409) (function for executing the process of step S409 of the main MPU 72 in the first embodiment) and
With
The information updating means is stored in the special storage area based on the fact that the content of the information stored in the plurality of result storage areas is specified as the operation-corresponding content in the content specifying process. It updates the contents of the above special information.
When the special execution status is reached in a situation where the operation of the predetermined operating means is continued by executing the grasping process before the first content specifying process in the special execution status is executed. The gaming machine according to any one of features D1 to D3, wherein the content of the special information is not updated by the information updating means by the operation of the predetermined operating means.

According to the feature D4, whether or not the predetermined operating means has been operated is grasped by the grasping process, and the grasping result of the grasping process a plurality of times is stored in the plurality of result storage areas. Then, when the content of the information stored in the plurality of result storage areas is the operation correspondence content, the content of the special information is updated. This makes it possible to update the content of the special information once for each operation of the predetermined operation means. In this case, if the grasping process is executed before the first content specifying process in the special execution status is executed and the operation of the predetermined operating means is continued, the predetermined execution status is reached. The configuration is such that the contents of special information are not updated by the operation of the operating means. That is, when the special execution status is reached in a situation where the operation of the predetermined operation means is continued due to the simple configuration of guaranteeing the execution of the grasping process before the first content specifying process in the special execution status is executed. It is possible to prevent the update of the contents of the special information from being executed by the operation of the predetermined operating means.

Feature D5. A means for executing interrupt processing (timer interrupt processing) including the above-mentioned grasping processing (function for executing timer interrupt processing in the main MPU 72) based on the elapse of the interrupt support period is provided.
By waiting for the progress of the process in which the interrupt of the interrupt process can occur until the interrupt process is executed before the first content specifying process in the special execution situation is executed, the predetermined operating means The game according to feature D4, wherein when the special execution status is reached in a situation where the operation is continued, the content of the special information is not updated by the information updating means by the operation of the predetermined operating means. Machine.

According to the feature D5, the progress of the process in which the interrupt of the interrupt process may occur is waited until the interrupt process is executed before the first content specifying process in the special execution situation is executed. It is possible to guarantee execution.

Feature D6. Grasp collateral means for ensuring that the grasping process is executed at least once between the execution of the content specifying process once in the special execution situation and the next execution of the content specifying process (first embodiment). (Function to execute the process of step S406 of the main MPU 72) in
A means for causing the grasping process to be executed at least once in addition to the grasping process by the grasping collateral means before the first content specifying process in the special execution situation is executed (main in the first embodiment). (Function to execute the process of step S402 of the side MPU 72) and
The gaming machine according to the feature D4 or D5, which comprises the above-mentioned feature D4 or D5.

According to the feature D6, since the grasping process is executed at least once from the execution of the content specifying process once to the next execution of the content specifying process in the special execution situation, one operation of the predetermined operation means is performed. On the other hand, it is possible to prevent the content of the information stored in the plurality of result storage areas from being specified as the operation-corresponding content multiple times. In this case, the grasping process is executed at least once in addition to the grasping process before the first content specifying process is executed. As a result, it is possible to prevent the update of the contents of the special information from being executed by the operation of the predetermined operation means when the special execution status is reached in the situation where the operation of the predetermined operation means is continued. ..

It should be noted that, with respect to the configuration of the features D1 to D6, the features A1 to A8, the features B1 to B8, the features C1 to C7, the features D1 to D6, the features E1 to E7, the features F1 to F6, the features G1 to G6, and the features H1 to H1 H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the invention relating to each feature of the feature A group, the feature B group, the feature C group, and the feature D group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko gaming machine is provided with a storage unit for storing game balls, and the game balls stored in the storage unit are guided by a game ball launching device and directed toward a game area according to a player's launch operation. Is fired. Then, for example, when the game ball enters the ball entry portion provided in the game area, for example, a lottery process is executed, or, for example, a process for increasing the number of game balls that can be used by the player is executed. To.

In a slot machine, when a start lever is operated to start a new game in a situation where a game value such as a medal is bet, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is necessary that the processing in the control means is preferably executed, and there is still room for improvement in this respect.

<Feature E group>
Feature E1. An opening and closing body (front door 12) provided so that it can be opened and closed,
Opening detecting means (door opening sensor 16) for detecting whether or not the opening / closing body is in the open state, and
An open / close compatible storage area (door state area 74e) for storing information corresponding to the detection result of the open detection means, and
When it is specified that the state of the opening / closing body has been switched to the notification target state which is at least one of the open state and the closed state by using the information stored in the opening / closing corresponding storage area, the notification correspondence process (the first). Execution of the notification execution means (processing of steps S703 and step S706 of the main MPU 72 in the first embodiment) for executing steps S703 and S706 of the main MPU 72 in the first embodiment, notification processing in the effect side MPU 92). Function to perform, function to execute notification processing in the production side MPU 92),
Based on the erasure trigger (setting change operation, reset button 56 operation), information erasure processing (in the first embodiment) is performed on the information storage means (main side RAM 74) including the open / close compatible storage area. An erasing process executing means for executing steps S301 to S307 of the main MPU 72 (a function of executing the processes of steps S301 to S307 of the main MPU 72 in the first embodiment) and
With
When the erasing process is executed, the information in the open / close compatible storage area is different from the information indicating that the notification target state is set (reset state information).

According to the feature E1, when it is specified that the state of the opening / closing body is the notification target state, the notification response process is executed. Therefore, the game hall indicates that the opening / closing body state is the notification target state. It becomes possible to make the administrator of. In this case, when the information erasing process is executed for the information storage means including the open / close compatible storage area due to the occurrence of the erase trigger, the open / close body is in the notification target state for the information in the open / close compatible storage area. The information is different from the information indicating that. As a result, when the erasing process is executed while the open / close body is in the notification target state, the information in the open / close compatible storage area becomes information different from the information indicating that the open / close body is in the notification target state, and the open detection is detected. The detection result of the means is a detection result indicating that the opening / closing body is in the notification target state. Therefore, by specifying that the opening / closing body has been switched to the notification target state, it is possible to execute the notification response process after the deletion process is executed. Therefore, it is possible to preferably execute the notification corresponding to the state of the opening / closing body.

Feature E2. The gaming machine according to feature E1, wherein the closed state of the opening / closing body corresponds to the notification target state.

According to the feature E2, even if the erasing process is illegally executed while the opening / closing body is maintained in the closed state, in this case, the erasing process is performed even if the opening / closing body is maintained in the closed state. Is executed, and then the notification response process that the opening / closing body is switched to the closed state is executed. This makes it possible to deal with the fraudulent activity.

Feature E3. In the notification execution means, in a situation where information different from the information corresponding to the notification target state is stored in the opening / closing corresponding storage area, the state of the opening / closing body detected by the opening detection means is the notification. The gaming machine according to feature E1 or E2, wherein the notification response process is executed when it is specified that the target state has been reached.

According to the feature E3, the state of the opening / closing body detected by the opening detection means is set to the notification target state in the situation where the information different from the information corresponding to the notification target state is stored in the open / close corresponding storage area. Since the notification response process is executed when the identification is made, it is possible to execute the notification response process when the state of the open / close body is switched to the notification target state. Then, when the erasing process is executed in the configuration, the opening / closing body is in the notification target state by making the information in the open / close compatible storage area different from the information indicating that the notification target state. When the erasing process is executed in the situation, it is possible to execute the notification response process after the erasing process is executed.

Feature E4. Both that the opening / closing body is in the open state and that the opening / closing body is in the closed state correspond to the notification target state.
When the erasing process is executed, the information in the open / close compatible storage area is different from both the information indicating that the open / close body is in the open state and the information indicating that the open / close body is in the closed state. The gaming machine according to any one of features E1 to E3.

According to the feature E4, since both the opening / closing body being in the open state and the opening / closing body being in the closed state correspond to the notification target state, the notification is supported based on the switching of the opening / closing body to the open state. The notification response process is executed based on the processing being executed and the opening / closing body being switched to the closed state. In this case, when the information erasing process is executed for the information storage means including the open / close compatible storage area due to the occurrence of the erase trigger, the information in the open / close compatible storage area is information indicating that the open / close body is in the open state. The information is different from any of the information indicating that the opening / closing body is in the closed state. As a result, when the erasing process is executed, it is possible to execute the notification response process regardless of whether the state of the opening / closing body at that time is the open state or the closed state.

Feature E5. The notification execution means is
In a situation where information different from the information indicating that the opening / closing body is in the open state is stored in the opening / closing corresponding storage area, the opening / closing body is opened when the opening / closing detection means detects that the opening / closing body is in the open state. Correspondence notification A function of executing the corresponding processing (step S703 of the main MPU 72 in the first embodiment, step S805 in the directing MPU 92) (function of executing the process of step S703 of the main MPU 72 in the first embodiment). (Function to execute the process of step S805 in the production side MPU 92) and
When the open / close detection means detects that the open / close body is in the closed state in a situation where information different from the information indicating that the open / close body is in the closed state is stored in the open / close compatible storage area. A function of executing the means for executing the notification response process for closing (step S706 of the main MPU 72 in the first embodiment, step S812 in the effect side MPU 92) (process of step S706 of the main MPU 72 in the first embodiment). , A function to execute the process of step S812 in the production side MPU 92),
The gaming machine according to any one of features E1 to E4, characterized in that

According to the feature E5, when the opening / closing body is switched to the open state, the notification corresponding processing for opening is executed, and when the opening / closing body is switched to the closed state, the notification corresponding processing for closing is executed. .. In this case, when the erasing process is executed, the information in the open / close compatible storage area is different from both the information indicating that the open / close body is in the open state and the information indicating that the open / close body is in the closed state. .. As a result, when the erasing process is executed with the open / close body open, the notification response process for opening is executed after the erasure process is executed, and when the erasure process is executed with the open / close body closed. Is executed, and then the notification response process for closing is executed.

Feature E6. When the erasing process is executed, the open / close compatible storage area is cleared to "0", so that the information in the open / close compatible storage area is different from the information indicating that the information is in the notification target state. The gaming machine according to any one of features E1 to E5.

According to the feature E6, when the erasure process is executed, the open / close compatible storage area is used without performing additional processing for setting information for the open / close compatible storage area after the erasure process is executed. It is possible to make the information different from the information indicating that the information is in the notification target state.

Feature E7. A specific operating means (reset button 56, setting key insertion hole 57) provided at a position exposed in front of the gaming machine when the opening / closing body is opened is provided.
The erasing process executing means has one of the features E1 to E6 characterized in that the erasing process is executed based on the operation of the specific operating means when the supply of operating power is started. Described gaming machine.

According to the feature E7, in a configuration in which it is basically necessary to start the supply of operating power with the open / close body open in order to execute the erasing process, the above-mentioned excellent effect can be obtained. It will be possible.

It should be noted that, with respect to the configuration of the features E1 to E7, the features A1 to A8, the features B1 to B8, the features C1 to C7, the features D1 to D6, the features E1 to E7, the features F1 to F6, the features G1 to G6, and the features H1 to H1 H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the invention relating to the feature of the feature E group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko gaming machine is provided with a storage unit for storing game balls, and the game balls stored in the storage unit are guided by a game ball launching device and directed toward a game area according to a player's launch operation. Is fired. Then, for example, when the game ball enters the ball entry portion provided in the game area, for example, a lottery process is executed, or, for example, a process for increasing the number of game balls that can be used by the player is executed. To.

In a slot machine, when a start lever is operated to start a new game in a situation where a game value such as a medal is bet, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is necessary to preferably perform notification corresponding to the state of the opening / closing body provided so as to be openable / closable, and there is still room for improvement in this respect.

<Characteristic F group>
Features F1. With a value information storage area (bet number setting counter 74a, medium grant counter of main RAM 74) capable of storing value information (information on the number of bets and the number of game media in the grant mode) regarding the number of game values. ,
Predetermined display control means (in the first embodiment) for displaying and controlling predetermined display means (bet display unit 64, combined display unit 66) so that display corresponding to the value information stored in the value information storage area is performed. A function of executing the control process of the bet display unit of the main MPU 72, a function of executing the process of step S508 of the main MPU 72 in the first embodiment), and
The game unit operation (reel 32L, 32M, 32R rotation) is started when the start trigger of one game occurs, and the game execution means (reel 32L) is terminated when the end trigger occurs. , 32M, 32R), and a game control means (a function of executing the reel control process of the main MPU 72 in the first embodiment).
A game-corresponding execution means (second of the game section of the main MPU 72 in the first embodiment) that executes a game-corresponding process (second control process of the game section) using the value information after the game unit operation is completed. Function to execute control processing) and
Value information erasing means for erasing the value information stored in the value information storage area after the game unit operation is completed and before the game correspondence process is executed (main in the first embodiment). A function to execute the clearing process at the end of the bonus of the side MPU 72),
Before the value information stored in the value information storage area is erased by the value information erasing means within the range of one game, the value information stored in the value information storage area is stored in another storage area ( Another storage execution means (a function of executing the process of step S911 of the main MPU 72 in the first embodiment) to be stored in the bet number history counter 74f, the grant number history counter), and
With
The game-corresponding execution means is a gaming machine characterized in that the game-corresponding processing is executed by using the value information stored in the separate storage area.

According to the feature F1, since the display corresponding to the value information stored in the value information storage area is performed by the predetermined display means, the player grasps the information regarding the number of game values by confirming the predetermined display means. It becomes possible. Further, since the game correspondence process is executed using the value information after the game unit operation is completed, it is possible to execute the process corresponding to the value information in each game.

In this case, the value information stored in the value information storage area may be deleted even after the game unit operation is completed and before the game correspondence process is executed. By erasing the value information stored in the value information storage area, the display state of the predetermined display means is switched accordingly. As a result, it becomes possible to notify that the game unit operation of the predetermined game has been completed by using the display state of the predetermined display means, and the game unit operation has ended when the display state of the predetermined display means is switched. In some cases, it can be generated early.

Further, before the value information stored in the value information storage area is erased within the range of one game, the value information stored in the value information storage area is stored in another storage area and the separate storage area is stored. The game correspondence process is executed using the value information stored in the area. This makes it possible to execute the game correspondence process using the value information after the game unit operation is completed, and at the same time, when the game unit operation is completed as described above, the display state of the predetermined display means is displayed at an early stage. It is possible to switch.

From the above, it is possible to preferably execute the processing in each game.

Feature F2. The value information is information regarding the number of game values of 1 or more.
The gaming machine according to feature F1, wherein the predetermined display control means hides the predetermined display means when the value information is not stored in the value information storage area.

According to the feature F2, when the value information stored in the value information storage area is erased, the predetermined display means is hidden. Then, when the game unit operation is completed, this display state switching occurs at an early stage, so that it is possible to make it clear that the game unit operation by the predetermined display means is completed. Become.

Feature F3. It is a configuration in which the bet setting of the game value is performed in each game.
The gaming machine according to feature F1 or F2, wherein the value information is information corresponding to the number of game values set for betting.

According to the feature F3, in a configuration in which the value information is information corresponding to the number of game values set for betting, it is possible to obtain an excellent effect as described above.

Feature F4. Granting means for granting the game value to the player based on the execution result of the game unit operation being the grant correspondence result (a function of executing the process of step S910 of the main MPU 72 in the first embodiment). With
The gaming machine according to any one of features F1 to F3, wherein the value information is information corresponding to the number of gaming values given by the giving means in one game.

According to the feature F4, in a configuration in which the value information is information corresponding to the number of game values given in one game, it is possible to obtain an excellent effect as described above.

Feature F5. The value information erasing means is the value information after the game unit operation is completed in the final game of the special game state (pseudo-bonus state ST4) which is advantageous to the player and before the game correspondence process is executed. The gaming machine according to any one of features F1 to F4, characterized in that the value information stored in the storage area is erased.

According to the feature F5, it is possible to notify that the final game in the special game state has ended by switching the display state of the predetermined display means.

Feature F6. The value information is information on the number of the value information used in one game or information on the number of the value information given to the player in one game.
The game-corresponding execution means is characterized in that, as the game-corresponding process, a process for specifying an increase or decrease in the number of the value information of the player in one game is executed by using the value information. The gaming machine according to any one of F5.

According to the feature F6, when one game is completed, the value information is used to specify the increase or decrease in the number of value information of the player in one game, and the excellent effect as described above is obtained. Is possible.

It should be noted that, with respect to the configuration of the features F1 to F6, the features A1 to A8, the features B1 to B8, the features C1 to C7, the features D1 to D6, the features E1 to E7, the features F1 to F6, the features G1 to G6, and the features H1 to H1 H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the invention relating to the feature of the feature F group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko gaming machine is provided with a storage unit for storing game balls, and the game balls stored in the storage unit are guided by a game ball launching device and directed toward a game area according to a player's launch operation. Is fired. Then, for example, when the game ball enters the ball entry portion provided in the game area, for example, a lottery process is executed, or, for example, a process for increasing the number of game balls that can be used by the player is executed. To.

In a slot machine, when a start lever is operated to start a new game in a situation where a game value such as a medal is bet, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is necessary that the processing in each game is preferably executed, and there is still room for improvement in this respect.

<Characteristic G group>
Features G1. Numerical value that changes the numerical information of the predetermined storage area (first output start flag, second output start flag, third output start flag, external output end flag of the main RAM 74) in a predetermined mode (clearing "0" or subtracting 1). The changing means (CLR execution circuit 122, DEC execution circuit 123 in the second embodiment) and
The target information storage area (jump status flag 121) differs depending on whether the numerical information before or after the change by the numerical change means is the predetermined target numerical information or not. Information setting means (NOR circuit 122b, OR circuit 123c in the second embodiment) and
When the information in the target information storage area is the specific target information after the change of the numerical information according to the predetermined mode is executed by the numerical change means, the specific target process (“1002” in the second embodiment, “1002”, “ Specific target execution means (second) for executing the program address processing of "1003", "1005" to "1008", "1011", "1012", "1016", "1017", "1025" and "1026"). Program addresses of "1002", "1003", "1005" to "1008", "1011", "1012", "1016", "1017", "1025" and "1026" of the main MPU 72 in the embodiment of (Function to execute the processing corresponding to) and
With
A gaming machine characterized in that the numerical value changing means and the information setting means are provided as circuits.

According to the feature G1, the numerical information of the predetermined storage area is changed in a predetermined mode by the numerical changing means, and the numerical information before or after the change by the numerical changing means is the predetermined target numerical information. Information different from the case where the information is not the predetermined target numerical information is set in the target information storage area. Then, after the numerical information is changed according to a predetermined mode by the numerical value changing means, the specific target process is executed when the information in the target information storage area is the specific target information. This makes it possible not only to change the numerical information in a predetermined mode, but also to execute the specific target process according to the change mode. In this case, a numerical value changing means for changing the numerical information of the predetermined storage area in a predetermined mode and an information setting means for setting the information in the target information storage area are provided as a circuit. As a result, it is possible to achieve the above-mentioned excellent effects while reducing the processing load using the program.

Feature G2. In the numerical change means, a change generation instruction (instruction corresponding to the program addresses of "1001", "1005", "1010", "1015", and "1024" in the second embodiment) is executed in the program. As a result, it operates so as to change the numerical information of the predetermined storage area in the predetermined mode.
The gaming machine according to feature G1, wherein the information setting means sets information in the target information storage area when the numerical value changing means operates.

According to the feature G2, in the program, only by setting the change generation instruction, the numerical information is changed in a predetermined mode by the numerical changing means and the information is set in the target information storage area by the information setting means. As a result, it is possible to achieve the above-mentioned excellent effects while reducing the program capacity.

Feature G3. The target information storage area can store "0" or "1", and can store "0" or "1".
The gaming machine according to feature G1 or G2, wherein the specific target information is information of any one of "0" and "1".

According to the feature G3, since the target information storage area is a storage area for storing binary information of "0" or "1", it is possible to suppress the storage capacity required for the target information storage area.

Feature G4. In the information setting means, different information is set in the target information storage area depending on whether the numerical information before the change by the numerical changing means is the predetermined target numerical information or not. The gaming machine according to any one of features G1 to G3, characterized in that the game is to be played.

According to the feature G4, the information corresponding to the numerical information before the change by the numerical change means is set in the target information storage area, so that the change does not need to be confirmed in the program. It is possible to execute the specific target process according to the previous numerical information.

Feature G5. The gaming machine according to feature G4, wherein the numerical value changing means clears the numerical value information of the predetermined storage area by "0".

According to the feature G5, it is possible to clear "0" of numerical information while reducing the program capacity, and clear "0" without confirming the numerical information before clearing the "0" in the program. It is possible to execute the process corresponding to the previous numerical information.

Feature G6. In the information setting means, different information is stored in the target information storage area depending on whether the numerical information after the change by the numerical changing means is the predetermined target numerical information or not. The gaming machine according to any one of features G1 to G3, characterized in that it is set.

According to the feature G6, since the information corresponding to the numerical information after the change by the numerical change means is set in the target information storage area, the numerical information after the change is not required to be confirmed in the program. It is possible to execute the specific target process according to the numerical information after the change.

It should be noted that, with respect to the configuration of the features G1 to G6, the features A1 to A8, the features B1 to B8, the features C1 to C7, the features D1 to D6, the features E1 to E7, the features F1 to F6, the features G1 to G6, and the features H1 to H1 H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the invention relating to the feature of the feature G group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko gaming machine is provided with a storage unit for storing game balls, and the game balls stored in the storage unit are guided by a game ball launching device and directed toward a game area according to a player's launch operation. Is fired. Then, for example, when the game ball enters the ball entry portion provided in the game area, for example, a lottery process is executed, or, for example, a process for increasing the number of game balls that can be used by the player is executed. To.

In a slot machine, when a start lever is operated to start a new game in a situation where a game value such as a medal is bet, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is necessary that the processing in the control means is preferably executed, and there is still room for improvement in this respect.

<Characteristic H group>
Features H1. A game provided with a control means (main MPU 72 in the second embodiment) for jumping the program to be executed to the program at the address specified by the jump instruction when the jump condition is satisfied in the jump instruction. In the machine
As the jump instruction, a first jump instruction (JR instruction) and a second jump instruction (JRS instruction) are set.
The second jump instruction is a gaming machine characterized in that the data capacity is smaller than that of the first jump instruction.

According to the feature H1, a first jump instruction having a relatively large data capacity and a second jump instruction having a relatively small data capacity are set as jump instructions. As a result, the program capacity can be reduced by properly using the first jump instruction and the second jump instruction as needed.

Feature H2. The second jump instruction is characterized in that the address range (difference between program addresses specified by the address data) that can be jumped when the jump condition is satisfied is narrower than that of the first jump instruction. The gaming machine described in H1.

According to the feature H2, the second jump instruction has a narrower address range than the first jump instruction when the jump condition is satisfied, but the data is larger than the first jump instruction. The capacity is small. Therefore, by using the second jump instruction when the address range to be jumped is narrow and by using the first jump instruction when the address range to be jumped is wide, the program capacity can be appropriately executed while the jump instruction can be appropriately executed. Can be reduced.

Feature H3. The gaming machine according to feature H1 or H2, wherein the second jump instruction has a data capacity (data capacity of condition data) for which the jump condition can be set to be smaller than that of the first jump instruction.

According to the feature H3, the second jump instruction has a smaller data capacity than the first jump instruction in which the jump condition can be set, but the data capacity is smaller than that of the first jump instruction. Therefore, when the jump condition is simple, the second jump instruction is used, and when the jump condition is complicated, the first jump instruction is used, so that the jump instruction can be executed appropriately and the program capacity is reduced. It becomes possible to do.

Feature H4. Numerical value that changes the numerical information of the predetermined storage area (first output start flag, second output start flag, third output start flag, external output end flag of the main RAM 74) in a predetermined mode (clearing "0" or subtracting 1). The changing means (CLR execution circuit 122, DEC execution circuit 123 in the second embodiment) and
The target information storage area (jump status flag 121) differs depending on whether the numerical information before or after the change by the numerical change means is the predetermined target numerical information or not. Information setting means (NOR circuit 122b, OR circuit 123c in the second embodiment) and
With
The numerical value changing means and the information setting means are provided as circuits.
The description according to any one of the features H1 to H3, wherein the jump condition of the second jump instruction is set as a condition of whether or not predetermined information is set in the target information storage area. Amusement machine.

According to the feature H4, when the numerical information of the predetermined storage area is changed in a predetermined mode by the numerical changing means, and the numerical information before or after the change by the numerical changing means is the predetermined target numerical information. Information different from the case where the information is not the predetermined target numerical information is set in the target information storage area. Then, after the numerical information is changed according to the predetermined mode by the numerical value changing means, when the information in the target information storage area is the predetermined information, the second jump instruction causes a jump to the program at the predetermined address. As a result, it is possible not only to change the numerical information in a predetermined mode, but also to make the program to be executed jump according to the change mode. In this case, a numerical value changing means for changing the numerical information of the predetermined storage area in a predetermined mode and an information setting means for setting the information in the target information storage area are provided as a circuit. As a result, it is possible to achieve the above-mentioned excellent effects while reducing the processing load using the program.

Feature H5. In the numerical change means, a change generation instruction (instruction corresponding to the program addresses of "1001", "1005", "1010", "1015", and "1024" in the second embodiment) is executed in the program. As a result, it operates so as to change the numerical information of the predetermined storage area in the predetermined mode.
The gaming machine according to feature H4, wherein the information setting means sets information in the target information storage area when the numerical value changing means operates.

According to the feature H5, in the program, only by setting the change generation instruction, the numerical information is changed in a predetermined mode by the numerical changing means and the information is set in the target information storage area by the information setting means. As a result, it is possible to achieve the above-mentioned excellent effects while reducing the program capacity.

Feature H6. The gaming machine according to feature H4 or H5, wherein the target information storage area can store "0" or "1".

According to the feature H6, since the target information storage area is a storage area for storing binary information of "0" or "1", it is possible to suppress the storage capacity required for the target information storage area.

Feature H7. In the information setting means, different information is set in the target information storage area depending on whether the numerical information before the change by the numerical changing means is the predetermined target numerical information or not. The gaming machine according to any one of features H4 to H6, characterized in that the game is to be played.

According to the feature H7, since the information corresponding to the numerical information before the change by the numerical change means is set in the target information storage area, the change is performed without checking the numerical information before the change in the program. It is possible to jump the program to be executed according to the previous numerical information.

Feature H8. The gaming machine according to feature H7, wherein the numerical value changing means clears the numerical value information of the predetermined storage area by "0".

According to the feature H8, it is possible to clear "0" of the numerical information while reducing the program capacity, and clear "0" without confirming the numerical information before the "0" is cleared in the program. It is possible to execute the process corresponding to the previous numerical information.

Feature H9. In the information setting means, different information is stored in the target information storage area depending on whether the numerical information after the change by the numerical changing means is the predetermined target numerical information or not. The gaming machine according to any one of features H4 to H6, characterized in that it is set.

According to the feature H9, since the information corresponding to the numerical information after the change by the numerical change means is set in the target information storage area, the numerical information after the change is not required to be confirmed in the program. It is possible to jump the program to be executed according to the numerical information after the change.

Feature H10. When the jump condition is satisfied in the jump instruction, the gaming machine provided with the control means for jumping the program to be executed to the program at the address specified by the jump instruction.
As the jump instruction, a first jump instruction (JR instruction) and a second jump instruction (JRS instruction) are set.
The second jump instruction is a gaming machine characterized in that the address range that can be jumped when the jump condition is satisfied is narrower than that of the first jump instruction.

According to the feature H10, a first jump instruction having a relatively wide address range and a second jump instruction having a relatively narrow address range are set as jump instructions. As a result, it is possible to adjust the address range in which the jump can be made by properly using the first jump instruction and the second jump instruction as needed.

It should be noted that, with respect to the configuration of the features H1 to H10, the features A1 to A8, the features B1 to B8, the features C1 to C7, the features D1 to D6, the features E1 to E7, the features F1 to F6, the features G1 to G6, and the features H1 to H1 H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the invention relating to the feature of the feature H group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko gaming machine is provided with a storage unit for storing game balls, and the game balls stored in the storage unit are guided by a game ball launching device and directed toward a game area according to a player's launch operation. Is fired. Then, for example, when the game ball enters the ball entry portion provided in the game area, for example, a lottery process is executed, or, for example, a process for increasing the number of game balls that can be used by the player is executed. To.

In a slot machine, when a start lever is operated to start a new game in a situation where a game value such as a medal is bet, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is preferable to reduce the program capacity required for the control means, and there is still room for improvement in this respect.

<Feature I group>
Feature I1. The game unit operation (rotation of reels 32L, 32M, 32R) is started when the start trigger of one game occurs based on the player's operation, and the game unit operation occurs when the end trigger occurs based on the player's operation. The game control means (the function of executing the reel control process of the main MPU 72 in the first embodiment) that controls the game execution means (reels 32L, 32M, 32R) so that
Standby opportunity (direct hit is won in the direct hit lottery process of step S2208 and the process of step S2211 is executed, the start game of the pseudo bonus state ST4 is started, and any of the processes of step S2605, step S2608 and step S2610 is executed. When an event occurs, the progress waiting means (in the first embodiment) is set to a progress waiting state (a state in which a freeze period is occurring) in which the progress of the game unit operation based on the player's operation is made to wait. (Functions for executing the processes of step S2211, step S2605, step S2608, and step S2610) of the main MPU 72)
Waiting restriction means (first) for preventing the game from being set to the progress waiting state even if the waiting opportunity occurs in the waiting restriction situation (the game following the game in which the freeze period triggered by the direct hit winning) occurs. The function of executing the processes of steps S2602 and S2603 of the main MPU 72 in the embodiment) and
A gaming machine characterized by being equipped with.

According to the feature I1, when the waiting opportunity occurs, the progress of the game unit operation based on the player's operation is waited, so that it is possible to create a situation in which the progress of the game unit operation is waited. In this case, if a standby trigger occurs in the standby restriction status, the progress standby state is not set. As a result, it is possible to prevent the game from being set to the progress standby state even if a standby opportunity occurs in a situation unfavorable for the progress of the game.

Feature I2. The gaming machine according to feature I1, wherein the waiting limiting means is set so that the waiting limiting state is within a predetermined number of games (1 game) from the game set in the progress waiting state.

According to the feature I2, even if a waiting opportunity occurs within a predetermined number of games from the game set in the progress waiting state, the progress waiting state is not set, so that the progress waiting state is set during a short number of games. It is possible to prevent it from being repeated.

Feature I3. The progress waiting means
When a first standby trigger (a direct hit is won in the direct hit lottery process in step S2208) occurs as the standby trigger, the first progress standby means (main side MPU 72 in the first embodiment) is set to the progress standby state. (Function to execute the process of step S2211) and
When the second standby trigger (the start game of the pseudo bonus state ST4 is started) occurs as the standby trigger, the second progress standby means (the main MPU 72 in the first embodiment) is set to the progress standby state. (Functions for executing the processes of step S2605, step S2608 and step S2610) and
With
When the progress waiting state is set by the first progress waiting means, the waiting restriction status is set after the progress waiting state is completed.
The gaming machine according to feature I1 or I2, wherein the waiting limiting means is not set to the progress waiting state even if the second waiting trigger occurs in the waiting limiting situation.

According to the feature I3, the progress standby state is set when the first standby trigger occurs, and the progress standby state is set when the second standby trigger occurs. This makes it possible to diversify the situations set in the progress standby state. In this case, if the progress standby state is set due to the occurrence of the first standby trigger, the standby restriction status is set after the progress standby state ends, and even if the second standby trigger occurs in the standby restriction status. Not set to progress standby state. As a result, when the progress standby state is set due to the occurrence of the first standby trigger, it is possible to cause a situation in which the progress standby state is not set even if the second standby trigger occurs. Will be.

Feature I4. The first standby opportunity is when a definite event (that a direct hit is won in the direct hit lottery process in step S2208) that is determined to shift to a special gaming state (pseudo-bonus state ST4) that is advantageous to the player occurs. Occurs and
The gaming machine according to feature I3, wherein the second standby trigger occurs in the special gaming state.

According to the feature I4, when a definite event that confirms the transition to the special gaming state occurs, the progress standby state is set, so that the player can clearly recognize that the definite event has occurred. It becomes. In this case, if the progress standby state is set due to the occurrence of the first standby trigger, the standby restriction status is set after the progress standby state ends, and even if the second standby trigger occurs in the standby restriction status. Not set to progress standby state. As a result, when the progress standby state is set due to the occurrence of a definite event, it is possible to prevent the progress standby state from being set in the subsequent special game state.

Feature I5. The game next to the game in which the definite event occurs is the first game in the special gaming state.
The first standby trigger occurs in the game in which the definite event occurs,
The gaming machine according to feature I4, wherein the second standby trigger occurs in the first game in the special gaming state.

According to the feature I5, since the progress standby state is basically set in the first game of the special game state, it is possible to make the player clearly recognize that the special game state has started. In this case, when a definite event occurs and the game shifts to the special gaming state, it is set to the progress standby state in the game in which the definite event occurs, whereas it progresses in the first game in the special gaming state. Not set to standby. This makes it possible to prevent the setting of the progress standby state from occurring for two consecutive games.

In addition, with respect to the composition of the features I1 to I5, the features A1 to A8, the features B1 to B8, the features C1 to C7, the features D1 to D6, the features E1 to E7, the features F1 to F6, the features G1 to G6, and the features H1 to H1 H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the invention relating to the feature of the feature I group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko gaming machine is provided with a storage unit for storing game balls, and the game balls stored in the storage unit are guided by a game ball launching device and directed toward a game area according to a player's launch operation. Is fired. Then, for example, when the game ball enters the ball entry portion provided in the game area, for example, a lottery process is executed, or, for example, a process for increasing the number of game balls that can be used by the player is executed. To.

In a slot machine, when a start lever is operated to start a new game in a situation where a game value such as a medal is bet, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is not preferable that the period in which the progress of the game based on the player's operation is forcibly waited is excessively generated, and there is still room for improvement in this respect. There is.

<Characteristic J group>
Features J1. Among multiple types of selection targets (1st to 5th game number modes, 1st to 5th winning rate modes), selection targets (2nd to 5th game number modes, 2nd to 5th winning rate modes) to be selected by lottery ) Sequentially (a function of executing the processes of step S2407, step S2412, step S2417 and step S2422 of the main MPU 72 in the first embodiment).
Numerical information acquisition means (numerical information acquisition means (game number mode lottery table 112, winning rate mode lottery table 113) for acquiring lottery numerical information (judgment value LV) corresponding to the selection target, which is the lottery target. The function of executing the LV acquisition process of the main MPU 72 in the first embodiment) and
Winning determination means (main MPU 72 in the first embodiment) for determining whether or not the selection target, which is the lottery target, is won by using the lottery numerical information acquired by the numerical information acquisition means. (Functions for executing the processes of step S2410, step S2411, step S2420, and step S2421)
With
The lottery numerical information corresponding to the selection target has a configuration that can change according to the game situation (set value), and there are specific types (6 types) of the game situations that can change the lottery numerical information. And
In the predetermined numerical information group, a number of numerical information for lottery corresponding to the product of the number of selection targets that can be set as the lottery target by the sequential changing means and the number of the specific type is set. A game machine characterized by that.

According to the feature J1, the lottery targets are sequentially changed in a plurality of types of selection targets, and the lottery numerical information corresponding to the selection targets that are the lottery targets is acquired from the predetermined numerical information group, and the acquired lottery is performed. It is determined whether or not the selection target that is the target of the lottery is won by using the numerical information. In this case, in a configuration in which the lottery numerical information corresponding to each selection target may fluctuate according to a specific type of game situation, the predetermined numerical information group includes the number of selectable targets set as the lottery target and the specific number of selection targets. Numerical information for lottery is set, which corresponds to the product of the number of game situations of each type. As a result, it is possible to make the predetermined numerical information group common to all combinations of the selection target and the game situation that can be the lottery target. In addition, since the number of numerical information for lottery corresponding to a specific type of game situation is set for any of the selection targets that can be the lottery target, the combination of the selection target and the game situation set as the lottery target can be used. It is possible to standardize the processing when reading the corresponding numerical information for lottery from the predetermined numerical information group. Therefore, the lottery process can be preferably executed.

Feature J2. Among the specific types of game situations, the predetermined type of selection target is not won in the specific game situation (for example, the fifth game number mode when the set value is "1").
In the predetermined numerical information group, numerical information corresponding to non-winning (determination value LV of "0") is set as the lottery numerical information corresponding to the selection target of the predetermined type in the specific gaming situation. The gaming machine according to the feature J1 characterized by being present.

According to the feature J2, even if the predetermined type of selection target is not won in the specific game situation, the predetermined numerical information group has the specific game situation and the lottery numerical information corresponding to the predetermined type of selection target. Numerical information corresponding to non-winning is set as. As a result, even if the selection target has a game situation in which the player is surely not won, the lottery numerical information corresponding to the number of a specific type exists. Therefore, the number of numerical information for lottery corresponding to a specific type of game situation is set regardless of the selection target that can be the lottery target, and the combination of the selection target and the game situation set as the lottery target. It is possible to standardize the processing when reading the lottery numerical information corresponding to the above from the predetermined numerical information group.

Features J3. In the predetermined numerical information group, a number of numerical information for lottery corresponding to the number of the specific type is set for each type of the selection target.
In the predetermined numerical information group, the number of the lottery numerical information corresponding to the number of the specific type corresponding to one type of the selection target is the address on the data (address information D (1) to D (24), The gaming machine according to feature J1 or J2, wherein the address information E (1) to E (24)) is set to be a serial number.

According to the feature J3, the lottery numerical information corresponding to the number of a specific type corresponding to one type of selection target in the predetermined numerical information group is set so that the addresses on the data are serial numbers. As a result, the number of lottery numerical information corresponding to the number of the specific type is aggregated and set in the predetermined numerical information group for each type of the selection target, and corresponds to the selection target that is the lottery target. Of the lottery numerical information, it becomes easier to acquire the lottery numerical information corresponding to the current game situation.

Features J4. In the predetermined numerical information group, the lottery numerical information of the number corresponding to the number of the specific type aggregated for each type of the selection target has the type of the gaming situation corresponding to the order of the addresses on the data. The gaming machine according to feature J3, which is characterized in that the order is fixed according to the above.

According to the feature J4, the number of lottery numerical information corresponding to the number of a specific type aggregated for each type to be selected in the predetermined numerical information group depends on the type of the game situation corresponding to the order of the addresses on the data. It is in a certain order. As a result, among the lottery numerical information corresponding to the selection target that is the lottery target, the order of the addresses on the data in which the lottery numerical information corresponding to the current game situation is set depends on the type of the game situation. It will be decided uniquely. Therefore, it becomes easy to acquire the lottery numerical information corresponding to the current game situation among the lottery numerical information corresponding to the selection target which is the lottery target.

Feature J5. The numerical information acquisition means is set so as to correspond to the numerical information corresponding to the arrangement order in the predetermined numerical information group of the selection target to be selected by the lottery and the current gaming situation in the fixed order. By executing the arithmetic processing (steps S2501 to S2504) for deriving the address using the numerical information corresponding to the order, the selection target and the current game status that are the lottery targets in the predetermined numerical information group. The gaming machine according to feature J4, wherein the address on the data in which the lottery numerical information corresponding to the combination of the above is set is acquired.

According to the feature J5, the numerical information corresponding to the arrangement order in the predetermined numerical information group of the selection target to be selected by the lottery and the numerical value corresponding to the order set corresponding to the current gaming situation in a certain order. By executing the arithmetic processing for address derivation using the information, the data in which the lottery numerical information corresponding to the combination of the selection target to be the lottery target and the current game situation in the predetermined numerical information group is set. The above address is obtained. As a result, it is possible to reduce the processing load when acquiring the lottery numerical information corresponding to the combination of the selection target to be the lottery target and the current game situation.

Features J6. Means for executing profit-giving processing (role lottery processing) in a manner corresponding to the setting value set as the target of use from the setting values of a plurality of stages corresponding to the player's advantage (the combination in the main MPU 72). Has a function to execute the lottery process)
There are the specific types of setting values that can be set as the target of use.
The gaming machine according to any one of features J1 to J5, wherein the specific types of gaming situations are different from each other in the set values set as the objects to be used.

According to the feature J6, it is possible to obtain the above-mentioned excellent effect in the configuration in which the lottery numerical information corresponding to the set value set as the target of use is acquired.

It should be noted that, with respect to the configuration of the features J1 to J6, the features A1 to A8, the features B1 to B8, the features C1 to C7, the features D1 to D6, the features E1 to E7, the features F1 to F6, the features G1 to G6, and the features H1 to H1 H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Characteristic K group>
Features K1. Numerical value updating means (second random number circuit 76 in the first embodiment) for updating predetermined numerical value information (second random number) of a predetermined number of bits (16 bits) stored in a predetermined numerical value storage area every time an update trigger occurs. )When,
First lottery execution means for executing the first lottery process (step S2403 in the first embodiment) using the predetermined numerical information (function of executing the process of step S2403 of the main MPU 72 in the first embodiment). When,
Partial acquisition means for acquiring numerical information of a specific number of bits (8 bits or 7 bits) which is a number of bits less than the predetermined number of bits among the predetermined numerical information (step S2406 of the main MPU 72 in the first embodiment). , Function to execute the processing of step S2415 and step S2416),
A second lottery execution means for executing a second lottery process (steps S2407 to S2413, steps S2417 to S2423 in the first embodiment) using the numerical information of the specific number of bits acquired by the partial acquisition means. (Functions for executing the processes of steps S2407 to S2413 and steps S2417 to S2423 of the main MPU 72 in the first embodiment).
A gaming machine characterized by being equipped with.

According to the feature K1, in the configuration in which the predetermined numerical value information of a predetermined number of bits is updated every time the update trigger occurs, the first lottery process is executed using the predetermined numerical value information of the predetermined number of bits. The second lottery process may be executed by using the numerical information of a specific number of bits, which is the number of bits less than the predetermined number of bits among the predetermined numerical information. As a result, it is possible to increase the number of lottery processes while suppressing the increase in the number of numerical value updating means. Therefore, the lottery process can be preferably executed.

Feature K2. The partial acquisition means
A numerical reading means (a function of storing a second random number in the latch area 111) for reading the predetermined numerical information from the predetermined numerical storage area, and
A function of executing the processing of step S2406, step S2415, and step S2416 of the main MPU 72 in the first embodiment to acquire the numerical information of the specific number of bits from the predetermined numerical information read by the numerical reading means. )When,
The gaming machine according to the feature K1, which is characterized by having.

According to the feature K2, when the numerical information of a specific number of bits is used, the predetermined numerical information is read from the predetermined numerical storage area, and the numerical information of the specific number of bits is acquired from the read predetermined numerical information. As a result, even when the numerical information of a specific number of bits is used, it is possible to read the predetermined numerical information from the predetermined numerical storage area in the same manner as when the first lottery process is executed.

Feature K3. The acquisition execution means clears the target bit, which is a bit different from the specific number bit to be used, among the predetermined numerical information read by the numerical value reading means by "0", so that the numerical value of the specific number bit is obtained. The gaming machine according to feature K2, which is characterized by acquiring information.

According to the feature K3, the numerical information of the specific number of bits is acquired by clearing "0" of the target bit which is a bit different from the specific number of bits to be used among the predetermined numerical value information read from the predetermined numerical value storage area. It is a configuration to do. This makes it possible to simplify the processing configuration for acquiring the numerical information of a specific number of bits from the predetermined numerical information of a predetermined number of bits.

Features K4. The gaming machine according to feature K3, wherein the predetermined numerical value information is data in byte units, and the numerical information of the specific number of bits is also data in byte units including the specific number of bits and the target bit.

According to the feature K4, even numerical information of a specific number of bits can be treated as byte unit data in the same manner as predetermined numerical information.

Feature K5. From the time when the predetermined numerical information is used in one of the first lottery process and the second lottery process until the predetermined numerical information is used in the other, the predetermined numerical information is updated by the numerical updating means. The gaming machine according to any one of features K1 to K4, which is characterized in that it has made one or more laps.

According to the feature K5, in the configuration in which the predetermined numerical information stored in the predetermined numerical storage area is used in both the first lottery process and the second lottery process, the predetermined numerical information is generated in one of the lottery processes. From the time when the predetermined numerical information is used until the predetermined numerical information is used on the other side, the predetermined numerical information is updated by the numerical updating means for one or more laps. As a result, the lottery result and the second lottery of the first lottery process are used regardless of whether the first lottery process or the second lottery process uses the predetermined numerical value information stored in the predetermined numerical value storage area. It is possible to prevent the lottery results of processing from being synchronized with each other.

It should be noted that, with respect to the configuration of the features K1 to K5, the features A1 to A8, the features B1 to B8, the features C1 to C7, the features D1 to D6, the features E1 to E7, the features F1 to F6, the features G1 to G6, and the features H1 to H1 H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the invention relating to each feature of the feature J group and the feature K group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko gaming machine is provided with a storage unit for storing game balls, and the game balls stored in the storage unit are guided by a game ball launching device and directed toward a game area according to a player's launch operation. Is fired. Then, for example, when the game ball enters the ball entry portion provided in the game area, for example, a lottery process is executed, or, for example, a process for increasing the number of game balls that can be used by the player is executed. To.

In a slot machine, when a start lever is operated to start a new game in a situation where a game value such as a medal is bet, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is necessary that the lottery process is preferably executed, and there is still room for improvement in this respect.

<Characteristic L group>
Feature L1. The first output information (information of "2") is set in the output information storage area (output timing counter of the main RAM 74) when a special trigger (transition to AT state ST5, continuation of AT state ST5 set) occurs. The first setting means (the function of executing the processing of step S3206 and step S3210 of the main MPU 72 in the first embodiment)
Output stopping means (main side MPU 72 in the first embodiment) for stopping the output of a predetermined external signal (HI level first external signal) based on the setting of the first output information in the output information storage area. (Function to execute the process of step S3304) and
When the output of the predetermined external signal is stopped by the output stopping means, the second setting means (first implementation) in which the second output information (information of "1") is set in the output information storage area. The function of executing the process of step S3302 of the main MPU 72 in the form) and
Based on the setting of the second output information in the output information storage area, the output start means for starting the output of the predetermined external signal (the process of step S3306 of the main MPU 72 in the first embodiment is executed). Function) and
A gaming machine characterized by being equipped with.

According to the feature L1, in the configuration in which the output of the predetermined external signal is temporarily stopped and then the output of the predetermined external signal is restarted when a special trigger occurs, the first output information is first set in the output information storage area. Then, when the output of the predetermined external signal is stopped after that, the second output information is set in the output information storage area. As a result, it is possible to temporarily stop the output of the predetermined external signal and then restart the output of the predetermined external signal simply by sequentially updating the information set in the output information storage area. Therefore, it is possible to preferably perform a process for outputting a predetermined external signal.

Feature L2. When a predetermined output trigger (transition to the pseudo-bonus state ST4) different from the case where the output of the predetermined external signal is stopped by the output stop means occurs, the second output information is set in the output information storage area. The gaming machine according to feature L1, characterized in that it includes a third setting means (a function of executing the process of step S3203 of the main MPU 72 in the first embodiment).

According to the feature L2, when the output of the predetermined external signal is simply started, not when the output of the predetermined external signal is temporarily stopped and then the output of the predetermined external signal is restarted, the output information storage area is stored. 2 When the output information is set, the output of the predetermined external signal is started. As a result, the output information storage area is used to temporarily stop the output of the predetermined external signal and then restart the output of the predetermined external signal, and to simply start the output of the predetermined external signal. It is possible to control the output of an external signal.

Feature L3. When the output of the predetermined external signal is started by the output start means, the maintenance information is set in the output information storage area.
The gaming machine according to feature L1 or L2, wherein the status of the predetermined external signal is not changed in a situation where the maintenance information is set in the output information storage area.

According to the feature L3, it is possible to maintain the state in which the predetermined external signal is output by using the output information storage area.

Feature L4. The information set in the output information storage area is numerical information and is
The gaming machine according to any one of features L1 to L3, wherein the second output information is numerical information obtained by varying the first output information by a predetermined fluctuation target value (“1”).

According to the feature L4, by changing the numerical information by a predetermined fluctuation target value, it is possible to restart the output of the predetermined external signal once stopped.

Feature L5. Based on the information stored in the output information storage area, it is determined whether or not to execute either the output stop of the predetermined external signal by the output stop means or the output start of the predetermined external signal by the output start means. The gaming machine according to any one of features L1 to L4, wherein the processing (step S3301 and step S3303 in the first embodiment) is performed at one predetermined timing in one game.

According to the feature L5, when the output of the predetermined external signal is temporarily stopped and then the output of the predetermined external signal is restarted, the period for one game is guaranteed as the period during which the output of the predetermined external signal is stopped. It becomes possible.

Feature L6. The gaming machine according to any one of features L1 to L5, wherein the special trigger occurs in a situation where the predetermined external signal is output.

According to the feature L6, when the output of the predetermined external signal is temporarily stopped and then the output of the predetermined external signal is restarted, the above-mentioned excellent effect can be obtained.

Feature L7. The first setting means ends the advantageous period (set of pseudo bonus state ST4 and AT state ST5) for the player, and the advantageous period (continuation of the set of AT state ST5) or another advantageous period (set of AT state ST5). Any one of the features L1 to L6, which is characterized in that the first output information is set in the output information storage area as the occurrence of the special trigger when the AT state (ST5 start) is started. The gaming machine according to 1.

According to the feature L7, it is possible to obtain the above-mentioned excellent effect when the output of the predetermined external signal is temporarily stopped and then the output of the predetermined external signal is restarted in a situation where the advantageous period continues. Become.

Feature L8. When a plurality of games are executed in a predetermined game state (AT state ST5) and one of the execution times is completed and the continuation condition is satisfied, the execution time continuation means (the first) for starting a new execution time. The function of executing the processes of steps S3114 to S3116 of the main MPU 72 according to the first embodiment) is provided.
The gaming machine according to any one of features L1 to L7, wherein the special trigger occurs when a new execution time is started by the execution time continuation means.

According to the feature L8, in a situation where one execution time of the predetermined game state is completed and a new execution time is started, the output of the predetermined external signal is temporarily stopped and then the output of the predetermined external signal is restarted. In some cases, it is possible to achieve the above-mentioned excellent effects.

It should be noted that, with respect to the configuration of the features L1 to L8, the features A1 to A8, the features B1 to B8, the features C1 to C7, the features D1 to D6, the features E1 to E7, the features F1 to F6, the features G1 to G6, and the features H1 to H1 H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the invention relating to the feature of the feature L group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko gaming machine is provided with a storage unit for storing game balls, and the game balls stored in the storage unit are guided by a game ball launching device and directed toward a game area according to a player's launch operation. Is fired. Then, for example, when the game ball enters the ball entry portion provided in the game area, for example, a lottery process is executed, or, for example, a process for increasing the number of game balls that can be used by the player is executed. To.

In a slot machine, when a start lever is operated to start a new game in a situation where a game value such as a medal is bet, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is necessary that the output of an external signal is preferably executed, and there is still room for improvement in this respect.

<Characteristic M group>
Features M1. At least the first game situation (CB state, non-CB state and CB winning data is stored, non-CB state and CB winning data is not stored) and the second game situation (CB state, non-CB state and CB winning data is not stored) and second game situation (CB state, non-CB state and CB winning data is not stored) When the number of bets is "2", the number of bets is "3"), and the game is executed in a manner corresponding to the contents of these game situations.
The first updating means (first) for updating the determination numerical information so that the determination numerical information (determination value) of the determination storage area (determination value counter 74j) fluctuates according to the content of the first game situation. The function of executing the processes of steps S1402 and S1405 of the main MPU 72 in the embodiment) and
A second updating means for updating the determination numerical information so that the determination numerical information in the determination storage area changes according to the content of the second gaming situation (step of the main MPU 72 in the first embodiment). Function to execute the processing of S1403) and
A function of executing an information correspondence execution means (a function of executing a lottery process of a combination of the main MPU 72 in the first embodiment) for executing an information correspondence process (a combination lottery process) using the determination numerical value information of the determination storage area. )When,
A gaming machine characterized by being equipped with.

According to the feature M1, the determination numerical information of the determination storage area is updated so as to fluctuate according to the content of the first game situation, and is updated so as to fluctuate according to the content of the second game situation. Then, the information correspondence process is executed by using the determination numerical information of the determination storage area. That is, information based on the contents of a plurality of game situations including the contents of the first game situation and the contents of the second game situation is aggregated as the numerical value information for determination, and the aggregated numerical information for determination is only referred to. It is possible to execute information correspondence processing according to the contents of a plurality of game situations. Therefore, it is possible to simplify the processing configuration for executing the information correspondence processing according to the contents of a plurality of game situations.

Feature M2. The first updating means changes the determination numerical information to one of the side where the determination numerical information increases and the side where the determination numerical information decreases in the determination storage area.
The second update means changes the determination numerical information to the same side as the side where the first update means changes among the side where the determination numerical information increases and the side where the determination numerical information decreases in the determination storage area. The gaming machine according to the feature M1 characterized by being.

According to the feature M2, the determination numerical information of the determination storage area fluctuates to one of the increasing side and the decreasing side according to the content of each game situation. This makes it possible to prevent the correspondence between the combination of the contents of a plurality of game situations and the numerical information for determination from becoming complicated.

Feature M3. There are multiple types of the contents of the first game situation.
The first updating means fluctuates the determination numerical information in the determination storage area by a fluctuation amount according to the type of the content of the first game situation.
There are multiple types of contents of the second game situation.
The second updating means is a gaming machine of the feature M1 or M2, characterized in that the determination numerical information of the determination storage area is changed by a fluctuation amount according to the type of the content of the second gaming situation.

According to the feature M3, the judgment numerical information is changed by the fluctuation amount according to the type of the content of the first game situation, and the judgment numerical information is changed by the fluctuation amount according to the content of the second game situation. .. As a result, it is possible to aggregate information based on the contents of a plurality of game situations including the contents of the first game situation and the contents of the second game situation as numerical information for determination.

Features M4. When the content of the first game situation is a specific type of content (CB state), the determination numerical information of the determination storage area is changed by the first update means by a fluctuation amount according to the specific type of content. However, the gaming machine according to any one of features M1 to M3, wherein the determination numerical information is not changed by the second updating means.

According to the feature M4, when the content of the first game situation is the content of a specific type, the numerical information for determination is changed by the amount of fluctuation according to the content of the specific type, while the content of the second game situation is changed. The numerical information for judgment does not change accordingly. As a result, when the content of the first game situation is a specific type of content, in a situation where the content of the second game situation does not affect the execution content of the information correspondence process, the numerical information for determination is provided for the situation. It is possible to prevent multiple types from existing.

Feature M5. The first game situation is a game state,
The gaming machine according to any one of features M1 to M4, wherein the second gaming situation is the number of bets in one game.

According to the feature M5, it is possible to obtain an excellent effect as already described when the information correspondence process according to the game state and the number of bets is executed.

Feature M6. The gaming machine according to any one of features M1 to M5, wherein the information handling executing means executes a lottery process in a mode corresponding to the determination numerical information in the determination storage area.

According to the feature M6, information based on the contents of a plurality of game situations including the contents of the first game situation and the contents of the second game situation is aggregated as the numerical information for determination, and the aggregated numerical information for determination is collected. It is possible to execute the lottery process according to the contents of a plurality of game situations just by referring to it. Therefore, it is possible to simplify the processing configuration for executing the lottery processing according to the contents of a plurality of game situations.

Feature M7. The information handling execution means is
Sequential change means (a function of executing the processes of steps S1304 and S1309 of the main MPU 72 in the first embodiment) for sequentially changing the selection target to be the lottery target among a plurality of types of selection targets (index value IV), and
The determination numerical information in the determination storage area is collated with the corresponding information group (IV = 1 to 17 data groups 101a to 101q) provided corresponding to the selection target that is the lottery target. Based on this, the numerical information acquisition means for acquiring the lottery numerical information (point value PV) (the function of executing the PV acquisition process of the main MPU 72 in the first embodiment), and
Winning determination means (main MPU 72 in the first embodiment) for determining whether or not the selection target, which is the lottery target, is won by using the lottery numerical information acquired by the numerical information acquisition means. (Function to execute the process of step S1307) and
The gaming machine according to any one of features M1 to M6.

According to the feature M7, the lottery numerical information is acquired based on collating the determination numerical information of the determination storage area with the corresponding information group provided corresponding to the selection target to be the lottery target. Using the lottery numerical information, it is determined whether or not the selection target to be selected by the lottery is a winner. As a result, even if the lottery numerical information corresponding to the selection target may differ depending on the contents of various game situations, the corresponding information group corresponding to the selection target is obtained when the lottery numerical information is acquired. Since it is only necessary to collate the numerical information for determination, it is possible to simplify the processing configuration for acquiring the numerical information for lottery.

Feature M8. In the corresponding information group (IV = 17 data group 101q) corresponding to the predetermined selection target, the lottery numerical information is provided for the predetermined numerical information for determination (judgment value counter 74j = "1"). Is not set,
When the lottery numerical information corresponding to the predetermined determination numerical information is not set in the corresponding information group, the numerical information acquisition means is not elected as the lottery numerical information corresponding to the determination numerical information. The gaming machine according to feature M7, which comprises means for deriving corresponding numerical information (“0”) (a function of executing the process of step S1509 of the main MPU 72 in the first embodiment).

According to the feature M8, in a configuration in which a predetermined selection target is not surely won when the combination of various game situations is a predetermined combination, the corresponding information group corresponding to the selection target corresponds to the predetermined combination. Numerical information for lottery is not set for the numerical information for judgment. This makes it possible to reduce the data capacity of the corresponding information group. Further, for the judgment numerical information in which the lottery numerical information is not set in the corresponding information group in this way, the non-winning numerical information is derived separately, so that the judgment numerical information is non-winning. It becomes possible to do so.

Feature M9. The corresponding information group includes the order of the corresponding numerical information for determination and the addresses on the data (address data A (0) to A (3), B (0) to B (4), C (0) to C. The numerical information for the lottery is set so as to correspond to (1)).
The numerical information acquisition means is a means for acquiring the lottery numerical information set in the order corresponding to the determination numerical information in the determination storage area from the corresponding information group (main side in the first embodiment). The gaming machine according to feature M7 or M8, which comprises a function of executing the process of step S1508 of the MPU 72).

According to the feature M9, since it is only necessary to acquire the lottery numerical information set in the order corresponding to the determination numerical information from the corresponding information group, the processing configuration for acquiring the lottery numerical information from the corresponding information group. Can be simplified.

Feature M10. The corresponding information group has a number of determination areas (game state data 102a) corresponding to the number of types of the determination numerical information.
The first information (“1”) is set in the determination area corresponding to the type of the determination numerical information in which the lottery numerical information is set.
The second information (“0”) is set in the determination area corresponding to the type of the determination numerical information for which the lottery numerical information is not set.
When the first information is set in the determination area corresponding to the determination numerical information in the determination storage area in the correspondence information group to be referred to, the numerical information acquisition means corresponds to the correspondence. The information group is provided with means for acquiring the lottery numerical information set in association with the determination area (a function of executing the process of step S1508 of the main MPU 72 in the first embodiment). Characteristic The gaming machine according to any one of features M7 to M9.

According to the feature M10, only by specifying which of the first information and the second information is set in the judgment area, the lottery numerical value corresponding to the judgment numerical information is set in the corresponding information group corresponding to the selection target. It is possible to specify whether or not the information is set. Therefore, it is possible to simplify the processing configuration for specifying whether or not the lottery numerical information corresponding to the determination numerical information is set in the corresponding information group.

Features M11. When the second information is set in the determination area corresponding to the determination numerical information in the determination storage area in the corresponding information group to be referred to, the numerical information acquisition means makes the determination. A means for deriving numerical information (“0”) corresponding to non-winning as the lottery numerical information corresponding to the numerical information for use (a function of executing the process of step S1509 of the main MPU 72 in the first embodiment) is provided. The gaming machine according to the feature M10, which is characterized by being present.

According to the feature M11, when the second information is set in the judgment area, the lottery numerical information corresponding to the judgment numerical information is not set in the corresponding information group, and the non-winning numerical information is displayed. Derived separately. This makes it possible to reduce the data capacity of the corresponding information group.

It should be noted that, with respect to the configuration of the features M1 to M11, the features A1 to A8, the features B1 to B8, the features C1 to C7, the features D1 to D6, the features E1 to E7, the features F1 to F6, the features G1 to G6, and the features H1 to H1 H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the invention relating to the feature of the feature M group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko gaming machine is provided with a storage unit for storing game balls, and the game balls stored in the storage unit are guided by a game ball launching device and directed toward a game area according to a player's launch operation. Is fired. Then, for example, when the game ball enters the ball entry portion provided in the game area, for example, a lottery process is executed, or, for example, a process for increasing the number of game balls that can be used by the player is executed. To.

In a slot machine, when a start lever is operated to start a new game in a situation where a game value such as a medal is bet, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is necessary that the processing in the control means is preferably executed, and there is still room for improvement in this respect.

<Characteristic N group>
Feature N1. Sequential change means (a function of executing the processes of steps S1304 and S1309 of the main MPU 72 in the first embodiment) for sequentially changing the selection target to be the lottery target among a plurality of types of selection targets (index value IV), and
Numerical information acquisition means for acquiring the lottery numerical information (point value PV) corresponding to the selection target (the function of executing the PV acquisition process of the main MPU 72 in the first embodiment) and the lottery target. ,
Winning determination means (main MPU 72 in the first embodiment) for determining whether or not the selection target, which is the lottery target, is won by using the lottery numerical information acquired by the numerical information acquisition means. (Function to execute the process of step S1307) and
With
Judgment as to whether or not a winning is achieved by the winning determination means includes a plurality of types of game situations (CB state, non-internal 2-card bet state, non-internal 3-card bet state, internal 2-card bet state, and internal 2-card bet state. It is a configuration that is performed in each of the three bets inside).
In a predetermined game situation (for example, CB state) among the plurality of types of game situations, the predetermined type of selection target (index value IV = 17) is configured so as not to win.
A gaming machine characterized in that, even in the predetermined gaming situation, the selection target of the predetermined type is set as the lottery target by the sequential changing means.

According to the feature N1, the lottery numerical information corresponding to the selection target that is the lottery target among the plurality of types of selection targets is acquired, and the acquired lottery numerical information is used to be the lottery target. It is determined whether or not the selection target is a winner. In addition, the determination of whether or not the prize is won is made in each of a plurality of types of game situations. In this case, although the predetermined type of selection target is not won in the predetermined game situation, the predetermined type of selection target is the lottery target even in the predetermined game situation. As a result, it is possible to unify the types of selection targets in any game situation. Therefore, it is possible to make the processing configuration for determining whether or not the selection target is winning common in a plurality of types of game situations, and it is possible to make the configuration for performing the lottery suitable.

Feature N2. The gaming machine according to feature N1, wherein the types of selection targets that can be selected by the sequential changing means are the same in the plurality of types of gaming situations.

According to the feature N2, since the types of selection targets that can be selected as lottery targets are the same in a plurality of types of game situations, a plurality of types of games have a processing configuration for determining whether or not the selection target is a winner. It becomes possible to make it common in the situation, and it becomes possible to make the configuration for performing the lottery suitable.

Feature N3. Corresponding information groups (IV = 1 to 17 data groups 101a to 101q) are set corresponding to each of the plurality of types of selection targets.
The numerical information acquisition means collates the information corresponding to the current game situation (value of the determination value counter 74j) with the corresponding information group corresponding to the selection target to be the lottery target, thereby causing the lottery. The gaming machine according to feature N1 or N2, which is characterized by acquiring numerical information for use.

According to the feature N3, the corresponding information group is set corresponding to each of a plurality of types of selection targets, and the corresponding information group corresponding to the selection target to be the lottery target corresponds to the current game situation. Numerical information for lottery is acquired by collating the information. This makes it possible to simplify the processing configuration for acquiring the lottery numerical information.

Feature N4. In the corresponding information group (IV = 17 data group 101q) corresponding to the predetermined selection target, the lottery numerical information is not set for the predetermined game situation, and the lottery numerical information is not set.
When the lottery numerical information corresponding to the predetermined gaming situation is not set in the corresponding information group, the numerical information acquisition means uses the non-winning numerical information (“0”) as the lottery numerical information. The gaming machine according to feature N3, which comprises means for deriving (a function of executing the process of step S1509 of the main MPU 72 in the first embodiment).

According to the feature N4, in a configuration in which the predetermined selection target is not surely won when the combination of various game situations is the predetermined combination, the corresponding information group corresponding to the selection target is drawn for the predetermined combination. Numerical information is not set. This makes it possible to reduce the data capacity of the corresponding information group. Further, for the above-mentioned predetermined combination in which the lottery numerical information is not set in the corresponding information group in this way, the numerical information corresponding to the non-winning is separately derived, so that the predetermined combination is non-winning. It becomes possible to.

Feature N5. The correspondence information group has a number of determination areas (game state data 102a) corresponding to the plurality of types of game situations.
The first information (“1”) is set in the determination area corresponding to the type of game situation in which the lottery numerical information is set.
Second information (“0”) is set in the determination area corresponding to the type of game situation in which the lottery numerical information is not set.
When the first information is set in the determination area corresponding to the current gaming situation in the corresponding information group to be referred to, the numerical information acquisition means has the determination area in the corresponding information group. A feature N3 or N4 characterized in that the means for acquiring the lottery numerical information set in association with the above (a function of executing the process of step S1508 of the main MPU 72 in the first embodiment) is provided. The gaming machine described in.

According to the feature N5, only by specifying which of the first information and the second information is set in the judgment area, the corresponding information group corresponding to the selection target is the lottery numerical value corresponding to the current game situation. It is possible to specify whether or not the information is set. Therefore, it is possible to simplify the processing configuration for specifying whether or not the lottery numerical information corresponding to the current game situation is set in the corresponding information group.

Feature N6. When the second information is set in the determination area corresponding to the current gaming situation in the corresponding information group to be referred to, the numerical information acquisition means does not win as the lottery numerical information. The gaming machine according to feature N5, which comprises means for deriving the numerical information (“0”) of the above (a function of executing the process of step S1509 of the main MPU 72 in the first embodiment).

According to the feature N6, when the second information is set in the judgment area, the lottery numerical information corresponding to the current game situation is not set in the corresponding information group, and the non-winning numerical information is separately set. Derived. This makes it possible to reduce the data capacity of the corresponding information group.

It should be noted that, with respect to the configuration of the features N1 to N6, the features A1 to A8, the features B1 to B8, the features C1 to C7, the features D1 to D6, the features E1 to E7, the features F1 to F6, the features G1 to G6, and the features H1 to H1 H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the invention relating to the feature of the feature N group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko gaming machine is provided with a storage unit for storing game balls, and the game balls stored in the storage unit are guided by a game ball launching device and directed toward a game area according to a player's launch operation. Is fired. Then, for example, when the game ball enters the ball entry portion provided in the game area, for example, a lottery process is executed, or, for example, a process for increasing the number of game balls that can be used by the player is executed. To.

In a slot machine, when a start lever is operated to start a new game in a situation where a game value such as a medal is bet, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is necessary that the lottery process is preferably executed, and there is still room for improvement in this respect.

<Characteristic O group>
Features O1. In a situation where a predetermined process (process for advantageous state at the start of the game in the third embodiment, process for AT state at the start of the game) is being executed, another process (ending determination process in the third embodiment) is performed. An information storage execution means (stack area 125) that stores information on the return address of the predetermined process after the end of the other process when a call trigger (PUSH instruction) for calling and executing occurs in the specific storage area (stack area 125). The function of executing the processes of steps S3504 and S3601 of the main MPU 72 in the third embodiment) and
An information reading means (third) for reading information of the return address from the specific storage area when a reading trigger (POP instruction) that enables the user to return to the predetermined processing after the other processing is completed occurs. The function of executing the processes of step S3703, step S3704, and step S3705 of the main MPU 72 in the embodiment) and
With
The specific storage area has a plurality of unit storage areas (unit storage area 125a), and has a plurality of unit storage areas (unit storage area 125a).
When the call trigger occurs a plurality of times without the information reading means reading the information of the return address, the information storage executing means is predetermined for the plurality of unit storage areas. The information of the return address is stored in order.
When the read trigger occurs in a situation where a plurality of information of the return address is stored, the information reading means reads from the information of the return address on the rear side in the stored order.
This gaming machine is
When the information of the return address is read by the information reading means due to the occurrence of the reading trigger, the processing return means (main side in the third embodiment) that returns to the processing corresponding to the information of the return address. (Function to execute the processes of steps S3703 and S3705 of MPU72) and
Non-recovery means (in the third embodiment) that does not return to the process corresponding to the information of the return address even though the information of the return address is read by the information read means due to the occurrence of the read trigger. (Function to execute the process of step S3704 of the main MPU 72) and
A gaming machine characterized by being equipped with.

According to feature O1, when a call trigger for reading and executing another process occurs in a situation where a predetermined process is being executed, the information of the return address of the predetermined process becomes a storage target in the specific storage area. It is stored in the unit storage area. Further, when a read trigger for returning to a predetermined process occurs after another process is completed, the return address information is read from the unit storage area to be read in the specific storage area. Then, by returning to the process corresponding to the read return address information, the process returns to the process to be returned in the predetermined process. In addition, if the return address information is not read and the call is triggered multiple times, the return address information is stored in a predetermined order in a plurality of unit storage areas, and the return address information is plural. When a read trigger occurs in the stored situation, the stored order is read from the information of the return address on the rear side. As a result, if the process call is repeated before the process is returned, the order of the callers after that is returned in order from the later process.

In the above configuration, even though the return address information has been read due to the occurrence of the read trigger, it may not be possible to return to the process corresponding to the return address information. As a result, basically, the order of the read source is set to be the return target of the process in order from the later process, but the process to be returned is skipped by a predetermined number without observing the order as an exception. It is possible to return in order. Therefore, the process can be preferably executed.

Feature O2. A means for changing the unit storage area to be stored in the predetermined order when the information of the return address is stored in the unit storage area to be stored among the plurality of unit storage areas (third). The function of executing the processes of step S3504 and step S3601 of the main MPU 72 in the embodiment) and
When the information of the return address is read from the unit storage area to be read out of the plurality of unit storage areas, the unit storage area to be read out is changed in the reverse order of the predetermined order. Means for causing (a function of executing the processes of steps S3703, S3704 and step S3705 of the main MPU 72 in the third embodiment) and
The gaming machine according to the feature O1, which is characterized by the above-mentioned feature O1.

According to the feature O2, the unit storage areas for storing the return address information are changed in a predetermined order, whereas the unit storage areas for reading the return address information are in the reverse order of the predetermined order. It is changed by. In the configuration, if an event occurs in which the return address information is read due to a read trigger but the process corresponding to the return address information is not returned, the return address information is displayed. The unit storage area that is in the next order in the reverse order of the predetermined order with respect to the stored unit storage area becomes the next read target. As a result, it is possible to restore the processes to be restored in the order in which a predetermined number of processes are skipped.

Feature O3. When it is specified that the special condition is satisfied in the other process (when an affirmative determination is made in step S3701 or step S3702), the information read means causes the return address of the return address due to the occurrence of the read trigger. After the event that the non-returning means does not return to the process corresponding to the information of the return address occurs even though the information is read, the read trigger occurs, so that the information read means causes the return address. The gaming machine according to feature O1 or O2, wherein the information is read out and an event occurs in which the processing return means returns to the processing corresponding to the information of the return address.

According to feature O3, in a configuration in which another process is called and executed in a situation where a predetermined process is being executed, information on a return address for returning to the predetermined process when a special condition is satisfied is provided. Although it is read from the specific storage area, it is not returned to the predetermined process. Then, after that, the information of the return address stored in the specific storage area before the information of the return address is stored is read out, and the process returns to the process corresponding to the information of the return address. As a result, when the special condition is satisfied, it is possible to restore the processes to be restored in the order of skipping a predetermined number of processes.

Feature O4. When it is specified that the special condition is not satisfied in the other process (when a negative determination is made in each of step S3701 and step S3702), the information reading means causes the reading trigger to occur. Even though the return address information has been read, the information of the return address is not returned to the process corresponding to the information of the return address. Is read and the process return means causes an event to return to the process corresponding to the information of the return address, and the process corresponding to the fact that the special condition is not satisfied in the returned predetermined process (step). The gaming machine according to feature O3, wherein S3506 to step S3511 and steps S3603 to S3616) are executed.

According to the feature O4, when it is specified that the special condition is not satisfied in another process, the event of not returning to the process corresponding to the information of the return address even though the information of the return address is read. Is returned to the process corresponding to the read return address information without the occurrence of. Then, the process corresponding to the fact that the special condition is not satisfied in the returned predetermined process is executed. As a result, it is possible to make the progress of the process different depending on whether the special condition is satisfied or not in another process. In addition, if the special condition is satisfied in another process, the process does not return to the predetermined process, so that the process corresponding to the case where the special condition is not satisfied in the predetermined process is not executed. There is no need to set the processing to do so.

It should be noted that, with respect to the configuration of the features O1 to O4, the features A1 to A8, the features B1 to B8, the features C1 to C7, the features D1 to D6, the features E1 to E7, the features F1 to F6, the features G1 to G6, and the features H1 to H1 H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Characteristic P group>
Features P1. A predetermined calculation means (fourth embodiment) that executes a predetermined calculation process (step S3901 in the fourth embodiment, step S4101 in the fifth embodiment) with respect to the calculation target numerical information (value of the monitoring period counter KK). Then, the function of executing the process of step S3901 in the main MPU 72, and in the fifth embodiment, the function of executing the process of step S4101 in the main MPU 72),
When the numerical value information to be calculated exceeds a predetermined limit value (maximum value in the fourth embodiment, minimum value in the fifth embodiment) as a result of the predetermined calculation process by the predetermined calculation means, the limit is exceeded. Corresponding storage area (carry flag CF) in which information (“1”) is stored, and
When the limit-exceeding correspondence information is stored in the correspondence storage area, the limit value setting means (in the fourth embodiment, the SBC instruction in the main MPU 72 is executed) in which the calculation target numerical information is set as the predetermined limit value. Function, in the fifth embodiment, the function of executing the ADC command in the main MPU 72),
A gaming machine characterized by being equipped with.

According to the feature P1, when a predetermined calculation process is executed on the calculation target numerical information and the calculation target numerical information exceeds a predetermined limit value, the limit exceeding correspondence information is stored in the correspondence storage area. , When the corresponding information exceeding the limit is stored in the corresponding storage area, the numerical value information to be calculated is set to a predetermined limit value. As a result, when the calculation target numerical information reaches the predetermined limit value as a result of executing the predetermined calculation process on the calculation target numerical information, the calculation target numerical information can be held at the predetermined limit value. It will be possible. Therefore, it is possible to specify that the calculation target numerical information has reached the predetermined limit value by referring to the calculation target numerical information, and the calculation target numerical information has reached the predetermined limit value. It becomes possible to preferably perform the process for specifying the above.

Feature P2. Means for executing subtraction processing on the lower byte of the numerical information (numerical information of the weight counter 126) having the upper byte (upper byte TK1) and the lower byte (lower byte TK2) (main MPU 72 in the fourth embodiment). (Function to execute the process of step S3805) of
When the lower byte exceeds the minimum value due to the execution of the subtraction process on the lower byte, the limit exceeding correspondence information is stored in the corresponding storage area.
When a predetermined instruction (SBC instruction) is executed by designating the upper byte, or when the limit exceeding correspondence information is stored in the corresponding storage area by executing the subtraction process for the lower byte. The configuration is such that the process of subtracting 1 from the numerical information of the upper byte is executed.
The predetermined calculation means executes an addition process (step S3901 in the fourth embodiment) on the calculation target numerical information as the predetermined calculation process.
The limit value setting means specifies the calculation target numerical value information so that the predetermined instruction is executed, and the addition process is executed for the calculation target numerical information, so that the calculation target numerical value is executed. When the limit exceeding correspondence information is stored in the corresponding storage area due to the information being inverted beyond the maximum value, the calculation target numerical information is subtracted by 1 and the calculation target numerical information becomes the maximum value. The gaming machine according to feature P1 characterized by being played.

According to feature P2, as a result of performing addition processing on the numerical value information to be calculated by using a predetermined instruction for carrying the digit with respect to the upper byte, the numerical value information to be calculated has reached the maximum value. In that case, it is possible to hold the maximum value. Further, when the numerical value information to be calculated reaches the maximum value by one instruction called a predetermined instruction, it can be held at the maximum value, so that the program capacity can be reduced.

Feature P3. Means for executing addition processing on the lower byte of the numerical information (numerical information of the weight counter 126) having the upper byte (upper byte TK1) and the lower byte (lower byte TK2) (main MPU 72 in the fifth embodiment). (Function to execute the process of step S4005) of
When the lower byte exceeds the maximum value due to the execution of the addition process on the lower byte, the limit exceeding correspondence information is stored in the corresponding storage area.
When a specific instruction (ADC instruction) is executed by designating the upper byte, or when the limit-exceeding correspondence information is stored in the correspondence storage area by executing the addition processing for the lower byte. The configuration is such that the process of adding 1 to the numerical information of the upper byte is executed.
The predetermined calculation means executes a subtraction process (step S4101 in the fifth embodiment) on the numerical information to be calculated as the predetermined calculation process.
The limit value setting means specifies the calculation target numerical value information so that the specific instruction is executed, and the subtraction process is executed for the calculation target numerical information, so that the calculation target numerical value is executed. When the limit exceeding correspondence information is stored in the corresponding storage area due to the information being inverted beyond the minimum value, the calculation target numerical information is added by 1 and the calculation target numerical information becomes the minimum value. The gaming machine according to feature P1 characterized by being played.

According to the feature P3, as a result of performing the subtraction process on the numerical value information to be calculated by using the specific instruction for carrying the digit with respect to the upper byte, the numerical value information to be calculated has reached the minimum value. In some cases, it is possible to keep the minimum value. Further, when the numerical value information to be calculated reaches the minimum value by one instruction called a specific instruction, it can be held at the minimum value, so that the program capacity can be reduced.

It should be noted that, with respect to the configuration of the features P1 to P3, the features A1 to A8, the features B1 to B8, the features C1 to C7, the features D1 to D6, the features E1 to E7, the features F1 to F6, the features G1 to G6, and the features H1 to H1 H10, features I1 to I5, features J1 to J6, features K1 to K5, features L1 to L8, features M1 to M11, features N1 to N6, features O1 to O4, and features P1 to P3. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the invention relating to each feature of the feature O group and the feature P group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko gaming machine is provided with a storage unit for storing game balls, and the game balls stored in the storage unit are guided by a game ball launching device and directed toward a game area according to a player's launch operation. Is fired. Then, for example, when the game ball enters the ball entry portion provided in the game area, for example, a lottery process is executed, or, for example, a process for increasing the number of game balls that can be used by the player is executed. To.

In a slot machine, when a start lever is operated to start a new game in a situation where a game value such as a medal is bet, a lottery process is executed by a control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is necessary that the processing in the control means is preferably executed, and there is still room for improvement in this respect.

The basic configuration of a gaming machine to which each of the above features can be applied is shown below.

Pachinko game machine: An operating means operated by a player, a game ball launching means for launching a game ball based on the operation of the operating means, a ball passage for guiding the launched game ball to a predetermined game area, and a game. A gaming machine that includes each gaming component arranged in an area and gives a privilege to a player when a gaming ball passes through a predetermined passing portion of each gaming component.

Rotating machine such as a slot machine: The rotation of the orbiting body is started based on the operation of the starting operation means, the rotation of the orbiting body is stopped based on the operation of the stopping operation means, and the player according to the pattern after the stop. A gaming machine that gives special benefits to pachinko machines.

10 ... Slot machine, 12 ... Front door, 16 ... Door open sensor, 32L, 32M, 32R ... Reel, 54b ... Power failure monitoring circuit, 56 ... Reset button, 57 ... Setting key insertion hole, 64 ... Bet display, 66 ... Combined display unit, 72 ... Main side MPU, 74 ... Main side RAM, 74a ... Bet number setting counter, 74e ... Door state area, 74f ... Bet number history counter, 74g ... Information error flag, 74h ... Reset current status storage area, 74i ... Reset previous storage area, 74j ... Judgment value counter, 76 ... Second random number circuit, 92 ... Directing side MPU, 101a-101q ... IV = 1 to 17 data group, 102a ... Game state data, 111 ... Latch area, 112 ... Game number mode lottery table, 113 ... Winning rate mode lottery table, 121 ... Jump status flag, 122 ... CLR execution circuit, 122b ... NOR circuit, 123 ... DEC execution circuit, 123c ... OR circuit, 125 ... Stack area, 125a ... Unit storage area, 126 ... weight counter, CF ... carry flag, KK ... monitoring period counter, TK1 ... upper byte, TK2 ... lower byte.

Claims (3)

A predetermined calculation means that executes a predetermined calculation process on the numerical information to be calculated, and
A corresponding storage area in which limit-exceeding correspondence information is stored when the calculation target numerical information exceeds a predetermined limit value as a result of the predetermined calculation processing by the predetermined calculation means.
When the limit-exceeding correspondence information is stored in the correspondence storage area, the limit value setting means for setting the calculation target numerical information as the predetermined limit value, and
A gaming machine characterized by being equipped with. A means for executing a subtraction process for the lower byte of the numerical information having the upper byte and the lower byte is provided.
When the lower byte exceeds the minimum value due to the execution of the subtraction process on the lower byte, the limit exceeding correspondence information is stored in the corresponding storage area.
When a predetermined instruction is executed by designating the high-order byte, and when the limit-exceeding correspondence information is stored in the corresponding storage area by executing the subtraction process for the low-order byte, the high-order byte It is a configuration in which the process of subtracting 1 from the numerical information is executed.
The predetermined calculation means executes addition processing on the calculation target numerical information as the predetermined calculation process.
The limit value setting means specifies the calculation target numerical value information so that the predetermined instruction is executed, and the addition process is executed for the calculation target numerical information, so that the calculation target numerical value is executed. When the limit exceeding correspondence information is stored in the corresponding storage area due to the information being inverted beyond the maximum value, the calculation target numerical information is subtracted by 1 and the calculation target numerical information becomes the maximum value. The gaming machine according to claim 1, wherein the gaming machine is characterized by being played. A means for executing addition processing on the lower byte of numerical information having upper byte and lower byte is provided.
When the lower byte exceeds the maximum value due to the execution of the addition process on the lower byte, the limit exceeding correspondence information is stored in the corresponding storage area.
When the specific instruction is executed by designating the high-order byte, and the limit-exceeding correspondence information is stored in the corresponding storage area by executing the addition process for the low-order byte, the high-order byte The configuration is such that the process of adding 1 to the numerical information is executed.
The predetermined calculation means executes a subtraction process on the calculation target numerical information as the predetermined calculation process.
The limit value setting means specifies the calculation target numerical value information so that the specific instruction is executed, and the subtraction process is executed for the calculation target numerical information, so that the calculation target numerical value is executed. When the limit exceeding correspondence information is stored in the corresponding storage area due to the information being inverted beyond the minimum value, the calculation target numerical information is added by 1 and the calculation target numerical information becomes the minimum value. The gaming machine according to claim 1, wherein the gaming machine is characterized by being played.

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