JP2021015908A - Semiconductor device and method for manufacturing the same - Google Patents

Abstract

To provide a semiconductor device having high reliability.SOLUTION: A semiconductor device 1 includes a substrate 10, a semiconductor element 20a mounted on the substrate 10, a bus bar 30 which is arranged above the semiconductor element 20a so as to be spaced from the semiconductor element 20a, and has a through-hole 31a which is formed at a position where the through-hole 31a overlaps the semiconductor element 20a in plan view for the substrate 10, and a connecting pin 40a of a columnar body having a circular cross-section which is arranged on the semiconductor element 20a. A part of the connecting pin 40a is located inside the through-hole 31a. The area of the upper surface of the connecting pin 40a and the area of the lower surface of the connecting pin 40a are different from each other. The connecting pin 40a and the inner surface of the bus bar 30 surrounding the through-hole 31a, and the connecting pin 40a and the semiconductor element 20a are respectively joined to each other by a conductive bonding agent 41a.SELECTED DRAWING: Figure 2

Description

The present disclosure relates to semiconductor devices and methods for manufacturing semiconductor devices.

The semiconductor device is used, for example, as a drive control device for industrial equipment, a drive control device for home appliances equipped with a motor, an electric vehicle, an in-vehicle control device for a hybrid vehicle, or the like. Semiconductor devices are required to cope with higher power consumption of electric power devices such as industrial devices, home appliances, and automobiles.

In order to cope with high power consumption, Patent Document 1 discloses a semiconductor device using a columnar conductive post for connecting semiconductor elements. By using a connection pin such as a conductive post for connecting a semiconductor element, it is possible to make an electrical connection having a larger current capacity than when a metal wire is used.

JP-A-2010-165764

By the way, in the semiconductor device of Patent Document 1, a connection pin previously bonded to the main surface of the printed circuit board is used for connection with the semiconductor element. Therefore, when the position of the printed substrate is specified and the mounting position of the semiconductor element varies, a connection failure due to a gap between the connection pin and the semiconductor element, or the connection pin presses the semiconductor element. The semiconductor element is damaged due to this, and the reliability of the semiconductor device is lowered.

Therefore, in the present disclosure, a highly reliable semiconductor device or the like is provided.

The semiconductor device according to one aspect of the present disclosure is arranged on a substrate, a semiconductor element mounted on the substrate, and the semiconductor element on the semiconductor element so as to be separated from each other, and the semiconductor in a plan view with respect to the substrate. A bus bar having a through hole formed at a position overlapping the element and a columnar connecting pin having a circular cross section arranged on the semiconductor element are provided, and a part of the connection pin is the through hole. The area of the upper surface of the connection pin and the area of the lower surface of the connection pin are different from each other, and the inner surface of the connection pin and the bus bar surrounding the through hole, and the connection pin and the semiconductor element. Are bonded with a conductive bonding agent.

Further, the method for manufacturing a semiconductor device according to one aspect of the present disclosure is a mounting step of mounting a semiconductor element on a substrate and a position where a bus bar having a through hole is separated from the semiconductor element on the substrate. In addition, a bus bar arrangement step of arranging the through hole and the semiconductor element at a position where they overlap in a plan view with respect to the substrate, and a connection pin arrangement of arranging a columnar body connecting pin having a circular cross section on the semiconductor element. The connection pin includes a step, an inner surface of the bus bar surrounding the connection pin and the through hole, and a joining step of joining the connection pin and the semiconductor element with a conductive bonding agent, respectively. A part of the connection pin is arranged so as to be located inside the through hole, and the area of the upper surface of the connection pin and the area of the lower surface of the connection pin are different.

According to the present disclosure, it is possible to provide a highly reliable semiconductor device or the like.

FIG. 1 is a plan view of the semiconductor device according to the first embodiment. FIG. 2 is a cross-sectional view showing a cut surface taken along line II-II in FIG. FIG. 3 is a process schematic diagram showing a manufacturing method of the semiconductor device 1 according to the first embodiment. FIG. 4 is a diagram showing a method of arranging the connection pins in the connection pin arrangement process. FIG. 5 is a plan view of the semiconductor device according to the second embodiment. FIG. 6 is a cross-sectional view showing a cut surface along the VI-VI line in FIG. FIG. 7 is a plan view of the semiconductor device according to the third embodiment. FIG. 8 is a cross-sectional view showing a cut surface taken along the line VIII-VIII in FIG. FIG. 9 is a plan view of the semiconductor device according to the fourth embodiment. FIG. 10 is a cross-sectional view showing a cut surface taken along line XX in FIG. FIG. 11 is a plan view of the semiconductor device according to the fifth embodiment. FIG. 12 is a cross-sectional view showing a cut surface taken along the line XII-XII in FIG.

Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In addition, all of the embodiments described below show comprehensive or specific examples. Numerical values, shapes, materials, components, arrangement and connection forms of components, processes, process order, etc. shown in the following embodiments are examples, and are not intended to limit the present disclosure. The various aspects described herein can be combined with each other as long as there is no conflict. Further, among the components in the following embodiments, the components not described in the independent claims indicating the highest level concept are described as arbitrary components. In the following description, components having substantially the same function are indicated by common reference numerals, and the description may be omitted. In addition, some elements may be omitted in order to avoid overly complicated drawings.

In addition, the various elements shown in the drawings are merely schematically shown for the purpose of understanding the present disclosure, and the dimensional ratio, appearance, and the like may differ from the actual ones. That is, each figure is a schematic view and is not necessarily exactly illustrated. Therefore, for example, the scales and the like do not always match in each figure.

Further, in the present specification, terms indicating relationships between elements such as parallel or coincident, terms indicating the shape of elements such as circles or rectangles, and numerical ranges are not expressions that express only strict meanings. , Is an expression meaning that a substantially equivalent range, for example, a difference of about several percent is included.

Further, in the present specification, the terms "upper" and "lower" do not refer to the upward direction (vertically upward) and the downward direction (vertically downward) in absolute spatial recognition, but are based on the stacking order in the laminated structure. It is used as a term defined by the relative positional relationship with. Specifically, the direction in which the semiconductor element or the like is mounted on the main surface of the substrate of the semiconductor device is the upward direction. The terms "upper", "lower", "upper surface" and "lower surface" are used only to specify the mutual arrangement between the members, and are intended to limit the posture when the semiconductor device is used. Absent. Also, the terms "upper" and "lower" are used not only when the two components are spaced apart from each other and another component exists between the two components, but also when the two components It also applies when the two components are placed in close contact with each other and touch each other. Further, in the present specification, the "height" is an upward height from the substrate.

(Embodiment 1)
[Constitution]
First, the configuration of the semiconductor device according to the present embodiment will be described. FIG. 1 is a plan view of the semiconductor device 1 according to the present embodiment. FIG. 2 is a cross-sectional view showing a cut surface of the semiconductor device 1 in FIG. 1 along the line II-II.

As shown in FIGS. 1 and 2, the semiconductor device 1 includes a substrate 10, two semiconductor elements 20a and 20b, a bus bar 30, and two connection pins 40a and 40b. The semiconductor device 1 is used, for example, in a drive control device or the like which is connected to a connection terminal or the like for connection with the outside (not shown) and in which a large current flows.

The substrate 10 is formed, for example, as shown in FIG. 2, in contact with the insulator layer 11, the upper surface metal layer 12 formed in contact with the upper surface of the insulator layer 11, and the lower surface of the insulator layer 11. It is composed of a lower metal layer 13 and a metal layer 13. The heat of the semiconductor device 1 is released through the substrate 10. In order to enhance the heat dissipation effect, a water-cooled or air-cooled cooler may be further provided on the lower side of the substrate 10. The substrate 10 is not limited to the configuration shown in FIG. 2, and may not have, for example, the lower metal layer 13.

The insulator layer 11 is formed of, for example, ceramics such as alumina or aluminum nitride. The upper surface metal layer 12 and the lower surface metal layer 13 are formed of a metal having high electrical conductivity, and specifically, are formed of copper, silver, gold, aluminum, or the like.

The semiconductor elements 20a and 20b are respectively mounted on the substrate 10. Specifically, the semiconductor element 20a is mounted on the upper surface metal layer 12 of the substrate 10 via the conductive bonding agent 21a. The semiconductor element 20b is mounted on the upper surface metal layer 12 of the substrate 10 via the conductive bonding agent 21b.

Electrodes are formed on the upper surface and the lower surface of the semiconductor elements 20a and 20b, respectively. The electrodes on the upper surfaces of the semiconductor elements 20a and 20b are electrically connected to the bus bar 30, and the electrodes on the lower surfaces of the semiconductor elements 20a and 20b are electrically connected to the metal layer 12 on the upper surface of the substrate 10. Further, in the semiconductor device 1, the semiconductor element 20a and the semiconductor element 20b are electrically connected in parallel.

The semiconductor elements 20a and 20b are, for example, semiconductor elements made of a silicon semiconductor, a gallium nitride semiconductor, a silicon carbide semiconductor, or the like. Specifically, the semiconductor elements 20a and 20b include, for example, an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), a GIT (Gate Injection Diode) transistor, a GIT (Gate Injection Diode), or a GIT (Gate Injection Diode) transistor. ) Etc. are used. The semiconductor element 20a and the semiconductor element 20b may be the same type of semiconductor element, or may be different types of semiconductor elements.

The conductive bonding agent 21a bonds the upper surface metal layer 12 of the substrate 10 and the semiconductor element 20a, and the conductive bonding agent 21b bonds the upper surface metal layer 12 of the substrate 10 and the semiconductor element 20b. The conductive adhesive 21a or 21b is, for example, solder, but is not limited to this, and may be a conductive adhesive, a conductive tape, or the like. Examples of the conductive adhesive include silver nanopaste in which silver nanoparticles are dispersed in a curable resin.

In FIG. 2, the semiconductor element 20a and the semiconductor element 20b are arranged at different heights, but the semiconductor element 20a and the semiconductor element 20b may be arranged at the same height.

The number of semiconductor elements 20a and 20b included in the semiconductor device 1 is two, but the number is not limited to this. The number of semiconductor elements of the semiconductor device may be changed depending on the design of the semiconductor device, may be one, or may be three or more.

The bus bar 30 is arranged on the semiconductor elements 20a and 20b apart from the semiconductor elements 20a and 20b, and has a flat plate shape parallel to the substrate 10. The bus bar 30 has a through hole 31a formed at a position overlapping the semiconductor element 20a in a plan view with respect to the substrate 10, and has a through hole 31b formed at a position overlapping the semiconductor element 20b.

As the material of the bus bar 30, for example, a metal having high electrical conductivity such as copper, silver, gold or aluminum is used. The thickness of the bus bar is, for example, 0.5 mm or more and 2.5 mm or less.

The shape of the bus bar 30 is, for example, a rectangular flat plate shape, but the shape is not particularly limited to this, and any shape may be used. The shape of the bus bar 30 may be a bent shape such as an L-shape or a U-shape in a plan view. Further, the bus bar 30 may be provided with a step and a part thereof may be raised.

The through holes 31a and 31b are holes that penetrate from the upper surface to the lower surface of the bus bar 30. The plan-view shapes of the through holes 31a and 31b are, for example, circular shapes such as a perfect circle or an ellipse, but are not limited thereto. The plan-view shape of the through holes 31a and 31b may be such that a part of the connection pins 40a and 40b can be located inside the through holes 31a and 31b. The shapes of the through holes 31a and 31b may be square, rectangular, polygonal or the like.

The connection pins 40a and 40b are conductive columnar bodies used for electrically connecting the semiconductor elements 20a and 20b and the bus bar 30, respectively. The connection pin 40a is arranged so as to stand on the semiconductor element 20a, and the connection pin 40b is arranged so as to stand on the semiconductor element 20b. A part of the upper surface side of the connection pin 40a is located inside the through hole 31a, and a part of the upper surface side of the connection pin 40b is located inside the through hole 31b. The connection pin 40a and the inner surface of the bus bar 30 surrounding the through hole 31a are separated from each other, and a conductive bonding agent 41a described later is present between the connection pin 40a and the inner surface of the bus bar 30 surrounding the through hole 31a. .. Similarly, the connection pin 40b and the inner surface of the bus bar 30 surrounding the through hole 31b are separated from each other, and the conductive bonding agent 41b described later is provided between the connection pin 40b and the inner surface of the bus bar 30 surrounding the through hole 31b. Exists. Further, in a plan view of the substrate 10, the entire connection pin 40a is located inside the through hole 31a, and the entire connection pin 40b is located inside the through hole 31b.

The inner surface of the bus bar 30 surrounding the connection pin 40a and the through hole 31a, and the connection pin 40a and the semiconductor element 20a are joined by a conductive bonding agent 41a, respectively. The inner surface of the bus bar 30 surrounding the connection pin 40b and the through hole 31b, and the connection pin 40b and the semiconductor element 20b are joined by a conductive bonding agent 41b, respectively. The conductive bonding agents 41a and 41b are in contact with the side surfaces of the connecting pins 40a and 40b, respectively.

In the present embodiment, the shapes of the connecting pins 40a and 40b are truncated cones, respectively. Since the shape of the connecting pins 40a and 40b is a truncated cone shape, the conductive bonding agent 41a or 41b can easily be bonded to the surfaces of the connecting pins 40a and 40b.

The connection pins 40a and 40b are arranged so that the area of the lower surfaces of the connection pins 40a and 40b is smaller than the area of the upper surfaces of the connection pins 40a and 40b, respectively. Thereby, the area of the joint portion between the connection pins 40a and 40b and the semiconductor elements 20a and 20b can be reduced without thinning the entire connection pins 40a and 40b. Therefore, the stress generated by the expansion and contraction of the connection pins 40a and 40b and the semiconductor elements 20a and 20b caused by the heat generation of the semiconductor elements 20a and 20b during use is reduced. Therefore, the reliability of the semiconductor device 1 can be improved.

Further, since the upper surface side of the connection pins 40a and 40b is thicker than the lower surface side of the connection pins 40a and 40b, a large current can be easily passed and the workability when arranging the connection pins 40a and 40b is improved.

The connection pins 40a and 40b may be arranged so that the area of the lower surfaces of the connection pins 40a and 40b is larger than the area of the upper surfaces of the connection pins 40a and 40b, respectively. Further, the shapes of the connecting pins 40a and 40b are not limited to the truncated cone shape. The connection pins 40a and 40b may be columnar bodies having a circular shape such as a perfect circle or an ellipse in a horizontal cross section with the main surface of the substrate 10, and the area of the upper surface and the area of the lower surface may be different. Since the cross section has a circular shape, cracks are less likely to occur in the conductive bonding agents 41a and 41b.

The diameter of the lower surfaces of the connecting pins 40a and 40b is, for example, 1 mm or more and 5 mm or less. The diameter of the upper surfaces of the connecting pins 40a and 40b is, for example, 2 mm or more and 7 mm or less. The heights of the connection pins 40a and 40b are, for example, 2 mm or more and 10 mm or less. The diameters of the lower surfaces of the connecting pins 40a and 40b, the diameters and heights of the upper surfaces are not limited to these, and may be any length that matches the sizes of the semiconductor elements 20a and 20b and the structure of the semiconductor device 1. .. Further, the connection pin 40a and the connection pin 40b may have the same shape or different shapes.

As the material of the connecting pins 40a and 40b, a metal having high electrical conductivity is used. As the material of the connection pins 40a and 40b, for example, the same material as the bus bar 30, or a material having a thermal expansion coefficient close to that of the semiconductor elements 20a and 20b is used. Examples of the material having a coefficient of thermal expansion close to that of the materials of the semiconductor elements 20a and 20b include an alloy of copper and molybdenum. By using a material having a coefficient of thermal expansion close to that of the semiconductor elements 20a and 20b, the connection pins 40a and 40b and the semiconductor elements 20a and 20b are expanded and contracted due to the heat generated by the semiconductor elements 20a and 20b during use. Stress can be reduced. The same type of material may be used for the connection pin 40a and the connection pin 40b, or different types of materials may be used.

The conductive adhesive 41a or 41b is, for example, solder, but is not limited to this, and may be a conductive adhesive, a conductive tape, or the like. Examples of the conductive adhesive include silver nanopaste in which silver nanoparticles are dispersed in a curable resin.

The conductive bonding agent 41a that joins the connection pin 40a and the inner surface of the bus bar 30 that surrounds the through hole 31a and the conductive bonding agent 41a that joins the connection pin 40a and the semiconductor element 20a are integrally joined. It is used. Similarly, the conductive bonding agent 41b that joins the connection pin 40b and the inner surface of the bus bar 30 that surrounds the through hole 31b and the conductive bonding agent 41b that joins the connection pin 40b and the semiconductor element 20b are integrated. It is used for joining.

[Manufacturing method of semiconductor devices]
Next, a method of manufacturing the semiconductor device 1 according to the present embodiment will be described. The manufacturing method of the semiconductor device 1 according to the present embodiment includes a mounting process, a bus bar arrangement process, a connection pin arrangement process, and a joining process.

FIG. 3 is a process schematic diagram showing a manufacturing method of the semiconductor device 1. FIG. 4 is a diagram showing a method of arranging the connection pins in the connection pin arrangement process.

First, in the mounting step, the semiconductor elements 20a and 20b are mounted on the substrate 10 as shown in FIG. 3A. Specifically, the semiconductor element 20a is bonded onto the upper surface metal layer 12 of the substrate 10 with the conductive bonding agent 21a. Further, the semiconductor element 20b is bonded onto the upper surface metal layer 12 of the substrate 10 by the conductive bonding agent 21b.

In the bus bar arrangement step, the bus bar on which the through holes 31a and 31b are formed is located at a position separated from the semiconductor elements 20a and 20b on the substrate 10, and the through holes 31a and the semiconductor element 20a and the through holes 31b and the semiconductor element 20b are separated from each other. Are arranged at positions where they overlap with each other in a plan view with respect to the substrate 10. The height of the bus bar 30 is defined, for example, by fixing the bus bar 30 to a fixing portion (not shown) on the jig 60, as shown in FIG. 3B. Further, the height of the bus bar 30 may be defined by installing an outer frame to which the bus bar 30 is fixed by insert molding or the like in the semiconductor device 1. That is, the height at which the bus bar 30 is arranged is not affected by the positions of the semiconductor elements 20a and 20b, and is determined by the jig 60, the outer frame, or the like.

In the connection pin arrangement step, the connection pin 40a having a columnar body having a circular cross section is arranged so as to stand on the semiconductor element 20a. Further, the connection pin 40b is arranged so as to stand on the semiconductor element 20b. As described above, the connecting pins 40a and 40b are columnar bodies having a circular cross section, and the area of the upper surface and the area of the lower surface are different. Specifically, the connecting pins 40a and 40b have a truncated cone shape. The connecting pins 40a and 40b are arranged so that the area of the lower surface of the connecting pins 40a and 40b is smaller than the area of the upper surface of the connecting pins 40a and 40b, respectively.

Either the bus bar arrangement process or the connection pin arrangement process may be performed first. For example, as shown by FIGS. 3B and 3D, the connection pin arrangement step may be performed after the bus bar arrangement step. In this case, in the connection pin arrangement step, the connection pin 40a is arranged so that a part of the connection pin 40a is located inside the through hole 31a. Further, the connection pin 40b is arranged so that a part of the connection pin 40b is located inside the through hole 31b.

Further, as shown in FIG. 4, in the connection pin arrangement step, the connection pin 40a may be arranged on the semiconductor element 20a from above the bus bar 30 through the through hole 31a. Similarly, the connection pin 40b may be arranged on the semiconductor element 20b from above the bus bar 30 through the through hole 31b. As a result, the through hole 31a is arranged on the semiconductor element 20a so as to guide the position of the connection pin 40a, and the through hole 31b is arranged on the semiconductor element 20b so as to guide the position of the connection pin 40b. Therefore, the connection pins 40a and 40, respectively, can be easily arranged on the semiconductor elements 20a and 20b so that a part of them is located inside the through holes 31a and 31b. Further, since the connection pins 40a and 40b are arranged through the through holes 31a and 31b from the lower surface side having a small area, the connection pins 40a and 40b can be easily arranged.

Further, for example, as shown by (c) and (d) of FIG. 3, the bus bar arrangement step may be performed after the connection pin arrangement step. In this case, in the bus bar arranging step, the bus bar 30 is arranged so that a part of the connecting pin 40a is located inside the through hole 31a. Further, the bus bar 30 is arranged so that a part of the connection pin 40b is located inside the through hole 31b.

In this way, the connection pin 40a is arranged so that a part of the connection pin 40a is located inside the through hole 31a by the bus bar arrangement step and the connection pin arrangement step. Similarly, the connection pin 40b is arranged so that a part of the connection pin 40b is located inside the through hole 31b.

Next, in the joining step, as shown by FIG. 3 (e), the inner side surface of the bus bar 30 surrounding the connection pin 40a and the through hole 31a, and the connection pin 40a and the semiconductor element 20a are respectively conductive. Join with the bonding agent 41a. Further, the inner side surface of the bus bar 30 surrounding the connection pin 40b and the through hole 31b, and the connection pin 40b and the semiconductor element 20b are joined by the conductive bonding agent 41b, respectively. In joining the connecting pins 40a and 40b and the semiconductor elements 20a and 20b, the conductive bonding agents 41a and 41b may be poured from the upper portions of the through holes 31a and 31b through the connecting pins 40a and 40b, respectively.

When solder is used as the conductive bonding agents 41a and 41b, the solder may be applied to the joint portion by a dispenser or the like, or the preformed solder preformed may be arranged above the through holes 31a and 31b. Further, the surfaces of the connection pins 40a and 40b may be preformed with solder. The solder applied or arranged in this way is melted by a reflow process, and is transmitted from between the inner side surfaces of the bus bar 30 surrounding the through holes 31a and 31b and the connection pins 40a and 40b, respectively, to the side surfaces of the connection pins 40a and 40b. After letting it flow, it is cured at the joint position.

As described above, since the position of the bus bar 30 is fixed by the jig 60 or the like, the amounts of the conductive bonding agents 21a and 21b used for bonding the semiconductor elements 20a and 20b and the substrate 10 vary. The positional relationship between the bus bar 30 and the semiconductor elements 20a and 20b may deviate in the height direction. Therefore, when the connection portion between the bus bar 30 and the semiconductor elements 20a and 20b is fixed to the bus bar 30 in advance, the distance between the bus bar 30 and the semiconductor element 20a or 20b is long, so that the bus bar 30 and the semiconductor element 20a or 20b Poor connection with and may occur. Further, if the distance between the bus bar 30 and the semiconductor element 20a or 20b is short, the semiconductor element 20a or 20b may be pressed against the bus bar 30 and the semiconductor element 20a or 20b may be damaged.

Therefore, by using the manufacturing method of the semiconductor device 1 as described above, the bus bar 30 and the connection pins 40a and 40b are joined after the bus bar 30 and the connection pins 40a and 40b are arranged on the semiconductor elements 20a and 20b. .. Further, after the bus bar 30 and the connection pins 40a and 40b are arranged on the semiconductor elements 20a and 20b, the connection pins 40a and 40b and the semiconductor elements 20a and 20b are joined. Further, a part of the connection pins 40a and 40b is arranged so as to be located inside the through holes 31a and 31b. As a result, even when the positional relationship between the bus bar 30 and the semiconductor element 20a or 20b varies in the height direction, the positional relationship between the bus bar 30 and the connection pins 40a and 40b fluctuates and is joined. Therefore, when the connection portion between the bus bar 30 and the semiconductor elements 20a and 20b is fixed to the bus bar 30 in advance, there is a concern that the connection between the bus bar 30 and the semiconductor element 20a or 20b is poor or the semiconductor element 20a or 20b is damaged. Etc. are suppressed.

[Effects, etc.]
As described above, the semiconductor device 1 is arranged on the substrate 10, the semiconductor element 20a mounted on the substrate 10, and the semiconductor element 20a on the semiconductor element 20a so as to be separated from each other, and is a semiconductor in a plan view with respect to the substrate 10. It includes a bus bar 30 having a through hole 31a formed at a position overlapping the element 20a, and a connecting pin 40a having a columnar body having a circular cross section arranged on the semiconductor element 20a. A part of the connection pin 40a is located inside the through hole 31a. The area of the upper surface of the connecting pin 40a and the area of the lower surface of the connecting pin 40a are different. The inner side surface of the bus bar 30 surrounding the connection pin 40a and the through hole 31a, and the connection pin 40a and the semiconductor element 20a are joined by a conductive bonding agent 41a, respectively.

Usually, the position of the bus bar 30 is defined by the jig 60 or other constituent members for fixing the bus bar 30. On the other hand, the position of the semiconductor element 20a in the height direction may fluctuate due to variations in the amount of solder used for bonding to the substrate 10. Therefore, the positional relationship between the bus bar 30 and the semiconductor element 20a may deviate in the height direction. As a result, when the connection portion between the bus bar and the semiconductor element is fixed to the bus bar in advance, the connection failure between the bus bar and the semiconductor element may occur due to the long distance between the bus bar and the semiconductor element. is there. Further, if the distance between the bus bar and the semiconductor element is short, the semiconductor element may be pressed against the bus bar and the semiconductor element may be damaged.

In the semiconductor device 1, since the connection pin 40a is joined to the inner surface of the bus bar 30 surrounding the through hole 31a of the bus bar 30 by the conductive bonding agent 41a, the positional relationship between the bus bar 30 and the connection pin 40a Can be joined by varying. As a result, even when the positional relationship between the semiconductor element 20a and the bus bar 30 is deviated in the height direction, the joint position between the connection pin 40a arranged on the semiconductor element 20a and the bus bar 30 can be adjusted. Therefore, there is concern when the positional relationship between the bus bar 30 and the connection portion between the bus bar 30 and the semiconductor element 20a is fixed in advance, such as poor connection between the bus bar 30 and the semiconductor element 20a or damage to the semiconductor element 20a. Is suppressed. Therefore, the reliability of the semiconductor device 1 is improved.

Further, the area of the upper surface of the connecting pin 40a and the area of the lower surface of the connecting pin 40a are different. When the area of the lower surface of the connection pin 40a is smaller than the area of the upper surface of the connection pin 40a like the connection pin 40a, when the connection pin 40a is arranged from above the through hole 31a, from the lower surface side having a small area. Since the connection pin 40a is arranged through the through hole 31a, the connection pin 40a can be easily arranged on the semiconductor element 20a. Further, even in the case of a connection pin in which the area of the lower surface is larger than the area of the upper surface, when the connection pin is arranged on the semiconductor element 20a, the stability of self-supporting is high, so that the connection pin is placed on the semiconductor element 20a. It will be easier to place. That is, since the area of the upper surface of the connection pin 40a and the area of the lower surface of the connection pin 40a are different, the connection pin 40a can be easily arranged on the semiconductor element 20a. Therefore, it is possible to prevent problems in the arrangement of the connection pins 40a, and the reliability of the semiconductor device 1 is improved.

Further, a plurality of semiconductor elements 20a and 20b are mounted on the substrate 10, a plurality of through holes 31a and 31 are formed in the bus bar 30, and a plurality of semiconductor elements 20a and 20b are formed in the plurality of through holes 31a and 31b. Through holes 31a and 31b formed at positions overlapping each of 20b in a plan view are included. The semiconductor device 1 is provided with a plurality of connection pins 40a and 40b, and the plurality of connection pins 40a and 40b include connection pins 40a and 40b arranged on the plurality of semiconductor elements 20a and 20b, respectively.

As a result, the connection pin 40a is joined to the inner surface of the bus bar 30 surrounding the through hole 31a of the bus bar 30, and the connection pin 40b is joined to the inner surface of the bus bar 30 surrounding the through hole 31a of the bus bar 30. Therefore, as shown in FIG. 2, even when the mounted height position differs between the semiconductor element 20a and the semiconductor element 20b, the connection pin 40a and the bus bar 30 arranged on the semiconductor element 20a The joining position and the joining position between the connection pin 40b arranged on the semiconductor element 20b and the bus bar 30 can be adjusted at the same time. Therefore, poor connection between the connection pins 40a and 40b and the semiconductor elements 20a and 20b or destruction of the semiconductor elements 20a and 20b as described above is suppressed.

Further, the manufacturing method of the semiconductor device 1 includes a mounting step of mounting the semiconductor element 20a on the substrate 10. Further, in the method of manufacturing the semiconductor device 1, the bus bar 30 in which the through hole 31a is formed is located at a position separated from the semiconductor element 20a on the substrate 10, and the through hole 31a and the semiconductor element 20a are flat with respect to the substrate 10. It further includes a bus bar arranging step of arranging them at visually overlapping positions. Further, the method of manufacturing the semiconductor device 1 includes a connection pin arrangement step of arranging a connection pin 40a having a columnar cross section on the semiconductor element 20a and an inner surface surface of a bus bar 30 surrounding the connection pin 40a and the through hole 31a. And, a joining step of joining the connection pin 40a and the semiconductor element 20a with the conductive bonding agent 41a, respectively, is included. Further, the connection pin 40a is arranged so that a part of the connection pin 40a is located inside the through hole 31a, and the area of the upper surface of the connection pin 40a and the area of the lower surface of the connection pin 40a are different.

As a result, after the bus bar 30 and the connection pin 40a are arranged on the semiconductor element 20a, the bus bar 30 and the connection pin 40a are joined. Further, after the bus bar 30 and the connection pin 40a are arranged on the semiconductor element 20a, the connection pin 40a and the semiconductor element 20a are joined. Further, a part of the connection pin 40a is arranged so as to be located inside the through hole 31a. As a result, even when the positional relationship between the bus bar 30 and the semiconductor element 20a varies in the height direction, the positional relationship between the bus bar 30 and the connection pin 40a fluctuates and is joined. Therefore, it is possible to suppress poor connection between the bus bar 30 and the semiconductor element 20a or damage to the semiconductor element 20a, which is a concern when the connection portion between the bus bar 30 and the semiconductor element 20a is fixed to the bus bar 30 in advance. Therefore, the highly reliable semiconductor device 1 can be manufactured.

Further, the area of the upper surface of the connecting pin 40a and the area of the lower surface of the connecting pin 40a are different. As a result, as described above, the connection pin 40a can be easily arranged on the semiconductor element 20a. Therefore, it is possible to suppress the occurrence of defects in the arrangement of the connection pins 40a, and to manufacture a highly reliable semiconductor device 1.

(Embodiment 2)
Subsequently, the second embodiment will be described. In the second embodiment, the shape of the connecting pin is different from that of the first embodiment. In the following, the differences from the first embodiment will be mainly described, and the common points will be omitted or simplified.

FIG. 5 is a plan view of the semiconductor device 101 according to the present embodiment. FIG. 6 is a cross-sectional view showing a cut surface of the semiconductor device 101 in FIG. 5 along the VI-VI line.

As shown in FIGS. 5 and 6, the semiconductor device 101 is different from the semiconductor device 1 according to the first embodiment in that the connection pins 140a and 140b are provided instead of the connection pins 40a and 40b.

The semiconductor device 101 includes a substrate 10, two semiconductor elements 20a and 20b, a bus bar 30, and two connection pins 140a and 140b.

The connection pin 140a is arranged so as to stand on the semiconductor element 20a, and the connection pin 140b is arranged so as to stand on the semiconductor element 20b. A part of the upper surface side of the connection pin 140a is located inside the through hole 31a, and a part of the upper surface side of the connection pin 140b is located inside the through hole 31b. The inner side surface of the bus bar 30 surrounding the connection pin 140a and the through hole 31a, and the connection pin 140a and the semiconductor element 20a are joined by a conductive bonding agent 41a, respectively. The inner surface of the bus bar 30 surrounding the connection pin 140b and the through hole 31b, and the connection pin 140b and the semiconductor element 20b are joined by a conductive bonding agent 41b, respectively. Further, in a plan view of the substrate 10, the entire connection pin 140a is located inside the through hole 31a, and the entire connection pin 140b is located inside the through hole 31b.

In the present embodiment, the shapes of the connecting pins 140a and 140b are truncated cone shapes. The connection pins 140a and 140b are arranged so that the area of the lower surface of the connection pins 140a and 140b is larger than the area of the upper surface of the connection pins 140a and 140b, respectively. That is, the connection pins 140a and 140b are arranged in the opposite directions to the connection pins 40a and 40b according to the first embodiment.

As a result, the center of gravity of the connection pins 140a and 140b is lowered, so that the connection pins 140a and 140b can easily stand on their own on the semiconductor elements 20a and 20b, and the connection pins 140a and 140b can be easily arranged on the semiconductor elements 20a and 20b.

Further, for example, in the above-mentioned [Manufacturing method of semiconductor device], when the bus bar arranging step is performed after the connecting pin arranging step, the area of the upper surfaces of the connecting pins 140a and 140b is small, so that the connecting pins 140a and 140b A part of each upper surface side can be easily arranged inside the through holes 31a and 31b.

(Embodiment 3)
Subsequently, the third embodiment will be described. In the third embodiment, the shape of the connecting pin is different from that of the first and second embodiments. In the following, the differences from the first and second embodiments will be mainly described, and the common points will be omitted or simplified.

FIG. 7 is a plan view of the semiconductor device 201 according to the present embodiment. FIG. 8 is a cross-sectional view showing a cut surface of the semiconductor device 201 in FIG. 7 along the line VIII-VIII.

As shown in FIGS. 7 and 8, the semiconductor device 201 is different from the semiconductor device 101 according to the second embodiment in that the connection pins 240a and 240b are provided instead of the connection pins 140a and 140b.

The semiconductor device 201 includes a substrate 10, two semiconductor elements 20a and 20b, a bus bar 30, and two connection pins 240a and 240b.

In the present embodiment, the shapes of the connecting pins 240a and 240b are truncated cone shapes. The connection pin 240a has a cavity portion 242a penetrating from the upper surface to the lower surface of the connection pin 240a, and the connection pin 240b has a cavity portion 242b penetrating from the upper surface to the lower surface of the connection pin 240b.

The connection pins 240a and 240b are arranged so that the area of the lower surface of the connection pins 240a and 240b is larger than the area of the upper surface of the connection pins 240a and 240b, respectively.

The connection pin 240a is arranged so as to stand on the semiconductor element 20a. The connection pin 240b is arranged so as to stand on the semiconductor element 20b. A part of the upper surface side of the connection pin 240a is located inside the through hole 31a, and a part of the upper surface side of the connection pin 240b is located inside the through hole 31b. The outer surface of the connection pin 240a, the inner surface of the bus bar 30 surrounding the through hole 31a, and the outer surface of the connection pin 240a and the semiconductor element 20a are joined by a conductive bonding agent 41a, respectively. Further, the inner surface of the connection pin 240a surrounding the cavity portion 242a of the connection pin 240a and the semiconductor element 20a are joined by a conductive bonding agent 41a. Similarly, the outer surface of the connection pin 240b, the inner surface of the bus bar 30 surrounding the through hole 31b, and the outer surface of the connection pin 240b and the semiconductor element 20b are joined by a conductive bonding agent 41b, respectively. Further, the inner surface of the connection pin 240b surrounding the cavity portion 242b of the connection pin 240b and the semiconductor element 20b are joined by a conductive bonding agent 41b. Further, in a plan view of the substrate 10, the entire connection pin 240a is located inside the through hole 31a, and the entire connection pin 240b is located inside the through hole 31b.

In this way, the inner surface of the connection pin 240a surrounding the cavity portion 242a of the connection pin 240a and the semiconductor element 20a are joined by the conductive bonding agent 41a. Further, the inner surface of the connection pin 240b surrounding the cavity portion 242b of the connection pin 240b and the semiconductor element 20b are joined by a conductive bonding agent 41b. As a result, the connection pins 240a and 240b are more firmly bonded to the semiconductor elements 20a and 20b, respectively. Therefore, the reliability of the semiconductor device 201 is further improved.

In order to facilitate the insertion of the conductive bonding agents 41a and 41b into the cavities 242a and 242b, the connection pins 240a and 240b further have cavities penetrating from the cavities 242a and 242b to the side surfaces of the connection pins 240a and 240b. You may be doing it.

Further, the connection pins 240a and 240b may be arranged so that the area of the lower surface of the connection pins 240a and 240b is smaller than the area of the upper surface of the connection pins 240a and 240b, respectively.

(Embodiment 4)
Subsequently, the fourth embodiment will be described. In the fourth embodiment, the shape of the through hole of the bus bar is different from that of the first to third embodiments. In the following, the differences from the first to third embodiments will be mainly described, and the common points will be omitted or simplified.

FIG. 9 is a plan view of the semiconductor device 301 according to the present embodiment. FIG. 10 is a cross-sectional view showing a cut surface of the semiconductor device 301 in FIG. 9 on an X-ray line.

As shown in FIGS. 9 and 10, the semiconductor device 301 is different from the semiconductor device 101 according to the second embodiment in that the bus bar 330 is provided instead of the bus bar 30. Further, in the semiconductor device 301, the height at which the semiconductor element 20b is arranged is the same as the height at which the semiconductor element 20a is arranged.

The semiconductor device 301 includes a substrate 10, two semiconductor elements 20a and 20b, a bus bar 330, and two connection pins 140a and 140b.

The semiconductor element 20a is mounted on the upper surface metal layer 12 of the substrate 10 via the conductive bonding agent 21a. The semiconductor element 20b is mounted on the upper surface metal layer 12 of the substrate 10 via the conductive bonding agent 21c. As described above, the height at which the semiconductor element 20b is arranged is the same as the height at which the semiconductor element 20a is arranged.

The bus bar 330 is arranged on the semiconductor elements 20a and 20b apart from the semiconductor elements 20a and 20b, and has a flat plate shape parallel to the substrate 10. The bus bar 330 has a through hole 331a formed at a position overlapping the semiconductor element 20a in a plan view with respect to the substrate 10, and has a through hole 331b formed at a position overlapping the semiconductor element 20b.

In the present embodiment, the through holes 331a and 331b are elliptical in a plan view.

The shape of the connecting pins 140a and 140b is a truncated cone shape. The connection pins 140a and 140b are arranged so that the area of the lower surface of the connection pins 140a and 140b is larger than the area of the upper surface of the connection pins 140a and 140b, respectively. The connection pin 140a and the connection pin 140b have the same shape.

The widths of the through holes 331a and 331b in the lateral direction and the diameters of the connection pins 140a and 140b at arbitrary positions are set to be the same length. Therefore, the connection pin 140a is in contact with a part of the lower opening of the through hole 331a, and the connection pin 140b is in contact with a part of the lower opening of the through hole 331b. As a result, a part of the lower opening of the connection pin 140a and the through hole 331a and a part of the lower opening of the connection pin 140b and the through hole 331b are in contact with each other, so that the connection pins 140a and 140b are in contact with each other. And the bus bar 330 are less likely to be poorly joined.

(Embodiment 5)
Subsequently, the fifth embodiment will be described. In the fifth embodiment, the shape of the connecting pin is different from that of the first to third embodiments. In the following, the differences from the first to third embodiments will be mainly described, and the common points will be omitted or simplified.

FIG. 11 is a plan view of the semiconductor device 401 according to the present embodiment. FIG. 12 is a cross-sectional view showing a cut surface of the semiconductor device 401 in FIG. 11 along the line XII-XII.

As shown in FIGS. 11 and 12, the semiconductor device 401 is different from the semiconductor device 1 according to the first embodiment in that the connection pins 440a and 440b are provided instead of the connection pins 40a and 40b.

The semiconductor device 401 includes a substrate 10, two semiconductor elements 20a and 20b, a bus bar 30, and two connection pins 440a and 440b.

The connection pin 440a is arranged so as to stand on the semiconductor element 20a. The connection pin 440b is arranged so as to stand on the semiconductor element 20b. A part of the upper surface side of the connection pin 440a is located inside the through hole 31a, and a part of the upper surface side of the connection pin 440b is located inside the through hole 31b. The inner surface of the bus bar 30 surrounding the connection pin 440a and the through hole 31a, and the connection pin 440a and the semiconductor element 20a are joined by a conductive bonding agent 41a, respectively. The inner surface of the bus bar 30 surrounding the connection pin 440b and the through hole 31b, and the connection pin 440b and the semiconductor element 20b are joined by a conductive bonding agent 41b, respectively. Further, in a plan view of the substrate 10, the entire connection pin 440a is located inside the through hole 31a, and the entire connection pin 440b is located inside the through hole 31b.

In the present embodiment, the shapes of the connection pins 440a and 440b are shapes in which cylinders having different cross-sectional areas are connected. The connection pins 440a and 440b are arranged so that the cross-sectional area of the lower cylinder is larger than the cross-sectional area of the upper cylinder. That is, the area of the lower surfaces of the connecting pins 440a and 440b is larger than the area of the upper surfaces of the connecting pins 440a and 440b, respectively.

As a result, the center of gravity of the connection pins 440a and 440b is lowered, so that the connection pins 440a and 440b can easily stand on their own on the semiconductor elements 20a and 20b, and the connection pins 440a and 440b can be easily arranged on the semiconductor elements 20a and 20b.

Further, for example, in the above-mentioned [Method for manufacturing a semiconductor device], when the bus bar arranging step is performed after the connecting pin arranging step, the area of the upper surfaces of the connecting pins 440a and 440b is small, so that the connecting pins 440a and 440b A part of each upper surface side can be easily arranged inside the through holes 31a and 31b.

(Other embodiments)
Although the semiconductor device according to the present disclosure has been described based on the embodiments, the present disclosure is not limited to these embodiments. As long as the gist of the present disclosure is not deviated, various modifications that can be conceived by those skilled in the art are applied to the embodiments and modifications, and other embodiments constructed by combining some components in the embodiments and modifications are also available. , Included within the scope of this disclosure. In addition, each of the above embodiments and modifications can be modified, replaced, added, omitted, etc. within the scope of claims or the equivalent thereof.

For example, in the above embodiment, the connection pin is arranged only on the semiconductor element, but the present invention is not limited to this. A connection pin may be arranged on the upper metal layer of the substrate, and a through hole may be formed at a position where the connection pin is arranged in a plan view with respect to the substrate to connect the substrate and the bus bar. As a result, a semiconductor device having a circuit design in which the metal layer on the upper surface of the substrate and the bus bar are electrically connected is realized.

Further, for example, in the above embodiment, electrodes are formed on the upper surface and the lower surface of the semiconductor element, but the present invention is not limited to this. The semiconductor element may have a plurality of electrodes on the upper surface. In that case, connection pins may be arranged on each electrode, that is, a plurality of connection pins may be arranged on the semiconductor element and connected to the bus bar.

Further, for example, in the above embodiment, the upper surface metal layer is formed on the entire upper surface of the insulator layer, but the present invention is not limited to this. The upper surface metal layer may be separated into two or more regions and formed on the insulator layer. Further, semiconductor elements may be arranged on each of the upper surface metal layers formed separately in two regions, and the semiconductor elements may be electrically connected in series. Further, the upper surface metal layer may form a wiring pattern.

Further, for example, in the above embodiment, the conductive bonding agent is in contact with the side surface of the connecting pin, but the present invention is not limited to this. The lower surface of the connection pin and the semiconductor element may be bonded by a conductive bonding agent. Further, the upper surface of the connection pin and the inner surface of the bus bar forming the through hole may be joined by a conductive bonding agent.

Further, for example, in the above-described embodiment, the semiconductor elements, the through holes, and the connection pins are arranged so as to coincide with each other in a plan view of the substrate, but the present invention is not limited to this. The connection pins may be arranged so as to match the positions of the electrodes of the semiconductor element. Further, the connection pin may be arranged so as to be offset from the center of the through hole in a plan view with respect to the substrate, as long as at least a part of the connection pin is separated from the inner surface of the bus bar surrounding the through hole.

Further, for example, in the above embodiment, the inner surface of the bus bar surrounding the connection pin and the through hole, and the connection pin and the semiconductor element are each joined by an integrated conductive bonding agent. Not limited to. The conductive bonding agent that joins the connection pin and the inner surface of the bus bar that surrounds the through hole and the conductive bonding agent that joins the connection pin and the semiconductor element may be separated.

The semiconductor device according to the present disclosure can be used as a semiconductor device for various purposes such as a drive control device for industrial equipment, a drive control device for home appliances equipped with a motor, an electric vehicle, or an in-vehicle control device for a hybrid vehicle. ..

1, 101, 201, 301, 401 Semiconductor device 10 Substrate 11 Insulator layer 12 Upper surface metal layer 13 Lower surface metal layer 20a, 20b Semiconductor elements 21a, 21b, 21c, 41a, 41b Conductive bonding agents 30, 330 Busbars 31a, 31b , 331a, 331b Through holes 40a, 40b, 140a, 140b, 240a, 240b, 440a, 440b Connection pins 242a, 242b Cavity

Claims (12)

With the board
The semiconductor element mounted on the substrate and
A bus bar which is arranged on the semiconductor element at a distance from the semiconductor element and has a through hole formed at a position where the semiconductor element overlaps the semiconductor element in a plan view of the substrate.
A columnar connecting pin having a circular cross section, which is arranged on the semiconductor element, is provided.
A part of the connection pin is located inside the through hole.
The area of the upper surface of the connection pin and the area of the lower surface of the connection pin are different.
A semiconductor device in which the connection pin, the inner surface of the bus bar surrounding the through hole, and the connection pin and the semiconductor element are respectively joined by a conductive bonding agent. A plurality of the semiconductor elements are mounted on the substrate.
A plurality of the through holes are formed in the bus bar.
The plurality of through holes include the through holes formed at positions overlapping with each of the plurality of semiconductor elements in a plan view.
The semiconductor device is provided with a plurality of the connection pins.
The semiconductor device according to claim 1, wherein the plurality of connection pins include the connection pins arranged on the plurality of semiconductor elements. The semiconductor device according to claim 1 or 2, wherein the area of the lower surface of the connection pin is smaller than the area of the upper surface of the connection pin. The semiconductor device according to claim 1 or 2, wherein the area of the lower surface of the connection pin is larger than the area of the upper surface of the connection pin. The semiconductor device according to any one of claims 1 to 4, wherein the connecting pin has a truncated cone shape. The semiconductor device according to any one of claims 1 to 5, wherein the connection pin has a cavity portion penetrating from the upper surface to the lower surface of the connection pin. The semiconductor device according to claim 4, wherein the through hole is elliptical in a plan view. The mounting process for mounting semiconductor elements on a substrate,
A bus bar arranging step of arranging a bus bar having a through hole formed at a position separated from the semiconductor element on the substrate and at a position where the through hole and the semiconductor element overlap in a plan view with respect to the substrate.
A connection pin arrangement step of arranging a columnar connecting pin having a circular cross section on the semiconductor element,
It includes a joining step of joining the connecting pin and the inner surface of the bus bar surrounding the through hole, and joining the connecting pin and the semiconductor element with a conductive bonding agent, respectively.
The connection pin is arranged so that a part of the connection pin is located inside the through hole.
A method for manufacturing a semiconductor device in which the area of the upper surface of the connection pin and the area of the lower surface of the connection pin are different. The connection pin placement step is performed after the busbar placement step.
The method for manufacturing a semiconductor device according to claim 8, wherein in the connection pin arrangement step, the connection pins are arranged so that a part of the connection pins is located inside the through hole. The method for manufacturing a semiconductor device according to claim 9, wherein in the connection pin arrangement step, the connection pin is arranged on the semiconductor element from above the bus bar through the through hole. The busbar placement step is performed after the connection pin placement step.
The method for manufacturing a semiconductor device according to claim 8, wherein in the bus bar arranging step, the bus bar is arranged so that a part of the connection pin is located inside the through hole. The method for manufacturing a semiconductor device according to any one of claims 8 to 11, wherein in joining the connection pin and the semiconductor element, the conductive bonding agent is poured from the upper part of the through hole to the connection pin.

Images