JP2020205326A - Semiconductor device - Google Patents

Abstract

To provide a semiconductor device that can detect the temperature of a semiconductor element with high accuracy and high speed, and can detect abnormalities and deterioration of a device with high accuracy and high speed.SOLUTION: A semiconductor device 10 includes a laminated substrate with a metal plate 33C1 on the surface, a semiconductor element 11 bonded on the metal plate with a conductive bonding material, and at least one temperature sensor 21 that includes an insulating plate 23 and a temperature detecting element 24, and in which the temperature detecting element is joined to the metal plate via the insulating plate. Since the units are arranged on the same metal plate, the temperature of the semiconductor element can be measured with high accuracy and high speed.SELECTED DRAWING: Figure 1A

Description

The present invention relates to a semiconductor device, and more particularly to a power semiconductor element and a semiconductor device having a temperature detection element for temperature detection of the power semiconductor element.

In a power semiconductor device, in order to dissipate heat from a power semiconductor element (power semiconductor element), the power semiconductor element is mounted on a metal plate having high thermal conductivity such as copper by bonding or the like. ..

In such a semiconductor device, a temperature detecting element is provided for temperature monitoring of the power semiconductor element which is a heat generating source, temperature abnormality detection, control of the power semiconductor element, and the like.

For example, Patent Document 1 discloses a semiconductor device in which a semiconductor element and a temperature sensor are bonded by solder to an upper surface of a metal wiring layer formed on an insulating substrate. It is disclosed that the semiconductor element and the temperature sensor are arranged at predetermined intervals on the metal wiring layer.

Further, Patent Document 2 discloses a semiconductor device in which a semiconductor chip is mounted on a copper plate formed on an insulating substrate via a solder layer. A diode for detecting the temperature of the semiconductor chip is formed on the semiconductor chip.

Japanese Unexamined Patent Publication No. 2012-160602 JP-A-2009-43780

In a semiconductor element, particularly a semiconductor device having a power semiconductor element, it is required to be able to measure the temperature of the power semiconductor element as a heat source with high accuracy and accurately detect the state of the power semiconductor element and the semiconductor device.

The present invention has been made in view of the above points, and can detect the temperature of a semiconductor element, particularly a power semiconductor element, with high accuracy and high speed, and detect an abnormality or deterioration of an apparatus with high accuracy and high speed. It is an object of the present invention to provide a semiconductor device capable of capable of providing a semiconductor device.

Another object of the present invention is to provide a highly reliable semiconductor device having high heat conduction characteristics and heat dissipation effect, high performance, and little deterioration. Another object of the present invention is to provide a highly efficient and highly reliable semiconductor device even in a high-density semiconductor device such as a multi-chip configuration.

The semiconductor device of the present invention comprises an insulating substrate having a metal plate on its surface, a semiconductor element bonded to the metal plate by a conductive bonding material, an insulating plate and a temperature detecting element, and the temperature detecting element is the insulating plate. It has at least one temperature sensor, which is joined to the metal plate via the above.

, Is a plan view schematically showing the upper surface of the semiconductor device 10 of the first embodiment. It is sectional drawing which shows typically the cross section of the semiconductor device 10 along the line AA of FIG. 1A. It is sectional drawing which shows typically the cross section of the semiconductor device 10 along the line BB of FIG. 1A. It is a top view which shows typically the upper surface of the semiconductor device 10 of Example 2. FIG. It is a top view which shows typically the upper surface of the semiconductor device 10 of Example 3. FIG. It is a top view which shows typically the upper surface of the semiconductor device 10 of Example 4. FIG. It is a top view which shows typically the upper surface of the semiconductor device 10 of Example 5. FIG. It is a figure explaining the formation region of the metal plate 33C1 on which the semiconductor element 11 and the temperature sensor 21 are commonly placed. It is a figure explaining the formation region of the metal plate 33C1 on which the semiconductor element 11 and the temperature sensor 21 are commonly placed. It is a figure explaining the formation region of the metal plate 33C1 on which the semiconductor element 11 and the temperature sensor 21 are commonly placed. It is a figure explaining the formation region of the metal plate 33C1 on which the semiconductor element 11 and the temperature sensor 21 are commonly placed. It is a figure explaining the formation region of the metal plate 33C1 on which the semiconductor element 11 and the temperature sensor 21 are commonly placed.

Preferred embodiments of the present invention will be described in detail below. In the following description and the accompanying drawings, the same reference numerals are given to substantially the same or equivalent parts.

FIG. 1A is a plan view schematically showing the upper surface of the semiconductor device 10 of the first embodiment. 1B is a cross-sectional view schematically showing a cross section of the semiconductor device 10 along the line AA of FIG. 1A, and FIG. 1C is a cross section of the semiconductor device 10 along the line BB of FIG. 1A. It is sectional drawing which shows typically.

As shown in FIG. 1A, a semiconductor element 11 such as a power transistor and a temperature sensor 21 are mounted on a metal plate 33C1 which is an upper layer of a laminated substrate 33.

As shown in FIG. 1B, the semiconductor device 10 is brought into close contact with the cooling body 30 made of metal or the like by a thermal compound 31 and joined to the supporting substrate 32 and the supporting substrate 32 made of metal or the like by a bonding material. It is composed of a laminated substrate 33, a semiconductor element 11 mounted on the laminated substrate 33, and a temperature sensor 21.

In the following, a case where the semiconductor element 11 is a power semiconductor element will be described as an example, but the present invention can be applied not only to the power semiconductor element but also to a semiconductor element that generates heat.

Further, as shown in FIG. 1B, the metal plate 33C1 is a part of the metal layer (copper circuit plate) 33C on the upper surface of the laminated substrate 33. More specifically, the laminated substrate 33 is a laminated substrate for heat dissipation in which a copper circuit board is bonded to an insulating substrate (ceramic substrate) 33B by a DCB (Direct Copper Bond) method or an AMB (Active Metal Brazing) method, and has high heat. It is a laminated substrate with high insulation and withstand voltage that has both conductivity and high electrical conductivity. A metal layer (copper circuit board) 33A is bonded to the lower surface of the laminated substrate 33. As the ceramic substrate, ceramics having high thermal conductivity, such as aluminum oxide (alumina), aluminum nitride, silicon nitride, and boron nitride, are used. The laminated substrate manufactured by the DCB method is referred to as a DCB substrate, and the laminated substrate manufactured by the AMB method is referred to as an AMB substrate.

As shown in FIG. 1C, the metal plate 33C2 is another part of the metal layer 33C, and is formed so as to be separated from the metal plate 33C1 by a gap 25. The metal plate 33C2 may or may not be physically connected to the metal plate 33C1. The gap 25 is formed by joining patterned copper plates or by patterning by etching or the like after joining the copper plates on the entire surface.

In the following, the circuit board which is the upper layer of the laminated substrate 33 will be described as the metal layer 33C, and the portion of the circuit board to which the power semiconductor element 11 and the temperature sensor 21 are commonly joined will be described as the metal plate 33C1.

As the bonding material or bonding layer used for the bonding layers 12, 22 and the like, a solder material, a low-temperature sintered material containing metal particles such as silver (Ag), silver nanopaste and the like can be used.

The configuration and arrangement of the power semiconductor element 11 and the temperature sensor 21 will be described in detail below.

As described above, the power semiconductor element 11 and the temperature sensor 21 are mounted by being joined to a metal plate 33C1 which is a common metal plate. The power semiconductor element 11 is bonded to the metal plate 33C1 by a bonding material.

The power semiconductor element 11 is not limited to this, but is preferably a vertical semiconductor element, for example, a vertical MOSFET or an IGBT (Insulated Gate Bipolar Transistor). For example, when the power semiconductor element 11 is a vertical MOSFET, the drain is bonded to the metal plate 33C1, and when the power semiconductor element 11 is a vertical IGBT, the collector is bonded to the metal plate 33C1 by a bonding layer 12 made of a conductive bonding material. ing.

The temperature sensor 21 includes a temperature detecting element 24 and an insulating plate 23 in which the temperature detecting element 24 is bonded by a bonding layer 22 made of a bonding material. The temperature detection element can be, for example, a diode, a transistor, a thermistor, or the like. The temperature detection element needs to be electrically insulated from the power semiconductor element (back electrode). Therefore, when the temperature detecting element is arranged on the metal plate 33C, the temperature detecting element is arranged on the metal plate 33C via the insulating plate 23. Further, an element having electrodes on the upper surface and the lower surface of the metal plate 33C and particularly the element (vertical temperature detection element) is preferable because the temperature detection sensitivity at the portion where the element is in contact is high. The temperature sensor 21 is joined to the metal plate 33C1 by joining the insulating plate 23 to the metal plate 33C1 by the joining layer 22. Hereinafter, the temperature detection element 24 bonded to the metal plate 33C1 via the insulating plate 23, that is, the insulating plate 23 and the temperature detecting element 24 will be collectively referred to as a temperature sensor 21. The bonding layer 22 is a material having thermal conductivity, and a solder material, a low-temperature sintered material containing metal particles such as silver (Ag), silver nanopaste, or the like can be used. It may also contain a resin.

For example, a ceramic substrate or the like is used as the insulating plate 23. The temperature detection element 24 is, for example, a pn diode or a surface mount thermistor, but is not limited thereto. In the insulating plate 23, ceramics having high thermal conductivity, for example, a ceramic substrate having high thermal conductivity such as aluminum oxide (alumina) ceramic or aluminum nitride ceramic, or a conductive plate such as copper is formed on the front and back of an insulating substrate such as a ceramic substrate. A laminated substrate such as a ceramic DCB substrate is suitable. Further, a substrate containing a heat-resistant resin may be used. Specifically, a DCB substrate in which conductive plates such as copper plates are bonded to both sides of a ceramic insulating substrate such as aluminum nitride by the DCB method can be used. Since copper plates or the like are formed on both sides of the ceramic insulating substrate, it is easy to join with high adhesion when joining with the metal layer 33C of the temperature sensor or the laminated substrate, and silver (Ag) or the like is used as the bonding layer 22. It is preferable because a solder material can be used in addition to the low-temperature sintered material containing metal particles. When the insulating substrate 23 is a ceramic substrate, a low-temperature sintered material containing metal particles such as silver (Ag), a bonding material containing a resin, or the like can be used. In the following examples, the DCB substrate is described, but the present invention is not limited to this.

In FIG. 1A, a case where the metal layer 33C has a gap (metal layer non-forming region or separation region) 25 and is composed of two portions (metal plates) has been described as an example, but is formed as one metal plate. You may. For example, the metal layer 33C may be formed so as to cover the entire insulator 33B, on which the power semiconductor element 11 and the temperature sensor 21 may be mounted.

According to the present invention, the temperature detection element 24 is electrically insulated from the metal plate 33C1 by the insulating plate 23, and the power semiconductor element 11 and the temperature sensor 21 are mounted by being joined to the metal plate 33C1 which is a common metal plate. ing.

If the back surface of the temperature detection element and the back surface of the power semiconductor element are arranged on the same metal plate, at least one of the elements cannot operate normally. Therefore, the temperature detection element and the power semiconductor element need to be electrically insulated and arranged. In order to do so, the metal plate of the laminated substrate 33 is patterned (separated) by etching or the like, and the temperature detection element and the power semiconductor element are arranged on the separated metal plate in a state where the insulating substrate is exposed. May be (conventional structure). In this case, the structure is not arranged on the common metal plate, and the power semiconductor element and the temperature detection element are provided on the metal plate thermally separated from each other.

On the other hand, in the present invention, unlike the case where the power semiconductor element and the temperature detecting element are provided on a metal plate thermally separated from each other, the thermal resistance between the power semiconductor element 11 and the temperature detecting element 24 is small. The temperature of the power semiconductor element 11 can be detected with high accuracy and high speed. In addition, abnormalities and deterioration of the power semiconductor element 11 and the semiconductor device can be detected with high accuracy and high speed.

Further, since there is no separation portion due to the patterning of the metal layer 33C, the heat transfer in the horizontal direction from the power semiconductor element 11 in the metal plate is not hindered and the thermal resistance is small, which in turn heats the heat to the support substrate 32 and the cooling body 30. Good transmission is performed and a high heat dissipation effect can be obtained.

Furthermore, since a high heat dissipation effect can be obtained, it is possible to prevent problems such as cracks in the solder used for joining the support substrate 32 and the cooling body 30 and depletion of the thermal compound, resulting in high performance and deterioration. It is possible to realize a small and highly reliable semiconductor device.

In this way, since the abnormality can be detected at an early stage, the electric power can be adjusted to extend the life of the semiconductor device. Therefore, the device can be configured to detect an abnormality or deterioration based on the detected temperature of the temperature detecting element 24 and control the power semiconductor element 11 and the semiconductor device.

Specifically, a determination unit that determines whether or not there is an abnormality from the temperature sensor signal, and a determination unit that suppresses the power of the power semiconductor element 11 when it is determined to be abnormal and usually when it is determined that it has returned to normal. It can be a semiconductor device having a control unit that controls the electric power of the above.

FIG. 2 is a plan view schematically showing the upper surface of the semiconductor device 10 of the second embodiment. The semiconductor device 10 includes one power semiconductor element 11 and two temperature sensors 21A and 21B. The temperature sensor 21A includes an insulating plate 23A and a temperature detecting element 24A joined to the metal plate 33C1 via the insulating plate 23A. Similarly, the temperature sensor 21B is a metal plate via the insulating plate 23B and the insulating plate 23B. When joined to 33C1, it is composed of a temperature detection element 24B. In the following, the plurality of temperature sensors will be collectively referred to as the temperature sensor 21 when they are not particularly distinguished.

As shown in FIG. 2, the distance D1 between the power semiconductor element 11 and the temperature sensor 21A is smaller than the distance D2 between the power semiconductor element 11 and the temperature sensor 21B (D1 <D2).

In this embodiment, a temperature sensor 21A (first temperature sensor) and a temperature sensor 21B (second temperature sensor) having different distances (distances) from the power semiconductor element 11 are provided.

For example, the temperature sensor 21A can be arranged near the power semiconductor element 11 (adjacent position), and the temperature sensor 21B can be arranged at the end of the metal plate 33C1 away from the power semiconductor element 11. According to the above configuration, since heat conduction in the in-plane direction in the metal plate is not hindered, the temperatures of the power semiconductor element 11 and the semiconductor device 10 as well as the deteriorated state and the element life can be measured with high accuracy by monitoring these temperatures. And it can be measured or estimated at high speed. Specifically, it has a temperature distribution with respect to the distance from the power semiconductor element 11 due to the heat generated from the power semiconductor element 11 which is a heating element. When the temperature sensors 21 are arranged at a plurality of locations having different distances from the power semiconductor element 11, the temperature gradient can be grasped from the measured temperature.

With this arrangement, it is possible to grasp the precursor of a failure that cannot be understood by simply measuring the temperature at a certain point. For example, there is a case where a crack occurs in a solder joint or a ceramic substrate at the lower part of the power semiconductor element 11 inside the module. When cracks occur inside the solder or ceramic substrate, heat dissipation in the cooler direction deteriorates and heat is transferred in the horizontal direction, so the temperature gradient becomes gentler than usual.

On the other hand, in the case of the conventional structure, since the metal plate is separated, the heat transfer in the lateral direction is small and the change in the temperature gradient is small. Therefore, the detection sensitivity is low. Further, when an overcurrent flows through the power semiconductor element or the energized portion around it (electrical short circuit, etc.), heat is generated in the power semiconductor element or the like, and the temperature rises. Therefore, the surrounding temperature gradient becomes steep.

FIG. 3 is a plan view schematically showing the upper surface of the semiconductor device 10 of the third embodiment. In the semiconductor device 10, a plurality of power semiconductor elements 11 and a plurality of temperature sensors 21 are joined and placed on a metal plate 33C1 common to them.

More specifically, a plurality of power semiconductor elements 11 and a plurality of temperature sensors 21 are arranged and placed on the metal plate 33C1. In this embodiment, the plurality of power semiconductor elements 11 and the plurality of temperature sensors 21 are matrix-arranged in the first direction (x direction) and the second direction (y direction) perpendicular to the first direction (x direction).

Further, each of the mounting regions (footprints) of the plurality of power semiconductor elements 11 and the plurality of temperature sensors 21 has a rectangular shape, and each side of the rectangular shape is arranged along the x direction and the y direction.

The first temperature sensor 21A is arranged at a position closer to the center of the matrix arrangement region than the other temperature sensors (that is, the second temperature sensor 21B).

For example, as shown in FIG. 3, it is preferable that the first temperature sensor 21A is arranged at the center of the metal plate 33C1 and the other temperature sensor 21B is arranged at the end of the metal plate 33C1.

In this embodiment, a large-capacity semiconductor device 10 in which the power semiconductor element 11 is multi-chip mounted is realized without pattern-separating the metal plate to which the power semiconductor element 11 and the temperature sensor 21 are bonded.

Different temperature distribution profiles occur depending on the abnormal state such as heat generation abnormality due to overcurrent energization (heat generation source abnormality), or when the joint layer is damaged or cracks occur (cooling state abnormality). According to the present invention, since heat conduction in the metal plate is not inhibited, these abnormal states can be measured and identified with high accuracy and high speed.

In addition, in this embodiment, the temperature sensor 21A arranged close to the power semiconductor element 11 and the temperature sensor 21 having different distances from the power semiconductor element 11 may be configured. This makes it possible to detect the temperature state in the operation of the specific power semiconductor element 11 and the temperature gradient caused by heat diffusion.

As a specific arrangement, in addition to the temperature sensors 21A and 21B, in the case of the arrangement of 3 rows and 3 columns in FIG. 3, the first row (upper row) center, the second row (middle row) left and right, and the third row (lower row) It is preferably placed in at least one central location. Further, in this case, the temperature sensor 21B may not be provided.

For example, when the temperature sensor 21A and the temperature sensor 21 are arranged in the center of the first row (upper row), two temperature sensors 21 having different distances from any of the power semiconductor elements 11 can be arranged.

Some power semiconductor devices 11 have only a pair of temperature sensors 21 that are close to each other, but in the example shown in FIG. 3, the central portion of the power semiconductor device 11 that becomes hot due to the influence of thermal interference. An example of the arrangement configuration corresponding to the outer edge of the arrangement is shown, and by detecting the temperature near the heat generation source and the temperature at a position away from the heat generation source, it is relatively efficient to isolate the state according to the type of abnormality described above. It has a structure that can be done well.

FIG. 4 is a plan view schematically showing the upper surface of the semiconductor device 10 of the fourth embodiment. In the semiconductor device 10, a plurality of power semiconductor elements 11 and a plurality of temperature sensors 21 are joined and placed on a metal plate 33C1 common to them.

In the fourth embodiment, at least two of the plurality of temperature sensors are arranged adjacent to one of the power semiconductor elements 11. Specifically, three temperature sensors 21A are arranged adjacent to the power semiconductor element 11 arranged in the center of the apparatus. Further, a temperature sensor 21B is arranged at the end of the device. For example, by arranging in this way, it is possible to grasp the heat (temperature) transmitted in the x direction and the heat (temperature) transmitted in the y direction from the power semiconductor element 11. Therefore, it is possible to estimate where in the power semiconductor element 11 the abnormality has occurred.

According to the present invention, even in a large-capacity semiconductor device 10 mounted on a multi-chip, an abnormality corresponding to an abnormal state such as an abnormality of a heat generating source in which a plurality of temperature sensors are placed adjacent to each other or an abnormality of a cooling state is high. It can be measured and identified accurately and at high speed.

Similar to the case of the third embodiment, in the present embodiment, the temperature sensor 21A arranged close to the power semiconductor element 11 and the temperature sensor 21 having a different distance from the power semiconductor element 11 are configured. You may. This makes it possible to detect the temperature state in the operation of the specific power semiconductor element 11 and the temperature gradient caused by heat diffusion.

That is, it is preferable to have at least two temperature sensors 21 having different distances from the specific power semiconductor element 11. By detecting the temperature in the vicinity of the heat generation source and the temperature at a position away from the heat generation source, it is possible to quickly and accurately isolate the type and state of the above-mentioned abnormality or defect.

FIG. 5 is a plan view schematically showing the upper surface of the semiconductor device 10 of the fifth embodiment. In this embodiment, a DCB substrate is used as the insulating plate 23 to which the temperature sensor 21 is bonded.

As shown in FIG. 5, the temperature detection element 24A arranged at the center of the arrangement area where the power semiconductor element 11 is mounted on the multi-chip and the temperature detection element 24B arranged at the end are insulating plates which are DCB substrates, respectively. It is joined to 23A and 23B and placed. That is, the temperature sensor 21A is composed of the temperature detecting element 24A and the insulating plate 23A, and the temperature sensor 21B is composed of the temperature detecting element 24B and the insulating plate 23B.

Circuit wirings 23C1 and 23C2 electrically separated from each other are formed on the upper layer (conductive layer) of the DCB substrate (insulating plate 23) on which the temperature detecting element 24 is mounted. That is, the circuit wirings 23C1 and 23C2 are a part of a conductive plate such as a copper plate on the insulating substrate of the DCB substrate, are insulated from each other, and are arranged adjacent to each other on the same insulating substrate.

The electrode on the bottom surface of the temperature detection element 24 is electrically connected to the wiring 23C1, and the electrode on the top surface of the temperature detection element 24 can be connected to the wiring 23C2. That is, it has a wiring structure in which both electrodes (positive electrode and negative electrode) of the temperature detection element 24 can be electrically separated and connected to each other.

Therefore, particularly in the case of an element (vertical temperature detection element) having electrodes on the upper and lower surfaces of the element, the wiring width of the DCB substrate (insulating plate 23) can be reduced according to the above configuration, and particularly in the case of a multi-chip. The mountable area of the power semiconductor element 11 in the case of mounting can be increased. Therefore, the power semiconductor element 11 can be mounted at a high density, and the semiconductor device 10 having excellent heat dissipation can be realized. Further, it is possible to measure the temperature of the mounted power semiconductor element 11 with high accuracy.

As a modified example of this embodiment, the wiring width on the metal plate 33C1 is further increased by further mounting the DCB substrate on the circuit wiring of the DCB substrate (insulating plate 23) on which the temperature detection element 24 is mounted. Since it can be reduced, it is possible to realize a semiconductor device 10 that can be mounted at a high density and has excellent heat dissipation.

6A-6D show a suitable forming region of the metal plate 33C1 on which the power semiconductor element 11 and the temperature sensor 21 are commonly mounted.

FIG. 6A is a plan view schematically showing a basic forming region of the metal plate 33C1 in the case shown in FIG. 1A. The metal plate 33C1 includes at least the entire mounting region of the power semiconductor element 11 and the entire mounting region of the temperature sensor 21, and covers the entire rectangular region MR circumscribing both of the mounting regions (footprints). It is preferable that it is extended. This is because the metal plate portion of the rectangular region MR contributes to the main heat conduction between the power semiconductor element 11 and the temperature sensor 21.

FIG. 6B is a plan view schematically showing a basic forming region of the metal plate 33C1 for the semiconductor device 10 having a plurality of temperature sensors 21 as in the case shown in FIG. In this case, the metal plate 33C1 includes at least the entire mounting region of the power semiconductor element 11 and the temperature sensor 21A adjacent to the power semiconductor element 11, and the rectangular region MR1 circumscribing both of the mounting regions and the power semiconductor element. It is preferable that the entire mounting region of the temperature sensor 21B adjacent to the 11 and the power semiconductor element 11 is included, and extends over the entire composite region with the rectangular region MR2 circumscribing both of the mounting regions. ..

That is, it is preferable that the metal plate 33C1 extends at least over the entire L-shaped region which is a composite region of the rectangular region MR1 and the rectangular region MR2.

FIG. 6C is a plan view schematically showing a formation region of the metal plate 33C1 when a plurality of semiconductor elements 11 and a plurality of temperature sensors 21 are arranged in a matrix as in the case shown in FIG. In this case, the metal plate 33C1 includes at least the entire mounting region of the plurality of semiconductor elements 11 arranged in a matrix and the plurality of temperature sensors 21, and extends over the entire rectangular region MR3 circumscribing the mounting region. It is preferable to do so.

FIG. 6D is a plan view schematically showing a formation region of the metal plate 33C1 when a plurality of semiconductor elements 11 and a plurality of temperature sensors 21 are arranged in a matrix, similar to the case of FIG. 6C.

As shown in FIG. 6D, the entire mounting area of the plurality of semiconductor elements 11 and the plurality of temperature sensors 21 does not have to be rectangular. Further, it is preferable that the plurality of semiconductor elements 11 and the plurality of temperature sensors 21 are arranged in a matrix, but they may be arranged so as to be offset from each other.

Even in these cases, the metal plate 33C1 includes at least the entire mounting region of the plurality of semiconductor elements 11 and the plurality of temperature sensors 21, and extends over the entire rectangular region MR4 circumscribing the mounting region. Is preferable. Although the case where the formation region MR of the metal plate 33C1 is rectangular has been described, it may be circular or elliptical.

FIG. 6E shows an example of modification when the entire mounting area of the semiconductor element 11 or the temperature sensor 21 is not rectangular. The entire mounting area of the semiconductor element 11 or the temperature sensor 21 may have an arbitrary shape. Further, it does not matter whether the mounting area of the semiconductor element 11 or the temperature sensor 21 is large.

For example, FIG. 6E shows a case where the shape (mounting area) of the temperature sensor 21B located at the end of the entire mounting area of the plurality of semiconductor elements 11 and the plurality of temperature sensors 21 is circular. Even in this case, the metal plate 33C1 includes at least the entire mounting region of the plurality of semiconductor elements 11 and the plurality of temperature sensors 21, and extends over the entire rectangular region MR5 circumscribing the mounting region. It is preferable to have.

According to the above configuration, heat conduction in the metal plate is not hindered. Therefore, by monitoring the temperature of the semiconductor element 11 with the temperature sensor 21, the temperature of the power semiconductor element 11 and the semiconductor device 10 and the deteriorated state and the element life can be determined. It can be measured or estimated with high accuracy and high speed.

As described above, the power semiconductor element 11 is preferably, but is not limited to, a vertical semiconductor element. In particular, the power semiconductor device 11 is preferably a wide-gap (WBG) semiconductor device such as SiC, GaO2, GaN, or diamond, for which it is difficult to form a partially insulated region on the surface region.

By using these power semiconductor elements 11 in combination with a low-cost Si diode that is easy to manufacture as the temperature detection element 24, a highly efficient, high-density, highly reliable semiconductor device 10 with little deterioration can be achieved. It can be realized at cost.

10: Semiconductor device, 11: Semiconductor element, 21,21A, 21B: Temperature sensor, 23: Insulation plate, 24: Temperature detection element, 30: Cooler, 32: Support substrate, 33: Insulation substrate, 33A: Metal layer, 33B: Insulator, 33C: Metal layer, 33C1: Metal plate

Claims (9)

A laminated substrate having a metal plate on the surface of the insulating plate,
A semiconductor element bonded to the metal plate by a conductive bonding material and
A temperature sensor composed of an insulating plate and a temperature detecting element, and the temperature detecting element is bonded to the metal plate via the insulating plate.
Semiconductor device with. A plurality of the temperature sensors are joined on the metal plate,
The semiconductor device according to claim 1, wherein at least one of the plurality of temperature sensors is arranged at a position closer to the semiconductor element than the other temperature sensors. The semiconductor device according to claim 1, wherein a plurality of the semiconductor elements and a plurality of the temperature sensors each bonded to the metal plate via an insulating plate are arranged and placed on the metal plate. .. 2. The metal plate extends over at least an entire region including a mounting region of the semiconductor element and the temperature sensor adjacent to each other and a rectangular region circumscribing both of the above-described mounting regions. Or the semiconductor device according to 3. The plurality of semiconductor elements and the plurality of temperature sensors are arranged in a matrix.
3. The metal plate extends over the entire rectangular region circumscribing the previously described mounting region, including at least the mounting regions of the plurality of semiconductor elements and the plurality of temperature sensors in the matrix arrangement. The semiconductor device described in 1. The semiconductor device according to claim 5, wherein at least one of the plurality of temperature detecting elements is arranged at a position closer to the center of the rectangular region than the other temperature sensors. The semiconductor device according to any one of claims 1 to 6, wherein at least two of the plurality of temperature sensors are arranged adjacent to one of the semiconductor elements. The semiconductor device according to any one of claims 1 to 7, wherein the insulating plate is an insulating laminated substrate in which an insulating layer and a conductive layer are laminated. The insulating plate is a DCB (Direct Copper Bonding) substrate or an AMB (Active Metal Brazing) substrate, and has a wiring structure in which both positive and negative electrodes of the temperature sensor can be electrically separated from each other and connected. 8. The semiconductor device according to any one of 8.

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