JP2020202707A - Control device and control method of dc/dc converter - Google Patents

Abstract

To suppress output voltage fluctuation that occurs when an input voltage and an output load current change suddenly.SOLUTION: In a DC/DC converter that converts a voltage of an input power supply to a desired output voltage by an on/off operation of a semiconductor switching element, PI control calculation is performed by multiplying a deviation E (s) between a value obtained by feeding back a feedback voltage Vout of the DC/DC converter and an output voltage target value R (s) by proportional gain Kp and integrated gain Ki/s, and an error duty value Δ Duty is calculated on the basis of an output value Y (s), the base duty calculated from the ratio of an input power supply voltage value VBin and an output voltage target value is added to the Δ Duty to calculate Duty 1, and cushion processing of a cushion processing unit 26 and limit processing of a limiter 17 are performed on the Duty1 to obtain Duty 2, and the duty ratio of the gate signal of the semiconductor switching element is determined on the basis of the Duty 2.SELECTED DRAWING: Figure 1

Description

The present invention relates to a control device and a control method for suppressing output voltage fluctuations that occur when the input voltage and output load current suddenly fluctuate in a DCDC converter power supply device mounted on a battery forklift or the like.

As a conventional DCDC converter, for example, the one described in Patent Document 1 has been proposed. The function required of the DCDC converter mounted on the battery forklift is to supply a stabilized power supply having a voltage value required by the control device different from the used battery voltage value and having little fluctuation in the output voltage.

As an example of the power supply configuration, there is a DCDC converter control device shown in FIG. 7, which uses a battery as an input power source and has three types of output circuits (insulated DC24V, non-insulated DC24V, non-insulated DC20V). The output power source generated by this control device is a power source for an electric circuit in a forklift.

In the case of a normal DCDC converter, each output is controlled by using a dedicated PWM control IC or the like for each main circuit control, but in the example of FIG. 7, one microcomputer IC is used in order to reduce the cost. It is used to control three types of output circuits.

In FIG. 7, a capacitor C94 and an electrolytic capacitor C93 are connected in parallel between the positive and negative ends of the battery 1 as an input power source.

An insulated DC24V output circuit, a non-insulated DC24V output circuit, and a non-insulated DC20V output circuit are connected in parallel between both ends of the electrolytic capacitor C93.

The output circuit of the insulated DC24V is configured as follows. A capacitor C95 is connected in parallel to the electrolytic capacitor C93, and semiconductor switching elements, for example, switching elements TR8 to TR11 made of FETs are bridge-connected between both ends of the capacitor C95.

The primary winding of the transformer TF2 is connected between the common connection point of the switching elements TR8 and TR9 and the common connection point of the switching elements TR10 and TR11, and both ends of the secondary winding of the transformer TF2 are the anodes of the diodes D23 and D24. Each is connected to.

The cathodes of the diodes D23 and D24 are connected to the midpoint of the secondary winding of the transformer TF2 via the reactor L4, the current sensor 2a and the electrolytic capacitor C111. A diode D25 having the polarity shown in the figure is connected between the common connection point of the diode D23 and the reactor L4 and the midpoint of the secondary winding of the transformer TF2.

A load Z1 is connected between both ends of the electrolytic capacitor C111, and the output voltage VJ24 of DC24V applied to the load Z1 is detected by a voltage detector (not shown), and the control device (consisting of a microcomputer) in the lower part of FIG. Introduced to 100.

The output circuit of the non-insulated DC24V is configured as follows. A capacitor C140 is connected in parallel to the electrolytic capacitor C93, and a semiconductor switching element, for example, a switching element TR22 made of a FET and a diode D40 having the indicated polarity are connected in series between both ends of the capacitor C140.

The common connection point of the switching element TR22 and the diode D40 is connected to the anode of the diode D40 via the reactor L5, the current sensor 2b and the electrolytic capacitor C143.

A load Z2 is connected between both ends of the electrolytic capacitor C143, and the output voltage VK24 of DC24V applied to the load Z2 is detected by a voltage detector (not shown) and introduced into the control device 100 in the lower part of FIG.

The output circuit of the non-insulated DC20V is configured as follows. A capacitor C154 is connected in parallel to the electrolytic capacitor C93, and a semiconductor switching element, for example, a switching element TR27 made of an FET and a diode D46 having the indicated polarity are connected in series between both ends of the capacitor C154.

The common connection point of the switching element TR27 and the diode D46 is connected to the anode of the diode D46 via the reactor L6, the current sensor 2c and the electrolytic capacitor C157.

A load Z3 is connected between both ends of the electrolytic capacitor C157, and the output voltage VK20 of DC20V applied to the load Z3 is detected by a voltage detector (not shown) and introduced into the control device 100 in the lower part of FIG.

The battery input voltage value (input power supply voltage value) VBin of the battery 1 on the positive electrode side of the electrolytic capacitor C93 is detected by a voltage detector (not shown) and introduced into the control device 100 in the lower part of FIG.

The control device 100 is configured as follows. Reference numeral 101 denotes an AD converter that takes in the battery input voltage value VBin and the output voltages VJ24, VK24, and VK20 detected in each output circuit and digitally converts them.

Reference numeral 102 denotes a CPU that performs various operations such as obtaining a duty value that determines a ratio of on / off periods of the switching elements TR8 to TR11, TR22, and TR27 based on a digital signal from the AD converter 101.

103a to 103c are PWM output units that output PWM signals corresponding to the duty values calculated by the CPU 102 to the gate circuits 104a to 104d, respectively.

The gate circuits 104a to 104d generate a gate signal having an on / off ratio determined by the calculated duty value and supply it to the gates of the corresponding switching elements TR8 to TR11, TR22, and TR27.

In the control device of the DCDC converter of FIG. 7, one microcomputer (control device 100) is used to perform constant voltage feedback control for three types of output circuits, and the configuration of the constant voltage feedback control is shown in FIG. Shown in. Here, for example, control of the non-insulated DC24V output circuit (K24) of FIG. 7 will be described.

The deviation between the output voltage target value R (s) (= Vout = 24V) of the set non-isolated DC24V output circuit and the output voltage Vout (= VK24) taken into the AD converter 101 is calculated by the subtractor 11. Will be done.

The deviation output of the subtractor 11 (control deviation E (s) of PI control) is multiplied by the proportional gain Kp of the proportional term 12 of PI control and the integrated gain Ki / s (s is the Laplace operator) of the integral term 13, respectively. Then, each multiplication output is added in the adder 14 (the output value Y (s) of PI control is obtained).

Reference numeral 15 denotes an arithmetic circuit for calculating an error duty value (error feedback calculation result) ΔDuty by multiplying the addition output of the adder 14 by a predetermined coefficient A.

Reference numeral 16 denotes a cushion circuit that imparts cushioning performance at the start of output to the limiter 17 that limits (limits processing) the error duty value ΔDuty calculated by the calculation circuit 15.

A gate signal with an on / off ratio determined by the duty value (PWM switching duty of the semiconductor switching element) limited by the limiter 17 is generated by a gate circuit (not shown), and the switching element (FET) on the output circuit side of the non-isolated DC24V. It is supplied to the gate of TR22.

The same control as described above is performed for the output circuit (J24) of the insulated DC24V and the output circuit (K20) of the non-insulated DC20V.

Japanese Patent No. 4530066

When the control method according to the configuration shown in FIG. 8 is adopted, the cost can be suppressed because only one microcomputer is required, but the processing capacity of the microcomputer is inadequate because three types of constant voltage feedback control processing are performed at the same time. It tends to be enough.

As a result, the transient response of the constant voltage feedback control deteriorates due to sudden fluctuations in the load and sudden fluctuations in the input voltage and output load current with respect to the supply of regulated power supply, which is required as a function of the DCDC converter. The output voltage fluctuates.

Since the control in FIG. 8 is performed by digital control, the feedback data such as error input and the PWMDuty (ratio of on / off periods of the switching elements (FETs) TR8 to TR11, TR22, and TR27 in FIG. 7), which is the control calculation result, are controlled. Discrete control is performed every period (200 μsec in this case), and the transient response performance deteriorates in delay time and stability depending on the control period.

The present invention solves the above problems, and an object of the present invention is to provide a control device and a control method for a DCDC converter capable of suppressing output voltage fluctuations that occur when the input voltage and output load current suddenly fluctuate. There is.

The DCDC converter control device according to claim 1 for solving the above problems is
In a DCDC converter that converts the voltage of an input power supply into a desired output voltage by turning on and off a semiconductor switching element.
The deviation between the value fed back the output voltage of the DCDC converter and the output voltage target value of the DCDC converter is taken, and the PI control calculation is performed by multiplying the deviation by the proportional gain and the integrated gain, and the output value of the PI control calculation is performed. The first duty value calculation unit that calculates the error duty value based on
A second duty value that determines the ratio of the on / off period of the semiconductor switching element is calculated by adding the basic duty value calculated from the ratio of the input power supply voltage of the DCDC converter and the output voltage target value to the error duty value. With a duty value calculation unit
It is characterized in that the duty ratio of the gate signal of the semiconductor switching element is determined based on the duty value calculated by the second duty value calculation unit.

The control device for the DCDC converter according to claim 2 is claimed in claim 1.
When the output voltage of the DCDC converter is less than the first set voltage set to be smaller than the output voltage target value after the set time has elapsed since the DCDC converter was started, the proportion of the first duty value calculation unit is obtained. When the gain and integrated gain are increased and the output voltage of the DCDC converter becomes equal to or higher than the second set voltage set larger than the output voltage target value, the duty value calculated by the second duty value calculation unit is performed. It is characterized by having a parameter value changing unit having a value of 0%.

The control device for the DCDC converter according to claim 3 is claimed in claim 1 or 2.
The set time after the start of the DCDC converter increases proportionally to the duty value calculated by the second duty value calculation unit, and the limit processing unit applies limit processing by a limit coefficient that becomes a fixed value after the set time elapses. It is characterized by having.

The control device for the DCDC converter according to claim 4 is the control device according to any one of claims 1 to 3.
The DCDC converter is characterized by including a plurality of output circuits having the same input power supply.

The control method of the DCDC converter according to claim 5 is
A DCDC converter control method that converts the voltage of an input power supply into a desired output voltage by turning on and off a semiconductor switching element.
The deviation between the value fed back the output voltage of the DCDC converter and the output voltage target value of the DCDC converter is taken, and the PI control calculation is performed by multiplying the deviation by the proportional gain and the integrated gain, and the output value of the PI control calculation is performed. The first duty value calculation step for calculating the error duty value based on
A second duty value that determines the ratio of the on / off period of the semiconductor switching element is calculated by adding the basic duty value calculated from the ratio of the input power supply voltage of the DCDC converter and the output voltage target value to the error duty value. Duty value calculation step and
It is characterized by including a step of determining a duty ratio of a gate signal of the semiconductor switching element based on a duty value calculated by the second duty value calculation step.

(1) According to the inventions of claims 1 to 5, the duty ratio of the gate signal of the semiconductor switching element is corrected at high speed due to a sudden fluctuation of the input voltage, and the control response is improved. As a result, fluctuations in the output voltage can be suppressed.
(2) According to the second aspect of the present invention, the duty ratio of the gate signal of the semiconductor switching element is corrected at high speed due to a sudden fluctuation of the output load current, and the control response is improved. As a result, fluctuations in the output voltage can be suppressed.
(3) According to the third aspect of the present invention, it is possible to perform a limit process having cushioning performance on the calculated duty value, and it is possible to prevent a sudden limit process.
(4) According to the invention of claim 4, it is possible to realize a plurality of power output controls with an inexpensive microcomputer that cannot perform high-speed processing.

The control block diagram according to the first embodiment of the present invention. The characteristic diagram of the limit coefficient explaining the cushion processing in the limit processing part of Example 1 of this invention. The voltage waveform figure which shows the output voltage fluctuation suppression effect of the conventional method and the method of Example 1 of this invention. The control block according to the second embodiment of the present invention is shown, (a) is a block diagram of the entire control block, and (b) is a flowchart of processing performed by the parameter value changing unit. The explanatory view which shows the operation of the parameter value changing part in Example 2 of this invention. The voltage waveform diagram which shows the output voltage fluctuation suppression effect of the conventional method and the method of Example 2 of this invention. The block diagram which shows an example of a DCDC converter circuit. Block diagram of conventional DCDC converter constant voltage feedback control.

Hereinafter, embodiments of the present invention will be described with reference to the drawings, but the present invention is not limited to the following examples of embodiments.

The present invention is applied to, for example, the DCDC converter of FIG. 7, and FIG. 1 shows a control block of the improved constant voltage feedback control according to the first embodiment performed by the control device 100 of FIG.

Although FIG. 1 shows only the control for the non-insulated DC24V output circuit (K24) of the DCDC converter of FIG. 7, the isolated DC24V output circuit (J24) and the non-insulated DC20V output circuit (K20) of FIG. 7 are shown. The same control is performed for.

In FIG. 1, the same parts as those in FIG. 8 are indicated by the same reference numerals. In the subtractor 11, a deviation between the output voltage VK24 (Vout) of the non-isolated DC24V output circuit incorporated in the AD converter 101 of FIG. 7 and the set output voltage target value (= 24V) is taken, and the deviation ( E (s)) is multiplied by the proportional gain Kp of the proportional term 12 and the integrated gain Ki / s of the integral term 13, respectively.

The two multiplication outputs are added by the adder 14, and the calculation circuit 15 calculates the error duty value (error feedback calculation result) ΔDuty by multiplying the addition output by a predetermined coefficient A.

The subtractor 11, the proportional term 12, the integral term 13, the adder 14, and the arithmetic circuit 15 constitute the first duty value arithmetic unit of the present invention.

In the first embodiment, the input voltage value VBin of the battery 1 of FIG. 7 is further input from the AD converter 101, and the ratio (= R (= R (= R)) to the output voltage target value R (s) (= VK24 = 24V) in the arithmetic circuit 25. From s) / VBin), the PWM switching duty (base duty) (basic duty value) of the basic switching element (FET) is calculated.

The error duty value ΔDuty output from the arithmetic circuit 15 and the base duty output from the arithmetic circuit 25 are added by the adder 28, and the added duty value Duty1 is output.

The second duty value calculation unit of the present invention is configured by the calculation circuit 25 and the adder 28.

Reference numeral 26 denotes a cushion processing unit that imparts cushioning performance to the limiter 17 that limits (limits processing) the added duty value Duty 1 output from the adder 28. The cushion processing unit 26 inputs a signal for detecting that the DCDC converter has started, increases the set time after the start in proportion, and outputs a limit coefficient that becomes a fixed value after the set time elapses. The operation of the cushioning process will be described together with FIG. 2, which shows the characteristics of the limit coefficient.

In FIG. 2, the DCDC converter is started at t = 0, and the limit coefficient is proportionally increased with the time t after the start. Then, when the limit coefficient reaches the predetermined value A at t = T1, the subsequent limit coefficient is fixed to the predetermined value A. The predetermined value A is set to an arbitrary value of 0.5 to 1.

By inputting the limit coefficient determined by the cushion processing unit 26 and the above-mentioned added duty 1 into the limiter 17 and limiting the limiter 17, the duty value Duty 2 after the limit processing is calculated. Then, the duty ratio of the gate signal of the switching element TR22 of FIG. 7 is determined based on the duty value Duty 2 after the limit processing.

For example, when the limit coefficient = 0.5 (= 50%) output by the cushion processing unit 26 and the Duty1 = 60%, the processing of the limiter 17 limits the Duty2 to 50%.

Next, a method of generating a gate signal (on / off command signal) of each switching element of FIG. 7 (method of generating a gate signal of the gate circuits 104a to 104d) will be described. The isolated DC24V output circuit (J24) of FIG. 7 includes a single-phase fribridge circuit including switching elements TR8 to TR11. The switching elements TR8 to TR11 have the switching patterns shown in Table 1 below.

In the patterns 1 and 2 in Table 1, there is a voltage applied to the transformer TF2 of the output circuit J24 in FIG. Therefore, the gate signals of the switching elements TR8 to TR11 are determined so as to satisfy (T1 + T2) / (T1 + T2 + T3 + T4) = Duty2 with respect to the duty value Duty2 after the limit processing in FIG.

Further, the non-isolated DC24V or DC20V output circuit (K24 or K20) of FIG. 7 determines the gate signal of the switching element TR22 or TR27 so that the duty = Duty2 of the ON period of the switching element TR22 or TR27 is set.

In the control device configured as described above, assuming that the battery input voltage: VBin and the output voltage target value: VK24, the PWM switching duty (base duty) of the basic FET (switching element) is determined by the following equation. To.

Base Duty = VK24 / VBin
For example, when the battery input voltage = 108V and the output voltage target value = 24V, the duty is Duty = 24V / 108V = 22.2%. Further, the error duty value = ΔDuty is calculated by performing PI control calculation on the difference between the output voltage target value and the AD-converted output voltage value, and in the adder 28, ΔDuty is added / subtracted from the base duty. The Duty 1 before the cushion limit processing is output.

The operation in each of the conventional method and the method of the present invention when this voltage feedback control is repeated every 200 μsec (when the control cycle = 200 μsec) will be described below.

[In the case of conventional DCDC converter constant voltage feedback control (Fig. 8)]
Consider the case where the battery input voltage value VBin in FIG. 7 suddenly changes (for example, it fluctuates from 108V to 60V). Since the control can change the PWM switching duty only every 200 μsec, the predetermined time (maximum 200 μsec) from the sudden change of the battery input voltage value VBin is fixed at Duty = 24V / 108V = 22.2%. , The output voltage Vout suddenly changes toward VBin × Duty = 60V × 22.2% = 13.32V.

In order to prevent this fluctuation, there is an error feedback control, but since this control is a PI control including the integration term 13 (Ki / s) as shown in FIG. 8, it gradually changes after the output voltage feedback value changes. The error duty value ΔDuty is added to. Therefore, the delay time until the output voltage Vout recovers to the output voltage target value is large.

This voltage change can be reduced only by discharging the charge energy of the voltage smoothing capacitor on the output side (C143 in the output circuit K24 of the non-insulated DC24V), so unless the capacitance of the voltage smoothing capacitor is increased. , The output voltage Vout drops immediately.

On the contrary, when the battery input voltage VBin suddenly rises, the output voltage Vout rises remarkably by the same operation.

[In the case of constant voltage feedback control of the present invention (FIG. 1)]
When the battery input voltage value fluctuates in the same manner as described above, the duty cannot be corrected by control as described above during the control cycle interval (maximum 200 μsec), but after the battery input voltage value fluctuation in the control cycle is detected next. The duty value (base duty in FIG. 1) based on the battery input voltage value is recalculated as follows.

(At the time of sudden change from 108V to 60V) Recalculation Duty = Duty = VK24 / VBin = 24V / 60V = (22.2% →) 40%.

Therefore, the responsiveness is remarkably improved as compared with the conventional method in which the duty is calculated only by the feedback calculation result ΔDuty based on the error.

FIG. 3 shows the experimental results of the output voltage response according to the conventional method and the present invention under the condition that the battery input voltage fluctuates by Δ20 V. FIG. 3 shows the voltage waveform in the output circuit (K20) of the non-isolated DC20V of FIG. 7, and in the conventional method, the output voltage fluctuation at the time of the battery input voltage fluctuation was Δ7V. On the other hand, in the present invention, the output voltage fluctuation at the time of the battery input voltage fluctuation is suppressed to Δ3V.

As described above, according to the first embodiment, the following effects can be obtained.
(1) Even if a sudden input voltage fluctuation occurs, the output voltage fluctuation can be suppressed by control.
(2) In many cases, the battery input voltage detection value to be additionally used is used in the existing control (control other than the output voltage control of the DCDC converter). In that case, no additional hardware is required (only software can be changed from the conventional method). That is, the size and cost of the on-board equipment such as the DCDC converter and the battery forklift according to the present invention are not increased.
(3) Multiple power output control can be realized with an inexpensive microcomputer that cannot perform high-speed processing.

Note that the first embodiment can be applied not only to the three-output circuit configuration as shown in FIG. 7, but also to a plurality of output circuit configurations other than those shown in FIG. 7, and can also be applied to a DCDC converter having a one-output configuration.

In the first embodiment, the control device of the DCDC converter is configured to stabilize the output voltage when the battery input voltage suddenly fluctuates, but in the second embodiment, the output voltage is further stabilized even when the load current suddenly fluctuates. It was configured to let.

The second embodiment is applied to, for example, the DCDC converter of FIG. 7, and FIG. 4 shows a control block of the improved constant voltage feedback control according to the second embodiment performed by the control device 100 of FIG. 7.

FIG. 4 shows only the control for the non-insulated DC24V output circuit (K24) of the DCDC converter of FIG. 7, but the isolated DC24V output circuit (J24) and the non-insulated DC20V output circuit (K20) of FIG. 7 are shown. The same control is performed for.

In FIG. 4, the same parts as those in FIG. 1 are indicated by the same reference numerals. FIG. 4A shows the overall configuration of the control block, and FIG. 4B shows processing performed by the duty value changing unit 30 and the gain changing unit 40 of FIG. 4A constituting the parameter value changing unit of the present invention. The flowchart of is shown.

In FIG. 4, the normal proportional gain of the proportional term 12 is Kp0, and the normal integrated gain of the integral term 13 is Ki0.

In the control block of FIG. 4, the AD-converted output voltage value Vout (in this example, the output voltage VK24 of the non-insulated DC24V of FIG. 7) is input to the microcomputer of the control device 100 of FIG. 7 and set for each control cycle. Based on the output voltage target value R (s) (= 24V) and the error E (s) of the output voltage value, the switching operation of the semiconductor switching element (FET) is forcibly stopped, or conversely, the PI control calculation result. In order to increase (error duty value ΔDuty), processing such as replacing the proportional gain Kp and the integrated gain Ki with larger ones is performed.

The duty value changing unit 30 provided on the output side of the limiter 17 performs the processing of stopping the switching operation of the forced semiconductor switching element, and the gain changing unit 40 performs the processing of the replacement calculation of the proportional gain Kp and the integrated gain Ki. For example, it is executed by the microcomputer of the control device 100 of FIG. 7 according to the flowchart of steps S1 to S6 of FIG. 4 (b). The other parts operate in the same manner as in FIG.

First, in step S1, it is determined whether or not the start-up cushion time of the cushion processing unit 26 is completed, and if it is completed, the processes of steps S2 to S6 are performed. That is, the cushion processing unit 26 outputs a limit coefficient that increases proportionally to the set time after startup (between t = 0 to T1 in FIG. 2), and the cushion time at startup is completed and the limit coefficient becomes constant. The processing of steps S2 to S6 is performed only when

In step S2, it is determined whether or not the output voltage value Vout is less than 90% (first set voltage) of the output voltage target value R (s), and if it is less than 90%, the gain changing unit 40 determines. In step S3, the proportional gain and the integrated gain are replaced with the larger gains Kp1 and Ki1 from the normal values Kp0 and Ki0. As a result, the error duty value ΔDuty and the duty value Duty2 after the limit processing can be increased faster, and the transient drop in the output voltage can be minimized.

If it is determined in step S2 that the output voltage Vout is not less than 90% of the output voltage target value R (s), the gain changing unit 40 sets the proportional gain and the integrated gain to the normal numerical values Kp0 and Ki0 in step S4. And.

The state of replacement (change) of the proportional gain Kp and the integrated gain Ki in steps S2 to S4 is as shown in FIG. 5 (b).

After that, in step S5, it is determined whether or not the output voltage value Vout is 120% (second set voltage) or more of the output voltage target value R (s), and if it is 120% or more, the duty value changing unit. In step S6, the duty value Duty 2 after the limit processing is forcibly set to 0% in step S6. As a result, the gate signal of the switching element TR22 of the circuit on the non-insulated DC24V side of FIG. 7 becomes an off command, and the energy supply from the primary side (battery 1 side) is forcibly stopped.

If it is determined in step S5 that the output voltage value Vout is not 120% or more of the output voltage target value R (s), the forced operation of Duty2 = 0% in step S6 is canceled and normal PI control is performed. Return to Duty2 by calculation.

The transition of the value of Duty2 in steps S5 and S6 is as shown in FIG. 5A.

When the determination result of steps S1 and S5 is No, and after the processing of steps S3 and S6, the process returns to the processing of step S1, respectively.

The first set voltage used for the determination in step S2 is not limited to 90% of the output voltage target value R (s), and may be a value less than 100% of the output voltage target value R (s). The second set voltage used for the determination in step S5 is not limited to 120% of the output voltage target value R (s), and may be a value exceeding 100% of the output voltage target value R (s).

Next, the operation in each of the conventional method and the method of the present invention when the voltage feedback control is repeated every 200 μsec (when the control cycle = 200 μsec) will be described.

[In the case of conventional DCDC converter constant voltage feedback control (Fig. 8)]
When the load current of the DCDC converter shown in FIG. 7 suddenly increases, the PWM Duty of the switching element (FET) is constant for a predetermined time (maximum 200 μsec), so that the transient energy is the electrolytic capacitor C143 connected to the output side. It operates to maintain the voltage by discharging the electric charge of. Then, the discharged charge needs to be replenished with energy by switching the switching element (TR22) from the primary side (battery 1).

When a large load current (energy) flows out (for example, it fluctuates from 0% to 100 load), the control can change the PWM switching duty only every 200 μsec, so the load current suddenly changes (rises). In this case, since the duty is fixed for a maximum period of 200 μsec, the output voltage drops sharply.

There is an error feedback control to suppress this fluctuation, but since this control is a PI control including the integration term 13 (Ki / s) as shown in FIG. 8, it gradually changes after the output voltage feedback value changes. The error duty value ΔDuty is added to. Therefore, the delay time until the output voltage recovers to the original constant voltage value is large.

Since this voltage change can be reduced only by discharging the charge energy of the voltage smoothing capacitor on the output side (C143 in the output circuit K24 of the non-insulated DC24V), the capacitance of the voltage smoothing capacitor on the output side can be reduced. Unless it is increased, the output voltage will drop immediately.

On the contrary, when the load current decreases sharply, the output voltage rises remarkably by the same operation.

[In the case of constant voltage feedback control of the present invention (FIG. 1)]
When the load current suddenly increases as described above, the ΔDuty cannot be corrected by control as described above during the control cycle interval (maximum 200 μsec), but the output voltage value Vout becomes less than 90% of the target value. When this happens, the error duty value ΔDuty in FIG. 4 and the duty value Duty2 after the limit processing are changed by replacing the normal values Kp0 and Ki0 with the larger gains Kp1 and Ki1 as in step S3. Increase faster to minimize output voltage transients.

On the contrary, when the load current suddenly decreases, the ΔDuty and Duty2 in FIG. 4 cannot be reduced, so that the energy corresponding to the switching duty of the switching element (FET) is continuously supplied from the battery 1 on the primary side, and is secondary. It is charged as an electric charge of the electrolytic capacitor (C143 in FIG. 7) connected to the side output side, and the Vout rises.

When the output voltage value Vout is sampled for each control cycle and the output voltage value Vout becomes 120% or more of the output voltage target value due to the decrease in the load current, as in step S6, after the limit processing. The energy supply from the primary side is forcibly stopped by setting Duty2 to 0%.

Further, when the output voltage value Vout falls within a certain range from the output voltage target value, the forced operation of Duty2 = 0% is canceled and the process returns to Duty2 by the normal PI control calculation.

FIG. 6 shows the experimental results of the output voltage response according to the conventional method and the present invention under the condition that the load current is reduced by 14 A. FIG. 6 shows a voltage waveform in the output circuit (J24) of the insulated DC24V of FIG. The lower part of FIG. 6 is an enlarged waveform of the time axis in the upper part of FIG.

In the case of the lower part of FIG. 6, in the conventional method, the output voltage fluctuation at the time of sudden load current fluctuation is Δ9.3V, whereas in the present invention, the output voltage fluctuation at the time of sudden load current fluctuation is suppressed to Δ5V.

As described above, according to the second embodiment, the following effects can be obtained.
(1) Even if a sudden load current fluctuation occurs, the output voltage fluctuation can be suppressed by control.
(2) In many cases, the battery voltage detection value to be additionally used is used in the existing control (control other than the output voltage control of the DCDC converter). In that case, no additional hardware is required (only software can be changed from the conventional method). That is, the size and cost of the on-board equipment such as the DCDC converter and the battery forklift according to the present invention are not increased.
(3) Multiple power output control can be realized with an inexpensive microcomputer that cannot perform high-speed processing.

Note that the second embodiment can be applied not only to the three-output circuit configuration as shown in FIG. 7, but also to a plurality of output circuit configurations other than those shown in FIG. 7, and can also be applied to a DCDC converter having a one-output configuration.

1 ... Battery 11 ... Subtractor 12 ... PI control proportional term 13 ... PI control integration term 14, 28 ... Adder 15, 25 ... Arithmetic circuit 17 ... Limiter 26 ... Cushion processing unit 30 ... Duty value changing unit 40 ... Gain Change unit 100 ... Control device 101 ... AD converter 102 ... CPU
103a-103c ... PWM output unit 104a-104d ... Gate circuit TR8-TR11, TR22, TR27 ... Switching element TF2 ... Transformer C93, C111, C143, C157 ... Electrolytic capacitor L4, L5, L6 ... Reactor Z1-Z3 ... Load

Claims (5)

In a DCDC converter that converts the voltage of an input power supply into a desired output voltage by turning on and off a semiconductor switching element.
The deviation between the value fed back the output voltage of the DCDC converter and the output voltage target value of the DCDC converter is taken, and the PI control calculation is performed by multiplying the deviation by the proportional gain and the integrated gain, and the output value of the PI control calculation is performed. The first duty value calculation unit that calculates the error duty value based on
A second duty value that determines the ratio of the on / off period of the semiconductor switching element is calculated by adding the basic duty value calculated from the ratio of the input power supply voltage of the DCDC converter and the output voltage target value to the error duty value. With a duty value calculation unit
A control device for a DCDC converter, characterized in that a duty ratio of a gate signal of the semiconductor switching element is determined based on a duty value calculated by the second duty value calculation unit. When the output voltage of the DCDC converter is less than the first set voltage set to be smaller than the output voltage target value after the set time has elapsed since the DCDC converter was started, the proportion of the first duty value calculation unit is obtained. When the gain and integrated gain are increased and the output voltage of the DCDC converter becomes equal to or higher than the second set voltage set larger than the output voltage target value, the duty value calculated by the second duty value calculation unit The DCDC converter control device according to claim 1, further comprising a parameter value changing unit having a value of 0%. The set time after the start of the DCDC converter increases proportionally to the duty value calculated by the second duty value calculation unit, and the limit processing unit applies limit processing by a limit coefficient that becomes a fixed value after the lapse of the set time. The DCDC converter control device according to claim 1 or 2, wherein the DCDC converter is provided. The control device for a DCDC converter according to any one of claims 1 to 3, wherein the DCDC converter includes a plurality of output circuits having a common input power source. A DCDC converter control method that converts the voltage of an input power supply into a desired output voltage by turning on and off a semiconductor switching element.
The deviation between the value fed back the output voltage of the DCDC converter and the output voltage target value of the DCDC converter is taken, and the PI control calculation is performed by multiplying the deviation by the proportional gain and the integrated gain, and the output value of the PI control calculation is performed. The first duty value calculation step for calculating the error duty value based on
A second duty value that determines the ratio of the on / off period of the semiconductor switching element is calculated by adding the basic duty value calculated from the ratio of the input power supply voltage of the DCDC converter and the output voltage target value to the error duty value. Duty value calculation step and
A control method for a DCDC converter, comprising: a step of determining a duty ratio of a gate signal of the semiconductor switching element based on a duty value calculated by the second duty value calculation step.

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