JP2020200222A - Semiconductor substrate, and manufacturing method thereof - Google Patents

Abstract

To suppress warping in manufacturing a semiconductor substrate by a chemical vapor deposition process.SOLUTION: A manufacturing method of a semiconductor substrate by a chemical vapor deposition process includes following steps. A group III nitride semiconductor is subjected to crystal growth on a base substrate 10 to form a low temperature buffer layer 11. Another group III nitride semiconductor is subjected to crystal growth on the low temperature buffer layer 11 at a crystal growth temperature higher than the crystal growth temperature in formation of the low temperature buffer layer 11, to form an intermediate semiconductor layer 12. Another group III nitride semiconductor is subjected to crystal growth on the intermediate semiconductor layer 12 at a crystal growth temperature higher than the crystal growth temperature in formation of the intermediate semiconductor layer 12, to form a main semiconductor layer 13.SELECTED DRAWING: Figure 3

Description

The present invention relates to a semiconductor substrate and a method for manufacturing the same.

High-quality GaN substrates are required to obtain highly efficient light-emitting devices and power devices. As a method for manufacturing such a GaN substrate, in Non-Patent Document 1, a TiC buffer layer is provided on a sapphire substrate, a GaN layer is crystallized on the TiC buffer layer, and the GaN layer is separated from the sapphire substrate to form a GaN substrate. Is disclosed to manufacture.

Journal of Crystal Growth 350 (2012) 44-49 Huiyuan Geng, Haruo Sunakawa, Norihiko Sumi, Kazutomi Yamamoto, A. Atsushi Yamaguchi, Akira Usui Growth and strain characterization of high quality GaN crystal by HVPE

Demand for GaN substrates is expected to increase in the future, but due to their low cost, there are high expectations for the production of GaN substrates by the chemical vapor deposition method. However, in the case of the chemical vapor deposition method, since a large warp occurs in the GaN substrate to be manufactured, there is a problem that it is not possible to increase the diameter due to the limitation of the requirement for quality uniformity in the substrate surface.

An object of the present invention is to suppress the occurrence of warpage when manufacturing a semiconductor substrate by the chemical vapor deposition method.

The present invention is a method for manufacturing a semiconductor substrate by a chemical vapor phase growth method, in which a semiconductor is crystal-grown on a base substrate to form a low temperature buffer layer, and the low temperature buffer layer is formed on the low temperature buffer layer. A semiconductor is grown at a crystal growth temperature higher than the crystal growth temperature at the time to form an intermediate semiconductor layer, and a crystal growth temperature higher than the crystal growth temperature when the intermediate semiconductor layer is formed on the intermediate semiconductor layer. The semiconductor is crystal-grown to form the main semiconductor layer.

In the present invention, a base substrate, a low temperature buffer layer formed by crystal growth of a group III nitride semiconductor on the base substrate, and a group III nitride semiconductor formed by crystal growth on the low temperature buffer layer are formed. A semiconductor substrate comprising an intermediate semiconductor layer and a main semiconductor layer formed by crystal growth of a group III nitride semiconductor on the intermediate semiconductor layer, and the intermediate semiconductor layer includes a semiconductor superlattice.

According to the present invention, when a semiconductor substrate is manufactured by the chemical vapor deposition method, an intermediate semiconductor layer is provided between the low temperature buffer layer and the main semiconductor layer, and the crystal growth temperature when the intermediate semiconductor layer is formed is determined. By setting the temperature higher than the crystal growth temperature when forming the low temperature buffer layer and lower than the crystal growth temperature when forming the main semiconductor layer, the occurrence of warpage can be suppressed.

It is 1st explanatory drawing which shows the low temperature buffer layer formation step in the manufacturing method of the semiconductor substrate which concerns on embodiment. It is a 2nd explanatory drawing which shows the low temperature buffer layer formation step in the manufacturing method of the semiconductor substrate which concerns on embodiment. It is 1st explanatory drawing which shows the intermediate semiconductor layer formation step in the manufacturing method of the semiconductor substrate which concerns on embodiment. It is a 2nd explanatory drawing which shows the intermediate semiconductor layer formation step in the manufacturing method of the semiconductor substrate which concerns on embodiment. It is explanatory drawing which shows the main semiconductor layer formation step in the manufacturing method of the semiconductor substrate which concerns on embodiment. It is a timing chart in manufacturing of the semiconductor substrate of Example 1. It is a timing chart in manufacturing of the semiconductor substrate of Example 2. It is a timing chart in manufacturing of the semiconductor substrate of Examples 3-5. It is a graph which shows the relationship between the mole fraction of In in the group III element in InGaN, and the radius of curvature of the substrate surface of a semiconductor substrate. It is a graph which shows the relationship between the stacking number of the laminated body of the 1st layer of InGaN and the 2nd layer of GaN, and the radius of curvature of the substrate surface of a semiconductor substrate.

Hereinafter, embodiments will be described in detail.

In the method for manufacturing a semiconductor substrate according to the embodiment, the semiconductor substrate is manufactured by a chemical vapor deposition method (CVD). Examples of the chemical vapor deposition method (CVD) include an organic metal vapor deposition method (MOVPE) and a hydride vapor phase deposition method (HVPE).

The method for manufacturing a semiconductor substrate according to the embodiment includes a low temperature buffer layer forming step, an intermediate semiconductor layer forming step, and a main semiconductor layer forming step.

<Low temperature buffer layer formation step>
In the low temperature buffer layer forming step, as shown in FIG. 1A, after setting the base substrate 10 on the stage S in the reaction chamber C, the group III element source gas and the N source gas are supplied into the reaction chamber C together with the carrier gas. As shown in FIG. 1B, a group III nitride semiconductor is epitaxially crystal-grown on the base substrate 10 to form the low temperature buffer layer 11.

Examples of the base substrate 10 include a sapphire substrate, a ZnO substrate, a SiC substrate, and the like. The main surface of the base substrate 10 may be any of a-plane, c-plane, m-plane, and r-plane, and may be a crystal plane having another plane orientation, but a high-quality semiconductor substrate can be used. From the viewpoint of manufacturing, the c-plane is preferable. Here, the "main surface" means a surface perpendicular to the direction of semiconductor stacking growth, and is usually the widest surface on the substrate surface.

Examples of the group III nitride semiconductor forming the low temperature buffer layer 11 include group III nitride semiconductors such as binary compounds GaN, InN and AlN; ternary compounds AlGaN and InGaN; and quaternary compounds AlGaInN. .. The group III nitride semiconductor forming the low temperature buffer layer 11 is preferably the same as the group III nitride semiconductor forming the main semiconductor layer 13 described later.

Examples of the group III element source gas include TMG gas, TEG gas, TMI gas, TEI gas, TMA gas, and TEA gas in the metalorganic vapor phase growth method (MOVPE), and the hydride gas phase growth method (HVPE). ), For example, GaCl gas, GaCl ₃ gas, InCl gas, InCl ₃ gas, AlCl gas, AlCl ₃ gas and the like can be mentioned. Examples of the N source gas include NH ₃ gas, N ₂ H ₄ gas and the like. Examples of the carrier gas include N ₂ gas and H ₂ gas. Carrier gas, it is preferable to use one or both of these, it is more preferable to use H ₂ gas. The V / III ratio, which is the ratio of the number of moles of N atoms supplied by the nitrogen source gas to the number of moles of Group III atoms supplied by the Group III element source gas, is generally, for example, 1000 or more and 30,000 or less, and in particular, crystal growth of InGaN In the case of making it, for example, it is 10,000 or more and 30,000 or less.

The crystal growth temperature when the low temperature buffer layer 11 is formed is, for example, 400 ° C. or higher and 600 ° C. or lower. The thickness of the low temperature buffer layer 11 is, for example, 10 nm or more and 50 nm or less.

It is preferable to thermally clean the substrate surface of the base substrate 10 before forming the low temperature buffer layer 11.

<Intermediate semiconductor layer formation step>
In the intermediate semiconductor layer forming step, the conditions are changed from the low temperature buffer layer forming step, and as shown in FIG. 2A, the crystal growth temperature is higher than the crystal growth temperature when the low temperature buffer layer 11 is formed on the low temperature buffer layer 11. The group III nitride semiconductor is epitaxially crystal-grown to form the intermediate semiconductor layer 12.

As the group III nitride semiconductor forming the intermediate semiconductor layer 12, as in the low temperature buffer layer 11, for example, GaN, InN, AlN of the binary compound; AlGaN, InGaN of the ternary compound; AlGaInN of the quaternary compound, etc. III Examples include group nitride semiconductors. Examples of the group III element source gas, the N source gas, and the carrier gas are the same as in the case of forming the low temperature buffer layer 11. As the carrier gas, it is preferable to use one or both of N ₂ gas and H ₂ gas, and it is more preferable to use N ₂ gas.

The V / III ratio, which is the ratio of the number of moles of N atoms supplied by the nitrogen source gas to the number of moles of Group III atoms supplied by the Group III element source gas, is, for example, 5000 or more and 40,000 or less. The flow rate of the Group III element source gas is preferably smaller than the flow rate in the low temperature buffer layer forming step. The flow rate of the nitrogen source gas is preferably higher than the flow rate in the low temperature buffer layer forming step.

The intermediate semiconductor layer 12 may be composed of a single type III nitride semiconductor, but from the viewpoint of suppressing the occurrence of warpage of the semiconductor substrate to be manufactured, which will be described later, a laminate of a plurality of types of group III nitride semiconductors. It is preferable to include the semiconductor superlattice of.

From the viewpoint of suppressing the occurrence of warpage of the semiconductor substrate to be manufactured, the semiconductor super lattice is reduced from the first layer 121 of the group III nitride semiconductor of the ternary compound and one group III element from it, as shown in FIG. 2B. It is preferable to have an alternating laminated structure with the second layer 122 of the group III nitride semiconductor of the obtained binary compound. Specifically, examples of the intermediate semiconductor layer 12 of the semiconductor superlattice include an alternating laminated structure of InGaN and GaN. Further, in this case, the group III nitride semiconductor of the binary compound or the ternary compound is preferably the same as the group III nitride semiconductor forming the main semiconductor layer 13 described later from the same viewpoint, and is preferably the binary compound. It is more preferable that the group III nitride semiconductor of No. III is the same as the group III nitride semiconductor forming the main semiconductor layer 13.

From the viewpoint of suppressing the occurrence of warpage of the semiconductor substrate to be manufactured, the semiconductor super lattice is a stack of the first layer 121 of the group III nitride semiconductor of the ternary compound and the second layer 122 of the group III nitride semiconductor of the binary compound. With the body as one unit, the number of layers is preferably 2 or more, more preferably 5 or more, still more preferably 10 or more, and on the other hand, preferably 25 or less from the viewpoint of maintaining high crystal quality.

The mole fraction of one of the above group III elements in the group III element in the group III nitride semiconductor of the ternary compound is preferably 2.0% or more from the viewpoint of suppressing the occurrence of warpage of the semiconductor substrate to be manufactured. It is preferably 10.0% or more, more preferably 20.0% or more, and on the other hand, preferably 25.0% or less from the viewpoint of maintaining high crystal quality.

The crystal growth temperature when the intermediate semiconductor layer 12 is formed is higher than the crystal growth temperature when the low temperature buffer layer 11 is formed, and from the viewpoint of suppressing the occurrence of warpage of the semiconductor substrate to be manufactured, it is preferably 500 ° C. or higher and 1000. ° C. or lower, more preferably 600 ° C. or higher and 900 ° C. or lower, still more preferably 650 ° C. or higher and 850 ° C. or lower. From the same viewpoint, the temperature difference between the crystal growth temperature when the intermediate semiconductor layer 12 is formed and the crystal growth temperature when the low temperature buffer layer 11 is formed is preferably 100 ° C. or higher and 500 ° C. or lower, more preferably 150. ° C. or higher and 450 ° C. or lower, more preferably 200 ° C. or higher and 400 ° C. or lower.

When the intermediate semiconductor layer 12 includes a semiconductor superlattice, the crystal growth temperatures of the plurality of types of group III nitride semiconductors may be the same, and the crystal growth temperatures of the plurality of types of group III nitride semiconductors are different for each type. It may be different. The mole fraction of the group III element in the group III nitride semiconductor can be controlled by this crystal growth temperature.

The thickness of the intermediate semiconductor layer 12 is, for example, 5 nm or more and 50 nm or less. When the intermediate semiconductor layer 12 includes a semiconductor superlattice, the thickness of each group III nitride semiconductor is, for example, 1 nm or more and 10 nm or less.

<Main semiconductor layer formation step>
In the main semiconductor layer forming step, the conditions are changed from the intermediate semiconductor layer forming step, and as shown in FIG. 3, the crystal growth temperature is higher than the crystal growth temperature when the intermediate semiconductor layer 12 is formed on the intermediate semiconductor layer 12. The semiconductor is epitaxially crystal-grown to form the main semiconductor layer 13.

The group III nitride semiconductor forming the main semiconductor layer 13 is the same as the low temperature buffer layer 11 and the intermediate semiconductor layer 12, for example, binary compounds GaN, InN, AlN; ternary compounds AlGaN, InGaN; quaternary compounds. Group III nitride semiconductors such as AlGaInN of the above. Examples of the group III element source gas, the N source gas, and the carrier gas are the same as in the case of forming the low temperature buffer layer 11 and the intermediate semiconductor layer 12. As the carrier gas, it is preferable to use one or both of N ₂ gas and H ₂ gas, and it is more preferable to use H ₂ gas.

The V / III ratio, which is the ratio of the number of moles of N atoms supplied by the nitrogen source gas to the number of moles of Group III atoms supplied by the Group III element source gas, is, for example, 1000 or more and 5000 or less. The flow rate of the group III element source gas is preferably higher than the flow rate in the low temperature buffer layer forming step and the intermediate semiconductor layer forming step.

The crystal growth temperature when the main semiconductor layer 13 is formed is higher than the crystal growth temperature when the intermediate semiconductor layer 12 is formed, for example, 900 ° C. or higher and 1400 ° C. or lower. The temperature difference between the crystal growth temperature when the main semiconductor layer 13 is formed and the crystal growth temperature when the intermediate semiconductor layer 12 is formed is preferably 200 ° C. or higher and 600 ° C. or lower, more preferably 300 ° C. or higher and 500 ° C. or lower. Is. The thickness of the main semiconductor layer 13 is, for example, 1 μm or more and 10 μm or less.

The semiconductor substrate manufactured in the present embodiment includes a base substrate 10, a low temperature buffer layer 11 formed by crystal growth of a group III nitride semiconductor on the base substrate 10, and a group III on the low temperature buffer layer 11. An intermediate semiconductor layer 12 formed by crystal growth of a nitride semiconductor and a main semiconductor layer 13 formed by crystal growth of a group III nitride semiconductor on the intermediate semiconductor layer 12 are provided. The intermediate semiconductor layer 12 may include a semiconductor superlattice of a laminate of a plurality of types of group III nitride semiconductors. Further, the main semiconductor layer 13 may be separated from the base substrate 10 to form a self-supporting substrate. From the viewpoint of spontaneously separating the main semiconductor layer 13 from the base substrate 10, the intermediate semiconductor layer 12 is reduced from the first layer 121 of the group III nitride semiconductor of the ternary compound and one of the group III elements. It has an alternating laminated structure with the second layer 122 of the group III nitride semiconductor of the binary compound, and the number of laminates is one unit of the laminated body of the ternary compound and the group III nitride semiconductor of the binary compound. It is preferably 15 or more. From the same viewpoint, it is preferable that the mole fraction of another group III element in the group III element in the group III nitride semiconductor of the ternary compound is 15.0% or more.

According to the semiconductor substrate manufacturing method according to the above embodiment, when the semiconductor substrate is manufactured by the chemical vapor deposition method, an intermediate semiconductor layer 12 is provided between the low temperature buffer layer 11 and the main semiconductor layer 13, and the intermediate semiconductor layer 12 is provided. Warpage by lowering the crystal growth temperature when forming the intermediate semiconductor layer 12 to be higher than the crystal growth temperature when forming the low temperature buffer layer 11 and lower than the crystal growth temperature when forming the main semiconductor layer 13. Can be suppressed. Therefore, this makes it possible to increase the diameter of the semiconductor substrate manufactured by the chemical vapor deposition method.

An experiment for producing a semiconductor substrate by the metalorganic vapor phase growth method (MOVPE) will be described.

(Semiconductor substrate)
The following semiconductor substrates of Examples 1 to 5 were manufactured.

<Example 1>
FIG. 4A shows a timing chart for manufacturing the semiconductor substrate of Example 1.

First, a sapphire substrate whose main surface is c-plane is set on the stage of the reaction chamber of the MOVPE apparatus, and (i) NH ₃ gas is started to flow in the reaction chamber together with the carrier gas H ₂ gas at a flow rate of 5 slm, and the pressure is 100 kPa. Below, the temperature of the sapphire substrate was raised from room temperature to 1150 ° C., the temperature was maintained for a certain period of time for thermal cleaning, and then the temperature was lowered to 460 ° C.

(Ii) When the temperature of the sapphire substrate reaches 460 ° C., TMG gas is started to flow at a flow rate of 5 sccm, TMG gas is flowed for 308.8 seconds, GaN is crystal-grown on the sapphire substrate, and a low temperature buffer layer of GaN is formed. Formed. At this time, the NH ₃ V / III ratio is the ratio of the supply mol number of N atoms by gas to supply the number of moles of Ga atoms due TMG gas was 17654. After stopping the TMG gas, the temperature of the sapphire substrate was raised to 800 ° C., and in the process, the carrier gas was switched from H ₂ gas to N ₂ gas.

(Iii) when the temperature of the sapphire substrate became 800 ° C., while changing the flow rate of NH ₃ gas to 6.5Slm, it begins to conduct TMG gas at a flow rate of 3.9Sccm, flushed with 131 seconds TMG gas, low-temperature buffer GaN was crystallized on the layer to form an intermediate semiconductor layer of a single GaN layer. At this time, the NH ₃ V / III ratio is the ratio of the supply mol number of N atoms by gas to supply the number of moles of Ga atoms due TMG gas was 28650. After stopping the TMG gas, the temperature of the sapphire substrate was raised to 1150 ° C., and in the process, the carrier gas was switched from N ₂ gas to H ₂ gas.

(Iv) When the temperature of the sapphire substrate becomes 1150 ° C., while changing the flow rate of NH ₃ gas to 5 slm, begins to conduct TMG gas 34.8Sccm, flushed with 60 minutes TMG gas, GaN in the intermediate semiconductor layer Was crystal-grown to form the main semiconductor layer of GaN. At this time, the NH ₃ V / III ratio is the ratio of the supply mol number of N atoms by gas to supply the number of moles of Ga atoms due to the TMG gas and 2536. After stopping the TMG gas, the temperature of the sapphire substrate was lowered to room temperature, and in the process, the carrier gas was switched from H ₂ gas to N ₂ gas.

As described above, the semiconductor substrate of Example 1 in which the intermediate semiconductor layer was composed of a single layer of GaN was obtained.

<Example 2>
FIG. 4B shows a timing chart in the fabrication of the semiconductor substrate of the second embodiment.

In the same method as the experimental method of Example 1, a sapphire substrate having a c-plane main surface was set on the stage of the reaction chamber of the MOVPE apparatus, (i) thermal cleaning, (ii) formation of a low-temperature buffer layer, and (ii). iii) A GaN layer was formed.

(Iv) In addition to flowing TMG gas at a flow rate of 3.9 sccm, start flowing TMI gas at a flow rate of 400 sccm, flow TMG gas and TMI gas for 126 seconds, and crystallize InGaN on the GaN layer to grow InGaN. The first layer was formed. At this time, the NH ₃ V / III ratio is the ratio of the supply mol number of N atoms by gas to supply the number of moles of In atoms by Ga atoms and TMI gas by the TMG gas and 6594.

(V) The TMI gas was stopped, the TMG gas was allowed to flow at a flow rate of 3.9 sccm for 131 seconds, and GaN was crystal-grown on the first layer of InGaN to form the second layer of GaN. At this time, the NH ₃ V / III ratio is the ratio of the supply mol number of N atoms by gas to supply the number of moles of Ga atoms due TMG gas was 28650.

(Vi) The operations of (iv) and (v) are repeated 9 more times, and the laminated body of the first layer of InGaN and the second layer of GaN is used as one unit, and the intermediate including the semiconductor superlattice having 10 layers. A semiconductor layer was formed. After stopping the TMG gas, the temperature of the sapphire substrate was raised to 1150 ° C., and in the process, the carrier gas was switched from N ₂ gas to H ₂ gas.

Then, GaN was crystal-grown on the (vii) intermediate semiconductor layer to form a GaN main semiconductor layer by the same method as the experimental method (iv) of Example 1.

As described above, in the second embodiment, the intermediate semiconductor layer includes the GaN layer (iii) and the semiconductor superlattice in which the number of layers of the first layer of InGaN and the second layer of GaN is 5. A semiconductor substrate was obtained. The mole fraction of In in the group III element in InGaN of the first layer of the intermediate semiconductor layer was 4.0%.

<Example 3>
FIG. 4C shows a timing chart in the fabrication of the semiconductor substrate of Example 3.

In the same method as the experimental method of Example 1, a sapphire substrate having a c-plane main surface was set on the stage of the reaction chamber of the MOVPE apparatus, (i) thermal cleaning, (ii) formation of a low-temperature buffer layer, (iii). ) A GaN layer was formed. After that, the temperature of the sapphire substrate was lowered to 700 ° C.

(Iv) When the temperature of the sapphire substrate reaches 700 ° C., in addition to flowing TMG gas at a flow rate of 3.9 sccm, start flowing TMI gas at a flow rate of 400 sccm, and flow TMG gas and TMI gas for 202 seconds. InGaN was crystallized on the GaN layer to form the first layer of InGaN. At this time, the NH ₃ V / III ratio is the ratio of the supply mol number of N atoms by gas to supply the number of moles of In atoms by Ga atoms and TMI gas by the TMG gas and 6594. After stopping the TMI gas, the temperature of the sapphire substrate was raised to 800 ° C.

(V) After the temperature of the sapphire substrate reached 800 ° C., TMG gas was flowed at a flow rate of 3.9 sccm for 131 seconds, and GaN was crystal-grown on the first layer of InGaN to form the second layer of GaN. At this time, the NH ₃ V / III ratio is the ratio of the supply mol number of N atoms by gas to supply the number of moles of Ga atoms due TMG gas was 28650. After that, the temperature of the sapphire substrate was lowered to 700 ° C.

(Vi) The operations of (iv) and (v) are repeated 9 more times, and the laminated body of the first layer of InGaN and the second layer of GaN is used as one unit, and the intermediate including the semiconductor superlattice having 10 layers. A semiconductor layer was formed. After stopping the TMG gas, the temperature of the sapphire substrate was raised to 1150 ° C., and in the process, the carrier gas was switched from N ₂ gas to H ₂ gas.

Then, GaN was crystal-grown on the (vii) intermediate semiconductor layer to form the main semiconductor layer of GaN by the same method as the experimental method of Example 1.

As described above, in the third embodiment, the intermediate semiconductor layer includes the GaN layer (iii) and the semiconductor superlattice in which the number of layers of the first layer of InGaN and the second layer of GaN is 5. A semiconductor substrate was obtained. The mole fraction of In in the group III element in InGaN of the first layer of the intermediate semiconductor layer was 23.4%.

<Example 4>
In the operations (iv) to (vi) of Example 3, an intermediate semiconductor layer including a semiconductor superlattice having 5 layers is formed by using the laminate of the first layer of InGaN and the second layer of GaN as one unit. A semiconductor substrate having the same configuration as that produced in Example 3 was produced except that it was formed, and it was designated as Example 4.

<Example 5>
In the operations (iv) to (vi) of the third embodiment, the intermediate semiconductor layer including the semiconductor superlattice having 20 layers is formed by using the laminated body of the first layer of InGaN and the second layer of GaN as one unit. A semiconductor substrate having the same configuration as that produced in Example 3 was produced except that it was formed, and it was designated as Example 5. In the semiconductor substrate of Example 5, the GaN of the main semiconductor layer was spontaneously separated.

(Radius of curvature of the substrate surface of the semiconductor substrate)
The radius of curvature of the substrate surface was measured for each of Examples 1 to 4. FIG. 5 shows the relationship between the mole fraction of In in the group III element in InGaN of the first layer and the radius of curvature of the substrate surface of the semiconductor substrate based on Examples 1 to 3. FIG. 6 shows the relationship between the number of laminated layers of the first layer of InGaN and the second layer of GaN and the radius of curvature of the surface of the semiconductor substrate based on Examples 1, 2, and 4. In Example 1, since the intermediate semiconductor layer does not include the semiconductor superlattice, the molar fraction of In is 0%, and the number of laminated layers is 0.

According to FIG. 5, it can be seen that when the mole fraction of In in the Group III element in InGaN of the first layer is high, the radius of curvature of the substrate surface is large, and therefore the occurrence of warpage is suppressed. According to FIG. 6, it can be seen that even if the number of layers of the first layer of InGaN and the second layer of GaN increases, the radius of curvature of the substrate surface increases, and therefore the occurrence of warpage is suppressed. .. Further, it can be seen that when the number of laminated bodies of the first layer of InGaN and the second layer of GaN increases, the spontaneous separation of GaN in the main semiconductor layer is promoted.

The present invention is useful in the technical field of semiconductor substrates and methods for manufacturing them.

10 Base substrate 11 Low temperature buffer layer 12 Intermediate semiconductor layer 121 First layer 122 Second layer 13 Main semiconductor layer C Reaction chamber S stage

Claims (7)

A method for manufacturing a semiconductor substrate by the chemical vapor deposition method.
A group III nitride semiconductor is crystal-grown on the base substrate to form a low temperature buffer layer.
A group III nitride semiconductor is crystal-grown on the low-temperature buffer layer at a crystal growth temperature higher than the crystal growth temperature when the low-temperature buffer layer is formed to form an intermediate semiconductor layer.
A method for manufacturing a semiconductor substrate, in which a group III nitride semiconductor is crystal-grown at a crystal growth temperature higher than the crystal growth temperature at which the intermediate semiconductor layer is formed to form a main semiconductor layer on the intermediate semiconductor layer. In the method for manufacturing a semiconductor substrate according to claim 1,
A method for manufacturing a semiconductor substrate in which the intermediate semiconductor layer includes a semiconductor superlattice. In the method for manufacturing a semiconductor substrate according to claim 2,
A method for producing a semiconductor substrate, wherein the semiconductor superlattice has an alternating laminated structure of a group III nitride semiconductor of a ternary compound and a group III nitride semiconductor of a binary compound in which one group III element is subtracted from the semiconductor. In the method for manufacturing a semiconductor substrate according to claim 3,
A method for producing a semiconductor substrate in which the number of laminated layers of the group III nitride semiconductor of the ternary compound and the group III nitride semiconductor of the binary compound is 2 or more. In the method for manufacturing a semiconductor substrate according to claim 3 or 4.
A method for producing a semiconductor substrate in which the mole fraction of one of the group III elements in the group III element in the group III nitride semiconductor of the ternary compound is 2.0% or more. In the method for manufacturing a semiconductor substrate according to any one of claims 3 to 5.
A method for producing a semiconductor substrate in which the group III nitride semiconductor of the ternary compound is InGaN and the group III nitride semiconductor of the binary compound is GaN. With the base board
A low-temperature buffer layer formed by crystal growth of a group III nitride semiconductor on the base substrate,
An intermediate semiconductor layer formed by crystal growth of a group III nitride semiconductor on the low temperature buffer layer,
A main semiconductor layer formed by crystal growth of a group III nitride semiconductor on the intermediate semiconductor layer,
With
A semiconductor substrate in which the intermediate semiconductor layer includes a semiconductor superlattice.

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