JP2020198402A

JP2020198402A - Wiring board and manufacturing method thereof

Info

Publication number: JP2020198402A
Application number: JP2019105033A
Authority: JP
Inventors: 康行柳瀬; Yasuyuki Yanase; 昌弘梶谷; Masahiro Kajitani
Original assignee: NGK Spark Plug Co Ltd
Current assignee: Niterra Co Ltd
Priority date: 2019-06-05
Filing date: 2019-06-05
Publication date: 2020-12-10
Anticipated expiration: 2039-06-05
Also published as: JP7181839B2

Abstract

To provide a technique for suppressing corrosion of a conductive layer in a wiring board having a plurality of conductive layers made of different materials for forming the conductive layer.SOLUTION: A wiring board includes a base material, a first conductive layer made of a first conductive material, and laminated on the base material, a second conductive layer that is made of a second conductive material different from the first conductive material, includes a first portion covering at least a part of the surface of the first conductive layer, a second part covering at least a part of the side surface of the first conductive layer, and a third part covering at least a part of the surface of the base material, and in which the first portion and the third portion are each connected to the second portion, and in the second conductive layer, the thickness of the third portion is thicker than the thickness of the first portion.SELECTED DRAWING: Figure 1

Description

本発明は、配線基板に関する。 The present invention relates to a wiring board.

従来、基材の上に、導電層を形成する材料が異なる複数の導電層を有する配線基板が提案されている（例えば、特許文献１参照）。 Conventionally, a wiring board having a plurality of conductive layers having different materials for forming a conductive layer on a base material has been proposed (see, for example, Patent Document 1).

特開平２００３−１２４５９０号公報Japanese Unexamined Patent Publication No. 2003-124590

特許文献１において、第２のメタル層の表面の粗さと第１のメタル層の表面の粗さが異なる場合に、第１のメタル層の上に形成される第３のメタル層と、第２のメタル層の上に形成される第３のメタル層とで結晶品質に差が出る可能性がある。そのような配線基板が海水等の塩水雰囲気下に置かれた場合に、結晶品質が低い部分では、そこを起点に孔食(腐食)が発生する虞がある。 In Patent Document 1, when the surface roughness of the second metal layer and the surface roughness of the first metal layer are different, a third metal layer formed on the first metal layer and a second metal layer are formed. There is a possibility that the crystal quality will be different from that of the third metal layer formed on the metal layer of. When such a wiring board is placed in a salt water atmosphere such as seawater, pitting corrosion (corrosion) may occur from the portion where the crystal quality is low.

本発明は、上述した課題の少なくとも一部を解決するためになされたものであり、導電層を形成する材料が異なる複数の導電層を有する配線基板において、導電層の腐食を抑制する技術を提供することを目的とする。 The present invention has been made to solve at least a part of the above-mentioned problems, and provides a technique for suppressing corrosion of a conductive layer in a wiring board having a plurality of conductive layers made of different materials for forming the conductive layer. The purpose is to do.

本発明は、上述の課題の少なくとも一部を解決するためになされたものであり、以下の形態として実現することが可能である。 The present invention has been made to solve at least a part of the above-mentioned problems, and can be realized as the following forms.

（１）本発明の一形態によれば、配線基板が提供される。この配線基板は、基材と、第１導電性材料から成る第１導電層であって、前記基材の上に積層される第１導電層と、前記第１導電性材料と異なる第２導電性材料から成る第２導電層であって、前記第１導電層の表面の少なくとも一部を覆う第１部分と、前記第１導電層の側面の少なくとも一部を覆う第２部分と、前記基材の表面の少なくとも一部を覆う第３部分と、を備え、前記第１部分と前記第３部分はそれぞれ前記第２部分と連接されている第２導電層と、を備え、前記第２導電層において、前記第３部分の厚みは、前記第１部分の厚みより厚い。 (1) According to one embodiment of the present invention, a wiring board is provided. This wiring substrate is a first conductive layer made of a base material and a first conductive material, and the first conductive layer laminated on the base material and a second conductive layer different from the first conductive material. A second conductive layer made of a sexual material, the first portion covering at least a part of the surface of the first conductive layer, the second part covering at least a part of the side surface of the first conductive layer, and the group. A third portion that covers at least a part of the surface of the material is provided, and the first portion and the third portion each include a second conductive layer that is connected to the second portion, and the second conductive portion. In the layer, the thickness of the third portion is thicker than the thickness of the first portion.

第１導電層が基材の表面に形成されると、基材の表面の粗さが均され、第１導電層の表面粗さは、基材の表面粗さより小さくなる。換言すると、第１導電層の表面は、基材の表面より滑らかである。この構成によれば、第２導電層において、表面粗さが大きい基材の表面の少なくとも一部を覆う第３部分の厚みを、第１導電層の少なくとも一部を覆う第１部分の厚みより厚くしている。層の厚みを大きくすると、下の層の表面粗さを均すことができるため、第２導電層の第３部分の表面粗さを小さくすることができる。その結果、第２導電層の上に導電層が形成される場合に、その導電層の膜質を向上させることができ、その結果、腐食を抑制することができる。また、第２導電層の第１部分の厚みを第３部分より小さくすることにより、ボンディング性の低下を抑制し、信頼性の低下を抑制することができる。 When the first conductive layer is formed on the surface of the base material, the surface roughness of the base material is smoothed, and the surface roughness of the first conductive layer becomes smaller than the surface roughness of the base material. In other words, the surface of the first conductive layer is smoother than the surface of the base material. According to this configuration, in the second conductive layer, the thickness of the third portion covering at least a part of the surface of the base material having a large surface roughness is larger than the thickness of the first portion covering at least a part of the first conductive layer. It is thickened. By increasing the thickness of the layer, the surface roughness of the lower layer can be equalized, so that the surface roughness of the third portion of the second conductive layer can be reduced. As a result, when the conductive layer is formed on the second conductive layer, the film quality of the conductive layer can be improved, and as a result, corrosion can be suppressed. Further, by making the thickness of the first portion of the second conductive layer smaller than that of the third portion, it is possible to suppress a decrease in bondability and suppress a decrease in reliability.

（２）上記形態の配線基板であって、さらに、前記第１導電性材料および第２導電性材料と異なる第３導電性材料で形成される第３導電層であって、前記第２導電層の上に略均一な厚みで形成される第３導電層を備えてもよい。このようにすると、第３導電層の腐食を抑制することができる。 (2) The wiring board of the above-described form, and further, a third conductive layer formed of a third conductive material different from the first conductive material and the second conductive material, and the second conductive layer. A third conductive layer formed on the top thereof having a substantially uniform thickness may be provided. In this way, corrosion of the third conductive layer can be suppressed.

（３）上記形態の配線基板であって、前記基材は、セラミックで形成されてもよい。このようにすると、低熱膨張特性と製造プロセス性（ビア形成、多層化プロセス）を向上させることができる。 (3) The wiring board of the above-mentioned form, the base material may be made of ceramic. In this way, low thermal expansion characteristics and manufacturing processability (via formation, multi-layer process) can be improved.

（４）本発明の他の形態によれば、配線基板の製造方法が提供される。この配線基板の製造方法は、基材を準備する準備工程と、前記基材の上に、第１導電性材料から成る第１導電層を形成する第１導電層形成工程と、前記第１導電性材料と異なる第２導電性材料から成る第２導電層であって、前記第１導電層の表面の少なくとも一部を覆う第１部分と、前記第１導電層の側面の少なくとも一部を覆う第２部分と、前記基材の表面の少なくとも一部を覆う第３部分と、を備え、前記第１部分と前記第３部分がそれぞれ前記第２部分と連接されるとともに、前記第３部分の厚みが前記第１部分の厚みより厚い第２導電層を形成する第２導電層形成工程と、を備える。この製造方法によれば、容易に、上記の配線基板を製造することができる。 (4) According to another embodiment of the present invention, a method for manufacturing a wiring board is provided. The method for manufacturing this wiring substrate includes a preparatory step for preparing a base material, a first conductive layer forming step for forming a first conductive layer made of a first conductive material on the base material, and the first conductive layer. A second conductive layer made of a second conductive material different from the conductive material, which covers at least a part of the surface of the first conductive layer and at least a part of the side surface of the first conductive layer. A second portion and a third portion that covers at least a part of the surface of the base material are provided, and the first portion and the third portion are respectively connected to the second portion and of the third portion. The present invention includes a second conductive layer forming step of forming a second conductive layer having a thickness thicker than that of the first portion. According to this manufacturing method, the above wiring board can be easily manufactured.

（５）本発明の他の形態によれば、配線基板の製造方法が提供される。この配線基板の製造方法は、基材を準備する準備工程と、前記基材の上に、第２導電性材料から成る略均一な厚さの第１薄膜を形成する第１薄膜形成工程と、前記第１薄膜の上に、前記第１薄膜の一部が露出した状態で、前記第２導電性材料と異なる第１導電性材料から成る第１導電層を形成する第１導電層形成工程と、前記第１導電層の表面の少なくとも一部と、前記第１導電層の側面の少なくとも一部と、露出している前記第１薄膜の表面と、を連続して覆う、前記第２導電性材料から成る略均一な厚さの第２薄膜を形成する第２薄膜形成工程と、を備える。この製造方法によっても、容易に、上記の配線基板を製造することができる。 (5) According to another embodiment of the present invention, a method for manufacturing a wiring board is provided. The method for manufacturing this wiring substrate includes a preparatory step of preparing a base material, a first thin film forming step of forming a first thin film having a substantially uniform thickness made of a second conductive material on the base material. A first conductive layer forming step of forming a first conductive layer made of a first conductive material different from the second conductive material in a state where a part of the first thin film is exposed on the first thin film. , The second conductive layer that continuously covers at least a part of the surface of the first conductive layer, at least a part of the side surface of the first conductive layer, and the exposed surface of the first thin film. It includes a second thin film forming step of forming a second thin film having a substantially uniform thickness made of a material. The wiring board can be easily manufactured by this manufacturing method as well.

なお、本発明は、種々の態様で実現することが可能であり、例えば、配線基板を含む製品、配線基板を含む製品の製造方法などの形態で実現することができる。 The present invention can be realized in various aspects, for example, in the form of a product including a wiring board, a method for manufacturing a product including a wiring board, and the like.

本発明の第１実施形態の配線基板の構成を概略的示す説明図である。It is explanatory drawing which shows schematic structure of the wiring board of 1st Embodiment of this invention. 配線基板の製造方法を示す工程図である。It is a process drawing which shows the manufacturing method of a wiring board. 配線基板の製造方法を示す工程図である。It is a process drawing which shows the manufacturing method of a wiring board. 比較例の配線基板の構成を概略的に示す説明図である。It is explanatory drawing which shows schematic structure of the wiring board of the comparative example. 比較例の配線基板の製造方法を示す工程図である。It is a process drawing which shows the manufacturing method of the wiring board of the comparative example. 比較例の配線基板の製造方法を示す工程図である。It is a process drawing which shows the manufacturing method of the wiring board of the comparative example. 第２実施形態の照明装置の構成を概略的に示す説明図である。It is explanatory drawing which shows schematic structure of the lighting apparatus of 2nd Embodiment.

＜第１実施形態＞
・配線基板１０の構成：
図１は、本発明の第１実施形態の配線基板１０の構成を概略的示す説明図である。配線基板１０は、基材２と、第１導電層４と、第２導電層６と、第３導電層８と、第４導電層７を備える。第２導電層６は、第１薄膜６Ａと第２薄膜６Ｂを含む。第１薄膜６Ａと第２薄膜６Ｂは、それぞれ、略均一な厚さに形成されている。 <First Embodiment>
-Structure of wiring board 10:
FIG. 1 is an explanatory diagram schematically showing the configuration of the wiring board 10 according to the first embodiment of the present invention. The wiring board 10 includes a base material 2, a first conductive layer 4, a second conductive layer 6, a third conductive layer 8, and a fourth conductive layer 7. The second conductive layer 6 includes a first thin film 6A and a second thin film 6B. The first thin film 6A and the second thin film 6B are each formed to have substantially uniform thickness.

図示するように、第１導電層４は、基材２の上に、第１薄膜６Ａと第４導電層７を介して積層されている。第２導電層６は、第１導電層４の表面の少なくとも一部を覆う第１部分Ｐ１と、第１導電層４の側面の少なくとも一部を覆う第２部分Ｐ２と、基材２の表面の少なくとも一部を覆う第３部分Ｐ３を備える。図１において、第１部分Ｐ１、第２部分Ｐ２、第３部分Ｐ３の境界を破線で図示している。第２導電層６において、第３部分Ｐ３では、第１薄膜６Ａと第２薄膜６Ｂが積層されており、第１部分Ｐ１では第２薄膜６Ｂのみであるため、第３部分Ｐ３の厚みＴ３は、第１部分Ｐ１の厚みＴ１より厚い。第３導電層８は、第２導電層６の上に略均一な厚みで形成される。すなわち、第３導電層８において、第２導電層６の第１部分Ｐ１上の厚みＴ４と、第２導電層６の第３部分Ｐ３上の厚みＴ５は、略同一である。 As shown in the figure, the first conductive layer 4 is laminated on the base material 2 via the first thin film 6A and the fourth conductive layer 7. The second conductive layer 6 includes a first portion P1 that covers at least a part of the surface of the first conductive layer 4, a second portion P2 that covers at least a part of the side surface of the first conductive layer 4, and a surface of the base material 2. It comprises a third portion P3 that covers at least a portion of the. In FIG. 1, the boundary between the first portion P1, the second portion P2, and the third portion P3 is shown by a broken line. In the second conductive layer 6, in the third portion P3, the first thin film 6A and the second thin film 6B are laminated, and in the first portion P1, only the second thin film 6B is formed, so that the thickness T3 of the third portion P3 is , The thickness of the first portion P1 is thicker than T1. The third conductive layer 8 is formed on the second conductive layer 6 with a substantially uniform thickness. That is, in the third conductive layer 8, the thickness T4 on the first portion P1 of the second conductive layer 6 and the thickness T5 on the third portion P3 of the second conductive layer 6 are substantially the same.

基材２は、絶縁性の平板である。本実施形態では、窒化アルミニウム（ＡｌＮ）セラミックスにより形成されている。窒化アルミニウムは、高放熱性、高強度であるため、パワー半導体モジュール等発熱量が大きい部品に好適に用いることができる。基材２を形成する材料は、本実施形態に限定されず、例えば、アルミナ（Ａｌ₂０₃）、アルミナジルコニア（Ａｌ₂０₃／ＺｒＯ₂）、窒化珪素（Ｓｉ₃Ｎ₄）、炭化珪素（ＳｉＣ）等のセラミックスを用いてもよいし、ガラス、ガラスエポキシ、熱可塑性樹脂及び熱硬化性樹脂などの樹脂、紙フェノール、紙エポキシ、ガラスコンポジット、低温同時焼成セラミックス（ＬＴＣＣ）、これらの絶縁部材を表面に形成した金属部材等によって形成してもよい。 The base material 2 is an insulating flat plate. In this embodiment, it is made of aluminum nitride (AlN) ceramics. Since aluminum nitride has high heat dissipation and high strength, it can be suitably used for parts having a large calorific value such as power semiconductor modules. A material forming the substrate 2 is not limited to this embodiment, for example, alumina (Al ₂ 0 _3), alumina zirconia _{_{_{(Al 2 0 3 / ZrO 2}}} ), silicon nitride (Si ₃ N _4), silicon carbide Ceramics such as (SiC) may be used, resins such as glass, glass epoxy, thermoplastic resin and thermosetting resin, paper phenol, paper epoxy, glass composite, low temperature co-fired ceramics (LTCC), and insulation thereof. The member may be formed of a metal member or the like formed on the surface.

本実施形態では、第１導電層４を形成する第１導電性材料は、主成分として金（Ａｕ）を含む。第１導電層性材料として、金（Ａｕ）、金合金を用いることができる。第１導電層４は、主成分が金であるため、やわらかく、表面は滑らかである。ここで、主成分とは、９９％以上含まれる成分である。 In the present embodiment, the first conductive material forming the first conductive layer 4 contains gold (Au) as a main component. Gold (Au) and a gold alloy can be used as the first conductive layer material. Since the main component of the first conductive layer 4 is gold, the first conductive layer 4 is soft and has a smooth surface. Here, the principal component is a component contained in an amount of 99% or more.

第２導電層６を形成する第２導電性材料は、主成分としてチタン（Ｔｉ）を含む。チタンは高融点であるため、第２導電層６は、いわゆる、バリアメタル層として機能する。また、チタン（Ｔｉ）は、強固な酸化膜を作りやすいため、腐食耐性を向上させることができる。第２導電性材料として、例えば、チタン（Ｔｉ）、窒化チタン（ＴｉＮ）、チタン合金（例えば、ジルコニウム（Ｚｒ）、ハフニウム（Ｈｆ）等を含む）等を用いることができる。 The second conductive material forming the second conductive layer 6 contains titanium (Ti) as a main component. Since titanium has a high melting point, the second conductive layer 6 functions as a so-called barrier metal layer. Further, titanium (Ti) can easily form a strong oxide film, so that corrosion resistance can be improved. As the second conductive material, for example, titanium (Ti), titanium nitride (TiN), a titanium alloy (including, for example, zirconium (Zr), hafnium (Hf), etc.) and the like can be used.

第３導電層８を形成する第３導電性材料は、主成分としてアルミニウム（Ａｌ）を含む。第３導電性材料として、アルミニウム（Ａｌ）、アルミニウム合金（例えば、Ａｌ−Ｓｉ−Ｃｕ、Ａｌ−Ｃｕ等）を用いることができる。アルミニウムは、イオン化傾向が高く、腐食性が高い。 The third conductive material forming the third conductive layer 8 contains aluminum (Al) as a main component. As the third conductive material, aluminum (Al) or an aluminum alloy (for example, Al—Si—Cu, Al—Cu, etc.) can be used. Aluminum has a high ionization tendency and is highly corrosive.

第４導電層７を形成する第４導電性材料は、主成分として、パラジウム（Ｐｄ）を含む。チタンは酸化しやすいため、製造工程において、第１薄膜６Ａ上にパラジウムを主成分とする第４導電層７を形成している。 The fourth conductive material forming the fourth conductive layer 7 contains palladium (Pd) as a main component. Since titanium is easily oxidized, a fourth conductive layer 7 containing palladium as a main component is formed on the first thin film 6A in the manufacturing process.

・配線基板１０の製造方法：
図２、図３は、配線基板１０の製造方法を示す工程図である。図２、図３において、配線基板１０の端部近傍の一部の断面（図１に示す断面に相当する）を、概略的に図示している。 -Manufacturing method of wiring board 10:
2 and 3 are process diagrams showing a method of manufacturing the wiring board 10. In FIGS. 2 and 3, a partial cross section (corresponding to the cross section shown in FIG. 1) near the end of the wiring board 10 is schematically shown.

工程Ｐ１０２（図２）において、基材２が準備され、例えば、１０００℃以上で空焼きされる。工程Ｐ１０２を「準備工程」とも呼ぶ。 In step P102 (FIG. 2), the base material 2 is prepared and, for example, air-baked at 1000 ° C. or higher. Step P102 is also referred to as a “preparation step”.

工程Ｐ１０４において、スパッタリング、蒸着等の公知の方法により、基材２上に第１薄膜６Ａが形成され、第１薄膜６Ａ上に第４導電層７が形成される。工程Ｐ１０４を「第１薄膜形成工程」とも呼ぶ。 In step P104, the first thin film 6A is formed on the base material 2 and the fourth conductive layer 7 is formed on the first thin film 6A by a known method such as sputtering and vapor deposition. Step P104 is also referred to as a "first thin film forming step".

工程Ｐ１０６において、めっき工法等の公知の方法により、第４導電層７上に第１導電層４が形成される。 In step P106, the first conductive layer 4 is formed on the fourth conductive layer 7 by a known method such as a plating method.

工程Ｐ１０８において、第１導電層４上に、フォトリソグラフィ、印刷等の公知の方法により、レジスト１４が形成される。 In step P108, the resist 14 is formed on the first conductive layer 4 by a known method such as photolithography and printing.

工程Ｐ１１０において、第１導電層４と第４導電層７を選択的に除去する第１除去液を用いて、第１導電層４と第４導電層７の一部が除去される。これにより、第１薄膜６Ａの一部が露出した状態になる。本実施形態では、第１除去液として、ヨウ素（Ｉ）系の除去液（エッチング液)を用いている。工程Ｐ１０６、工程Ｐ１０８、工程Ｐ１１０をあわせて、「第１導電層形成工程」とも呼ぶ。 In step P110, a part of the first conductive layer 4 and the fourth conductive layer 7 is removed by using the first removing liquid that selectively removes the first conductive layer 4 and the fourth conductive layer 7. As a result, a part of the first thin film 6A is exposed. In the present embodiment, an iodine (I) -based removing liquid (etching liquid) is used as the first removing liquid. The steps P106, P108, and P110 are collectively referred to as a "first conductive layer forming step".

工程Ｐ１１２において、レジスト１４が剥離される。 In step P112, the resist 14 is peeled off.

工程Ｐ１１４（図３）において、スパッタリング、蒸着等の公知の方法により、第１導電層４の表面の少なくとも一部と、第１導電層４の側面の少なくとも一部と、露出している第１薄膜６Ａの表面と、を連続して覆うように、第２薄膜６Ｂが形成され、第２薄膜６Ｂ上に第３導電層８が形成される。ここで、第２薄膜６Ｂは、第１導電層４の表面の少なくとも一部を覆う部分と、第１導電層４の側面の少なくとも一部を覆う部分と、露出している第１薄膜６Ａの表面を覆う部分が繋がっていればよく、一部が切れていてもよい。工程Ｐ１１４を「第２薄膜形成工程」とも呼ぶ。また、工程Ｐ１０４と工程Ｐ１１４とをあわせて、「第２導電層形成工程」とも呼ぶ。 In step P114 (FIG. 3), at least a part of the surface of the first conductive layer 4 and at least a part of the side surface of the first conductive layer 4 are exposed by a known method such as sputtering and vapor deposition. The second thin film 6B is formed so as to continuously cover the surface of the thin film 6A, and the third conductive layer 8 is formed on the second thin film 6B. Here, the second thin film 6B includes a portion that covers at least a part of the surface of the first conductive layer 4, a portion that covers at least a part of the side surface of the first conductive layer 4, and an exposed first thin film 6A. As long as the part covering the surface is connected, a part may be cut off. The step P114 is also referred to as a "second thin film forming step". Further, the step P104 and the step P114 are collectively referred to as a "second conductive layer forming step".

工程Ｐ１１６において、第３導電層８上に、フォトリソグラフィ、印刷等の公知の方法により、レジスト１６が形成される。 In step P116, the resist 16 is formed on the third conductive layer 8 by a known method such as photolithography and printing.

工程Ｐ１１８において、第３導電層８を選択的に除去する第２除去液を用いて、第３導電層８の一部が除去される。本実施形態では、第２除去液として、リン酸（Ｈ₃ＰＯ₄）、硝酸（ＨＮＯ₃）、酢酸（ＣＨ₃ＣＯＯＨ）から成るＰＡＮ系エッチング液を用いている。 In step P118, a part of the third conductive layer 8 is removed by using the second removing liquid that selectively removes the third conductive layer 8. In this embodiment, a PAN-based etching solution composed of phosphoric acid (H ₃ PO ₄ ), nitric acid (HNO ₃ ), and acetic acid (CH ₃ COOH) is used as the second removing solution.

工程Ｐ１２０において、第２導電層６を選択的に除去する第３除去液を用いて、第２導電層６の一部が除去される。第３除去液は、アルミニウム（Ａｌ）のエッチングレートが、チタン（Ｔｉ）のエッチングレートより低いため、第３導電層８もレジスト様の機能を果たし、この工程では、第３導電層８が第２導電層６の外周より突出した状態になる。本実施形態では、第３除去液として、フッ硝酸（フッ酸（ＨＦ）と硝酸（ＨＮＯ₃）の混合液)を用いている。 In step P120, a part of the second conductive layer 6 is removed by using a third removing liquid that selectively removes the second conductive layer 6. In the third removing liquid, the etching rate of aluminum (Al) is lower than the etching rate of titanium (Ti), so that the third conductive layer 8 also functions like a resist. In this step, the third conductive layer 8 is the third conductive layer 8. 2 It is in a state of protruding from the outer periphery of the conductive layer 6. In this embodiment, hydrofluoric acid (a mixed solution of hydrofluoric acid (HF) and nitric acid (HNO ₃ )) is used as the third removing solution.

工程Ｐ１２２において、レジスト１６が剥離され、配線基板１０が完成される。この製造方法によれば、第２導電層６を、第１薄膜６Ａを形成する工程と第２薄膜６Ｂを形成する工程とに分けて形成することにより、容易に、第２導電層６の厚みが、第１導電層４上よりも基材２上の方が厚くなるように形成することができる。 In step P122, the resist 16 is peeled off to complete the wiring board 10. According to this manufacturing method, the thickness of the second conductive layer 6 can be easily obtained by forming the second conductive layer 6 separately in the step of forming the first thin film 6A and the step of forming the second thin film 6B. However, it can be formed so that the thickness on the base material 2 is thicker than that on the first conductive layer 4.

・本実施形態の効果：
本実施形態の配線基板１０の効果を、比較例の配線基板１０Ｐと比較して説明する。図４は、比較例の配線基板１０Ｐの構成を概略的に示す説明図である。 -Effect of this embodiment:
The effect of the wiring board 10 of the present embodiment will be described in comparison with the wiring board 10P of the comparative example. FIG. 4 is an explanatory diagram schematically showing the configuration of the wiring board 10P of the comparative example.

比較例の配線基板１０Ｐは、本実施形態の配線基板１０と同様に、基材２と、第１導電層４と、第２導電層６と、第３導電層８と、第４導電層７を備える。第２導電層６は、第１薄膜６Ａと第２薄膜６Ｂを含む。第１導電層４、第２導電層６、第３導電層８、第４導電層７それぞれを形成する導電性材料の主成分は、第１実施形態の配線基板１０と同じである。 Similar to the wiring board 10 of the present embodiment, the wiring board 10P of the comparative example includes the base material 2, the first conductive layer 4, the second conductive layer 6, the third conductive layer 8, and the fourth conductive layer 7. To be equipped. The second conductive layer 6 includes a first thin film 6A and a second thin film 6B. The main components of the conductive material forming each of the first conductive layer 4, the second conductive layer 6, the third conductive layer 8, and the fourth conductive layer 7 are the same as those of the wiring board 10 of the first embodiment.

比較例の配線基板１０Ｐにおいて、第２導電層６は、第１実施形態の配線基板１０と同様に、第１導電層４の表面の少なくとも一部を覆う第１部分ＰＰ１と、第１導電層４の側面の少なくとも一部を覆う第２部分ＰＰ２と、基材２の表面の少なくとも一部を覆う第３部分ＰＰ３を備える。図４において、第１部分ＰＰ１、第２部分ＰＰ２、第３部分ＰＰ３の境界を破線で図示している。比較例の配線基板１０Ｐの第２導電層６において、第３部分ＰＰ３の厚みＴＰ３は、第１部分ＰＰ１の厚みＴＰ１と略同一である。 In the wiring board 10P of the comparative example, the second conductive layer 6 includes the first portion PP1 covering at least a part of the surface of the first conductive layer 4 and the first conductive layer, similarly to the wiring board 10 of the first embodiment. A second portion PP2 that covers at least a part of the side surface of the base material 2 and a third portion PP3 that covers at least a part of the surface of the base material 2 are provided. In FIG. 4, the boundary between the first portion PP1, the second portion PP2, and the third portion PP3 is shown by a broken line. In the second conductive layer 6 of the wiring board 10P of the comparative example, the thickness TP3 of the third portion PP3 is substantially the same as the thickness TP1 of the first portion PP1.

比較例の配線基板１０Ｐにおいて、第１導電層４は、主成分が金であるため、やわらかく、表面は滑らかである。これに対し、基材２の表面は粗い。比較例の配線基板１０Ｐは、第２導電層６において、第３部分ＰＰ３の厚みＴＰ３が、第１部分ＰＰ１の厚みＴＰ１と略同一であるため、第２導電層６の第３部分ＰＰ３（基材２上に接触して形成されている）の表面粗さが、第１部分ＰＰ１（第１導電層４上に形成されている）の表面粗さより大きい。換言すると、第２導電層６の第３部分ＰＰ３の表面は、第１部分ＰＰ１の表面より粗い。そのため、第２導電層６上に形成された第３導電層８において、第２導電層６の第３部分ＰＰ３上に形成された部分と、第２導電層６の第１部分ＰＰ１上に形成された部分とで、結晶品質に差が出る可能性がある。第３導電層８において、第２導電層６の第３部分ＰＰ３上に形成された部分は、結晶品質が低くなるため、塩水雰囲気下等に置かれると、そこを起点に孔食（腐食）が発生する虞がある。 In the wiring board 10P of the comparative example, the first conductive layer 4 is soft and has a smooth surface because the main component is gold. On the other hand, the surface of the base material 2 is rough. In the wiring board 10P of the comparative example, since the thickness TP3 of the third portion PP3 is substantially the same as the thickness TP1 of the first portion PP1 in the second conductive layer 6, the third portion PP3 (base) of the second conductive layer 6 is used. The surface roughness of the material 2 (formed in contact with the material 2) is larger than the surface roughness of the first portion PP1 (formed on the first conductive layer 4). In other words, the surface of the third portion PP3 of the second conductive layer 6 is rougher than the surface of the first portion PP1. Therefore, in the third conductive layer 8 formed on the second conductive layer 6, a portion formed on the third portion PP3 of the second conductive layer 6 and a portion formed on the first portion PP1 of the second conductive layer 6 are formed. There is a possibility that there will be a difference in crystal quality between the parts that have been removed. In the third conductive layer 8, the portion formed on the third portion PP3 of the second conductive layer 6 has low crystal quality, and therefore, when placed in a salt water atmosphere or the like, pitting corrosion (corrosion) starts from that portion. May occur.

これに対し、本実施形態の配線基板１０（図１）は、第２導電層６において、第３部分Ｐ３の厚みＴ３が、第１部分Ｐ１の厚みＴ１より厚い。層の厚みを大きくすると、下の層の表面粗さを均すことができるため、第２導電層６において、第３部分Ｐ３の厚みＴ３を厚くすることにより、第２導電層の第３部分Ｐ３の表面粗さを小さくすることができる。その結果、第３導電層８の結晶品質の低下が抑制され、第３導電層８の腐食を抑制することができる。 On the other hand, in the wiring board 10 (FIG. 1) of the present embodiment, the thickness T3 of the third portion P3 is thicker than the thickness T1 of the first portion P1 in the second conductive layer 6. By increasing the thickness of the layer, the surface roughness of the lower layer can be smoothed. Therefore, in the second conductive layer 6, the thickness T3 of the third portion P3 is increased to increase the thickness T3 of the second conductive layer. The surface roughness of P3 can be reduced. As a result, deterioration of the crystal quality of the third conductive layer 8 can be suppressed, and corrosion of the third conductive layer 8 can be suppressed.

また、本実施形態の配線基板１０では、第２導電層６において、表面が滑らかな第１導電層４上に形成されている第１部分Ｐ１の厚みを第３部分Ｐ３より小さくすることにより、ボンディング性の低下を抑制し、信頼性の低下を抑制することができる。 Further, in the wiring board 10 of the present embodiment, in the second conductive layer 6, the thickness of the first portion P1 formed on the first conductive layer 4 having a smooth surface is made smaller than that of the third portion P3. It is possible to suppress a decrease in bondability and suppress a decrease in reliability.

また、比較例の配線基板１０Ｐ（図４）では、第２導電層６に含まれる第１薄膜６Ａと第２薄膜６Ｂとの間に隙間Ｓが形成されている。そのため、隙間Ｓを起点に第２薄膜６Ｂおよび第３導電層８に、クレバス状の亀裂が形成される虞がある。このような亀裂が形成されると、塩水雰囲気下等に置かれた場合に、第３導電層８が腐食される虞がある。これに対し、本実施形態の配線基板１０によれば、比較例のような隙間Ｓが形成されないため、第３導電層８の腐食を抑制することができる。 Further, in the wiring board 10P (FIG. 4) of the comparative example, a gap S is formed between the first thin film 6A and the second thin film 6B included in the second conductive layer 6. Therefore, there is a possibility that a crevasse-like crack may be formed in the second thin film 6B and the third conductive layer 8 starting from the gap S. If such cracks are formed, the third conductive layer 8 may be corroded when placed in a salt water atmosphere or the like. On the other hand, according to the wiring board 10 of the present embodiment, since the gap S as in the comparative example is not formed, the corrosion of the third conductive layer 8 can be suppressed.

図５、図６は、比較例の配線基板１０Ｐの製造方法を示す工程図である。図５、図６において、図２、図３と同様に、配線基板１０Ｐの端部近傍の一部の断面（図４に示す断面に相当する）を、概略的に図示している。 5 and 6 are process diagrams showing a method of manufacturing the wiring board 10P of the comparative example. 5 and 6, similarly to FIGS. 2 and 3, a partial cross section (corresponding to the cross section shown in FIG. 4) near the end of the wiring board 10P is schematically shown.

工程Ｓ１０２〜工程Ｓ１１０（図５）までは、第１実施形態の配線基板１０の製造方法における工程Ｐ１０２〜工程Ｐ１１０（図２）と同様に、基材２が準備、空焼きされた後、基材２上に第１薄膜６Ａ、第４導電層７が形成され、その後、第４導電層７上に第１導電層４が形成される。そして、第１導電層４と第４導電層７の一部が除去される。 In steps S102 to S110 (FIG. 5), the base material 2 is prepared and air-baked, and then the base material 2 is formed, as in steps P102 to P110 (FIG. 2) in the method for manufacturing the wiring board 10 of the first embodiment. The first thin film 6A and the fourth conductive layer 7 are formed on the material 2, and then the first conductive layer 4 is formed on the fourth conductive layer 7. Then, a part of the first conductive layer 4 and the fourth conductive layer 7 is removed.

その後、比較例の配線基板１０Ｐの製造方法では、レジスト１４が剥離される前に、工程Ｓ１１１において、第２導電層６を選択的に除去する第３除去液を用いて、第２導電層６（第１薄膜６Ａ）の一部が除去される。第３除去液では、第４導電層７および第１導電層４が除去されず、これらの層もレジスト様の機能を果たすため、この工程では、第４導電層７および第１導電層４が第１薄膜６Ａの外周より突出した状態になる。比較例においても、第３除去液として、フッ硝酸（フッ酸（ＨＦ）と硝酸（ＨＮＯ₃）の混合液)を用いている。 After that, in the method for manufacturing the wiring board 10P of the comparative example, the second conductive layer 6 is used in the step S111 with a third removing liquid for selectively removing the second conductive layer 6 before the resist 14 is peeled off. A part of (first thin film 6A) is removed. In the third removing liquid, the fourth conductive layer 7 and the first conductive layer 4 are not removed, and these layers also perform a resist-like function. Therefore, in this step, the fourth conductive layer 7 and the first conductive layer 4 are used. It is in a state of protruding from the outer periphery of the first thin film 6A. Also in the comparative example, hydrofluoric acid (a mixed solution of hydrofluoric acid (HF) and nitric acid (HNO ₃ )) is used as the third removing solution.

工程Ｓ１１２において、レジスト１４が剥離される。 In step S112, the resist 14 is peeled off.

工程Ｓ１１４（図６）において、配線基板１０の製造方法の工程Ｐ１１４（図２）と同様に、第２薄膜６Ｂと第３導電層８が形成される。比較例の製造方法では、工程Ｓ１１１が行われるため、第１薄膜６Ａが露出している部分がなく、第２薄膜６Ｂは、第１導電層４の表面の少なくとも一部と、第１導電層４の側面の少なくとも一部と、基材２の表面の少なくとも一部と、を連続して覆うように、形成される。ここで、第２薄膜６Ｂは、第１導電層４の表面の少なくとも一部を覆う部分と、第１導電層４の側面の少なくとも一部を覆う部分と、基材２の表面の少なくとも一部とを覆う部分が繋がっていればよく、一部が切れていてもよい。第３導電層８は、第２薄膜６Ｂ上に、略均一な厚みで形成される。 In step S114 (FIG. 6), the second thin film 6B and the third conductive layer 8 are formed in the same manner as in step P114 (FIG. 2) of the method for manufacturing the wiring board 10. In the manufacturing method of the comparative example, since step S111 is performed, there is no exposed portion of the first thin film 6A, and the second thin film 6B has at least a part of the surface of the first conductive layer 4 and the first conductive layer. It is formed so as to continuously cover at least a part of the side surface of No. 4 and at least a part of the surface of the base material 2. Here, the second thin film 6B includes a portion that covers at least a part of the surface of the first conductive layer 4, a portion that covers at least a part of the side surface of the first conductive layer 4, and at least a part of the surface of the base material 2. As long as the part covering the and is connected, a part may be cut off. The third conductive layer 8 is formed on the second thin film 6B with a substantially uniform thickness.

工程Ｓ１１６、工程Ｓ１１８（図６）において、配線基板１０の製造方法の工程Ｐ１１６、Ｐ１１８（図２）と同様に、第３導電層８上に、レジスト１６が形成され、第３導電層８の一部が除去される。 In steps S116 and S118 (FIG. 6), a resist 16 is formed on the third conductive layer 8 and the third conductive layer 8 is formed in the same manner as in steps P116 and P118 (FIG. 2) of the method for manufacturing the wiring board 10. Part is removed.

工程Ｓ１２０（図６）において、配線基板１０の製造方法の工程Ｐ１２０（図２）と同様に、第２導電層６の一部が除去される。比較例の製造方法では、第２薄膜６Ｂの一部のみが除去される。 In step S120 (FIG. 6), a part of the second conductive layer 6 is removed in the same manner as in step P120 (FIG. 2) of the method for manufacturing the wiring board 10. In the manufacturing method of the comparative example, only a part of the second thin film 6B is removed.

工程Ｓ１２２において、レジスト１６が剥離され、配線基板１０Ｐが完成される。比較例の製造方法で、基材２と、第１導電層４と、第２導電層６と、第３導電層８と、第４導電層７を備える配線基板１０Ｐを製造すると、上述の通り、基材２と導電層との間に隙間Ｓが形成される。また、第２導電層６の表面粗さに差異が生じ、第３導電層８の結晶品質が低下する虞がある。これに対し、本実施形態の配線基板１０の製造方法によって配線基板１０を製造すれば、基材２と導電層との間に隙間Ｓが形成されず、また、第３導電層８の結晶品質の低下を抑制することができる。また、製造工程数を比較例の製造方法より低減させることができるため、製造時間、製造コスト等を削減することができる。 In step S122, the resist 16 is peeled off to complete the wiring board 10P. When the wiring board 10P including the base material 2, the first conductive layer 4, the second conductive layer 6, the third conductive layer 8, and the fourth conductive layer 7 is manufactured by the manufacturing method of the comparative example, as described above. , A gap S is formed between the base material 2 and the conductive layer. In addition, the surface roughness of the second conductive layer 6 may differ, and the crystal quality of the third conductive layer 8 may deteriorate. On the other hand, if the wiring board 10 is manufactured by the manufacturing method of the wiring board 10 of the present embodiment, no gap S is formed between the base material 2 and the conductive layer, and the crystal quality of the third conductive layer 8 is not formed. Can be suppressed. Further, since the number of manufacturing steps can be reduced as compared with the manufacturing method of the comparative example, the manufacturing time, the manufacturing cost, and the like can be reduced.

＜第２実施形態＞
図７は、第２実施形態の照明装置１００の構成を概略的に示す説明図である。照明装置１００は、第１実施形態の配線基板１０と、ＬＥＤ照明部２０と、モールド樹脂２６と、配線回路３０と、配線４０と、ヒートシンク５０と、放熱樹脂６０と、を備える。ＬＥＤ照明部２０は、ＬＥＤ素子２２と蛍光体２４とを備える。図７では、図１における断面に相当する断面を示している。なお、図７に示す配線基板１０において、第４導電層７の図示を省略している。 <Second Embodiment>
FIG. 7 is an explanatory diagram schematically showing the configuration of the lighting device 100 of the second embodiment. The lighting device 100 includes the wiring board 10 of the first embodiment, the LED lighting unit 20, the mold resin 26, the wiring circuit 30, the wiring 40, the heat sink 50, and the heat radiating resin 60. The LED lighting unit 20 includes an LED element 22 and a phosphor 24. FIG. 7 shows a cross section corresponding to the cross section in FIG. In the wiring board 10 shown in FIG. 7, the fourth conductive layer 7 is not shown.

配線基板１０は、熱伝導性フィラー(金属を含む)を含む放熱樹脂６０により、アルミニウム製のヒートシンク５０に接着されている。ＬＥＤ素子２２は、金のスタッドバンプにより配線基板１０に実装されている。配線基板１０の第３導電層８と配線回路３０は、配線４０により接続されている。配線４０は、アルミリボンであり、大電力に対応することができる。 The wiring substrate 10 is adhered to a heat sink 50 made of aluminum by a heat radiating resin 60 containing a heat conductive filler (including metal). The LED element 22 is mounted on the wiring board 10 by means of gold stud bumps. The third conductive layer 8 of the wiring board 10 and the wiring circuit 30 are connected by the wiring 40. The wiring 40 is an aluminum ribbon and can handle a large amount of electric power.

本実施形態の照明装置１００によれば、配線基板１０を用いているため、第３導電層８の腐食が抑制される。また、第３導電層８を形成する第２金属の主成分が、配線４０の主成分と同一であるため、配線回路３０との接続不良を抑制することができる。 According to the lighting device 100 of the present embodiment, since the wiring board 10 is used, corrosion of the third conductive layer 8 is suppressed. Further, since the main component of the second metal forming the third conductive layer 8 is the same as the main component of the wiring 40, poor connection with the wiring circuit 30 can be suppressed.

照明装置１００において、配線基板１０は、熱伝導率が高く絶縁性を有する窒化アルミニウムから成る基材２を用いるとともに、金属放熱板としてアルミニウム製のヒートシンク５０を用いているため、ＬＥＤ素子２２による発熱を効率的に放熱させることができる。 In the lighting device 100, since the wiring substrate 10 uses the base material 2 made of aluminum nitride having high thermal conductivity and insulating properties and the heat sink 50 made of aluminum as the metal heat sink, the LED element 22 generates heat. Can be efficiently dissipated.

＜本実施形態の変形例＞
本発明は上記の実施形態に限られるものではなく、その要旨を逸脱しない範囲において種々の態様において実施することが可能であり、例えば次のような変形も可能である。 <Modified example of this embodiment>
The present invention is not limited to the above-described embodiment, and can be implemented in various aspects without departing from the gist thereof. For example, the following modifications are also possible.

・上記実施形態において、第３導電層を備えない構成にしてもよい。また、基材２と第２導電層６との間や、第１導電層４と第２導電層６との間に、異種材料による層が形成されてもよい。このようにしても、第２導電層６の表面粗さの増大を抑制することができる。 -In the above embodiment, the configuration may not include the third conductive layer. Further, a layer made of a different material may be formed between the base material 2 and the second conductive layer 6 or between the first conductive layer 4 and the second conductive layer 6. Even in this way, it is possible to suppress an increase in the surface roughness of the second conductive layer 6.

・第１導電層４、第２導電層６、第４導電層７、第３導電層８を形成する導電性材料は、上記実施形態に限定されず、種々の公知の導電性材料を用いることができる。 The conductive material forming the first conductive layer 4, the second conductive layer 6, the fourth conductive layer 7, and the third conductive layer 8 is not limited to the above embodiment, and various known conductive materials may be used. Can be done.

・上記実施形態において、第２導電層６が、第２導電性材料から成る第１薄膜６Ａと第２導電性材料から成る第２薄膜６Ｂを含む例を示したが、第２導電層６は、第２導電性材料から成る３以上の薄膜を含んでもよいし、１の膜で形成されてもよい。第２導電層６が第２導電性材料から成る複数の薄膜を含む場合に、例えば、薄膜の表面に酸化層（酸化皮膜）等が形成されていてもよい。 -In the above embodiment, an example is shown in which the second conductive layer 6 includes a first thin film 6A made of a second conductive material and a second thin film 6B made of a second conductive material, but the second conductive layer 6 is , 3 or more thin films made of a second conductive material may be included, or may be formed of one film. When the second conductive layer 6 contains a plurality of thin films made of the second conductive material, for example, an oxide layer (oxide film) or the like may be formed on the surface of the thin film.

・配線基板１０の製造方法は、上記実施形態に限定されない。エッチング液も上記実施形態に限定されない。基材２を準備する準備工程と、基材２の上に、第１導電性材料から成る第１導電層４を形成する第１導電層形成工程と、第１導電性材料と異なる第２導電性材料から成る第２導電層６であって、第１導電層４の表面の少なくとも一部を覆う第１部分Ｐ１と、第１導電層４の側面の少なくとも一部を覆う第２部分Ｐ２と、基材２の表面の少なくとも一部を覆う第３部分Ｐ３と、を備え、第１部分Ｐ１と第３部分Ｐ３がそれぞれ第２部分Ｐ２と連接されるとともに、第３部分Ｐ３の厚みが第１部分Ｐ１の厚みより厚い第２導電層６を形成する第２導電層形成工程と、を備える種々の方法で、配線基板１０を製造することができる。 The manufacturing method of the wiring board 10 is not limited to the above embodiment. The etching solution is also not limited to the above embodiment. A preparatory step for preparing the base material 2, a first conductive layer forming step for forming a first conductive layer 4 made of a first conductive material on the base material 2, and a second conductive layer different from the first conductive material. A second conductive layer 6 made of a sexual material, the first portion P1 covering at least a part of the surface of the first conductive layer 4, and the second portion P2 covering at least a part of the side surface of the first conductive layer 4. A third portion P3 that covers at least a part of the surface of the base material 2 is provided, and the first portion P1 and the third portion P3 are respectively connected to the second portion P2, and the thickness of the third portion P3 is the third. The wiring substrate 10 can be manufactured by various methods including a second conductive layer forming step of forming the second conductive layer 6 thicker than the thickness of one portion P1.

・配線基板１０を含む製品として、ＬＥＤ素子２２が実装された照明装置１００を例示したが、配線基板１０に実装される部品は上記実施形態に限定されない。例えば、電力の供給、制御を行うパワー半導体や、マイコン（ＣＰＵ：中央演算装置）やメモリなどのＬＳＩ（Ｌａｒｇｅ−ＳｃａｌｅＩｎｔｅｇｒａｔｉｏｎ：大規模集積回路)等が実装されてもよい。 Although the lighting device 100 on which the LED element 22 is mounted is exemplified as a product including the wiring board 10, the components mounted on the wiring board 10 are not limited to the above embodiment. For example, a power semiconductor that supplies and controls electric power, an LSI (Large-Scale Integration: large-scale integrated circuit) such as a microcomputer (CPU: central processing unit) or memory may be mounted.

・第２実施形態において、配線４０が第２金属と同一の金属から成る例を示したが、配線４０は、第２金属と異なる金属で形成されてもよい。 -In the second embodiment, the example in which the wiring 40 is made of the same metal as the second metal is shown, but the wiring 40 may be made of a metal different from the second metal.

以上、実施形態、変形例に基づき本態様について説明してきたが、上記した態様の実施の形態は、本態様の理解を容易にするためのものであり、本態様を限定するものではない。本態様は、その趣旨並びに特許請求の範囲を逸脱することなく、変更、改良され得ると共に、本態様にはその等価物が含まれる。また、その技術的特徴が本明細書中に必須なものとして説明されていなければ、適宜、削除することができる。 Although the present embodiment has been described above based on the embodiments and modifications, the embodiments of the above-described embodiments are for facilitating the understanding of the present embodiment, and do not limit the present embodiment. This aspect may be modified or improved without departing from its spirit and claims, and this aspect includes its equivalents. In addition, if the technical feature is not described as essential in the present specification, it may be deleted as appropriate.

２…基材
４…第１導電層
６…第２導電層
６Ａ…第１薄膜
６Ｂ…第２薄膜
７…第４導電層
８…第３導電層
１０、１０Ｐ…配線基板
１４、１６…レジスト
２０…ＬＥＤ照明部
２２…ＬＥＤ素子
２４…蛍光体
２６…モールド樹脂
３０…配線回路
４０…配線
５０…ヒートシンク
６０…放熱樹脂
１００…照明装置
Ｐ１、ＰＰ１…第１部分
Ｐ２、ＰＰ２…第２部分
Ｐ３、ＰＰ３…第３部分
ＰＰ１…第１部分
ＰＰ２…第２部分
ＰＰ３…第３部分
Ｓ…隙間 2 ... Base material 4 ... 1st conductive layer 6 ... 2nd conductive layer 6A ... 1st thin film 6B ... 2nd thin film 7 ... 4th conductive layer 8 ... 3rd conductive layer 10, 10P ... Wiring substrate 14, 16 ... Resist 20 ... LED lighting unit 22 ... LED element 24 ... phosphor 26 ... mold resin 30 ... wiring circuit 40 ... wiring 50 ... heat sink 60 ... heat dissipation resin 100 ... lighting device P1, PP1 ... first part P2, PP2 ... second part P3, PP3 ... 3rd part PP1 ... 1st part PP2 ... 2nd part PP3 ... 3rd part S ... Gap

Claims

It's a wiring board
With the base material
A first conductive layer made of a first conductive material, the first conductive layer laminated on the base material, and
A second conductive layer made of a second conductive material different from the first conductive material, the first portion covering at least a part of the surface of the first conductive layer, and at least the side surface of the first conductive layer. A second portion that includes a second portion that covers a part of the substrate and a third portion that covers at least a part of the surface of the base material, and the first portion and the third portion are each connected to the second portion. With a conductive layer
With
In the second conductive layer, the thickness of the third portion is thicker than the thickness of the first portion.
Wiring board.

The wiring board according to claim 1.
further,
A third conductive layer formed of a third conductive material different from the first conductive material and the second conductive material, and is formed on the second conductive layer with a substantially uniform thickness. It is characterized by having layers,
Wiring board.

The wiring board according to any one of claims 1 and 2.
The substrate is made of ceramic.
Wiring board.

It is a manufacturing method of a wiring board.
The preparatory process for preparing the base material and
A first conductive layer forming step of forming a first conductive layer made of a first conductive material on the base material,
A second conductive layer made of a second conductive material different from the first conductive material, the first portion covering at least a part of the surface of the first conductive layer, and at least the side surface of the first conductive layer. A second portion that covers a part of the substrate and a third portion that covers at least a part of the surface of the base material are provided, and the first portion and the third portion are connected to the second portion and described above. A second conductive layer forming step of forming a second conductive layer in which the thickness of the third portion is thicker than the thickness of the first portion, and
It is characterized by having
Manufacturing method of wiring board.

It is a manufacturing method of a wiring board.
The preparatory process for preparing the base material and
A first thin film forming step of forming a first thin film having a substantially uniform thickness made of a second conductive material on the base material,
A first conductive layer forming step of forming a first conductive layer made of a first conductive material different from the second conductive material in a state where a part of the first thin film is exposed on the first thin film. ,
The second conductive material that continuously covers at least a part of the surface of the first conductive layer, at least a part of the side surface of the first conductive layer, and the exposed surface of the first thin film. A second thin film forming step of forming a second thin film having a substantially uniform thickness,
It is characterized by having
Manufacturing method of wiring board.