JP2020181540A5 - - Google Patents

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Publication number
JP2020181540A5
JP2020181540A5 JP2019086270A JP2019086270A JP2020181540A5 JP 2020181540 A5 JP2020181540 A5 JP 2020181540A5 JP 2019086270 A JP2019086270 A JP 2019086270A JP 2019086270 A JP2019086270 A JP 2019086270A JP 2020181540 A5 JP2020181540 A5 JP 2020181540A5
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Japan
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start address
bios program
data
processor
memory
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JP2019086270A
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English (en)
Japanese (ja)
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JP7263101B2 (ja
JP2020181540A (ja
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Priority to JP2019086270A priority Critical patent/JP7263101B2/ja
Priority claimed from JP2019086270A external-priority patent/JP7263101B2/ja
Priority to US16/847,401 priority patent/US20200344066A1/en
Publication of JP2020181540A publication Critical patent/JP2020181540A/ja
Publication of JP2020181540A5 publication Critical patent/JP2020181540A5/ja
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JP2019086270A 2019-04-26 2019-04-26 情報処理装置、データ検証方法 Active JP7263101B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2019086270A JP7263101B2 (ja) 2019-04-26 2019-04-26 情報処理装置、データ検証方法
US16/847,401 US20200344066A1 (en) 2019-04-26 2020-04-13 Information processing apparatus and data verification method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2019086270A JP7263101B2 (ja) 2019-04-26 2019-04-26 情報処理装置、データ検証方法

Publications (3)

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JP2020181540A JP2020181540A (ja) 2020-11-05
JP2020181540A5 true JP2020181540A5 (cg-RX-API-DMAC7.html) 2022-04-13
JP7263101B2 JP7263101B2 (ja) 2023-04-24

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JP2019086270A Active JP7263101B2 (ja) 2019-04-26 2019-04-26 情報処理装置、データ検証方法

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US (1) US20200344066A1 (cg-RX-API-DMAC7.html)
JP (1) JP7263101B2 (cg-RX-API-DMAC7.html)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7249968B2 (ja) * 2020-03-09 2023-03-31 株式会社東芝 情報処理装置およびストレージ
DE102020216380A1 (de) * 2020-12-21 2022-06-23 Robert Bosch Gesellschaft mit beschränkter Haftung Verfahren zum Betreiben eines Steuergeräts, auf dem mehrere Applikationen ausgeführt werden
JP7614881B2 (ja) * 2021-02-18 2025-01-16 キヤノン株式会社 情報処理装置
US12159033B2 (en) * 2022-10-18 2024-12-03 Qualcomm Incorporated Metadata registers for a memory device

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2575223B2 (ja) * 1990-03-06 1997-01-22 三菱電機株式会社 ワンチツプマイクロコンピユータ
US5388267A (en) * 1991-05-29 1995-02-07 Dell Usa, L.P. Method and apparatus for updating and restoring system BIOS functions while maintaining BIOS integrity
US5778070A (en) * 1996-06-28 1998-07-07 Intel Corporation Method and apparatus for protecting flash memory
JP3905204B2 (ja) * 1998-01-27 2007-04-18 富士通株式会社 半導体記憶装置
JP4274523B2 (ja) * 2003-01-24 2009-06-10 株式会社日立製作所 記憶装置システム、及び記憶装置システムの起動方法
US9015455B2 (en) * 2011-07-07 2015-04-21 Intel Corporation Processsor integral technologies for BIOS flash attack protection and notification
JP5831178B2 (ja) * 2011-11-30 2015-12-09 株式会社リコー 情報処理装置、情報処理装置の起動制御方法
US9046915B2 (en) * 2012-02-27 2015-06-02 Advanced Micro Devices, Inc. Circuit and method for initializing a computer system
JP2014056390A (ja) * 2012-09-12 2014-03-27 Ricoh Co Ltd 情報処理装置及び正当性検証方法
US9658858B2 (en) * 2013-10-16 2017-05-23 Xilinx, Inc. Multi-threaded low-level startup for system boot efficiency
JP6609199B2 (ja) * 2016-03-01 2019-11-20 ルネサスエレクトロニクス株式会社 組込み機器

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