JP2020165996A - Method for manufacturing organic electronic device - Google Patents
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- 238000000034 method Methods 0.000 title claims abstract description 41
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 24
- 239000000463 material Substances 0.000 claims abstract description 135
- 239000011347 resin Substances 0.000 claims abstract description 67
- 229920005989 resin Polymers 0.000 claims abstract description 67
- 238000005452 bending Methods 0.000 claims abstract description 9
- 239000000758 substrate Substances 0.000 claims description 11
- 230000005611 electricity Effects 0.000 claims description 9
- 230000003068 static effect Effects 0.000 claims description 9
- 238000005520 cutting process Methods 0.000 claims description 5
- 239000002585 base Substances 0.000 description 110
- 230000001737 promoting effect Effects 0.000 description 7
- 239000011521 glass Substances 0.000 description 6
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 description 6
- 229910052581 Si3N4 Inorganic materials 0.000 description 5
- 229920001721 polyimide Polymers 0.000 description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 239000004020 conductor Substances 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 4
- 239000009719 polyimide resin Substances 0.000 description 4
- 239000003513 alkali Substances 0.000 description 3
- 229920005575 poly(amic acid) Polymers 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 239000006087 Silane Coupling Agent Substances 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 229910003460 diamond Inorganic materials 0.000 description 2
- 239000010432 diamond Substances 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 239000002243 precursor Substances 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 230000000930 thermomechanical effect Effects 0.000 description 2
- 229920001187 thermosetting polymer Polymers 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- 229910001111 Fine metal Inorganic materials 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
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Abstract
Description
本発明は、基材、樹脂層、有機電子素子および回路層を有する有機電子デバイスの製造方法に関する。 The present invention relates to a method for manufacturing an organic electronic device having a base material, a resin layer, an organic electronic device and a circuit layer.
近年、ディスプレイデバイスの画面大型化や、表示エリアの狭額縁化に対応し、基材表面の有機電子素子から基材裏面へ配線する方法が数多く提案されている。基材上の有機電子素子の外側部分は回路を接続する等の非表示エリアであり、狭額縁化のためには、非表示エリアは小さいことが望ましい。また、表示装置の小型化・薄型化の観点から、ディスプレイデバイスの厚みは薄いことが望ましい。 In recent years, many methods have been proposed for wiring from an organic electronic element on the surface of a base material to the back surface of a base material in response to an increase in the screen size of a display device and a narrowing of the frame of the display area. The outer portion of the organic electronic element on the base material is a non-display area for connecting a circuit or the like, and it is desirable that the non-display area is small in order to narrow the frame. Further, from the viewpoint of miniaturization and thinning of the display device, it is desirable that the thickness of the display device is thin.
そこで、基材裏面に回路を形成することが検討されており、例えば、フレキシブル絶縁基板上に複数の導体パターンが形成され、前記フレキシブル絶縁基板にこれら導体パターンと交叉する方向の切り欠き部が形成されてなり、この切り欠き部で前記フレキシブル絶縁基板を折り曲げてなる折り曲げ部を有するフレキシブル配線基板の製造方法において、前記フレキシブル絶縁基板を折り曲げる前に、前記切り欠き部から露出する前記導体パターンに予め保護用樹脂を形成し、この後前記フレキシブル絶縁基板を折り曲げることを特徴とするフレキシブル配線基板の製造方法（例えば、特許文献１参照）などが提案されている。 Therefore, it is considered to form a circuit on the back surface of the base material. For example, a plurality of conductor patterns are formed on the flexible insulating substrate, and a notch portion in a direction intersecting with these conductor patterns is formed on the flexible insulating substrate. In the method for manufacturing a flexible wiring board having a bent portion formed by bending the flexible insulating substrate at the cutout portion, the conductor pattern exposed from the cutout portion is previously formed before the flexible insulating substrate is bent. A method for manufacturing a flexible wiring board (see, for example, Patent Document 1), which comprises forming a protective resin and then bending the flexible insulating substrate, has been proposed.
特許文献１に記載された方法においては、導体パターンと搭載する電子部品とをそれぞれアライメントする必要があることから、アライメント精度に課題があった。そこで、本発明は、基材の表裏両面に回路層を有するアライメント精度に優れた有機電子デバイスを、簡易な工程により製造する方法を提供することを目的とする。
In the method described in
本発明は、基材、樹脂層、有機電子素子および回路層をこの順に有する部位を有する積層体から、積層体端部の基材を除去する除去工程、ならびに、基材を除去した部分の少なくとも樹脂層および回路層を基材側に曲げて基材裏面に接着する接着工程を有する有機電子デバイスの製造方法である。 The present invention comprises a removing step of removing the base material at the end of the laminate from a laminate having a portion having a base material, a resin layer, an organic electronic element, and a circuit layer in this order, and at least a portion from which the base material has been removed. This is a method for manufacturing an organic electronic device having an bonding step of bending a resin layer and a circuit layer toward the base material and adhering them to the back surface of the base material.
本発明の方法によれば、基材の表裏両面に回路層を有する有機電子デバイスを、簡易な工程によりアライメント精度よく製造することができる。 According to the method of the present invention, an organic electronic device having circuit layers on both front and back surfaces of a base material can be manufactured with high alignment accuracy by a simple process.
以下、本発明の内容について詳細に説明する。 Hereinafter, the contents of the present invention will be described in detail.
本発明の有機電子デバイスの製造方法は、基材、樹脂層、有機電子素子および回路層をこの順に有する部位を有する積層体から、積層体端部の基材を除去する除去工程、ならびに、基材を除去した部分の少なくとも樹脂層および回路層を基材側に曲げて基材裏面に接着する接着工程を有する。ここで、積層体端部は、その一部に基材、樹脂層、有機電子素子および回路層をこの順に有する部位を有していればよく、例えば、一部に有機電子素子を有しない部位があってもかまわない。基材上に、樹脂層、有機電子素子および回路層を有する部位を有する積層体を用いることにより、予め基材上に有機電子素子や回路層を位置合わせしておくことができるため、アライメント精度を向上させることができる。かかる積層体から、積層体端部の基材を除去し、除去した部分の少なくとも樹脂層および回路層を基材側に曲げて基材裏面に接着することにより、基材表裏両面を接続する配線を新たに形成する必要がなく、基材の表裏両面に回路層を有する有機電子デバイスを、簡易な工程によりアライメント精度よく製造することができる。なお、接着工程においては、少なくとも樹脂層および回路層を基材側に曲げればよく、基材を除去した部分に有機電子素子を有する場合には、樹脂層および回路層とともに有機電子素子も基材側に曲げ、接着すればよい。 The method for producing an organic electronic device of the present invention includes a removing step of removing a base material at an end of a laminate from a laminate having a portion having a substrate, a resin layer, an organic electronic element, and a circuit layer in this order, and a base. It has a bonding step of bending at least the resin layer and the circuit layer of the portion from which the material is removed toward the base material side and adhering the material to the back surface of the base material. Here, the end portion of the laminate may have a portion having a base material, a resin layer, an organic electronic element, and a circuit layer in this order in a part thereof, and for example, a portion having no organic electronic element in a part thereof. It doesn't matter if there is. By using a laminate having a resin layer, an organic electronic element, and a portion having a circuit layer on the base material, the organic electronic element and the circuit layer can be aligned on the base material in advance, so that the alignment accuracy is correct. Can be improved. Wiring that connects both the front and back surfaces of the base material by removing the base material at the end of the laminate from the laminated body and bending at least the resin layer and the circuit layer of the removed portion toward the base material side and adhering to the back surface of the base material. It is not necessary to newly form the organic electronic device having circuit layers on both the front and back surfaces of the base material, and it is possible to manufacture the organic electronic device with high alignment accuracy by a simple process. In the bonding step, at least the resin layer and the circuit layer may be bent toward the base material, and when the organic electronic element is provided in the portion where the base material is removed, the organic electronic element is also based on the resin layer and the circuit layer. It may be bent to the material side and glued.
図１に、本発明の製造方法により得られる有機電子デバイスの一態様の断面図を示す。基材１の表面から裏面の一部にかけて樹脂層２を有し、樹脂層２上の一部に有機電子素子３を有する。さらに、樹脂層２および有機電子素子３上に、回路層４を有する。なお、図示の都合上、図１において、回路層４は樹脂層２および有機電子素子３上の全面に形成されているが、実際には必要な形状のパターンを有する。
FIG. 1 shows a cross-sectional view of one aspect of an organic electronic device obtained by the production method of the present invention. The
基材は、樹脂層、有機電子素子および回路層を保持するものであり、予めこれらを基材上に有することにより、アライメント精度を向上させることができる。基材としては、例えば、ガラス板や樹脂フィルムなどが挙げられる。アライメント精度をより向上させる観点から、平面状であることが好ましく、無アルカリガラス基板が好ましい。なお、本発明においては、樹脂層、有機電子素子、回路層を形成する側を基材表面、その反対面を基材裏面と記載する場合がある。 The base material holds the resin layer, the organic electronic element, and the circuit layer, and by having these on the base material in advance, the alignment accuracy can be improved. Examples of the base material include a glass plate and a resin film. From the viewpoint of further improving the alignment accuracy, it is preferably flat, and a non-alkali glass substrate is preferable. In the present invention, the side forming the resin layer, the organic electronic device, and the circuit layer may be described as the surface of the base material, and the opposite side may be described as the back surface of the base material.
基材の厚みは、反りを抑制してアライメント精度をより高める観点から、０．３ｍｍ以上が好ましい。一方、基材の厚みは、有機電子デバイスをより薄型化する観点から、１ｍｍ以下が好ましい。基材の５０〜４００℃における線膨張係数は５ｐｐｍ／Ｋ以下が好ましい。ここで、基材の５０〜４００℃における線膨張係数は、熱機械分析装置（エスアイアイ・ナノテクノロジー（株）製 ＥＸＳＴＡＲ６０００ ＴＭＡ／ＳＳ６１００）を用いて、窒素気流下で測定することができる。本発明においては、第１段階において室温から２００℃まで昇温して試料の吸着水を除去し、第２段階において室温まで冷却し、第３段階において、昇温速度５℃／分の条件で室温から４００℃まで昇温しながら本測定を行い、５０〜４００℃における線膨張係数を求めることができる。基材の５０〜４００℃における線膨張係数は、５ｐｐｍ／Ｋ以下がより好ましい。線膨張係数が上記範囲にある基材としては、例えば、ポリイミド樹脂フィルムが挙げられる。 The thickness of the base material is preferably 0.3 mm or more from the viewpoint of suppressing warpage and further improving the alignment accuracy. On the other hand, the thickness of the base material is preferably 1 mm or less from the viewpoint of making the organic electronic device thinner. The coefficient of linear expansion of the base material at 50 to 400 ° C. is preferably 5 ppm / K or less. Here, the coefficient of linear expansion of the base material at 50 to 400 ° C. can be measured under a nitrogen stream using a thermomechanical analyzer (EXSTAR6000 TMA / SS6100 manufactured by SII Nanotechnology Co., Ltd.). In the present invention, the temperature is raised from room temperature to 200 ° C. in the first step to remove the adsorbed water of the sample, cooled to room temperature in the second step, and the temperature rise rate is 5 ° C./min in the third step. This measurement can be performed while raising the temperature from room temperature to 400 ° C. to obtain the coefficient of linear expansion at 50 to 400 ° C. The coefficient of linear expansion of the base material at 50 to 400 ° C. is more preferably 5 ppm / K or less. Examples of the base material having a linear expansion coefficient in the above range include a polyimide resin film.
基材端部には、後述する除去工程において基材を除去する部分に、剥離促進層を有してもよい。剥離促進層を有することにより、除去工程において、基材を容易に除去することができる。剥離促進層を構成する成分としては、例えば、シランカップリング剤などが挙げられる。 A peeling promoting layer may be provided at the end of the base material at a portion where the base material is removed in the removal step described later. By having the peeling promoting layer, the base material can be easily removed in the removing step. Examples of the components constituting the peeling promoting layer include a silane coupling agent and the like.
樹脂層は、基材と有機電子素子や回路層を接着する作用を有する。樹脂層を形成する樹脂としては、例えば、ポリイミド樹脂やその前駆体などが挙げられる。樹脂層には、樹脂に加えてさらに他の成分を含有してもよい。樹脂層は、光硬化性樹脂、熱硬化性樹脂などの硬化性樹脂を含有する硬化性樹脂層であってもよいし、その硬化物であってもよい。例えば、ポリイミド樹脂前駆体の熱硬化物としてポリイミド樹脂などが挙げられる。 The resin layer has an action of adhering the base material to the organic electronic element or the circuit layer. Examples of the resin forming the resin layer include a polyimide resin and a precursor thereof. The resin layer may contain other components in addition to the resin. The resin layer may be a curable resin layer containing a curable resin such as a photocurable resin or a thermosetting resin, or may be a cured product thereof. For example, a polyimide resin or the like can be mentioned as a thermosetting product of the polyimide resin precursor.
樹脂層の厚みは、耐久性を向上させる観点から、１０μｍ以上が好ましい。一方、樹脂層の厚みは、後述する接着工程における取り扱い性の観点から、４０μｍ以下が好ましい。 The thickness of the resin layer is preferably 10 μm or more from the viewpoint of improving durability. On the other hand, the thickness of the resin layer is preferably 40 μm or less from the viewpoint of handleability in the bonding step described later.
有機電子素子としては、例えば、有機発光ダイオードタッチセンサーなどが挙げられる。 Examples of the organic electronic device include an organic light emitting diode touch sensor and the like.
回路層は、有機電子素子の駆動引き出し配線としての作用を有する。回路層としては、例えば、銅配線などの金属配線が好ましい。 The circuit layer acts as a drive lead-out wiring for organic electronic devices. As the circuit layer, for example, metal wiring such as copper wiring is preferable.
本発明の有機電子デバイスの製造方法は、前述の積層体から、積層体端部の基材を除去する除去工程、ならびに、基材を除去した部分の少なくとも樹脂層および回路層を基材側に曲げて基材裏面に接着する接着工程を有する。図２に、本発明の有機電子デバイスの製造方法の一態様の概略図を示す。図２のａ．は、前述の積層体を表し、端部に剥離促進層５を有する基材１上に、樹脂層２、有機電子素子３、回路層４をこの順に有する。図２のｂ．およびｃ．は、積層体端部の基材を除去する工程を表し、破線ａ−ａ’の位置で基材１を切断し、図中の左側の基材１および剥離促進層５を除去する。図２のｄ．は、基材を除去した部分の樹脂層２、有機電子素子３および回路層４を基材１側に曲げて基材１の裏面に接着する接着工程を表す。
The method for producing an organic electronic device of the present invention includes a removing step of removing a base material at an end of the laminate from the above-mentioned laminate, and at least a resin layer and a circuit layer of the portion from which the base material has been removed on the base material side. It has an bonding process of bending and adhering to the back surface of the base material. FIG. 2 shows a schematic view of one aspect of the method for manufacturing an organic electronic device of the present invention. Fig. 2 a. Represents the above-mentioned laminate, and has a
次に、除去工程について説明する。除去工程においては、前述の積層体から、非表示領域となる積層体端部の基材を除去する。 Next, the removal step will be described. In the removing step, the base material at the end of the laminated body, which is a non-display region, is removed from the above-mentioned laminated body.
除去方法としては、基材裏面から基材のみを切断し、切断部より端部側の基材を積層体から剥離することが好ましい。予め基材上に有機電子素子や回路層を位置合わせした状態で基材を除去することができるため、アライメント精度を向上させることができる。基材を除去した部分の少なくとも樹脂層および回路層を基材側に曲げて基材裏面に配するため、除去する部分の基材の長さは、基材の厚さより大きいことが好ましい。なお、基材上に剥離促進層を有する場合、剥離促進層は基材とともに除去することが好ましい。 As a removing method, it is preferable to cut only the base material from the back surface of the base material and peel off the base material on the end side from the cut portion from the laminate. Since the base material can be removed in a state where the organic electronic element and the circuit layer are aligned on the base material in advance, the alignment accuracy can be improved. Since at least the resin layer and the circuit layer of the portion from which the base material has been removed are bent toward the base material side and arranged on the back surface of the base material, the length of the base material of the portion to be removed is preferably larger than the thickness of the base material. When the peeling promoting layer is provided on the base material, it is preferable to remove the peeling promoting layer together with the base material.
基材の切断方法としては、例えば、基材としてガラス板を用いた場合には、ダイヤモンドカッターなどのガラスカッターにより切断して端部を除去する方法や、基材として樹脂フィルムを用いた場合には、レーザーにより切断して端部を除去する方法などが挙げられる。なお、基材の切断面には、面取り加工を施してもよい。接着工程における樹脂層の破損を抑制する観点から、基材の切断面を研磨することが好ましい。図３に、基材の面取り加工の一態様の断面図を示す。破線ｂ−ｂ’の形状に面取り加工することが好ましい。 As a method of cutting the base material, for example, when a glass plate is used as the base material, a method of cutting with a glass cutter such as a diamond cutter to remove the end portion, or a method of using a resin film as the base material is used. Examples include a method of cutting with a laser to remove the end portion. The cut surface of the base material may be chamfered. From the viewpoint of suppressing damage to the resin layer in the bonding step, it is preferable to polish the cut surface of the base material. FIG. 3 shows a cross-sectional view of one aspect of chamfering of the base material. It is preferable to chamfer the shape of the broken line bb'.
基材の剥離方法としては、例えば、機械的に剥離する方法や、レーザー等により樹脂層を変質および／または分解することにより剥離する方法などが挙げられる。このとき、剥離による静電気が発生する場合には、後述する接着工程において、静電気を接着に利用することができる。 Examples of the method of peeling the base material include a method of mechanically peeling and a method of peeling the resin layer by deteriorating and / or decomposing it with a laser or the like. At this time, when static electricity is generated due to peeling, the static electricity can be used for adhesion in the bonding step described later.
次に、接着工程について説明する。接着工程においては、基材を除去した部分の少なくとも樹脂層および回路層を基材側に曲げて基材裏面に接着する。すなわち、基材を除去した部分の少なくとも樹脂層および回路層を、基材側面（切断面）を経由して基材裏面側に折り曲げて基材を包み込み、基材裏面に接着する。基材を除去した部分の樹脂層と回路層の間に有機電子素子を有する場合は、有機電子素子も樹脂層および回路層とともに基材裏面側に配する。 Next, the bonding process will be described. In the bonding step, at least the resin layer and the circuit layer of the portion from which the base material has been removed are bent toward the base material and adhered to the back surface of the base material. That is, at least the resin layer and the circuit layer of the portion from which the base material has been removed are bent toward the back surface side of the base material via the side surface (cut surface) of the base material to wrap the base material and adhere to the back surface of the base material. When the organic electronic element is provided between the resin layer and the circuit layer in the portion where the base material is removed, the organic electronic element is also arranged on the back surface side of the base material together with the resin layer and the circuit layer.
図４に、接着工程の一態様の断面図を示す。図４のａ．は、積層体から積層体端部の基材を除去した状態を表す。図４のｂ．は、基材を除去した部分の樹脂層２、有機電子素子３および回路層４を、基材１の断面に沿って折り曲げた状態を示す。図４のｃ．は、樹脂層２、有機電子素子３および回路層４を、さらに基材１の裏面に沿って折り曲げた状態を示す。この状態で基材１の裏面に樹脂層２を接着することにより、基材の表裏両面に回路層を有する有機電子デバイスを得ることができる。
FIG. 4 shows a cross-sectional view of one aspect of the bonding process. FIG. 4 a. Indicates a state in which the base material at the end of the laminate is removed from the laminate. B. of FIG. Indicates a state in which the
接着方法としては、例えば、接着剤や静電気を用いる方法などが挙げられる。前述の除去工程において静電気が発生する場合には、その静電気を用いて接着することが好ましい。 Examples of the bonding method include a method using an adhesive or static electricity. When static electricity is generated in the above-mentioned removing step, it is preferable to use the static electricity for adhesion.
静電気を用いて接着する場合には、接着後に加熱することが好ましい。また、樹脂層が硬化性樹脂層である場合には、接着工程後に加熱により硬化性樹脂層を硬化することが好ましい。 When bonding using static electricity, it is preferable to heat after bonding. When the resin layer is a curable resin layer, it is preferable to cure the curable resin layer by heating after the bonding step.
本発明の有機電子デバイスの製造方法において、前述の除去工程および接着工程による基材裏面への回路層の形成は、少なくとも一部において実施されていればよい。すなわち、例えば、正方形の有機電子デバイスを製造する場合、正方形の一辺の一部においてのみ基材裏面に回路層を形成してもよいし、四辺全てにおいて基材裏面に回路層を形成してもよい。 In the method for producing an organic electronic device of the present invention, the formation of a circuit layer on the back surface of the base material by the above-mentioned removing step and bonding step may be carried out at least in part. That is, for example, in the case of manufacturing a square organic electronic device, a circuit layer may be formed on the back surface of the base material only on a part of one side of the square, or a circuit layer may be formed on the back surface of the base material on all four sides. Good.
下記実施例において、アライメント精度は以下の方法により評価した。各実施例により得られた有機電子デバイスを、光学顕微鏡（対物レンズ１００倍）を用いて拡大観察し、アライメント精度を評価した。 In the following examples, the alignment accuracy was evaluated by the following method. The organic electronic devices obtained in each example were magnified and observed using an optical microscope (objective lens 100 times), and the alignment accuracy was evaluated.
また、基材の５０〜４００℃における線膨張係数は、熱機械分析装置（エスアイアイ・ナノテクノロジー（株）製 ＥＸＳＴＡＲ６０００ ＴＭＡ／ＳＳ６１００）を用いて、窒素気流下、第１段階において室温から２００℃まで昇温して試料の吸着水を除去し、第２段階において室温まで冷却し、第３段階において、昇温速度５℃／分の条件で室温から４００℃まで昇温しながら本測定を行い、５０〜４００℃における線膨張係数を求めた。 The coefficient of linear expansion of the base material at 50 to 400 ° C. was measured from room temperature to 200 ° C. in the first stage under a nitrogen stream using a thermomechanical analyzer (EXSTAR6000 TMA / SS6100 manufactured by SII Nanotechnology Co., Ltd.). The temperature is raised to 5 ° C. to remove the adsorbed water of the sample, and in the second stage, the sample is cooled to room temperature. In the third stage, the main measurement is performed while raising the temperature from room temperature to 400 ° C. , The coefficient of linear expansion at 50 to 400 ° C. was determined.
（実施例１）
基材として、プラズマ洗浄処理を行った厚み０．５ｍｍ、長方形の無アルカリガラス（ＡＧＣ（株）製ＡＮ１００（商品名））を準備した。この基材の５０〜４００℃における栓膨張係数は４．５ｐｐｍ／Ｋであった。
(Example 1)
As a base material, a rectangular non-alkali glass (AN100 (trade name) manufactured by AGC Inc.) having a thickness of 0.5 mm and having undergone plasma cleaning treatment was prepared. The expansion coefficient of this substrate at 50 to 400 ° C. was 4.5 ppm / K.
この基材上に、ポリアミック酸溶液（東レ（株）製“セミコファイン”（登録商標）ＳＰ−０３０（商品名））を塗布し、酸素濃度１００ｐｐｍ以下の窒素雰囲気、温度５００℃で加熱してポリアミック酸をポリイミドに変換し、膜厚２０μｍの樹脂層を形成した。 A polyamic acid solution (“Semicofine” (registered trademark) SP-030 (trade name) manufactured by Toray Co., Ltd.) is applied onto this substrate and heated in a nitrogen atmosphere with an oxygen concentration of 100 ppm or less and a temperature of 500 ° C. The polyamic acid was converted to polyimide to form a resin layer having a thickness of 20 μm.
その樹脂層上に、有機電子素子として、シリコン窒化膜上にＴＦＴ回路および有機発光ダイオードを形成した。具体的には、まず樹脂層上に、プラズマＣＶＤ法によりシリコン窒化膜４０ｎｍを形成した。続いて、アルミニウム膜を製膜し、ポジレジスト（メルク社製ＳＲ−２１０（商品名））を塗布し、ｇ線露光装置（日立ハイテクノロジー社製ＬＥ５５６５Ａ（商品名））を用いてアライメント露光した後、アルカリ現像液（テトラメチルアンモニウムハイドロキシド（ＴＭＡＨ）２．３８重量％）を用いて現像し、ドライエッチング装置（ＴＥＬ社製ＵＮＩＴＹ ＭＥ（商品名））を用いてドライエッチングを行い、ゲート電極を形成した。続いて、プラズマＣＶＤ法によりシリコン窒化膜のゲート絶縁膜を形成した。続いて、プラズマＣＶＤ法によりシリコン層と、リンを添加したシリコン層を形成し、ゲート電極形成と同様の手順により、レジスト塗布、露光、現像、エッチングを行った。続いて、ゲート電極形成と同様の手順により、アルミニウムを製膜し、レジスト塗布、露光、現像、エッチングを行い、ソース電極、ドレイン電極を形成した。続いて、プラズマＣＶＤ法によりシリコン窒化膜の保護膜を製膜し、ＴＦＴ回路を形成した。さらに、ファインメタルマスクを介して有機発光材料を蒸着した後、透明電極をスパッタにより形成し、有機電子素子を形成した。 A TFT circuit and an organic light emitting diode were formed on a silicon nitride film as an organic electronic element on the resin layer. Specifically, first, a silicon nitride film of 40 nm was formed on the resin layer by a plasma CVD method. Subsequently, an aluminum film was formed, a positive resist (SR-210 (trade name) manufactured by Merck) was applied, and alignment exposure was performed using a g-line exposure apparatus (LE5565A (trade name) manufactured by Hitachi High Technology). After that, it is developed with an alkaline developer (tetramethylammonium hydroxide (TMAH) 2.38% by weight), and dry etching is performed using a dry etching apparatus (UNITY ME (trade name) manufactured by TEL), and the gate electrode is used. Was formed. Subsequently, a gate insulating film of a silicon nitride film was formed by a plasma CVD method. Subsequently, a silicon layer and a silicon layer to which phosphorus was added were formed by a plasma CVD method, and resist coating, exposure, development, and etching were performed by the same procedure as for forming the gate electrode. Subsequently, aluminum was formed into a film by the same procedure as for forming the gate electrode, and resist coating, exposure, development, and etching were performed to form a source electrode and a drain electrode. Subsequently, a protective film of a silicon nitride film was formed by a plasma CVD method to form a TFT circuit. Further, after depositing an organic light emitting material through a fine metal mask, a transparent electrode was formed by sputtering to form an organic electronic device.
さらに、有機電子素子上に銅を製膜し、ポジレジスト（メルク社製ＲＦＰ−３１０Ｋ（商品名））を塗布し、ｇ線露光装置（日立ハイテクノロジー社製ＬＥ５５６５Ａ（商品名ＬＥ５５６５Ａ（商品名））を用いてアライメント露光した後、アルカリ現像液（ＴＭＡＨ２．３８重量％）を用いて現像し、エッチング液（関東化学（株）製Ｃｕ−０２（商品名））を用いてエッチングを行った後、レジスト剥離を行い、回路層を形成し、基材上に、樹脂層、有機電子素子および回路層を有する積層体を得た。 Further, copper is formed on the organic electronic element, positive resist (RFP-310K (trade name) manufactured by Merck Co., Ltd.) is applied, and a g-line exposure apparatus (LE5565A manufactured by Hitachi High Technology Co., Ltd. (trade name) ), Alignment exposure, development with an alkaline developer (TMAH 2.38% by weight), and etching with an etching solution (Cu-02 (trade name) manufactured by Kanto Chemical Co., Ltd.). , The resist was peeled off to form a circuit layer, and a laminate having a resin layer, an organic electronic element and a circuit layer was obtained on the base material.
形成した回路層を、基材の端部から１０ｍｍ以内の部位に引き出したＴＦＴ回路と接続した。この際、回路層とＴＦＴ回路とのアライメント精度は、露光装置のアライメント精度である±１．５μｍであった。 The formed circuit layer was connected to a TFT circuit drawn out within 10 mm from the end of the base material. At this time, the alignment accuracy between the circuit layer and the TFT circuit was ± 1.5 μm, which is the alignment accuracy of the exposure apparatus.
積層体の長辺２辺について、基材の端部から１０ｍｍの部位において、基材裏面からダイヤモンドカッターでスクライブし、約９０°折り曲げることにより基材のみを切断し、切断部の研磨を行った。次に、積層体の端部方向（エッジ方向）へ基材を滑らせながら基材を樹脂層から剥離し、端部の基材を除去した。 Regarding the two long sides of the laminate, scribing from the back surface of the base material with a diamond cutter at a portion 10 mm from the end of the base material, and bending it by about 90 ° to cut only the base material and polish the cut portion. .. Next, the base material was peeled off from the resin layer while sliding the base material toward the end portion (edge direction) of the laminate, and the base material at the end portion was removed.
さらに、基材を除去した部分の樹脂層、有機電子素子、回路層からなる積層部を基材裏面側に折り曲げ、基材裏面基材の剥離により発生した静電気を用いて、樹脂層と有機電子素子と回路層からなる積層部を基材裏面に接着し、有機電子デバイスを得た。前述の方法によりアライメント精度の評価を行ったところ、不良の発生はなく、アライメント精度は良好であった。 Further, the laminated portion consisting of the resin layer, the organic electronic element, and the circuit layer of the portion from which the base material has been removed is bent toward the back surface side of the base material, and the static electricity generated by the peeling of the back surface base material of the base material is used to use the resin layer and the organic electrons. An organic electronic device was obtained by adhering a laminated portion consisting of an element and a circuit layer to the back surface of a base material. When the alignment accuracy was evaluated by the above-mentioned method, no defect occurred and the alignment accuracy was good.
（実施例２）
基材として、プラズマ洗浄処理を行った厚み０．５ｍｍ、長方形の無アルカリガラス（ＡＧＣ（株）製ＡＮ１００（商品名））を準備した。この基材の５０〜４００℃における線膨張係数は４．５ｐｐｍ／Ｋであった。
(Example 2)
As a base material, a rectangular non-alkali glass (AN100 (trade name) manufactured by AGC Inc.) having a thickness of 0.5 mm and having undergone plasma cleaning treatment was prepared. The coefficient of linear expansion of this substrate at 50 to 400 ° C. was 4.5 ppm / K.
この基材の長辺２辺について、端部から１０ｍｍ以内の範囲にシランカップリング剤を塗布した後、基材上に、ポリアミック酸溶液（東レ（株）製“セミコファイン”ＳＰ−０３０（商品名））を塗布し、実施例１と同様に膜厚２０μｍの樹脂層を形成した。その樹脂層上に、シリコン窒化膜の膜厚を１００ｎｍにしたこと以外は実施例１と同様に有機電子素子および回路層を形成し、積層体を得た。形成した回路層を、基材の端部から１０ｍｍ以内の部位に引き出したＴＦＴ回路と接続した。この際、回路層とＴＦＴ回路とのアライメント精度は、露光装置のアライメント精度である±１．５μｍであった。 A silane coupling agent is applied to the two long sides of this base material within a range of 10 mm from the end, and then a polyamic acid solution (“Semicofine” SP-030 manufactured by Toray Industries, Inc. Name)) was applied to form a resin layer having a film thickness of 20 μm in the same manner as in Example 1. An organic electronic element and a circuit layer were formed on the resin layer in the same manner as in Example 1 except that the thickness of the silicon nitride film was set to 100 nm to obtain a laminate. The formed circuit layer was connected to a TFT circuit drawn out within 10 mm from the end of the base material. At this time, the alignment accuracy between the circuit layer and the TFT circuit was ± 1.5 μm, which is the alignment accuracy of the exposure apparatus.
積層体の長辺２辺について、基材の端部から１０ｍｍの部位に、波長３０８ｎｍのレーザーを３００ｍＪ／ｃｍ２照射し、端部の基材を除去した。 With respect to the two long sides of the laminate, a portion 10 mm from the end of the base material was irradiated with a laser having a wavelength of 308 nm at 300 mJ / cm 2 to remove the base material at the end.
さらに、基材を除去した部分の樹脂層と有機電子素子と回路層からなる積層部を基材裏面側に折り曲げ、前記樹脂層と有機電子素子と回路層からなる積層部を、接着剤（ナガセケムテックス（株）製ＸＮＲ５５１６（商品名））を用いて基材裏面に接着し、紫外線波長３６５ｎｍで６Ｊ／ｃｍ２照射し、温度８０℃の条件で１時間加熱することにより接着剤を硬化させ、有機電子デバイスを得た。前述の方法によりアライメント精度の評価を行ったところ、不良の発生はなく、アライメント精度は良好であった。 Further, the laminated portion composed of the resin layer, the organic electronic element and the circuit layer of the portion from which the base material is removed is bent toward the back surface side of the base material, and the laminated portion composed of the resin layer, the organic electronic element and the circuit layer is bonded to an adhesive (Nagase). Adhesive to the back surface of the base material using XNR5516 (trade name) manufactured by Chemtex Co., Ltd., irradiating with 6 J / cm 2 at an ultraviolet wavelength of 365 nm, and heating at a temperature of 80 ° C. for 1 hour to cure the adhesive. , Obtained an organic electronic device. When the alignment accuracy was evaluated by the above-mentioned method, no defect occurred and the alignment accuracy was good.
１ 基材
２ 樹脂層
３ 有機電子素子
４ 回路層
５ 剥離促進層
ａ−ａ’ 基材の切断位置
ｂ−ｂ’ 面取り加工位置
1
Claims (5)
基材を除去した部分の少なくとも樹脂層および回路層を基材側に曲げて基材裏面に接着する接着工程を有する有機電子デバイスの製造方法。 A removal step of removing the base material at the end of the laminate from the laminate having a portion having a substrate, a resin layer, an organic electronic device, and a circuit layer in this order, and
A method for manufacturing an organic electronic device, which comprises a bonding step of bending at least a resin layer and a circuit layer of a portion from which the base material has been removed toward the base material side and adhering the base material to the back surface of the base material.
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