JP2020161791A - Dielectric thin film element, electronic component and electronic circuit board - Google Patents

Abstract

To provide a dielectric thin film element, an electronic component, and an electronic circuit board in which both of DC bias characteristics and withstand voltage characteristics are compatible with each other.SOLUTION: A dielectric thin film element 200 includes: a dielectric film 40 containing an oxide which contains (1) Bi and Ti, (2) at least one element selected from the group consisting of Na and K, and (3) at least one element selected from the group consisting Ba, Sr, and Ca, and has a perovskite structure; a lower electrode 30 provided on a lower surface 40a of the dielectric film 40; and a nickel oxide layer 35 interposed between the dielectric film 40 and the lower electrode 30.SELECTED DRAWING: Figure 1

Description

The present invention relates to dielectric thin film devices, electronic components and electronic circuit boards.

The mounting space for electronic components allowed in an electronic device tends to shrink as the electronic device becomes smaller. Capacitors (often referred to as "capacitors" in Japan) are electronic components that are mounted on many electronic devices, and it is essential that they be made smaller and thinner. The thin film capacitor has thinner base material, dielectric film, insulating film, etc. than the conventional laminated ceramic capacitor by the thick film method, and can be made thinner and thinner. Therefore, thin film capacitors are expected as electronic components to be mounted in a small space with a low profile. Further, capacitors embedded in electronic component boards have been developed in recent years.

Many thin-film capacitors have a smaller electrical capacity than conventional multilayer ceramic capacitors. One of the methods for improving the electric capacity is to reduce the film thickness of the dielectric layer. However, when the film thickness of the dielectric film is reduced, the DC electric field strength applied to the dielectric film increases even if the DC voltage applied to both ends of the dielectric film during actual use is the same. Since a ferroelectric substance such as BaTiO ₃ has a so-called DC bias characteristic that the relative permittivity decreases as the DC electric field strength increases, the electric capacity cannot be improved even if the film thickness is reduced.

Further, if the DC electric field strength is increased by reducing the film thickness of the dielectric film, the risk of element destruction due to the electric field increases, so that high withstand voltage characteristics are also required.

Patent Document 1 discloses that the DC bias characteristic is improved by using a tungsten bronze type composite oxide containing K, Sr, Mg and Nb for the dielectric film.

However, Patent Document 1 shows only the data of relatively low DC electric field strength (3 to 5 V / μm), which is higher in order to make the dielectric film thinner or increase the DC voltage. Correspondence to DC electric field strength is desired.

Patent Document 2 discloses a dielectric composition containing particles having a perovskite-type crystal structure containing Bi, Na, Sr and Ti. Further, in Patent Document 2, at least a part of the particles contained in the dielectric composition has a core-shell structure including a core portion and a shell portion, and the Bi content in the core portion and the shell portion are present. It is disclosed that the DC bias characteristic is improved by defining the ratio of the Bi content. However, in Cited Document 2, only the data of relatively low DC electric field strength (up to 8 V / μm) is shown, and it is desired to cope with higher DC electric field strength. Further, since it is difficult to form the core-shell structure shown in Cited Document 2 in a thin film, it is desired to improve the DC bias characteristic by a means different from the core-shell structure.

Patent Document 3, a conductive substrate having a Ti element on the surface, _Ba formed by hydrothermal synthesis method _{1-x Ca x Zr y Ti} 1-y O 3 ( where, 0 <x <0. It is disclosed that a high relative permittivity and a high withstand voltage characteristic are realized by providing a dielectric thin film represented by 2.0 <y <1). In Patent Document 3, the film is densified by controlling the ratio of Ba to Ca and the ratio of Zr to Ti, and a high relative permittivity and a high dielectric strength are realized. However, in Patent Document 3, the DC bias characteristic is not mentioned at all, and the withstand voltage characteristic is also shown only up to 40 kV / mm (40 V / μm), which does not satisfy the market demand. ..

Japanese Unexamined Patent Publication No. 2000-49045 International release 2017/012800 Japanese Unexamined Patent Publication No. 2000-173349

In all of Patent Documents 1 to 3, the withstand voltage characteristic and the DC bias characteristic cannot be compatible with each other.

The present invention has been made to solve the above problems, and an object of the present invention is to provide a dielectric thin film element, an electronic component, and an electronic circuit board capable of achieving both DC bias characteristics and withstand voltage characteristics.

The dielectric thin film element according to one embodiment of the present invention includes at least one element selected from the group consisting of (1) Bi and Ti, (2) Na and K, and (3) Ba, Sr, and. A dielectric film containing at least one element selected from the group consisting of Ca and containing an oxide having a perovskite structure, a first electrode film provided on one surface of the dielectric film, a dielectric film and a first It is provided with a nickel oxide layer interposed between the electrode film of 1. In the dielectric thin film device according to another form, the thickness of the nickel oxide layer is 30 nm or less.

The electronic component according to one embodiment of the present invention includes the dielectric thin film element. Electronic components according to other forms further include a second electrode film provided on the other side of the dielectric film.

The electronic circuit board according to one embodiment of the present invention includes the dielectric thin film element.

The electronic circuit board according to another form includes the above-mentioned electronic components.

According to the present invention, a dielectric thin film element, an electronic component, and an electronic circuit board capable of achieving both DC bias characteristics and withstand voltage characteristics are provided.

FIG. 1 is a schematic cross-sectional view of a thin film capacitor according to an example of an electronic component according to the present embodiment. FIG. 2 is a schematic cross-sectional view of a thin film capacitor having a form different from that of FIG. FIG. 3A is a schematic cross-sectional view of an electronic circuit board according to an embodiment, and FIG. 3B is an enlarged view of a portion 90A shown in FIG. 3A. Is.

Hereinafter, embodiments of the present invention will be described in detail.

(Dielectric film)
The dielectric film according to the embodiment of the present invention contains an oxide having a perovskite structure.

This oxide includes the following (1) to (3).
(1) Bi and Ti,
(2) At least one element E1 selected from the group consisting of Na and K
(3) At least one element E2 selected from the group consisting of Ba, Sr, and Ca.
The oxide can be adjusted so that the total number of atoms of Bi and the element E1: the total number of atoms of the element E2 is 30:70 to 90:10.

The element E1 may be at least one element selected from the group consisting of Na and K, and may be, for example, Na alone or K only, or a combination of a plurality of elements such as a combination of Na and K. The ratio when the element E1 contains two or more kinds of elements is arbitrary.

The element E2 may be at least one of Ba, Sr, and Ca, for example, Ba only, Sr only, or Ca only, a combination of Ba and Sr, a combination of Ba and Ca, and , Sr and Ca, or all combinations of Ba, Sr, and Ca. The ratio when the element E2 contains two or more kinds of elements is arbitrary.

In the present embodiment, the above oxides have the ratios of the atomic numbers of Bi, Ba, Sr, and Ca to the total atomic numbers of Bi, Ba, Sr, and Ca, respectively, X _Bi , X _Ba , and X, respectively. _When expressed as _Sr and X _Ca , 0.2 ≦ X _Bi / (X _Ba + X _Sr + X _Ca ) ≦ 5 is satisfied. The upper limit is preferably 4.5 or less, and more preferably 4 or less.

The perovskite structure is a crystal structure generally represented by ABX ₃ . The A-site cation is located at the apex of the hexahedral unit cell, the B-site cation is located at the body center of this unit cell, and the X-site anion is located at the face center of this unit cell. In the present invention, cations (bivalent or a combination of monovalent and trivalent) such as Ba ²⁺ , Sr ²⁺ , Ca ²⁺ , Bi ³⁺ , Na ⁺ and K ⁺ are ^{contained in the A} site, and Ti ^{4+ is contained in} the B site. A tetravalent cation such as an ion enters, and a divalent anion such as an O ^2- ion enters the X site.

The oxide may occupy 70% by mass or more of the dielectric film, 80% by mass or more, 90% by mass or more, 95% by mass or more, 99% by mass or more, or 100% by mass. ..

The thickness of the dielectric film is not limited, but can be, for example, 10 nm to 2000 nm, preferably 50 nm to 1000 nm.

Such a dielectric film is excellent in both DC bias characteristics and withstand voltage characteristics. The reason for this is not clear, but the inventors think as follows.

The expression of the relative permittivity in an oxide having a perovskite-type crystal structure is due to the displacement of the ions of each element with respect to the voltage. When the voltage is strong, the displacement of the ions is saturated, and the ratio due to DC bias. The dielectric constant decreases. The combination of the A-site and B-site ions and the oxygen ion bond is important for the ion displacement of the perovskite crystal structure, and the combination of the Bi ion and oxygen ion and the Ti ion and oxygen ion bond. Therefore, it is considered that the magnitude of the DC bias that saturates the displacement of the ions is increased.

Further, the Curie point of the oxide having a perovskite structure containing Bi, Ti and Na (or K) is about 300 ° C., but by containing at least one selected from Ba, Sr, and Ca. , Bi, Ti and Na-containing perovskite-type oxides are considered to have a higher absolute value of relative permittivity and a higher relative permittivity when DC bias is applied as the Curie point approaches room temperature.

In addition to the above oxides, the dielectric film according to the present embodiment may contain trace impurities, subcomponents, and the like within the range in which the effects of the present invention are exhibited. Examples of such a component include Cr, Mo and the like. Further, the dielectric film according to the present embodiment includes Sc (scandium), Y (yttrium), La (lantern), Ce (cerium), Pr (placeodium), Nd (neodymium), Pm (promethium), Sm (samarium). ), Eu (Europium), Gd (Gadolinium), Tb (Terbium), Dy (Dysprosium), Ho (Holmium), Er (Elbium), Tm (Thulium), Yb (Yttrium) and Lu (Lutetium). It may further contain at least one rare earth element of choice. Since the dielectric film further contains rare earth elements, the DC bias characteristics of the dielectric film can be easily improved.

In the present embodiment, the above-mentioned dielectric film is a thin-film dielectric deposition film formed by a known film forming method.

(Thin film capacitor)
Subsequently, with reference to FIG. 1, a thin film capacitor will be described as an example of an electronic component having a dielectric film according to an embodiment of the present invention.

The thin film capacitor 100 according to the embodiment of the present invention has a substrate 10, an adhesive film 20, a lower electrode 30, a nickel oxide layer 35, a dielectric film 40, and an upper electrode 50 in this order.

(substrate)
The substrate 10 supports the adhesion film 20, the lower electrode 30, the nickel oxide layer 35, the dielectric film 40, and the upper electrode 50 formed on the substrate 10. The material of the substrate 10 is not particularly limited as long as it has a mechanical strength sufficient to support each of the above layers. Examples of the substrate 10 are Si single crystal, SiGe single crystal, GaAs single crystal, InP single crystal, SrTIO ₃ single crystal, MgO single crystal, LaAlO ₃ single crystal, ZrO ₂ single crystal, MgAl ₂ O ₄ single crystal, NdGaO ₃ Single crystal substrate such as single crystal; ceramic polycrystal substrate such as Al ₂ O ₃ polycrystal, ZnO polycrystal, SiO ₂ polycrystal; and from Ni, Cu, Ti, W, Mo, Al, Pt and alloys thereof. The metal substrate of choice. A Si single crystal substrate is preferable from the viewpoint of low cost and workability.

The thickness of the substrate 10 can be, for example, 10 μm to 5000 μm. If the thickness is too small, mechanical strength may not be ensured, and if the thickness is too large, there may be a problem that it cannot contribute to the miniaturization of electronic components.

The electrical resistivity of the above-mentioned substrate 10 differs depending on the material of the substrate. When the substrate is made of a material having a low electrical resistivity, a current leak to the substrate 10 side during operation of the thin film capacitor may occur, which may affect the electrical characteristics of the thin film capacitor. Therefore, when the electrical resistivity of the substrate 10 is low, it is preferable to perform an electrical insulation treatment on the surface thereof so that the current during the operation of the capacitor does not flow to the substrate 10.

For example, when the substrate 10 is a Si single crystal substrate, it is preferable that an insulating film is formed on the surface of the substrate 10. As long as sufficient insulation between the substrate 10 and the lower electrode 30 is ensured, the material constituting the insulating film and its thickness are not particularly limited. Examples of materials constituting the insulating film are SiO ₂ , Al ₂ O ₃ , and Si ₃ N _x . The thickness of the insulating film is preferably 0.01 μm or more. The insulating film is preferably provided on the adhesion film 20 side (lower electrode 30 side) of the substrate 10. The insulating film can be formed by a known film forming method such as a thermal oxidation method or a CVD (Chemical Vapor Deposition) method.

(Adhesion film)
The adhesion film 20 is provided between the substrate 10 and the lower electrode 30, and improves the adhesion between the substrate 10 and the lower electrode 30. The material of the adhesion film 20 is not particularly limited as long as the material can sufficiently secure the adhesion between the substrate 10 and the lower electrode 30. For example, when the lower electrode 30 is made of Ni as in the present embodiment, the adhesive film 20 may be made of Ti. The thickness of the adhesive film 20 can be, for example, 5 to 50 nm.

(Lower electrode)
A lower electrode 30 (first electrode film) is formed in a thin film on the substrate 10 via an adhesive film 20. The lower electrode 30 is an electrode that sandwiches the dielectric film 40 together with the upper electrode 50 and functions as a capacitor. The lower electrode 30 is provided on the lower surface 40a (one side) of the dielectric film 40. The lower electrode 30 is made of Ni as an example. The material constituting the lower electrode 30 is not particularly limited as long as it is a conductive material, and is a metal such as Pt, Ru, Rh, Pd, Ir, Au, Ag, Cu, Ni, an alloy thereof, or conductivity. It may be a sex oxide. The thickness of the lower electrode 30 is not particularly limited as long as it functions as an electrode. The thickness of the lower electrode 30 is preferably 10 nm or more, and preferably 300 nm or less from the viewpoint of thinning.

(Nickel oxide layer)
A nickel oxide layer 35 is formed on the lower electrode 30. The nickel oxide layer 35 is interposed between the lower electrode 30 and the dielectric film 40. The nickel oxide layer 35 is made of NiO. The nickel oxide layer 35 causes distortion at the interface between the lower electrode 30 and the dielectric film 40, and the distorted layer functions as a high pressure resistant layer for increasing the pressure resistance. It is considered that the voltage applied to the dielectric film 40 is relaxed by applying a part of the voltage applied to the thin film capacitor 100 to the high withstand voltage layer, and as a result, the withstand voltage of the thin film capacitor 100 is improved.

The thickness of the nickel oxide layer 35 is preferably thick from the viewpoint of withstand voltage. The upper limit of the thickness of the nickel oxide layer 35 is preferably 30 nm or less from the viewpoint of the relative permittivity. The lower limit of the thickness of the nickel oxide layer 35 may be 3 nm or more. The thickness of the nickel oxide layer 35 is measured by processing the thin film capacitor 100 including the nickel oxide layer 35 into a flaky sample with a FIB (focused ion beam) processing device and observing the flaky sample with a TEM (transmission electron microscope). be able to.

The nickel oxide layer 35 may be in the form of a continuous film covering the entire surface of the formed region on the lower electrode 30, or may be in the form of a discontinuous film covering 70% or more of the lower electrode 30 in an arbitrary cross section.

(Dielectric film)
The dielectric film 40 is the above-mentioned dielectric film. An example of the oxide constituting the dielectric film 40 is (Bi _0.5 Na _0.5 ) TiO _3- SrTiO ₃ . As described above, the thickness of the dielectric film 40 can be 10 nm to 2000 nm, preferably 50 nm to 1000 nm. The thickness of the dielectric film 40 may be designed to be thicker than the thickness of the nickel oxide layer 35. The thickness of the dielectric film 40 can be measured by processing the thin film capacitor 100 including the dielectric film 40 into a flaky sample with a FIB processing device and observing the flaky sample with a TEM.

(Upper electrode)
An upper electrode 50 (second electrode film) is formed in a thin film on the dielectric film 40. The upper electrode 50 is an electrode that sandwiches the dielectric film 40 together with the lower electrode 30 described above and functions as a capacitor. The upper electrode 50 is provided on the upper surface 40b (the other surface) of the dielectric film 40.

The material of the upper electrode 50 is not particularly limited as long as it is a conductive material. Examples of the material are metals such as Pt, Ru, Rh, Pd, Ir, Au, Ag, Cu, Ni, alloys thereof, or conductive oxides, even if they are the same as the material of the lower electrode 30. It may be good or different. The upper electrode 50 is made of Ni in this embodiment. The thickness of the upper electrode 50 can be the same as that of the lower electrode 30.

Further, the thin film capacitor 100 may have a protective film 70 for covering the side surface of the dielectric film 40 and the like and blocking the dielectric film 40 from the external atmosphere. An example of the material of the protective film 70 is a resin such as epoxy.

The shape of the thin film capacitor 100 is not particularly limited, but is usually a rectangular parallelepiped shape when viewed from the thickness direction. Further, the dimensions are not particularly limited, and the thickness and length may be appropriate dimensions according to the application.

The lower electrode 30, the nickel oxide layer 35, the dielectric film 40, and the upper electrode 50 form a capacitor portion 60. When the lower electrode 30 and the upper electrode 50 are connected to an external circuit and a voltage is applied between the electrodes, the nickel oxide layer 35 and the dielectric film 40 exhibit a predetermined capacitance and exhibit a function as a capacitor. In particular, in the present embodiment, since the above-mentioned dielectric film 40 is used, both high DC bias characteristics and high withstand voltage can be achieved at the same time.

(Manufacturing method of thin film capacitor)
Next, an example of the method for manufacturing the thin film capacitor 100 shown in FIG. 1 will be described below.

First, the substrate 10 is prepared, and the adhesion film 20 and the lower electrode 30 are formed on the substrate 10 by a known film forming method such as a sputtering method.

After the formation of the lower electrode 30, heat treatment may be performed for the purpose of improving the adhesion between the adhesion film 20 and the lower electrode 30 and improving the stability of the lower electrode 30. As the heat treatment conditions, for example, the heating rate is preferably 10 ° C./min to 3000 ° C./min. The holding temperature during the heat treatment is preferably 200 ° C. to 800 ° C., and the holding time is preferably 5 seconds to 4.0 hours. When the heat treatment conditions are out of the above range, poor adhesion between the adhesion film 20 and the lower electrode 30 and unevenness on the surface of the lower electrode 30 are likely to occur. As a result, the dielectric properties of the dielectric film 40 are likely to be deteriorated.

Subsequently, the nickel oxide layer 35 is formed on the lower electrode 30. In the present embodiment, the nickel oxide layer 35 as a deposited film deposited in the form of a thin film is formed on the lower electrode 30 by a known film forming method.

Known film forming methods for forming the nickel oxide layer 35 include, for example, a vacuum vapor deposition method, a sputtering method, a pulsed laser deposition method (PLD), and a metal-organic chemical vapor deposition method (Metal-Organic Chemical Vapor Deposition). MOCVD), Metalorganic Decomposition (MOD), Zol-Gel method, Chemical Solution Deposition (CSD) and the like are exemplified. The raw materials used for film formation (deposited materials, various target materials, organic metal materials, etc.) may contain trace amounts of impurities, subcomponents, etc. No problem.

For example, when the sputtering method is used, the nickel oxide layer 35 is formed on the lower electrode 30 by using the nickel oxide target. As for the sputtering conditions, high frequency power is preferably 100 W to 300 W, the atmosphere is preferably an argon gas atmosphere, and the substrate temperature is preferably 200 ° C. to 600 ° C. The thickness of the nickel oxide layer 35 can be controlled by the film formation time.

Then, the dielectric film 40 is formed on the nickel oxide layer 35. In the present embodiment, the dielectric film 40 is formed as a deposited film in which the material constituting the dielectric film 40 is deposited in a thin film on the nickel oxide layer 35 by a known film forming method. Known film forming methods for forming the dielectric film 40 include, for example, a vacuum vapor deposition method, a sputtering method, a pulsed laser deposition method (PLD), and a metal-organic chemical vapor deposition method (Metal-Organic Chemical Vapor Deposition). MOCVD), Metalorganic Decomposition (MOD), Zol-Gel method, Chemical Solution Deposition (CSD) and the like are exemplified.

Specifically, the ratio of metal elements in the raw material composition used in each film forming method may be within the above range. The raw materials used for film formation (deposited materials, various target materials, organic metal materials, etc.) may contain trace amounts of impurities, subcomponents, etc. No problem.

For example, when the sputtering method is used, an oxide target having the above metal composition is first prepared. Specifically, powders of compounds containing each metal, for example, carbonates, oxides, hydroxides, etc. are prepared and mixed so that the ratio of metal elements is within the above range to obtain a mixed powder. .. Mixing is preferably carried out in water using, for example, a ball mill. Next, the mixed powder is molded to obtain a molded product. The molding pressure can be, for example, 10 to 200 Pa.

Then, the obtained molded product is fired to obtain a fired product. The firing conditions are such that the holding temperature is 900 to 1300 ° C., the temperature holding time is 1 to 10 hours, and the atmosphere is an oxidizing atmosphere such as air. Finally, the obtained fired body can be processed into a disk shape to obtain a target for sputtering.

Next, the obtained target is sputtered to form the above-mentioned dielectric film as a deposited film on the substrate. The sputtering conditions are not particularly limited, but high frequency (RF) sputtering is preferable, the electric power can be 100 W to 300 W, the atmosphere is preferably an argon gas atmosphere, and the substrate temperature can be preferably room temperature to 200 ° C. ..

It is also preferable to perform rapid thermal annealing (RTA) after forming a dielectric film by sputtering. As conditions for applying RTA, the atmosphere is preferably a nitrogen atmosphere, the heating rate is preferably 100 ° C./min or more, the annealing time is preferably 5 seconds to 120 minutes, and the annealing temperature is 700 ° C. It is preferably 1000 ° C. or lower.

After forming the dielectric film 40, the above-mentioned annealing can be performed if necessary.

Next, a thin film of the material constituting the upper electrode is formed on the formed dielectric film 40 by using a known film forming method (for example, a sputtering method) to form the upper electrode 50.

Through the above steps, as shown in FIG. 1, a capacitor portion (lower electrode 30, nickel oxide layer 35, dielectric film 40, and upper electrode 50) 60 is formed on the substrate 10 via the adhesive film 20. The thin film capacitor 100 is obtained. The protective film 70 that protects the dielectric film 40 may be formed by a known film forming method so as to cover at least the portion where the dielectric film 40 is exposed to the outside.

(Dielectric thin film element)
The dielectric thin film element 200 that can be used in the thin film capacitor 100 described above has the lower electrode 30, the nickel oxide layer 35, and the dielectric film 40 described above in this order.

(Modification example)
Although the embodiments of the present invention have been described above, the present invention is not limited to the above embodiments, and may be modified in various ways within the scope of the present invention.

For example, as shown in FIG. 2, a nickel oxide layer 45 may be further provided on the dielectric film 40. The nickel oxide layer 45 may have the same structure as the nickel oxide layer 35 described above. The thickness of the nickel oxide layer 45 may be the same as or different from the thickness of the nickel oxide layer 35. The nickel oxide layer 45 can be formed by the same manufacturing method as the nickel oxide layer 35. For example, after forming the nickel oxide layer 45 on the dielectric film 40, the above-mentioned annealing treatment can be performed, and then the upper electrode 50 can be formed. In the thin film capacitor 100 shown in FIG. 2, the capacitor portion 60 is composed of a lower electrode 30, a nickel oxide layer 35, a dielectric film 40, a nickel oxide layer 45, and an upper electrode 50.

Further, a dielectric film made of a material different from that of the dielectric film 40 may be further provided between the lower electrode 30 and the upper electrode 50. For example, a plurality of dielectrics can be obtained by forming a laminated structure of an amorphous film or a crystal film such as Si ₃ N _x , SiO _x , Al ₂ O _x , ZrO _x , Ta ₂ O _x and the above-mentioned dielectric film 40. It is possible to adjust the temperature change of impedance and relative permittivity of the entire film.

Further, in the above-described embodiment, the adhesion film 20 is formed in order to improve the adhesion between the substrate 10 and the lower electrode 30, but when the adhesion between the substrate 10 and the lower electrode 30 can be sufficiently ensured. The adhesive film 20 can be omitted. When a metal such as Ni, Cu, or Pt that can be used as an electrode, an alloy thereof, an oxide conductive material, or the like is used as the material constituting the substrate 10, the adhesive film 20 and the lower electrode 30 are omitted. be able to.

Further, the dielectric film according to the present embodiment can be used for electronic components such as piezoelectric elements in addition to capacitors.

(Electronic circuit board)
The electronic circuit board according to this embodiment may include the above-mentioned dielectric thin film element. The electronic circuit board may include the above electronic components including a dielectric thin film element. For example, the electronic circuit board may include the thin film capacitor as an electronic component. Electronic components such as thin film capacitors may be installed on the surface of the electronic circuit board. Electronic components such as thin film capacitors may be embedded in the electronic circuit board. An example of the electronic circuit board is shown in (a) in FIG. 3 and (b) in FIG. The electronic circuit board 90 includes an epoxy-based resin substrate 92, a resin layer 93 covering the epoxy-based resin substrate 92, a thin film capacitor 91 installed on the resin layer 93, and an insulating coating covering the resin layer 93 and the thin film capacitor 91. A layer 94, an electronic component 95 installed on the insulating coating layer 94, and a plurality of metal wirings 96 may be provided. At least a part of the metal wiring 96 may be drawn out to the surface of the epoxy resin substrate 92 or the insulating coating layer 94. At least a part of the metal wiring 96 may be connected to the extraction electrode of the thin film capacitor 91 or the electronic component 95. At least a part of the metal wiring 96 may penetrate the electronic circuit board 90 in the direction from the front surface to the back surface of the electronic circuit board 90.

As shown in FIG. 3B, the thin film capacitor 91 according to the present embodiment has a lower electrode 30, a dielectric film 40 provided on the surface of the lower electrode 30, and a part of the upper surface of the dielectric film 40. And the through electrode 52 provided directly on the surface of the lower electrode 30 through the other portion of the dielectric film 40 (specifically, the rest of the portion where the upper electrode is provided). The insulating resin layer 58 that covers the upper electrode 50, the dielectric film 40, and the penetrating electrode 52, the take-out electrode 54 that penetrates the insulating resin layer 58 and is directly provided on the surface of the penetrating electrode 52, and the insulating resin. A take-out electrode 56 is provided which penetrates the layer 58 and is provided directly on the surface of the upper electrode 50.

The electronic circuit board 90 may be manufactured by the following procedure. First, the surface of the epoxy resin substrate 92 is covered with an uncured resin layer. The uncured resin layer is a precursor of the resin layer 93. The thin film capacitor 91 is installed on the surface of the uncured resin layer so that the base electrode of the thin film capacitor 91 faces the uncured resin layer. By covering the uncured resin layer and the thin film capacitor 91 with the insulating coating layer 94, the thin film capacitor 91 is sandwiched between the epoxy resin substrate 92 and the insulating coating layer 94. The resin layer 93 is formed by thermosetting the uncured resin layer. The insulating coating layer 94 is pressure-bonded to the epoxy resin substrate 92, the thin film capacitor 91, and the resin layer 93 by hot pressing. A plurality of through holes penetrating the laminated substrate are formed. Metal wiring 96 is formed in each through hole. After forming the metal wiring 96, the electronic component 95 is installed on the surface of the insulating coating layer 94. By the above method, the electronic circuit board 90 embedded in the thin film capacitor 91 can be obtained. Each metal wiring 96 may be made of a conductor such as Cu. The uncured resin layer may be a B-stage thermosetting resin (for example, epoxy resin or the like). The B-stage thermosetting resin is not completely cured at room temperature, but is completely cured by heating. The insulating coating layer 94 may be formed of an epoxy resin, a polytetrafluoroethylene resin, a polyimide resin, or the like.

Hereinafter, the present invention will be described in more detail with reference to Examples and Comparative Examples. However, the present invention is not limited to the following examples.

(Example, comparative example)
First, the target for sputtering required for forming the dielectric film was prepared by the solid phase method as follows.

As raw material powders for preparing the target, powders of barium carbonate, strontium carbonate, calcium carbonate, titanium oxide, bismuth oxide, potassium carbonate, and sodium carbonate were prepared. These powders were weighed so that the number of atoms of each metal had the compositions shown in Tables 1, 2 and 3, respectively.

Wet mixing of the weighed raw material powder for target preparation was carried out in a ball mill using water as a solvent for 20 hours. The obtained mixed powder slurry was dried at 100 ° C. to obtain a mixed powder. The obtained mixed powder was press-molded by a press machine to obtain a molded product. The molding conditions were a pressure of 100 Pa, a temperature of 25 ° C., and a pressing time of 3 minutes.

Then, the obtained molded product was fired to obtain a fired product. The firing conditions were a holding temperature of 1100 ° C., a temperature holding time of 5 hours, and an atmosphere of air.

The obtained fired body was processed into a diameter of 80 mm and a thickness of 5 mm by a surface grinder and a cylindrical grinder to obtain a target for sputtering for forming a dielectric film.

Subsequently, a Si wafer having a thickness of 500 μm was heat-treated in a dry atmosphere of an oxidizing gas to form a SiO ₂ film having a thickness of 500 nm on the wafer surface to form a substrate. First, Ti as an adhesion film was formed on the surface of this substrate by a sputtering method so as to have a thickness of 20 nm. Further, a Ni thin film was formed on the adhesion film formed above by a sputtering method so as to have a thickness of 100 nm, and used as a lower electrode.

Next, the nickel oxide layer was formed on the lower electrode by a sputtering method using a nickel oxide target for sputtering so as to have the thickness shown in Tables 1, 2 and 3. The sputtering conditions were atmosphere: Ar, pressure: 1.0 Pa, high frequency power: 200 W, and substrate temperature: 300 ° C. The thickness of the nickel oxide layer was measured at three points by TEM observation of the sample, and the average value was obtained.

Further, a dielectric film having a thickness of 300 nm was formed on the nickel oxide layer by a sputtering method using the target for sputtering prepared above. The sputtering conditions were atmosphere: Ar, pressure: 1.0 Pa, high frequency power: 200 W, and substrate temperature: 100 ° C. After forming the dielectric film, the dielectric film is subjected to rapid thermal anneal treatment (RTA) under a nitrogen atmosphere at 900 ° C. for 1 minute and at a heating rate of 2000 ° C./min. gave.

Next, a Ni thin film was formed on the obtained dielectric film by a sputtering method so as to have a diameter of 200 μm and a thickness of 100 nm using a mask, and used as an upper electrode. Through the above steps, a thin film capacitor having the configuration shown in FIG. 1 was obtained.

The crystal structure of the dielectric film was measured and analyzed by an X-ray diffraction method using an XRD measuring device (Rigaku, Smartlab). As a result, it was confirmed that the dielectric film has a perovskite-type crystal structure.

In addition, the composition of the dielectric film was analyzed using XRF (X-ray Fluorescense Analysis), and it was confirmed that the composition was consistent with the compositions shown in Tables 1, 2 and 3.

For all the obtained thin film capacitors, the relative permittivity when DC bias was applied was measured by the method shown below.

(Relative permittivity)
The relative permittivity when a DC bias is applied is an input at a room temperature of 25 ° C. and a frequency of 1 kHz while applying a DC bias of 10 V / μm in the thickness direction to the thin film capacitor using a digital LCR meter (Hewlet-Packard, 4284A). It was calculated from the capacitance, effective electrode area, inter-electrode distance and vacuum permittivity measured under the condition of signal level (measurement voltage) of 1.0 Vrms (no unit). As the dielectric film, it is preferable that the relative permittivity when DC bias is applied is high, and a sample having a relative permittivity of 600 or more when DC bias is applied is judged to be good. The results are shown in Table 1, Table 2 and Table 3.

(Withstand voltage characteristics)
When a DC voltage was applied to a pair of electrodes of a thin film capacitor at a step-up rate of 1 V / sec starting from 0 V, the voltage when a current of 10 mA or more flowed between the electrodes was defined as the dielectric strength. In this example, the above evaluation was performed on 10 samples, and it was judged that the samples having an average withstand voltage of 40 V / μm or more were good.

As shown in Table 1, it was confirmed that the thin film capacitor provided with the nickel oxide layer has a high relative permittivity when a DC bias is applied and also has a high withstand voltage characteristic.

Further, as shown in Table 2, it was confirmed that a high relative permittivity can be realized when the thickness of the nickel oxide layer is 30 nm or less.

Further, as shown in Examples 9 to 13 shown in Table 3, the present invention is not limited to the dielectric film composed of (Bi _0.5 Na _0.5 ) TiO _3- SrTiO ₃ , and other configurations ((Bi _0.5). Na _0.5 ) TiO _3- BaTIO ₃ , (Bi _0.5 Na _0.5 ) TiO _3- CaTIO ₃ , (Bi _0.5 K _0.5 ) TiO _3- SrTIO ₃ , (Bi _0.5 K _{0) .5} ) It was confirmed that the relative permittivity at the time of applying DC bias was high and the withstand voltage characteristic was also high in TiO _3- BaTIO ₃ and (Bi _0.5 K _0.5 ) TiO _3- CaTIO ₃ ). ..

Example 14 shown in Table 3 shows the results relating to the sample in the form of the thin film capacitor shown in FIG. 2 (that is, the form in which the nickel oxide layer (15 nm thickness) is interposed between the dielectric film and the upper electrode). is there. In Example 14, it was confirmed that the relative permittivity was maintained and the dielectric strength was improved as compared with Example 2.

10 ... Substrate, 20 ... Adhesive film, 30 ... Lower electrode, 35, 45 ... Nickel oxide layer, 40 ... Dielectric film, 50 ... Upper electrode, 90 ... Electronic circuit board, 91, 100 ... Thin film capacitor, 200 ... Dielectric Thin film element.

Claims (6)

(1) Bi and Ti,
(2) At least one element selected from the group consisting of Na and K, and
(3) A dielectric film containing at least one element selected from the group consisting of Ba, Sr, and Ca and containing an oxide having a perovskite structure.
A first electrode film provided on one surface of the dielectric film and
A dielectric thin film device including a nickel oxide layer interposed between the dielectric film and the first electrode film. The dielectric thin film device according to claim 1, wherein the nickel oxide layer has a thickness of 30 nm or less. An electronic component comprising the dielectric thin film device according to claim 1 or 2. The electronic component according to claim 3, further comprising a second electrode film provided on the other surface of the dielectric film. An electronic circuit board comprising the dielectric thin film device according to claim 1 or 2. An electronic circuit board comprising the electronic component according to claim 3 or 4.

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