JP2020161615A - Manufacturing method for package chip - Google Patents

Abstract

To provide a manufacturing method for a package chip capable of suppressing quantity of a burr which is residual between package chips.SOLUTION: A manufacturing method for a package chip includes: a half cut step of cutting a package substrate from one side of the package substrate to a predetermined depth along each predetermined dividing line using an annular cutting blade, thereby forming a half cut groove having a depth which does not reach the other side which is positioned at an opposite side of the one side of the package substrate in a thickness direction of the package substrate and having a V-shaped or curved cross section which is orthogonal to a length direction of each predetermined dividing line, in each of multiple electrodes which are disposed along the predetermined dividing lines; a processing step of applying plating processing to the multiple electrodes after the half cut step; and a full cut step of cutting the half cut groove after the plating processing step, cutting the multiple electrodes in the thickness direction and cutting the package substrate, thereby forming a package chip.SELECTED DRAWING: Figure 5

Description

The present invention relates to a method for manufacturing a package chip, which manufactures a package chip by cutting a package substrate.

A package substrate is formed by coating a plurality of device chips arranged on the base substrate with a sealing material (mold resin) such as resin. As one of the package substrates, a QFN package (Quad For Non-lead package) substrate having a leadless structure is known.

A plurality of electrodes, generally made of copper (Cu), are provided on the surface of the QFN package substrate so as to be exposed along a planned division line (street). Each of the plurality of electrodes is connected to the device chip inside the QFN package substrate via a wire or the like.

The QFN package chip is formed by cutting the QFN package substrate with an annular cutting blade so as to divide the plurality of electrodes along the planned division line. The copper electrode described above is exposed on the side portion of the QFN package chip formed in this way.

The copper electrode is easily oxidized, and once oxidized, the solder wetting property deteriorates. When the solder wetting property deteriorates, it becomes difficult for the electrodes of the QFN package chip to be fixed to a wiring board such as a printed circuit board via solder.

Therefore, a so-called wettable flank is known in which at least a portion of the copper electrode exposed on the side of the QFN package chip is plated in order to prevent deterioration of the solder wetting property. By performing the plating treatment, the mechanical strength of the solder joint portion between the copper electrode and the wiring board is strengthened.

By the way, for cutting the package substrate, for example, a cutting apparatus having a chuck table for holding the package substrate via a dicing tape and a cutting unit on which the above-mentioned cutting blade is mounted is used. The package substrate is cut by cutting a rotating cutting blade into the package substrate held by the chuck table.

When cutting a package substrate to manufacture a wettable flank type package chip, the package substrate may be cut in two steps. First, in the first stage cutting, the first cutting blade is cut into the surface of the base substrate to form a so-called half-cut groove.

More specifically, a half-cut groove having a depth less than the thickness of the package substrate and having a substantially rectangular cross section orthogonal to the planned division line is formed along the planned division line. At this time, the plurality of electrodes exposed along the planned division line are also divided.

After that, the half-cut groove is plated. Next, in the second stage cutting, a so-called full cut is performed on the package substrate by cutting a second cutting blade whose blade thickness is thinner than that of the first cutting blade along the half-cut groove, and the package substrate is cut. Completely cut to form multiple package chips.

During the second stage of cutting, a metal electrode comes into contact with the rotating second cutting blade and is stretched, so that the substantially flat side surface of the annular shape of the second cutting blade and the side surface of the half-cut groove There is a problem that metal burrs that extend like threads are likely to occur in the space between them.

The metal burrs that extend like threads remain between the package chips and fall to unexpected places during the subsequent transportation and mounting of the package chips, causing short circuits between the electrodes of the package chips and between the package chips and the wiring board. It may cause poor bonding. Therefore, there is known a technique of injecting water at a high pressure after cutting in order to remove generated burrs (see, for example, Patent Document 1).

Japanese Unexamined Patent Publication No. 2016-181569

Burrs remaining between the package chips during full cutting may cause short circuits and poor bonding. Therefore, it is preferable to reduce the amount of burrs remaining between the package chips as much as possible.

The present invention has been made in view of the above problems, and an object of the present invention is to provide a method for manufacturing a package chip capable of suppressing the amount of burrs remaining between the package chips.

According to one aspect of the present invention, a device provided in each of a plurality of regions partitioned by a plurality of intersecting planned division lines, and a width arranged along each planned division line and crossing the planned division line. A method for manufacturing a package chip by processing a package substrate having a plurality of electrodes having a predetermined thickness and a predetermined thickness, wherein the package substrate is first cut in an annular shape along each planned division line. By cutting from one surface of the package substrate to a predetermined depth with a blade, the package substrate has a depth that does not reach the other surface located on the opposite side of the one surface of the package substrate in the thickness direction of the package substrate. A half-cut step of forming a half-cut groove having a V-shape or a curved shape with a cross section orthogonal to the longitudinal direction of each planned division line on the plurality of electrodes arranged along each planned division line. After the half-cut step, a plating treatment step of plating the plurality of electrodes, and after the plating treatment step, the half-cut groove is cut to cut the plurality of electrodes in the thickness direction, and the plurality of electrodes are cut. Provided is a method of manufacturing a package chip comprising a full cut step of cutting the package substrate to form a package chip.

Preferably, in the half-cut step, the half-cut groove is formed by the first cutting blade having a V-shape or a curved surface shape whose outer peripheral surface is convex in a cross section passing through the diameter, and in the full-cut step, the first 1 The plurality of electrodes and the package substrate are cut with an annular second cutting blade having a blade thickness thinner than that of the cutting blade.

According to another aspect of the present invention, in the half-cut step, two half-cut grooves are formed along each planned division line, and in the full-cut step, the two half-cuts of each planned division line are formed. The plurality of electrodes and the package substrate are cut along each of the grooves. Preferably, in the half-cut step, the half-cut groove is formed by the first cutting blade having a convex V-shape or curved surface shape on the outer peripheral surface in a cross section passing through the diameter. Further, preferably, in the full cut step, the first cutting blade is positioned in the half cut groove so that the first cutting blade does not come into contact with at least one of the pair of side walls of the half cut groove, and the half is formed. Cut the cut groove.

In the half-cut step according to one aspect of the present invention, half-cut grooves are formed in the plurality of electrodes by cutting the plurality of electrodes arranged along the planned division line. This half-cut groove has a V-shape or a curved surface shape with a cross section orthogonal to the longitudinal direction of each planned division line.

Next, a plating process step is performed, and then a full cut step is performed. Package chips are manufactured by cutting the package substrate along the planned division line in the full cut step. When performing the full cut step, the space between the annular side surface of the cutting blade and the side surface of the half cut groove has the same depth and width as the above-mentioned half cut groove having a V shape or a curved surface shape. The cross section is narrower than that of a half-cut groove having a rectangular shape.

Therefore, in a half-cut groove having a V-shaped or curved cross section, the space where burrs are generated is smaller than that of a half-cut groove having a rectangular cross section, so that the burrs generated in the full cut step are half-cut. It becomes difficult to extend in the space of the groove. Further, as the space of the half-cut groove becomes narrower, the burr extends out of the space of the half-cut groove and easily comes into contact with the cutting blade, and is easily removed as the cutting blade rotates. Therefore, the amount of burrs remaining between the package chips after the full cut step can be reduced.

FIG. 1A is a plan view of the package substrate, FIG. 1B is a bottom view of the package substrate, and FIG. 1C is a side view of the package substrate. It is a partially enlarged view of the plan view of the package substrate of 1st Embodiment. It is a top view of the frame unit of 1st Embodiment. FIG. 4A is a partial cross-sectional side view showing a half-cut step, and FIG. 4B is a partially enlarged view of the vicinity of the outer peripheral surface of the first cutting blade having a V-shaped cross section on the outer peripheral surface. FIG. 4C is a partially enlarged view of the vicinity of the outer peripheral surface of the first cutting blade having a curved cross section on the outer peripheral surface. FIG. 5 is a cross-sectional view taken along the line AA after the half-cut step. FIG. 5 is a cross-sectional view taken along the line AA after the plating process step. FIG. 7A is a cross-sectional view taken along the line AA showing the full cut step, and FIG. 7B is a perspective view of the package chip. It is a flow chart of the manufacturing method of a package chip. FIG. 9 (A) is an enlarged cross-sectional view of a comparative example in which the cross section of the half-cut groove is rectangular, and FIG. 9 (B) is an enlarged cross-sectional view of the half-cut groove having a V-shape. It is an enlarged cross-sectional view in the full cut step of. It is a top view which shows the part of the package substrate of 2nd Embodiment by enlargement. It is a partial cross-sectional side view in CC which shows a half-cut step. It is a partial cross-sectional side view in CC which shows a full cut step.

An embodiment according to one aspect of the present invention will be described with reference to the accompanying drawings. First, a configuration example of the package substrate will be described. 1 (A) is a plan view of the package substrate 11, FIG. 1 (B) is a bottom view of the package substrate 11, and FIG. 1 (C) is a side view of the package substrate 11.

The package substrate 11 of the present embodiment is a QFN package (Quad For Non-lead package) substrate having a leadless structure, but there are no restrictions on the type, material, shape, structure, size, etc. of the package substrate 11. As the package substrate 11, a WL-CSP (Wafer Level Chip Size Package) substrate or another package substrate may be used.

The package substrate 11 has a plate-shaped base substrate 13 having a front surface (that is, one surface of the package substrate 11) 13a and a back surface 13b and formed in a rectangular shape in a plan view. The base substrate 13 is formed by using a metal or resin such as 42 alloy (an alloy of iron and nickel) or copper.

On the surface 13a side of the base substrate 13, it is set a plurality of division lines (streets) 15 having formed in a lattice shape so as to intersect each other a predetermined width W _{A (see} FIG. 2). A plurality of electrodes 17 made of a metal such as copper are arranged so as to be exposed on the surface 13a side along the planned division line 15. Each electrode 17 is transverse to the dividing line 15 having a narrow predetermined width W _B than the width W _A of the dividing line 15 _(see FIG. 2).

A device chip (not shown) including devices such as ICs (Integrated Circuits) and LSIs (Large Scale Integration) is arranged in each of a plurality of regions (that is, device regions 11a) partitioned by a plurality of scheduled division lines 15. Has been done. One device chip is connected to an electrode 17 located around the device chip via a metal wire (not shown) or the like. There are no restrictions on the type, quantity, shape, structure, size, arrangement, etc. of the device chips.

On the surface 13a side of the base substrate 13, one device region group is formed by a plurality of (16 in this embodiment) device regions 11a. In this embodiment, three device region groups are provided along the longitudinal direction of the base substrate 13. An outer peripheral surplus region 11b exists around each device region group.

A resin layer (that is, a mold resin layer) 19 is formed in a region corresponding to each device region group. The resin layer 19 has a predetermined thickness, and one surface of the resin layer 19 is exposed on the surface 13a of the base substrate 13 along the planned division line 15. The other surface of the resin layer 19 is located outside the back surface 13b of the base substrate 13.

The other surface of the resin layer 19 constitutes the back surface 11c of the package substrate 11 (that is, the other surface of the package substrate 11) located on the side opposite to the front surface 13a of the base substrate 13 in the thickness direction of the package substrate 11. The above-mentioned device chip (not shown) is located between the back surface 11c of the package substrate 11 and the back surface 13b of the base substrate 13, and the device chip is covered and sealed by the resin layer 19. ..

FIG. 2 is a partially enlarged view of a plan view of the package substrate 11 of the first embodiment. FIG. 2 shows two scheduled division lines 15 (15a, 15b) parallel to each other and two scheduled division lines 15 (15c, 15d) orthogonal to these two scheduled division lines 15, respectively.

Further, in FIG. 2, the cutting line 11d in the planned division line 15 is shown by a broken line. The cutting line 11d is a region actually cut by the first cutting blade 18 when the package substrate 11 is cut along the planned division line 15 by the first cutting blade 18 (see FIG. 4A) described later. Yes, it has a width narrower than the planned division line 15.

For example, by dividing the package substrate 11 along the cutting line 11d in the planned division line 15, the device regions 11a are separated from each other. As a result, a plurality of package chips 29 (see FIG. 6B) each including a device chip (not shown) sealed by the resin layer 19 can be obtained.

A cutting device 10 (see FIG. 4 (A)) is used to divide the package substrate 11 into a plurality of package chips 29 (see FIG. 6 (B)). In the present embodiment, in order to prevent the package chips 29 from scattering during division, the package substrate 11 is made of metal via a dicing tape 23 (see FIG. 3) before the package substrate 11 is cut by the cutting device 10. A frame unit 27 integrated with the annular frame 25 is formed.

FIG. 3 is a plan view of the frame unit 27 of the first embodiment. The dicing tape 23 includes, for example, a base material layer made of a resin such as polyolefin (PO), polyvinyl chloride (PVC), or polyethylene terephthalate (PET), and a rubber-based or acrylic-based adhesive layer (glue layer). Is a laminated film. The annular frame 25 has an opening 25a having a diameter larger than one side in the longitudinal direction of the base substrate 13.

In order to form the frame unit 27, for example, the package substrate 11 is arranged in the opening 25a of the annular frame 25, and the adhesive layer side of the dicing tape 23 is attached to the back surface 11c of the package substrate 11 and one surface of the annular frame 25. ..

Then, using a cutter (not shown) or the like, a cut is made from the base material layer side so that the diameter is larger than the opening 25a and smaller than the outer diameter of the annular frame 25, and the dicing tape 23 is cut into a circle. As a result, the frame unit 27 is formed.

The package substrate 11 does not necessarily have to be integrated with the annular frame 25 via the dicing tape 23. When the annular frame 25 is not used, for example, a rectangular dicing tape 23 formed in substantially the same size as the package substrate 11 is attached to the back surface 11c side of the package substrate 11. Further, when the back surface 11c side of the package substrate 11 is directly held by using a jig table (not shown), both the dicing tape 23 and the annular frame 25 can be omitted.

Next, with reference to FIGS. 4 (A), 4 (B), 4 (C), 5, 6, 6, 7 (A), 7 (B) and 8, the first embodiment A method for manufacturing the package chip 29 (see FIG. 7B) will be described. FIG. 8 is a flow chart of a method for manufacturing the package chip 29.

In the method of manufacturing the package chip 29, first, the frame unit 27 is conveyed to the cutting device 10 in order to form a half-cut groove on the package substrate 11. FIG. 4A is a partial cross-sectional side view showing the half-cut step (S10).

The cutting device 10 includes, for example, a chuck table 14 for holding the package substrate 11 and two sets of cutting units 16 (that is, one cutting unit 16 and another cutting unit 16) for cutting the package substrate 11. A disk-shaped porous plate (not shown) formed of a porous material and having a plurality of holes is provided on the upper surface side of the chuck table 14.

The surface of the porous plate is formed substantially parallel to the X-axis direction (machining feed direction) and the Y-axis direction (indexing feed direction), and a plurality of holes of the porous plate are formed inside the chuck table 14. It is connected to a suction source (not shown) such as a vacuum pump via a suction path (not shown).

The cutting unit 16 has a spindle (not shown) arranged along the Y-axis direction. A rotary drive source (not shown) such as a motor is connected to one end side of the spindle. An annular cutting blade is attached to the other end of the spindle.

The cutting blade is, for example, a metal bond type blade formed by mixing abrasive grains such as diamond or cBN (cubic Boron Nitride) with metal powder, and then molding and firing this mixture. However, the type of cutting blade is not particularly limited. The cutting blade may be an electroformed bond type blade in which abrasive grains are fixed to the plating layer.

A first cutting blade 18 is mounted on the spindle of one of the two sets of cutting units 16. As shown in FIGS. 4 (B) and 4 (C), the outer peripheral surface of the first cutting blade 18 projects outward in a cross section passing through the diameter of the first cutting blade 18. That is, the outer peripheral surface is convex, and the central portion of the outer peripheral surface protrudes outward from both ends of the outer peripheral surface.

FIG. 4 (B) is a partially enlarged view of the vicinity of the outer peripheral surface of the first cutting blade 18 having a V-shaped cross section of the outer peripheral surface, and FIG. 4 (C) is a third view in which the cross section of the outer peripheral surface is curved. 1 It is a partially enlarged view near the outer peripheral surface of the cutting blade 18a. In the first embodiment, an example in which the first cutting blade 18 is used will be described, but of course, the first cutting blade 18a having a curved surface shape (sometimes referred to as an R shape) may be used.

In the half-cut step (S10), first, the suction source is operated with the package substrate 11 arranged on the chuck table 14 so that the dicing tape 23 is in contact with the holding surface 14a. The dicing tape 23 is sucked by the holding surface 14a due to the negative pressure generated on the holding surface 14a via the suction path, and the package substrate 11 is held by the holding surface 14a via the dicing tape 23.

Next, the first cutting blade 18 rotated at high speed by the rotation drive source is positioned substantially parallel to one scheduled division line 15. After that, while supplying cutting water from a cutting water nozzle (not shown) to the rotating first cutting blade 18, the length b of the first cutting blade 18 from the surface 13a side of the package substrate 11 held on the chuck table 14 (FIG. 4). The first cutting blade 18 and the chuck table 14 are relatively moved along one scheduled division line 15 while cutting only (see (B)).

As a result, the package substrate 11 is cut from the surface 13a to a predetermined depth B along the relative movement path between the first cutting blade 18 and the chuck table 14, and the half-cut groove 21 is formed. FIG. 5 is a cross-sectional view taken along the line AA (see FIG. 2) after the half-cut step (S10).

The half-cut groove 21 is formed in a plurality of electrodes 17 and the like arranged along the planned division line 15. The cut length b of the first cutting blade 18 corresponds to the distance from the surface 13a to the predetermined depth B. The distance from the surface 13a to the predetermined depth B is, for example, smaller than the length from the surface 13a to the bottom of the electrode 17 (that is, the thickness of the electrode 17) in the thickness direction of the package substrate 11.

In the half-cut step (S10), a part of each electrode 17 on the surface 13a side is cut, but not cut. Therefore, the half-cut groove 21 formed in each electrode 17 has a depth that does not reach the back surface 11c, and has an opening on the front surface 13a in a cross section orthogonal to the longitudinal direction of the planned division line 15. It has a V-shape with a bottom on the back surface 11c side.

After forming the half-cut groove 21 along the one scheduled division line 15, the first cutting blade 18 is indexed and fed by a predetermined index amount in the Y-axis direction, and the first cutting blade 18 is adjacent to the Y-axis direction. Positioned on the other scheduled division line 15. After that, a half-cut groove 21 having a concave V-shape is similarly formed in the plurality of electrodes 17 along the other scheduled division lines 15.

As described above, the half-cut groove 21 may be formed by using the first cutting blade 18a having a curved surface whose outer peripheral surface has a convex cross section. In this case, the half-cut groove 21 has a depth that does not reach the back surface 11c, has an opening in the front surface 13a in a cross section orthogonal to the longitudinal direction of the planned division line 15, and has a bottom portion on the back surface 11c side. Has a curved surface shape.

After forming the half-cut grooves 21 along all the planned division lines 15 along one direction, the chuck table 14 is rotated 90 degrees to rotate all the planned division lines 15 along the other direction orthogonal to one direction. The half-cut groove 21 is formed in the same manner along the above. As a result, half-cut grooves 21 are formed in all the electrodes 17.

After the half-cut step (S10), the plating process step (S20) is performed. In the plating treatment step (S20), the plurality of electrodes 17 on which the half-cut grooves 21 are formed are subjected to a plating treatment such as electrolytic plating.

As a result, a thin plating layer 17a made of tin (Sn) is formed on the surfaces of the plurality of electrodes 17 so as not to fill the half-cut groove 21. By forming the plating layer 17a, for example, the copper constituting the electrode 17 is less likely to be oxidized. FIG. 6 is a cross-sectional view taken along the line AA after the plating process step (S20).

After the plating process step (S20), a full cut step (S30) is performed. FIG. 7A is a cross-sectional view taken along the line AA (see FIG. 2) showing the full cut step (S30). In the full cut step (S30), for example, the other cutting unit 16 of the two sets of cutting units 16 is used. An annular second cutting blade 28 is mounted on the spindle of the other cutting unit 16.

The second cutting blade 28 has, for example, the same diameter as the first cutting blade 18. However, the second cutting blade 28 has a blade thickness thinner than that of the first cutting blade 18 in order to prevent the plating layer 17a formed in the half-cut groove 21 from being completely removed.

While supplying cutting water to the second cutting blade 28 from a cutting water nozzle (not shown), the second cutting blade 28 is cut into the bottom of the half-cut groove 21 from the surface 13a side along the planned division line 15. The electrode 17 of the above is cut in the thickness direction thereof, and the base substrate 13 and the resin layer 19 and the like are cut. As a result, the package substrate 11 is cut at the full cut groove 31 as a boundary, and a plurality of package chips 29 are formed. FIG. 7B is a perspective view of the package chip 29.

Next, the difference between the full cut step (S30) between the comparative example and the present embodiment will be described with reference to FIGS. 9 (A) and 9 (B). Both FIGS. 9 (A) and 9 (B) show a cross section of the package substrate 11 on the surface 13a side in a plane orthogonal to the longitudinal direction of the planned division line 15.

FIG. 9A is an enlarged cross-sectional view taken in the full cut step (S30) of the comparative example in which the cross section of the half-cut groove 41 is rectangular. Further, FIG. 9B is an enlarged cross-sectional view of the half-cut groove 21 of the first embodiment in which the cross section of the half-cut groove 21 is V-shaped in the full cut step (S30). Although the plating layer 17a is omitted in FIGS. 9A and 9B, of course, the plating layer 17a may be formed.

The width W and depth B of the half-cut groove 41 of FIG. 9 (A) (comparative example) are the same as the width W and depth B of the half-cut groove 21 of FIG. 9 (B) (first embodiment). .. However, in FIG. 9A (comparative example), the space between the side surface of the second cutting blade 28 and the side surface of the half cut groove 41 is formed due to the rectangular cross section of the half cut groove 41. , The space between the half-cut groove 21 of FIG. 9B (first embodiment) and the side surface of the second cutting blade 28 is wider than the space.

In other words, in the first embodiment, due to the V-shaped cross section of the half-cut groove 21, the space between the side surface of the second cutting blade 28 and the side surface of the half-cut groove 21 is a comparative example. It becomes narrower than.

Therefore, in the first embodiment, the burr 33 generated in the full cut step (S30) is difficult to extend in the space of the half cut groove 21. Further, as the space of the half-cut groove 21 becomes narrower, the burr 33 extends out of the space of the half-cut groove 21 and easily comes into contact with the second cutting blade 28, and is removed as the second cutting blade 28 rotates. It becomes easy to be done. Therefore, the amount of burrs 33 remaining between the package chips 29 after the full cut step (S30) can be reduced.

As described above, the cross section of the half-cut groove 21 is not limited to the V shape. Using the first cutting blade 18 shown in FIG. 4C, the half-cut groove 21 having the same depth as the half-cut groove 21 of FIG. 9B (first embodiment) and having a curved cross section. May be formed.

Even in the case of the half-cut groove 21 having a curved cross section, the burr 33 is difficult to extend in the space of the half-cut groove 21, and the burr 33 extends out of the space of the half-cut groove 21 and is removed by the second cutting blade 28. It becomes easy to be done. Therefore, the amount of burrs 33 remaining between the package chips 29 after the full cut step (S30) can be reduced.

Further, if the cross section of the half-cut groove 21 can be formed so as to have a V-shape or a curved surface shape, the shape of the first cutting blade 18 is not limited to the examples shown in FIGS. 4 (B) and 4 (C). For example, the shape formed by the side surface and the outer peripheral surface in the cross section passing through the rotation center of the first cutting blade 18 may be a rectangular shape. In this case, the V-shaped half-cut groove 21 can be formed by cutting the first cutting blade 18 into the surface 13a with the spindle tilted with respect to the Y-axis.

By the way, between the half-cut step (S10) and the plating treatment step (S20), a cleaning step for removing the burr 33 is performed using a water jet cleaning device (not shown) or a spin cleaning device (not shown). May be good. As a result, the burr 33 generated during the half-cut step (S10) can be removed. Further, the above-mentioned washing step may be performed after the full cut step (S30). As a result, the burr 33 remaining on the package chip 29 or the like can be removed.

Next, the second embodiment will be described. FIG. 10 is an enlarged plan view showing a part of the package substrate 11 of the second embodiment. In the second embodiment, two (that is, two parallel) cutting lines 11d ₁ and 11d ₂ are set along one scheduled division line 15.

For example, when the blade thickness of the cutting blade used in the full cut step (S30) is sufficiently smaller than the width between the adjacent package tips 29, two cutting lines are formed along one planned division line 15. 11d ₁ and 11d ₂ are set.

In the half-cut step (S10) of the second embodiment, the blade thickness is thinner than that of the first cutting blade 18 of the first embodiment, and the first cutting blade 18b has a curved surface shape whose outer peripheral surface is convex in a cross section passing through the diameter. (See FIG. 11). FIG. 11 is a partial cross-sectional side view taken along the line CC (see FIG. 10) showing the half-cut step (S10).

Also in the half-cut step (S10) of the second embodiment, the length b corresponding to the distance from the surface 13a to the predetermined depth B while supplying cutting water from the cutting water nozzle (not shown) to the rotating first cutting blade 18b. Only, the first cutting blade 18b is cut toward the surface 13a. As a result, the half-cut groove 21 having a depth B shallower than the depth from the surface 13a to the bottom of the electrode 17 (that is, the thickness of the electrode 17) in the thickness direction of the package substrate 11 is formed.

However, in the second embodiment, the two half-cut grooves 21 are formed by cutting the first cutting blade 18b into the surface 13a along the _two cutting lines 11d ₁ and 11d ₂ . Each half-cut groove 21 has a pair of side walls 21a substantially perpendicular to the front surface 13a, and a bottom portion 21b forming a curved surface shape from the lower end of each side wall 21a toward the back surface 11c of the package substrate 11.

The first cutting blade 18b is not limited to this example. The outer peripheral surface of the first cutting blade 18b may have a convex V-shape in a cross section passing through the diameter of the first cutting blade 18b. The first cutting blade 18b may be used to form a V-shaped half-cut groove 21 having an opening on the front surface 13a and a bottom on the back surface 11c side.

After the half-cut step (S10), the plating layer 17a is formed in the plating treatment step (S20). After that, a full cut step (S30) is performed. FIG. 12 is a partial cross-sectional side view taken along the line CC (see FIG. 10) showing the full cut step (S30). In the full cut step (S30), the plurality of electrodes 17 and the package substrate 11 are cut along each of the two half-cut grooves 21 located in each scheduled division line 15.

In the full cut step (S30) of the second embodiment, the first cutting blade 18b used in the half cut step (S10) is used. In particular, in the full cut step (S30) of the second embodiment, the first cutting blade 18b is made into the half cut groove 21 so that the first cutting blade 18b does not come into contact with at least one of the pair of side walls 21a of the half cut groove 21. Positioning and cutting the half-cut groove 21.

More specifically, the first cutting blade 18b is positioned on the other side wall 21a so as not to come into contact with one side wall 21a, and the rotating first cutting blade 18b is supplied with cutting water from a cutting water nozzle (not shown). The half-cut groove 21 is cut while cutting the other side wall 21a. This makes it possible to prevent the side surface of the first cutting blade 18b from coming into contact with one of the side wall 21a of the pair of side walls 21a in the full cut step (S30).

Also in the second embodiment, the first cutting blade 18b and one side wall 21a (that is, the side wall 21a that the first cutting blade 18b does not contact) are compared with the rectangular half-cut groove 21 having the same width and the same depth. The space of the half-cut groove 21 located between the two is narrowed.

Therefore, the burr 33 generated in the full cut step (S30) is less likely to extend in the space of the half cut groove 21. Further, as the space of the half-cut groove 21 becomes narrower, the burr 33 extends out of the space of the half-cut groove 21 and easily comes into contact with the first cutting blade 18b, and is removed as the first cutting blade 18b rotates. It becomes easy to be done. Therefore, the amount of burrs 33 remaining between the package chips 29 after the full cut step (S30) can be reduced.

Also in the full cut step (S30) of the second embodiment, the plurality of electrodes 17 are cut in the thickness direction thereof, and the base substrate 13 and the resin layer 19 and the like are cut. The package substrate 11 is cut by the full-cut groove 31 to form a plurality of package chips 29.

In addition, the structure, method, etc. according to the above-described embodiment can be appropriately modified and implemented as long as the scope of the object of the present invention is not deviated.

10 Cutting device 11 Package substrate 11a Device area 11b Outer circumference surplus area 11c Back surface (other surface of package substrate)
11d, 11d ₁ , 11d ₂ Cutting line 13 Base substrate 13a Surface (one side of package substrate)
13b Back side 14 Chuck table 14a Holding surface 15, 15a, 15b, 15c, 15d Scheduled division line (street)
16 Cutting unit 17 Electrode 17a Plating layer 18, 18a, 18b First cutting blade 19 Resin layer (mold resin)
21 half-cut grooves 21a side wall 21b bottom 23 dicing tape 25 annular frame 25a opening 27 frame unit 28 second cutting blade 29 package chip 31 full-cut groove 33 burrs 41 half cut groove b length B depth _{W A,} W B, W width

Claims (5)

A device provided in each of a plurality of areas partitioned by a plurality of intersecting planned division lines, and a plurality of devices arranged along each planned division line and having a width and a predetermined thickness across the planned division line. A method for manufacturing a package chip, which is a method for manufacturing a package chip by processing a package substrate having an electrode.
By cutting the package substrate from one surface of the package substrate to a predetermined depth with an annular first cutting blade along each planned division line, the package substrate is opposite to the one surface of the package substrate in the thickness direction of the package substrate. A half-cut groove having a depth that does not reach the other surface located on the side and having a V-shape or a curved surface shape with a cross section orthogonal to the longitudinal direction of each planned division line is provided in each planned division line. A half-cut step formed on the plurality of electrodes arranged along the line,
After the half-cut step, a plating treatment step of plating the plurality of electrodes and a plating treatment step
After the plating treatment step, the half-cut groove is cut to cut the plurality of electrodes in the thickness direction, and the package substrate is cut to form a package chip. A characteristic method for manufacturing package chips. In the half-cut step, the half-cut groove is formed by the first cutting blade having a V-shape or a curved surface shape whose outer peripheral surface is convex in a cross section passing through the diameter.
The package chip according to claim 1, wherein in the full-cut step, the plurality of electrodes and the package substrate are cut by an annular second cutting blade having a blade thickness thinner than that of the first cutting blade. Manufacturing method. In the half-cut step, two half-cut grooves are formed along each planned division line.
The production of the package chip according to claim 1, wherein in the full cut step, the plurality of electrodes and the package substrate are cut along each of the two half-cut grooves of each planned division line. Method. The third aspect of the invention, wherein the half-cut groove is formed by the first cutting blade having a convex V-shape or a curved surface shape on the outer peripheral surface in a cross section passing through the diameter. How to manufacture package chips. In the full-cut step, the first cutting blade is positioned in the half-cut groove so that the first cutting blade does not contact at least one of the pair of side walls of the half-cut groove, and the half-cut groove is cut. The method for manufacturing a package chip according to claim 4, wherein the package chip is manufactured.

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