JP2020160179A - Phase modulator, and phase modulation method - Google Patents

Abstract

To provide a phase modulator and a phase modulation method that are capable of increasing a modulation amount of a phase without increasing voltage applied from a column data line to a pixel circuit.SOLUTION: A phase modulator that causes incident light to be reflected at a desired angle comprises: a plurality of pixel circuits 21 and a plurality of reflection pixels that are provided at positions where a plurality of column data lines and a plurality of row scan lines, orthogonal to each other, are each crossed; and a liquid crystal 42 in which refraction indexes to incident light are changed by drive voltages applied by the pixel circuits 21. The column data lines output control voltages, which change in a range up to a predetermined maximum voltage VLC, to the pixel circuits 21, and the maximum voltage VLC. The pixel circuits 21 have a charge pump 31 for amplifying the control voltages. In a case where a drive voltage applied to the liquid crystal 42 is a maximum voltage or less, the control voltage is output to the liquid crystal without amplification. In a case where the drive voltage applied to the liquid crystal 42 exceeds the maximum voltage, the maximum voltage is added to the control voltage with the charge pump 31, and the control voltage is output to the liquid crystal 42.SELECTED DRAWING: Figure 3

Description

The present invention relates to a phase modulation device and a phase modulation method.

Conventionally, as disclosed in Patent Document 1, for example, a phase modulation device using LCOS (Liquid Crystal On Silicon) has been proposed. Paragraph [0015] and the like of Patent Document 1 disclose that the voltage applied to each pixel of the LCOS element is controlled to phase-modulate the incident light.

Japanese Unexamined Patent Publication No. 2014-56004

In a device that handles light in the infrared region, long wavelength light must be sufficiently modulated. Therefore, as a means for ensuring a high modulation factor, a liquid crystal material having a high refractive index anisotropy is basically used, but in addition, firstly, the liquid crystal layer is thickened, and secondly, to the liquid crystal. It is possible to increase the applied voltage of. The method of thickening the liquid crystal layer has a demerit that the orientation of the liquid crystal is easily disturbed.

On the other hand, in the technique disclosed in Patent Document 1 described above, since the voltage supplied to each pixel from the drive circuit is limited, it is not possible to increase the amount of modulation when the phase is modulated. When the voltage output from the drive circuit is increased, it is necessary to increase the withstand voltage of the circuit element, and further, there arises a problem that the power consumption is increased.

The present invention has been made to solve such a conventional problem, and an object of the present invention is to suppress an increase in the thickness of the liquid crystal layer and to supply a voltage supplied from a column data line to a pixel circuit. It is an object of the present invention to provide a phase modulation device and a phase modulation method capable of ensuring a sufficient phase modulation amount even in infrared light by increasing the voltage applied to the liquid crystal without increasing the voltage.

In order to achieve the above object, the phase modulator according to the present invention is a phase modulator that reflects incident light at a desired angle, and a plurality of column data lines orthogonal to each other and a plurality of row scanning lines intersect each other. A plurality of pixel circuits provided at the positions to be provided, a plurality of reflection pixels, a liquid crystal provided corresponding to the reflection pixels, and a liquid crystal whose refraction rate with respect to incident light changes depending on a drive voltage supplied from the pixel circuit, and the above. The control circuit includes a control circuit that controls a pixel circuit, and the control circuit has a control voltage that changes in a range up to a predetermined maximum voltage, and a control voltage output unit that outputs the maximum voltage in time divisions. The circuit has a charge pump that amplifies the control voltage, and further amplifies the control voltage output from the control voltage output unit when the drive voltage supplied to the liquid crystal is equal to or less than the maximum voltage. When the drive voltage that is output to the liquid crystal and supplied to the liquid crystal exceeds the maximum voltage, the control voltage and the maximum voltage that are output in time division from the control voltage output unit by the charge pump. It is characterized by including a charge pump control unit that controls to output the added voltage obtained by adding the above to the liquid crystal.

Further, the phase modulation method according to the present invention is a phase modulation method that reflects incident light at a desired angle, and is provided at a position where a plurality of column data lines orthogonal to each other and a plurality of row scanning lines intersect each other. A control voltage that changes within a range up to a predetermined maximum voltage, a step of outputting the maximum voltage in time division, and a step corresponding to each pixel circuit are provided in the plurality of pixel circuits according to the input drive voltage. When the drive voltage supplied to the liquid crystal whose refractive index with respect to the incident light changes is equal to or less than the maximum voltage, the step of outputting the control voltage to the liquid crystal without amplifying it and the drive voltage supplied to the liquid crystal are When the maximum voltage is exceeded, the charge pump includes a step of adding the maximum voltage to the control voltage and outputting the voltage to the liquid crystal.

According to the present invention, it is possible to set a large amount of phase modulation of reflected light without increasing the control voltage supplied from the column data line to the pixel circuit. As a result, it is possible to suppress the thicknessing of the liquid crystal layer for securing the phase modulation amount and the disorder of the liquid crystal orientation due to the thickening of the liquid crystal layer.

FIG. 1 is a plan view showing a configuration of a phase modulation device according to an embodiment of the present invention. FIG. 2 is a side sectional view showing a configuration of a phase modulation device according to an embodiment of the present invention. FIG. 3 is a circuit diagram of a phase modulation device according to an embodiment of the present invention. FIG. 4 is a circuit diagram showing a configuration of each pixel circuit provided in the phase modulation device according to the embodiment of the present invention. FIG. 5 is an explanatory diagram showing the direction of the reflected light reflected by the pixel circuit, where sa1 shows the case where the charge pump is off and sb1 shows the case where the charge pump is on. FIG. 6A is a graph showing each pixel circuit arranged in a matrix, and FIG. 6B is a graph showing a drive voltage supplied to the liquid crystal from each pixel circuit. FIG. 7A is a graph showing the relationship between the gradation set in the liquid crystal and the control voltage supplied to the pixel circuit. FIG. 7B is a graph showing the relationship between the gradation set on the liquid crystal and the drive voltage supplied to the liquid crystal. FIG. 8 is a timing chart showing the operation of the transistors Q2 and the switches S1 to S4 provided in each pixel circuit of the phase modulation device according to the embodiment of the present invention. FIG. 9 is an explanatory diagram showing a modified example of the pixel circuit provided in the phase modulation circuit according to the present embodiment.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a plan view of the phase modulation device according to the embodiment of the present invention, and FIG. 2 is a cross-sectional view in the side direction. As shown in FIGS. 1 and 2, the phase modulation apparatus 101 according to the present embodiment has an LCOS panel structure including a reflection substrate 11, a liquid crystal layer 12, and a facing substrate 13. Then, the light incident from the opposite substrate 13 side (direction of arrow Y1 in FIG. 2) is reflected and separated into a plurality of reflected lights having different phases. In the following, the surface of the reflective substrate 11 and the opposing substrate 13 on the side where the light is incident is referred to as a “light incident surface”.

A plurality of reflective pixels formed of a metal that reflects light (for example, aluminum) are provided on the light incident surface of the reflective substrate 11, and a pixel circuit is provided for each reflective pixel. A plurality of pixel circuits 21 are arranged in the horizontal direction and the vertical direction, respectively, as will be described later in FIG. Each pixel circuit 21 operates under the control of the control circuit 22.

The facing substrate 13 is arranged in parallel with the light incident surface side of the reflective substrate 11 at regular intervals, and is formed of a transparent member (for example, a transparent glass material). That is, the opposed substrate 13 has a function as a transparent substrate. Further, the facing substrate 13 is provided with a transparent electrode. Therefore, the light incident from the light incident surface side of the opposed substrate 13 passes through the transparent member and the transparent electrode and is incident on the liquid crystal layer 12 and the reflective substrate 11.

The liquid crystal layer 12 is arranged in a space sandwiched between the reflective substrate 11 and the opposing substrate 13, and the periphery thereof is sealed with a sealing material 14. Further, for convenience of the following description, the liquid crystal layer 12 is considered to be a liquid crystal 42 (see FIG. 4 described later) divided on each reflective pixel (that is, each pixel circuit 21). The liquid crystal 42 has a pixel electrode having light reflectivity (q1 shown in FIG. 4 described later, that is, a reflective pixel) and a common electrode (q2 shown in FIG. 4 described later, that is, a transparent electrode) arranged so as to be separated from the pixel electrode. ) Is filled and sealed. Then, a voltage output from the pixel circuit 21 (hereinafter referred to as “driving voltage”) is supplied to the pixel electrode q1, and a preset common electrode voltage is supplied to the common electrode q2.

Therefore, the refractive index of the liquid crystal 42 on each reflective pixel with respect to the incident light is determined by the potential difference between the drive voltage applied by each pixel circuit 21 and the common electrode voltage applied to the common electrode q2. It can be changed every 42 or every predetermined number of groups, and the incident light incident from the light incident surface side of the opposing substrate 13 can be reflected in a desired direction.
By gradually changing the refractive index of the liquid crystal 42 on a plurality of continuous reflection pixels from large to small (or small to large), the speed of incident light (phase advance or lag) incident therein can be changed. Due to the difference, the incident light bends and travels, and reflected light at a certain angle can be obtained.

Next, the configuration of each pixel circuit 21 and the control circuit 22 that controls each pixel circuit 21 will be described with reference to the block diagram shown in FIG. 3 and the circuit diagram shown in FIG. In FIG. 3, the control circuit 22 includes a plurality of (m columns, n rows) pixel circuits 21 arranged in a matrix, a horizontal scanning circuit 23, a vertical scanning circuit 24, a charge pump control unit 25, and a control voltage. The output unit 28 is provided. Then, the control circuit 22 outputs an electric signal to each pixel circuit 21 to drive each pixel circuit 21, and applies a drive voltage to the liquid crystal 42 from each pixel circuit 21. Therefore, the refractive index of the liquid crystal 42 on each reflective pixel with respect to the incident light is controlled to be a desired value.

A plurality of pixel circuits 21 are formed in a matrix (m) at each intersection (intersection position) of m column data lines (D1 to Dm) orthogonal to each other and n row scanning lines (G1 to Gn). × n) are arranged. The plurality of pixel circuits 21 are all configured in the same manner. Further, a drive line (L1 to Ln) and a control line (K1 to Kn) are provided in parallel with the row scanning lines (G1 to Gn). The drive lines (L1 to Ln) and control lines (K1 to Kn) are connected to the charge pump control unit 25.

The drive lines (L1 to Ln) are wirings for transmitting control signals for switching on / off of the transistor Q2 (short-circuit switch; see FIG. 4) provided in each pixel circuit 21. Further, the control lines (K1 to Kn) are wirings for transmitting control signals for switching on / off of switches S1 to S4 (see FIG. 4) provided in each pixel circuit 21. As shown in FIG. 4, a plurality of control lines (K1 to Kn) are provided (two of K1-1 and K1-2 in the figure), but in FIG. 3, one control line K1 is provided. It is shown briefly in.

The column data lines (D1 to Dm) are output from the control voltage output unit 28, and the analog voltage (control voltage and maximum voltage VLC) supplied via the voltage supply line X1 is supplied to each pixel circuit 21. It is the wiring of. The row scanning lines (G1 to Gn) are wirings for outputting a row selection signal (scanning signal) to each pixel circuit 21. As will be described later, the "control voltage" indicates a voltage in the range from "0" (minimum voltage) to "VLC" (maximum voltage), and the maximum voltage VLC is the maximum output by the control voltage output unit 28. Indicates the voltage.

FIG. 4 is a circuit diagram showing a detailed configuration of the pixel circuit 21. Here, the configuration of the pixel circuit 21 (referred to as the pixel circuit 21a) arranged at the intersection of the column data line D1 and the row scanning line G1 shown in FIG. 3 will be described. As shown in FIG. 4, the pixel circuit 21a includes transistors Q1 and Q2, a charge pump 31, and an output capacitor C2.

The transistor Q1 is a switching transistor, and is composed of, for example, an N-channel MOSFET (field effect transistor). One terminal (for example, drain) of the transistor Q1 is connected to the column data line D1, and the other terminal (for example, source) is connected to the input terminal p1 of the charge pump 31. Further, the control terminal (for example, the gate) of the transistor Q1 is connected to the row scanning line G1. Therefore, when the row scanning line G1 is selected and the control voltage is input from the column data line D1, this control voltage is supplied to the input terminal p1 of the charge pump 31.

The transistor Q2 is also a switching transistor like the transistor Q1 described above, and is composed of, for example, an N-channel MOSFET (field effect transistor). One terminal (for example, drain) of the transistor Q2 is connected to the input terminal p1 of the charge pump 31, and the other terminal (for example, the source) is connected to the output terminal p2 of the charge pump 31.

Further, the control terminal (for example, a gate) is connected to the drive line L1. Therefore, when a voltage of "H" level is supplied to the drive line L1, the transistor Q2 is turned on and the input terminal p1 and the output terminal p2 of the charge pump 31 are short-circuited. That is, the function of the charge pump 31 can be stopped. On the contrary, when the drive line L1 is supplied with the "L" level voltage, the transistor Q2 is turned off. Therefore, the input terminal p1 and the output terminal p2 of the charge pump 31 are opened, and the charge pump 31 can be operated.

That is, the transistor Q2 has a function as a short-circuit switch that short-circuits the input terminal p1 to which the control voltage is supplied to the charge pump 31 and the output terminal p2 to output the voltage (drive voltage) from the charge pump 31 to the liquid crystal 42. ing. Then, when the drive voltage for setting the liquid crystal 42 to a desired refractive index is equal to or less than the maximum voltage VLC (maximum voltage) supplied from the column data line D1, the charge pump control unit 25 (see FIG. 3) By control, the transistor Q2 is short-circuited. That is, the control voltage is not amplified by the charge pump 31. When the drive voltage exceeds the maximum voltage VLC, the transistor Q2 is opened. That is, the control voltage can be amplified by the charge pump 31.

The charge pump 31 includes four switches S1 to S4 and a capacitor C1 for accumulating electric charges, and amplifies the control voltage supplied to the input terminal p1 and outputs the control voltage to the output terminal p2.

The switch S1 (first switch) and the switch S3 (third switch) are connected in series with each other, the end on the switch S1 side is connected to the input terminal p1, and the end on the switch S3 side is connected to the output terminal p2. .. Further, the switch S2 (second switch) and the switch S4 (fourth switch) are connected in series with each other, the end on the switch S2 side is connected to the input terminal p1, and the end on the switch S4 side is connected to the ground. ..

Further, a capacitor C1 (first capacitor) is provided between the connection point between the switches S1 and S3 and the connection point between the switches S2 and S4. That is, one end of the capacitor C1 is connected to the switches S1 and S3, and the other end of the capacitor C1 is connected to the switches S2 and S4.

The output terminal p2 is connected to the ground via the output capacitor C2 and is connected to the pixel electrode q1 of the liquid crystal 42. Further, as described above, the common electrode q2 of the liquid crystal 42 is a transparent electrode provided on the transparent glass. A common electrode voltage is applied to the transparent electrode.

Further, the control line K1-1 is connected to the switches S1 and S4, and the control line K1-2 is connected to the switches S2 and S3. Then, the on / off of the switches S1 to S4 is controlled by the control signals supplied from the control lines K1-1 and K1-2. Although FIG. 4 shows a configuration in which two control lines K1-1 and K1-2 are provided, a control line (four control lines) may be provided for each of the switches S1 to S4.

The liquid crystal 42 is driven according to the potential difference between the drive voltage given to the pixel electrode q1 from the pixel circuit 21 and the common electrode given to the common electrode q2. Therefore, the incident light incident on the liquid crystal 42 is phase-modulated according to the potential difference and reflected.

FIG. 5 is an explanatory diagram schematically showing an angle between the incident light incident on the pixel circuit 21 and the reflected light reflected by the reflected pixel 20 corresponding to the pixel circuit 21. In FIG. 5, reference numeral st indicates incident light incident from a direction orthogonal to the reflected pixel 20 provided for each pixel circuit 21, reference numeral sa1 indicates reflected light reflected by the reflecting electrode at an angle θa, and reference numeral sb1. Indicates the reflected light reflected at an angle θb. The same phase plane of the incident light st (the plane whose normal direction is the incident light st) is r1, the phase plane of the reflected light sa1 is ra1, and the same phase plane of the reflected light sb1 is rb1.

As shown in FIG. 5, the incident light st is irradiated from a direction substantially orthogonal to the reflective pixel 20, and is incident on the liquid crystal 42. Further, the refractive index of the liquid crystal 42 changes according to the drive voltage applied to the liquid crystal 42 by the pixel circuit 21. For example, when the maximum of the conventional drive voltage is the voltage Va, the reflection angle of the reflected light sa1 obtained when the voltage is gradually changed from the minimum voltage Vmin to the voltage Va in the continuous pixel circuit 21 is θa. On the other hand, when the charge pump 31 is driven, the maximum drive voltage is Vb (Vb> Va), and the reflected light sb1 reflected at a larger reflection angle θb can be obtained.

At this time, for example, a large refractive index nmax is obtained in the liquid crystal on the pixel to which Vmin is applied, and the liquid crystal on the pixel to which the maximum voltage Va is applied changes to, for example, a small refractive index na. Since the light incident on the liquid crystal having the refractive index na travels faster than the light incident on the liquid crystal having the refractive index nmax, the reflected light is emitted by bending at an angle θa. On the other hand, since the liquid crystal on the pixel to which the voltage Vb is applied has a refractive index nb smaller than na, the incident light travels even faster. Therefore, the reflected light is emitted at a larger angle of θb.

Returning to FIG. 3, the horizontal scanning circuit 23 provided in the control circuit 22 includes a shift register circuit 26 and a switch circuit 27 including switches SW1 to SWm.

The shift register circuit 26 inputs a horizontal synchronization signal (HST) and a clock signal for horizontal scanning (HCK1, HCK2). The shift register circuit 26 sequentially shifts the clock signals based on the horizontal synchronization signal and the clock signal for horizontal scanning, and outputs the switching signal (this is referred to as “SD1 to SDm”) to the switch circuit 27. It is generated in a cycle of one horizontal scanning period.

The switch circuit 27 includes m switches SW1 to SWm for switching on / off of each column data line (D1 to Dm). Further, the switches SW1 to SWm are controlled to be on or off based on the switching signal (SD1 to SDm) output from the shift register circuit 26. The switches SW1 to SWm are provided corresponding to the column data lines (D1 to Dm), and the control voltage "d" corresponding to each column data line is sequentially input.

The switches SW1 to SWm selectively apply a control voltage corresponding to each column data line (D1 to Dm) to the column data line. For example, the switch SW1 is turned on when the switching signal SD1 is at a high level, selects a control voltage corresponding to the column data line D1, and outputs the selected control voltage to the column data line D1.

The control voltage output unit 28 outputs an analog voltage in the range of "0" (minimum voltage) to "VLC" (maximum voltage) (this is referred to as a control voltage) and a maximum voltage VLC in time division. Specifically, as shown in FIG. 8 (e) described later, either the control voltage Vh, which is a voltage between “0” and “VLC”, or the maximum voltage VLC is output. Further, as will be described later, when the drive voltage supplied to the liquid crystal 42 is equal to or less than the maximum voltage VLC, the control voltage Vh is continuously output as shown at times t0 to t1 in FIG. 8 (e). When the drive voltage exceeds the maximum voltage VLC, the control voltage Vh and the maximum voltage VLC are output in time division as shown in time t1 to t4 of FIG. 8 (e).
The voltage (control voltage or maximum voltage) output from the control voltage output unit 28 is supplied to each column data line (D1 to Dm) from the voltage supply line X1.

In the present embodiment, a double voltage (2 * VLC), which is twice the maximum voltage VLC, is set, and k gradation (k gradation (2 * VLC) is set within the range of the voltage "0" to the double voltage "2 * VLC". However, k is an integer of 3 or more). Then, by switching the drive and stop of the charge pump 31, the control voltage (voltage in the range of 0 to VLC) supplied from the column data line is in the above-mentioned k gradation voltage (range of 0 to 2 * VLC). It is controlled to be (voltage).

Hereinafter, a detailed description will be given with reference to FIG. 7A. In FIG. 7A, the horizontal axis shows the above-mentioned k gradation (5 gradations in this example), and the vertical axis shows the control voltage (control voltage output) supplied from the voltage supply line X1 to the pixel circuit 21 via the column data line. It is a graph which shows the control voltage output from a part.

Graph R1 shown in FIG. 7A shows the characteristics when the drive voltage supplied to the liquid crystal 42 is the maximum voltage VLC or less, and graph R2 shows the characteristics when the drive voltage supplied to the liquid crystal 42 is the maximum voltage VLC or more. It shows. Although the graphs R1 and R2 show an example in which the voltage changes linearly, the present invention is not limited to this, and the change may be monotonously increasing in the range of 0 to VLC.

For example, when the number of gradations of the drive voltage supplied to the liquid crystal 42 is "5" (that is, k = 5), the above-mentioned double voltage (2 * VLC) is divided into five equal parts and the gradations 1 to 1. Gradation 5 is set. Therefore, the double voltage (2 * VLC) is divided into five equal parts, and the gradation 1 is (1/5) * 2 * VLC voltage, and the gradation 2 is (2/5) * 2 * VLC voltage, gradation. The control voltage is (3/5) * 2 * VLC voltage as 3, the (4/5) * 2 * VLC voltage as the gradation 4, and the (5/5) * 2 * VLC voltage as the gradation 5. It suffices if it is supplied to the pixel circuit 21.

However, since the control voltage corresponding to the gradations 3 to 5 described above exceeds the maximum voltage VLC, the control voltage corresponding to the gradations 3 to 5 is applied to the pixel circuit from the voltage supply line X1 shown in FIG. 21 cannot be supplied. In the present embodiment, for gradations 3 to 5, a voltage obtained by subtracting the maximum voltage VLC from each voltage is output as a control voltage, and then the maximum voltage VLC is added by the charge pump 31. That is, the control voltage of (1/5) * VLC as the gradation 3, (3/5) * VLC as the gradation 4, and VLC as the gradation 5 is output, and the charge pump provided in each pixel circuit 21 is provided. The maximum voltage VLC is added by 31 and output to the liquid crystal 42.

That is, when the control voltage for obtaining the desired gradation is equal to or less than the maximum voltage VLC (in the case of gradations 1 and 2), as shown in the graph R1 of FIG. 7A, the control voltage is driven without being amplified. It is output to the liquid crystal 42 as a voltage. In this case, the control voltage output unit 28 outputs only the control voltage Vh as shown at times t0 to t1 in FIG. 8 (e).

On the other hand, when the voltage for obtaining the desired gradation exceeds the maximum voltage VLC (in the case of gradations 3, 4, and 5), the maximum voltage VLC is subtracted from this voltage as shown in Graph R2 of FIG. 7A. The voltage is supplied to the pixel circuit 21 as a control voltage, and then the maximum voltage VLC is added by the charge pump 31 to obtain a desired drive voltage (additional voltage). In this case, the control voltage output unit 28 outputs the control voltage Vh and the maximum voltage VLC in time division as shown at times t1 to t4 in FIG. 8 (e).

In other words, in the charge pump control unit 25, the voltage corresponding to an arbitrary gradation is the maximum voltage VLC among a plurality of preset gradations in the range up to a voltage (double voltage) larger than the maximum voltage VLC. In the following cases, the control voltage is output to the liquid crystal 42 without being amplified. On the other hand, when the voltage corresponding to an arbitrary gradation exceeds the maximum voltage VLC among a plurality of gradations, the control voltage is amplified by the charge pump 31 (adding the maximum voltage VLC) and output to the liquid crystal 42. Control to do.

In this way, by controlling the on / off of each switch SW1 to SWm provided in the switch circuit 27 and controlling the drive of the charge pump 31, the pixel circuit 21 has k gradation (5 in the above example). A drive signal corresponding to the gradation) can be generated and supplied to the liquid crystal 42. That is, as shown in the graph R3 of FIG. 7B, it is possible to output the drive voltage of the gradation 1 to the gradation 5 obtained by dividing the double voltage (2 * VLC) into 5 equal parts to the liquid crystal 42. ..

Returning to FIG. 3, row scanning lines (G1 to Gn) are connected to the vertical scanning circuit 24. The vertical scanning circuit 24 inputs a vertical synchronization signal (VST) and a clock signal for vertical scanning (VCK1, VCK2). The vertical scanning circuit 24 sequentially supplies a row selection signal (scanning signal) from the row scanning line G1 to the row scanning line Gn based on the vertical synchronization signal and the clock signal for vertical scanning in a cycle of one horizontal scanning period. ..

The charge pump control unit 25 outputs a drive signal to each drive line (L1 to Ln) shown in FIG. Specifically, when the voltage corresponding to an arbitrary gradation is equal to or less than the maximum voltage VLC among a plurality of gradations set within a range up to a voltage larger than the maximum voltage VLC (2 * VLC) (for example, In the case of gradations 1 and 2 described above), an "H" level signal is output to the drive line. Further, when the voltage corresponding to an arbitrary gradation exceeds the maximum voltage VLC among a plurality of gradations (for example, in the case of gradations 3 to 5 described above), an "L" level signal is transmitted to the drive line. Output.

Further, the charge pump control unit 25 does not drive the charge pump 31 when an "H" level signal is supplied to the drive line, and charges when an "L" level signal is supplied to the drive line. The pump 31 is controlled to be driven. The operation of the charge pump 31 will be described below.

When the charge pump 31 is driven, the charge pump control unit 25 sends a control signal for controlling on / off of each of the switches S1 to S4 shown in FIG. 4 by a control line K1 (K1-1, K1-2). Output to. Specifically, in the case of driving the charge pump 31, when the control voltage output from the control voltage output unit 28 is supplied, the switches S1 and S4 are first turned on, and the switches S2 and S3 are turned off.

Therefore, the supplied control voltage is stored in the capacitor C1. After that, when the maximum voltage VLC is supplied from the control voltage output unit 28, the switches S1 and S4 are turned off and the switches S2 and S3 are turned on. As a result, the maximum voltage VLC supplied from the column data line D1 is added to the control voltage stored in the capacitor C1, and the added voltage is stored in the output capacitor C2. Then, the voltage after addition is output to the pixel electrode q1. That is, it is possible to obtain a driving voltage in five stages of gradations 1 to 5 supplied to the liquid crystal 42.

Then, in the phase modulation apparatus 101 according to the present embodiment, a block composed of several pixel circuits among the (n × m) pixel circuits 21 provided in FIG. 3 is set. For example, as shown in FIG. 6A, a block composed of a pixel circuit 21 (5 rows × 6 columns) is set. In FIG. 6A, a suffix “-nm” is added to specify the row (n) and the column (m) of each pixel circuit 21. Therefore, the 1-row, 1-column pixel circuits shown in FIG. 6A are 21-11, and the 1-row, 5-row, and 6-column pixel circuits are 21-56.

In FIG. 6A, the same voltage is supplied to the six pixel circuits 21-11 to 21-16 in the same row. For example, the pixel circuits 21-11 to 21-16 are supplied with a control voltage corresponding to gradation 1 among gradations 1 to 5. Further, in the vertical direction, the gradation is set so as to gradually increase from the top to the bottom in the figure, and the control voltage corresponding to the gradation 5 is supplied to the pixel circuits 21-51 to 21-56 in the lowermost stage.

Specifically, as shown in FIG. 6B, in each of the pixel circuits 21-11 to 21-51 arranged in the vertical direction, the drive voltage supplied to each liquid crystal 42 corresponds to the gradation 1 to the gradation 5. It is set to change in stages. Therefore, the six pixel circuits 21 can be grouped into one group, and the reflectance can be changed in five ways, and thus the reflected light phase-modulated in five ways can be obtained.

[Explanation of operation of this embodiment]
Next, the operation of the phase modulation device 101 according to the present embodiment configured as described above will be described with reference to the graphs shown in FIGS. 7A and 7B and the timing chart shown in FIG. FIG. 7B is a graph showing the relationship between the gradation set in five stages and the drive voltage supplied to the liquid crystal 42. Further, as shown in FIG. 6A, an example of having each pixel circuit 21 arranged in a 6 × 5 matrix and reflection pixels corresponding to each pixel circuit 21 will be described below.

The control voltage output unit 28 shown in FIG. 3 outputs the control voltage in the range of “0” to the maximum voltage “VLC” and the maximum voltage VLC to the voltage supply line X1 in a time-division manner.

Further, the horizontal scanning circuit 23 controls the on / off of the switches SW1 to SWm (here, m = 6) provided in the switch circuit 27 to control the control voltage or the maximum voltage supplied from the voltage supply line X1. The VLC is supplied to the desired column data line.

Further, by driving the vertical scanning circuit 24, a scanning line corresponding to the desired pixel circuit 21 is selected from the line scanning lines (G1 to Gn) (here, n = 5). As a result, the control voltage and the maximum voltage VLC can be supplied to the desired pixel circuit 21.

For example, the voltage "0 to 2 * VLC" in the range from "0" to twice the maximum voltage is divided into five gradations (that is, k = 1 to 5), and 1 shown in FIG. 6A. The voltage "(1/5) * 2 * VLC" of gradation 1 is supplied to the pixel circuits 21-11 to 21-16 in the second line, and the gradation 2 is supplied to the pixel circuits 21-21 to 21-26 in the second line. The voltage of "(2/5) * 2 * VLC" is supplied.

Further, a voltage of gradation 3 is supplied to the pixel circuits 21-31 to 21-36 on the third line. In this case, the voltage supplied to the pixel circuit becomes "(3/5) * 2 * VLC", which exceeds the maximum voltage VLC. Therefore, as shown in the graph R2 of FIG. 7A, the voltage obtained by subtracting the maximum voltage VLC from each voltage is output as the control voltage. Further, by driving the charge pump 31, the maximum voltage VLC is added to the control voltage to generate a voltage of "(3/5) * 2 * VLC", which is a voltage of gradation 3.

Similarly, for the pixel circuits 21-41 to 21-46 on the 4th line and the pixel circuits 21-51 to 21-56 on the 5th line, the voltage obtained by subtracting the maximum voltage VLC from each voltage is output as the control voltage. After that, the maximum voltage VLC is added by the charge pump 31 to generate voltages of gradation 4 and gradation 5.

Next, the operation in the pixel circuit 21 will be described with reference to the timing chart shown in FIG. As an example, the operation of the charge pump 31 in the pixel circuit 21a connected to the column data line D1 and the row scanning line G1 will be described.

When the pixel circuit 21a is set to the gradation 1 described above, the charge pump 31 is not operated. In this case, as shown at times t0 to t1 in FIGS. 8A, 8B, and 8C, the charge pump control unit 25 outputs an H level signal to the drive line L1 to output the transistor Q2. It is turned on, and controls are made so that all the switches S1 to S4 are turned off. Further, as shown in FIG. 8D, the transistor Q1 is turned on. Further, as shown in FIG. 8E, the control voltage output unit outputs a control voltage Vh in the range of “0” to “VLC”.

When the transistor Q2 is turned on, the input terminal p1 and the output terminal p2 of the charge pump 31 are short-circuited, so that the control voltage supplied from the column data line D1 is not amplified by the charge pump 31, and the liquid crystal 42 Is output to. Therefore, as shown by the reference numeral z1 in FIG. 7B, the voltage of "(1/5) * 2 * VLC" can be supplied to the liquid crystal 42.

Further, also when the pixel circuit 21a is set to the gradation 2, the charge pump 31 is not operated in the same manner, and as shown by the reference numeral z2 in FIG. 7B, the control voltage supplied from the column data line D1 is not amplified. Output. As a result, a voltage of "(2/5) * 2 * VLC" can be applied to the liquid crystal 42.

When the pixel circuit 21 is set to the gradation 3, the control voltage output unit 28 outputs the voltage “(1/5) * VLC” corresponding to the gradation 3 to the column data line D1 as the control voltage. Further, the control voltage output unit 28 outputs the maximum voltage VLC. Then, the above control voltage and the maximum voltage VLC are added by the charge pump 31.

Specifically, as shown in FIG. 8A, the charge pump control unit 25 switches the signal supplied to the drive line L1 from the H level to the L level at time t1. As a result, the transistor Q2 is turned off. Further, as shown in FIGS. 8B and 8C, the charge pump control unit 25 sets a control signal for turning on the switches S1 and S4 and turning off the switches S2 and S3 at time t2. Output to control line K1 (K1-1, K1-2).

As a result, the control voltage "(1/5) * VLC" is accumulated in the capacitor C1. Then, at time t2, the switches S1 and S4 are turned off, and at time t3, the switches S2 and S3 are turned on. Further, as shown in FIG. 8E, at time t3, the voltage output from the control voltage output unit 28 switches from the control voltage to the maximum voltage VLC. As a result, the voltage "(3/5) * 2 * VLC" obtained by adding the maximum voltage VLC to the above control voltage is accumulated in the output capacitor C2. Therefore, as shown by the reference numeral z3 in FIG. 7B, the driving voltage “(3/5) * 2 * VLC” of the gradation 3 can be supplied to the liquid crystal 42.

Further, also in the case where the pixel circuit 21a is set to the gradation 4, by operating the charge pump 31 in the same manner, the liquid crystal is driven by “(4/5) * 2 * VLC” as shown by the reference numeral z4 in FIG. 7B. A voltage can be supplied.

Further, even when the pixel circuit 21a is set to the gradation 5, the charge pump 31 can be operated in the same manner to supply a driving voltage of “2 * VLC” to the liquid crystal as shown by the reference numeral z5 in FIG. 7B. it can.

[Explanation of the effect of this embodiment]
In this way, in the phase modulation device 101 according to the present embodiment, each pixel circuit 21 is provided with a charge pump 31. Then, when setting to an arbitrary gradation among a plurality of preset gradations in the range from "0" to double voltage (2 * VLC), the voltage corresponding to the arbitrary gradation is the maximum. When the voltage is VLC or less, the control voltage supplied to the pixel circuit 21 from the column data line is output to the liquid crystal 42 without being amplified.

Further, when the voltage corresponding to an arbitrary gradation exceeds the maximum voltage VLC among a plurality of gradations, the control voltage output unit 28 outputs the control voltage (Vh) and the maximum voltage (VLC) in a time division manner. Will be done. Then, the control voltage (Vh) and the maximum voltage (VLC) are added by the charge pump 31. Specifically, the control voltage (Vh) is output during the period of time t1 to t2 in FIG. 8 (e), the maximum voltage (VLC) is output during the period of time t3 to t4, and these are added by the charge pump 31. are doing.

Therefore, when the maximum control voltage supplied to the pixel circuit 21 from the column data line is the maximum voltage VLC, the drive voltage for driving the liquid crystal 42 within the range of the voltage (2 * VLC) that is twice that. Can be set. Therefore, the magnitude of the refractive index of the liquid crystal 42 can be changed in a wider range, the increase in the thickness of the liquid crystal layer 12 can be suppressed, and the accuracy of phase modulation can be improved.

Further, since the gradation can be set in a wide voltage range without increasing the maximum voltage VLC of the control voltage supplied to the pixel circuit 21, it is not necessary to increase the withstand voltage of each component constituting the control circuit 22, and the device can be downsized. , It is possible to reduce the weight.

Further, since the voltage range for setting the drive voltage of the liquid crystal 42 is set to twice the maximum voltage VLC, the desired drive voltage can be obtained by a simple process of amplifying the control voltage twice. It can be obtained and the circuit configuration can be simplified.

Further, in the present embodiment, the refractive index of the liquid crystal 42 is set to change toward one of the directions orthogonal to each other, that is, the column direction and the row direction shown in FIG. 3, and in the other direction. , Drive lines (L1 to Ln) for switching on / off of the charge pump are arranged. Therefore, it is possible to prevent the orientation of the liquid crystal from being disturbed due to a change in the refractive index.

In the present embodiment, the range of the drive voltage is set to a voltage (2 * VLC) twice the maximum voltage, but the present invention is not limited to this, and it may be larger than the maximum voltage VLC.

[Explanation of a modified example of this embodiment]
Next, a modified example of this embodiment will be described. FIG. 9 is a circuit diagram showing the configuration of the pixel circuit 21'according to the modified example. As shown in FIG. 9, in the pixel circuit 21'corresponding to the modified example, the drive line L1 is arranged in the vertical direction. Therefore, the charge pump circuit can be turned ON or OFF in the vertical direction of each pixel circuit 21'arranged in a matrix. Therefore, the direction in which the refractive index changes is the lateral direction.

That is, in the examples shown in FIGS. 6A and 6B, the magnitude of the refractive index of the liquid crystal 42 changes in the vertical direction, whereas in the modified example shown in FIG. 9, the refractive index changes in the horizontal direction. The configuration is such that the magnitude of the refractive index of the liquid crystal 42 changes toward. In this case, the voltage supplied to the pixel circuit 21'is set so that the control voltage reaches the maximum voltage VLC in one vertical scanning period.

Although embodiments of the present invention have been described above, the statements and drawings that form part of this disclosure should not be understood to limit the invention. Various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art from this disclosure.

11 Reflective board 12 Liquid crystal layer 13 Opposing board 14 Sealing material 20 Reflective pixel 21, 21a, 21'Pixel circuit 22 Control circuit 23 Horizontal scanning circuit 24 Vertical scanning circuit 25 Charge pump control unit 26 Shift register circuit 27 Switch circuit 31 Charge pump 42 Liquid crystal q1 Pixel electrode q2 Common electrode p1 Input terminal p2 Output terminal L1 to Ln Drive line D1 to Dm Column data line G1 to Gn line Scan line L1 to Ln Drive line K1 to Kn Control line K1-1, K1-2 Control line

Claims (6)

A phase modulator that reflects incident light at a desired angle.
A plurality of pixel circuits provided at positions where a plurality of column data lines and a plurality of row scanning lines orthogonal to each other intersect each other, and a plurality of reflection pixels.
A liquid crystal provided corresponding to the reflected pixel and whose refractive index with respect to incident light changes depending on a driving voltage supplied from the pixel circuit.
A control circuit for controlling the pixel circuit is provided.
The control circuit has a control voltage that changes in a range up to a predetermined maximum voltage, and a control voltage output unit that outputs the maximum voltage in a time-division manner.
The pixel circuit has a charge pump that amplifies the control voltage.
Further, when the drive voltage supplied to the liquid crystal is equal to or less than the maximum voltage, the drive voltage is output to the liquid crystal without amplifying the control voltage output from the control voltage output unit and is supplied to the liquid crystal. However, when the maximum voltage is exceeded, the charge pump controls to output the added voltage obtained by adding the control voltage and the maximum voltage output from the control voltage output unit in a time division to the liquid crystal. A phase modulator characterized by having a pump control unit. The refractive index of the liquid crystal is set to change in one of the directions orthogonal to each other, and a drive line for switching on / off of the charge pump is arranged in the other direction. The phase modulator according to claim 1. The pixel circuit includes a short-circuit switch that short-circuits an input terminal for supplying the control voltage to the charge pump and an output terminal for outputting a voltage from the charge pump to the liquid crystal.
The charge pump control unit short-circuits the short-circuit switch when the drive voltage output to the liquid crystal is equal to or lower than the maximum voltage, and short-circuits the short-circuit switch when the drive voltage output to the liquid crystal exceeds the maximum voltage. The phase modulator according to claim 1 or 2, characterized in that it is open. The pixel circuit includes an output capacitor that stores a voltage supplied to the liquid crystal.
The charge pump
The first capacitor that stores electric charge and
A first switch provided between one end of the first capacitor and an input terminal to which the control voltage is supplied, and
A second switch provided between the other end of the first capacitor and the input terminal,
A third switch provided between the one end of the first capacitor and one end of the output capacitor,
A fourth switch provided between the other end of the first capacitor and the other end of the output capacitor,
The phase modulation apparatus according to any one of claims 1 to 3, further comprising. The phase modulation apparatus according to any one of claims 1 to 4, wherein the maximum voltage of the drive voltage supplied to the liquid crystal is set to twice the maximum voltage. A phase modulation method that reflects incident light at a desired angle.
A control voltage that changes within a predetermined maximum voltage and a time division of the maximum voltage are applied to a plurality of pixel circuits provided at positions where a plurality of column data lines orthogonal to each other and a plurality of row scanning lines intersect each other. Steps to output with
When the drive voltage supplied to the liquid crystal, which is provided corresponding to each of the pixel circuits and whose refractive index with respect to the incident light changes according to the input drive voltage, is equal to or less than the maximum voltage, the control voltage is not amplified. And the step of outputting to the liquid crystal
When the drive voltage supplied to the liquid crystal exceeds the maximum voltage, the charge pump outputs a voltage obtained by adding the maximum voltage to the control voltage to the liquid crystal.
A phase modulation method characterized by being provided with.

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