JP2020159856A - Reference voltage circuit, semiconductor device, and fault detection method - Google Patents
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Abstract
Description
本発明は、基準電圧回路、半導体装置、および故障検出方法に関し、特に故障検出機能を備えた基準電圧回路、該基準電圧回路を含む半導体装置、およびを該基準電圧回路における故障検出方法に関する。 The present invention relates to a reference voltage circuit, a semiconductor device, and a failure detection method, and more particularly to a reference voltage circuit having a failure detection function, a semiconductor device including the reference voltage circuit, and a failure detection method in the reference voltage circuit.
故障検出機能を備えた半導体装置の分野として、例えば電池の分野が挙げられる。同分野の従来技術としては、例えば特許文献１に開示されたパック電池が知られている。特許文献１に開示されたパック電池は、直列に接続された複数の電池の電圧を検出するアナログフロントエンドと、該アナログフロントエンドに接続されてアナログフロントエンドからアナログの電圧信号が入力されるマイコンとを備えるパック電池であって、マイコンがアナログフロントエンドから入力される電圧信号を切り換えてアナログフロントエンド、またはマイコンの故障判定を行う。また、アナログフロントエンドはマイコンで制御される入力スイッチと、該入力スイッチを介して複数の電池に接続された電池の電圧検出回路を備えており、マイコンが入力スイッチを切り換えて、各々の電池電圧と直列に接続されている電池のトータル電圧とを検出して、電圧検出回路の故障を判定している。さらに、マイコンが、入力されるアナログの電圧信号をデジタル信号に変換するＡ／Ｄコンバータと、該Ａ／Ｄコンバータに第１の基準電圧を入力する第１の基準電圧回路を備え、アナログフロントエンドは、マイコンに第１の基準電圧と異なる電圧である第２の基準電圧を出力する第２の基準電圧回路を備え、マイコンが第１の基準電圧と第２の基準電圧を切り換えて、第１の基準電圧、第２の基準電圧またはＡ／Ｄコンバータの故障を判定する。 Examples of the field of semiconductor devices having a failure detection function include the field of batteries. As a conventional technique in the same field, for example, a packed battery disclosed in Patent Document 1 is known. The packed battery disclosed in Patent Document 1 includes an analog front end that detects the voltage of a plurality of batteries connected in series, and a microcomputer that is connected to the analog front end and receives an analog voltage signal from the analog front end. It is a pack battery equipped with the above, and the microcomputer switches the voltage signal input from the analog front end to determine the failure of the analog front end or the microcomputer. Further, the analog front end is provided with an input switch controlled by a microcomputer and a voltage detection circuit of a battery connected to a plurality of batteries via the input switch, and the microcomputer switches the input switch to obtain each battery voltage. And the total voltage of the batteries connected in series are detected to determine the failure of the voltage detection circuit. Further, the microcomputer includes an A / D converter that converts an input analog voltage signal into a digital signal, and a first reference voltage circuit that inputs a first reference voltage to the A / D converter, and is an analog front end. Is provided with a second reference voltage circuit that outputs a second reference voltage, which is a voltage different from the first reference voltage, to the microcomputer, and the microcomputer switches between the first reference voltage and the second reference voltage. The reference voltage, the second reference voltage, or the failure of the A / D converter is determined.
一方、故障検出機能を備えた基準電圧回路を含む半導体装置の一例として、電池監視ＩＣ（Ｉｎｔｅｇｒａｔｅｄ Ｃｉｒｃｕｉｔ）が挙げられる。図６は、該電池監視ＩＣを備えた従来技術に係る電池監視システムを示している。図６に示すように、従来技術に係る電池監視システムは、ｎ個の電池セル、および電池監視ＩＣを含んで構成されている。
該電池監視ＩＣは、各々の電池セルに対応して設けられた２系統のセル電圧測定回路（経路Ａ、経路Ｂ）を備えている。
On the other hand, as an example of a semiconductor device including a reference voltage circuit having a failure detection function, a battery monitoring IC (Integrated Circuit) can be mentioned. FIG. 6 shows a battery monitoring system according to the prior art equipped with the battery monitoring IC. As shown in FIG. 6, the battery monitoring system according to the prior art is configured to include n battery cells and a battery monitoring IC.
The battery monitoring IC includes two cell voltage measuring circuits (path A and path B) provided corresponding to each battery cell.
各々のセル電圧測定回路は対応する電池セルに端子Ｖｎ、Ｖｎ−１を介して接続されたセル選択ＳＷ（スイッチ）、該セル選択ＳＷに接続されたアナログレベルシフタ、該アナログレベルシフタに接続されたプリアンプ、該プリアンプに接続されたＡ／Ｄ（アナログ／デジタル変換回路）、および基準電圧回路であるＶＲＥＦ１回路、またはＶＲＥＦ２回路（以下、総称する場合は「ＶＲＥＦ回路」）を含んで構成されている。 Each cell voltage measuring circuit has a cell selection SW (switch) connected to the corresponding battery cell via terminals Vn and Vn-1, an analog level shifter connected to the cell selection SW, and a preamplifier connected to the analog level shifter. , An A / D (analog / digital conversion circuit) connected to the preamplifier, and a VREF1 circuit or a VREF2 circuit (hereinafter, collectively referred to as “VREF circuit”) which is a reference voltage circuit.
また、電池監視ＩＣは電源端子ＶＣＣに接続された電源の電圧を安定化し、安定化された電圧を電源端子ＶＤＤから出力するＲＥＧ回路（安定化回路）を備え、該ＲＥＧ回路で安定化された電圧がＶＲＥＦ１回路およびＶＲＥＦ２回路に供給されている。図６に示すように、ＶＲＥＦ１回路、ＶＲＥＦ２回路の出力電圧はＡ／Ｄの電源として使用されるとともに、ＶＲＥＦ１回路の出力電圧はＴＳＤ回路 (サーマルシャットダウン回路)に接続されている。つまり、ＴＳＤ回路はＶＲＥＦ１回路の出力電圧を参照する構成となっている。 Further, the battery monitoring IC is provided with a REG circuit (stabilization circuit) that stabilizes the voltage of the power supply connected to the power supply terminal VCS and outputs the stabilized voltage from the power supply terminal VDD, and is stabilized by the REG circuit. The voltage is supplied to the VREF1 circuit and the VREF2 circuit. As shown in FIG. 6, the output voltages of the VREF1 circuit and the VREF2 circuit are used as the power supply for the A / D, and the output voltage of the VREF1 circuit is connected to the TSD circuit (thermal shutdown circuit). That is, the TSD circuit is configured to refer to the output voltage of the VREF1 circuit.
図７は、基準電圧回路２０２（図７では、「ＶＲＥＦ１回路」と表記）、および基準電圧回路２０２の接続先であるＴＳＤ回路２０１、Ａ／Ｄ２０６の詳細を示した回路図（以下、「従来技術に係る構成」）である。図７に示すように、基準電圧回路２０２で生成された基準電圧ＶＲＥＦ１は、抵抗Ｒ１、Ｒ２で構成された抵抗ラダー２０３によって分圧され、分圧ＶＲＥＦ＿ＲがＴＳＤ本体回路２０４に供給されている。ＴＳＤ回路本体２０４では分圧ＶＲＥＦ＿Ｒを閾値電圧と比較することによって、ＴＳＤ機能（サーマルシャットダウン機能）を実現している。なお、サーマルシャットダウン機能とは、異常温度を検出した際に、当該ＩＣを安全なモードに移行する機能をいう。 FIG. 7 is a circuit diagram showing details of the reference voltage circuit 202 (denoted as “VREF1 circuit” in FIG. 7) and the TSD circuits 201 and A / D 206 to which the reference voltage circuit 202 is connected (hereinafter, “conventional”). Configuration related to technology "). As shown in FIG. 7, the reference voltage VREF1 generated by the reference voltage circuit 202 is divided by the resistor ladder 203 composed of the resistors R1 and R2, and the divided voltage VREF_R is supplied to the TSD main circuit 204. In the TSD circuit main body 204, the TSD function (thermal shutdown function) is realized by comparing the divided voltage VREF_R with the threshold voltage. The thermal shutdown function refers to a function of shifting the IC to a safe mode when an abnormal temperature is detected.
また、分圧ＶＲＥＦ＿Ｒは、プリアンプ２０５を介してＡ／Ｄ２０６にも接続されている。分圧ＶＲＥＦ＿ＲはＡ／Ｄ２０６でアナログデジタル変換され、分圧ＶＲＥＦ＿Ｒ（つまり、基準電圧ＶＲＥＦ１）が正常か異常かを判定する自己診断経路の参照信号とされる。 The partial pressure VREF_R is also connected to the A / D 206 via the preamplifier 205. The divided voltage VREF_R is analog-digitally converted by A / D 206, and is used as a reference signal of a self-diagnosis path for determining whether the divided voltage VREF_R (that is, the reference voltage VREF1) is normal or abnormal.
しかしながら、上記従来技術に係る構成では、基準電圧回路２０２の出力電圧である基準電圧ＶＲＥＦ１が異常電圧となった場合に、ＴＳＤ回路２０１の動作が異常となるという問題があった。機能安全規格ＩＳＯ２６２６に準じてこの問題に対応する場合、基準電圧回路を含めた測定経路を冗長化し、一方の基準電圧回路が故障した場合にもう一方の基準電圧回路に切り替えられる構成が要求される。しかしながら、このような構成を基準電圧を要する機能の全てに適用すると、全ての回路を２系統搭載する必要があり、回路の大きさの増大に起因して半導体装置の大きさ（いわゆるチップサイズ）が大きくなるという問題があった。この点、特許文献１に係るパック電池もこのような問題を検討したものではない。 However, in the configuration according to the above-mentioned prior art, there is a problem that the operation of the TSD circuit 201 becomes abnormal when the reference voltage VREF1, which is the output voltage of the reference voltage circuit 202, becomes an abnormal voltage. When dealing with this problem in accordance with the functional safety standard ISO2626, it is required to make the measurement path including the reference voltage circuit redundant so that if one reference voltage circuit fails, it can be switched to the other reference voltage circuit. .. However, if such a configuration is applied to all functions that require a reference voltage, it is necessary to mount two systems of all circuits, and the size of the semiconductor device (so-called chip size) due to the increase in the size of the circuits. There was a problem that it became large. In this respect, the packed battery according to Patent Document 1 has not examined such a problem.
本発明は、上記の事情を踏まえ、回路の大きさの増大を抑制しつつ、回路異常の検出の冗長性が確保される基準電圧回路、半導体装置、および故障検出方法を提供することを目的とする。 Based on the above circumstances, an object of the present invention is to provide a reference voltage circuit, a semiconductor device, and a failure detection method in which an increase in the size of a circuit is suppressed and redundancy in detecting a circuit abnormality is ensured. To do.
上記課題を解決するため、本発明に係る基準電圧回路は、予め定められた基準電圧を出力する複数の基準電圧発生回路と、前記複数の基準電圧発生回路から出力された複数の基準電圧のうちのいずれかを選択して、被供給回路に供給する基準電圧選択部と、を含み、前記基準電圧選択部は、複数のスイッチが直列に接続された直列回路であって一端が前記複数の基準電圧発生回路のいずれかに接続され他端が前記基準電圧選択部の出力とされた直列回路を複数並列に接続した並列回路を備えるものである。 In order to solve the above problem, the reference voltage circuit according to the present invention includes a plurality of reference voltage generation circuits that output a predetermined reference voltage and a plurality of reference voltages output from the plurality of reference voltage generation circuits. The reference voltage selection unit includes a reference voltage selection unit for supplying to the supplied circuit by selecting any of the above, and the reference voltage selection unit is a series circuit in which a plurality of switches are connected in series, and one end of the reference voltage selection unit is the plurality of references. It is provided with a parallel circuit in which a plurality of series circuits connected to one of the voltage generation circuits and the other end of which is the output of the reference voltage selection unit are connected in parallel.
上記課題を解決するため、本発明に係る半導体装置は、上記の基準電圧回路と、前記基準電圧選択部で選択された基準電圧が供給されるとともに、供給された前記基準電圧の測定部を備える被供給回路と、前記測定部の測定結果を用いて前記基準電圧選択部の故障の有無を検出する検出回路と、を含むものである。 In order to solve the above problems, the semiconductor device according to the present invention includes the above-mentioned reference voltage circuit, the reference voltage selected by the reference voltage selection unit, and a measurement unit for the supplied reference voltage. It includes a supplied circuit and a detection circuit that detects the presence or absence of a failure of the reference voltage selection unit by using the measurement result of the measurement unit.
上記課題を解決するため、本発明に係る故障検出方法は、複数のスイッチが直列に接続された直列回路であって一端が複数の電源のいずれかに接続され他端が共通の出力とされた直列回路を複数並列に接続した並列回路を備えるスイッチ回路において、前記スイッチを導通状態に設定したにもかかわらず遮断状態となっている遮断故障、または前記スイッチを遮断状態に設定したにもかかわらず導通状態となっている導通故障、の何れかを検出する故障検出方法であって、検出の対象となる検出対象直列回路に含まれるスイッチをすべて導通状態とし、他の前記直列回路に含まれるスイッチをすべて遮断状態とした場合に、前記出力が予め定められた第１の条件を充足する場合に前記検出対象直列回路に含まれるスイッチの何れかに前記遮断故障が発生していることを検出し、複数の前記直列回路の各々について、該直列回路に含まれるスイッチのうちいずれかを検出対象スイッチとするとともに該検出対象スイッチを遮断状態とし、他のスイッチをすべて導通状態とした場合に、前記出力が予め定められた第２の条件を充足する場合に前記検出対象スイッチのいずれかに前記導通故障が発生していることを検出するものである。 In order to solve the above problem, the failure detection method according to the present invention is a series circuit in which a plurality of switches are connected in series, one end of which is connected to one of a plurality of power supplies and the other end of which is a common output. In a switch circuit including a parallel circuit in which a plurality of series circuits are connected in parallel, a break failure that is in the cutoff state even though the switch is set to the conduction state, or a breakoff state is set even though the switch is set to the cutoff state. This is a failure detection method that detects one of the conduction failures that are in the conduction state. All the switches included in the detection target series circuit to be detected are set to the conduction state, and the switches included in the other series circuits are included. When all of the above are in the cutoff state, when the output satisfies the predetermined first condition, it is detected that the cutoff failure has occurred in any of the switches included in the detection target series circuit. When, for each of the plurality of series circuits, one of the switches included in the series circuit is set as the detection target switch, the detection target switch is set to the cutoff state, and all the other switches are set to the conduction state. When the output satisfies the second predetermined condition, it is detected that the continuity failure has occurred in any of the detection target switches.
本発明によれば、回路の大きさの増大を抑制しつつ、回路異常の検出の冗長性が確保される基準電圧回路、半導体装置、および故障検出方法を提供することが可能となる、という効果を奏する。 According to the present invention, it is possible to provide a reference voltage circuit, a semiconductor device, and a failure detection method that ensure redundancy in detecting circuit abnormalities while suppressing an increase in the size of the circuit. Play.
以下、図面を参照し、本発明の実施の形態について詳細に説明する。以下の実施の形態では、本発明に係る半導体装置として本発明に係る基準電圧回路を含む半導体装置を例示し、故障検出方法として該基準電圧回路に用いられるスイッチの故障検出方法を例示して説明する。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the following embodiments, a semiconductor device including the reference voltage circuit according to the present invention is exemplified as the semiconductor device according to the present invention, and a failure detection method for a switch used in the reference voltage circuit is exemplified and described as a failure detection method. To do.
図１は、本実施の形態に係る基準電圧回路１１、および基準電圧回路１１で生成された基準電圧が供給される回路である被供給回路１２を含む半導体装置１０の回路図を示している。 FIG. 1 shows a circuit diagram of a semiconductor device 10 including a reference voltage circuit 11 according to the present embodiment and a supplied circuit 12 which is a circuit to which a reference voltage generated by the reference voltage circuit 11 is supplied.
図１に示すように、基準電圧回路１１は、基準電圧発生回路３０１（図１では、「ＶＲＥＦ１回路」と表記）、基準電圧発生回路３０２（図１では、「ＶＲＥＦ２回路」と表記）、および基準電圧切替スイッチ３１１（図１では、「基準電圧切替ＳＷ」と表記）を含んで構成されている。また、被供給回路１２は、ＴＳＤ回路３１２、プリアンプ３０９、およびＡ／Ｄ３１０を含んで構成されている。すなわち、本実施の形態は、ＴＳＤ回路を２系統で冗長化するのではなく、基準電圧切替スイッチ３１１を設けて、基準電圧異常に対するＴＳＤ機能の冗長性を高めている。 As shown in FIG. 1, the reference voltage circuit 11 includes a reference voltage generating circuit 301 (denoted as “VREF1 circuit” in FIG. 1), a reference voltage generating circuit 302 (denoted as “VREF2 circuit” in FIG. 1), and It is configured to include a reference voltage changeover switch 311 (denoted as "reference voltage changeover SW" in FIG. 1). Further, the supplied circuit 12 includes a TSD circuit 312, a preamplifier 309, and an A / D 310. That is, in this embodiment, the TSD circuit is not made redundant by two systems, but the reference voltage changeover switch 311 is provided to enhance the redundancy of the TSD function against the reference voltage abnormality.
基準電圧発生回路３０１からは基準電圧ＶＲＥＦ１が出力され、基準電圧発生回路３０２からは基準電圧ＶＲＥＦ２が出力される。基準電圧発生回路３０１と基準電圧発生回路３０２は基本的に同じ回路であり、基準電圧ＶＲＥＦ１と基準電圧ＶＲＥＦ２は等しい電圧とされている。また、基準電圧切替スイッチ３１１は、スイッチ３０３（図１では、「ＳＷ＿Ａ」と表記）、スイッチ３０４（図１では、「ＳＷ＿Ｂ」と表記）、スイッチ３０５（図１では、「ＳＷ＿Ｃ」と表記）、スイッチ３０６（図１では、「ＳＷ＿Ｄ」と表記）の４個のスイッチを備えている。基準電圧回路１１においては、基準電圧切替スイッチ３１１によって基準電圧ＶＲＥＦ１および基準電圧ＶＲＥＦ２のいずれかが選択され、基準電圧ＶＲＥＦＯＵＴとして出力される。 The reference voltage VREF1 is output from the reference voltage generation circuit 301, and the reference voltage VREF2 is output from the reference voltage generation circuit 302. The reference voltage generation circuit 301 and the reference voltage generation circuit 302 are basically the same circuit, and the reference voltage VREF1 and the reference voltage VREF2 are set to have the same voltage. Further, the reference voltage changeover switch 311 includes a switch 303 (denoted as "SW_A" in FIG. 1), a switch 304 (denoted as "SW_B" in FIG. 1), and a switch 305 (denoted as "SW_C" in FIG. 1). , Switch 306 (denoted as "SW_D" in FIG. 1). In the reference voltage circuit 11, either the reference voltage VREF1 or the reference voltage VREF2 is selected by the reference voltage changeover switch 311 and output as the reference voltage VREFOUT.
一方、ＴＳＤ回路３１２は、ＴＳＤ回路本体３０８、および抵抗ラダー３０７を含んで構成されている。抵抗ラダー３０７は直列に接続された抵抗Ｒ１および抵抗Ｒ２を備え、基準電圧ＶＲＥＦＯＵＴが抵抗Ｒ１、Ｒ２で分圧された分圧ＶＲＥＦ＿ＲがＴＳＤ回路本体３０８に供給される。また、分圧ＶＲＥＦ＿Ｒは、プリアンプ３０９を介してＡ／Ｄ３１０にも送られる。 On the other hand, the TSD circuit 312 includes a TSD circuit main body 308 and a resistor ladder 307. The resistor ladder 307 includes a resistor R1 and a resistor R2 connected in series, and a voltage divider VREF_R whose reference voltage VREFOUT is divided by the resistors R1 and R2 is supplied to the TSD circuit main body 308. The partial pressure VREF_R is also sent to the A / D 310 via the preamplifier 309.
すなわち、本実施の形態では、基準電圧発生回路３０１、３０２と、抵抗ラダー３０７を組み込んだＴＳＤ回路３１２との間に、スイッチ３０３、３０４、３０５、３０６を含む基準電圧切替スイッチ３１１が接続されている。基準電圧切替スイッチ３１１は、機能安全規格ＩＳＯ２６２６の要求を充足するために、スイッチを２直列、すなわち、２個のスイッチの直列回路を２個並列接続した構成（以下、「２経路の２直列」という場合がある）としている。これは、機能安全規格ＩＳＯ２６２６では、一つの故障によりシステムの安全を脅かすような機能損失が「ある許容範囲以内」であることが求められているので、上記２経路の２直列を採用することによりスイッチ機能の冗長化を図っているためである。 That is, in the present embodiment, the reference voltage changeover switch 311 including the switches 303, 304, 305, 306 is connected between the reference voltage generation circuits 301 and 302 and the TSD circuit 312 incorporating the resistance ladder 307. There is. The reference voltage changeover switch 311 has a configuration in which two switches are connected in series, that is, two series circuits of two switches are connected in parallel in order to satisfy the requirements of the functional safety standard ISO2626 (hereinafter, "two series of two paths"). In some cases). This is because the functional safety standard ISO2626 requires that the functional loss that threatens the safety of the system due to one failure is "within a certain allowable range", so by adopting two series of the above two paths. This is because the switch function is made redundant.
つまり、本実施の形態では、基準電圧の異常に対するＴＳＤ機能の冗長性を高めるために基準電圧発生回路３０１、３０２を切り替える基準電圧切替スイッチ３１１を設けている。ここで、機能安全規格２６２６に準拠するためには、追加した基準電圧切替スイッチ３１１の故障も検出する必要がある。既存のＴＳＤ回路３１２の自己診断機能に加え、基準電圧切替スイッチ３１１の故障検出も実現するために、本実施の形態では、基準電圧切替スイッチ３１１の構成が２経路の２直列とされている。 That is, in the present embodiment, the reference voltage changeover switch 311 for switching the reference voltage generation circuits 301 and 302 is provided in order to enhance the redundancy of the TSD function with respect to the abnormality of the reference voltage. Here, in order to comply with the functional safety standard 2626, it is necessary to detect the failure of the added reference voltage changeover switch 311. In addition to the self-diagnosis function of the existing TSD circuit 312, in order to realize failure detection of the reference voltage changeover switch 311, in the present embodiment, the reference voltage changeover switch 311 is configured in two paths in two series.
次に、図２から図５を参照して、本実施の形態に係る基準電圧回路、半導体装置、および故障検出方法、すなわち、既存のＴＳＤ回路３１２の自己診断機能と、追加した基準電圧切替スイッチ３１１の自己診断機能の動作についてより詳細に説明する。基準電圧切替スイッチ３１１の故障診断は、スイッチ３０３、３０４、３０５、３０６のオン／オフ（導通／遮断）を各々のスイッチに接続された各制御信号によって設定し、基準電圧ＶＲＥＦ１、ＶＲＥＦ２の分圧ＶＲＥＦ＿Ｒが予め定められた規格値と一致するか否かに基づいて正常、異常が判定され、故障の検出が実行される。 Next, with reference to FIGS. 2 to 5, the reference voltage circuit, the semiconductor device, and the failure detection method according to the present embodiment, that is, the self-diagnosis function of the existing TSD circuit 312 and the added reference voltage changeover switch. The operation of the self-diagnosis function of 311 will be described in more detail. The failure diagnosis of the reference voltage changeover switch 311 sets the on / off (conduction / cutoff) of the switches 303, 304, 305, and 306 by each control signal connected to each switch, and divides the reference voltages VREF1 and VREF2. Normal or abnormal is determined based on whether or not VREF_R matches a predetermined standard value, and failure detection is executed.
図２から図５は、上記基準電圧切替スイッチ３１１の故障診断の動作（手順）を示している。まず、各スイッチのオフ故障の検出（以下、「オフ故障検出」という場合がある）について説明する。オフ故障検出では、基準電圧切替スイッチ３１１の設定パターンとして２つの設定パターンを設定して行う。なお、本実施の形態において、「オフ故障」とは、オン状態に設定したにもかかわらずオフ状態となっている故障をいう。 2 to 5 show the operation (procedure) of the failure diagnosis of the reference voltage changeover switch 311. First, detection of an off failure of each switch (hereinafter, may be referred to as “off failure detection”) will be described. In the off failure detection, two setting patterns are set as the setting patterns of the reference voltage changeover switch 311. In the present embodiment, the “off failure” means a failure that is in the off state even though it is set to the on state.
図２は、オフ故障検出における第１の設定パターを示している。すなわち、第１の設定パターンでは、図２に示すように、スイッチ３０３、３０４をオン、スイッチ３０５、３０６をオフとする。そして、この際の分圧ＶＲＥＦ＿Ｒの電圧をＡ／Ｄ３１０でデジタル信号に変換し、分圧ＶＲＥＦ＿Ｒが予め定められた規格を充足するか否かに基づいてスイッチ３０３、３０４にオフ故障が発生しているか否かが検出される。 FIG. 2 shows the first setting putter in the off failure detection. That is, in the first setting pattern, as shown in FIG. 2, switches 303 and 304 are turned on and switches 305 and 306 are turned off. Then, the voltage of the divided voltage VREF_R at this time is converted into a digital signal by A / D 310, and an off failure occurs in the switches 303 and 304 based on whether or not the divided voltage VREF_R satisfies a predetermined standard. Whether or not it is detected.
ここで、分圧ＶＲＥＦ＿Ｒの規格の具体例の一例について説明する。本実施の形態では、基準電圧ＶＲＥＦ１、ＶＲＥＦ２、ＶＲＥＦＯＵＴの標準値を一例として４．３Ｖとし、分圧ＶＲＥＦ＿Ｒの標準値を一例として１．２Ｖとしている。一方、基準電圧ＶＲＥＦＯＵＴが出力されていない場合は、分圧ＶＲＥＦ＿Ｒは０Ｖとなる。そのため、分圧ＶＲＥＦ＿Ｒの規格の一例として、本実施の形態では、１．２Ｖを中心として設けた上限値と下限値の範囲（以下、「第１の規格」）と、０Ｖに予め定められた許容範囲を見込んで設けた範囲（以下、「第２の規格」）を設定している。 Here, a specific example of the standard of the partial pressure VREF_R will be described. In the present embodiment, the standard values of the reference voltages VREF1, VREF2, and VREFOUT are set to 4.3V as an example, and the standard values of the partial pressure VREF_R are set to 1.2V as an example. On the other hand, when the reference voltage VREFOUT is not output, the partial pressure VREF_R becomes 0V. Therefore, as an example of the standard of the partial pressure VREF_R, in the present embodiment, the range of the upper limit value and the lower limit value (hereinafter, "first standard") provided around 1.2V and 0V are predetermined. A range provided in anticipation of an allowable range (hereinafter, "second standard") is set.
図２に示す設定パターンにおいて、分圧ＶＲＥＦ＿Ｒの電圧値が上記第１の規格を充足する場合はスイッチ３０３、３０４のいずれもが正常である（スイッチ３０３、３０４にオフ故障が発生していない）ことが検出され、上記第２の規格を充足する場合はスイッチ３０３、３０４の少なくとも一方は故障している（スイッチ３０３、３０４の少なくとも一方にオフ故障が発生している）ことが検出される。 In the setting pattern shown in FIG. 2, when the voltage value of the divided voltage VREF_R satisfies the first standard, all of the switches 303 and 304 are normal (the switches 303 and 304 have not failed off). Is detected, and when the second standard is satisfied, it is detected that at least one of the switches 303 and 304 has failed (at least one of the switches 303 and 304 has an off failure).
図３は、オフ故障検出において設定する第２の設定パターンを示している。第２の設定パターンでは、図３に示すように、スイッチ３０３、３０４をオフ、スイッチ３０５、３０６をオンとする。そして、Ａ／Ｄ変換した分圧ＶＲＥＦ＿Ｒの電圧値を測定することによって、スイッチ３０５、３０６にオフ故障が発生しているか否かを検出する。上記同様、この際の分圧ＶＲＥＦ＿Ｒが第１の規格を充足する場合はスイッチ３０５、３０６のいずれにもオフ故障は発生していないことが検出され、第２の規格を充足する場合はスイッチ３０５、３０６の少なくとも一方にオフ故障が発生していることが検出される。 FIG. 3 shows a second setting pattern to be set in the off failure detection. In the second setting pattern, as shown in FIG. 3, switches 303 and 304 are turned off and switches 305 and 306 are turned on. Then, by measuring the voltage value of the A / D-converted divided voltage VREF_R, it is detected whether or not the switches 305 and 306 have an off failure. Similarly to the above, when the partial pressure VREF_R at this time satisfies the first standard, it is detected that no off failure has occurred in any of the switches 305 and 306, and when the second standard is satisfied, the switch 305 , 306 is detected to have an off failure in at least one of them.
次に、図４および図５を参照して、基準電圧切替スイッチ３１１におけるオン故障の検出手順（方法）について説明する。オン故障の検出も、オフ故障の検出と同様、基準電圧切替スイッチ３１１の設定パターンとして２つのパターンを設定して実行される。なお、本実施の形態において、「オン故障」とは、オフ状態に設定したにもかかわらずオン状態となっている故障をいう。 Next, a procedure (method) for detecting an on-failure in the reference voltage changeover switch 311 will be described with reference to FIGS. 4 and 5. Similar to the detection of the off failure, the detection of the on failure is also executed by setting two patterns as the setting patterns of the reference voltage changeover switch 311. In the present embodiment, the “on failure” means a failure that is in the on state even though it is set in the off state.
図４は、オン故障検出における第１のパターンを示している。図４に示すように、第１のパターンでは、スイッチ３０３、３０５をオンに設定し、スイッチ３０４、３０６をオフに設定する。設定後、Ａ／Ｄ変換された分圧ＶＲＥＦ＿Ｒの電圧値を測定し、分圧ＶＲＥＦ＿Ｒの電圧値に基づいてスイッチ３０４、３０６に異常が発生しているか否か（スイッチ３０４、３０６にオン故障が発生しているか否か）が検出される。その際、分圧ＶＲＥＦ＿Ｒの電圧値が第１の規格を充足する場合は、スイッチ３０４および３０６の少なくとも一方に異常が発生している（オン故障が発生している）ことが検出され、第２の規格を充足する場合は、スイッチ３０４および３０６のいずれもが正常である（オン故障が発生していない）ことが検出される。 FIG. 4 shows a first pattern in on-failure detection. As shown in FIG. 4, in the first pattern, switches 303 and 305 are set to on and switches 304 and 306 are set to off. After setting, the voltage value of the A / D converted voltage divider VREF_R is measured, and whether or not an abnormality has occurred in the switches 304 and 306 based on the voltage value of the voltage divider VREF_R (switches 304 and 306 are on-failed). Whether or not it has occurred) is detected. At that time, when the voltage value of the divided voltage VREF_R satisfies the first standard, it is detected that an abnormality has occurred in at least one of the switches 304 and 306 (an on-failure has occurred), and the second When the standard of is satisfied, it is detected that all of the switches 304 and 306 are normal (no on-failure has occurred).
図５は、オン故障検出における第２のパターンを示している。図５に示すように、第２のパターンでは、スイッチ３０４、３０６をオンに設定し、スイッチ３０３、３０５をオフに設定する。設定後、Ａ／Ｄ変換された分圧ＶＲＥＦ＿Ｒの電圧値を測定し、分圧ＶＲＥＦ＿Ｒの電圧値に基づいてスイッチ３０３、３０５に異常が発生しているか否か（スイッチ３０３、３０５にオン故障が発生しているか否か）を検出する。その際、分圧ＶＲＥＦ＿Ｒの電圧値が第１の規格を充足する場合は、スイッチ３０３および３０５の少なくとも一方に異常が発生している（オン故障が発生している）ことが検出され、第２の規格を充足する場合は、スイッチ３０３および３０５のいずれもが正常である（オン故障が発生していない）ことが検出される。 FIG. 5 shows a second pattern in on-failure detection. As shown in FIG. 5, in the second pattern, switches 304 and 306 are set to on and switches 303 and 305 are set to off. After setting, the voltage value of the A / D converted voltage divider VREF_R is measured, and whether or not an abnormality has occurred in the switches 303 and 305 based on the voltage value of the voltage divider VREF_R (switch 303 and 305 have an ON failure). Whether or not it has occurred) is detected. At that time, when the voltage value of the divided voltage VREF_R satisfies the first standard, it is detected that an abnormality has occurred in at least one of the switches 303 and 305 (an on-failure has occurred), and the second When the standard of is satisfied, it is detected that all of the switches 303 and 305 are normal (no on-failure has occurred).
以上のように、基準電圧切替スイッチ３１１に含まれるスイッチを２経路の２直列とすることで、スイッチの故障検出時に基準電圧発生回路の冗長性が失われる危険性、すなわち、スイッチ構成を２経路の１直列とすると、片側のスイッチがオン固着した場合に２経路の基準電圧発生回路がショートする危険性を回避しつつ、スイッチの「オフ故障検出」および「オン故障検出」が可能となる。 As described above, by connecting the switches included in the reference voltage changeover switch 311 in two paths in two paths, there is a risk that the redundancy of the reference voltage generation circuit will be lost when a switch failure is detected, that is, the switch configuration has two paths. If one series is used, it is possible to perform "off failure detection" and "on failure detection" of the switch while avoiding the risk of short-circuiting the reference voltage generation circuit of two paths when the switch on one side is stuck on.
以上詳述したように、本実施の形態によれば、基準電圧切替スイッチのオフ故障検出、およびオン故障検出が可能となっている。また、ＴＳＤ回路を２経路搭載することなく、基準電圧切替スイッチの構成を２経路の２直列のとすることで、チップサイズ増加を抑制しつつ、基準電圧異常に対するＴＳＤ機能の冗長性を高めることが可能となっている。 As described in detail above, according to the present embodiment, it is possible to detect an off failure and an on failure detection of the reference voltage changeover switch. In addition, by configuring the reference voltage changeover switch in two series of two paths without mounting two paths of the TSD circuit, it is possible to increase the redundancy of the TSD function against a reference voltage abnormality while suppressing an increase in chip size. Is possible.
なお、上記の実施の形態では、本発明をＴＳＤ回路に適用した形態を例示して説明したが、これに限られず、基準電圧の測定回路を含んだ被供給回路（上記実施の形態における抵抗ラダー、プリアンプ、Ａ／Ｄに相当）であれば、いずれの回路にも適用可能である。 In the above embodiment, the embodiment in which the present invention is applied to the TSD circuit has been illustrated and described, but the present invention is not limited to this, and the supplied circuit including the reference voltage measurement circuit (resistance ladder in the above embodiment). , Preamplifier, equivalent to A / D), and can be applied to any circuit.
また、上記実施の形態では、本発明を２経路に冗長化した基準電圧回路のスイッチの故障検出に適用した形態を例示して説明したが、例えばスイッチ本体とスイッチの制御信号、規格値格納用レジスタを追加すれば、２経路だけではなく、３経路以上に冗長化した基準電圧回路のスイッチの故障検出にも適用可能である。 Further, in the above embodiment, the embodiment in which the present invention is applied to the failure detection of the switch of the reference voltage circuit redundant in two paths has been described as an example, but for example, for storing the control signal and the standard value of the switch body and the switch. If a register is added, it can be applied not only to the failure detection of a switch of a reference voltage circuit redundant with three or more paths as well as two paths.
さらに、本実施の形態に係る故障検出方法では、基準電圧発生回路の冗長化に適用した形態を例示して説明したが、これに限られず、他の目的を有する電圧の冗長化一般に適用することが可能である。 Further, in the failure detection method according to the present embodiment, the embodiment applied to the redundancy of the reference voltage generation circuit has been described as an example, but the present invention is not limited to this, and the voltage redundancy having other purposes is generally applied. Is possible.
１０ 半導体装置
１１ 基準電圧回路
１２ 被供給回路
２０１ ＴＳＤ回路
２０２ 基準電圧回路
２０３ 抵抗ラダー
２０４ ＴＳＤ回路本体
２０５ プリアンプ
２０６ Ａ／Ｄ
３０１、３０２ 基準電圧発生回路
３０３、３０４、３０５、３０６ スイッチ
３０７ 抵抗ラダー
３０８ ＴＳＤ本体回路
３０９ プリアンプ
３１０ Ａ／Ｄ
３１１ 基準電圧切替スイッチ
３１２ ＴＳＤ回路
Ｒ１、Ｒ２ 抵抗
ＶＲＥＦ１、ＶＲＥＦ２、ＶＲＥＦＯＵＴ 基準電圧
ＶＲＥＦ＿Ｒ 分圧
10 Semiconductor device 11 Reference voltage circuit 12 Supply circuit 201 TSD circuit 202 Reference voltage circuit 203 Resistance ladder 204 TSD circuit body 205 Preamplifier 206 A / D
301, 302 Reference voltage generation circuit 303, 304, 305, 306 Switch 307 Resistance ladder 308 TSD main circuit 309 Preamplifier 310 A / D
311 Reference voltage selector switch 312 TSD circuit R1, R2 Resistors VREF1, VREF2, VREFOUT Reference voltage VREF_R voltage divider
Claims (5)
前記複数の基準電圧発生回路から出力された複数の基準電圧のうちのいずれかを選択して、被供給回路に供給する基準電圧選択部と、を含み、
前記基準電圧選択部は、複数のスイッチが直列に接続された直列回路であって一端が前記複数の基準電圧発生回路のいずれかに接続され他端が前記基準電圧選択部の出力とされた直列回路を複数並列に接続した並列回路を備える
基準電圧回路。 Multiple reference voltage generation circuits that output a predetermined reference voltage,
A reference voltage selection unit that selects one of a plurality of reference voltages output from the plurality of reference voltage generation circuits and supplies the reference voltage to the supplied circuit is included.
The reference voltage selection unit is a series circuit in which a plurality of switches are connected in series, one end of which is connected to one of the plurality of reference voltage generation circuits, and the other end of which is the output of the reference voltage selection unit. A reference voltage circuit including a parallel circuit in which a plurality of circuits are connected in parallel.
前記基準電圧選択部で選択された基準電圧が供給されるとともに、供給された前記基準電圧の測定部を備える被供給回路と、
前記測定部の測定結果を用いて前記基準電圧選択部の故障の有無を検出する検出回路と、を含む
半導体装置。 The reference voltage circuit according to claim 1 and
A supply circuit provided with a reference voltage selected by the reference voltage selection unit and a measurement unit for the supplied reference voltage, and a supplied circuit.
A semiconductor device including a detection circuit that detects the presence or absence of a failure of the reference voltage selection unit using the measurement result of the measurement unit.
前記故障が、前記スイッチを導通状態に設定したにもかかわらず遮断状態となっている遮断故障、または前記スイッチを遮断状態に設定したにもかかわらず導通状態となっている導通故障、の何れかである
請求項２に記載の半導体装置。 The detection circuit detects the presence or absence of a failure of the reference voltage selection unit by changing the combination of continuity and interruption of each of the series circuits of the plurality of switches.
The failure is either a cutoff failure in which the switch is set to the conductive state but is in the cutoff state, or a conduction failure in which the switch is set in the cutoff state but is in the conductive state. The semiconductor device according to claim 2.
複数の前記直列回路の各々について、該直列回路に含まれるスイッチのうちいずれかを検出対象スイッチとするとともに該検出対象スイッチを遮断状態とし、他のスイッチをすべて導通状態とした場合に、前記測定結果が予め定められた第２の条件を充足する場合に前記検出対象スイッチのいずれかに前記導通故障が発生していることを検出する
請求項３に記載の半導体装置。 In the detection circuit, the measurement result is predetermined when all the switches included in the detection target series circuit to be detected are in the conductive state and all the switches included in the other series circuit are in the cutoff state. When the first condition is satisfied, it is detected that one of the switches included in the series circuit to be detected has the interruption failure.
For each of the plurality of series circuits, the measurement is performed when any of the switches included in the series circuit is set as the detection target switch, the detection target switch is set to the cutoff state, and all the other switches are set to the conductive state. The semiconductor device according to claim 3, wherein the semiconductor device according to claim 3 detects that the conduction failure has occurred in any of the detection target switches when the result satisfies the predetermined second condition.
検出の対象となる検出対象直列回路に含まれるスイッチをすべて導通状態とし、他の前記直列回路に含まれるスイッチをすべて遮断状態とした場合に、前記出力が予め定められた第１の条件を充足する場合に前記検出対象直列回路に含まれるスイッチの何れかに前記遮断故障が発生していることを検出し、
複数の前記直列回路の各々について、該直列回路に含まれるスイッチのうちいずれかを検出対象スイッチとするとともに該検出対象スイッチを遮断状態とし、他のスイッチをすべて導通状態とした場合に、前記出力が予め定められた第２の条件を充足する場合に前記検出対象スイッチのいずれかに前記導通故障が発生していることを検出する
故障検出方法。 In a switch circuit including a series circuit in which a plurality of switches are connected in series and a series circuit in which one end is connected to one of a plurality of power supplies and the other end is a common output is connected in parallel. Failure to detect either a cutoff failure that is in the cutoff state even though the switch is set to the conduction state, or a continuity failure that is in the continuity state even though the switch is set to the cutoff state. It is a detection method
When all the switches included in the detection target series circuit to be detected are in the conductive state and all the other switches included in the series circuit are in the cutoff state, the output satisfies the first predetermined condition. When this is done, it is detected that the interruption failure has occurred in any of the switches included in the series circuit to be detected.
For each of the plurality of series circuits, when any one of the switches included in the series circuit is set as the detection target switch, the detection target switch is set to the cutoff state, and all the other switches are set to the conductive state, the output is described. A failure detection method for detecting that the continuity failure has occurred in any of the detection target switches when the second condition is satisfied.
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| JP2001036407A (en) * | 1999-07-19 | 2001-02-09 | Matsushita Electric Ind Co Ltd | Circuit for switching reference voltage |
| JP2012016222A (en) * | 2010-07-02 | 2012-01-19 | Lapis Semiconductor Co Ltd | Charging device, charging control device, voltage monitoring device, ad converting device and self-diagnosis method of reference voltage circuit |
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| JP2001036407A (en) * | 1999-07-19 | 2001-02-09 | Matsushita Electric Ind Co Ltd | Circuit for switching reference voltage |
| JP2012016222A (en) * | 2010-07-02 | 2012-01-19 | Lapis Semiconductor Co Ltd | Charging device, charging control device, voltage monitoring device, ad converting device and self-diagnosis method of reference voltage circuit |
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