JP2020156024A - Amplification device - Google Patents

Abstract

To provide an amplification device capable of realizing a high efficiency even in the case of a wide dynamic range without expanding a circuit scale.SOLUTION: An amplification device structured so that a plurality of amplifiers are arranged in parallel, comprises: an amplifier group that achieves an out phase amplifier part and a Doherty amplification part by a combination of the amplifiers; a detection part that detects an amplitude level of an input signal in a prior step of the amplifier group; a selection part that selects whether or not the input signal is amplified in the out phase amplification part in accordance with the amplitude level of the input signal detected by the detection part and is output, or the input signal is amplified in the Doherty amplification part and is output; and a power supply part that supplies a power to each amplifier structuring the amplification group. The power supply part changes a back-off point of the Doherty amplification part on the basis of the amplitude level of the input signal.SELECTED DRAWING: Figure 1

Description

The present invention relates to an amplification device that amplifies a signal.

In wireless communication, when handling signals from a large number of operators at the same time, it is necessary to transmit and receive in a wider band. Therefore, a wide dynamic range of output power and input power for the amplifier is required. For example, when the bandwidth is 60 MHz in the 2 GHz band, the required dynamic range may be 10 dB or more.

Further, in recent years, in wireless communication, a signal having a high peak-to-average power ratio (PAPR) is often handled. When a high-power amplifier used in a normal transmitter amplifies a high PAPR signal, power consumption increases when trying to maintain the linearity of the amplification.

In particular, base stations have a large number of high-power amplifiers, which may account for most of the power consumption of the system. Therefore, various methods for improving the efficiency of amplifiers such as Doherty, envelope tracking, and outphasing are being studied.

In outfading, an input signal is separated into two signals having a constant amplitude and different phases, amplified by separate amplifiers, and then combined. Specifically, the two signals are combined so that the phase relationship when the input signals are separated is maintained. At this time, it is common to synthesize with a Chireix synthesizer equipped with an element for canceling the reactance component generated between the two amplifiers so that the load modulation occurs at a desired backoff value.

Outfading can be highly efficient at the desired backoff value designed, but the efficiency is significantly reduced at a backoff value lower than the design value. Therefore, in a system having a large dynamic range of output power and input power, there is a problem that the efficiency is lowered as a whole.

On the other hand, a technique for switching between outfading amplification and Dougherty amplification according to the input power is disclosed (Patent Document 1). According to this technology, high efficiency can be maintained even when the dynamic range of the input power is relatively large.

Special Table 2018-521592

By the way, there is a demand for a configuration that realizes high efficiency even when the dynamic range is wide without unnecessarily expanding the circuit scale.

The present invention has been made in view of the above, and an object of the present invention is to provide an amplification device capable of achieving high efficiency even when the dynamic range is wide without expanding the circuit scale.

In order to solve the above-mentioned problems and achieve the object, the amplification device according to one aspect of the present invention is configured by arranging a plurality of amplifiers in parallel, and an out-phase amplification unit and Doherty amplification are performed by combining the amplifiers. The amplifier group that realizes the unit, the detection unit that detects the amplitude level of the input signal in the previous stage of the amplifier group, and the out-phase amplification unit according to the amplitude level of the input signal detected by the detection unit. A selection unit that selects whether to amplify and output the input signal by the Doherty amplification unit or to amplify and output the input signal by the Doherty amplification unit, and a power supply unit that supplies power to each amplifier constituting the amplifier group. The power supply unit is characterized in that the backoff point of the Doherty amplification unit is changed based on the amplitude level of the input signal.

In the amplification device according to one aspect of the present invention, the power supply unit changes the power supplied to the plurality of amplifiers constituting the Doherty amplification unit in a plurality of stages based on the amplitude level of the input signal, and the Doherty unit. It is characterized by changing the back-off point of the amplification unit.

In the amplification device according to one aspect of the present invention, the power supply unit supplies power to a plurality of amplifiers constituting the Dougherty amplification unit in one or a plurality of stages based on the amplitude level and dynamic range of the input signal. It is characterized in that the back-off point of the Dougherty amplification unit is changed by changing.

In the amplification device according to one aspect of the present invention, the amplifier group is configured by arranging a first amplifier, a second amplifier, and a third amplifier in parallel, and the out-phase amplification unit is the first amplifier. The Dougherty amplification unit is realized by the combination of the second amplifier and the second amplifier, and is characterized by being realized by the combination of the second amplifier and the third amplifier.

The amplification device according to one aspect of the present invention includes a first synthesis point that synthesizes a first signal group amplified and output by the out-phase amplification unit, and a second signal amplified and output by the Dougherty amplification unit. A reactance compensating element having a second synthesis point for synthesizing a group, the second synthesis point is arranged between the second amplifier and the first synthesis point, and the reactance component generated between the amplifiers is compensated. Further comprises a synthesizer arranged between the third amplifier and the second synthesis point.

When the amplitude level of the input signal is higher than the threshold value, the amplification device according to one aspect of the present invention generates the first signal group and outputs the first signal group to the out-phase amplification unit, and the amplitude level of the input signal is the said. When it is below the threshold value, it is characterized by including a signal generation unit that generates the second signal group and outputs it to the Doherty amplification unit.

In the amplification device according to one aspect of the present invention, the first amplifier supplies a first bias voltage when the amplitude level of the input signal is higher than the threshold value, and the amplitude level of the input signal is lower than the threshold value. A second bias voltage different from the first bias voltage is supplied, the second amplifier is supplied with the first bias voltage, and the third amplifier is supplied with the second bias voltage. And.

The amplification device according to one aspect of the present invention is characterized in that the third amplifier is composed of a plurality of amplifiers arranged in parallel.

According to the present invention, high efficiency can be realized even when the dynamic range is wide without expanding the circuit scale.

FIG. 1 is a schematic configuration diagram of the amplification device according to the first embodiment. FIG. 2 is a diagram showing the relationship between the amplitude level and the drain voltage. FIG. 3 is a diagram showing an example of power efficiency with respect to the backoff value. FIG. 4 is a schematic configuration diagram of the amplification device according to the second embodiment. FIG. 5 is a diagram showing the relationship between the amplitude level and the drain voltage.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The present invention is not limited to the embodiments described below. Further, in the description of the drawings, the same or corresponding elements are appropriately designated by the same reference numerals.

(Embodiment 1)
FIG. 1 is a schematic configuration diagram of the amplification device according to the first embodiment. The amplification device 100 includes a signal generator 10, a first amplifier 1, a second amplifier 2, a third amplifier 3, and a silley synthesizer 20, which is a form of a synthesizer. The output side of the amplification device 100 is connected to the load L. The output side of the amplification device 100 may be configured such that an antenna is connected instead of the load L.

The signal generator 10 includes an FPGA (Field Programmable Gate Array) as a signal processing unit 11, DA converters 12, 13, and 14, and mixers 15, 16, and 17. The signal processing unit 11 includes an input power amplitude determination unit 11a that functions as a detection unit, a control unit 11b that functions as a selection unit, an out-phase signal generation unit 11c, and a Dougherty signal generation unit 11d. RF local signals (not shown) are input to the mixers 15, 16 and 17, respectively.

In the present embodiment, the first amplifier 1, the second amplifier 2, and the third amplifier 3, which are a plurality of amplifiers, are arranged in parallel to form an amplifier group. The first amplifier 1, the second amplifier 2, and the third amplifier 3 are each configured by using FETs (Field Effect Transistors). The first amplifier 1, the second amplifier 2, and the third amplifier 3 all amplify and output the input signal. The out-phase amplification unit 30 is realized by using the first amplifier 1 and the second amplifier 2 in combination. Further, the Dougherty amplification unit 40 is realized by using the second amplifier 2 and the third amplifier 3 in combination. In this way, the amplifier group realizes the out-phase amplification unit 30 and the Dougherty amplification unit 40 by combining the amplifiers.

The amplification device 100 further includes a power supply unit 50. The power supply unit 50 has a voltage control unit 51 that performs voltage control. The power supply unit 50 supplies electric power to each amplifier constituting the amplifier group. In the present embodiment, the power supply unit 50 applies a power supply voltage (drain voltage) to the first amplifier 1, the second amplifier 2, and the third amplifier 3. The drain voltage applied to the first amplifier 1 is the drain voltage Vd1. The drain voltage applied to the second amplifier 2 is the drain voltage Vd2. The drain voltage applied to the third amplifier 3 is the drain voltage Vd3. As a result, electric power is supplied to each of the first to third amplifiers 1 to 3. As will be described later, the voltage control unit 51 has a function of controlling the voltage applied to each of the first to third amplifiers 1 to 3 based on the input command signal.

The silley synthesizer 20 includes a first synthesis point 21, a second synthesis point 22, reactance compensation elements 23 and 24, and adjustment units 25 and 26.

Next, the configuration and function of each component will be specifically described. In the signal generator 10, the signal processing unit 11 receives the input signal S0. In the signal processing unit 11, the input power amplitude determination unit 11a determines the amplitude level of the input signal S0 (in the present embodiment, the input signal) in the first stage of the first amplifier 1, the second amplifier 2, and the third amplifier 3 constituting the amplifier group. The power amplitude level of S0) is detected and determined. The input power amplitude determination unit 11a outputs a command signal to the control unit 11b according to the power amplitude level of the input signal S0.

The control unit 11b generates gate voltage (bias voltage) signals Vg1, Vg2, and Vg3 as control signals for controlling the operation of the first amplifier 1, the second amplifier 2, and the third amplifier 3, respectively, and the first amplifier 1 , The output is output to the respective gate terminals of the second amplifier 2 and the third amplifier 3. Further, the input power amplitude determination unit 11a outputs a command signal to the out-phase signal generation unit 11c or the Doherty signal generation unit 11d according to the power amplitude level of the input signal S0. Further, the input power amplitude determination unit 11a outputs a command signal to the voltage control unit 51 of the power supply unit 50 according to the power amplitude level of the input signal S0.

In the present embodiment, the input power amplitude determination unit 11a determines whether the power amplitude level of the input signal S0 is higher than the threshold value or lower than the threshold value. When the input power amplitude determination unit 11a determines the power amplitude level of the input signal S0, the input power amplitude determination unit 11a may determine the amplitude level of the average power within a predetermined period. The predetermined period is, for example, several to several tens of milliseconds, more specifically, 10 milliseconds, but is not particularly limited.

As described in detail below, the control unit 11b functioning as the selection unit is amplified by the out-phase amplification unit 30 according to the amplitude level of the input signal S0 detected by the input power amplitude determination unit 11a functioning as the detection unit. And output, or the Doherty amplification unit 40 amplifies and outputs. Further, the power supply unit 50 changes the backoff point of the Doherty amplification unit 40 based on the amplitude level of the input signal S0 detected by the input power amplitude determination unit 11a under the control of the voltage control unit 51. In the present embodiment, the power supply unit 50 of the first amplifier 1 and the third amplifier 3 constituting the Doherty amplification unit 40 so as to change the backoff point of the Doherty amplification unit 40 based on the amplitude level of the input signal S0. Power (drain voltage) is supplied to each.

(When the power amplitude level of the input signal S0 is higher than the threshold value)
When the power amplitude level of the input signal S0 is higher than the threshold value, the control unit 11b uses the gate voltage signal Vg1 as a first voltage signal having a value biasing the first amplifier 1 to be a class AB or class C amplifier. Output to amplifier 1. Further, the control unit 11b outputs a voltage signal having a value biased so that the second amplifier 2 becomes an amplifier of the same class as the first amplifier 1 as the gate voltage signal Vg2 to the second amplifier 2. Further, the control unit 11b uses the gate voltage signal Vg3 as a third voltage signal (which may be 0V) having a value that biases the third amplifier 3 so that it becomes a class C or lower amplifier or turns off the operation. Output to amplifier 3. That is, when the power amplitude level of the input signal S0 is higher than the threshold value, the first amplifier 1 is supplied with the gate voltage signal Vg1 corresponding to the first bias voltage which is a voltage corresponding to class AB. The second amplifier 2 is supplied with a gate voltage signal Vg2 corresponding to the first bias voltage. Unlike the first bias voltage, the third amplifier 3 is supplied with the gate voltage signal Vg3 corresponding to the second bias voltage, which is a voltage (including zero) corresponding to class C.

Further, when the power amplitude level of the input signal S0 is higher than the threshold value, the control unit 11b outputs a command signal to the out-phase signal generation unit 11c. The out-phase signal generation unit 11c generates out-phase signals S11 and S12 based on the input signal S0. Here, the out-phase signals S11 and S12 are, as is well known, signals obtained by separating the input signal S0 into two signals having a constant amplitude and different phases. The out-phase signals S11 and S12 are two signals to be amplified by the out-phase amplification unit 30, and form a first signal group. The out-phase signal generation unit 11c outputs each of the out-phase signals S11 and S12 to the DA converters 12 and 13, respectively.

The DA converters 12 and 13 perform DA conversion of the out-phase signals S11 and S12, which are the first signal groups, respectively, and output the DA-converted signals to the mixers 15 and 16, respectively.

The mixers 15 and 16 up-convert each of the DA-converted out-phase signals S11 and S12 into RF signals and output them to the first amplifier 1 and the second amplifier 2 constituting the out-phase amplification unit 30, respectively. To do.

The first amplifier 1 and the second amplifier 2 amplify each of the out-phase signals S11 and S12, which are RF signals, and output them to the silley synthesizer 20, respectively. At this time, the first amplifier 1 and the second amplifier 2 are operating in a saturated state, respectively.

The silley synthesizer 20 synthesizes the out-phase signals S11 and S12, which are the first signal groups amplified and output, at the first synthesis point 21 and outputs them to the load L. The adjusting unit 25 has a function of adjusting the electric length of the transmission line from the first amplifier 1 to the first synthesis point 21 so as to be an odd multiple of λ / 4. The adjusting unit 26 has a function of adjusting the electric length of the transmission line from the second amplifier 2 to the first synthesis point 21 so as to be an odd multiple of λ / 4. Further, the reactance compensation elements 23 and 24 are shunt-connected to each of the transmission lines from the first amplifier 1 and the second amplifier 2 to the first synthesis point 21, respectively. The reactance compensating elements 23 and 24 are capacitors or inductors having opposite polarities to each other, and cancel and compensate the reactance components generated between the amplifiers of the first amplifier 1 and the second amplifier 2 to suppress the decrease in efficiency. ..

(When the power amplitude level of the input signal S0 is less than or equal to the threshold value)
When the power amplitude level of the input signal S0 is equal to or less than the threshold value, the control unit 11b biases the first amplifier 1 to become a class C or lower amplifier as the gate voltage signal Vg1, or turns off the operation. The signal (which may be 0V) is output to the first amplifier 1. Further, the control unit 11b outputs a voltage signal having a value biased so that the second amplifier 2 becomes a class A, class AB, or class B amplifier as the gate voltage signal Vg2 to the second amplifier 2. Further, the control unit 11b outputs a voltage signal having a value biased so that the third amplifier 3 becomes a class C amplifier as the gate voltage signal Vg3 to the third amplifier 3. As a result, the second amplifier 2 operates as a carrier amplifier, and the third amplifier 3 operates as a peak amplifier. That is, when the power amplitude level of the input signal S0 is lower than the threshold value, the first amplifier 1 is supplied with the gate voltage signal Vg1 corresponding to the second bias voltage. The second amplifier 2 is supplied with a gate voltage signal Vg2 corresponding to the first bias voltage. The third amplifier 3 is supplied with a gate voltage signal Vg3 corresponding to the second bias voltage.

Further, when the power amplitude level of the input signal S0 is equal to or less than the threshold value, the input power amplitude determination unit 11a further determines the magnitude relationship between the amplitude level and the first determination value and the second determination value. Then, a command signal for changing the drain voltage applied to the second amplifier 2 and the third amplifier 3 is output to the voltage control unit 51 according to the determination result. The power supply unit 50 applies a drain voltage as follows under the control of the voltage control unit 51 to supply electric power.

As shown in FIGS. 2A and 2B, when the amplitude level of the input signal S0 is equal to or lower than the threshold value and higher than the first determination value, the power supply unit 50 supplies the second amplifier 2 with the first power as the drain voltage Vd2. A first drain voltage corresponding to the above is applied, and a second drain voltage corresponding to the second power is applied to the third amplifier 3 as a drain voltage Vd3. Further, when the amplitude level of the input signal S0 is equal to or lower than the first determination value and higher than the second determination value, the power supply unit 50 corresponds to the third power lower than the first power as the drain voltage Vd2 of the second amplifier 2. A third drain voltage (lower than the first drain voltage) is applied, and a fourth drain voltage (lower than the second drain voltage) corresponding to the fourth power, which is lower than the second power as the drain voltage Vd3, is applied to the third amplifier 3. ) Is applied. Further, when the amplitude level of the input signal S0 is equal to or less than the second determination value, the power supply unit 50 has a fifth drain voltage (third) corresponding to the fifth power lower than the third power as the drain voltage Vd2 to the second amplifier 2. (3 Lower than the drain voltage) is applied, and a 6th drain voltage (lower than the 4th drain voltage) corresponding to the 6th power lower than the 4th power is applied to the 3rd amplifier 3 as the drain voltage Vd3. In this way, the power supply unit 50 supplies power to the second amplifier 2 and the third amplifier 3 constituting the Doherty amplification unit 40 in a plurality of stages (three stages in the present embodiment) based on the amplitude level of the input signal S0. Change to.

As a result, as the amplitude level of the input signal S0 decreases, the power (drain voltage to be applied) supplied to each of the second amplifier 2 and the third amplifier 3 is stepped with the first determination value and the second determination value as boundaries. It decreases to the target (three stages in this embodiment). Correspondingly, the backoff point of the Dougherty amplification unit 40 also gradually decreases (three stages in the present embodiment) with the first determination value and the second determination value as boundaries.

Further, when the power amplitude level of the input signal S0 is equal to or less than the threshold value, the control unit 11b outputs a command signal to the Doherty signal generation unit 11d. The Doherty signal generation unit 11d generates Doherty signals S21 and S22 based on the input signal S0. Here, the Doherty signals S21 and S22 are, as is well known, signals obtained by separating the input signal S0 into two signals. However, the phase of the Doherty signal S22 is 90 ° behind the Doherty signal S21. The Doherty signals S21 and S22 are two signals to be amplified by the Doherty amplification unit 40, and constitute a second signal group. The Doherty signal generation unit 11d outputs the Doherty signals S21 and S22 to the DA converters 13 and 14, respectively.

The DA converters 13 and 14, respectively, perform DA conversion of the Doherty signals S21 and S22, which are the second signal groups, and output the DA-converted signals to the mixers 16 and 17, respectively.

The mixers 16 and 17 up-convert each of the DA-converted Doherty signals S21 and S22 into RF signals, and output them to the second amplifier 2 and the third amplifier 3 constituting the Doherty amplification unit 40, respectively.

The second amplifier 2 and the third amplifier 3 amplify each of the Doherty signals S21 and S22, which are RF signals, and output them to the silley synthesizer 20, respectively.

The Siley synthesizer 20 synthesizes the amplified and output second signal groups S21 and S22 Doherty signals S21 and S22 at the second synthesis point 22, and outputs the amplified and output to the load L via the first synthesis point 21. Here, the second synthesis point 22 is arranged in the transmission line between the second amplifier 2 and the first synthesis point 21. Further, the reactance compensation element 24 is arranged in the transmission line between the third amplifier 3 and the second synthesis point 22. The electrical length of the transmission line from the second amplifier 2 to the second synthesis point 22 is adjusted to be an odd multiple of λ / 4. Further, the electrical length of the transmission line from the third amplifier 3 to the second synthesis point 22 including the reactance compensation element 24 is adjusted so that the Doherty signals S21 and S22 are synthesized in the same phase at the second synthesis point 22. ing.

Table 1 exemplifies the gate voltage signals Vg1, Vg2, and Vg3 with respect to the relationship between the power amplitude level of the input signal S0 and the threshold value.

Table 2 illustrates the drain voltages Vd1, Vd2, and Vd3 with respect to the operating state of the amplification device 100. Here, the "out phase", which is one of the operating states, indicates a state in which the power amplitude level of the input signal S0 is higher than the threshold value and the out phase amplification unit 30 is performing amplification. “Dougherty A”, which is one of the operating states, indicates a state in which the power amplitude level of the input signal S0 is equal to or lower than the threshold value and higher than the first determination value, and the Dougherty amplification unit 40 is performing amplification. “Dougherty B”, which is one of the operating states, indicates a state in which the power amplitude level of the input signal S0 is equal to or lower than the first determination value and higher than the second determination value, and the Doherty amplification unit 40 is performing amplification. “Dougherty C”, which is one of the operating states, indicates a state in which the power amplitude level of the input signal S0 is equal to or less than the second determination value and the Dougherty amplification unit 40 is performing amplification. The drain voltages Vd1, Vd2, and Vd3 are shown as relative values to the "out phase" state. As shown in Table 2, the values of the drain voltages Vd2 and Vd3 decrease as the states change to "Dougherty A", "Dougherty B", and "Dougherty C". Specifically, Vd1: Vd2: Vd3 is 1: 1: 1 in the "out phase", but 1: 0.73: 1 in "Dougherty A", and 1: 0.73: 1 in "Dougherty A". , 1: 0.584: 0.8, and in "Dougherty A", 1: 0.438: 0.6. The ratios illustrated in Table 2 are examples, and the ratios can be changed so as to achieve a desired backoff point.

In the amplification device 100 configured as described above, three amplifiers, the first amplifier 1, the second amplifier 2, and the third amplifier 3, are used, and the out-phase amplification unit 30 and the Dougherty amplification unit 40 are used as the second amplifier 2. Is shared. Then, the amplification device 100 switches between out-phase amplification and Doherty amplification according to the amplitude level of the power of the input signal. As a result, the amplification device 100 has high efficiency even when the dynamic range is wide, and the circuit scale is small. Further, as compared with the configuration of Patent Document 1, since the number of synthesis points when performing out-phase amplification can be reduced, the synthesis loss can be reduced and the efficiency becomes higher.

Further, in the amplification device 100 configured as described above, the backoff point of the Dougherty amplification unit 40 is lowered in a plurality of steps (three steps in the present embodiment) with the first determination value and the second determination value as boundaries. As a result, the amplification device 100 can maintain high efficiency and reduce power consumption while widening the dynamic range.

An example of the power efficiency η with respect to the backoff value of the input signal in the amplification device 100 configured as described above will be described with reference to FIG. In FIG. 3, the backoff value indicates the average level of the input signal power with respect to the designed maximum input signal power (peak power). That is, the backoff value is (average power / peak power). The backoff value is displayed in dB in FIG. The curve L1 is a curve showing the relationship of the power efficiency η with respect to the back-off value of the input signal when amplified by the out-phase amplification unit 30. The curve L1 is a case where the back-off point when amplified by the out-phase amplification unit 30 is designed to be −6 dBdB. The backoff point in the out-phase amplification unit 30 is the minimum value of the back-off value in which the out-phase amplification unit 30 is saturated. Further, the curve L2 is a curve showing the relationship of the power efficiency η with respect to the backoff value of the input signal when amplified by the Doherty amplification unit 40 in the “Dougherty A” state. The curve L3 is a case where the Dougherty amplification unit 40 in the “Dougherty B” state amplifies the curve. The curve L4 is a case where amplification is performed by the Doherty amplification unit 40 in the “Dougherty C” state. When the maximum value of the backoff value in which only the carrier amplifier (second amplifier 2) operates with respect to the maximum input signal power value in the Dougherty amplification unit 40 is set as the backoff point, "Dougherty A", "Dougherty B", and "Dougherty" In any state of "C", the backoff point is −7.5 dB. Further, in the example shown in FIG. 3, the threshold Th1 is the point where the curve L1 and the curve L2 intersect, the threshold Th2 is the point where the curve L1 and the curve L3 intersect, and the threshold Th3 is the point where the curve L1 and the curve L4 intersect. There is. The threshold Th1 is a threshold and the backoff value is about -9 dB. The threshold Th2 is the first determination value, and the backoff value is about -11 dB. The threshold Th3 is the second determination value, and the backoff value is about -13 dB.

In the example shown in FIG. 3, the backoff values having the thresholds Th1, Th2, and Th3 are equal to or less than the backoff point when the out-phase amplification unit 30 amplifies them, and "Dougherty A", "Dougherty B", and "Dougherty C". It is the value of the back-off operation region when amplified by the Doherty amplification unit 40 in any of the above states, and is the intersection of the curve L1 and the curve L2, the curve L3, or the curve L4. As a result, the amplification device 100 has the characteristics shown by the curve L5, so that a wide dynamic range of about -13 dB can be realized in a highly efficient state where the power efficiency η is about 0.6 or more. .. Therefore, for example, even if the peak power to be desired efficiency changes during the operation of the amplification device 100, it can be dealt with by changing the back-off point of the Doherty amplification unit 40. Furthermore, since the drain voltages Vd2 and Vd3 are changed in a plurality of stages (three stages in the example shown in FIG. 3), the band required for the power supply unit 50 is narrower than in the case of continuously changing the drain voltage, and the amplification device It contributes to the miniaturization of the circuit scale of 100, and the control processing is also reduced. Furthermore, since the drain voltages Vd2 and Vd3 are changed according to the amplitude level of the input signal S0 to realize the states of "Dougherty A", "Dougherty B", and "Dougherty C", the drain voltages Vd2 and Vd3 are realized. Can be suppressed from being set to an excessive voltage value. As a result, the power consumption of the amplification device 100 can be reduced, and even higher efficiency can be realized.

Further, when the amplitude level of the input signal S0 is equal to or less than the threshold value, the power supply unit 50 changes the power supplied to the second amplifier 2 and the third amplifier 3 in one or a plurality of steps based on the dynamic range of the input signal S0. It may be configured. For example, when the dynamic range when the input signal S0 is measured for a predetermined time is in the range D1 shown in FIG. 3, the power supply unit 50 changes the drain voltages Vd2 and Vd3 so as to switch to "Doherty A" at the threshold Th1. , The drain voltages Vd2 and Vd3 are changed so as to switch to "Doherty B" at the threshold Th2. The power supply unit 50 may be configured to change the drain voltage with only one of the threshold value Th1 and the threshold value Th2.

Further, when the dynamic range when the input signal S0 is measured for a predetermined time is in the range D2 shown in FIG. 3, the power supply unit 50 changes the drain voltages Vd2 and Vd3 so as to switch to "Doherty A" at the threshold value Th1. , The drain voltages Vd2 and Vd3 are changed so as to switch to "Doherty B" at the threshold Th2, and the drain voltages Vd2 and Vd3 are changed so as to switch to "Doherty C" at the threshold Th3. The power supply unit 50 may be configured to change the drain voltage at any one or two of the threshold Th1, the threshold Th2, and the threshold Th3. The dynamic range of the input signal S0 is calculated by the input power amplitude determination unit 11a. The input power amplitude determination unit 11a measures the input signal S0 for a predetermined time, and calculates the dynamic range based on the minimum value and the maximum value of the input signal S0.

(Embodiment 2)
FIG. 4 is a schematic configuration diagram of the amplification device according to the second embodiment. The amplification device 100A has a configuration in which the signal generator 10 is replaced with the signal generator 10A, the third amplifier 3 is deleted, and the third amplifiers 3A and 3B are added in the amplification device 100 according to the first embodiment shown in FIG. Have. The third amplifiers 3A and 3B all have the same configuration as the third amplifier 3, but the third amplifiers 3A and 3B are configured to have the same function as the third amplifier 3. The Dougherty amplification unit 40A is realized by using the second amplifier 2 and the third amplifiers 3A and 3B in combination. That is, the third amplifiers 3A and 3B, which are a plurality of (two in the present embodiment) amplifiers arranged in parallel, have a configuration corresponding to the third amplifier 3. The first amplifier 1, the second amplifier 2, and the third amplifiers 3A and 3B form an amplifier group.

The signal generator 10A has a configuration in which the DA converter 14 is deleted, the DA converters 14A and 14B are added, the mixer 17 is deleted, and the mixers 17A and 17B are added in the configuration of the signal generator 10. Both the DA converters 14A and 14B have the same configuration as the DA converter 14. Both the mixers 17A and 17B have the same configuration as the mixer 17. The drain voltage applied to the first amplifier 1 is the drain voltage Vd1A. The drain voltage applied to the second amplifier 2 is the drain voltage Vd2A. The drain voltage applied to the third amplifier 3A is the drain voltage Vd3A. The drain voltage applied to the third amplifier 3B is the drain voltage Vd3B.

The amplification device 100A operates differently from the amplification device 100A by having two third amplifiers 3A and 3B that operate as peak amplifiers.

(When the power amplitude level of the input signal S0 is higher than the threshold value)
In this case, the operation of the amplification device 100A is the same as that of the amplification device 100 described above.

(When the power amplitude level of the input signal S0 is less than or equal to the threshold value)
When the power amplitude level of the input signal S0 is equal to or less than the threshold value, the control unit 11b biases the first amplifier 1 to become a class C or lower amplifier as the gate voltage signal Vg1A, or turns off the operation. The signal (which may be 0V) is output to the first amplifier 1. Further, the control unit 11b outputs a voltage signal having a value biased so that the second amplifier 2 becomes a class A, class AB, or class B amplifier as the gate voltage signal Vg2A to the second amplifier 2. Further, the control unit 11b outputs a voltage signal having a value biased so that the third amplifier 3A becomes a class C amplifier as the gate voltage signal Vg3A to the third amplifier 3. Further, the control unit 11b outputs a voltage signal having a value biased so that the third amplifier 3B becomes a class C amplifier as the gate voltage signal Vg3B to the third amplifier 3B. As a result, the second amplifier 2 operates as a carrier amplifier, and the third amplifiers 3A and 3B operate as peak amplifiers. That is, when the power amplitude level of the input signal S0 is lower than the threshold value, the first amplifier 1 is supplied with the gate voltage signal Vg1A corresponding to the second bias voltage. The second amplifier 2 is supplied with a gate voltage signal Vg2A corresponding to the first bias voltage. The gate voltage signals Vg3A and Vg3B corresponding to the second bias voltage are supplied to the third amplifiers 3A and 3B.

As shown in FIGS. 5A and 5B, when the amplitude level of the input signal S0 is equal to or less than the threshold value and higher than the first determination value, the power supply unit 50 supplies the second amplifier 2 with the first power as the drain voltage Vd2A. A first drain voltage corresponding to the above is applied, and a second drain voltage corresponding to the second power is applied to the third amplifiers 3A and 3B as drain voltages Vd3A and Vd3B. Further, when the amplitude level of the input signal S0 is equal to or lower than the first determination value and higher than the second determination value, the power supply unit 50 corresponds to the third power lower than the first power as the drain voltage Vd2A in the second amplifier 2. A third drain voltage (lower than the first drain voltage) is applied, and the drain voltages Vd3A and Vd3B are applied to the third amplifiers 3A and 3B, and the fourth drain voltage (second drain) corresponding to the fourth power lower than the second power is applied. (Lower than voltage) is applied. Further, when the amplitude level of the input signal S0 is equal to or less than the second determination value, the power supply unit 50 has a fifth drain voltage (third) corresponding to the fifth power lower than the third power as the drain voltage Vd2A in the second amplifier 2. A sixth drain voltage (lower than the fourth drain voltage) corresponding to the sixth power, which is lower than the fourth power as the drain voltages Vd3A and Vd3B, is applied to the third amplifiers 3A and 3B while applying (lower than the third drain voltage). Apply. In this way, the power supply unit 50 supplies power to the second amplifier 2 and the third amplifiers 3A and 3B constituting the Doherty amplification unit 40 in a plurality of stages (3 in the present embodiment) based on the amplitude level of the input signal S0. Change to stage).

As a result, as the amplitude level of the input signal S0 decreases, the backoff point of the Dougherty amplification unit 40A also decreases stepwise in a plurality of steps (three steps in the present embodiment) with the first determination value and the second determination value as boundaries. To do.

Further, when the power amplitude level of the input signal S0 is equal to or less than the threshold value, the control unit 11b outputs a command signal to the Doherty signal generation unit 11d. The Doherty signal generation unit 11d generates Doherty signals S21, S22A, and S22B based on the input signal S0. Here, the Doherty signals S21, S22A, and S22B are signals in which the input signal S0 is separated into two Doherty signals S21 and S22 as is well known, and the Doherty signal S22 is further separated into Doherty signals S22A and S22B. However, the phases of the Doherty signals 22A and S22B are 90 ° behind the Doherty signal S21. The Doherty signals S21, S22A, and S22B form a second signal group to be amplified by the Doherty amplification unit 40A. The Dougherty signal generation unit 11d outputs the Dougherty signals S21, S22A, and S22B to the DA converters 13, 14A, and 14B, respectively.

The DA converters 13, 14A, and 14B perform DA conversion of the Doherty signals S21, S22A, and S22B, respectively, and output them to the mixers 16, 17A, and 17B, respectively.

The mixers 16, 17A, and 17B up-convert each of the DA-converted Doherty signals S21, S22A, and S22B into RF signals, and the second amplifier 2 and the third amplifier 3A, 3B constituting the Doherty amplification unit 40A, respectively. Output to each of.

The second amplifier 2 and the third amplifiers 3A and 3B amplify each of the Doherty signals S21, S22A, and S22B, which are RF signals, and output them to the silley synthesizer 20, respectively. The Doherty signals S22A and S22B are synthesized in the same phase in the front stage of the reactance compensating element 24.

The Siley synthesizer 20 synthesizes the amplified and output Doherty signal S21 and the amplified and output Doherty signals S22A and S22B in the same phase at the second synthesis point 22, and the first synthesis point 21 Is output to the load L via.

The gate voltage signals Vg1A and Vg2A with respect to the relationship between the power amplitude level of the input signal S0 and the threshold value in the amplification device 100A may be the same as the values of the gate voltage signals Vg1 and Vg2 illustrated in Table 1. The gate voltage signals Vg3A and Vg3B may be the same as the values of the gate voltage signals Vg3 illustrated in Table 1.

Further, the drain voltages Vd1A and Vd2A with respect to the operating state of the amplification device 100A may be the same as the values of the drain voltages Vd1 and Vd2 illustrated in Table 2. The drain voltages Vd3A and Vd3B may be the same as the values of the drain voltages Vd3 illustrated in Table 2.

In the amplification device 100A configured as described above, a wide dynamic range can be realized in a state where the power efficiency η is high efficiency, similarly to the amplification device 100. Further, as compared with the configuration of Patent Document 1, since the number of synthesis points when performing out-phase amplification can be reduced, the synthesis loss can be reduced and the efficiency becomes higher.

Further, in the amplification device 100A configured as described above, the backoff point of the Doherty amplification unit 40A is lowered with the first judgment value and the second judgment value as boundaries, so that the dynamic range is wider and the efficiency is high. Can be maintained and power consumption can be reduced.

An example of the power efficiency η with respect to the backoff value of the input signal in the amplification device 100A configured as described above can be represented in the same manner as in FIG. Therefore, for example, even if the peak power to be desired efficiency changes during the operation of the amplification device 100A, it can be dealt with by changing the backoff point of the Doherty amplification unit 40A. Further, since the drain voltages Vd2, Vd3A, and Vd3B are changed in a plurality of stages, the band required for the power supply unit 50 is narrowed, which contributes to the miniaturization of the circuit scale of the amplification device 100A and the control processing is also reduced. Further, the power consumption of the amplification device 100A can be reduced, and even higher efficiency can be realized.

In the first and second embodiments, the first amplifier, the second amplifier, and the third amplifier may have the same maximum output power or may be different from each other.

Further, in the above embodiment, a mixer for up-conversion to the RF signal is provided after each DA converter. However, if an RF DAC capable of DA conversion and directly outputting an RF signal is used as each DA converter, it is not necessary to provide a mixer.

Further, in the above embodiment, the drain voltage applied to the second amplifier and the third amplifier is changed in three steps, but it may be changed in four steps or more, or may be changed in two steps.

Moreover, the present invention is not limited by the above-described embodiment. The present invention also includes those configured by appropriately combining the components of each of the above-described embodiments. Further, further effects and modifications can be easily derived by those skilled in the art. Therefore, the broader aspect of the present invention is not limited to the above-described embodiment, and various modifications can be made.

1 1st amplifier 2 2nd amplifier 3, 3A, 3B 3rd amplifier 10, 10A Signal generator 11 Signal processing unit 11a Input power amplitude determination unit 11b Control unit 11c Out-phase signal generation unit 11d Doherty signal generation unit 12, 13, 14, 14A, 14B DA converter 15, 16, 17A, 17B Mixer 20 Siley synthesizer 21 First synthesis point 22 Second synthesis point 23, 24 Reactance compensation element 25, 26 Adjustment unit 30 Out phase amplification unit 40, 40A Doherty amplification Unit 50 Power supply unit 51 Voltage control unit 100, 100A Amplifier L Load S0 Input signal S11, S12 Out-phase signal S21, S22, S22A, S22B Doherty signal Th1, Th2, Th3 Threshold Vd1, Vd2, Vd3, Vd3A, Vd3B Drain voltage Vg1, Vg2, Vg3, Vg3A, Vg3B Gate voltage signal

Claims (8)

A group of amplifiers that are configured by arranging multiple amplifiers in parallel and realize an out-phase amplification unit and a Dougherty amplification unit by combining amplifiers, and
In the previous stage of the amplifier group, a detection unit that detects the amplitude level of the input signal and
Whether the out-phase amplification unit amplifies and outputs the input signal, or the Doherty amplification unit amplifies and outputs the input signal according to the amplitude level of the input signal detected by the detection unit. Selection part to select, and
A power supply unit that supplies electric power to each amplifier constituting the amplifier group is provided.
The power supply unit is an amplification device characterized in that the back-off point of the Doherty amplification unit is changed based on the amplitude level of the input signal. Based on the amplitude level of the input signal, the power supply unit changes the power supplied to the plurality of amplifiers constituting the Dougherty amplification unit in a plurality of stages to change the backoff point of the Doherty amplification unit. The amplification device according to claim 1. Based on the amplitude level and dynamic range of the input signal, the power supply unit changes the power supplied to the plurality of amplifiers constituting the Dougherty amplification unit in one or a plurality of stages, and backs off the Doherty amplification unit. The amplification device according to claim 1, wherein the point is changed. The amplifier group includes a first amplifier, a second amplifier, and a third amplifier arranged in parallel.
The out-phase amplification unit is realized by a combination of the first amplifier and the second amplifier.
The amplification device according to any one of claims 1 to 3, wherein the Doherty amplification unit is realized by a combination of the second amplifier and the third amplifier. A first synthesis point for synthesizing the first signal group amplified and output by the out-phase amplification unit and a second synthesis point for synthesizing the second signal group amplified and output by the Dougherty amplification unit are provided. The second synthesis point is arranged between the second amplifier and the first synthesis point, and the reactance compensating element that compensates for the reactance component generated between the amplifiers is the third amplifier and the second synthesis point. The amplification device according to claim 4, further comprising a synthesizer arranged between and. When the amplitude level of the input signal is higher than the threshold value, the first signal group is generated and output to the out-phase amplification unit, and when the amplitude level of the input signal is equal to or lower than the threshold value, the second signal group is generated. The amplification device according to any one of claims 1 to 5, further comprising a signal generation unit that generates a signal and outputs the signal to the Doherty amplification unit. The first amplifier is supplied with a first bias voltage when the amplitude level of the input signal is higher than the threshold value, and is different from the first bias voltage when the amplitude level of the input signal is lower than the threshold value. Bias voltage is supplied,
The first bias voltage is supplied to the second amplifier.
The amplification device according to claim 6, wherein the third amplifier is supplied with the second bias voltage. The amplification device according to claim 4, wherein the third amplifier is composed of a plurality of amplifiers arranged in parallel.

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