JP2020155784A - Semiconductor device - Google Patents

Abstract

To solve such a problem of conventional semiconductor chip that a source electrode and a sense pad electrode for current detection are provided separately on the front surface of the semiconductor chip, and since the sense pad electrode requires an occupied area equal to multiple times that of the cell unit of a MOSFET, the area of the sense pad electrode becomes larger than that of the source electrode.SOLUTION: A semiconductor device includes a semiconductor substrate, a surface electrode provided above the semiconductor substrate, a first wire for a first terminal connected with the surface electrode, and a second wire for current sense connected with the surface electrode. Resistance of the path of a current flowing to the second wire is higher than that of the path of a current flowing to the first wire.SELECTED DRAWING: Figure 1

Description

The present invention relates to a semiconductor device.

Conventionally, in a semiconductor chip having a MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor), a sense pad electrode for current detection has been provided (see, for example, Patent Documents 1 and 2).
[Prior art literature]
[Patent Document]
[Patent Document 1] Japanese Patent Application Laid-Open No. 2002-314079 [Patent Document 2] Japanese Patent Application Laid-Open No. 2006-351985

In the conventional semiconductor chip, the source electrode and the sense pad electrode for current detection are separately provided on the front surface of the semiconductor chip. In this case, it was necessary to make the occupied area of the sense pad electrode a plurality of times the area of the MOSFET cell unit. As a result, for example, there is a problem that the area of the sense pad electrode is larger than that of the source electrode.

In the first aspect of the present invention, a semiconductor device is provided. The semiconductor device may include a semiconductor substrate, a surface electrode, a first wire for the first terminal, and a second wire for current sensing. The surface electrode may be provided above the semiconductor substrate. The first wire for the first terminal may be connected to the surface electrode. A second wire for current sensing may also be connected to the surface electrode. The resistance of the path of the current flowing through the second wire may be higher than the resistance of the path of the current flowing through the first wire.

The diameter of the first wire may be larger than the diameter of the second wire.

The resistance per unit length of the first wire may be lower than the resistance per unit length of the second wire.

The first region of the surface electrode to which the first wire is connected may have a larger area than the second region of the surface electrode to which the second wire is connected.

The first region of the surface electrode to which the first wire is connected may have a material different from the second region of the surface electrode to which the second wire is connected.

The thickness of the second region of the surface electrode to which the second wire is connected may be equal to or less than the thickness of the first region of the surface electrode to which the first wire is connected, or the thickness of the second region of the surface electrode is the first. It may be thinner than the thickness of the first region of the surface electrode to which the wire is connected.

The surface electrode may include a contiguous zone. As the connection area, the first area and the second area may be connected in the first direction. A first wire may be connected to the first region of the surface electrode. A second wire may be connected to the second region of the surface electrode. The length of the connection region in the second direction may be smaller than the length of the second region in the second direction. The second direction may be orthogonal to the first direction.

The semiconductor device may further include a gate electrode pad. The gate electrode pad may be provided at a position parallel to the second direction and different from the second region and the connection region. The gate electrode pad may be connected to the gate electrode of the semiconductor device.

The semiconductor device may further include a temperature sense electrode pad. The temperature sense electrode pad may be provided on the side opposite to the gate electrode pad with respect to the connection region and the second region in the direction parallel to the second direction. The temperature sense electrode pad may be used as a temperature sense element for measuring the temperature of the semiconductor device.

The resistance of the continental zone may be 10 times or more the on-resistance of the semiconductor device.

The semiconductor substrate may have a diode region below the connection region. The diode region may not include either the source region or the emitter region, which is a region of low resistance for electrons.

The thickness of the connection region of the surface electrode may be thinner than the thickness of the first region and thinner than the thickness of the second region.

The outline of the above invention does not list all the necessary features of the present invention. Subcombinations of these feature groups can also be inventions.

It is a figure which shows the upper surface of the semiconductor device 100 in 1st Embodiment. It is a figure which shows the AA' cross section in FIG. It is a figure which shows the source electrode 54 in 2nd Embodiment. It is a figure explaining the current control mechanism. It is a figure which shows the upper surface of the semiconductor device 300 in 3rd Embodiment. It is a figure which shows the enlarged view of the region VI of FIG. 5 in the 1st modification of 3rd Embodiment. It is a figure which shows the BB' cross section of FIG. 6 in the 2nd modification of 3rd Embodiment. It is a figure which shows the BB' cross section of FIG. 6 in the 3rd modification of 3rd Embodiment. It is a figure which shows the upper surface of the semiconductor device 400 in 4th Embodiment. It is a figure which shows the cross section of the semiconductor device in 5th Embodiment. It is a figure which shows the cross section of the semiconductor device in 6th Embodiment. It is a figure which shows the cross section of the semiconductor device in 7th Embodiment. It is a figure which shows the cross section of the semiconductor device in 8th Embodiment.

Hereinafter, the present invention will be described through embodiments of the invention, but the following embodiments do not limit the inventions claimed in the claims. Also, not all combinations of features described in the embodiments are essential to the means of solving the invention.

FIG. 1 is a diagram showing an upper surface of the semiconductor device 100 according to the first embodiment. In this example, the x direction as the second direction and the y direction as the first direction are directions orthogonal to each other. The z direction is the direction perpendicular to the xy plane. The x-direction, y-direction, and z-direction form a so-called right-handed system. In this example, "up" and "upward" mean the + z direction, and "down" and "downward" mean the -z direction.

The semiconductor device 100 of this example includes a semiconductor substrate 10, a source electrode 54 as a surface electrode, a source current wire 60 as a first wire, a sense current wire 62 as a second wire, and a gate electrode pad 56. And at least a gate runner 57 and a guard ring 58. The semiconductor device 100 of this example has a MOSFET as a switching element.

The source electrode 54 is provided above the semiconductor substrate 10. The source electrode 54 may be a metal film of Al (aluminum) or an alloy containing Al, and is a laminated film in which a metal film of an alloy containing Al or Al is laminated on a barrier metal layer such as Ti (titanium). You may.

The source electrode 54 of this example has a first region 50-1 to which the source current wire 60 is connected and a second region 50-2 to which the sense current wire 62 is connected. In this example, the boundary between the first region 50-1 and the second region 50-2 is shown by a dotted line. However, in this example, the first region 50-1 and the second region 50-2 are physically connected in the y direction, and there is no difference in material or structure. Therefore, the boundary is merely a boundary for convenience of explanation. In this example, the thickness of the first region 50-1 of the source electrode 54 and the thickness of the second region 50-2 of the source electrode 54 are the same.

The second region 50-2 of this example is provided at the end in the + x direction and the end in the + y direction of the source electrode 54. The second region 50-2 of this example is a strip-shaped region having predetermined lengths in the x-direction and the y-direction. In one example, in the case of a wire containing Al as a main component, the width of the second region 50-2 in the x direction is 60 [μm], and the width in the y direction is 120 [μm]. Further, in the case of a wire containing a metal other than Al, for example, Cu (copper) or Au (gold) as a main component, the width in the x direction is 60 [μm] and the width in the y direction is 60 [μm] or more. is there.

The first region 50-1 of this example has a larger area than the second region 50-2. The ratio of the area of the first region 50-1 to the area of the second region 50-2 is usually determined by the sense ratio, which is the ratio of the main current to the sense current. When the area ratio determined by the sense ratio is 100: 1 to 100,000: 1, the actual area ratio is 50: 1 to 1000: 1 because the conventional technique requires a pad structure for separating the sense portion from the source electrode. However, in the present invention, the actual area ratio may be in the range of 80: 1 to 10000: 1 because the pad structure for separating from the source electrode is not required in the sense portion. In this example, the ratio of the area of the first region 50-1 to the area of the second region 50-2 is about 150: 1.

In this example, four source current wires 60 are provided on the first region 50-1, and one sense current wire 62 is provided on the second region 50-2. The first region 50-1 and the second region 50-2 are electrically connected to the source current wire 60 and the sense current wire 62 via the solder 63, respectively. The diameter of the source current wire 60 may be larger than the diameter of the sense current wire 62. The diameter of the source current wire 60 may be 100 [μm] or more, and the diameter of the sense current wire 62 may be less than 100 [μm]. In this example, the diameter of the source current wire 60 is 300 [μm], and the diameter of the sense current wire 62 is 50 [μm].

The source current wire 60 and the sense current wire 62 may be made of the same material or different materials from each other. The material may be one or a combination of two or more wires containing Al, Au, Ag (silver) and Cu as main components. In this example, both the source current wire 60 and the sense current wire 62 contain Al as a main component. Since the resistance of the wire decreases as the diameter increases, the resistance per unit length of the source current wire 60 is lower than the resistance per unit length of the sense current wire 62 in this example.

The source current wire 60 may have the same length as the sense current wire 62 and may have a shorter length than the sense current wire 62. In this example, the source current wire 60 has the same length as the sense current wire 62. By making the length of the source current wire 60 shorter than the length of the sense current wire 62, the resistance of the current path flowing through one source current wire 60 flows through one sense current wire 62. It can be lower than the resistance of the current path.

In this example, by adjusting one or more of the diameter, material, and length of each wire, the resistance of the current path that flows through the sense current wire 62 becomes the current path that flows through the source current wire 60. Higher than the resistance of. For example, the resistance of the path of the current flowing through the sense current wire 62 is made higher than the resistance of the path of the current flowing through the source current wire 60 by two orders of magnitude or more. In this example, the resistance of the current path flowing through the sense current wire 62 is 5 [Ω], and the resistance of the current path flowing through the source current wire 60 is 50 [mΩ].

In this example, the resistance of the path of the current flowing through the source current wire 60 means the resistance in the source current wire 60 and the first region 50-1. In this example in which a plurality of source current wires 60 exist, the resistance of the path of the current flowing through the source current wire 60 means the combined resistance of the plurality of source current wires 60 and the second region 50-2. To do. Further, in this example, the resistance of the path of the current flowing through the sense current wire 62 means the resistance of the sense current wire 62. It should be noted that the resistance of the lead frame or the like to which the source current wire 60 and the sense current wire 62 are connected is not included.

In order to set the resistance of the path of the current flowing through the sense current wire 62 to a predetermined resistance value, a resistor may be added to the path of the current flowing through the sense current wire 62 separately from the wire. For example, assuming that the diameter of the source current wire 60 and the diameter of the sense current wire 62 are the same, a resistor is added separately from the sense current wire 62. As a result, the resistance of the path of the current flowing through the sense current wire 62 can be made higher than the resistance of the path of the current flowing through the source current wire 60. In this case, the resistance of the path of the current flowing through the sense current wire 62 means the combined resistance of the sense current wire 62 and a resistor provided separately.

The current flowing in the + z direction in the MOSFET may flow to a region of lower resistance in the xy plane of the source electrode 54. In this example, since the resistance of the current path flowing through the sense current wire 62 is higher than the resistance of the current path flowing through the source current wire 60, the current flows from the first region 50-1 to the second region 50-2. Is hard to flow in. As a result, the current (sense current) flowing through the sense current wire 62 can be made smaller than the current (main current) flowing through the source current wire 60.

Of the currents flowing in the MOSFET in the + z direction, not all of the currents reaching the second region 50-2 flow in the first region 50-1. For example, the current reaching the second region 50-2 is restricted from moving to the first region 50-1 by the sheet resistance of the source electrode 54. Therefore, the sense current flowing through the sense current wire 62 via the second region 50-2 is secured. Specifically, the ratio of the main current to the sense current can be regarded as the ratio of the resistance of the path of the current flowing through the source current wire 60 to the resistance of the path of the current flowing through the sense current wire 62.

Therefore, the sense current can be obtained without providing the sense pad electrode dedicated to current detection separated from the source electrode 54 as in the conventional case. In this example, it is not necessary to make the area 50-2 of the second region 50-2, which can function as the sense pad electrode, a plurality of times the area of each cell of the MOSFET. Therefore, the second region 50-2 can be made smaller than the case where the sense pad electrode separated from the source electrode 54 is provided as in the conventional case. In particular, in this example, the ratio of the main current to the sense current can be stabilized by the ratio of the resistance of the path of the current flowing through the source current wire 60 to the resistance of the path of the current flowing through the sense current wire 62. .. Thereby, the magnitude of the main current can be detected by using the sense current.

In addition, in this example, the MOSFET region (invalid region) that contributes only to obtaining the sense current without contributing to obtaining the main current is separated from the source electrode 54 as in the conventional case. Can be made smaller than in the case of providing. When the invalid area increases, the main current (that is, the output characteristic) decreases. Therefore, it is necessary to increase the chip size when the invalid area increases. When the chip size is increased, the number of semiconductor chips that can be formed per wafer decreases, so that there is a problem that the manufacturing cost per semiconductor chip increases. On the other hand, in this example, the ineffective area can be reduced as compared with the case where the sense pad electrode separated from the source electrode 54 is provided as in the conventional case, so that the manufacturing cost can be reduced.

Further, in the example in which the sense pad electrode separated from the source electrode 54 is provided as in the conventional case, the MOSFET under the sense pad electrode is placed on the xy plane by a separation structure using a p ⁺ type impurity region or an edge termination structure. It is common to enclose. When the MOSFET has a super junction structure, the charge balance of p-type and n-type impurities may be lost due to the separation structure or edge termination structure provided near the bottom of the sense pad electrode. As a result, characteristic fluctuations such as a decrease in withstand voltage may occur. On the other hand, in this example, one of the separation structure and the edge termination structure so as to surround not only the second region 50-2 but the entire first region 50-1 and the second region 50-2. Since the above is provided, there is an advantage that characteristic fluctuations such as a decrease in withstand voltage do not occur.

This example of narrowing the sense current with respect to the main current by the difference in the resistance of the path works effectively when the on-resistance of the MOSFET is relatively low. For example, it is effective when the on-resistance of the MOSFET is several [mΩ]. In this example, the on-resistance of the MOSFET is set to 3 [mΩ]. However, when the on-resistance of the MOSFET is several [Ω], it is difficult to adjust the ratio of the main current to the sense current even if the resistance ratio of the path is adjusted.

Of course, this example may be applied not only to MOSFETs but also to IGBTs (Insulated Gate Bipolar Transistors). In the IGBT, the drift layer becomes a low resistance state due to the conductivity modulation. Then, at a predetermined on-voltage [V] or higher, a current flows between the collector electrode and the emitter electrode. When the on voltage of the IGBT is about 1.5 [V], the ratio of the main current to the sense current can be adjusted by adjusting the resistance ratio of the path as in this example.

In this example, the ratio of the main current to the sense current is set to a predetermined ratio by the ratio of the resistance of the current path flowing through the sense current wire 62 to the resistance of the current path flowing through the source current wire 60. Can be determined. The predetermined ratio may be in the range of 1,00: 1-100,000: 1. The main current can be calculated by measuring a sense current that is relatively small compared to the main current and multiplying it by the predetermined ratio.

The source electrode 54 of this example has a notch at the end in the y direction. The notch portion of this example is located between the first region 50-1 and the second region 50-2 in the x direction. A gate electrode pad 56 is provided in the notch portion of this example. A gate wire may be provided on the gate electrode pad 56. A gate potential may be input to the gate electrode pad 56 from the outside of the semiconductor device 100 via a gate wire.

The gate runner 57 of this example surrounds the first region 50-1, the second region 50-2, and the gate electrode pad 56. The gate runner 57 of this example is electrically connected to the gate electrode pad 56 and the gate electrode 34 described later. The gate runner 57 of this example supplies the gate potential supplied to the gate electrode pad 56 to the gate electrode 34 of the MOSFET provided on the semiconductor substrate 10. The material of the gate electrode 34 and the gate runner 57 may be polysilicon (poly-Si).

The amount of large current to be conducted through a semiconductor device has tended to increase in recent years. Along with this, it is required to detect the main current in order to improve the operating efficiency of the semiconductor device and to prevent the semiconductor device from being destroyed. In this example, the magnitude of the main current is detected by using the sense current to reduce the voltage applied to the gate electrode pad 56. As a result, the main current is cut off or suppressed.

The guard ring 58 of this example surrounds the gate runner 57. The guard ring 58 may have a plurality of impurity regions having a ring shape, each of which has a similar shape. The guard ring 58 may have impurities having the opposite polarity to that of the semiconductor substrate 10. The guard ring 58 of this example has a p-type impurity with respect to the n ^- type semiconductor substrate 10. The guard ring 58 has a function of extending the depletion layer to the end of the semiconductor substrate 10. That is, the guard ring 58 functions as an edge termination structure. As a result, the withstand voltage of the semiconductor device 100 can be improved as compared with the case where the guard ring 58 is not provided. It is obvious that a field plate is effective in addition to the guard ring 58 for improving the pressure resistance, and the field plate may be used. When a field plate is used, the gate runner 57 can also be used as a field plate.

FIG. 2 is a diagram showing a cross section taken along the line AA'in FIG. FIG. 2 shows a specific configuration of the MOSFET 90 in the semiconductor device 100. The semiconductor substrate 10 of this example includes the n ⁺ type layer 22 to the second interlayer insulating film 38. The semiconductor substrate 10 of this example has a front surface 14 in the + z direction and a back surface 12 in the −z direction. In this example, the contact region 44 and the second interlayer insulating film 38 mainly form the front surface 14. The source electrode 54 is located on the front surface 14, and the drain electrode 52 is located below the back surface 12.

In this example, n or p means that the electrons or holes are multiple carriers, respectively. Also, for + or-stated on the right shoulder of n or p, + means a higher carrier concentration than one without it, and-means a lower carrier concentration than one without it. To do. In this example, the base region 42 is p-type, but in other examples, the base region 42 may be n-type. Impurity polarities of other configurations can be appropriately determined by those skilled in the art. Further, in this example, E means a power of 10, for example, 1E + 16 means 1 × 10 ¹⁶ .

In this example, where the semiconductor layer and the semiconductor region are SiC, the n-type impurities may be one or more of N (nitrogen) and P (phosphorus), and the p-type impurities are Al and B (boron). It may be one or more of them. On the other hand, in another example in which the semiconductor layer and the semiconductor region are GaN, the n-type impurity is one or more elements of Si (silicon), Ge (germanium), S (sulfur) and O (oxygen). It may be. The p-type impurity may be one or more of Mg (magnesium), Ca (calcium), Be (beryllium) and Zn (zinc).

The MOSFET 90 includes an n ⁺ type layer 22, an n-type layer 24, a column layer 26, a trench portion 30, a base region 42, a contact region 44, a source region 46, a first interlayer insulating film 36, a second interlayer insulating film 38, and a drain electrode. It has 52 and a source electrode 54. In FIG. 2, not all the configurations are designated in consideration of the legibility of the drawings, but the partially attached symbols make the overall configuration clear to those skilled in the art.

In the first region 50-1 and the second region 50-2 of this example, the unit structure constituting the MOSFET 90 is repeatedly provided in the y direction. Further, the unit structure is provided extending in the x direction by a predetermined length. As a result, a plurality of unit structures repeatedly provided in the y direction constitute one cell in the MOSFET 90. The MOSFET 90 has a plurality of cells. In the first region 50-1 and the second region 50-2 of this example, the unit structure of the MOSFET 90 is the same. Therefore, the output characteristics of the current in the first region 50-1 and the second region 50-2 are the same.

The n ⁺ type layer 22 is located on the drain electrode 52. The n ⁺ type layer 22 may be a seed crystal substrate of the semiconductor substrate 10 having SiC. An epitaxially grown n-type layer 24 is located on the n ⁺ type layer 22. The column layer 26 is located on the n-type layer 24. The column layer 26 of this example has a repeating structure of an n-type column 27 and a p-type column 28 in the y direction. The trench portion 30 may be located on the n-type column 27, and the base region 42 may be located on the p-type column 28.

The trench portion 30 has a gate electrode 34 and a gate insulating film 32. The gate insulating film 32 of this example has a side portion in contact with the base region 42 and a bottom portion in contact with the n-type column 27. The gate electrode 34 is in contact with the gate insulating film 32.

In this example, the p ⁺ type contact region 44 and the n ⁺ type source region 46 are located on the p-type base region 42. The source region 46 is in contact with the gate insulating film 32. The pair of source regions 46 sandwich the contact region 44 in the y direction.

The first interlayer insulating film 36 is provided so as to cover the top of the trench portion 30 and a part of the source region 46. A thicker second interlayer insulating film 38 is located on the first interlayer insulating film 36. The first interlayer insulating film 36 and the second interlayer insulating film 38 may be SiO ₂ (silicon dioxide). The source electrode 54 is located on the first interlayer insulating film 36 and the second interlayer insulating film 38. The source electrode 54 is electrically connected to the contact region 44 and the source region 46 through the openings in the first interlayer insulating film 36 and the second interlayer insulating film 38.

When a predetermined potential is applied to the gate electrode 34, a charge inversion region is formed in the base region 42. The charge reversal region functions as a channel region in which electrons move. When a predetermined potential is applied to the gate electrode 34 when there is a predetermined potential difference between the source electrode 54 and the drain electrode 52, the n ⁺ type layer 22, the n type layer 24, and the n type column are applied from the drain electrode 52. A current flows through the source electrode 54 through 27, the channel region and the source region 46.

As described above, the resistance of the path of the current flowing through the sense current wire 62 is higher than the resistance of the path of the current flowing through the source current wire 60, so that the current reaching the first region 50-1 is the source current wire. It flows to 60. On the other hand, the current arriving at the second region 50-2 flows to the sense current wire 62. In FIG. 2, the magnitude and direction of the current are represented by arrows. The larger the size of the arrow, the larger the amount of current.

FIG. 3 is a diagram showing a source electrode 54 in the second embodiment. In this example, the thickness of the second region 50-2 of the source electrode 54 is thinner than the thickness of the first region 50-1 of the source electrode 54. Thereby, in this example, the ratio of the resistance of the path is mainly adjusted by the sheet resistance. It is assumed that the first region 50-1 and the second region 50-2 have the same material. Further, the thickness is assumed to be the length of the source electrode 54 in the z direction.

In this example, the sheet resistance r ₂ of the source electrode 54 in the second region 50-2 is higher than the sheet resistance r ₁ of the source electrode 54 in the first region 50-1. As a result, the resistance of the path of the current flowing through the sense current wire 62 can be made higher than the resistance of the path of the current flowing through the source current wire 60.

In this example, in order to partially change the thickness of the source electrode 54, a metal film is formed twice in the first region 50-1, and a metal film is formed once in the second region 50-2. Good. The thickness of the metals laminated in one film formation may be substantially equal. Instead of this, in order to partially change the thickness of the source electrode 54, a metal film is formed on the first region 50-1 and the second region 50-2, and then only the second region 50-2 is etched back. You may.

In this example, the example of the source current wire 60 and the sense current wire 62 of the first embodiment may be applied. In this example, the sense current wire by adjusting one or more of the sheet resistances of the first region 50-1 and the second region 50-2 in addition to the diameter, material and length of each wire. The resistance of the path of the current flowing through the 62 can be made higher than the resistance of the path of the current flowing through the source current wire 60. As a result, the current flowing through the sense current wire 62 can be limited, and the detection accuracy of the sense current can be improved.

As a first modification of the second embodiment, the first region 50-1 may have a material different from that of the second region 50-2. In one example, in the first region 50-1, the source electrode 54 may be composed of Ti and an alloy containing Al or Al laminated on the Ti. On the other hand, in the second region 50-2, the source electrode 54 may be configured from Ti alone. The resistivity of Ti is about an order of magnitude higher than that of Al or an alloy containing Al. In addition to the difference in materials, the sheet resistance may be adjusted by adjusting the thickness of the second region 50-2. The source electrode of the second region 50-2 may be laminated with a plurality of layers such as Ti / TiN.

FIG. 4 is a diagram illustrating a current control mechanism. In the example of FIG. 4, the MOSFET 90 of the second embodiment will be used for description. In the MOSFET 90, the first region 50-1 has a sheet resistance r ₁ , the second region 50-2 has a sheet resistance r ₂ , the source current wire 60 has a combined resistance R ₁ , and a sense current. use wire 62 and has a resistance _{R 2.} In this example, R ₁ is R ₂ or less, and r ₁ is smaller than r ₂ .

In this example, a forward bias V is applied between the drain electrode 52 and the first region 50-1 and the second region 50-2. A load is electrically connected to the tip of the source current wire 60. Further, the current detection unit 94 is electrically connected to the tip of the sense current wire 62.

The current detection unit 94 measures the current flowing from the sense current wire 62 to the current detection unit 94. The current detection unit 94 notifies the control unit 98 of the measured current value. Control unit 98 receives a notification of the current value, and controls the gate potential _{(V G)} applied to the gate electrode 34 of the MOSFET 90.

Specifically, when the current value measured by the current detection unit 94 is higher than the predetermined value, the control unit 98 may reduce the main current by lowering the gate potential. On the other hand, when the current value measured by the current detection unit 94 is lower than the predetermined value, the control unit 98 may increase the main current by increasing the gate potential. As a result, the control unit 98 can control the main current of the MOSFET 90.

For example, the control unit 98 can control the semiconductor device 100 so that the current flowing through the MOSFET 90 does not exceed the rated current by controlling the gate potential. As a result, it is possible to prevent the semiconductor device 100 from being destroyed. Needless to say, the current control mechanism of this example may be applied to the first embodiment.

FIG. 5 is a diagram showing the upper surface of the semiconductor device 300 according to the third embodiment. The source electrode 54 of this example includes a connection region 50-3. The connection area 50-3 is located between the first area 50-1 and the second area 50-2. The connection region 50-3 connects the first region 50-1 and the second region 50-2 in the y direction. In this example, the length of the connection region 50-3 in the y direction is 10 [μm]. The length in the x direction in the connection region 50-3 is smaller than the length in the x direction in the second region 50-2.

The resistance of the connection region 50-3 may be 10 times or more the on-resistance of the MOSFET 90 in the semiconductor device 100. In this example, the on-resistance of the MOSFET 90 is 3 [mΩ], which is the same as in the first embodiment. Therefore, the resistance of the connection region 50-3 in this example is 30 [mΩ] or more. The connection region 50-3 of this example has a sheet resistance of 30 [mΩ] in the xz cross section. As a result, it is possible to suppress the flow of current from the first region 50-1 to the second region 50-2.

The gate electrode pad 56 of this example is provided at a position different from the second region 50-2 and the connection region 50-3 in the direction parallel to the x direction. The gate electrode pad 56 of this example has a region protruding in the + x direction, depending on the shape of the connection region 50-3 and the second region 50-2. The third embodiment differs from the first and second embodiments in that it has a continental zone 50-3. Other points may be the same as in the first or second embodiment.

FIG. 6 is a diagram showing an enlarged view of the region VI of FIG. 5 in the first modification of the third embodiment. The source current wire 60 and the sense current wire 62 are omitted in consideration of the legibility of the drawings. In FIG. 6, the source electrode 54 and the gate electrode pad 56 are shown by dotted lines. Further, the p ⁺ type contact region 44 and the n ⁺ type source region 46 located below the source electrode 54 and the gate electrode pad 56 are shown by solid lines. In FIG. 6, the p ⁺ type region under the source electrode 54 is the contact region 44, but the other p-type region may function as a separation region. Further, the gate electrode pad 56 and the p-shaped region under the gate electrode pad 56 are electrically separated by an insulating film.

The semiconductor substrate 10 of this example has a diode region 40 below the connection region 50-3. In FIG. 6, the diode region 40 is shown with diagonal lines. The diode region 40 is a region that does not include the source region 46, which is a region having low resistance for electrons. The diode region 40 has a pn diode consisting of a p ⁺ type contact region 44, a p-type base region 42, and an n-type column 27.

Since the source region 46 is not provided in the diode region 40 of this example, even if a potential equal to or higher than the gate threshold voltage is supplied to the gate electrode 34, the source-drain current does not flow in the diode region 40. That is, for the current flowing in the MOSFET 90 in the + z direction, the diode region 40 has a higher resistance than the MOSFET 90 under the first region 50-1 and the second region 50-2.

The semiconductor device 300 of this example has a contact portion 59 connected to the gate electrode pad 56 or the gate runner 57 at the end of the trench portion 30 in the ± x direction. The gate potential is supplied from the gate electrode pad 56 to the gate electrode 34 via the contact portion 59. This example differs from the third embodiment in that it has a connection region 50-3 and a diode region 40. Other points may be the same as in the third embodiment.

FIG. 7A is a diagram showing a BB'cross section of FIG. 6 in a second modification of the third embodiment. FIG. 7B is a diagram showing a BB'cross section of FIG. 6 in a third modification of the third embodiment. As shown in FIG. 7A, the thickness of the connection region 50-3 of the source electrode 54 is thinner than the thickness of the first region 50-1 and thinner than the thickness of the second region 50-2. Further, as shown in FIG. 7B, the thickness of the connection region 50-3 of the source electrode 54 is thinner than the thickness of the first region 50-1 and the thickness of the second region 50-2, and the thickness of the first region 50- The thickness of 1 and the thickness of the second region 50-2 are the same. As a result, the sheet resistance r ₃ in the connection region 50-3 can be made higher than the sheet resistance r ₂ in the second region 50-2. Therefore, it is possible to more effectively prevent the current from flowing from the first region 50-1 to the second region 50-2 via the connection region 50-3.

In another example, the thickness of the connection region 50-3 and the second region 50-2 of the source electrode 54 may be the same, and both may be thinner than the first region 50-1. Also, as in the above embodiment, any one of the diameter, material and length of each wire and the sheet resistance of the first region 50-1, the second region 50-2, and the connection region 50-3. The above may be adjusted. In this respect, this example differs from the third embodiment. Other points may be the same as in the third embodiment.
When the ratio of the main current to the sense current can be adjusted without changing the thickness of the source electrode 54 in the first region 50-1, the second region 50-2, and the connection region 50-3, the first embodiment Similarly, the thicknesses of the source electrodes 54 in the first region 50-1, the second region 50-2, and the connection region 50-3 may be the same.

FIG. 8 is a diagram showing the upper surface of the semiconductor device 400 according to the fourth embodiment. The semiconductor device 400 of this example further includes a temperature sense element 80 and a temperature sense electrode pad 55 for the temperature sense element 80. The temperature sense element 80 of this example has a function of measuring the temperature of the semiconductor device 400. The temperature sense element 80 of this example is located substantially in the center of the xy plane where the temperature is highest in the semiconductor device 400. Further, the temperature sense electrode pad 55 is located on the side opposite to the gate electrode pad 56 with respect to the connection region 50-3 and the second region 50-2 in the direction parallel to the x direction.

The temperature sense element 80 may be a pn diode. A predetermined forward current may be passed through the pn diode. Depending on the temperature of the semiconductor device 400, the value of a predetermined forward current or voltage flowing through the temperature sense element 80 changes. Similar to the example of FIG. 4, a predetermined forward current or voltage flowing through the temperature sense element 80 may be input to the control unit 98. The control unit 98 may determine the temperature of the semiconductor device 400 from a predetermined forward current or voltage change.

As the temperature of the semiconductor device 400 changes, the magnitudes of the main current and the sense current of the MOSFET 90 can change. In the MOSFET 90, the main current tends to decrease as the temperature rises, even if the gate potential is the same. For example, when the temperature of the semiconductor device 400 is 125 [° C.], the main current is smaller than when the temperature of the semiconductor device 400 is 25 [° C.].

Therefore, the control unit 98 may control the gate potential _{(V G)} applied to the gate electrode 34 of the MOSFET90 according to the temperature of the semiconductor device 400. Alternatively or simultaneously, the control unit 98 may control the magnitude of the forward bias that supplies power to the semiconductor device 400, depending on the temperature of the semiconductor device 400.

When the temperature of the semiconductor device 400 is higher than a predetermined value, the control unit 98 reduces the main current by lowering the gate potential and the forward bias to reduce the temperature of the semiconductor device 400. On the other hand, when the temperature of the semiconductor device 400 is lower than a predetermined value, the control unit 98 may increase the main current by increasing the gate potential and the forward bias. Needless to say, this example may be applied to the above-mentioned first to third embodiments and modified examples thereof.

FIG. 9 is a diagram showing a cross section of the semiconductor device according to the fifth embodiment. FIG. 9 specifically shows a cross section of a plurality of unit structures of the IGBT 92. The plurality of unit structures may constitute one cell as in the example of MOSFET 90. The semiconductor device of this example has an IGBT 92 instead of the MOSFET 90. Along with this, the n ⁺ type layer 22, the n type layer 24, the source region 46, the drain electrode 52 and the source electrode 54 in the example of the MOSFET 90 are the p-type collector layer 82 and the n ⁺ type FS (Field Stop) layer, respectively. 84, n ⁺ type emitter region 86, collector electrode 72 and emitter electrode 74.

Of course, this example may be applied to the above-mentioned first to fourth embodiments and modified examples thereof. Along with this, the diode region 40 in the example of FIG. 6 may be a region that does not include the emitter region 86, not the source region 46.

FIG. 10 is a diagram showing a cross section of the semiconductor device according to the sixth embodiment. FIG. 10 shows a cross section of a plurality of unit structures of a MOSFET 91 without a column layer 26 of an n-type column 27 and a p-type column 28 having a superjunction structure. The plurality of unit structures may constitute one cell as in the example of MOSFET 90. The semiconductor device of this example is formed of an n ⁺ type layer 22, an n-type layer 24, a source region 46, a drain electrode 52, a source electrode 54, and the like. Of course, this example may be applied to the above-mentioned first to fourth embodiments and modifications thereof. In particular, it is effective for low withstand voltage (200 V or less) with low on-resistance. Further, this example may be applied to the above-mentioned fifth embodiment and modified examples thereof as an IGBT not provided with the column layer 26 of the n-type column 27 and the p-type column 28 having a super-bonded structure. In this case, the n ⁺ type layer 22 may be the p-type collector layer 82.

FIG. 11 is a diagram showing a cross-sectional view of the semiconductor device according to the seventh embodiment. FIG. 11 shows a cross section of a plurality of unit structures of a MOSFET 93 having a planar gate structure. The plurality of unit structures may constitute one cell as in the example of MOSFET 90. The semiconductor device of this example includes n ⁺ type layer 22, n type layer 24, column layer 26, gate insulating film 32, gate electrode 34, second interlayer insulating film 38, base region 42, source region 46, drain electrode 52 and It is formed of a source electrode 54 or the like. Of course, this example may be applied to the above-mentioned first to fourth embodiments and modifications thereof. Further, this example may be applied as an IGBT to the above-mentioned fifth embodiment and modified examples thereof. In this case, the n ⁺ type layer 22 may be the p-type collector layer 82.

FIG. 12 is a diagram showing a cross-sectional view of the semiconductor device according to the eighth embodiment. FIG. 12 shows a cross section of a plurality of unit structures of a MOSFET 95 having a planar gate structure without a column layer 26 of an n-type column 27 and a p-type column 28 having a superjunction structure. The semiconductor device of this example includes an n ⁺ type layer 22, an n-type layer 24, a gate insulating film 32, a gate electrode 34, a second interlayer insulating film 38, a base region 42, a source region 46, a drain electrode 52, a source electrode 54, and the like. Is formed by. Of course, this example may be applied to the above-mentioned first to fourth embodiments and modifications thereof. In particular, it is effective for low withstand voltage (200 V or less) with low on-resistance. Further, this example may be applied to the above-mentioned fifth embodiment and modified examples thereof as an IGBT not provided with the column layer 26 of the n-type column 27 and the p-type column 28 having a super-bonded structure. In this case, the n ⁺ type layer 22 may be the p-type collector layer 82.

The present invention is also effective for wide bandgap MOSFETs such as SiC and GaN.

Although the present invention has been described above using the embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It will be apparent to those skilled in the art that various changes or improvements can be made to the above embodiments. It is clear from the description of the claims that the form with such changes or improvements may be included in the technical scope of the present invention.

The order of execution of each process such as operation, procedure, step, and step in the device, system, program, and method shown in the claims, specification, and drawings is particularly "before" and "prior to". It should be noted that it can be realized in any order unless the output of the previous process is used in the subsequent process. Even if the scope of claims, the specification, and the operation flow in the drawings are explained using "first," "next," etc. for convenience, it means that it is essential to carry out in this order. It's not a thing.

10 ... Semiconductor substrate, 12 ... Back surface, 14 ... Front surface, 22 ... n ⁺ type layer, 24 ... n type layer, 26 ... Column layer, 27 ... n type column, 28 ... p-type column, 30 ... trench, 32 ... gate insulating film, 34 ... gate electrode, 36 ... first interlayer insulating film, 38 ... second interlayer insulating film, 40 ... diode region, 42 ... Base region, 44 ... contact region, 46 ... source region, 50-1 ... first region, 50-2 ... second region, 50-3 ... connection region, 52 ... drain electrode, 54 ... Source electrode, 55 ... temperature sense electrode pad, 56 ... gate electrode pad, 57 ... gate runner, 58 ... guard ring, 59 ... contact part, 60 ... source current wire, 62 ... for sense current Wire, 63 ... solder, 72 ... collector electrode, 74 ... emitter electrode, 80 ... temperature sense element, 82 ... collector layer, 84 ... FS layer, 86 ... emitter region, 90 ... MOSFET, 91・ ・ MOSFET, 92 ・ ・ IGBT, 93 ・ ・ MOSFET, 94 ・ ・ Current detector, 95 ・ ・ MOSFET, 98 ・ ・ Control unit, 100 ・ ・ Semiconductor device, 300 ・ ・ Semiconductor device, 400 ・ ・ Semiconductor device

Claims (6)

With a semiconductor substrate
A surface electrode provided above the semiconductor substrate and having a first region and a second region,
The first wire for the first terminal connected to the first region and
The second wire for current sense connected to the second region and
A gate electrode pad located between the first region and the second region,
A gate runner that surrounds the first region, the second region, and the gate electrode pad is provided.
The first region and the second region have the same material and are physically connected, and the resistance of the path of the current flowing through the second wire is higher than the resistance of the path of the current flowing through the first wire. high,
A semiconductor device in which the length of the side of the first region in contact with the gate runner is longer than the length of the side of the second region in contact with the gate runner on one side of the gate runner in contact with the gate electrode pad. The semiconductor device according to claim 1, wherein the diameter of the first wire is larger than the diameter of the second wire. The semiconductor device according to claim 1 or 2, wherein the resistance per unit length of the first wire is lower than the resistance per unit length of the second wire. The semiconductor device according to any one of claims 1 to 3, wherein the first region has a larger area than the second region. The semiconductor according to any one of claims 1 to 4, wherein the thickness of the second region of the surface electrode to which the second wire is connected is equal to or less than the thickness of the first region of the surface electrode to which the first wire is connected. apparatus. The semiconductor according to any one of claims 1 to 4, wherein the thickness of the second region of the surface electrode to which the second wire is connected is thinner than the thickness of the first region of the surface electrode to which the first wire is connected. apparatus.

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