JP2020155705A - Semiconductor device - Google Patents

Abstract

To provide a semiconductor device capable of suppressing a gate voltage without transmitting and receiving a signal during a short circuit operation, and thereby capable of shortening a time from a short circuit to a start of a protected operation.SOLUTION: A semiconductor device 100 comprises: a base layer 7 disposed on a front side surface of a drift layer 6; a source layer 8 disposed on a front side surface of a base layer 7; a first trench 5a in contact with the source layer 8 and passing through the base layer 7 to reach the drift layer 6; a second trench 5b passing through the base layer 7 to reach the drift layer 6; a gate voltage control electrode 13 disposed in the second trench 5b and disposed to be in contact with the base layer 7 and the source layer 8 outside the second trench 19; a thermionic element 15 having one end in contact with the gate voltage control electrode 13; an emitter electrode 14 to which a reference potential of a gate signal voltage is connected, in contact with the other end of the thermionic element 15; and a third insulating film 16 insulating the gate voltage control electrode 13 and the emitter electrode 14 from each other.SELECTED DRAWING: Figure 2

Description

The present application relates to semiconductor devices.

In a semiconductor device such as a power module used for an inverter or the like, even if a power transistor such as an IGBT having a built-in switching function is short-circuited, the power transistor is required to withstand for a certain period of time without being destroyed. The constant time is, for example, 2 to 10 μs, and is the time until the short-circuit protection circuit operates when a short circuit occurs and the operation of the semiconductor device is stopped by the short-circuit protection circuit.

When the power transistor is short-circuited, the power transistor may generate heat and be destroyed as the short-circuited time continues. If the power transistor is destroyed, there is a concern that the peripheral devices of the semiconductor device may be destroyed. Therefore, in a semiconductor device provided with a power transistor, it is required to start a short-circuit protection operation such as energization control as soon as possible when the power transistor is short-circuited, and stop the operation of the semiconductor device.

As a protection operation of energization control, there is a technique of controlling energization of the power transistor to prevent destruction of the power transistor by controlling the gate voltage of the power transistor when the power transistor is short-circuited. For example, a conventional semiconductor device has a Rogowski coil, and when a short-circuit detector detects a short-circuit of a power transistor based on the output voltage of the Rogowski coil and the short-circuit detector detects a short-circuit, the gate A semiconductor device that prevents the power transistor from being destroyed by reducing the gate signal voltage of the power transistor by a voltage limiting means to control energization is described (see, for example, Patent Document 1).

Japanese Unexamined Patent Publication No. 2001-169533

However, in the conventional semiconductor device as described above, the signal for detecting the short circuit and the signal for lowering the gate signal voltage are transmitted and received (including signal processing such as calculation) between the short circuit and the reduction of the gate signal voltage. is necessary. Since it takes time to send and receive signals, there is a problem that it takes time to start energization control during a short-circuit operation.

The present application has been made to solve the above-mentioned problems, and an object of the present application is to provide a semiconductor device capable of energization control by lowering the gate voltage without transmitting and receiving signals during a short-circuit operation.

The semiconductor device according to the present application includes a first conductive type drift layer, a second conductive type base layer provided on the surface of the drift layer, and a first conductive type source selectively provided on the surface of the base layer. A first trench that is in contact with the layer, the source layer, penetrates the base layer, and reaches the drift layer, a first insulating film provided on the side surface and the bottom surface of the first trench, and a first trench provided in the first trench. 1. A gate electrode facing the base layer via an insulating film, a second trench penetrating the base layer and reaching the drift layer, a second insulating film arranged on the side surface and the bottom surface of the second trench, and a base. A gate voltage control electrode provided on the layer and the source layer in contact with the base layer and the source layer, and also provided in the second trench adjacent to the second insulating film, and a third electrode on the voltage control electrode. An emitter electrode provided via an insulating film and to which a reference potential of the gate signal voltage is connected, one end electrically connected to the gate voltage control electrode in the second trench, and electrically connected to the emitter electrode. It is provided with a thermoelectric element having the other end and making the potential of one end higher than the potential of the other end according to the temperature difference between one end and the other end.

According to the semiconductor device disclosed in the present application, since the gate voltage can be suppressed without transmitting and receiving signals during the short-circuit operation, it is possible to provide a semiconductor device capable of shortening the time from the short-circuit to the start of the protection operation. ..

It is a top view of the semiconductor device which concerns on Embodiment 1. FIG. It is sectional drawing of the semiconductor device which concerns on Embodiment 2. FIG. It is a figure which shows an example of the electric field distribution inside the semiconductor device which concerns on Embodiment 1 at the time of a short circuit operation. It is a figure which shows the effect of suppressing the gate voltage at the time of the short-circuit operation of the semiconductor device which concerns on Embodiment 1 using the Seebeck effect. FIG. 4 is a diagram in which a gate voltage during normal operation of the semiconductor device according to the first embodiment is added. It is a top view of the semiconductor device which concerns on Embodiment 2. FIG. It is sectional drawing of the semiconductor device which concerns on Embodiment 2. FIG. It is a top view of the semiconductor device which concerns on Embodiment 3. FIG. It is sectional drawing of the semiconductor device which concerns on Embodiment 3. FIG.

Hereinafter, embodiments will be described with reference to the drawings. Since the drawings are schematically shown, the interrelationships of size and position can be changed. In the following description, the same or corresponding components may be given the same reference numerals and repeated description may be omitted.

Also, in the following description, when terms that mean a specific position and direction such as "top", "bottom", "side", "bottom", "front" or "back" are used. However, these terms are used for convenience in order to facilitate understanding of the contents of the embodiments, and do not limit the direction in which they are actually implemented.

The conductive type of the semiconductor will be described with the first conductive type as the n type and the second conductive type as the p type. However, these may be reversed and the first conductive type may be p-type and the second conductive type may be n-type. The n + type means that the concentration of donor impurities is higher than that of the n type, and the n- type means that the concentration of donor impurities is lower than that of the n type. Similarly, p + type means that the concentration of acceptor impurities is higher than that of p type, and p-type means that the concentration of acceptor impurities is lower than that of p type.

<Embodiment 1>
The configuration of the semiconductor device 100 according to the first embodiment will be described with reference to FIG. FIG. 1 is a plan view of the semiconductor device according to the first embodiment.

The semiconductor device 100 has an active region 1, a gate pad region 2, and a terminal region 3 arranged so as to surround the active region 1 and the gate pad region 2 in a plan view. The active region 1 is an energized region, which is a region to which a wire for inputting a reference potential of a gate signal and a wire through which a main current flows are connected to the surface. The gate pad region 2 is a region to which a wire for inputting the gate potential of the gate signal of the semiconductor device 100 is connected. The terminal region 3 is a region for maintaining the withstand voltage of the semiconductor device 100. In the vicinity of the interface between the active region 1 and the terminal region 3, the gate wiring 4 connected to the gate pad region 2 is arranged in an annular shape. A plurality of trenches 5 connected to the gate wiring 4 are arranged in parallel in the active region 1.

Hereinafter, description will be made with reference to FIG. FIG. 2 is a cross-sectional view of the semiconductor device according to the first embodiment. FIG. 2 is a cross-sectional view taken along the line AA shown in FIG.

A p-type base layer 7 is arranged on the surface of the n-type drift layer 6. An n + type source layer 8 and a p + type diffusion layer 9 are selectively arranged on the surface of the base layer 7. A gate trench 5a that is in contact with the source layer 8 and penetrates the base layer 7 to reach the drift layer 6 is arranged. The first insulating film 10 is arranged on the side surface and the bottom surface of the gate trench 5a, and the gate electrode 11 is arranged so as to face the base layer 7 via the first insulating film 10. The gate electrode 11 is made of a material such as polysilicon. An interlayer insulating film 12 is arranged on the gate electrode 11. Although not shown in FIG. 2, the gate electrode 11 is electrically connected to the gate pad region 2 via the gate wiring 4. The p + type diffusion layer 9 is not always necessary, and the p + type diffusion layer 9 may be left as the base layer 7 without forming the p + type diffusion layer 9.

A thermoelectric element trench 5b that penetrates the base layer 7 and reaches the drift layer 6 is arranged. A second insulating film 19 is arranged on the side surface and the bottom surface of the thermoelectric element trench 5b, and a gate voltage control electrode 13 is arranged adjacent to the second insulating film 19. The gate voltage control electrode 13 is provided outside the thermoelectric element trench 5b in contact with the surfaces of the base layer 7, the source layer 8 and the diffusion layer 9, and the gate voltage control electrode 13 is provided in contact with the base layer 7 and the source layer. 8. It is electrically connected to the diffusion layer 9.

The thermoelectric element 15 has one end and the other end. The thermoelectric element 15 is made of a conductive N-type thermoelectric material, and utilizes the phenomenon that an electromotive force is generated according to the temperature difference between one end and the other end (Seebeck effect), and the end on the high temperature side is on the low temperature side. It is an element that has a higher potential by the amount of electromotive force from the end. In the present application, N-type and P-type indicating the type of thermoelectric material are shown in uppercase letters, and the semiconductor region is shown in lowercase letters for n-type and p-type to distinguish them.

One end of the thermoelectric element 15 is arranged in the trench 5b for the thermoelectric element, one end of the thermoelectric element 15 is connected to the gate voltage control electrode 13, and the other end of the thermoelectric element 15 is above the trench 5b for the thermoelectric element for the thermoelectric element. It is connected to the emitter electrode 14 outside the trench 5b. The gate voltage control electrode 13 and the emitter electrode 14 are electrically connected via the thermoelectric element 15, but the region other than the portions connected at one end and the other end of the thermoelectric element 15 is formed by the third insulating film 16. The gate voltage control electrode 13 and the emitter electrode 14 are electrically separated. The side surface of the thermoelectric element 15 is also covered with the third insulating film 16.

Further, FIG. 2 shows the surface S1 of the emitter electrode 14, the depth D1 of the surface of the base layer 7, and the depth D2 of the interface between the base layer 7 and the drift layer 6. The depth D1 of the surface of the base layer 7 and the depth D2 of the interface between the base layer 7 and the drift layer 6 are depths based on the surface S1 of the emitter electrode, respectively.

It is desirable that one end of the thermoelectric element 15 is arranged at a depth within ± 5 μm from the depth D2 of the interface between the base layer 7 and the drift layer 6. When one end of the thermoelectric element 15 is shallower than the above range, that is, when one end of the thermoelectric element 15 is arranged on the emitter electrode 14 side, the temperature difference between one end and the other end becomes small and the Seebeck effect is weakened. When one end of the thermoelectric element 15 is deeper than the above range, that is, when one end of the thermoelectric element 15 is arranged on the side away from the emitter electrode 14, it is necessary to form the thermoelectric element trench 5b deep in the drift layer 6. It is difficult to match the depth of the thermoelectric element trench 5b with the depth of the gate trench 5a. When the depth of the thermoelectric element trench 5b is deeper than the depth of the gate trench 5a, the electric field strength of the drift layer 6 near the bottom surface of the thermoelectric element trench 5b increases, so that the breakdown resistance of the drift layer 6 during the switching operation increases. There is a concern that Desirably, the depth of the thermoelectric element trench 5b and the depth of the gate trench 5a should be the same within the range of manufacturing error, and the depth of the thermoelectric element trench 5b and the depth of the gate trench 5a are within ± 5 μm. Is good.

The width Wa of the trench 5a and the width Wb of the thermoelectric element trench 5b may be the same width or different widths. For example, when the width of the thermoelectric element 15 is larger than the width of the gate electrode 11, the width Wb of the thermoelectric element trench 5b is made larger than the width Wa of the gate trench 5a to provide a space for arranging the thermoelectric element 15. You may.

An n-type buffer layer 16 is arranged on the back surface of the drift layer 6, and a p-type collector layer 17 is arranged under the buffer layer 16. A collector electrode 18 is arranged below the collector layer 17.

Next, an electromotive force utilizing the Seebeck effect of the thermoelectric element 15 during a short-circuit operation in the semiconductor device 100 configured as described above will be described. FIG. 3 is a diagram showing an example of the electric field distribution inside the semiconductor device according to the first embodiment at the time of short-circuit operation. During the short-circuit operation, a voltage _VCC corresponding to the external power supply is applied between the emitter electrode 14 and the collector electrode 18. The inside of the semiconductor device 100 has an electric field distribution as shown in FIG. 3 according to the voltage _VCC .

FIG. 3 shows an electric field in the active region 1 where the trench 5 is not arranged. The horizontal axis shows the distance of the emitter electrode 14 from the surface S1 in the depth direction, and the vertical axis shows the electric field corresponding to the distance of the emitter electrode 14 from the surface S1 in the depth direction. There is no electric field in the depth range from the surface S1 of the emitter electrode 14 to the depth D1 of the surface of the base layer 7. However, in the depth range D2 from the surface depth D1 of the base layer 7 to the depth D2 of the interface between the base layer 7 and the drift layer 6, the deeper the electric field, the stronger the electric field.

The heat generated inside the semiconductor device 100 increases according to the strength of the electric field. That is, the heat generated at the depth D2 of the interface between the base layer 7 and the drift layer 6 is larger than the heat generated at the surface S1 of the emitter electrode 14 and the surface depth D1 of the base layer 7.

One end of the thermoelectric element 15 is arranged at a depth of ± 5 μm from the depth D2 of the interface between the base layer 7 and the drift layer 6. The heat generated near the interface between the base layer 7 and the drift layer 6 having a strong electric field is transferred to one end of the thermoelectric element 15 via the second insulating film 19 and the gate voltage control electrode 13, and one end of the thermoelectric element 15. To raise the temperature. On the other hand, since the other end of the thermoelectric element 15 is connected to the back surface of the emitter electrode 14 having no electric field as described above, the temperature does not rise as compared with one end of the thermoelectric element 15. For this reason, during the short-circuit operation, the temperature at one end of the thermoelectric element 15 is higher than the temperature at the other end of the thermoelectric element 15.

Since the thermoelectric element 15 is made of a conductive N-type thermoelectric material, an electromotive force corresponding to the temperature difference between one end and the other end is generated, and the high temperature side end of the thermoelectric element 15 is on the low temperature side. The potential is raised by the amount of electromotive force from the end of. That is, during the short-circuit operation, one end of the thermoelectric element 15 has a higher potential than the other end.

FIG. 4 is a diagram showing the effect of suppressing the gate voltage during a short-circuit operation of the semiconductor device according to the first embodiment using the Seebeck effect. The horizontal line in FIG. 4 shows the potential VE of the emitter electrode 14, the potential VS1 of the gate voltage control electrode 13 at the time of short-circuit operation, and the potential VG of the gate electrode 11 from the bottom, and indicates that the potential is higher toward the upper side. ..

The arrows in FIG. 4 indicate the gate signal voltage V1 of the semiconductor device 100 and the gate drive voltage V2 during the short-circuit operation. Since the reference potential is connected to the emitter electrode 14 and the gate potential is connected to the gate pad region 2 connected to the gate electrode 11, the gate signal voltage V1 is the potential VE of the emitter electrode 14 and the potential VG of the gate electrode 11. It is indicated by the potential difference with. The gate drive voltage V2 during the short-circuit operation is indicated by the potential difference between the potential VS1 of the gate voltage control electrode 13 connected to the source layer 8 of the semiconductor device 100 and the potential VG of the gate electrode, and is indicated by the potential difference of the semiconductor device 100 during the short-circuit operation. It is a voltage that controls energization. The smaller the gate drive voltage V2 during the short-circuit operation, the smaller the current energized during the short-circuit operation, and the heat generation of the semiconductor device 100 can be suppressed to prevent destruction.

When the semiconductor device 100 is short-circuited, one end of the thermoelectric element 15 has a higher potential than the other end as described above. Since one end of the thermoelectric element 15 is connected to the gate voltage control electrode 13 and the other end of the thermoelectric element 15 is connected to the emitter electrode 14, the potential VS1 of the gate voltage control electrode 13 during the short-circuit operation is the emitter electrode. The potential becomes higher than the potential VE of 14. More specifically, since the potential VE of the emitter electrode 14 is controlled by the reference potential of the gate signal, the potential VE of the emitter electrode 14 does not decrease, and the potential VS1 of the gate voltage control electrode 13 during the short-circuit operation becomes The potential VE of the emitter electrode 14 is higher than that of the electromotive force generated by the thermoelectric element 15. That is, the gate drive voltage V2 during the short-circuit operation is smaller than the gate signal voltage V1 by the amount of the voltage generated by the thermoelectric element 15, and the semiconductor device 100 is energized so as to reduce the current in the active region 1 during the short-circuit operation. Can be controlled.

Next, the gate voltage during normal operation of the semiconductor device 100 will be described. The normal operation will be described by dividing it into three states: an energized (on) state, a non-energized (off) state, and a switching (switching) state between energized and non-energized. The energized state is about one applied voltage is as compared to the voltage V _CC at the time of short-circuit operation, for example, 100 minutes between the emitter electrode 14 and collector electrode 18, for example, 5 to 10 minutes when the current short-circuit operation Since it is about 1, one end and the other end of the thermoelectric element 15 do not rise in temperature as compared with the short-circuit operation, and the electromotive force due to the Seebeck effect is low. Since only the leak current flows in the non-energized state, the electromotive force due to the Seebeck effect is lower than that in the short-circuit operation. In the switched state between energized and de-energized, the electromotive force due to the Seebeck effect is lower than that in the short-circuit operation because the current and the electric field are lower and weaker than in the short-circuit operation. That is, during normal operation, the electromotive force due to the Seebeck effect of the thermoelectric element 15 is smaller than during short-circuit operation.

FIG. 5 is a diagram in which a gate voltage during normal operation of the semiconductor device according to the first embodiment is added to FIG. Specifically, FIG. 4 is a diagram in which the potential VS2 of the gate voltage control electrode 13 during normal operation and the gate drive voltage V3 during normal operation are added.

In the normal operation, the electromotive force due to the Seebeck effect of the thermoelectric element 15 is smaller than in the short-circuit operation, so that the potential increase at one end of the thermoelectric element 15 is smaller than that in the short-circuit operation. Therefore, the potential VS2 of the gate voltage control electrode 13 during normal operation is lower than the potential VS1 of the gate voltage control electrode 13 during short-circuit operation. The gate drive voltage V3 during normal operation is larger than the gate drive voltage V2 during short-circuit operation.

That is, when the normal operation is shifted to the short-circuit operation, the energization of the semiconductor device 100 can be controlled so as to reduce the gate drive voltage and reduce the current in the active region 1.

From the above, the semiconductor device 100 utilizes the Seebeck effect of the thermoelectric element 15 during the short-circuit operation to increase the potential of the gate voltage control electrode 13 connected to the source layer 8 to suppress the gate drive voltage V2, and the semiconductor device 100 It is possible to control the energization of. Since the gate drive voltage V3 can be suppressed without changing the gate signal voltage input from the outside, it is not necessary to send and receive signals to and from the outside.

<Embodiment 2>
The configuration of the semiconductor device 200 according to the second embodiment will be described with reference to FIGS. 6 and 7. FIG. 6 is a plan view of the semiconductor device according to the second embodiment. Further, FIG. 7 is a cross-sectional view of the semiconductor device according to the second embodiment. FIG. 7 is a cross-sectional view taken along the line BB shown in FIG. In the second embodiment, the description of the same or corresponding parts as the first embodiment will be omitted.

The semiconductor device 200 according to the second embodiment has a different thermoelectric element configuration from the semiconductor device 100 according to the first embodiment. In the semiconductor device 200 according to the second embodiment, the thermoelectric element 215 arranged in the thermoelectric element trench 5b has a configuration in which two N-type thermoelectric materials 215a and one P-type thermoelectric element 215b are set as one set. , The configuration is arranged in multiple iterations. As shown in FIG. 7, two N-type thermoelectric materials 215a are arranged so as to sandwich the P-type thermoelectric element 215b in the longitudinal direction of the thermoelectric element trench 5b, that is, in the left-right direction of the paper surface in FIG. The P-type thermoelectric element 215b is a thermoelectric element in which the end on the low temperature side has a higher potential by the electromotive force than the end on the high temperature side, and the end on the high temperature side is higher by the electromotive force than the end on the low temperature side. It has the opposite temperature characteristics to the electric potential N-type thermoelectric element 215a.

The N-type thermoelectric material 215a and the P-type thermoelectric element 215b each have one end and the other end. One end of the N-type thermoelectric material 215a and the P-type thermoelectric element 215b is arranged so as to have a depth of ± 5 μm from the depth D2 of the interface between the base layer 7 and the drift layer 6. The other ends of the N-type thermoelectric material 215a and the P-type thermoelectric element 215b are on the emitter electrode 14 side, that is, on the upper side of the paper surface in FIG. 6 from each one end, and the depth D2 of the interface between the base layer 7 and the drift layer 6 is From now on, it is placed farther than one end of each.

The other end of one N-type thermoelectric material 215a sandwiching the P-type thermoelectric element 215b is connected to the emitter electrode 14 via the thermoelectric element electrode 215c, and the other end of one N-type thermoelectric material 215a is a thermoelectric element. It is connected to the other end of the P-type thermoelectric element 215b via an electrode 215c. One end of the P-type thermoelectric element 215b is connected to one end of the other N-type thermoelectric material 215a via the thermoelectric element electrode 215c. The other end of the other N-type thermoelectric material 215a is connected to the gate voltage control electrode 13 via the thermoelectric element electrode 215c. Insulating material 215d is arranged in the other region between the emitter electrode 14 and the gate voltage control electrode 13. That is, the emitter electrode, the N-type thermoelectric material 215a, the P-type thermoelectric element 215b, the N-type thermoelectric material 215a, and the gate voltage control electrode 13 are connected in series via the thermoelectric element electrode 215c.

Next, an electromotive voltage utilizing the Seebeck effect of the thermoelectric element 215 during a short-circuit operation in the semiconductor device 200 configured as described above will be described. Even in the semiconductor device 200, at the time of a short circuit, one end of each of the N-type thermoelectric material 215a and the P-type thermoelectric element 215b becomes hotter than the other end of each.

The other end of the N-type thermoelectric material 215a is connected to the emitter electrode 14, and is the reference potential of the gate signal. One end of one N-type thermoelectric material 215a has a higher potential than the other end of one N-type thermoelectric material 215a by the amount of electromotive force generated by the Seebeck effect of one N-type thermoelectric material 215a. Since one end of the N-type thermoelectric material 215a is connected to one end of the P-type thermoelectric element 215b via the thermoelectric element electrode 215c, one end of the one N-type thermoelectric material 215a and one end of the P-type thermoelectric element 215b Is the same potential, and both are higher potentials than the potentials of the emitter electrode 14 and the other end of one N-type thermoelectric material 215a.

Since the other end of the P-type thermoelectric element 215b is lower than the other end of the P-type thermoelectric element 215b, the other end of the P-type thermoelectric element 215b is the amount of the electromotive force generated by the Seebeck effect generated by the P-type thermoelectric element 215b. Only one end of the P-type thermoelectric element 215b has a higher potential. Since the other end of the P-type thermoelectric element 215b is connected to one end of the other N-type thermoelectric element 215a via the thermoelectric element electrode 215c, the other end of the P-type thermoelectric element 215b and the other N-type thermoelectric material 215a The other end has the same potential, and both have a higher potential than the potential of one end of the N-type thermoelectric material 215a and one end of the P-type thermoelectric element 215b.

Since one end of the other N-type thermoelectric element 215a is hotter than the other end of the other N-type thermoelectric element 215a, one end of the other N-type thermoelectric element 215a is the effect generated by the other N-type thermoelectric element 215a. The potential is higher than that of the other end of the other N-type thermoelectric material 215a by the amount of the electromotive force generated by. Since the other end of the P-type thermoelectric element 215b is connected to one end of the other N-type thermoelectric element 215a via the thermoelectric element electrode 215c, the other end of the P-type thermoelectric element 215b and the other N-type thermoelectric material 215a The other end has the same potential, and both have a higher potential than the potential of one end of the N-type thermoelectric material 215a and one end of the P-type thermoelectric element 215b. Since one end of the high potential P-type thermoelectric element 215b is connected to the gate voltage control electrode 13, the potential of the gate voltage control electrode 13 can be made higher than the potential of the emitter electrode 14.

From the above, the semiconductor device 200 can control the energization of the semiconductor device 200 by increasing the potential of the gate voltage control electrode 13 connected to the source layer 8 by utilizing the Seebeck effect of the thermoelectric element 215 during the short-circuit operation. It is possible. Since the energization of the semiconductor device 200 can be controlled without changing the gate signal voltage input from the outside, it is not necessary to send and receive signals to and from the outside.

In the semiconductor device 200 according to the second embodiment, one end of the N-type thermoelectric element 215a and the other end of the P-type thermoelectric element 215b are arranged in series on the interface side between the base layer 7 and the drift layer 6 which become hot. Although the above example is shown, it is also possible to connect only the N-type thermoelectric element 215a in series. For example, the same effect can be obtained by connecting one end of one N-type thermoelectric element 215a and the other end of the other N-type thermoelectric element 215a with the thermoelectric element electrode 215c.

In the semiconductor device 200 according to the second embodiment, an example in which two N-type thermoelectric materials 215a and one P-type thermoelectric element 215b are set as one set is shown, but three N-type thermoelectric materials 215a and two P-types are shown. The same effect can be obtained by changing the number of thermoelectric elements connected in series, such as the thermoelectric element 215b.

<Embodiment 3>
The configuration of the semiconductor device 300 according to the third embodiment will be described with reference to FIGS. 8 and 9. FIG. 8 is a plan view of the semiconductor device according to the third embodiment. Further, FIG. 9 is a cross-sectional view of the semiconductor device according to the third embodiment. FIG. 9 is a cross-sectional view taken along the line CC shown in FIG. In the third embodiment, the description of the same or corresponding parts as those in the first and second embodiments will be omitted.

As shown in FIGS. 8 and 9, in the semiconductor device 300 according to the third embodiment, the thermoelectric element trench 5b is arranged at a position adjacent to the gate pad region 2 in the active region 1. As shown in FIG. 9, the thermoelectric element 315 is located in the direction perpendicular to the depth direction of the thermoelectric element trench 5b, that is, in the left-right direction of the paper surface so that one end and the other end of the thermoelectric element 315 are located in the thermoelectric element trench 5b. Placed in. One end of the thermoelectric element 315 is arranged on the active region 1 side with respect to the other end of the thermoelectric element 315.

The thermoelectric element 315 is made of an N-type thermoelectric material. One end of the thermoelectric element 315 is connected to the gate voltage control electrode 13, and the other end of the thermoelectric element 315 is connected to the emitter electrode 14. In order to connect to the thermoelectric element 315, the gate voltage control electrode 13 and the emitter electrode 14 have a portion parallel to the depth direction of the thermoelectric element trench 5b. The gate voltage control electrode 13 and the emitter electrode 14 are connected via the thermoelectric element 15, but the region other than the portion connected by the thermoelectric element 315 is electrically separated by the third insulating film 16. The side surface of the thermoelectric element 315 is also covered with the third insulating film 16. When it is difficult to form the third insulating film 16 in a wide range, the side surface of the thermoelectric element 15 may be covered with an insulating material.

During the short-circuit operation, the active region 1 generates heat due to energization, but the gate pad region 2 does not generate heat because it is a non-energized region during the short-circuit operation. Therefore, the temperature of the active region 1 at the time of short circuit is higher than that of the gate pad region 2.

Since one end of the thermoelectric element 315 is arranged on the active region 1 side with respect to the other end of the thermoelectric element 315, one end of the thermoelectric element 315 becomes hot with respect to the other end at the time of a short circuit. Therefore, when the semiconductor device 300 is short-circuited, one end of the thermoelectric element 315 has a higher potential than the other end, and the gate drive voltage during the short-circuit operation can be suppressed. Since the heat generated in the active region 1 is smaller in the normal operation of the semiconductor device 300 than in the short-circuit operation, the electromotive force due to the Seebeck effect of the thermoelectric element 15 is smaller in the normal operation than in the short-circuit operation.

That is, when the normal operation is shifted to the short-circuit operation, the gate drive voltage can be reduced and the energization of the semiconductor device 300 can be controlled so as to reduce the current in the active region 1.

From the above, the semiconductor device 300 utilizes the Seebeck effect of the thermoelectric element 315 during the short-circuit operation to increase the potential of the gate voltage control electrode 13 connected to the source layer 8 and suppress the gate drive voltage V2 to suppress the gate drive voltage V2. It is possible to control the energization of. Since the gate drive voltage V3 can be suppressed without changing the gate signal voltage input from the outside, it is not necessary to send and receive signals to and from the outside.

In the semiconductor device 300 according to the third embodiment, an example is shown in which one end of the thermoelectric element 315 is arranged on the active region 1 side and the other end is arranged on the gate pad region 2 side with respect to the other end of the thermoelectric element 315. However, even if one end of the thermoelectric element 315 is arranged on the active region 1 side with respect to the other end of the thermoelectric element 315 and the other end is arranged on the terminal region 3 side, the same effect can be obtained. This is because the terminal region 3 is a non-energized region at the time of short-circuit operation like the gate pad region 2.

5a Gate trench 5b Thermoelectric element trench 6 Drift layer 7 Base layer 8 Source layer 10 1st insulating film 11 Gate electrode 13 Gate voltage control electrode 15 Thermoelectric element 16 3rd insulating film 19 2nd insulating film 100 Semiconductor device 200 Semiconductor Device 215 Thermoelectric element 300 Semiconductor device 315 Thermoelectric element

Claims (8)

The first conductive type drift layer and
A second conductive type base layer provided on the surface of the drift layer and
A first conductive type source layer selectively provided on the surface of the base layer, and
A first trench that is in contact with the source layer, penetrates the base layer, and reaches the drift layer.
The first insulating film provided on the side surface and the bottom surface of the first trench, and
A gate electrode provided in the first trench and facing the base layer via the first insulating film, and
A second trench that penetrates the base layer and reaches the drift layer,
The second insulating film disposed on the side surface and the bottom surface of the second trench, and
A gate voltage control electrode provided on the base layer and on the source layer in contact with the base layer and the source layer, and also provided in the second trench adjacent to the second insulating film.
An emitter electrode provided on the voltage control electrode via a third insulating film and to which a reference potential of a gate signal voltage is connected,
It has one end electrically connected to the gate voltage control electrode in the second trench and the other end electrically connected to the emitter electrode, and the temperature difference between the one end and the other end. A thermoelectric element that raises the potential of one end higher than the potential of the other end according to
Semiconductor device equipped with. The thermoelectric element is constructed using an N-type thermoelectric material.
The semiconductor device according to claim 1. The thermoelectric element is configured by connecting at least two or more N-type thermoelectric materials and at least one P-type thermoelectric material in series.
The semiconductor device according to claim 1 or 2. The one end of the thermoelectric element is provided at a depth within ± 5 μm from the depth of the interface between the drift layer and the base layer.
The semiconductor device according to any one of claims 1 to 3. The width of the second trench is wider than the width of the first trench.
The semiconductor device according to any one of claims 1 to 4. The depth of the second trench is the same as the depth of the first trench.
The semiconductor device according to any one of claims 1 to 5. The one end of the thermoelectric element is electrically connected to the gate voltage control electrode in the second trench.
The other end of the thermoelectric element was electrically connected to the emitter electrode above and outside the first trench.
The semiconductor device according to any one of claims 1 to 6. The energized region in which the first trench and the second trench are arranged, and
A non-energized area arranged around the energized area and
With
The other end of the thermoelectric element is arranged in the second trench, and is arranged closer to the non-energized region side than the one end of the thermoelectric element.
The semiconductor device according to any one of claims 1 to 6.

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