JP2020139916A - Resolver signal processor, drive device, method for processing resolver signal, method for supporting design, and program - Google Patents

Abstract

To extract phase information of a resolver by a simple method without being affected by attenuation of the amplitude of an output signal of a resolver below a predetermined value.SOLUTION: The resolver signal processor according to an embodiment includes an output signal state detection unit, a compensation operation unit, and an excitation signal generation unit. The output signal state detection unit detects a two-phase signal output from a resolver excited by an excitation signal. The compensation operation unit compensates the attenuation of the detected two-phase signal with respect to the reference to cancel the attenuation on the basis of the degree of the attenuation. The excitation signal generation unit generates an excitation signal of the resolver, using the compensated result.SELECTED DRAWING: Figure 8

Description

Embodiments of the present invention relate to resolver signal processing devices, drive devices, resolver signal processing methods, design support methods, and programs.

The resolver signal processor extracts the phase information of the phase detected by the resolver based on the output signal of the resolver. The amplitude of the output signal of the resolver received by the resolver signal processor has a different value depending on the site where the resolver is provided. Such a difference in amplitude may be a factor that lowers the detection accuracy of the resolver signal processor.

Japanese Unexamined Patent Publication No. 2016-90244

The problem to be solved by the present invention is a resolver signal processing device and a drive device that extract the phase information of the resolver by a simple method without being affected by the amplitude of the output signal of the resolver being attenuated from a desired value. , Resolver signal processing methods, design support methods and programs.

The resolver signal processing device of one aspect of the embodiment includes an output signal state detection unit, a compensation calculation unit, and an excitation signal generation unit. The output signal state detection unit detects a two-phase signal output by the resolver excited by the excitation signal. The compensation calculation unit compensates for the attenuation of the detected two-phase signal with respect to the reference so as to cancel the attenuation based on the degree of the attenuation. The excitation signal generation unit generates an excitation signal of the resolver using the compensated result.

The block diagram of the drive apparatus including the resolver signal processing apparatus which concerns on 1st Embodiment. The block diagram of the resolver of an embodiment. The figure for demonstrating the two-phase excitation signal of the resolver of an embodiment. The figure for demonstrating the two-phase output signal of the resolver of embodiment. The block diagram of the resolver phase detection system which considered the amplitude attenuation factor K of an embodiment. The figure for demonstrating the detection rate in the 1st condition of embodiment. The figure for demonstrating the detection speed in the 2nd condition of embodiment. The block diagram of the design support apparatus of the 2nd Embodiment. The block diagram of the control part of an embodiment. The flowchart of the process in which the design support device of an embodiment determines a damping factor K. The block diagram of the resolver signal processing apparatus of the 3rd Embodiment. The block diagram of the gain adjustment unit of an embodiment.

Hereinafter, the resolver signal processing device, the drive device, the resolver signal processing method, and the program of the embodiment will be described with reference to the drawings. In the following description, the same reference numerals are given to configurations having the same or similar functions. Then, the duplicate description of those configurations may be omitted.

As the resolver of the embodiment, a two-phase excitation two-phase output type is illustrated. The two-phase output type resolver outputs two-phase signals of A phase and B phase, which are amplitude-modulated with a phase difference of about 90 degrees. For example, the above two-phase signal is a sine wave and a cosine wave whose amplitude changes depending on the phase θ0. The two-phase excitation type resolver is supplied with the A-phase and B-phase excitation signals whose amplitudes are modulated with a phase difference of approximately 90 degrees. In addition to the two-phase excitation two-phase output type, the resolver includes a one-phase excitation two-phase output type and a two-phase excitation one-phase output type.
In the following description, being electrically connected may be simply "connected". The case where the values of the speed, phase, etc. of the comparison target take the same value, or the case where they take substantially the same value, may be simply called "same".

(First Embodiment)
FIG. 1 is a configuration diagram of a drive device 1 including a resolver signal processing device 100 according to an embodiment.

The drive device 1 includes, for example, a resolver 2 (the description in the figure is SS), a motor 3 (the description in the figure is M), an inverter 4, and a resolver signal processing device 100.

The shaft of the resolver 2 is connected to the output shaft of the motor 3 and rotates in conjunction with the rotation of the output shaft of the motor 3. For example, the motor 3 is driven by the inverter 4.

The resolver signal processing device 100 is connected to the resolver 2, supplies a two-phase excitation signal to the resolver 2, and receives a two-phase signal output by the resolver 2.

Here, the resolver 2 will be described with reference to FIGS. 2A to 2C.
FIG. 2A is a block diagram of the resolver 2 of the embodiment. FIG. 2B is a diagram for explaining a two-phase excitation signal of the resolver 2 of the embodiment. FIG. 2C is a diagram for explaining a two-phase output signal of the resolver 2 of the embodiment.

For example, the resolver 2 is excited by a two-phase excitation signal having an excitation phase θex. The resolver 2 detects the mechanical angle phase θrm of the output shaft of the motor 3. The resolver 2 outputs a two-phase signal based on the excitation phase θex of the two-phase excitation signal and the phase θ0 related to the mechanical angle phase θrm.

The signals of sinθex and cosθex shown in FIGS. 2A to 2C are examples of two-phase excitation signals. The signals of sinθ0 and cosθ0 are examples of two-phase output signals. For example, the two-phase excitation signal and the two-phase output signal are both continuous signals. The mechanical angle phase θrm, the excitation phase θex of the two-phase excitation signal, and the phase θ0 have the relationship shown in the equation (1).

θ0 = θrm + θex ・ ・ ・ (1)
θex ＝ ∫ωex (t) dt ・ ・ ・ (2)

The excitation phase θex in the above equation (1) is derived based on the excitation angular frequency ωex (t) as shown in the equation (2). The excitation angular frequency ωex (t) changes depending on the time t. The excitation phase θex is derived by the time integration of the excitation angular frequency ωex (t).

Returning to FIG. 1, the description of the resolver signal processing device 100 will be continued.
The resolver signal processing device 100 detects the phase of the resolver 2, that is, the mechanical angle phase θrm of the output shaft of the motor 3 based on the above two-phase signal, and transfers the estimated mechanical angle phase value θrm_hat to the inverter 4. Supply. Hereinafter, the phase of the resolver 2 and its estimated value are simply referred to as a mechanical angle phase θrm and a mechanical angle phase estimated value θrm_hat.
As a result, the inverter 4 can drive the motor 3 by position control based on the mechanical angle phase estimated value θrm_hat by using the mechanical angle phase estimated value θrm_hat as feedback information instead of the mechanical angle phase θrm.

The resolver signal processing apparatus 100 will be described.
The resolver signal processing device 100 includes, for example, output buffer circuits 101A and 101B, input buffer circuits 104A and 104B, and a resolver signal processing unit 200.

The inputs of the output buffer circuits 101A and 101B are connected to the resolver signal processing unit 200. The outputs of the output buffer circuits 101A and 101B are connected to the exciting side of the resolver 2. The output buffer circuits 101A and 101B supply the resolver 2 with a two-phase signal based on the excitation signal supplied from the resolver signal processing unit 200 described later.

For example, the output buffer circuit 101A includes a digital-to-analog converter 102A (hereinafter referred to as a DA converter; the description in the figure is DA) for A-phase output, a buffer for signal amplification (not shown), and a transformer for insulation. 103A (the description in the figure is T.) and the like are included. The DA converter 102A, the buffer for signal amplification, and the transformer 103A are connected in the order described. The transformer 103A electrically insulates the resolver signal processing device 100 and the resolver 2. Assuming that the transformer ratio of the transformer 103A is 1, the description of the transformer in the following description will be omitted. The same applies to the output buffer circuit 101B, which includes a DA converter 102B (not shown) for B-phase output, a buffer for signal amplification (not shown), a transformer 103B, and the like. The DA converter 102B may be the same as the DA converter 102A. The transformer 103B may be the same as the transformer 103A. The DA converter 102B, the buffer for signal amplification, and the transformer 103B are connected in the order described. When the transformer ratios of the transformers 103A and 103B are not 1, the following description may be appropriately corrected according to the ratio value.

The inputs of the input buffer circuits 104A and 104B are connected to the output side of the resolver 2. The outputs of the input buffer circuits 104A and 104B are connected to the resolver signal processing unit 200. The input buffer circuits 104A and 104B receive a two-phase signal based on the phase θ0 from the resolver 2 and supply the two-phase signal to the resolver signal processing unit 200 described later.

For example, the input buffer circuit 104A includes an analog-to-digital converter 105A for A-phase input (hereinafter referred to as an AD converter; the description in the figure is AD), a buffer for signal amplification (not shown), and a transformer 106A for isolation (hereinafter referred to as an AD converter). The description in the figure includes T.) and the like. The transformer 106A for insulation, the buffer for signal amplification, and the AD converter 105A are connected in the order described. The same applies to the input buffer circuit 104B, which includes an AD converter 105B for B-phase input, a buffer for signal amplification (not shown), a transformer 106B, and the like. The transformer 106B for insulation, the buffer for signal amplification, and the AD converter 105B are connected in the order described.

The AD converters 105A and 105B convert each of the A-phase and B-phase analog signals output by the resolver 2 into digital values. The timing of conversion by the AD converters 105A and 105B is defined by a sampling command signal output from a sampling command signal generation processing unit (not shown), and has a predetermined period. The AD converters 105A and 105B supply the converted digital values to the resolver signal processing unit 200.

The resolver signal processing unit 200 converts the two-phase signal supplied as a digital value into phase information corresponding to the phase of the resolver 2 and supplies the signal to the inverter 4 via the output buffer circuits 101A and 101B.

The inverter 4 includes, for example, a semiconductor switching element (not shown) and an inverter control unit. The inverter 4 receives the supply of the mechanical angle phase estimated value θrm_hat of the motor 3 from the resolver signal processing unit 200, and drives the motor 3 according to the mechanical angle phase estimated value θrm_hat.

Next, the resolver signal processing unit 200 will be described.
The resolver signal processing unit 200 includes, for example, a deviation calculation unit 201, a PI controller 204 (the description in the figure is PI), a limiter 205, an adder 206 (integration calculation unit), and conversion processing units 207 and 208. The subtractor 209, the reference signal generation processing unit 210, the adder 211, the compensation calculation unit 213, and the excitation phase estimation value generation unit 215 are provided. The PI controller 204 is an example of a PI calculation unit. The deviation calculation unit 201 is an example of an output signal state detection unit. The conversion processing unit 208 is an example of an excitation signal generation unit.

The deviation calculation unit 201 includes, for example, multipliers 202A and 202B and a subtractor 203.

The input of the multiplier 202A is connected to the output of the AD converter 105A and the output of the conversion processing unit 207 described later. The multiplier 202A multiplies the A-phase signal component supplied from the AD converter 105A by the sinusoidal signal (sinθref) supplied from the conversion processing unit 207 to obtain the first product. The multiplier 202A supplies a first product to the first input of the subtractor 203 connected to the output.

The input of the multiplier 202B is connected to the output of the AD converter 105B and the output of the conversion processing unit 207 described later. The multiplier 202B multiplies the B-phase signal component supplied from the AD converter 105B by the cosine wave signal (cosθref) supplied from the conversion processing unit 207 to obtain a second product. The multiplier 202B supplies a second product to the second input of the subtractor 203 connected to the output.

The subtractor 203 subtracts the value of the second product calculated by the multiplier 202B from the value of the first product calculated by the multiplier 202A, and supplies the difference to the compensation calculation unit 213. The difference calculated by the subtractor 203 is called a deviation sin (θref−θ0).

The deviation calculation unit 201 may detect a deviation sin (θref−θ0) between the phase θ0 based on the two-phase signal output by the resolver 2 excited by the excitation signal and the reference phase θref.

The compensation calculation unit 213 performs a calculation for compensating for the attenuation of the two-phase signal output by the resolver 2. For example, the compensation calculation unit 213 compensates for the attenuation of the two-phase signal output by the resolver 2 with respect to the magnitude of the reference signal so as to cancel the attenuation based on the degree of the attenuation. At that time, the compensation calculation unit 213 multiplies the deviation sin (θref−θ0) calculated by the subtractor 203 by a desired constant Kr. The desired constant Kr is a positive real number of 1 or less. The compensation calculation unit 213 multiplies the desired coefficient Kr by sin (θref−θ0), and then supplies Kr × sin (θref−θ0) to the PI controller 204.

For example, the compensation calculation unit 213 has the deviation sin (θref−θ0) based on the detected two-phase signal magnitude (damping factor) with respect to the reference two-phase signal magnitude as described above. The size is adjusted, and Kr × sin (θref−θ0), which is the adjustment result that is the result of the adjustment, is output.

Although the case where the compensation calculation unit 213 is formed separately from the PI controller 204 described later will be described, the compensation calculation unit 213 may be formed so as to perform arithmetic processing in the PI controller 204 without being limited to this.

The PI controller 204 has a first integration process for integrating Kr × sin (θref−θ0), a gain multiplication process for multiplying Kr × sin (θref−θ0) by a constant, and a result of the first integration process and gain multiplication. An arithmetic process that adds the result of the process is performed. This is called proportional integration operation. The gain in the above proportional integration operation is simply called the PI gain, which is the sum of the gain of the first integration process and the gain of the gain multiplication process. The value of the calculation result of the PI controller 204 has a dimension of the excitation angular frequency (or frequency), and this is called the excitation angular frequency ωex. The constant of the gain multiplication process depends on the type of resolver 2. This will be described later.

The adder 211 adds and outputs the excitation angular frequency ωex, which is the calculation result of the PI controller 204, and the reference angular frequency ωref, which will be described later. The result is called the excitation angular frequency compensation value ωex_comp.

The limiter 205 limits the excitation angular frequency compensation value ωex_comp supplied from the adder 211 to a value in a desired range. For example, when the excitation angle frequency compensation value ωex_comp does not exceed a desired range based on a predetermined threshold value, the limiter 205 outputs the excitation angle frequency compensation value ωex_comp without limitation and outputs the excitation angle frequency compensation value. When ωex_comp exceeds the desired range, the excitation angle frequency compensation value ωex_comp is limited to a predetermined value. The fact that the excitation angular frequency compensation value ωex_comp does not exceed a desired range based on a predetermined threshold value is an example in which the excitation angular frequency compensation value ωex_comp based on the calculation result of the PI controller 204 satisfies a predetermined condition. Is.

The integrator 206 performs a second integration process for integrating the excitation angular frequency compensation value ωex_comp, for example. However, when the excitation angular frequency compensation value ωex_comp is limited by the limiter 205, the limit value is integrated instead of the excitation angular frequency compensation value ωex_comp. The calculation result of the integrator 206 is called the excitation phase θex.

The subtractor 209 subtracts the value of the excitation phase θex, which is the calculation result of the integrator 206, from the value of the reference phase θref supplied from the reference signal generation processing unit 210.

The excitation phase estimation value generation unit 215 generates the excitation phase estimation value θrm_hat based on the calculation result of the subtractor 209.

The reference signal generation processing unit 210 generates a reference angular frequency ωref and a reference phase θref based on the reference frequency fref. The reference signal generation processing unit 210 may integrate the reference angular frequency ωref to generate the reference phase θref.

The conversion processing unit 207 converts the reference phase θref into a chord wave signal (cos θref) and a sine wave signal (sin θref). The sine wave signal (sinθref) is supplied to the multiplier 202A of the deviation calculation unit 201. The cosine wave signal (cosθref) is supplied to the multiplier 202B of the deviation calculation unit 201.

The conversion processing unit 208 converts the above-mentioned excitation phase θex into a chord wave signal (cos θex) and a sine wave signal (sin θex). The sine wave signal (sinθex) is supplied to the input of the output buffer circuit 101A. The cosine wave signal (cosθex) is supplied to the input of the output buffer circuit 101B.

As described above, the resolver signal processing unit 200 and the resolver 2 form a tracking loop. By the action of the tracking loop, the resolver signal processing unit 200 calculates the excitation phase θex from the A-phase and B-phase signals supplied from the resolver 2.

The tracking loop operates so that the reference phase θref and the phase θ0 (= θrm + θex) included in the resolver output are equal to each other. The difference (θref−θ0) between the reference phase θref and the phase θ0 included in the resolver output becomes a value close to 0 by the PI control arranged inside the tracking loop. Therefore, Kr × sin (θref−θ0) can be approximated to (θref−θ0). (Θref−θ0) is represented by Δθ.

As described above, the limiter 205 limits the excitation angle frequency compensation value ωex_comp to a desired range, so that the tracking loop operates according to the limited conditions of the limiter 205. As a result, it is possible to suppress a steep change in the excitation phase θex.

In the above case, by defining the limit value of the limiter 205 according to the type of the resolver 2, the resolver signal processing device 100 can be applied to the resolvers 2 having different bands of the excitation angular frequencies ωex. In the resolver signal processing unit 200, the limiter 205 may select and set a limit value corresponding to the type of the resolver 2 based on the identification information that identifies the type of the resolver 2.

By the way, the amplitude of the two-phase output signal of the resolver 2 is affected by the transformation ratio of the resolver 2, the attenuation by the cable, and the attenuation by each component. The effect of attenuation by each component includes the transformation ratio of each of the transformers 103A, 103B, 106A, and 106B. Therefore, depending on the site where the resolver 2 is actually provided, the amount of attenuation of the two-phase output signal of the resolver 2 may be larger than the desired value.

The attenuation factors of the two-phase output signals of the resolver 2 due to these factors are collectively represented by the amplitude attenuation factor K. It is shown in the block diagram of the resolver phase detection system considering this amplitude attenuation factor K. FIG. 3 is a block diagram of a resolver phase detection system in consideration of the amplitude attenuation factor K of the embodiment.

First, the input signal of the PI controller 204 can be converted by the addition theorem of trigonometric functions as shown in the following equation (3).

sin (θref−θ0) = sinθref ・ cosθ0 − cosθref ・ sinθ0… (3)

sinθ0 and cosθ0 are two-phase output signals of the resolver 2. Multiplying the above sin θ0 and cos θ0 by the amplitude damping factor K, the left side sin (θref−θ0) of the above equation (3) becomes K · sin (θref−θ0).

Here, when Δθ takes a value sufficiently smaller than 1, (Δθ << 1), sinΔθ can be approximated to Δθ, so that the left side of the following equation (4) can be converted as the right side.

K · sinΔθ ≒ KΔθ ≒ Δθ… (4)

The approximation of the above equation (4) is based on the assumption that the amplitude damping factor K is close to 1. In this case, the influence of the amplitude damping factor K can be ignored.

However, in reality, when the value of the amplitude damping factor K becomes small, a desired response may not be obtained as the response of the resolver 2. For example, when the value of the amplitude attenuation factor K becomes small, the transformation ratio of the transformers 106A and 106B and the transformation ratio of the resolver 2 may be small, or the cable length may be relatively long. When there is an event that affects the value of the amplitude attenuation factor K, the effect of assuming that the amplitude attenuation factor K is close to 1 becomes apparent.

As shown in the attached result, when the amount of change in velocity (velocity step amount) is large, it may deviate from the theoretical response.

It is considered that this is because the amplitude attenuation factor K affects the open loop gain including the PI gain as an element. When the speed step amount is large as compared with the case where the speed step amount is small, Δθ becomes large, so that the approximation error of SIN Δθ≈Δθ may be large.

A method for eliminating the influence of the above factors will be described.
Since the transformation ratios of the resolver 2 and the transformers 103A, 103B, 106A, and 106B are known, the attenuation factors related to the transformation ratios of the resolver 2 and the transformers 103A, 103B, 106A, and 106B are also known. Here, the damping factor K is defined as a group of each circuit member such as the resolver 2 and the transformers 103A, 103B, 106A, and 106B. The value of the damping factor K is 0 or more and less than 1. When the damping factor K is set to 1, the effect of the damping factor K is the same as in the comparative example in which the influence is minor. Here, as described above, a case where the value of the attenuation factor K is not 1 is illustrated.

The gain adjustment of the phase detection system will be described with reference to the block diagram shown in FIG.
The block diagram shown in FIG. 3 includes arithmetic blocks OB2, OB201, OBATT, OB213, OB204, and OB209. Each of the calculation blocks OB201, OB213, OB204, and OB209 is a calculation block corresponding to the deviation calculation unit 201, the compensation calculation unit 213, the PI controller 204, and the subtractor 209, respectively.

The arithmetic block OB2 is an arithmetic block in which the resolver 2 and the resolver peripheral circuits are collectively equivalent as an adder. Since the resolver 2 and the resolver peripheral circuit are collectively added, the transformation ratio of the resolver 2 and the resolver peripheral circuit cannot be expressed as the calculation block OB2. Therefore, the transformation ratios of the resolver 2 and the resolver peripheral circuit are collectively assigned to one arithmetic block, which is called an arithmetic block OBATT. The gain of the calculation block OBATT is a sum of the attenuation factors based on the transformation ratios of the resolver 2 and the transformers 103A, 103B, 106A, and 106B, and the value is K.

The calculation block OB 213 is a calculation block corresponding to the compensation calculation unit 213. The gain of the arithmetic block OB213 may be specified so as to cancel the gain of the arithmetic block OBATT. As described above, since the gain of the calculation block OBATT is set to the attenuation factor K, the gain of the calculation block OB213 is set to “1 / K” by taking, for example, the reciprocal of the damping factor K.

By providing the calculation block OB213 for the gain adjustment related to the attenuation factor K, it can be applied to the case where the attenuation factor K related to the resolver 2 and the resolver peripheral circuit cannot be regarded as 1. As a result, even if the damping factor K is set to a value other than 1, the influence of the damping factor K can be reduced.

The detection speed of the embodiment will be described with reference to FIGS. 4 and 5.

FIG. 4 is a diagram for explaining the detection speed under the first condition of the embodiment.
The first condition shown in FIG. 4 shows the response of the detection speed ωrm_hat of the resolver 2 when the speed ωrm of the motor 3 is changed in steps from 0 rpm to 200 rpm. 200 rpm is 209 rad / s. The waveform on the upper side of FIG. 4 is a response waveform when the bandwidth of PI is set to 5000 rad / s. The bandwidth of the PI is the bandwidth on the low frequency side of the cutoff frequency of the PI controller 204. The bandwidth of PI (5000 rad / s) is about 24 times as large as the amount of change in the speed ωrm of the motor 3 (209 rad / s).

S10 in the figure indicates the speed ωrm of the motor 3. S11 to S15 indicate the detection speed ωrm_hat of the resolver 2 when the value of the attenuation factor K is changed in five steps. The values of the damping factor K of S11 to S15 are 1, 0.75, 0.5, 0.25, and 0.1 in the order described.

As can be seen from this result, the smaller the value of the attenuation factor K, the larger the overshoot of the response waveform, and the longer it takes to converge.

The waveform on the lower side of FIG. 4 is a response waveform when the bandwidth of PI is set to 1200 rad / s. The bandwidth of the PI (1200 rad / s) is limited to about 5.7 times the amount of change in the speed ωrm of the motor 3 (209 rad / s).

S20 in the figure indicates the speed ωrm of the motor 3. S21 to S25 indicate the detection speed ωrm_hat of the resolver 2 when the value of the attenuation factor K is changed in five steps. The values of the damping factor K of S21 to S25 are 1, 0.75, 0.5, 0.25, and 0.1 in the order described.

As can be seen from this result, the smaller the value of the attenuation factor K, the larger the overshoot of the response waveform and the longer the time until convergence, which is the same as the tendency on the upper stage side shown above. However, when the result on the upper end side and the result on the lower stage side are compared with each other with the same damping factor, the result on the lower stage side takes longer to converge than the result on the upper end side.
From this result, it can be read that when the amount of change in the speed ωrm of the motor 3 is relatively large with respect to the bandwidth of the PI, it becomes difficult to converge.

FIG. 5 is a diagram for explaining the detection speed in the second condition of the embodiment.
The second condition shown in FIG. 5 shows the response of the detection speed ωrm_hat of the resolver 2 when the speed ωrm of the motor 3 is changed in steps from 0 rpm to 1000 rpm. 1000 rpm is 1047 rad / s. The waveform on the upper side of FIG. 5 is a response waveform when the bandwidth of PI is set to 5000 rad / s. The bandwidth of the PI (5000 rad / s) is limited to about 4.7 times the amount of change in the speed ωrm of the motor 3 (1047 rad / s).

S30 in the figure indicates the speed ωrm of the motor 3. S31 to S35 indicate the detection speed ωrm_hat of the resolver 2 when the value of the attenuation factor K is changed in five steps. The values of the damping factor K of S31 to S35 are 1, 0.75, 0.5, 0.25, and 0.1 in the order described.

As can be seen from this result, the smaller the value of the attenuation factor K, the larger the overshoot of the response waveform, and the longer it takes to converge. However, from the waveforms of S34 and S35 corresponding to the values of the damping factor K of 0.25 and 0.1, the step response cannot be followed and the state is unstable.

The waveform on the lower side of FIG. 5 is a response waveform when the bandwidth of PI is set to 1200 rad / s. The bandwidth of the PI (1200 rad / s) is limited to about 1.1 times the amount of change in the speed ωrm of the motor 3 (1047 rad / s).

S40 in FIG. 5 indicates the speed ωrm of the motor 3. S41 to S45 indicate the detection speed ωrm_hat of the resolver 2 when the value of the attenuation factor K is changed in five steps. The values of the damping factor K of S41 to S45 are 1, 0.75, 0.5, 0.25, and 0.1 in the order described.

As can be seen from this result, the smaller the value of the attenuation factor K, the larger the overshoot of the response waveform and the longer the time until convergence, which is the same as the tendency on the upper stage side shown above. From the waveforms of S44 and S45 corresponding to the values of the attenuation factor K of 0.25 and 0.1, the step response cannot be followed and the state is unstable. This tendency is the same as the tendency on the upper side shown above.

Here, when the result on the upper end side and the result on the lower stage side are compared with each other with the same damping factor, there is no big difference in the size of the overshoot and the time until convergence. The tendency to become unstable is similar.
From this result, since the amount of change in the speed ωrm of the motor 3 increased with respect to the bandwidth of the PI, the deviation signal output by the deviation calculation unit 201 increased accordingly, and the PI amplified this with a predetermined gain. As a result, it is assumed that the limiter limit value has been reached and the limiter has been reached. As a result, it is presumed that the resolver 2 could not be excited with a sufficient control amount and the system became unstable.

In the actual configuration, the values of the damping factor K will not be 0.25 and 0.1 unless the configuration is such that the value of the damping factor is less than 0.5 as described above. Therefore, when the values of the damping factor K are set to 0.25 and 0.1, they are provided for the analysis of the event and are not adopted in the actual configuration. Therefore, the above-mentioned bird's-eye view is obtained. No event occurs.

As shown above, since the response is more stable when the value of the damping factor K is 1, when the damping factor is smaller than 1, the system depends on the magnitude of the damping factor K. It is good to compensate for the loop gain of. By setting the reciprocal of the damping factor K in the calculation block OB213 shown in the block diagram, the damping factor K generated in the actual configuration can be offset and the apparent damping factor K can be set to 1.

According to the above embodiment, the conversion processing unit 208 of the resolver signal processing device 100 generates the excitation signal of the resolver 2. The deviation calculation unit 201 detects a two-phase signal output by the resolver 2 excited by the excitation signal. The compensation calculation unit 213 adjusts the magnitude of the deviation based on the magnitude of the detected two-phase signal with respect to the magnitude of the reference two-phase signal, and outputs an adjustment result which is the result of the adjustment. The conversion processing unit 208 (excitation signal generation unit) generates an excitation signal of the resolver 2 using the adjustment result. As a result, the phase information of the resolver can be extracted by a simple method without being affected by the amplitude of the output signal of the resolver 2 being attenuated from a desired value.

The above criteria may be defined based on, for example, the expected value of the amplitude of the two-phase signal output by the resolver 2. The degree of attenuation may be defined based on the degree to which the detected two-phase signal output by the resolver 2 is attenuated with respect to the above reference. The predetermined coefficient may be defined based on the above degree of attenuation and the above criteria.

In this case, for example, the predetermined coefficient may be defined based on the amplitude of the excitation signal and the amplitude of the two-phase output signal output by the resolver 2. At that time, the predetermined coefficient may be defined based on the ratio of the amplitude of the two-phase signal output by the resolver 2 to the amplitude of the exciting signal. Such a predetermined coefficient may be defined based on the conversion rate of the resolver 2 and the conversion rate of each trunk connected to the resolver 2.

Further, from another viewpoint, the compensation calculation unit 213 multiplies the feedback signal based on the two-phase signal output by the resolver 2 by a predetermined coefficient defined based on the degree of attenuation, thereby making the above adjustment. Results may be obtained. The compensation calculation unit 213 may compensate for the attenuation of the two-phase signal output by the resolver 2 by using the above adjustment result. The predetermined coefficient may be the reciprocal of the attenuation factor of the two-phase signal. If the above-mentioned predetermined coefficient is defined based on the damping factor K, the influence of the damping factor K can be efficiently reduced. The above feedback signal is used to generate an excitation signal that excites the resolver 2. For example, the feedback signal based on the two-phase signal output by the resolver 2 can be any of the two-phase signal output by the resolver 2, the signal after being transformed by the transformers 106A and 106B, and the linearly amplified signal. It may be, or it may be a deviation signal output by the deviation calculation unit 201.

The magnitude of the reference signal used by the compensation calculation unit 213 may be the expected value of the amplitude of the two-phase signal output by the resolver 2. In this case, the predetermined coefficient defined based on the degree of attenuation is based on the attenuation factor of the measured value of the amplitude of the signal actually output by the resolver 2 with respect to the expected value of the amplitude of the two-phase signal output by the resolver 2. May be specified.

The two-phase signals output by the resolver 2 are a phase A signal modulated by the excitation signal and a phase B signal orthogonal to the A phase.

(Second Embodiment)
The second embodiment relates to the determination of the damping factor K.
In the first embodiment, a method of predetermining the damping factor based on the transformation ratios of the resolver 2 and the transformers 103A, 103B, 106A, and 106B has been described. In the present embodiment, a method in which the design support device 300 determines the damping factor K based on the measurement result will be described with reference to FIGS. 6 to 8.

FIG. 6 is a configuration diagram of the design support device 300 of the embodiment.
The design support device 300 includes, for example, a control unit 310, a storage unit 320, and an input / output unit 330. The design support device 300 is an example of a computer.

The control unit 310 includes a processor that executes a software program and the like.

The storage unit 320 is realized by a ROM (Read Only Memory), a RAM (Random Access Memory), an HDD (Hard Disk Drive), a flash memory, or the like. The software program executed by the processor may be stored in the storage unit 320 in advance, or may be downloaded from an external device (not shown), a portable storage medium, or the like, or via a communication line.

The storage unit 320 stores various setting information for operating the design support device 300 and a basic program such as an OS. Further, in addition to the above, the storage unit 320 stores various information and an application program for realizing the function as the design support device 300 of the embodiment.

The input / output unit 330 includes a display unit such as a liquid crystal display for displaying various information and an operation detection unit. The input / output unit 330 may be configured as a touch panel in which a display unit and an operation detection unit are combined.

FIG. 7 is a configuration diagram of the control unit 310 of the embodiment.
The control unit 310 includes, for example, calculation blocks 311 to 316. The arithmetic blocks 311 to 316 are functional units that execute each process by executing a software program by a processor or the like. Details of each process will be described later.

FIG. 8 is a flowchart of a process in which the design support device 300 of the embodiment determines the damping factor K.

First, the calculation block 311 (output signal state detection unit) acquires the result of detecting the two-phase signal output by the resolver 2 excited by the excitation signal (step S1), and the two-phase output of the resolver 2. The sum of squares of the measured values of the signal is calculated (step S2). The calculation block 311 (output signal state detection unit) may detect and acquire a two-phase signal output by the resolver 2 excited by the excitation signal, and other devices including the resolver signal processing device 100 may detect and acquire the two-phase signal. Data of the detection result may be acquired.

Next, the calculation block 312 acquires the theoretical value of the two-phase signal output by the resolver 2 based on the user's operation, and calculates the sum of squares of the theoretical values of the two-phase signal output by the resolver 2. Step S3). The calculation block 312 may acquire the theoretical value of the two-phase signal output by the resolver 2 from an external device or the like based on the user's operation detected by the input / output unit 330.

Next, the calculation block 313 calculates the difference between the sum of squares of the measured values of the two-phase signals output by the resolver 2 and the sum of squares of the theoretical values of the signals of the same two phases (step S4).

Next, the calculation block 314 determines whether or not to perform the correction using the damping factor K based on the above difference (step S5). When the above difference is equal to or less than a predetermined value, the calculation block 314 determines that the correction using the damping factor K is not performed (step S6), and outputs this. When the above difference exceeds a predetermined value, the calculation block 314 determines to perform the correction using the damping factor K (step S7), and outputs this.

Next, the calculation block 315 determines the reciprocal of the attenuation factor K based on the ratio of the sum of squares of the measured values of the two-phase signal output by the resolver 2 and the sum of squares of the theoretical values of the two-phase signal. Output (step S8).

For example, the design support device 300 displays the necessity of performing correction using the damping factor K and the damping factor K on a display unit (not shown). The user reads the necessity of performing correction using the damping factor K displayed on the display unit and the damping factor K, and when performing the correction, the gain of the compensation calculation unit 213 of the resolver signal processing device 100. , The reciprocal of the damping factor K is set (step S9). As a result, the above series of processes is completed.

As a result, the resolver signal processing device 100 is not affected by the above-mentioned attenuation factor K by setting the gain of the compensation calculation unit 213 based on the reciprocal of the attenuation factor K calculated by the design support device 300. , The speed ωrm and the phase θrm of the motor 3 can be stably detected.

(Third Embodiment)
In the second embodiment, the design support device 300 has been described, but this is an example of separating the design support device 300 from the resolver signal processing device 100. In this embodiment, instead, the resolver signal processing device 100A having the same function as the design support device 300 will be described.

FIG. 9 is a configuration diagram of the resolver signal processing device 100A of the embodiment.
The resolver signal processing device 100A includes, for example, a gain adjusting unit 400 in addition to each unit of the resolver signal processing device 100.

FIG. 10 is a configuration diagram of the gain adjusting unit 400 of the embodiment.
The gain adjustment unit 400 includes, for example, calculation blocks 311 to 315 similar to the design support device 300, and a gain setting processing unit 407.

From step S1 to step S5 of FIG. 8 described above, the same processing as described above is performed. After that, when the correction using the above-mentioned attenuation factor K is performed in step S7, after the calculation block 315 determines the reciprocal of the attenuation factor K (step S8), the gain setting processing unit 407 determines the determined attenuation. The reciprocal of the rate K is set as the gain of the compensation calculation unit 213 (step S9). If the correction using the damping factor K is not performed in step S6, the gain setting processing unit 407 sets the gain of the compensation calculation unit 213 to 1.

According to the above modification, in addition to achieving the same effect as that of the embodiment, the gain of the compensation calculation unit 213 can be set to an appropriate value without the intervention of the user.
The gain adjusting unit 400 may be included as a part of the resolver signal processing unit 200.

At least according to the above embodiment, the resolver signal processing device 100 includes a deviation calculation unit 201 (output signal state detection unit), a compensation calculation unit 213, and a conversion processing unit 208 (excitation signal generation unit). The deviation calculation unit 201 detects the deviation Δθ between the phase θ0 based on the two-phase signal output by the resolver 2 excited by the excitation signal and the reference phase θref. The compensation calculation unit 213 adjusts the magnitude of the deviation Δθ based on the magnitude of the detected two-phase signal with respect to the magnitude of the reference two-phase signal, and outputs the adjustment result which is the result of the adjustment. To do. The conversion processing unit 208 uses the adjustment result to generate an excitation signal for the resolver 2. As a result, the resolver signal processing device 100 can extract the phase information of the resolver by a simple method without being affected by the amplitude of the output signal of the resolver 2 being attenuated from a desired value.

At least a part of the resolver signal processing devices 100 and 100A and the design support device 300 may be realized by a software function unit that functions by executing a program by a processor such as a CPU, and all of them may be realized by an LSI or the like. It may be realized by the hardware function part of.

Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the gist of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention as well as the invention described in the claims and the equivalent scope thereof.

For example, the resolver 2 of the embodiment is not limited to the two-phase excitation two-phase output type, and may be a one-phase excitation two-phase output type.

1 drive device, 2 resolver, 3 motor, 4 integrator, 100, 100A resolver signal processor, 101A, 101B output buffer circuit, 102A, 102B DA converter, 103A, 103B transformer, 104A, 104B input buffer circuit, 105A, 105B AD converter, 106A, 106B transformer (transformer), 200 resolver signal processing unit, 201 deviation calculation unit, 202A, 202B multiplier, 203 subtractor, 204 PI controller (PI calculation unit), 205 limiter, 206 integrator (Integration calculation unit), 207 conversion processing unit, 208 conversion processing unit, 209 subtractor, 210 reference signal generation processing unit, 211 adder, 213 compensation calculation unit, 215 excitation phase estimation value generation unit, 300 design support device, 310 Control unit, 311-316 calculation block, 320 storage unit, 330 input / output unit, 400 gain adjustment unit, 407 gain setting processing unit

Claims (12)

An output signal state detection unit that detects the deviation between the phase based on the two-phase signal output by the resolver excited by the excitation signal and the reference phase, and
A compensation calculation unit that adjusts the magnitude of the deviation based on the magnitude of the detected two-phase signal with respect to the magnitude of the reference two-phase signal and outputs the adjustment result that is the result of the adjustment.
An excitation signal generation unit that generates an excitation signal of the resolver using the adjustment result,
Resolver signal processing device. The compensation calculation unit is
The resolver signal processing apparatus according to claim 1, wherein the adjustment result is obtained by multiplying the deviation by a predetermined coefficient defined based on at least the degree of attenuation of the two-phase signal. The reference is defined based on the expected amplitude of the two-phase signal.
The degree of attenuation is defined based on the degree to which the detected two-phase signal is attenuated relative to the reference.
The predetermined coefficient is
The resolver signal processing apparatus according to claim 2, which is defined based on the degree of attenuation and the reference. The resolver signal processing apparatus according to claim 3, wherein the predetermined coefficient is defined based on the amplitude of the excitation signal and the amplitude of the two-phase signal. The resolver signal processing apparatus according to claim 3, wherein the predetermined coefficient is defined based on the ratio of the amplitude of the two-phase signal to the amplitude of the exciting signal. The resolver signal processing apparatus according to claim 3, wherein the predetermined coefficient is defined based on the conversion rate of the resolver and the conversion rate of the transformer connected to the resolver. The two-phase signals output by the resolver are an A-phase signal modulated by the excitation signal and a B-phase signal orthogonal to the A-phase.
The output signal state detection unit is
The sum of squares of the two-phase output signals is calculated, and the calculated sum of squares is output.
The degree of attenuation of the two-phase signal
According to any one of claims 1 to 6, which is defined as an attenuation rate indicating the degree of attenuation based on the difference between the calculated sum of squares and the expected value of the sum of squares of the two-phase output signals. The resolver signal processor according to the description. With the motor
A resolver that detects the rotation of the motor and
The resolver signal processing apparatus according to any one of claims 1 to 7, wherein a resolver signal processing apparatus that generates an estimated value of the phase of the motor based on the rotation of the motor detected by the resolver. When,
A drive device including an inverter that drives the motor based on an estimated phase of the motor generated by the resolver signal processing device. The deviation between the phase based on the two-phase signal output by the resolver excited by the excitation signal and the reference phase is detected.
The magnitude of the deviation is adjusted based on the magnitude of the detected two-phase signal with respect to the magnitude of the reference two-phase signal, and the adjustment result which is the result of the adjustment is output.
A step of generating an excitation signal of the resolver using the adjustment result, and
Resolver signal processing method including. It is a computer-based design support method for design support devices.
The step of acquiring the deviation between the phase based on the two-phase signal output by the resolver excited by the excitation signal and the reference phase, and
A step of adjusting the magnitude of the deviation based on the magnitude of the output two-phase signal with respect to the magnitude of the reference two-phase signal, and outputting an adjustment result which is the result of the adjustment.
Design support methods including. A step of detecting the deviation between the phase based on the two-phase signal output by the resolver excited by the excitation signal and the reference phase, and
A step of adjusting the magnitude of the deviation based on the magnitude of the detected two-phase signal with respect to the magnitude of the reference two-phase signal and outputting the adjustment result which is the result of the adjustment.
A step of generating an excitation signal of the resolver using the adjustment result, and
A program that you want your computer to run, including. For the computer of the design support device,
The step of acquiring the deviation between the phase based on the two-phase signal output by the resolver excited by the excitation signal and the reference phase, and
A step of adjusting the magnitude of the deviation based on the magnitude of the output two-phase signal with respect to the magnitude of the reference two-phase signal and outputting the adjustment result which is the result of the adjustment.
A program to execute.

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