JP2009025068A - Resolver/digital conversion method, and resolver/digital conversion circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a resolver/digital conversion circuit which enables system configuration by a single circuit, relative to a resolver having a different transformation ratio. <P>SOLUTION: The resolver/digital conversion circuit includes a CPU 105 for calculating the arc tangents of KAsinθ and KAcosθ from which an excitation component has been removed with a demodulator 103 and a digital filter 104, and a nonvolatile memory 107 for storing correction values of transformation ratios. The CPU 105 finds K^2×A^2(sin^2θ+cos^2θ) by squaring KAsinθ and KAcosθ, respectively, and adding them, moreover takes its square root to calculate KA, divides a transformation ratio K obtained by dividing KA by a carrier wave amplitude A, by a reference transformation ratio Ko set in the nonvolatile memory 107, to find the ratio γo between the transformation ratios, and outputs to an excitation circuit 105 a carrier wave amplitude Ac automatically corrected by dividing a carrier wave amplitude As from an A/D converter 108 by the ratio γo between the transformation ratios. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a resolver / digital conversion method suitable for a plurality of resolvers having different transformation ratios.

  Conventionally, when a resolver is used as a position detector, a resolver / digital conversion circuit based on a tracking method is generally used.

  As shown in FIG. 5, the conventional circuit configuration outputs a sinusoidal excitation signal Asinωt having a constant frequency and a constant amplitude A from the excitation circuit 512 to the resolver 501 and the demodulator 507, and from the resolver 501, the transformation ratio and resolver of the resolver. KA sin θ · sin ωt and KA cos θ · sin ωt corresponding to the rotor angle θ are output and amplified by the amplifiers 502 and 503. Here, K is a transformation ratio of the resolver.

  The sin φ generated by the inside of the converter is multiplied by KA sin θ · sin ωt by the multiplier 504, the cos φ is multiplied by KA cos θ · sin ωt by the multiplier 505, and subtraction is performed by the subtractor 506, whereby KA sin (θ−φ) · sin ωt is obtained. The sin ωt, which is an excitation component, is removed by the demodulator 507, and the harmonic component is removed by passing through the low-pass filter 508 to generate θ−φ.

  The θ-φ is input to the voltage controlled oscillator 509, and the voltage controlled oscillator 509 generates a pulse corresponding to the input voltage, and the pulse is input to the UP / DOWN counter 510. A kind of PLL servo loop is constructed in which sin φ and cos φ are generated by referring to the SIN and COS table 211 whose address is the counter value of the counter 210, and the sin φ and cos φ are hooded back to the multipliers 504 and 505. In addition, since θ−φ operates toward 0, the angle data φ can be obtained when θ−φ = 0.

  In this method, if multiple resolvers with different transformation ratios are supported by the same resolver / digital conversion circuit, the gain of the resolver excitation circuit needs to be adjusted according to the resolver, so if the number of resolver models increases, The adjustment on the circuit side or the number of circuit board models increases, and the increase in the number of management man-hours due to the increase in the model becomes a problem.

  On the other hand, for a fail-safe function such as detection of a disconnection of a resolver, a general method is to obtain KA from KA (sin θ · sin φ + cos θ · cos φ) · sin ωt and output an error flag when KA exceeds a certain threshold value. It has been. However, when the transform ratio of the resolver varies and the margin with respect to the KA threshold varies, a phenomenon occurs in which the error sensitivity varies depending on the model of the resolver.

In order to provide a resolver / digital conversion circuit capable of configuring a system with a single circuit for resolvers having different transformation ratios, sinφ is set to sinθ and cosθ is set by a third multiplier and a fourth multiplier. KA (sinθ · sinφ + cosθ · cosφ) · sinωt is calculated by multiplying cosφ and adding each by an adder, KA multiplied by amplitude and transformation ratio via a demodulator, and transformation ratio K by a divider. (See, for example, Patent Document 1).
JP 2006-308354 A

  The problem to be solved is that the technique of Patent Document 1 employs a tracking method, so that the circuit is configured by hardware, which is disadvantageous in versatility and expandability.

  SUMMARY OF THE INVENTION An object of the present invention is to solve the above-described conventional problems, and to provide a resolver / digital conversion circuit that can be realized by a single-circuit system configuration and a general-purpose device for resolvers having different transformation ratios. And

  In order to solve the above-described problems, the resolver / digital conversion method of the present invention is a one-phase input / two-phase output type excitation circuit that excites a resolver having a transformation ratio K with a carrier wave Asinωt having an amplitude A, and a resolver at a rotation angle θ. An AD converter that AD converts the output signals KAsinθ · sinωt, KAcosθ · sinωt, and carrier wave Asinωt, a demodulator that performs phase adjustment on the excitation component of the AD-converted resolver output signal, and an unnecessary component from the demodulated resolver output signal A digital filter that eliminates the excitation component, an arithmetic means for calculating an arctangent of KAsinθ and KAcosθ from which the excitation component has been removed by the digital filter, a reference transformation ratio Ko, a resolver output amplitude lower limit value KAL, and a resolver output amplitude upper limit value KAH And a non-volatile memory storing the calculation means, wherein the computing means includes a resolver si , Cosine data reading step 1, and the data read in step 1 is read and step 2 for calculating the carrier wave amplitude A, and the carrier wave amplitude A of the excitation circuit is automatically determined based on the calculation processing result of step 2. to correct.

  In step 2, the data read in step 1 is acquired, and KAsinθ and KAcosθ are squared and added to obtain K ^ 2 · A ^ 2 (sin ^ 2θ + cos ^ 2θ). Step 22, Step 23 for calculating KA by calculating the square root of Step 22, Step 24 for obtaining transformation ratio K by dividing K · A determined by Step 23 by amplitude A, and Step 24 Dividing the transformation ratio K by a preset reference transformation ratio Ko to obtain a transformation ratio ratio γo and dividing the carrier amplitude A taken in step 21 by the ratio γo to obtain the carrier amplitude A The resolver / digital conversion method according to claim 1, further comprising a step of automatically correcting.

  Further, after the step 2, there is provided a step 3 for detecting a resolver abnormality. In the step 3, the calculated resolver output signal amplitude information KA is outside the range of the amplitude upper limit value KAH from the amplitude lower limit value KAL stored in the nonvolatile memory. The resolver / digital conversion method according to claim 1 or 2, wherein a resolver disconnection abnormality (error) is output when the error occurs.

  The resolver / digital conversion circuit according to claim 4 is a one-phase input two-phase output type excitation circuit that excites a resolver with a transformation ratio K by a carrier wave Asin ωt having an amplitude A, and a resolver output signal KAsinθ at a rotation angle θ. An AD converter that AD converts sinωt, KAcosθ · sinωt, and carrier wave Asinωt, a demodulator that adjusts the phase of the excitation component of the AD-converted resolver output signal, and a demodulator, and removes unnecessary components from the demodulated resolver output signal A digital filter; arithmetic means for calculating an arc tangent of KA sin θ and KA cos θ from which an excitation component has been removed by the demodulator and the digital filter; and a non-volatile memory for storing a correction value of the transformation ratio, wherein the arithmetic means includes KA sin θ , KAcosθ is squared and added to obtain K ^ 2 · A ^ 2 (sin ^ 2θ + co s ^ 2θ), KA is calculated by further finding the square root, and the transformation ratio K obtained by dividing by the amplitude A is divided by the preset reference transformation ratio Ko to obtain the ratio of the transformation ratio. The carrier amplitude A is automatically corrected by obtaining γo and dividing the carrier amplitude A by the ratio γo.

  5. The resolver disconnection error (error) is output when the calculated resolver output signal amplitude information KA is outside the range of the amplitude upper limit value KAH from the amplitude lower limit value KAL stored in the nonvolatile memory. This is a resolver / digital conversion circuit.

  According to the resolver / digital conversion method of the first and second aspects of the present invention, a plurality of resolvers having different transformation ratios can be automatically corrected by a single software, and the resolver output can be made constant. .

  According to the resolver / digital conversion method of the third aspect, it is possible to detect a resolver disconnection abnormality during normal use.

  According to the resolver / digital conversion circuit of the fourth aspect, a single circuit is excellent in versatility and expandability, and can automatically correct the transformation ratio of a plurality of resolvers having different transformation ratios.

  Furthermore, according to the resolver / digital conversion circuit of the fifth aspect, it is possible to detect a resolver disconnection abnormality.

An excitation circuit that excites a resolver with a transformation ratio K with a carrier wave Asin ωt of amplitude A in a one-phase input and two-phase output type, and AD conversion that performs AD conversion of resolver output signals KAsin θ · sin ωt, KA cos θ · sin ωt, and carrier wave Asin ωt at a rotation angle θ. A demodulator that adjusts and demodulates the excitation component of the A / D converted resolver output signal, a digital filter that removes unnecessary components from the demodulated resolver output signal, and the demodulator and digital filter remove the excitation component And calculating means for calculating the arc tangent of KAsin θ and KA cos θ, and a non-volatile memory storing a reference transformation ratio Ko, a resolver output amplitude lower limit value KAL, and a resolver output amplitude upper limit value KAH, and the calculating means includes a resolver sin , Step 1 for reading the cos data and the data read in step 1 Uptake, and a step 2 of calculating the carrier amplitude A, and automatically corrects the carrier wave amplitude A of the exciting circuit on the basis of the calculation result of Step 2. Hereinafter, embodiments will be described with reference to the drawings.
(Embodiment 1)
FIG. 1 is a block configuration diagram of a resolver / digital conversion circuit according to the first embodiment. This resolver / digital conversion circuit obtains the transformation ratio of the resolver using the CPU 105 which is a calculation means, and automatically corrects the gain of the excitation circuit by software.

  In FIG. 1, when an excitation signal Asinωt having a constant frequency and a constant amplitude is input from the excitation circuit 106 to a resolver 101 having a single-phase excitation and two-phase output, Ks · As · sinθ · sinωt and Ks · As · cos θ · sin ωt is obtained.

  As these two output signals, two data Ks · As · sinθ and Ks · As · cosθ obtained through the AD converter 102, the demodulator 103, and the digital filter 104 are input to the CPU 105.

  The CPU 105 finds Ks ^ 2 · As ^ 2 (sin ^ 2θ + cos ^ 2θ) by squaring and adding the two input Ks · As · sinθ and Ks · As · cosθ data respectively. By calculating the square root, Ks · As is calculated, and further divided by the carrier wave amplitude As acquired from the AD converter 108, thereby obtaining the transformation ratio Ks.

Next, the CPU 105 obtains the ratio γo of the transformation ratio by dividing the above transformation ratio Ks by the reference transformation ratio Ko preset in the nonvolatile memory 107. Further, the CPU 105 outputs the carrier wave amplitude Ac automatically corrected by dividing the carrier wave amplitude As acquired from the AD converter 108 by the transformation ratio γo to the excitation circuit 106. As a result, the resolver output can be kept constant.

  FIG. 2 shows an overall flow of resolver processing in the present invention. In step 1, resolver output signals sin, cos and carrier wave ref data are fetched into the CPU 105, and reference amplitude correction calculation is performed in step 2. In step 3, fail-safe processing is performed. In the last step 4, the motor rotation angle θ is calculated. This will be described below with reference to a flowchart.

  FIG. 3 shows the details of the flow in the above-described reference amplitude correction calculation (step 2), which is composed of six steps, each of which is sequentially set to 21 steps to 26 steps.

  First, the CPU 105 takes in resolver output signals Ks · As · sin θ, Ks · As · cos θ, and carrier wave signal As · sin ωt data (step 21).

  Next, Ks ^ 2 · As ^ 2 · (sin ^ 2θ + cos ^ 2θ) is calculated from the received resolver output signal data (step 22).

  Subsequently, a square root operation of Ks ^ 2 · As ^ 2 is performed to obtain Ks · As (step 23). Ks · As obtained in step 23 is calculated by detecting the peak of As · sinωt previously taken in, and divided by that As to obtain Ks (step 24).

  This Ks is divided by the reference transformation ratio Ko stored in the non-volatile memory 107 to obtain a transformation ratio ratio γo (step 25). Finally, the carrier wave amplitude Ac automatically corrected is obtained by dividing the carrier wave amplitude As by the ratio γo of the transformation ratio (step 26). By outputting the automatically corrected carrier wave amplitude Ac to the excitation circuit 106, the resolver output can be kept constant even when resolvers having different transformation ratios are connected.

  Next, the flow of the fail safe process and the θ calculation process in FIG. 2 will be described with reference to FIGS.

  FIG. 4A is a flowchart of the fail-safe process (step 3) in FIG. The four steps are respectively referred to as 31 step to step 34.

  First, Ks · Ac · sinθ and Ks · Ac · cosθ data, which are resolver output signals after the carrier amplitude Ac subjected to the reference amplitude correction calculation processing is inputted to the resolver 101, are converted into an AD converter 102, a demodulator 103, and a digital signal. The data is taken into the CPU 105 through the filter 104 (step 31). Next, the sum of squares Ks ^ 2 · Ac ^ 2 · (sin ^ 2θ + cos ^ 2θ) of the data fetched in step 31 is obtained (step 32).

  The square root of Ks ^ 2 · Ac ^ 2 obtained in step 32 is obtained (step 33). The calculation result Ks · Ac in step 33 is compared with the amplitude lower limit value KAL stored in advance in the nonvolatile memory 107 and the amplitude upper limit value KAH, and if the lower limit value or upper limit value is exceeded, an error is output and If so, the fail-safe process is terminated as normal (step 34).

Calculation of the motor rotation angle θ in FIG. 2 (step 4) will be described in two steps with reference to FIG. In step 41, Ks · Ac · sinθ, K which are resolver output signals after the carrier amplitude Ac subjected to the reference amplitude correction calculation processing is inputted to the resolver 101.
The s · Ac · cos θ data is taken into the CPU 105 via the AD converter 102, the demodulator 103, and the digital filter 104 (same as step 31 described above).

  In the next step 42, the motor rotation angle θ is calculated by calculating an arctangent of Ks · Ac · sin θ / Ks · Ac · cos θ.

  According to the present invention, a single software makes the output signal amplitude of the resolver 101 constant regardless of the type of resolver. For this reason, even if the disconnection detection threshold value of the resolver 101 is a fixed value, the relationship between the output signal amplitude of the resolver 101 and the disconnection detection threshold value is always constant. Can do.

  The resolver / digital conversion method of the present invention is useful for standardization of motor control devices having different resolver transformation ratios that require high reliability under adverse environments such as robots.

Block diagram of resolver / digital conversion circuit of the present invention Resolver data processing flowchart of the present invention Flowchart of reference amplitude correction calculation processing in the present invention (A) Flow chart of fail-safe processing in the present invention (b) Flow chart of θ calculation processing Block diagram of a conventional resolver / digital conversion circuit

Explanation of symbols

101 Resolver 102 A / D Converter 103 Demodulator 104 Digital Filter 105 Arithmetic Unit (CPU)
106 Excitation circuit 107 Non-volatile memory 108 A / D converter 501 Resolver 502 First amplifier 503 Second amplifier 504 First multiplier 505 Second multiplier 506 Subtractor 507 First demodulator 508 Low-pass filter 509 Voltage controlled oscillator 510 UP / DOWN counter 511 SIN, COS table 512 Excitation circuit 513 CPU

Claims (5)

A one-phase input two-phase output type excitation circuit that excites a resolver with a transformation ratio K with a carrier wave A sin ωt having an amplitude A, and AD conversion that converts the resolver output signals KA sin θ · sin ωt, KA cos θ · sin ωt, and the carrier wave Asin ωt at a rotation angle θ. A demodulator that adjusts and demodulates the excitation component of the A / D converted resolver output signal, a digital filter that removes unnecessary components from the demodulated resolver output signal, and the demodulator and digital filter remove the excitation component And calculating means for calculating the arc tangent of KA sin θ and KA cos θ, and a non-volatile memory storing a reference transformation ratio Ko, a resolver output amplitude lower limit value KAL, and a resolver output amplitude upper limit value KAH, and the calculating means includes a resolver sin , Step 1 for reading cos data and the data read in step 1 Uptake, and a step 2 of calculating the carrier amplitude A, a resolver / digital conversion method characterized by automatically correcting the carrier amplitude A of the exciting circuit on the basis of the calculation result of Step 2. The step 2 includes the step 21 for fetching the data read in the step 1, and the step 22 for obtaining K ^ 2 · A ^ 2 (sin ^ 2θ + cos ^ 2θ) by squaring and adding KAsinθ and KAcosθ, respectively. Step 23 for calculating KA by obtaining the square root of Step 22, Step 24 for obtaining transformation ratio K by dividing K · A obtained in Step 23 by amplitude A, and Transformation ratio obtained in Step 24 By dividing K by a preset reference transformation ratio Ko, step 25 for obtaining the transformation ratio ratio γo, and by dividing the carrier amplitude A captured in step 21 by the ratio γo, the carrier amplitude A is automatically set. The resolver / digital conversion method according to claim 1, further comprising a correcting step. Step 3 is provided after the step 2 to detect a resolver abnormality. In step 3, the calculated resolver output signal amplitude information KA is outside the range of the amplitude upper limit value KAH from the amplitude lower limit value KAL stored in the nonvolatile memory. 3. The resolver / digital conversion method according to claim 1, wherein a resolver disconnection abnormality (error) is output when the resolver is disconnected. A one-phase input two-phase output type excitation circuit that excites a resolver with a transformation ratio K with a carrier wave A sin ωt having an amplitude A, and AD conversion that converts the resolver output signals KA sin θ · sin ωt, KA cos θ · sin ωt, and the carrier wave Asin ωt at a rotation angle θ. A demodulator that adjusts and demodulates the excitation component of the A / D converted resolver output signal, a digital filter that removes unnecessary components from the demodulated resolver output signal, and the excitation component is removed by the demodulator and digital filter. Calculating means for calculating arc tangents of KAsin θ and KA cos θ, and a non-volatile memory for storing a correction value of the transformation ratio. The calculating means squares and adds KA sin θ and KA cos θ, respectively. KA is obtained by calculating A ^ 2 (sin ^ 2θ + cos ^ 2θ) and further obtaining the square root thereof. By calculating and dividing the transformation ratio K obtained by dividing by the amplitude A by the preset reference transformation ratio Ko, the ratio γo of the transformation ratio is obtained, and the carrier wave amplitude A is divided by the ratio γo. A resolver / digital conversion circuit characterized by automatically correcting a carrier wave amplitude A. 5. The resolver according to claim 4, wherein when the calculated resolver output signal amplitude information KA falls outside the range of the amplitude upper limit value KAH from the amplitude lower limit value KAL stored in the nonvolatile memory, the resolver disconnection abnormality (error) is output. / Digital conversion circuit.