JP2020115729A - Power conversion device and power conversion method - Google Patents

Abstract

To provide a power conversion device and a power conversion method which are effective for early detection of phase interruption.SOLUTION: A power conversion device 1 comprises: a power conversion circuit 10; and a control circuit 100 which controls the power conversion circuit 10. The power conversion circuit 10 converts power of a DC bus 12 into AC power in a plurality of phases to be supplied to a load. The control circuit 100 comprises: a test control part 115 which controls the power conversion circuit 10 so as to temporarily maintain a state of connecting at least one phase of the plurality of phases and the remaining phases with mutually different poles of the DC bus 12, respectively during a voltage rise period of the DC bus 12 in accordance with connection of the DC bus 12 with a DC power supply PS; and a phase interruption detection part 116 which detects phase interruption on the basis of output current to the load LD in the above state.SELECTED DRAWING: Figure 1

Description

The present disclosure relates to a power conversion device and a power conversion method.

Patent Document 1 discloses an energizing unit that energizes each coil of a motor based on a d-axis current value and a q-axis current value used when detecting an abnormality in a coil of a motor, and an electrical angle of the motor, and an energizing unit. Discloses a motor control device including a phase loss determination unit that determines whether or not any coil has an abnormality based on the current flowing through each coil when the motor is energized.

JP, 2014-121144, A

The present disclosure provides a power conversion device and a power conversion method effective for early detection of a phase loss.

A power conversion device according to an aspect of the present disclosure includes a power conversion circuit that converts the power of a DC bus into a plurality of phases of AC power and supplies the load to a load, and a DC bus that is connected to the DC bus to a DC power supply. A test control unit for controlling the power conversion circuit so as to temporarily maintain a state in which at least one phase of the plurality of phases and the remaining phase are respectively connected to different poles of the DC bus during the voltage rising period; And a phase loss detection unit that detects the phase loss based on the output current to the load.

A power conversion method according to another aspect of the present disclosure, the DC busbar of the DC busbar of the power conversion circuit that converts the power of the DC busbar to AC power of a plurality of phases and supplies it to the load is connected to the DC power supply. Controlling the power conversion circuit so as to temporarily maintain a state in which at least one of the plurality of phases and the remaining phase are respectively connected to different poles of the DC bus during the voltage rising period, and the load in the above state Detecting the open phase based on the output current to the.

According to the present disclosure, it is possible to provide a power conversion device and a power conversion method that are effective for early detection of a phase loss.

It is a schematic diagram which illustrates the schematic structure of a power converter device. It is a block diagram which illustrates the hardware constitutions of a control circuit. It is a flow chart which illustrates a power conversion procedure. It is a flow chart which illustrates an open phase inspection procedure.

Hereinafter, embodiments will be described in detail with reference to the drawings. In the description, the same elements or elements having the same function will be denoted by the same reference symbols, without redundant description.

[Power converter]
The power conversion device 1 illustrated in FIG. 1 is a device that performs power conversion between the DC power supply PS and the load LD. Power conversion means the conversion of power forms. The power form may include the number of lines, whether DC or AC, voltage (voltage amplitude), current (current amplitude), frequency, etc.

The load LD is, for example, a rotary electric motor (for example, a vehicle motor). Specific examples of vehicle motors include motors for electric vehicles or plug-in hybrid vehicles. When the load LD is a vehicle motor, the power conversion device 1 is mounted on the vehicle together with the load LD.

The DC power supply PS supplies DC power of a predetermined voltage to the power conversion device 1. The predetermined voltage is, for example, 100 to 700 volts, 200 to 600 volts, or 300 to 500 volts.

The power conversion device 1 includes a power conversion circuit 10 and a control circuit 100 that controls the power conversion circuit 10. The power conversion circuit 10 is a so-called inverter circuit, which converts the power of the DC bus into AC power of a plurality of phases (for example, three phases) and supplies the AC power to the load LD. For example, the power conversion circuit 10 includes a DC bus 12, a capacitor 16, an output line 13, a switching circuit 11, input terminals 14P and 14N, output terminals 15U, 15V and 15W, and current sensors 21U, 21V and 21W. , And a voltage sensor 22.

The DC bus 12 is a bus for guiding DC power from the DC power supply PS. For example, the DC bus 12 includes a positive electrode line 12P and a negative electrode line 12N. The capacitor 16 is connected between the lines 12P and 12N and smoothes the voltage of the DC bus 12 (the voltage between the lines 12P and 12N). The DC power supply PS may be a multi-level power supply capable of outputting DC power with a plurality of levels of voltage. In this case, the DC bus 12 may include three or more lines including a negative line and a plurality of positive lines respectively corresponding to a plurality of levels of voltage.

The output line 13 is a bus that guides the output AC power to the load LD. For example, the output line 13 includes lines 13U, 13V, and 13W that respectively lead the U-phase, V-phase, and W-phase of three-phase AC power.

The switching circuit 11 performs power conversion between the DC power of the DC bus 12 and the AC power of the output line 13. For example, the switching circuit 11 includes a plurality of switching elements, and changes the connection state between the DC bus 12 and the output line 13 by switching ON/OFF of each switching element. The switching element is, for example, a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) or an IGBT (Insulated Gate Bipolar Transistor), and is turned on/off in response to a pulse signal from the control circuit 100.

The input terminals 14P and 14N are provided on, for example, a terminal block or the like, and are electrically connected to the lines 12P and 12N of the DC bus 12, respectively. A cable of a DC power supply PS is connected to the input terminals 14P and 14N via a power switch SW. The power switch SW is, for example, a high-voltage relay, and switches between an ON state in which the DC power source PS and the DC bus 12 are connected and an OFF state in which the DC power source PS and the DC bus 12 are disconnected according to an electric signal.

An unillustrated inrush current prevention circuit (inrush current suppression circuit) may be provided between the input terminals 14P and 14N and the lines 12P and 12N of the DC bus 12. The sudden charge flow prevention circuit is provided to limit the peak value of the charging current flowing in the lines 12P and 12N when the DC power supply PS charges the capacitor 16 and protect the power switch SW and the like. The inrush current prevention circuit can be omitted if the peak value of the charging current is suppressed to an allowable level. For example, when the output impedance of the DC power supply PS is large, or when the DC power supply PS has a control circuit for the output current, the inrush current prevention circuit can be omitted.

The output terminals 15U, 15V, 15W are provided on, for example, a terminal block or the like, and are electrically connected to the lines 13U, 13V, 13W, respectively. A load LD cable is connected to the output terminals 15U, 15V, and 15W.

The current sensors 21U, 21V, 21W detect the currents in the lines 13U, 13V, 13W, respectively. The voltage sensor 22 detects the voltage of the DC bus 12. When the DC power supply PS is multilevel, the voltage sensor 22 detects the voltage between the negative line and any one of the plurality of positive lines as the voltage of the DC bus 12.

The control circuit 100 causes at least one phase of the output line 13 to remain during the voltage rise period of the DC bus 12 due to the power switch SW being turned on (that is, the DC bus 12 being connected to the DC power supply PS). The power conversion circuit 10 is controlled so as to temporarily maintain a state (hereinafter, referred to as a “test state”) in which the phase and the phase are connected to different poles of the DC bus 12 respectively. And detecting the open phase based on the output current. For example, the control circuit 100 has a functional configuration (hereinafter, referred to as “functional module”), a voltage information acquisition unit 111, a current information acquisition unit 112, a time measurement unit 113, a test control unit 115, and an open phase. And a detection unit 116.

The voltage information acquisition unit 111 acquires the detected value of the voltage of the DC bus 12 from the voltage sensor 22. The current information acquisition unit 112 acquires the detected value of the current of the output line 13 from the current sensors 21U, 21V, 21W. The time measuring unit 113 measures the elapsed time by counting clock pulses in a predetermined cycle or the like. The test control unit 115 controls the power conversion circuit 10 so as to temporarily maintain the above-described test state during a voltage increase period of the DC bus 12 which is caused by the DC bus 12 being connected to the DC power supply PS.

In the test state, at least one phase of the output line 13 (at least one line of the lines 13U, 13V, 13W) and the remaining phase (remaining line) are connected to different poles of the DC bus 12, respectively. Well, there are no other constraints. For example, the line 13U may be connected to the line 12P, the lines 13V and 13W may be connected to the line 12N, the line 13V may be connected to the line 12P, and the lines 13U and 13W may be connected to the line 12N. May be connected to the line 12P, and the lines 13U and 13V may be connected to the line 12N. Further, the line 13U may be connected to the line 12N, the lines 13V and 13W may be connected to the line 12P, the line 13V may be connected to the line 12N, and the lines 13U and 13W may be connected to the line 12P. May be connected to the line 12N, and the lines 13U and 13V may be connected to the line 12P.

The phase loss detection unit 116 detects the phase loss based on the output current to the load LD in the test state. The open phase means a state in which at least a part of the power feeding path between the power conversion circuit 10 and the load LD is interrupted. The power supply path here also includes a path in the power conversion circuit 10 and a path in the load LD. Specific examples of the cause of the phase loss include failure of a part of the switching circuit 11, disconnection of the cable, disconnection of the cable, disconnection of the winding inside the load LD, and the like.

For example, the open phase detector 116 detects the open phase based on whether or not there is a phase in which no current flows in the test state. If there is no open phase, current flows in all phases in the test state. On the other hand, if any one of the phases is open, a phase in which no current flows is generated. For example, in the test state, when the line 13U is connected to the line 12P and the lines 13V and 13W are connected to the line 12N, no current flows in any of the phases when the U phase is lost. When a phase loss occurs in the V phase, the same current (in different directions) flows in the U phase and W phase, but no current flows in the V phase. When a missing phase occurs in the W phase, the same current (in different directions) flows in the U phase and V phase, but no current flows in the W phase. Further, when two or more phases are open, no current flows in any of the phases. Therefore, the open-phase detector 116 confirms whether or not there is a phase in which no current flows in the test state. If current flows in any of the phases, it detects that there is no open phase, and the current flows. When there is a non-existent phase, the open phase is detected.

Whether or not current is flowing in each phase can be determined based on the detection values acquired by the current information acquisition unit 112 from the current sensors 21U, 21V, 21W. For example, the open-phase detector 116 may determine that no current is flowing when the values detected by the current sensors 21U, 21V, 21W are less than a predetermined lower limit value. The lower limit value may be a value that is small enough to be regarded as the same as when no current is flowing. For example, the lower limit value is set to a value obtained by multiplying the resolution of the current sensors 21U, 21V, 21W by a predetermined magnification.

The open phase detector 116 may detect the open phase when the state in which there is a phase in which no current flows in the test state continues until a predetermined condition is satisfied. For example, the open-phase detector 116 determines that the voltage of the DC bus 12 reaches a predetermined voltage threshold (hereinafter, referred to as “first condition”) in a state in which there is a phase in which no current flows, as the predetermined condition. May be detected. In other words, the open phase detector 116 may detect the open phase when the voltage of the DC bus 12 reaches the voltage threshold in the state where there is a phase in which no current flows.

The phase loss detection unit 116 may detect the phase loss by using a predetermined determination time (hereinafter, referred to as “second condition”) in a state where there is a phase in which no current flows as the predetermined condition. .. In other words, the phase loss detection unit 116 may detect the phase loss when a predetermined determination time elapses in a state in which there is a phase in which no current flows.

The open-phase detection unit 116 determines that the open phase is a predetermined condition that the currents of other phases reach a predetermined current threshold value in the presence of a phase in which no current flows (hereinafter, referred to as “third condition”). It may be detected. In other words, the open phase detector 116 may detect the open phase when the current of the other phase reaches a predetermined current threshold value in a state where there is a phase in which no current flows. The current threshold value may be set to a value that is smaller than the current value that can flow when the voltage of the DC bus 12 is 60 V and that is equal to or higher than the lower limit value.

The phase loss detection unit 116 sets two or more of the first condition, the second condition, and the third condition as the predetermined condition, and detects the phase loss when any one of the two or more conditions is satisfied. May be. For example, the open-phase detector 116 sets all of the first condition, the second condition, and the third condition as the predetermined condition, and in the state where there is a phase in which no current flows, the first condition, the second condition, and the third condition. The missing phase may be detected when any one of them is satisfied.

The predetermined condition may be set so that the open phase can be detected before the voltage of the DC bus 12 reaches 60 volts. For example, the voltage threshold may be set so that the open phase can be detected before the voltage of the DC bus 12 reaches 60 volts. For example, the voltage threshold may be set below 60 volts. The determination time may be set to a value shorter than the time from when the voltage of the DC bus 12 starts rising to when it reaches 60 volts.

The phase loss detection unit 116 may be configured to detect the phase loss based on the current detection value of the detection target phase of any two of the three phases. In this case, the test control unit 115 needs to connect the two phases to be detected and the other one phase to different poles of the DC bus 12 in the test state. According to such a configuration, the current sensor of the other phase can be omitted.

For example, when the open-phase detector 116 is configured to detect the open-phase based on the current detection values of the current sensors 21U and 21W, the test controller 115 sets the lines 13U and 13W to the line 12P in the test state. To connect line 13V to line 12N, or to connect lines 13U and 13W to line 12N and connect line 13V to line 12P. As an example, when the test control unit 115 connects the lines 13U and 13W to the line 12P and connects the line 13V to the line 12N, current flows in both the lines 13U and 13W when there is no phase loss. When the U-phase is open, a current flows through the line 13W, but no current flows through the line 13U. When the V-phase is out of phase, no current flows in any of the lines 13U and 13W. When a phase loss occurs in the W phase, a current flows through the line 13U, but no current flows through the line 13W. Further, when two or more phases are lost, no current flows in any of the lines 13U and 13W. As described above, when no phase loss occurs, current flows through both lines 13U and 13W, whereas when phase loss occurs in at least one phase, current does not flow through at least one of lines 13U and 13W. .. Therefore, the open phase can be detected based on the current detection values of the current sensors 21U and 21W.

The control circuit 100 further executes detecting that the power switch SW is switched from the off state to the on state, and detects the open phase in response to the power switch SW being switched from the off state to the on state. It may be configured to initiate the process. For example, the control circuit 100 further includes a power-on detection unit 114. The power-on detection unit 114 detects that the power switch SW is switched from the off state to the on state (that is, the direct current bus 12 is connected to the direct current power supply PS) based on the voltage increase of the direct current bus 12. For example, in the power-on detector 114, the DC bus 12 is connected to the DC power supply PS when the voltage detection value of the voltage sensor 22 rises and exceeds a predetermined threshold value (hereinafter referred to as “ON detection threshold value”). It is detected.

The method of detecting that the power switch SW is turned on is not limited to the method based on the voltage increase. For example, the power-on detection unit 114 may detect that the power switch SW is switched from the off state to the on state based on an electric signal for switching the power switch SW from the off state to the on state. The test control unit 115 and the open phase detection unit 116 start the process for detecting the open phase in response to the power-on detection unit 114 detecting that the power switch SW is switched from the off state to the on state. .. For example, the test control unit 115 controls the power conversion circuit 10 to start the test state at the timing when the power-on detection unit 114 detects that the power switch SW is switched from the off state to the on state, and detects the open phase. The unit 116 starts the process for detecting the open phase in response to the start of the test state.

It should be noted that the control circuit 100 may be configured to start the process for detecting the open phase, based on the information on the timing at which the power switch SW is switched from the off state to the on state, prior to the timing. Good. The timing information can be acquired from, for example, a higher-level controller.

When the control circuit 100 does not detect a phase loss, it controls the power conversion circuit 10 to convert the power of the DC power supply PS into AC power and supply it to the load LD, and when it detects a phase loss. In addition, prohibiting the power supply from the power conversion circuit 10 to the load LD may be further configured. Further, the control circuit 100 may be configured to notify the user of this when a phase loss between the power conversion circuit 10 and the load LD is detected. For example, the control circuit 100 further includes a drive control unit 119, an output prohibition unit 117, and an open phase notification unit 118.

The drive control unit 119 loads the drive power according to a command from a higher-order controller when the open phase detection unit 116 does not detect the open phase (that is, when it detects that there is no open phase). The power conversion circuit 10 is controlled so as to supply to the LD. For example, the drive control unit 119 controls the power conversion circuit 10 so as to convert the power of the DC power supply PS into drive power and supply the drive power to the load LD.

The output prohibiting unit 117 prohibits the supply of electric power from the power conversion circuit 10 to the load LD when the open phase detecting unit 116 detects the open phase. For example, the output prohibition unit 117 controls the power conversion circuit 10 so that none of the lines 13U, 13V, 13W is connected to the lines 12P, 12N. When the phase loss detection unit 116 detects the phase loss, the phase loss notification unit 118 notifies the user of this by a display device such as a liquid crystal monitor or a warning lamp.

FIG. 2 is a block diagram illustrating a hardware configuration of the control circuit 100. As shown in FIG. 2, the control circuit 100 includes a circuit 120. The circuit 120 includes one or more processors 121, a memory 122, a storage 123, a display device 124, an input/output port 125, and a timer 126. The storage 123 has a computer-readable storage medium such as a nonvolatile semiconductor memory. The storage 123 stores at least one phase of the output line 13 and the remaining one during the voltage rising period of the DC bus 12 due to the power switch SW being turned on (that is, the DC bus 12 being connected to the DC power PS). Controlling the power conversion circuit 10 so as to temporarily maintain a state in which the phase and the different poles of the DC bus 12 are connected to each other (hereinafter, referred to as "test state"), and output to the load LD in the test state. A program for causing the control circuit 100 to detect the open phase based on the current is stored. For example, the storage 123 stores a program for configuring the above-mentioned functional modules by the control circuit 100. The memory 122 temporarily stores the program loaded from the storage medium of the storage 123 and the calculation result by the processor 121. The processor 121 configures each functional module of the control circuit 100 by executing the above program in cooperation with the memory 122. The display device 124 includes, for example, a liquid crystal monitor and a warning lamp, and is used for displaying information to the user. The input/output port 125 inputs/outputs an electric signal between the power conversion circuit 10, the current sensors 21U, 21V, 21W, and the voltage sensor 22 according to a command from the processor 121. The timer 126 counts a clock pulse of a predetermined cycle according to a command from the processor 121 and measures an elapsed time.

The control circuit 100 is not necessarily limited to one that configures each function by a program. For example, the control circuit 100 may configure at least a part of functions by a dedicated logic circuit or an ASIC (Application Specific Integrated Circuit) in which the logic circuit is integrated.

[Power conversion method]
Next, as an example of the power conversion method, in the power conversion procedure executed by the power conversion device 1, a procedure until the control according to a command from the host controller is started (hereinafter, this is referred to as “start procedure”). ) Is illustrated. The start-up procedure is to control the power conversion circuit 10 so as to temporarily maintain the test state during the voltage rise period of the DC bus 12 accompanying the connection of the DC bus 12 to the DC power supply, and Detecting a phase loss based on the output current to the load LD.

For example, as shown in FIG. 3, the control circuit 100 executes steps S01 and S02. In step S01, the voltage information acquisition unit 111 acquires the detected value of the voltage of the DC bus 12 from the voltage sensor 22. In step S02, the power-on detection unit 114 confirms whether the voltage detection value of the voltage sensor 22 exceeds the on-detection threshold value. When determining in step S02 that the voltage detection value does not exceed the ON detection threshold value, the control circuit 100 returns the process to step S01. After that, the control circuit 100 repeats the acquisition and confirmation of the detected value of the voltage of the DC bus 12.

When it is determined in step S02 that the detected voltage value exceeds the ON detection threshold, the control circuit 100 executes steps S03 and S04. Step S03 includes inspecting for the presence or absence of a missing phase. The specific content of step S03 will be described in detail later. In step S04, the drive control unit 119 confirms whether or not it is determined in step S03 that there is no open phase.

If it is determined in step S04 that there is no open phase, the control circuit 100 executes step S05. In step S05, the drive control unit 119 starts control (hereinafter referred to as “drive control”) for supplying drive power to the load LD according to a command from a higher-level controller. The drive control controls the power conversion circuit 10 so as to supply the drive power to the load LD according to the command from the host controller, and does not supply the drive power to the load LD when there is no command. Controlling the power conversion circuit 10.

When it is determined in step S04 that there is an open phase, that is, when the open phase detector 116 detects the open phase, the control circuit 100 executes steps S11 and S12. In step S11, the output prohibition unit 117 prohibits the supply of power from the power conversion circuit 10 to the load LD. In step S12, the phase loss notification section 118 notifies the user of the phase loss detected by the phase loss detection section 116. This completes the startup procedure.

FIG. 4 is a flowchart illustrating in detail the open-phase inspection procedure in step S03. As shown in FIG. 4, the control circuit 100 executes steps S21, S22, S23, S24 and S25. In step S21, the time measuring unit 113 starts measuring elapsed time by counting clock pulses or the like. In step S22, the test control unit 115 controls the power conversion circuit 10 to start the test state. In step S23, the current information acquisition unit 112 acquires the detected current values of the lines 13U, 13V, 13W from the current sensors 21U, 21V, 21W, respectively. In step S24, the voltage information acquisition unit 111 acquires the detected value of the voltage of the DC bus 12 from the voltage sensor 22. In step S25, the open-phase detector 116 confirms whether or not the detected values of all the currents in the lines 13U, 13V, 13W are above the lower limit value.

When it is determined in step S25 that the detected values of all the currents in the lines 13U, 13V, 13W are higher than the lower limit value, the control circuit 100 executes step S26. In step S26, the open phase detector 116 determines that there is no open phase between the power conversion circuit 10 and the load LD.

When it is determined in step S25 that the detected value of the current in any of the lines 13U, 13V, and 13W does not exceed the lower limit value, the control circuit 100 executes step S27. In step S27, the open-phase detection unit 116 checks whether the current in any of the lines 13U, 13V, 13W is equal to or less than the current threshold value (that is, whether the third condition is not satisfied).

When it is determined in step S27 that the current in any of the lines 13U, 13V, and 13W is less than or equal to the current threshold value, the control circuit 100 executes step S28. In step S28, the open-phase detection unit 116 confirms whether the voltage of the DC bus 12 is equal to or lower than the voltage threshold value (that is, whether the first condition is not satisfied).

When it is determined in step S28 that the voltage of the DC bus 12 is less than or equal to the voltage threshold, the control circuit 100 executes step S29. In step S29, the open-phase detecting unit 116 confirms whether the elapsed time measured by the time measuring unit 113 has reached the determination time (that is, whether the second condition has been satisfied).

If it is determined in step S29 that the elapsed time has reached the determination time, the control circuit 100 executes step S31. When it is determined in step S27 that the detected values of all the currents in the lines 13U, 13V, and 13W are higher than the current threshold value, and when it is determined in step S28 that the voltage of the DC bus 12 is higher than the voltage threshold value, the control is performed. The circuit 100 omits step S29 and executes step S31. In step S31, the open phase detection unit 116 determines that there is an open phase between the power conversion circuit 10 and the load LD.

When it is determined in step S29 that the elapsed time has not reached the determination time, the control circuit 100 returns the process to step S23. After that, until the current flows through all of the lines 13U, 13V, 13W, or any one of the first condition, the second condition, and the third condition is satisfied, the detected values of the currents of the lines 13U, 13V, 13W, DC Confirmation of the presence or absence of a phase loss based on the detected voltage value of the bus bar 12 and the elapsed time is repeated.

After steps S26 and S31, the control circuit 100 executes step S32. In step S32, the test control unit 115 controls the power conversion circuit 10 to end the test state. This completes the open phase inspection procedure. In addition, in FIG. 4, the open phase inspection procedure based on all the detected values of the currents of the lines 13U, 13V, and 13W, the detected values of the voltage of the DC bus 12 and the elapsed time is illustrated, but it is essential to be based on all of these. is not. For example, the confirmation of the elapsed time may be omitted, and the presence or absence of the open phase may be confirmed based on the detected values of the currents of the lines 13U, 13V, 13W and the detected values of the voltage of the DC bus 12. Alternatively, the confirmation of the voltage of the DC bus 12 may be omitted, and the presence or absence of the phase loss may be confirmed based on the detected values of the currents of the lines 13U, 13V, 13W and the elapsed time.

[Effects of this embodiment]
As described above, in the power conversion device 1, the power conversion circuit 10 that converts the power of the DC bus 12 into AC power of a plurality of phases and supplies the AC power to the load, and the DC bus 12 are connected to the DC power supply PS. The power conversion circuit 10 is controlled so as to temporarily maintain a state in which at least one of the plurality of phases and the remaining phase are connected to different poles of the DC bus 12 during the voltage rise period of the DC bus 12 due to The test control unit 115 and the open phase detection unit 116 that detects the open phase based on the output current to the load LD in the above state.

According to the power converter 1, the open phase detection is performed during the voltage rising period after the DC bus 12 is connected to the DC power supply PS. Compared to the state in which the voltage between the DC buses 12 is maximum, it is possible to apply a voltage between the phases during the voltage rising period without moving the load LD largely. Therefore, it is possible to temporarily maintain the test state so that the current flows through all the phases regardless of the electrical angle, and quickly detect the open phase based on the output current corresponding to the test state. Therefore, it is effective for early detection of a missing phase.

The open phase detector 116 may detect the open phase based on whether or not there is a phase in which no current flows. In this case, the open phase can be detected more quickly with simple logic.

The phase loss detection unit 116 may detect the phase loss when the state in which there is a phase in which no current flows continues until a predetermined condition is satisfied. In this case, the open phase detection criterion is that the state in which a current does not flow continues until a predetermined condition is satisfied, so that both open phase detection speed and open phase detection reliability are compatible. Can be planned.

The open phase detector 116 may detect the open phase on the condition that the voltage of the DC bus 12 reaches a predetermined voltage threshold in a state where there is a phase in which no current flows. In this case, when the voltage between the DC bus lines 12 reaches a predetermined voltage threshold value in the state where there is a phase in which no current flows, the open phase detection criterion is to speed up open phase detection. It is possible to achieve compatibility with reliability. In addition, when a plurality of conditions are combined, it is possible to more reliably achieve both rapidness of open phase detection and reliability of open phase detection.

The open-phase detector 116 may detect the open-phase on the condition that a predetermined determination time elapses in the state where there is a phase in which no current flows. In this case, by making the predetermined determination time elapse in the presence of a phase in which no current flows as the open phase detection criterion, it is possible to achieve both rapid open phase detection and open phase detection reliability. Can be planned.

The open phase detector 116 may detect the open phase on the condition that the current of the other phase reaches a predetermined current threshold value in a state where there is a phase in which no current flows. In this case, the open phase detection speed and the reliability of open phase detection are determined by setting the open phase detection criterion as the current of the other phase reaching a predetermined current threshold value in the presence of a phase in which no current flows. It is possible to achieve compatibility with sex. When a plurality of conditions are combined, it is possible to more surely achieve both rapidness of open phase detection and reliability of open phase detection.

The predetermined condition may be set so that the open phase can be detected before the voltage of the DC bus 12 reaches 60 volts. In this case, the open phase can be detected before the voltage between the DC buses 12 reaches SELV (Safety Extra Low Voltage) defined by IEC60364-4 and IEC60950.

The power conversion circuit 10 converts the power of the DC bus 12 into AC power of three phases, and the phase loss detection unit 116 detects the phase loss based on the current detection value of the detection target phase of any two of the three phases. The test control unit 115 detects and detects two phases out of three phases and the other one phase during the voltage rise period of the DC bus 12 as the DC bus 12 is connected to the DC power supply PS. The power conversion circuit 10 may be controlled so as to temporarily maintain the state of being connected to the different poles of the DC bus 12, respectively. In this case, it is possible to execute the above-described phase loss detection while reducing the sensors for current detection.

The power conversion device 1 further includes a power-on detection unit 114 that detects that the DC bus 12 is connected to the DC power supply PS based on the voltage increase of the DC bus 12, and includes a test control unit 115 and an open phase detection unit 116. May start the process for detecting the open phase in response to the power-on detection unit 114 detecting that the DC bus 12 is connected to the DC power supply PS. In this case, a dedicated sensor may be provided for detecting power-on (connection between the DC bus and the DC power supply), or information on the timing of switching the power switch SW from the off state to the on state may be acquired from a host controller or the like. The open-phase detection described above can be performed regardless of the above.

Although the embodiments have been described above, the present disclosure is not necessarily limited to the above-described embodiments, and various modifications can be made without departing from the scope of the invention.

DESCRIPTION OF SYMBOLS 1... Power converter device, 10... Power converter circuit, 12... DC busbar, 114... Power-on detection part, 115... Test control part, 116... Open phase detection part, LD... Load, PS... DC power supply.

Claims (10)

A power conversion circuit that converts the power of the DC bus into a plurality of phases of AC power and supplies it to the load,
At least one phase of the plurality of phases and the remaining phase are respectively connected to different poles of the DC bus during a voltage rise period of the DC bus accompanying the DC bus being connected to a DC power supply. A test control unit for controlling the power conversion circuit so as to temporarily hold the power conversion circuit;
An open-phase detector that detects open-phase between the power conversion circuit and the load based on an output current to the load in the state. The power converter according to claim 1, wherein the phase loss detection unit detects the phase loss based on whether or not there is a phase in which no current flows. The power conversion device according to claim 2, wherein the phase loss detection unit detects the phase loss when a state in which a phase in which no current flows exists continues until a predetermined condition is satisfied. The power conversion device according to claim 3, wherein the open-phase detector detects the open-phase on the condition that the voltage of the DC bus reaches a predetermined voltage threshold in a state in which there is a phase in which no current flows. .. The power converter according to claim 3 or 4, wherein the open-phase detector detects the open-phase on the condition that a predetermined determination time elapses in the presence of a phase in which no current flows. The said open phase detection part detects the said open phase on the condition that the current of the other phase reaches a predetermined current threshold value in a state where there is a phase in which no current flows, the open phase detection unit. The power converter according to one item. The power conversion device according to any one of claims 3 to 6, wherein the predetermined condition is set so that the open phase can be detected before the voltage of the DC bus reaches 60 volts. The power conversion circuit converts the power of the DC bus into the three-phase AC power,
The phase loss detection unit detects a phase loss between the power conversion circuit and the load based on a current detection value of a detection target phase of any two of the three phases,
The test control unit controls the detection target phase of the two phases out of the three phases and the other one phase during the voltage rising period of the DC bus accompanying the DC bus being connected to the DC power supply. The power conversion device according to any one of claims 1 to 7, wherein the power conversion circuit is controlled so as to temporarily maintain a state of being respectively connected to different poles of the DC busbar. Further comprising a power-on detection unit that detects that the DC bus is connected to the DC power supply based on a voltage rise of the DC bus.
The test control unit and the open phase detection unit starts a process for detecting the open phase in response to the power-on detection unit detecting that the DC bus bar is connected to the DC power supply, The power conversion device according to claim 1. At least during the voltage rising period of the DC bus that accompanies the DC bus of the power conversion circuit that converts the power of the DC bus into AC power of a plurality of phases and supplies it to the load, at least the plurality of phases. Controlling the power conversion circuit so as to temporarily maintain a state in which one phase and the remaining phase are respectively connected to different poles of the DC busbar;
Detecting an open phase between the power conversion circuit and the load based on an output current to the load in the state.

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