JP2020112962A - Electronic apparatus - Google Patents

Abstract

To provide an electronic apparatus capable of replacing a nonvolatile memory while avoiding missing data only with a mechanism in the electronic apparatus even in the case that a processor with only one nonvolatile memory connected thereto exists in the electronic apparatus.SOLUTION: This electronic apparatus 10A includes a nonvolatile memory (SSD13), a volatile memory (DDR12), a processor (ASSP11), a power supply 16, and a sequencer (ASIC14). The power supply 16 is a power supply for enabling the cut-off of power supply to the SSD13 while supplying power to the DDR12. The ASIC14 causes the ASSP11 to execute saving operation for performing cut-off of the power supply to the SSD13 after writing saved data stored in the SSD13 into the DDR12, and writing back operation for writing back the saved data to the SSD13 after resuming the power supply to the SSD13.SELECTED DRAWING: Figure 1

Description

The present invention relates to electronic devices.

In many electronic devices, from the viewpoint of cost reduction and the like, it is required to achieve the same function with a minimum number of components. Here, a multifunction peripheral will be described as an example of one of such electronic devices. Here, a device having a function as a printer, a function as a copying machine, and a function as a scanner is called a multifunction peripheral. The multi-function peripheral may further include a facsimile transmission/reception function and other functions.

In general, in a multifunction device, one system including one board and one electronic device is generally referred to as an eMMC (embedded Multi Media Card), an SSD (Solid State Drive), and an HDD (Hard Disk Drive). The configuration is such that a plurality of nonvolatile memories are connected. In recent years, from the viewpoint of cost reduction and the like, it is possible to integrate the functions divided into a plurality of non-volatile memories into one non-volatile memory and configure only one non-volatile memory in one system. Is requested.

When only one non-volatile memory is connected, maintenance problems occur. That is, when the life of the non-volatile memory is approaching and it is necessary to replace the non-volatile memory, it is necessary to temporarily save important data stored in the non-volatile memory. The problem is where to save. That is, when there are multiple non-volatile memories for one system, save the data in the non-volatile memory that is about to be replaced this time to another non-volatile memory, turn off the power, and replace The memory can be replaced. However, if a non-volatile memory other than the non-volatile memory to be replaced is not connected to the system, data may be lost if the power is turned off to replace the non-volatile memory.

If a non-volatile memory other than the non-volatile memory to be replaced is not connected to the system, a non-volatile external memory such as a USB memory is prepared and data is saved in the external memory. It is possible. However, in that case, it is necessary to prepare the equipment to connect the external memory, and if the data is saved to the outside, there is a risk that the data in another external memory will be accidentally written back when lost or written back. However, saving the data to the external memory is not preferable.

Here, Patent Document 1 discloses that the data in the volatile memory is stored in a non-volatile memory as a backup of the volatile memory.

Japanese Patent Publication No. 2018-508878

The above problem is not limited to the multi-function peripheral, but is a problem common to electronic devices equipped with a processor to which only one nonvolatile memory is connected.

An object of the present invention is to provide an electronic device capable of exchanging a non-volatile memory without losing data without using a non-volatile memory other than the non-volatile memory to be replaced.

Claim 1
Non-volatile memory,
Volatile memory,
A processor for accessing the non-volatile memory and the volatile memory,
A power supply capable of cutting off power supply to the non-volatile memory while supplying power to the volatile memory, and the processor with saved data including at least a part of data stored in the non-volatile memory. An evacuation operation of causing the power supply to cut off the power supply to the non-volatile memory while supplying the power to the volatile memory after the data is written in the volatile memory;
And a sequencer for causing the processor to execute a write-back operation of writing back the saved data written in the volatile memory in the save operation to the nonvolatile memory after restarting the power supply to the nonvolatile memory. It is an electronic device characterized by that.

Claim 2
The volatile memory is a volatile memory with a self-refresh mode function,
The sequencer
In the save operation, the processor further causes the volatile memory to shift to a self-refresh mode to shift the processor to a reset state,
2. The electronic device according to claim 1, wherein in the write-back operation, the reset state of the processor is further released so that the processor releases the self-refresh mode of the volatile memory.

Claim 3
The volatile memory is a volatile memory with a self-refresh mode function,
The power supply is a power supply capable of cutting off power supply to the nonvolatile memory and cutting off power supply to the processor independently of each other while supplying power to the volatile memory,
The sequencer
In the evacuation operation, the processor further causes the volatile memory to shift to a self-refresh mode so that the power supply shuts off power supply to the processor.
The electronic device according to claim 1, wherein in the write-back operation, the power supply is further restarted to supply power to the processor to cause the processor to cancel the self-refresh mode of the volatile memory. ..

Claim 4
A non-volatile memory comprising a life prediction means for predicting that the life of the non-volatile memory is approaching,
The electronic equipment according to any one of claims 1 to 3, wherein the sequencer receives the notification from the life prediction unit and executes the evacuation operation.

According to a fifth aspect of the present invention, the life prediction means predicts that the life of the non-volatile memory is approaching, based on the failure rate or the number of times of access to the non-volatile memory. The electronic device described.

A sixth aspect of the present invention is characterized in that the sequencer executes the write-back operation after receiving the notification that the nonvolatile memory has been exchanged after the evacuation operation has been performed. The electronic device according to any one of 1.

Claim 7
The nonvolatile memory is equipped with a sensor for detecting attachment/detachment,
The sequencer receives the detection by the sensor that the nonvolatile memory is removed and reattached after the evacuation operation is executed, as the notification, and executes the write-back operation. The electronic device according to claim 6.

Claim 8
A user interface for receiving an operation from the user that the replacement of the nonvolatile memory is completed,
7. The sequencer according to claim 6, wherein the sequencer receives, as the notification, an operation by the user that the replacement of the nonvolatile memory has been received, which is received by the user interface, and executes the write-back operation. It is an electronic device.

A ninth aspect of the present invention is the electronic device according to any one of the first to eighth aspects, further comprising a user interface for notifying a user that the evacuation operation has been completed.

According to a tenth aspect of the present invention, the non-volatile memory is the only non-volatile memory that is always mounted on the electronic device and is accessible by the processor. The electronic device described in the item.

An electronic device according to any one of claims 1 to 10, wherein the electronic device is a multi-function peripheral having at least a print function, a copy function, and a scanner function. Is.

According to the electronic device of the first aspect, the non-volatile memory can be replaced without using a non-volatile memory other than the non-volatile memory to be replaced.

According to the electronic device of the second aspect, the nonvolatile memory can be replaced even in a system in which the processor needs to be reset.

According to the electronic device of the third aspect, the non-volatile memory can be replaced even in the system in which the power supply to the processor needs to be temporarily cut off.

According to the electronic device of the fourth aspect, the non-volatile memory can be replaced at an appropriate time, as compared with the case where the life prediction unit is not provided.

According to the electronic device of the fifth aspect, the life can be accurately predicted as compared with the case where the life is predicted based on the operating time.

According to the electronic device of the sixth aspect, the failure of the write-back operation is reduced as compared with the case where the write-back operation is executed based on the elapsed time from the completion of the execution of the save operation.

According to the electronic device of the seventh aspect, the time until the start of the write-back operation is shortened as compared with the system in which the user notifies the completion of the replacement of the nonvolatile memory.

According to the electronic device of the eighth aspect, as compared with the system in which the write-back operation is started without notification from the user, the write-back operation is performed with the user's conviction that the user has surely replaced.

According to the electronic device of claim 9, the failure of starting the replacement work before the completion of the evacuation operation is reduced as compared with the system in which the evacuation operation is not notified.

According to the electronic device of the tenth aspect, as compared with the electronic device in which a plurality of nonvolatile memories accessible by the processor are mounted, the electronic device functions effectively when the nonvolatile memory is replaced.

Further, the present invention can be suitably applied to the multi-function peripheral of claim 11.

FIG. 3 is a block diagram showing a main part of the electronic device according to the first embodiment of the present invention. It is the figure which showed the screen of the user interface at the time of SSD exchange. It is the figure which showed the flowchart performed when an "OK" button is pressed on the screen of FIG. It is the figure which showed the screen of the user interface after SSD exchange. It is the figure which showed the flowchart performed when the "OK" button is pressed on the screen of FIG. It is the block diagram which showed the principal part of the electronic device of 2nd Embodiment of this invention. It is a figure showing the first half of the flowchart of the processing when the access success/failure monitor is predicted to be approaching the life. It is the figure which showed the screen displayed on a user interface by step S33 of FIG. It is the figure which showed the screen displayed on a user interface by step S36 of FIG. It is a figure showing the latter half of the flowchart of the process when it is predicted that the life of the access monitor is approaching and that of the monitor of access success or failure. It is the figure which showed the screen displayed on a user interface by step S43 of FIG. It is the figure which showed the screen displayed on a user interface by step S45 of FIG. It is the block diagram which showed the principal part of the electronic device of 3rd Embodiment of this invention. It is the block diagram which showed the principal part of the electronic device of 4th Embodiment of this invention. FIG. 15 is a diagram showing a flowchart of a retracting operation in the electronic device 10D of the fourth embodiment shown in FIG. 14. It is the figure which showed the flowchart of the write-back operation|movement in the electronic device 10D of 4th Embodiment shown in FIG. It is the block diagram which showed the principal part of the electronic device of 5th Embodiment of this invention. It is the figure which showed the flowchart of the evacuation operation|movement in the electronic device 10E of 5th Embodiment shown in FIG. It is the figure which showed the flowchart of the write-back operation|movement in the electronic device 10E of 5th Embodiment shown in FIG.

Hereinafter, embodiments of the present invention will be described.

FIG. 1 is a block diagram showing a main part of an electronic device according to a first embodiment of the present invention. This electronic device is, for example, a multifunction peripheral having at least a print function, a copy function, and a scanner function. However, illustration and description of the entire multifunction peripheral are omitted here, and the main parts are referred to as electronic devices. The same applies to each of the second and subsequent embodiments described below.

The electronic device 10 includes an Application Special Standard Product (ASSP) 11 and a Double-Data-Rate SDRAM (Synchronous Dynamic Random Access Random Access AcrylicSSD (Synchronous Dynamic Random Access AcrylicSpatial) ASD (Synchronous Dynamic Random Alignment Acrylic Alignment AcrylicSSD) (SSD) 12 and a DDR (Synchronous Dynamic Random Alignment Acrylic Priority SSD (Synchronous Dynamic Random Alignment ASR) SDP (Synchronous Dynamic Random Alignment Acrylic Alignment ASD) (SSD) (Synchronous Dynamic Random Alignment Alignment ASD (SSD) (SSD)) 12 ) 14 and.

The ASSP 11 is a processor developed for a specific purpose and corresponds to an example of the processor according to the present invention. The DDR 12 is a kind of volatile memory and corresponds to an example of the volatile memory referred to in the present invention. The SSD 13 is a type of non-volatile memory and corresponds to an example of the non-volatile memory according to the present invention. Further, the ASIC 14 is an integrated circuit developed for a specific application. The ASIC 14 corresponds to an example of the sequencer according to the present invention. The ASIC 14 includes a power supply control circuit 141 that controls turning on and off of power to each unit by a power supply 16 described below.

The electronic device 10 also includes a user interface 15. The user interface 15 plays a role of presenting information to the user and receiving an instruction operation by the user, and is configured by a touch panel type display screen, other push buttons, and the like.

The electronic device 10 also includes a power supply 16. The power supply 16 is controlled by the power supply control circuit 141 in the ASIC 14 and supplies electric power to each unit shown here. Here, the power supply 16 is configured to be able to turn on and off the power of the SSD 13 independently of other units.

Consider replacing the SSD 13 in the electronic device 10A having this configuration. A non-volatile memory other than one SSD 13 is not mounted in this electronic device 13. Therefore, here, the data stored in the SSD 13 is temporarily saved in the DDR 12 which is a volatile memory.

In the case of the electronic device 10A of the first embodiment, the user determines when to replace the SSD 13. As a judgment criterion by the user, for example, it is judged that it is safer to use this electronic device 10A for a long time and replace it soon, or recently, the operation of the electronic device 10A is slow and the access of the SSD 13 is made slower. It is possible to guess that there are many errors in.

FIG. 2 is a diagram showing a screen of the user interface when the SSD is replaced.

When the user wants to replace the SSD 13, the user operates the user interface 15 to select the screen 21 shown in FIG. 2 from the menu screen. The screen 21 shown in FIG. 2 is a screen for informing the electronic device 10A of the user's intention to replace the SSD 13. When the "OK" button on the screen 21 is pressed, the intention is transmitted to the electronic device 10A.

FIG. 3 is a diagram showing a flowchart executed when the “OK” button is pressed on the screen of FIG.

When the “OK” button is pressed on the screen of FIG. 2, the ASIC 14 controls the ASS 11 and the power supply 16 to execute the operation shown in FIG.

Here, first, the ASIC 14 instructs the ASSP 11 to write the saved data, which is composed of at least a part of the data stored in the SSD 13, to the SSD 13 after the replacement and to restore the processing by the electronic device 10A. The data is written in the DDR 12 (step S11). Then, after the writing is completed, the power supply control circuit 141 of the ASIC 14 instructs the power supply 16 to cut off the power supply to the SSD 13 (step S12). At this time, the power supply to the DDR 12 and the like is maintained as it is. The process shown in FIG. 3 corresponds to an example of the "save operation" according to the present invention.

After this saving operation, the user replaces the SSD 13 with a new SSD 13.

FIG. 4 is a diagram showing a screen of the user interface after SSD replacement.

When the replacement of the SSD 13 is completed, the user operates the user interface 15 again to select the screen 22 shown in FIG. 4 from the menu screen. The screen 22 shown in FIG. 4 is a screen that informs the user that the electronic device 10A has completed the replacement of the SSD 13. When the "OK" button on the screen 22 is pressed, the electronic device 10A is notified that the SSD 13 has been replaced.

FIG. 5 is a diagram showing a flowchart executed when the “OK” button is pressed on the screen of FIG.

When the "OK" button is pressed on the screen of FIG. 4, the ASIC 14 controls the ASS P11 and the power supply 16 to execute the operation shown in FIG.

Here, first, the power supply control circuit 141 of the ASIC 14 instructs the power supply 16 to restart the power supply to the SSD 13 (step S21).

Then, after a lapse of time until the power supply to the SSD 13 is stabilized, the SSD 13 is instructed to perform initialization via the ASIC 14 (step S22), and the SSD 13 receives the instruction and executes initialization of itself.

Further, after the initialization is completed, the ASIC 14 instructs the ASSP 11 to write back the data saved in the DDR 12 to the SSD 13 (step S23). The process shown in FIG. 5 corresponds to an example of the “write-back operation” according to the present invention.

In the case of the electronic device 10A of the first embodiment, as described above, the evacuation operation shown in FIG. 3 and the write-back operation shown in FIG. 5 complete the replacement of the SSD 13 and the startup after the replacement.

FIG. 6 is a block diagram showing the main parts of the electronic device according to the second embodiment of the present invention. Among the components of the electronic device 10B of the second embodiment, the same components as those of the electronic device 10A of the first embodiment shown in FIG. 1 are designated by the same reference numerals. The difference will be described. The same applies to each of the third and subsequent embodiments described below.

The lifetime prediction circuit 142 is included in the ASIC 14 of the electronic device 10B of the second embodiment shown in FIG. At the level expressed in FIG. 6, the other points are the same as those of the electronic device 10A of the first embodiment shown in FIG. Differences not appearing in FIG. 6 will be described with reference to FIG. 7 and subsequent figures.

The lifespan prediction circuit 142 is a circuit that receives information on success or failure of access to the SSD 13 from the ASSP 11 and predicts that the lifespan of the SSD 13 is approaching based on the failure rate or the number of times of access failure. The life prediction circuit 142 corresponds to an example of the life prediction means according to the present invention. Note that the life prediction may be performed by the ASSP 11 to notify the ASIC 14 that the life of the SSD 13 is approaching.

The life prediction circuit 142 determines that the life of the SSD 13 is approaching, for example, by how many access errors have occurred in the last unit time. Alternatively, the determination may be made by the ratio of the access error of the latest unit time to the access number of the latest unit time. Alternatively, it may be determined by the cumulative number of access errors from the start of operation of the electronic device 10B. The life prediction circuit 142 continues to monitor whether the life of the SSD 13 is approaching or not while the electronic device 10B is operating.

FIG. 7 is a diagram showing the first half of the flowchart of the processing when the access success/failure monitor is predicted to be approaching the life.

In this electronic device 10B, the success or failure of access to the SSD 13 is constantly monitored during operation (step S31), and it is determined whether or not the number of access errors per unit time in the latest reaches a predetermined threshold value ( Step S32).

When the latest number of access errors per unit time reaches the threshold, a screen prompting replacement of the SSD 13 is displayed on the user interface 15 (step S33).

FIG. 8 is a diagram showing a screen displayed on the user interface in step S33 of FIG.

On the screen 23 shown in FIG. 8, a message "The life of the SSD is approaching. Do you want to replace it?" and "Yes" and "Later" buttons are displayed.

When the "later" button is pressed on this screen 23 (step S34), the number of access errors obtained by the monitor in step S31 is reset (step S35), and the process returns to the monitor in step S31. After returning to step S31, counting of the number of access errors is newly started. This is because the access error only occasionally occurs, so that the occurrence may be stopped for a while after this. When determining the cumulative number of access errors, the threshold value is changed instead of resetting the number of access errors in step S35.

When the "Yes" button on the screen 23 shown in FIG. 8 is pressed (step S34), a screen requesting standby is displayed (step S36).

FIG. 9 is a diagram showing a screen displayed on the user interface in step S36 of FIG.

On the screen 24 shown in FIG. 9, a message "please wait for a while" requesting a wait is displayed.

FIG. 10 is a diagram showing the latter half of the flow chart of the process when the access success/failure monitor is predicted to be approaching the service life.

After the screen 24 shown in FIG. 9 is displayed on the user interface in step S36 of FIG. 7, the evacuation operation including steps S41 and S42 of FIG. 10 is performed. The evacuation operation in steps S41 and S42 is the same as the evacuation operation described with reference to FIG. 3, and a duplicate description here will be omitted.

After the evacuation operation in steps S41 and S42, a screen prompting replacement is displayed on the user interface 15 (step S43).

FIG. 11 is a diagram showing a screen displayed on the user interface in step S43 of FIG.

On the screen 25 shown in FIG. 11, a message "Replace SSD" and a "Yes" button are displayed. If there is no function to display the message prompting the replacement of the SSD, there is a risk that the replacement work will start before the evacuation operation is completed, but by displaying this, the SSD 13 can be replaced. It gives the user peace of mind that it is okay to start.

When the "Yes" button on the screen 25 is pressed, the user's intention to replace the SSD is transmitted to the electronic device 10A.

When the "Yes" button on this screen 25 is pressed (step S44), then a screen for inquiring the completion of replacement of the SSD 13 is displayed on the user interface 15 (step S45).

FIG. 12 is a diagram showing a screen displayed on the user interface in step S45 of FIG.

On this screen 26, an inquiry “Is SSD replacement completed?” and a “Yes” button are displayed.

When the "Yes" button on the screen 26 is pressed, the electronic device 10B recognizes that the replacement of the SSD 13 is completed.

When it is recognized that the SSD 13 has been replaced (step S46), the write-back operation including steps S47 to S49 is executed. The write-back operation in steps S47 to S49 is the same as the write-back operation described with reference to FIG. If it is considered that the replacement of the SSD 13 is completed when a certain time has elapsed based on the elapsed time from the completion of the evacuation operation, there is a risk that the data write-back may fail if the replacement of the SSD 13 is time-consuming. On the other hand, here, by displaying the screen 26 and waiting for the write-back until the “Yes” button is pressed, the write-back is surely performed after the user is satisfied that the replacement of the SSD 13 is completed. ..

According to the electronic device 10B of the second embodiment described with reference to FIGS. 6 to 10, if the user replaces the SSD 13 when the electronic device 10B informs that the time to replace the SSD 13 has come. Well, you don't have to worry about when to replace the SSD 13. In addition, here, since the life is predicted based on the frequency or the number of access errors, the life is predicted more accurately than in the case where the life is predicted based on the mere operation time.

FIG. 13 is a block diagram showing the main parts of the electronic device according to the third embodiment of the present invention.

The electronic device 10C further includes an attachment/detachment detection sensor 17 as compared with the electronic device 10B shown in FIG. The attachment/detachment detection sensor 17 is a sensor that detects that the SSD 13 has been removed and attached. The attachment/detachment detection sensor 17 is not limited to the principle of detection, and may be, for example, a sensor using a mechanical switch, a sensor using a photoelectric switch, or any other principle sensor. However, it is necessary to detect attachment/detachment of the SSD 13 while the power supply to the SSD 13 is interrupted.

The process of replacing the SSD 13 in the electronic device 10C of the third embodiment shown in FIG. 13 will be described with reference to FIGS. 7 and 10 showing the process in the second embodiment.

The processing of the first half shown in FIG. 7 is adopted as it is in this third embodiment.

On the other hand, in the case of the electronic device 10C of the third embodiment shown in FIG. 13, step S45 and step S46 are unnecessary for the latter half processing shown in FIG.

In step S43, the screen 25 prompting the replacement of the SSD 13 shown in FIG. 11 is displayed, and the “Yes” button on the screen 25 is pressed. Then, monitoring of the attachment/detachment detection sensor 17 is started. Then, when the removal of the SSD 13 is detected and remains stablely removed for the minimum time required for replacement, after that, when the installation of the SSD 13 is detected and the installation continues to be detected stably for a while, The write-back operation from step S47 onward in FIG. 10 is performed.

According to the third embodiment, compared to the second embodiment in which the user notifies the completion of the replacement of the SSD 13, it is not necessary to wait for the user's operation, and the time until the write-back operation starts is shortened.

FIG. 14 is a block diagram showing the main parts of the electronic device of the fourth embodiment of the present invention.

The electronic device 10D of the fourth embodiment shown in FIG. 14 is the same as the electronic device 10A of the first embodiment shown in FIG. 1 as a block diagram of the level expressed in FIG. However, the ASSP 11 in this electronic device 10D has the individual recognition function of the SSD 13, and therefore in the case of this electronic device 10D, it is necessary to reset the ASSP 11 in order to recognize the ID that identifies the individual SSD 13 after replacement. ..

FIG. 15 is a view showing a flowchart of the save operation in the electronic device 10D of the fourth embodiment shown in FIG.

The evacuation operation shown in FIG. 15 is similar to the evacuation operation in the first embodiment shown in FIG. 3 when the user presses the “OK” button on the screen 21 when replacing the SSD 13 shown in FIG. Be started.

Steps S51 and S52 in FIG. 15 are the same as steps S11 and S12 in the save operation of the first embodiment shown in FIG. 3, respectively, and redundant description thereof will be omitted.

In the case of the save operation of the fourth embodiment shown in FIG. 15, the ASIC 14 further instructs the ASSP 11 to shift the DDR 12 to the self refresh mode (step S53). Then, the ASSP 11 instructs the DDR 12 to shift to the self refresh mode, and the DDR 12 shifts to the self refresh mode. Here, the DDR 12 requires a regular data rewriting operation called refreshing in order to hold the stored data. This refresh operation is normally performed by the instruction of the ASSP 11 while aiming at the interval when the ASSP 11 accesses the DDR 12, but the DDR 12 receives the instruction of the transition to the self-refresh mode from the ASSP 11 and performs the refresh operation by itself. It also has a function to repeat. This mode in which the DDR 12 repeats the refresh operation by itself is called a self refresh mode. However, in this self-refresh mode, although the content of the data can be retained, the DDR 12 is not accessed during the self-refresh mode.

In the save operation of the fourth embodiment shown in FIG. 15, after the DDR 12 is shifted to the self-refresh mode, the ASIC 14 further shifts the ASSP 11 to the reset state (step S54), whereby the save of the fourth embodiment is performed. Complete the operation.

FIG. 16 is a view showing a flowchart of the write-back operation in the electronic device 10D of the fourth embodiment shown in FIG.

The write-back operation shown in FIG. 16 is the same as the write-back operation in the first embodiment shown in FIG. 3, and the user presses the “OK” button on the screen 22 after replacement of the SSD 13 shown in FIG. It starts with that.

In the write-back operation according to the fourth embodiment shown in FIG. 16, first, the reset of the ASSP 11 is released (step S61). This allows the ASSP 11 to operate normally.

Then, the ASIC 14 instructs the ASSP 11 to cancel the self refresh mode of the DDR 12 (step S62). Then, the ASSP 11 instructs the DDR 12 to cancel the self-refresh mode, and the self-refresh mode of the DDR 12 is canceled. Subsequent steps S63 to S65 are the same as the write-back operation in the first embodiment shown in FIG. 5, and thus redundant description will be omitted. However, here, the ID of the SSD 13 is recognized by the ASSP 11 at the timing of the initialization of the SSD 13 (step S64).

As shown in the fourth embodiment, the SSD 13 can be replaced even in a system in which the ASSP 11 needs to be reset.

FIG. 17 is a block diagram showing the main parts of the electronic device of the fifth embodiment of the present invention.

The ASSP 11 forming the electronic device 10E of the fifth embodiment is an ASSP of a type that is reset by turning off its power supply. Therefore, in the electronic device 10E of the fifth embodiment, the power supply 16 can cut off the power supply to the SSD 13 alone as in the previous embodiments, and unlike the previous embodiments, The ASSP 11 is also a power source capable of cutting off the power supply to itself.

FIG. 18 is a view showing a flowchart of the save operation in the electronic device 10E of the fifth embodiment shown in FIG.

The evacuation operation shown in FIG. 18 is similar to the evacuation operation in the first embodiment shown in FIG. 3 when the user presses the “OK” button on the screen 21 when replacing the SSD 13 shown in FIG. Be started.

Steps S71 to S73 of FIG. 18 are the same as steps S51 to S53 in the save operation of the fourth embodiment shown in FIG. 15, respectively, and a duplicate description thereof will be omitted.

In the case of the save operation of the fifth embodiment shown in FIG. 18, the power supply control circuit 141 of the ASIC 14 further instructs the power supply 16 to stop the power supply to the ASSP 11 (step S74), and the power supply 16 causes the ASPS 11 to operate. To stop the power supply to.

FIG. 19 is a view showing a flowchart of the write-back operation in the electronic device 10E of the fifth embodiment shown in FIG.

The write-back operation shown in FIG. 19 is the same as the write-back operation in the fourth embodiment shown in FIG. 16, and the user presses the “OK” button on the screen 22 after replacement of the SSD 13 shown in FIG. It starts with that.

In the write-back operation in the fifth embodiment shown in FIG. 19, first, the power supply control circuit 141 of the ASIC 14 instructs the power supply 16 to restart the power supply to the ASSP 11 (step S81), and the power supply 16 Upon receiving the instruction, the power supply to the ASSP 11 is restarted. Subsequent steps S82 to S85 are the same as steps S62 to S65 in the fourth embodiment shown in FIG. 16, and duplicate description will be omitted here. Similar to the fourth embodiment, also in the fifth embodiment, the ID of the SSD 13 is recognized by the SSDP 11 at the timing of initialization of the SSD 13 (step S84).

As shown in the fifth embodiment, the SSD 13 can be replaced even in a system that needs to cut off the power supply to the ASSP 11.

In addition, in the case of the fourth embodiment and the fifth embodiment, only the basic form is shown, but as with the second embodiment shown in FIG. 6, a configuration including a life prediction circuit 142 may be provided. Similar to the third embodiment shown in FIG. 13, the attachment/detachment detection sensor 17 may be provided.

Further, in the above first to fifth embodiments, the electronic device adopting the SSD has been described as an example of the non-volatile memory according to the present invention, but the present invention is not limited to the SSD, and may be, for example, an eMMC, an HDD, or the like. The same can be applied to the case of an electronic device equipped with another type of non-volatile memory.

Further, in the above first to fifth embodiments, the electronic device adopting the DDR is described as an example of the non-volatile memory according to the present invention, but the volatile memory according to the present invention is not limited to the DDR. Volatile memory.

Further, in the above first to fifth embodiments, the electronic device including only one non-volatile memory has been described, but the present invention can be applied even when a plurality of non-volatile memories are mounted. Is. For example, even if multiple non-volatile memories are installed, replace all of the installed non-volatile light memories other than the non-volatile light memory that you are about to replace because they are almost full. This is effective when there is no free space for saving the data in the nonvolatile light memory.

In addition, here, a multifunction peripheral is given as an example of the electronic device, but the present invention is not limited to the multifunction peripheral, and can be widely applied to electronic devices in general.

10A, 10B, 10C, 10D, 10E Electronic Device 11 ASSP (Application Specific Standard Price)
12 DDR (Double-Data-Rate SDRAM (Synchronous Dynamic Random Access Memory))
13 SSD (Solid State Drive)
14 ASIC (Application Specific Integrated Circuit)
141 Power supply control circuit 142 Life prediction circuit 15 User interface 16 Power supply 17 Attachment/detachment detection sensor

Claims (11)

Non-volatile memory,
Volatile memory,
A processor for accessing the non-volatile memory and the volatile memory,
A power supply capable of cutting off power supply to the non-volatile memory while supplying power to the volatile memory, and the processor with saved data including at least a part of data stored in the non-volatile memory. An evacuation operation of causing the power source to cut off the power supply to the nonvolatile memory while supplying the power to the volatile memory after writing the data in the volatile memory;
A sequencer for causing the processor to execute a write-back operation of writing back the saved data written in the volatile memory in the saving operation to the nonvolatile memory after restarting the power supply to the nonvolatile memory An electronic device characterized by that. The volatile memory is a volatile memory with a self-refresh mode function,
The sequencer
In the save operation, the processor further causes the volatile memory to shift to a self-refresh mode to shift the processor to a reset state,
The electronic device according to claim 1, wherein in the write-back operation, the reset state of the processor is further released so that the processor releases the self-refresh mode of the volatile memory. The volatile memory is a volatile memory with a self-refresh mode function,
The power supply is a power supply capable of cutting off power supply to the nonvolatile memory and cutting off power supply to the processor independently of each other while supplying power to the volatile memory,
The sequencer
In the evacuation operation, the processor further causes the volatile memory to shift to a self-refresh mode so that the power supply shuts off power supply to the processor.
The electronic device according to claim 1, wherein in the write-back operation, the power supply is further restarted to supply power to the processor to cause the processor to release the self-refresh mode of the volatile memory. A non-volatile memory comprising a life prediction means for predicting that the life of the non-volatile memory is approaching,
The electronic device according to any one of claims 1 to 3, wherein the sequencer receives the notification from the life prediction unit and executes the evacuation operation. The electronic device according to claim 4, wherein the life prediction unit predicts that the life of the non-volatile memory is approaching, based on a failure rate or the number of times of failure to access the non-volatile memory. 4. The sequencer executes the write-back operation after receiving the notification that the non-volatile memory has been replaced after the save operation is executed. Electronic device described in. The nonvolatile memory is equipped with a sensor for detecting attachment/detachment,
The sequencer receives the detection by the sensor that the nonvolatile memory is removed and reattached after the evacuation operation is executed, as the notification, and executes the write-back operation. The electronic device according to claim 6. A user interface for receiving an operation from the user that the replacement of the nonvolatile memory is completed,
7. The sequencer according to claim 6, wherein the sequencer receives, as the notification, an operation by the user that the replacement of the nonvolatile memory has been received, which is received by the user interface, and executes the write-back operation. Electronics. 9. The electronic device according to claim 1, further comprising a user interface that notifies a user that the evacuation operation has been completed. 10. The electronic device according to claim 1, wherein the non-volatile memory is the only non-volatile memory that is always mounted on the electronic device and is accessible by the processor. machine. The electronic device according to any one of claims 1 to 10, wherein the electronic device is a multifunction peripheral having at least a print function, a copy function, and a scanner function.

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