JP2020087990A - Semiconductor device and power conversion apparatus using the same - Google Patents

Abstract

To provide a semiconductor device where a temperature detection element is provided in the same semiconductor substrate as IGBT, highly accurate temperature detection is possible, and which can be manufactured at a low cost.SOLUTION: In a semiconductor device having an active region, a temperature detector, and a carrier withdrawal region formed between the active region and the temperature detector, the temperature detector includes multiple second trenches formed adjacently to the carrier withdrawal region, multiple second gate electrodes comprising a conductor formed on the inside of the second trench, and an insulator film formed around the conductor, a second conductivity type sixth semiconductor layer formed while sandwiched by the multiple second gate electrodes, a first conductivity type seventh semiconductor layer formed adjacently to the second gate electrode on the surface of the fifth semiconductor layer, and having a surface in contact with an emitter electrode, and an anode electrode formed on the surface of the sixth semiconductor layer.SELECTED DRAWING: Figure 1

Description

The present invention relates to the structure of a semiconductor device, and particularly to a technique effectively applied to an IGBT (insulated gate bipolar transistor) having a temperature detection function.

A power converter using an IGBT (Insulated Gate Bipolar Transistor) as a semiconductor element (semiconductor device) is used in a wide range of fields, and its use is expanding. In these power converters, it is important to detect the temperature of the semiconductor element during operation. From the detected temperature of the semiconductor element, for example, overheat due to overcurrent is detected, the operation of power conversion is stopped, or the magnitude of the power to be handled is limited, whereby the device can be prevented from being destroyed in advance.

Various means for detecting the temperature of the IGBT are known, and one of them is a method of providing an element for temperature detection on the same semiconductor substrate as the IGBT. This method has the advantage of high detection accuracy because the temperature detection element can be provided in the immediate vicinity of the IGBT to be detected. Further, the IGBT is manufactured through various impurity introduction steps and diffusion steps. If the temperature detection element is formed by using these steps also, a temperature detection means can be provided at low cost.

BACKGROUND ART As a background art in this technical field, for example, there is a technology as disclosed in Patent Document 1. Patent Document 1 discloses "a bipolar semiconductor element including a temperature detection unit used in an inverter device or the like".

As one of the embodiments, “a p anode region 13 is formed in the surface layer of the n base layer 3 so as to be separated from the p extraction region 21, an anode electrode 15 is provided on the surface, and a current source 18 is provided. It is connected, and when the gate is turned on, a diode is formed between the anode electrode 15 and the emitter electrode 8 through the channel formed immediately below the gate electrode 7, and a constant current is passed through the diode to measure the forward voltage.” There is. (Fig. 6 and paragraph [0053] etc.)

Japanese Patent No. 3538505

However, according to the study by the inventors of the present invention, the technique disclosed in Patent Document 1 has the following problems. In other words, the value detected by the temperature detection unit is affected by the magnitude of the current (main current) flowing in the active region, so there is a problem that the detection accuracy is low.

Therefore, an object of the present invention is to suppress the influence of the main current on the temperature sensing current in a semiconductor device in which a temperature detecting element is provided on the same semiconductor substrate as the IGBT, and to perform highly accurate temperature detection, and It is to provide a semiconductor device that can be manufactured at low cost.

In order to solve the above problems, the present invention is a semiconductor device having an active region, a temperature detection unit, and a carrier extraction region formed between the active region and the temperature detection unit, wherein The region includes a first conductive type first semiconductor layer, a second conductive type second semiconductor layer formed on a first surface of the first semiconductor layer, and a surface of the second semiconductor layer from the second semiconductor layer. A plurality of first trenches penetrating a layer to reach the first semiconductor layer; a conductor formed inside the first trench; and an insulating film formed around the conductor. A plurality of first gate electrodes, a third semiconductor layer of the first conductivity type formed adjacent to the first gate electrode on the surface of the second semiconductor layer, and a third semiconductor layer of the first semiconductor layer. Second conductive type fourth semiconductor layer formed on the surface, emitter electrodes formed on the surfaces of the second semiconductor layer and the third semiconductor layer, and a collector formed on the surface of the fourth semiconductor layer An electrode, the carrier extraction region includes a fifth semiconductor layer of a second conductivity type, the surface being in contact with the emitter electrode, and the temperature detection unit includes a plurality of electrodes formed adjacent to the carrier extraction region. A second trench, a plurality of second gate electrodes configured to include a conductor formed inside the second trench and an insulating film formed around the conductor, and the plurality of second gate electrodes. The sixth semiconductor layer of the second conductivity type formed so as to be sandwiched by the second gate electrode and the surface of the fifth semiconductor layer are formed adjacent to the second gate electrode, and the emitter electrode is formed on the surface. Is provided with a seventh semiconductor layer of the first conductivity type, and an anode electrode formed on the surface of the sixth semiconductor layer.

Further, the present invention comprises a plurality of switching elements, a plurality of freewheeling diodes, and a voltage source, wherein the switching elements and the freewheeling diodes are connected in antiparallel to form one arm, and the arm Are connected in series to form a phase, each of the three phases is connected in parallel with the voltage source, and an inductive load is connected between the two arms of each of the three phases. In the power conversion device, the semiconductor device is used for each of the plurality of switching elements.

According to the present invention, in a semiconductor device in which a temperature detecting element is provided on the same semiconductor substrate as the IGBT, it is possible to realize a semiconductor device capable of highly accurate temperature detection and manufactured at low cost.

Problems, configurations, and effects other than those described above will be clarified by the following description of the embodiments.

FIG. 3 is a partial cross-sectional view of the semiconductor device according to the first embodiment of the present invention. FIG. 11 is a partial cross-sectional view of a semiconductor device configured by a conventional technique. FIG. 6 is a partial cross-sectional view of a semiconductor device according to a second embodiment of the present invention. FIG. 6 is a partial cross-sectional view of a semiconductor device according to Example 3 of the present invention. FIG. 6 is a partial cross-sectional view of a semiconductor device according to Example 4 of the present invention. It is a circuit diagram of the power converter device which concerns on Example 5 of this invention. FIG. 9 is a partial cross-sectional view of a semiconductor device according to Example 6 of the present invention.

Embodiments of the present invention will be described below with reference to the drawings. In each drawing, the same components are designated by the same reference numerals, and detailed description of overlapping portions will be omitted. Also, two certain components are referred to in different drawings, and even if the shape and other components located in the periphery are different, if there is no difference in the essence of their functions, References will be made using the same symbols.

≪Comparison example≫
First, for the purpose of helping the understanding of the object and the configuration and the operation and effect of the present invention, prior to the description of the embodiments of the present invention, in the semiconductor device configured by the conventional technique, the value detected by the temperature detecting unit The reason why the detection accuracy is lowered due to the influence of the current will be described.

FIG. 2 shows an example of a semiconductor device configured by the conventional technique. In the semiconductor device of FIG. 2, the temperature detecting element is provided on the same semiconductor substrate as the IGBT. A plurality of p-type channel layers 102 are selectively formed on the surface of the n-type bulk layer 101. A plurality of n-type source regions 105 are selectively formed on the surface of the p-type channel layer 102. On the surfaces of the n-type bulk layer 101, the p-type channel layer 102, and the n-type source region 105, a plurality of gate electrodes 104 including a conductor and an insulating film formed around the conductor are formed. There is.

An emitter electrode 107 is formed on the surfaces of the p-type channel layer 102 and the n-type source region 105. A p-type collector layer 106 is formed on the back surface of the n-type bulk layer 101, and a collector electrode 108 is formed on the back surface of the p-type collector layer 106. The part described above is hereinafter referred to as an active region 115. The active region 115 constitutes a planar type IGBT.

A p-type carrier extraction layer 109 is formed adjacent to the active region 115 and partially overlapping the p-type channel layer 102. The portion where the p-type carrier extraction layer 109 is formed is hereinafter referred to as a carrier extraction region 116.

Adjacent to the carrier extraction region 116, a p-type anode layer 112 is selectively formed on the surface of the n-type bulk layer 101. An anode electrode 114 is formed on the surface of the p-type anode layer 112. Hereinafter, the portion including the p-type anode layer 112 and the anode electrode 114 will be referred to as a temperature detection unit 117.

When the temperature is detected using the semiconductor device of FIG. 2, for example, in a state in which a current source that directs a current to the anode electrode 114 is connected to the anode electrode 114, the potential of the emitter electrode 107 is used as a reference and the Methods such as measuring the electric potential are taken.

When the semiconductor device of FIG. 2 is used for a power conversion device, the gate electrode 104 is repeatedly turned on and off in order to activate the active region 115. Here, turning on the gate electrode 104 means that a voltage for forming an n-type inversion layer in a portion of the p-type channel layer 102 adjacent to the gate electrode 104 is applied to the gate electrode 104. Similarly, turning off the gate electrode 104 means that a voltage that does not form the n-type inversion layer is applied to the gate electrode 104.

When the gate electrode 104 is on, a pn diode having the anode layer 112 as a p-type region and the bulk layer 101, the inversion layer, and the source region 105 as an n-type region is formed inside the semiconductor device of FIG. ing. At this time, the current supplied from the current source is injected from the p-type anode layer 112 into the n-type bulk layer 101, and flows into the emitter electrode 107 via the inversion layer and the n-type source region 105. That is, a forward bias current flows through the pn diode. At this time, if the potential of the anode electrode 114 is measured with reference to the potential of the emitter electrode 107, the temperature of the semiconductor device can be detected by utilizing the temperature dependence of the forward voltage of the pn diode.

When the gate electrode 104 is turned on, focusing on the active region 115, the planar IGBT forming the active region 115 is in a conductive state. That is, electrons are injected into the n-type bulk layer 101 from the n-type source region 105 through the inversion layer, and correspondingly, holes are injected into the n-type bulk layer 101 from the p-type collector layer 106 on the back surface. As a result, a large amount of holes are accumulated in the n-type bulk layer 101 as excess carriers. The larger the current flowing in the active region 115, that is, the main current, the larger the amount of holes accumulated in the n-type bulk layer 101.

When a current is applied to the pn diode and its forward voltage is used for temperature detection, the amount of holes already accumulated in the n-type bulk layer 101 due to the action of the active region 115 depends on the voltage-current characteristic of the pn diode. Have a big impact. That is, in the present semiconductor device, the value detected by the temperature detection unit 117 is affected by the main current, and the detection accuracy becomes low. More specifically, at the same temperature, for example, the forward voltage of the pn diode detected when the main current is zero and the pn diode detected when the rated current of the semiconductor device is flowing to the main current. The forward voltage will be different.

Next, the functions of the p-type carrier extraction layer 109 and the carrier extraction region 116 will be described. As described above, the semiconductor device of FIG. 2 configured by the conventional technique has a problem that the temperature detection accuracy is low. However, by providing the p-type carrier extraction layer 109 and the carrier extraction region 116, the problem can be solved. It can be improved to some extent.

As described above, the reason why the temperature detection accuracy in the semiconductor device of FIG. 2 is low is that the amount of holes accumulated in the n-type bulk layer 101 changes depending on the magnitude of the main current. Here, since the carrier extraction layer 109 is a p-type and is a semiconductor layer having a low potential for holes, holes in the vicinity thereof flow into the p-type carrier extraction layer 109 and pass through the adjacent p-type channel layer 102. It is discharged to the emitter electrode 107.

Due to this action, the amount of holes accumulated in the n-type bulk layer 101 near the p-type carrier extraction layer 109 is smaller than that in the case where the p-type carrier extraction layer 109 is not provided. Therefore, in this case, the change in the amount of holes accumulated in the n-type bulk layer 101 due to the magnitude of the main current can be partially suppressed, and the temperature detection accuracy can be improved.

However, as can be seen from the action of the p-type carrier extraction layer 109 described above, the p-type carrier extraction layer 109 can suppress the change in the amount of accumulated holes only in the vicinity of the p-type carrier extraction layer 109. On the other hand, the current flowing through the pn diode by the current source flows over a wide area inside the semiconductor device of FIG. 2 as described above (p-type anode layer 112, n-type bulk layer 101, inversion layer, n-type source region). 105), the effect of improving the detection accuracy is inevitably limited.

The reason why the value detected by the temperature detection unit is affected by the main current and the detection accuracy is lowered in the semiconductor device configured by the conventional technique has been described above. Next, examples of the present invention will be described.

A semiconductor device according to a first embodiment of the present invention will be described with reference to FIG. FIG. 1 is a partial cross-sectional view of a semiconductor device according to this embodiment. In the semiconductor device of this embodiment, a p-type channel layer 102 is formed on the surface of an n-type bulk layer 101. A plurality of first trenches 103 that penetrate the p-type channel layer 102 and reach the n-type bulk layer 101 from the surface of the p-type channel layer 102 are formed.

Inside the first trench 103, a plurality of first gate electrodes 104 including an electric conductor and an insulating film formed around the electric conductor are formed. Each of the conductors forming the first gate electrode 104 faces the side wall and the bottom corner of the trench and does not exist near the center of the bottom of the trench. That is, the first gate electrode 104 is a side gate type gate including a conductor formed to face the sidewall of the first trench 103 and a bottom corner and an insulating film formed around the conductor. It is an electrode.

On the surface of the p-type channel layer 102, an n-type source region 105 is formed so as to be adjacent to the first gate electrode 104. An emitter electrode 107 is formed on the surfaces of the p-type channel layer 102 and the n-type source region 105. A p-type collector layer 106 is formed on the back surface of the n-type bulk layer 101, and a collector electrode 108 is formed on the back surface of the p-type collector layer 106. The part described above is hereinafter referred to as an active region 115. The active region 115 constitutes a side gate type IGBT.

A p-type carrier extraction layer 109 is formed adjacent to the active region 115 and partially overlapping the p-type channel layer 102. The emitter electrode 107 is in contact with the surface of the p-type carrier extraction layer 109. The portion where the p-type carrier extraction layer 109 is formed is hereinafter referred to as a carrier extraction region 116.

A plurality of second trenches 110 are formed adjacent to the carrier extraction region 116. Inside the second trench 110, a plurality of second gates configured to include a conductor and an insulating film formed around the conductor and electrically connected to the first gate electrode 104 are provided. The electrode 111 is formed. Each of the conductors forming the second gate electrode 111 faces the sidewall and the bottom of the trench and fills the entire area of the second trench 110.

A p-type anode layer 112 is formed so as to be sandwiched between the second gate electrodes 111. An n-type cathode layer 113 is formed adjacent to the second gate electrode 111 on the surface of the p-type carrier extraction layer 109. The emitter electrode 107 is in contact with the surface (side surface) of the n-type cathode layer 113. An anode electrode 114 is formed on the surface of the p-type anode layer 112. Hereinafter, a portion including the p-type anode layer 112, the anode electrode 114, the second trench 110, the second gate electrode 111, and the n-type cathode layer 113 will be referred to as a temperature detection unit 117.

When the temperature is detected using the semiconductor device of FIG. 1, for example, in a state in which a current source that directs a current to the anode electrode 114 is connected to the anode electrode 114, the potential of the emitter electrode 107 is used as a reference and the Methods such as measuring the electric potential are taken.

In the semiconductor device of FIG. 1, the first gate electrode 104 and the second gate electrode 111 are electrically connected to each other. Therefore, when the first gate electrode 104 is turned on, the second gate electrode 111 is also turned on, and the inversion layer (or the storage layer) is also formed around it. In this case, inside the semiconductor device of FIG. 1, the anode layer 112 is a p-type region, the inversion layer (or storage layer) formed around the second gate electrode 111, and the cathode layer 113 are an n-type region. A pn diode is formed.

At this time, the current supplied from the current source flows from the p-type anode layer 112 to the emitter electrode 107 via the inversion layer and the n-type cathode layer 113. That is, a forward bias current flows through the pn diode. At this time, if the potential of the anode electrode 114 is measured with reference to the potential of the emitter electrode 107, the temperature of the semiconductor device can be detected by utilizing the temperature dependence of the forward voltage of the pn diode.

When the first gate electrode 104 is on, focusing on the active region 115, the side gate type IGBT forming the active region 115 is in a conductive state. That is, electrons are injected into the n-type bulk layer 101 from the n-type source region 105 via the inversion layer around the first gate electrode 104. Then, correspondingly, holes are injected into the n-type bulk layer 101 from the p-type collector layer 106 on the back surface. As a result, a large amount of holes are accumulated in the n-type bulk layer 101 as excess carriers. The larger the current flowing in the active region 115, that is, the main current, the larger the amount of holes accumulated in the n-type bulk layer 101.

Also in the semiconductor device shown in FIG. 1, when a current is passed through the pn diode and its forward voltage is used for temperature detection, the number of holes accumulated in the n-type bulk layer 101 by the action of the active region 115 is It may have some influence on the voltage-current characteristics of the pn diode. However, the degree of the influence is significantly smaller than that of the semiconductor device constituted by the conventional technique shown as the comparative example. This is because in the comparative example, the holes injected from the p-type anode layer 112 into the n-type bulk layer 101 move in the n-type bulk layer 101 and flow to the emitter electrode 107, whereas in FIG. This is because in the semiconductor device shown, the holes injected from the p-type anode layer 112 into the inversion layer immediately reach the nearest n-type cathode layer 113 and are collected by the emitter electrode 107.

That is, the n-type bulk layer 101 is not included in the main current path of the pn diode that constitutes the temperature detection unit, and the amount of holes accumulated in the n-type bulk layer 101 affects the voltage-current characteristics of the pn diode. It is configured so that it is difficult to give a temperature difference, and the influence of the magnitude of the main current on the accuracy of temperature detection is small.

Next, the functions of the p-type carrier extraction layer 109 and the carrier extraction region 116 will be described. As described above, in the semiconductor device of FIG. 1, the influence of the number of holes accumulated in the n-type bulk layer 101 on the voltage-current characteristics of the pn diode is essentially small, but not completely free. Because part of the second gate electrode 111 protrudes into the n-type bulk layer 101, part of the inversion layer (or storage layer) formed around the second gate electrode 111 also exists. This is because it will be formed in the n-type bulk layer 101, and at that portion, it will be affected by the holes accumulated in the n-type bulk layer 101.

Therefore, providing the p-type carrier extraction layer 109 and suppressing the amount of holes accumulated in the n-type bulk layer 101 near the p-type carrier extraction layer 109 works effectively also in the semiconductor device of FIG. That is, a change in the amount of holes accumulated in the n-type bulk layer 101 due to the magnitude of the main current can be suppressed, particularly near the p-type carrier extraction layer 109, and the temperature detection accuracy can be further improved. Considering the action of the p-type carrier extraction layer 109 described above, the p-type carrier extraction layer 109 is preferably formed deeper than the second gate electrode 111.

Further, by adjusting the shape of the carrier extraction layer and forming the portion of the second gate electrode 111 protruding to the n-type bulk layer 101 as small as possible, the accuracy of temperature detection is improved (the influence of the main current is suppressed). ) Is effective.

As described above, the semiconductor device of this embodiment is a semiconductor device including the active region 115, the temperature detection unit 117, and the carrier extraction region 116 formed between the active region 115 and the temperature detection unit 117. Therefore, the active region 115 is formed on the first semiconductor layer (n-type bulk layer 101) of the first conductivity type (for example, n-type) and the first surface of the first semiconductor layer (n-type bulk layer 101). The second semiconductor layer (p-type channel layer 102) of the second conductivity type (for example, p-type) and the surface of the second semiconductor layer (p-type channel layer 102) penetrate the second semiconductor layer (p-type channel layer 102). And a plurality of first trenches 103 reaching the first semiconductor layer (n-type bulk layer 101) and a conductor formed inside the first trench 103 and an insulating film formed around the conductor. And a plurality of first gate electrodes 104 formed by the above, and a first conductivity type third semiconductor formed adjacent to the first gate electrode 104 on the surfaces of the second semiconductor layer (p-type channel layer 102). Layer (n-type source region 105), second semiconductor layer (p-type collector layer 106) of the second conductivity type formed on the second surface of the first semiconductor layer (n-type bulk layer 101), and second semiconductor Layer (p-type channel layer 102) and the third semiconductor layer (n-type source region 105) formed on the surface of the emitter electrode 107, and the fourth semiconductor layer (p-type collector layer 106) formed on the surface of the collector electrode 108, the carrier extraction region 116 is provided with a fifth conductivity type fifth semiconductor layer (p-type carrier extraction layer 109) on the surface of which the emitter electrode 107 is in contact, and the temperature detection unit 117 is provided with the carrier extraction region 116. A plurality of second trenches 110 formed adjacent to the plurality of second trenches 110, and a plurality of second trenches 110 including a conductor formed inside the second trench 110 and an insulating film formed around the conductor. Gate electrode 111, the second conductive type sixth semiconductor layer (p-type anode layer 112) sandwiched between the plurality of second gate electrodes 111, and the fifth semiconductor layer (p-type carrier extraction layer 109). ), a seventh semiconductor layer (n-type cathode layer 113) of the first conductivity type, which is formed adjacent to the second gate electrode 111 and is in contact with the emitter electrode 107, and a sixth semiconductor layer (p-type). An anode electrode 114 formed on the surface of the anode layer 112).

The fifth semiconductor layer (p-type carrier extraction layer 109) in the carrier extraction region 116 is formed adjacent to the active region 115 and partially overlapping the second semiconductor layer (p-type channel layer 102 ). ..

According to the present embodiment, in the semiconductor device in which the temperature detecting element is provided on the same semiconductor substrate as the IGBT, the influence of the main current on the temperature sensing current can be suppressed, highly accurate temperature detection can be performed, and the IGBT can be detected. By forming the temperature detecting element also using the step of manufacturing the temperature sensor, it is possible to manufacture a semiconductor device including the temperature detecting element at low cost.

A semiconductor device according to a second embodiment of the present invention will be described with reference to FIG. FIG. 3 is a partial cross-sectional view of the semiconductor device according to this embodiment. The feature of this embodiment is the shape of the first gate electrode 104 formed in the active region 115. Each of the conductors forming the first gate electrode 104 faces the side wall and the bottom of the first trench 103 and fills the entire area of the first trench 103. That is, the first gate electrode 104 is a trench gate type gate electrode that is formed so as to face the side wall and the bottom of the first trench 103 and fills the entire area of the first trench 103.

That is, the active region 115 of the semiconductor device shown in FIG. 3 constitutes a trench gate type IGBT. Other configurations are the same as those of the semiconductor device of the first embodiment (FIG. 1).

As described in the description of the function and effect of the semiconductor device according to the first embodiment, the essence of the present invention is that the p-type anode layer 112 and the n-type cathode layer 113 are opposed to each other with the second gate electrode 111 interposed therebetween. Therefore, the current path of the pn diode used for temperature detection is short. Therefore, the shape of the first gate electrode 104 formed in the active region 115 does not influence the operation and effect of the present invention. As shown in FIG. 3, there is no problem even if it is a trench gate type, and the same effect as that of the side gate type shown in Example 1 (FIG. 1) can be obtained.

A semiconductor device according to a third embodiment of the present invention will be described with reference to FIG. FIG. 4 is a partial cross-sectional view of the semiconductor device according to this embodiment. The feature of the present embodiment is that the first gate electrode 104 formed in the active region 115 and the second gate electrode 111 formed in the temperature detection unit 117 are not electrically connected. Other configurations are the same as those of the semiconductor device of the first embodiment (FIG. 1).

As is apparent from the above description, in the present invention, it is not always necessary that the first gate electrode 104 and the second gate electrode 111 are electrically connected and turned on and off at the same time. Therefore, as in the present embodiment, the first gate electrode 104 and the second gate electrode 111 are configured so as to be individually (independently) controlled, and the first gate electrode 104 is set to the active region 115. Is turned on and off to be used for power conversion, and the second gate electrode 111 is turned on at an arbitrary timing when the first gate electrode 104 is in an on state, so that a pn diode is attached to the temperature detection unit 117. It may be formed and the temperature of the semiconductor device may be acquired.

According to the present embodiment, in addition to the effect of the first embodiment, the temperature detection timing by the temperature detection unit 117 can be set arbitrarily.

A semiconductor device according to a fourth embodiment of the present invention will be described with reference to FIG. FIG. 5 is a partial cross-sectional view of the semiconductor device according to this embodiment. The feature of this embodiment is that, for example, in the semiconductor device according to the first embodiment of the present invention shown in FIG. 1, a p-type channel layer 102 is formed in place of the p-type carrier extraction layer 109. Is being done.

As described above, the provision of the p-type carrier extraction layer 109 in the present invention is effective for increasing the accuracy of temperature detection, but it is not essential. The essence of the present invention is that the p-type anode layer 112 and the n-type cathode layer 113 are opposed to each other with the second gate electrode 111 interposed therebetween, and thus the current path of the pn diode used for temperature detection is short. Is. Therefore, as in this embodiment, the p-type channel layer 102 may be formed instead of the carrier extraction layer.

That is, in this embodiment, the fifth semiconductor layer of the carrier extraction region 116 is formed in the same step as the second semiconductor layer (p-type channel layer 102) and has the same impurity concentration.

Since the p-type channel layer 102 is a p-type semiconductor layer like the p-type carrier extraction layer 109, its effect is limited, but the same effect as the p-type carrier extraction layer 109 can be exhibited. If the limited effect is sufficient, in the case of the configuration according to the present embodiment, it is not necessary to introduce the p-type carrier extraction layer 109, so that the configuration of the semiconductor device is simple and the cost can be reduced. ..

A power converter according to a fifth embodiment of the present invention will be described with reference to FIG. FIG. 6 is a circuit diagram of the power conversion device according to this embodiment. The power conversion device shown in this embodiment includes a plurality of semiconductor devices 601 each having a temperature detection unit, a plurality of freewheeling diodes 602, and a voltage source 603, and is connected to an inductive load (motor) 604.

The semiconductor device 601 and the free wheeling diode 602 are connected in anti-parallel and form one arm. And two arms are connected in series and form one phase. The power converter shown in this embodiment has three phases. The voltage source 603 is connected in parallel with each phase and serves as a power supply source. The inductive load 604 is connected between the two arms forming each phase.

That is, the power converter of the present embodiment includes a plurality of switching elements (semiconductor device 601), a plurality of freewheeling diodes 602, and a voltage source 603, and the switching elements (semiconductor device 601) and freewheeling diode 602 are combined. They are connected in anti-parallel to form one arm, two of the arms are connected in series to form a phase, and the three phases are connected in parallel with the voltage source 603, and each of the three phases is connected. The semiconductor device of the present invention is applied to each of a plurality of switching elements (semiconductor device 601), which is a power conversion device in which an inductive load (motor) 604 is connected between the two arms.

Accordingly, it is possible to provide a power conversion device that can detect the temperature of the semiconductor device with high accuracy and low cost.

A semiconductor device according to a sixth embodiment of the present invention will be described with reference to FIG. FIG. 7 is a partial sectional view of the semiconductor device according to the present embodiment. In this embodiment, the structure of the semiconductor device is the same as that of the semiconductor device according to the first embodiment. As described above, when the temperature is detected using the semiconductor device provided by the present invention, for example, the potential of the emitter electrode 107 is changed in the state where the current source for flowing the current into the anode electrode 114 is connected to the anode electrode 114. It is described that a method such as measuring the potential of the anode electrode 114 with reference to

However, the method of temperature detection is not limited to the above method, and may be the method shown in FIG. 7, for example. In the embodiment shown in FIG. 7, a resistor 701 and a voltage source 702 are connected in series to the anode electrode 114.

Here, the resistance value of the resistor 701 is selected as a sufficiently large value as compared with the resistance value of the pn diode used for temperature detection. In this state, the potential of the anode electrode 114 is measured with the potential of the emitter electrode 107 as a reference. The resistance value of the pn diode used for temperature detection may change variously depending on the temperature of the semiconductor device. However, if the resistance value of the resistor 701 is sufficiently larger than that, the current supplied from the voltage source 702 to the pn diode may be changed. The size is mainly limited by the resistance 701 and can be regarded as a substantially constant value.

That is, with the method shown in this embodiment, a state equivalent to the case where a current source is connected to the anode electrode 114 can be obtained. In general, a voltage source can be prepared more easily and at a lower cost than a current source, and thus the temperature detection method shown in this embodiment is simple and useful.

It should be noted that the present invention is not limited to the above-described embodiments, but includes various modifications. For example, the above-described embodiments have been described in detail in order to explain the present invention in an easy-to-understand manner, and are not necessarily limited to those having all the configurations described. Further, a part of the configuration of a certain embodiment can be replaced with the configuration of another embodiment, and the configuration of another embodiment can be added to the configuration of a certain embodiment. Further, with respect to a part of the configuration of each embodiment, other configurations can be added/deleted/replaced.

101... N-type bulk layer 102... P-type channel layer 103... (First) trench 104... (First) gate electrode 105... N-type source region 106... P-type collector layer 107... Emitter electrode 108... Collector electrode 109 ... p-type carrier extraction layer 110 ... (second) trench 111 ... (second) gate electrode 112 ... p-type anode layer 113 ... n-type cathode layer 114 ... anode electrode 115 ... active region 116 ... carrier extraction region 117 ... Temperature detection unit 601... (Semiconductor device having temperature detection unit) 602... Reflux diode 603... Voltage source 604... Inductive load (motor)
701... Resistor 702... Voltage source

Claims (10)

A semiconductor device having an active region, a temperature detection unit, and a carrier extraction region formed between the active region and the temperature detection unit,
The active region includes a first conductive type first semiconductor layer,
A second semiconductor layer of the second conductivity type formed on the first surface of the first semiconductor layer;
A plurality of first trenches that extend from the surface of the second semiconductor layer to the first semiconductor layer through the second semiconductor layer;
A plurality of first gate electrodes each including a conductor formed inside the first trench and an insulating film formed around the conductor;
A third semiconductor layer of a first conductivity type formed adjacent to the first gate electrode on a surface of the second semiconductor layer;
A second semiconductor layer of the second conductivity type formed on the second surface of the first semiconductor layer;
An emitter electrode formed on the surfaces of the second semiconductor layer and the third semiconductor layer,
A collector electrode formed on the surface of the fourth semiconductor layer,
The carrier extraction region includes a fifth semiconductor layer of the second conductivity type, the surface of which is in contact with the emitter electrode.
The temperature detection unit includes a plurality of second trenches formed adjacent to the carrier extraction region,
A plurality of second gate electrodes configured to include a conductor formed inside the second trench and an insulating film formed around the conductor;
A second conductive type sixth semiconductor layer sandwiched between the plurality of second gate electrodes;
A seventh semiconductor layer of a first conductivity type formed adjacent to the second gate electrode on the surface of the fifth semiconductor layer, and in contact with the emitter electrode on the surface;
A semiconductor device, comprising: an anode electrode formed on the surface of the sixth semiconductor layer. The semiconductor device according to claim 1, wherein
The semiconductor device, wherein the fifth semiconductor layer in the carrier extraction region is adjacent to the active region and partially overlaps with the second semiconductor layer. The semiconductor device according to claim 1, wherein
The fifth semiconductor layer in the carrier extraction region is formed in the same process as the second semiconductor layer and has the same impurity concentration. The semiconductor device according to claim 1, wherein
A semiconductor device, wherein the first gate electrode and the second gate electrode are electrically connected to each other. The semiconductor device according to claim 1, wherein
A semiconductor device, wherein the first gate electrode and the second gate electrode are controllable independently of each other. The semiconductor device according to claim 1, wherein
The first gate electrode is a side gate type gate electrode configured to include a conductor formed to face a sidewall of the first trench and a bottom corner, and an insulating film formed around the conductor. Is a semiconductor device. The semiconductor device according to claim 1, wherein
The semiconductor device, wherein the first gate electrode is a trench gate type gate electrode that is formed so as to face a sidewall and a bottom of the first trench and fills the entire area of the first trench. .. The semiconductor device according to claim 1, wherein
Detecting the temperature of the semiconductor device by measuring the potential of the anode electrode with the potential of the emitter electrode as a reference in a state where a current source that directs a current to the anode electrode is connected to the anode electrode. A semiconductor device characterized by. The semiconductor device according to claim 1, wherein
A voltage source is connected in series to the anode electrode through a resistor having a resistance value larger than that of a pn diode formed in the temperature detection unit, and the anode electrode is based on the potential of the emitter electrode. A semiconductor device, wherein the temperature of the semiconductor device is detected by measuring the potential of the semiconductor device. Multiple switching elements,
A plurality of freewheeling diodes,
And a voltage source,
The switching element and the free wheeling diode are connected in anti-parallel to form one arm,
The two arms are connected in series to form a phase,
Three said phases each connected in parallel with said voltage source,
A power converter in which an inductive load is connected between the two arms of each of the three phases,
A power converter comprising the semiconductor device according to any one of claims 1 to 9 for each of the plurality of switching elements.

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