JP2020078627A - Game machine - Google Patents

Abstract

To provide a game machine capable of suitably driving a light-emitting device in the game machine including the light-emitting device, and element drive means for driving the light-emitting device.SOLUTION: A winning notification LED 37 is provided on a game board 20, and a voltage application circuit for applying voltage to the winning notification LED 37 is provided. The voltage application circuit is connected to a third drive IC via wiring, and applies voltage to the winning notification LED 37 based on input of a predetermined drive signal from the third drive IC. The winning notification LED 37 emits light when a state in which a drive signal is being outputted continues for a predetermined period.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a gaming machine.

  For example, some gaming machines such as pachinko machines are provided with a symbol display device having a display screen. For example, on the display screen of the pachinko machine, the symbols are variably displayed on the condition that the game ball passes through the operation opening provided in the game area, and an effect that enhances the interest of the game is performed, or a specific symbol is satisfied when a predetermined condition is satisfied. There is one that stops and displays, and teaches a special game state that is advantageous to a player such as a jackpot. As an effect that enhances the entertainment of the game, for example, there is a reach effect that is closely related to the jackpot and raises a player's expectation for the jackpot. In addition, in recent years, in order to further enhance the interest of the game, in addition to the symbols that are variably displayed for each game time, a character for production and the like are displayed and the reach effect is performed using this character, or displayed on the display screen. Ingenuity such as increasing the number of symbols has been made, and display effects are diversifying (for example, Patent Document 1).

JP 2001-218895 A

Here, in order to enhance the interest of the game, a light emitting element is provided in addition to the symbol display device, and a drive circuit as an element drive means for driving the light emitting element is mounted. The drive circuit is connected to a control device that controls the game, for example, via wiring, and causes a light emitting element to emit light when a control signal is input from the control device. The interest of the game is improved by the light emission.

  In such a configuration, for example, if noise is input to the drive circuit, the light emitting element malfunctions, which may give a misunderstanding to the player, and the intended game property may not be transmitted to the player.

  The above-mentioned problem is a problem common to gaming machines provided with a light emitting element and an element driving means for driving the light emitting element.

  The present invention has been made in view of the above-exemplified circumstances and the like, and in a gaming machine including a light emitting element and an element driving means for driving the light emitting element, a gaming machine capable of suitably driving the light emitting element. It is intended to provide.

The present invention is
A light emitting element that emits light to inform about the game,
Drive signal output means for outputting a predetermined drive signal according to the situation of the game,
Drive means for causing the light emitting element to emit light when the drive signal is output from the drive signal output means,
A wire that connects the drive signal output means and the drive means and transmits the drive signal;
Noise removing means for removing noise mixed in the drive signal,
In a gaming machine equipped with
The noise removing means is provided in the middle of the route of the wiring, and when the state in which the drive signal is being output from the drive signal output means is continued for a predetermined period, the drive signal is sent to the drive means. Equipped with transmission means for transmitting,
The drive signal output means can output the drive signal continuously for a longer period than a period for causing the light emitting element to emit light,
The gaming machine is
A grant determination means for determining whether or not to grant a privilege when a predetermined condition is satisfied,
When the determination result of the grant determination means is a grant corresponding result of granting a privilege, a privilege granting means capable of granting a privilege to the player,
Equipped with
A means for causing the drive signal output means to output the drive signal corresponding to causing the light emitting element to emit light in a predetermined specific mode when the determination result of the application determination means is the assignment correspondence result. It is characterized by having.

  According to the present invention, it is possible to preferably drive the light emitting element.

The front view which shows the pachinko machine in 1st Embodiment. The front view which shows the structure of a game board. The block diagram which shows the electric constitution of a pachinko machine. Explanatory drawing for demonstrating the display content in the display screen of a symbol display device. Explanatory drawing for demonstrating the display content in the display screen of a symbol display device. Explanatory drawing for demonstrating the content of various counters used for a winning/winning lottery. The flowchart which shows the timer interruption process in MPU of a main control apparatus. The flowchart which shows a normal process. The flowchart which shows a game time control process. The flowchart which shows a fluctuation|variation start process. The flowchart which shows a game state transfer process. The flowchart which shows a special winning opening opening and closing process. The block diagram which shows the electric constitution of a sound lamp control device. The circuit diagram of a data output circuit. FIG. 3 is a circuit diagram showing various circuits mounted on the LED board. The block diagram which shows the internal structure of a drive IC. 6 is a timing chart for explaining the operation of the drive IC. The circuit diagram of the winning notification circuit. The flowchart which shows the start-up process in an audio lamp control device. The flowchart which shows the audio|voice light emission control process in an audio lamp control device. The flowchart which shows the fluctuation|variation start process in an audio lamp control device. 6 is a timing chart for explaining a transmission mode of LED drive data. The flowchart which shows the process during a change in an audio lamp control device. 6 is a timing chart for explaining the operation of the winning notification LED. The block diagram which shows the internal structure of the drive IC in 2nd Embodiment. 6 is a flowchart showing an update process in the drive IC. The block diagram which shows the internal structure of the drive IC in 3rd Embodiment. 6 is a flowchart showing an update process in the drive IC. The circuit diagram of the LED drive part in a 4th embodiment. The circuit diagram of the winning notification circuit in the fifth embodiment. The flowchart which shows the confirmation process for reservation notice. The flowchart which shows a fluctuation|variation start process. The flowchart which shows a process during change. 6 is a timing chart for explaining the operation of the winning notification LED. The circuit diagram of the winning notification circuit in the sixth embodiment. The circuit diagram which shows the modification of the winning notification circuit.

<First Embodiment>
Hereinafter, a first embodiment of a pachinko gaming machine, which is a type of gaming machine (hereinafter referred to as "pachinko machine"), will be described with reference to the drawings. FIG. 1 is a front view of a pachinko machine 10.

  As shown in FIG. 1, the pachinko machine 10 has an outer frame 11 forming an outer shell of the pachinko machine 10 and a gaming machine body 12 rotatably attached to the outer frame 11 in a forward direction. .. The gaming machine main body 12 includes an inner frame (not shown), a front door frame 14 arranged in front of the inner frame, and a back pack unit (not shown) arranged behind the inner frame.

  The inner frame of the gaming machine body 12 is rotatably supported by the outer frame 11 with one of the left and right side portions being the support side. Further, the front door frame 14 is rotatably supported by the inner frame, and is rotatable forward with one of the left and right side portions being a support side. A back pack unit is rotatably supported by the inner frame, and is rotatable rearward with one of the left and right side portions being the support side.

  The gaming machine main body 12 is provided with a locking device (not shown) at its rotating front end, and has a function of locking the gaming machine main body 12 with respect to the outer frame 11 so that it cannot be opened. In addition, it has a function of locking the front door frame 14 against the inner frame so that it cannot be opened. Each of these locked states is released by performing an unlocking operation on the cylinder lock 17 exposed on the front surface of the pachinko machine 10 using an unlocking key.

  A game board 20 is mounted on the inner frame. Here, the configuration of the game board 20 will be described with reference to FIG. FIG. 2 is a front view of the game board 20.

  The game board 20 is formed with a plurality of large and small openings penetrating in the front-rear direction by being subjected to router processing. In each opening, a general winning opening 21, a variable winning device 22, an upper working opening (first starting ball entering section) 23, a lower working opening (second starting ball entering section) 24, a through gate 25, a variable display unit 26, The main display unit 33, the accessory display unit 34, and the like are provided respectively.

  When a ball enters the general winning opening 21, the variable winning device 22, the upper working opening 23, and the lower working opening 24, it is detected by a detection sensor (not shown) arranged on the back side of the game board 20, Based on the detection result, a predetermined number of prize balls are paid out.

  In addition, an outlet 27 is provided at the bottom of the game board 20, and game balls that have not entered various winning openings are discharged from the game area through the outlet 27. In addition, a large number of nails 28 are planted on the game board 20 in order to appropriately disperse and adjust the falling direction of the game balls, and various members (features) such as a wind turbine are provided.

  Here, the entry ball means that the game ball passes through a predetermined opening, and not only the aspect of being discharged from the game area after passing through the opening, but also discharging from the game area after passing through the opening. The mode which is not performed is also included. However, in the following description, in order to be clearly distinguished from the game ball entering the outlet 27, the game ball entering the variable winning device 22, the upper operating port 23, the lower operating port 24 or the through gate 25. Is also referred to as a prize.

  The upper working port 23 and the lower working port 24 are unitized as a working port device and installed on the game board 20. Both the upper working port 23 and the lower working port 24 are open upward. Further, the two working ports 23, 24 are arranged in the vertical direction so that the upper working port 23 faces upward. The lower working port 24 is provided with an electric accessory 24a as a guide piece (support piece) composed of a pair of left and right movable pieces. In the closed state (non-supported state or non-guided state) of the electric accessory 24a, the game ball cannot enter the lower working opening 24, and the electric working object 24a is in the open state (supported or guided state) so that the lower working opening is reached. It is possible to win 24 prizes.

  The variable winning device 22 is provided with a big winning opening 22a that leads to the back side of the game board 20, and an opening/closing door 22b that opens and closes the big winning opening 22a. The opening/closing door 22b is normally in a closed state in which the game balls cannot be won or it is difficult to win the prize, and when the internal lottery is successful in shifting to the open/close execution mode (open/close execution state), the game balls can be easily won. It can be switched to the open state. Here, the open/close execution mode is a mode to be shifted to when the jackpot is won. The opening/closing execution mode will be described later in detail. As an opening mode of the variable winning device 22, the variable winning device 22 is repeatedly opened with a predetermined time (for example, 30 seconds) or a predetermined number (for example, 10) of winnings as one round and a plurality of rounds (for example, 15 rounds) as an upper limit. There is a mode.

  The main display portion 33 and the accessory display portion 34 are provided on the decorative member 29 arranged along the outer edge of the lower side of the game area. The decorative member 29 extends from the board surface of the game board 20 to the front of the pachinko machine 10. More specifically, the front surface of the decorative member 29 faces the window panel 53 provided on the front door frame 14 in order to make the game area visible from the front of the pachinko machine 10, and further with the window panel 53. The distance between them is smaller than that of one game ball. This prevents the game balls from falling in front of the front surface of the decorative member 29.

  The main display portion 33 and the accessory display portion 34 are provided so as to be exposed from the front surface of the decorative member 29. That is, the main display portion 33 and the accessory display portion 34 are visible from the front of the pachinko machine 10 through the window panel 53 of the front door frame 14, and the front of both of the display portions 33 and 34 are game balls. It is prevented from falling.

  On the main display portion 33, the variable display of the pattern is performed with the winning of the upper operating opening 23 or the lower operating opening 24 as a trigger, and as a result of the stop of the variable display, the winning of the upper operating opening 23 or the lower operating opening 24 is achieved. The result of the internal lottery performed based on this is clearly displayed. That is, in the pachinko machine 10, the winning of the upper working opening 23 and the winning of the lower working opening 24 are not distinguished in the internal lottery, and the winning is performed based on the winning of the upper working opening 23 or the lower working opening 24. The result of the extracted internal lottery is clearly shown on the main display section 33 which is a common display area. When the result of the internal lottery based on the winning of the upper operating opening 23 or the lower operating opening 24 is the winning result corresponding to the shift to the opening/closing execution mode, the predetermined stop result is displayed on the main display unit 33. After it is displayed and the variable display is stopped, the mode is changed to the open/close execution mode.

  The main display unit 33 is composed of a segment display in which a plurality of segment light emitting units are arranged in a predetermined manner, but the present invention is not limited to this, and a liquid crystal display device, an organic EL display device, It may be configured by another type of display device such as a CRT or a dot matrix. In addition, as the pattern variably displayed on the main display portion 33, a configuration in which a plurality of types of characters are variably displayed, a configuration in which a plurality of types of symbols are variably displayed, a configuration in which a plurality of types of characters are variably displayed, or a plurality of types are displayed. A configuration in which the colors of the seeds are switched and displayed can be considered.

  On the accessory display unit 34, the variable display of the pattern is performed with the winning of the through-gate 25 as a trigger, and the result of the internal lottery performed based on the winning of the through-gate 25 is displayed as the stop result of the variable display. It is specified by the display. If the result of the internal lottery based on the winning in the through gate 25 is the winning result corresponding to the transition to the electric role open state, a predetermined stop result is displayed on the accessory display unit 34 and the variable display is displayed. After the power supply is stopped, the state changes to the electric power release state. In the electric role open state, the electric accessory 24a provided in the lower operation port 24 is opened in a predetermined manner.

  The variable display unit 26 is provided with a symbol display device 31 which variably displays (or variably or switches) a symbol which is a kind of symbol. Further, the variable display unit 26 is provided with a center frame 32 so as to surround the symbol display device 31. An upper portion of the center frame 32 extends forward of the pachinko machine 10. As a result, the game sphere is prevented from falling in front of the display screen of the symbol display device 31, and there is no inconvenience that the visibility of the display screen is reduced due to the fall of the game sphere. ..

  The symbol display device 31 is configured as a liquid crystal display device including a liquid crystal display, and the display content is controlled by a display control device described later. The symbol display device 31 is not limited to the liquid crystal display device, and may be another display device such as a plasma display device, an organic EL display device, or a CRT.

  On the symbol display device 31, the symbols are displayed side by side, for example, in the upper, middle and lower parts, and these symbols are variably displayed by scrolling in the left and right direction. In this case, the variable display on the symbol display device 31 is started based on the winning of the upper working opening 23 or the lower working opening 24. That is, when the variable display is performed on the main display unit 33, the variable display is performed on the symbol display device 31 accordingly. Then, for example, as the opening and closing execution mode, the special winning opening 22a of the variable winning device 22 is opened 15 times, and the game times that shift to the opening and closing execution mode corresponding to 15 rounds are preset in the symbol display device 31. A predetermined combination of symbols is stopped and displayed on the activated line.

  By the way, the variable display is started on the main display portion 33 and the symbol display device 31 based on the winning of any one of the operation ports 23, 24, and a predetermined stop result is displayed until the variable display is stopped. It is equivalent to one game.

  In the upper left portion on the front surface side of the center frame 32, a first display lamp section 35 corresponding to the main display section 33 and the pattern display device 31 is provided. The first holding lamp unit 35 is composed of LEDs. The maximum number of game balls that enter the upper working opening 23 or the lower working opening 24 is reserved up to 4, and the reserved quantity is displayed by turning on the first holding lamp section 35.

  In the upper right portion of the center frame 32, a second holding lamp section 36 corresponding to the accessory display section 34 is provided. The second holding lamp section 36 is composed of LEDs. The number of times the game ball has passed through the through gate 25 is reserved up to a maximum of four times, and the number of reservations is displayed by turning on the second holding lamp section 36. The function of each of the holding lamps 35 and 36 may be achieved by the display in a partial area of the symbol display device 31.

  Here, the gaming board 20 is provided with a winning notification LED 37 as a specific light emitting element. The winning notification LED 37 is arranged above the center frame 32. As described above, since the symbols are displayed in the symbol display device 31, the player's attention is easily attracted to the symbol display device 31 and the center frame 32. For this reason, it can be said that the winning notification LED 37 is installed at a location that is easily noticeable to the player (a location that is easily visible).

  The winning notification LED 37 is set to emit light when a privilege is given to the player, specifically, when a transition to the opening/closing execution mode (opening/closing execution state) is won. Thereby, the player can easily pay attention to the variable display mode of the symbol display device 31 and the light emission mode of the winning notification LED 37. As a result, the degree of attention to the game can be improved.

  In particular, the brightness of the winning notification LED 37 is set to be higher than that of the other lamp parts 35 and 36, and is set to be higher than the brightness related to the image display of the symbol display device 31. As a result, when the winning notification LED 37 emits light, it is possible to make the player visually recognize impact light. Therefore, it is possible to increase the degree of attention to the game through the effect that the winning notification LED 37 emits light. The configuration relating to the emission of the winning notification LED 37 will be described in detail later.

  An inner rail portion 41 and an outer rail portion 42 are attached to the game board 20, and the inner rail portion 41 and the outer rail portion 42 constitute a guide rail, which is mounted below the game board 20 in the inner frame. The game ball emitted from the game ball emission mechanism (not shown) is guided to the upper part of the game area. The game ball launching mechanism launches a game ball by operating the launch handle 51 provided on the front door frame 14.

  A front door frame 14 is provided so as to cover the entire front surface side of the inner frame. As shown in FIG. 1, the front door frame 14 is formed with a window portion 52 that allows almost the entire game area to be viewed from the front. The window 52 has a substantially elliptical shape, and the window panel 53 described above is fitted therein. Although the window panel 53 is made of glass to be colorless and transparent, it is not limited to this and may be made of synthetic resin to be colorless and transparent.

  Around the window 52, light emitting means such as various lamps are provided. A display lamp portion 54 is provided above the window portion 52 as a part of the various lamp portions. These various lamp units are composed of LEDs. Further, speaker units 55 are provided on the left and right sides of the display lamp unit 54 to output sound effects and the like according to the gaming state.

  Below the window portion 52 of the front door frame 14, an upper bulge portion 56 and a lower bulge portion 57 that bulge toward the front side are arranged in parallel vertically. An upper plate 56a that opens upward is provided inside the upper bulging portion 56, and a lower plate 57a that also opens upward is provided inside the lower bulging portion 57. The upper plate 56a has a function of temporarily storing the game balls dispensed from a dispenser, which will be described later, and guiding them to the game ball launching mechanism side while aligning them in a line. In addition, the lower plate 57a has a function of storing game balls that have become redundant in the upper plate 56a. The game balls paid out from the payout device mounted on the back pack unit are discharged to the upper plate 56a and the lower plate 57a.

  A main control unit, a voice lamp control unit, and a display control unit are mounted on the back side of the inner frame. Further, as described above, the back pack unit is provided on the back surface of the inner frame, and the back pack unit includes a payout mechanism section including a payout device, a payout control device, a power supply and a firing control device. Is installed. The electrical configuration of the pachinko machine 10 will be described below.

<Basic electrical configuration of the pachinko machine 10>
FIG. 3 is a block diagram showing a basic electrical configuration of the pachinko machine 10.

  The main control device 60 includes a main control board 61 that controls the main game, and a power failure monitoring board 65 that monitors the power supply. In the main controller 60, a trace means for leaving a trace of the opening or a trace structure for leaving a trace of the opening is provided to the substrate box that accommodates the main control substrate 61 and the like. You can Examples of the trace means include a structure of a joint portion (a caulking portion) that requires a plurality of case bodies that form the substrate box to be inseparably joined and that requires a predetermined portion to be broken during the separation, or an adhesive layer that is peeled off to attach an adhesive layer. It is conceivable that a sealing sticker that leaves a trace that it has been peeled off by being left behind is attached so as to straddle the boundary between a plurality of case bodies. Further, as the trace structure, a structure in which an adhesive is applied to a boundary between a plurality of case bodies forming the substrate box can be considered.

  An MPU 62 is mounted on the main control board 61. The MPU 62 includes a ROM 63 in which various control programs executed by the MPU 62 and fixed value data are stored, and a memory for temporarily storing various data in executing the control programs stored in the ROM 63. A RAM 64, an interrupt circuit, a timer circuit, a data input/output circuit, various counter circuits as a random number generator, etc. are built in.

  The MPU 62 is provided with an input port and an output port, respectively. To the input side of the MPU 62, the power failure monitoring board 65 and the payout controller 70 provided in the main controller 60 are connected. In this case, a power supply and a firing control device 80 having a function of supplying operating power is connected to the power failure monitoring board 65, and power is supplied to the MPU 62 via the power failure monitoring board 65.

  Further, various sensors such as various prize detection sensors 67a to 67e are connected to the input side of the MPU 62. The various winning detection sensors 67a to 67e are provided one-to-one with respect to the winning-corresponding ball portions such as the general winning opening 21, the variable winning device 22, the upper working opening 23, the lower working opening 24, and the through gate 25. A sensor is included, and the MPU 62 makes a winning determination (ball entry determination) to each ball entry portion. In addition, the MPU 62 executes a jackpot occurrence lottery based on the winning of the upper operating port 23 and the lower operating port 24, and also executes a support generating lottery based on the winning of the through gate 25.

  A power failure monitoring board 65, a payout control device 70, and a voice lamp control device 90 are connected to the output side of the MPU 62. To the payout control device 70, for example, a prize ball command is output based on the result of winning determination to the winning-corresponding winning ball portion. In this case, when outputting the prize ball command, the command information storage area 63d of the ROM 63 is referred to.

  Various commands such as a variation command, a type command, a variation end command, an opening command and an ending command are output to the voice lamp control device 90. In this case, when outputting these various commands, the command information storage area 63d of the ROM 63 is referred to. Details of these various commands will be described later.

  In addition, on the output side of the MPU 62, a variable winning a prize driving unit 22c that opens and closes the opening and closing door 22b of the variable winning device 22, an electric auditors product driving unit 24b that opens and closes an electric auditors product 24a of the lower working port 24, and a main display unit. 33 and the accessory display unit 34 are connected. Various driver circuits are provided on the main control board 61, and the MPU 62 executes drive control of various drive units through the driver circuits.

  That is, in the open/close execution mode, the MPU 62 executes drive control of the variable winning drive unit 22c so that the special winning opening 22a is opened and closed. When the electric accessory 24a is in the open state, the MPU 62 controls the driving of the electric accessory driving unit 24b so that the electric accessory 24a is opened and closed. Further, at each game time, the display control of the main display unit 33 is executed in the MPU 62. Further, in the case of clearly indicating the lottery result indicating whether or not the electric accessory 24a is to be opened, the display control of the accessory display unit 34 is executed in the MPU 62.

  The power failure monitoring board 65 relays between the main control board 61 and the power supply/launch control device 80, and also monitors the voltage of DC stable 24V which is the maximum voltage output from the power supply/launch control device 80. The payout control device 70 controls the payout device 71 to pay out prize balls or loan balls based on the prize ball command input from the main control device 60.

  The power supply and firing control device 80 is connected to, for example, a commercial power supply (external power supply) in a game arcade or the like. Then, based on the external power supplied from the commercial power source, the operating power necessary for each of the main control board 61 and the payout control device 70 is generated, and the generated operating power is supplied. In addition, the power supply and launch control device 80 is responsible for launch control of the game ball launch mechanism 81, and the game ball launch mechanism 81 is driven when predetermined launch conditions are satisfied.

  The audio lamp control device 90 is an LED board that controls the driving of various light emitting elements including the various lamp parts 35 and 36 provided on the game board 20, the winning notification LED 37 and the display lamp part 54 provided on the front door frame 14. The light emitting elements are connected to 91, and various light emitting elements are driven and controlled by outputting predetermined drive data to the LED substrate 91 based on various commands input from the main controller 60. In addition, the audio lamp control device 90 drives and controls the speaker unit 55 provided on the front door frame 14, and also controls the display control device 100. In the display control device 100, the display control of the symbol display device 31 is executed based on the command input from the voice lamp control device 90.

  Here, the display contents of the symbol display device 31 will be described with reference to FIGS. 4 and 5. FIG. 4 is a diagram showing individually the symbols variably displayed on the symbol display device 31, and FIG. 5 is a diagram showing a display screen G of the symbol display device 31.

  As shown in FIGS. 4(a) to 4(j), a design, which is a kind of design, is composed of nine types of main designs to which the numbers "1" to "9" are respectively attached and a shell-shaped design. It is composed of sub-patterns. More specifically, the numbers of "1" to "9" are respectively added to nine types of character designs such as octopus to constitute the main design.

  As shown in FIG. 5A, on the display screen G of the symbol display device 31, three symbol rows Z1, Z2, Z3 of the upper stage, the middle stage and the lower stage are set as a plurality of display areas. Each of the symbol rows Z1 to Z3 is configured by arranging a main symbol and a sub symbol in a predetermined order. Specifically, in the upper symbol row Z1, nine types of main symbols “1” to “9” are arranged in descending order of numbers, and one sub symbol is arranged between each main symbol. .. In the lower symbol row Z3, nine types of main symbols “1” to “9” are arranged in ascending order of the numbers, and one sub symbol is arranged between each main symbol.

  That is, the upper symbol row Z1 and the lower symbol row Z3 are composed of 18 symbols. On the other hand, in the middle symbol column Z2, nine kinds of main symbols "1" to "9" are arranged in ascending order of numbers, and then between the main symbol "9" and the main symbol "1". The main symbols of "4" are additionally arranged, and one sub symbol is arranged between each of the main symbols. That is, only in the middle symbol row Z2, 10 main symbols are arranged and configured by 20 symbols. Then, on the display screen G, the symbols in each of the symbol columns Z1 to Z3 are variably displayed so as to scroll in a predetermined direction with periodicity.

  As shown in FIG. 5B, on the display screen G, three symbols are stopped and displayed for each symbol row, and as a result, a total of 9 symbols of 3×3 are stopped and displayed. It is like this. Further, five effective lines, that is, a left line L1, a middle line L2, a right line L3, a right downward line L4, and a right upward line L5 are set on the display screen G. Then, the variable display is stopped in the order of the upper symbol row Z1 → the lower symbol row Z3 → the middle symbol row Z2, and all the symbol rows Z1 in a state in which a combination of symbols having the same numeral on any of the activated lines is formed. When the variable display of Z3 is finished, the jackpot moving image is displayed as the occurrence of a normal jackpot result or a 15R probability variation jackpot result described later.

  In this pachinko machine 10, the main symbol with an odd number (1, 3, 5, 7, 9) is equivalent to the "specific symbol", and if the 15R probability variation jackpot result occurs, the same specific symbol The combination is stopped and displayed. Further, the main symbols with even numbers (2, 4, 6, 8) are equivalent to "non-specific symbols", and when a normal jackpot result occurs, the same non-specific symbol combination is stopped and displayed. It

  Further, in the case of an explicit 2R certainty variation jackpot result described later, the variable display of all the symbol rows Z1 to Z3 ends with a predetermined symbol combination different from the same symbol combination formed, and thereafter, An explicit video is displayed.

  The manner of variable display of the symbols in the symbol display device 31 is not limited to the above, but is arbitrary, and the number of symbol columns, the direction of variable display of symbols in the symbol column, the number of symbols in each symbol column, etc. Can be changed as appropriate. The picture variably displayed on the picture display device 31 is not limited to the above-mentioned picture, and for example, only numbers may be variably displayed as the picture.

<About various counters and storage areas for reserved balls>
Next, the operation of the pachinko machine 10 configured as described above will be described.

  The MPU 62 uses various counter information in the game to perform jackpot occurrence lottery, display setting of the main display unit 33, symbol display setting of the symbol display device 31, display of the accessory display unit 34, and the like. Specifically, as shown in FIG. 6, a jackpot random number counter C1 used in a lottery for jackpot occurrence, and a jackpot type counter C2 used in determining a jackpot type such as a probability variation jackpot result or a normal jackpot result. In the reach random number counter C3 used for the reach generation lottery when the symbol display device 31 fluctuates, the random number initial value counter CINI used for setting the initial value of the jackpot random number counter C1, the main display portion 33 and the symbol display device 31. The fluctuation type counter CS that determines the fluctuation display time is used. Further, the electric accessory release counter C4 used for the lottery for determining whether or not the electric accessory 24a of the lower operation port 24 is in the power open state is used.

  Each of the counters C1 to C3, CINI, CS, and C4 is a loop counter in which 1 is added to the previous value each time it is updated, and after reaching the maximum value, it returns to 0. Each counter is updated at short time intervals, and the updated value is appropriately stored in the lottery counter buffer 64a set in a predetermined area of the RAM 64. Of these, in the lottery counter buffer 64a, the information corresponding to the jackpot random number counter C1, the jackpot type counter C2, and the reach random number counter C3 is obtained information storage when a winning is generated in the upper working opening 23 or the lower working opening 24. It is stored in the reserved ball storage area 64b as a means.

  The hold ball storage area 64b includes a hold area RE and an execution area AE. The holding area RE includes a first holding area RE1, a second holding area RE2, a third holding area RE3, and a fourth holding area RE4, and according to the winning history of the upper working opening 23 or the lower working opening 24. Numerical value information of the jackpot random number counter C1, the jackpot type counter C2, and the reach random number counter C3 stored in the lottery counter buffer 64a are stored in any of the holding areas RE1 to RE4 as holding information.

  In this case, in the first holding area RE1 to the fourth holding area RE4, when the winnings to the upper working opening 23 or the lower working opening 24 occur successively a plurality of times, the first holding area RE1→the second holding area RE1. Numerical information is stored in time series in the order of RE2→third holding area RE3→fourth holding area RE4. Since the four holding areas RE1 to RE4 are provided in this way, the winning history of the game balls to the upper working opening 23 or the lower working opening 24 can be held and stored up to a maximum of four. Further, the holding area RE is provided with a holding number storage area NA, and in order to specify the holding number storage area NA, the number of the winning history stored in the upper working opening 23 or the lower working opening 24 is held and stored. Information is stored.

  Note that the number that can be reserved and stored is not limited to four, and may be any number, and may be another number such as two, three, or five or more, or may be a single number.

  The execution area AE is an area for moving each value stored in the first holding area RE1 of the holding area RE when starting the variable display of the main display portion 33, and at the start of one game time. Based on various numerical information stored in the execution area AE, the judgment of win/fail is made.

  Each of the above counters will be described in detail.

  For details of each counter, the jackpot random number counter C1 is configured to be sequentially incremented by 1 in the range of 0 to 599, for example, and then returned to 0 after reaching the maximum value. In particular, when the jackpot random number counter C1 makes one round, the value of the random number initial value counter CINI at that time is read as the initial value of the jackpot random number counter C1. The random number initial value counter CINI is a loop counter similar to the jackpot random number counter C1 (value=0 to 599). The big hit random number counter C1 is regularly updated and is stored in the reserved ball storage area 64b of the RAM 64 at the timing when the game ball wins the upper working opening 23 or the lower working opening 24.

  The value of the random number for the big hit is stored as a win/loss table (win/win information group) in the win/win table storage area 63a as the win/win information group storage means in the ROM 63. As the win/loss table, a win/loss table for low probability mode (low probability win/loss information group) and a win/loss table for high probability mode (high probability win/loss information group) are set. That is, the pachinko machine 10 is set to the low-probability mode (low-probability state) and the high-probability mode (high-probability state) as the lottery modes in the win/loss lottery means.

  In the gaming state in which the win/loss table for the low-probability mode is referred to in the lottery, the number of random numbers that is a big hit is two. On the other hand, in the gaming state in which the high probability mode win/loss table is referred to in the above-mentioned lottery, the number of random numbers to be a big win is 20. If the winning probability in the high-probability mode is higher than that in the low-probability mode, the number of random numbers to be won is arbitrary.

  The jackpot type counter C2 is configured to be incremented by 1 in the range of 0 to 29, and returns to 0 after reaching the maximum value. The jackpot type counter C2 is regularly updated and is stored in the reserved ball storage area 64b of the RAM 64 at the timing when the game ball wins the upper working opening 23 or the lower working opening 24.

  In this pachinko machine 10, a plurality of jackpot results are set. These multiple jackpot results are (1) a mode of the opening/closing control of the variable winning device 22 in the opening/closing execution mode, (2) a lottery mode in the winning/losing lottery means after the opening/closing execution mode, and (3) a bottom A plurality of jackpot results are set by differentiating three conditions of the support mode in the electric accessory 24a of the operation port 24.

  As an aspect of the opening/closing control of the variable winning device 22 in the opening/closing execution mode, the high frequency is set so that the frequency of winning the variable winning device 22 from the start to the end of the opening/closing execution mode is relatively high. A frequency winning mode and a low frequency winning mode are set. Specifically, in the high-frequency winning mode, the special winning opening 22a is opened and closed 15 times (high-frequency use number) from the start to the end of the opening/closing execution mode, and one opening is 30 seconds (high-frequency time). ) Has elapsed or until the number of winnings to the special winning opening 22a reaches 10 (high frequency number). On the other hand, in the low frequency winning mode, the special winning opening 22a is opened and closed twice (the number of times of low frequency use) from the start to the end of the opening and closing execution mode, and one opening is 0.2 sec (low frequency time). Is continued or until the number of winnings to the special winning opening 22a becomes 6 (the number of low-frequency winnings).

  In the pachinko machine 10, when the firing handle 51 is being operated by the player, the game ball firing mechanism 81 is drive-controlled so that one game ball is fired toward the game area in 0.6 sec. .. On the other hand, in the low frequency winning mode, as described above, the opening time of the special winning opening 22a is 0.2 sec. That is, in the low frequency winning mode, the opening time of the special winning opening 22a once is shorter than the firing cycle of the game ball. Therefore, in the opening/closing execution mode according to the low frequency winning mode, the winning of the game ball does not substantially occur.

  The number of times the special winning opening 22a is opened/closed in the high frequency winning mode and the low frequency winning mode, the opening limit time (or opening limit period) for one opening, and the opening limit number for one opening are the same as those of the high frequency winning mode. The value is not limited to the above value as long as the frequency of winning the variable winning device 22 from the start to the end of the opening/closing execution mode is higher than that of the low frequency winning mode. It is optional. Specifically, the high-frequency winning mode has a larger number of opening and closing times than the low-frequency winning mode, and if the opening limit time for one opening is long or the opening limit number for one opening is set to be large. Good.

  However, in order to clarify the difference in privilege between the high-frequency winning mode and the low-frequency winning mode, in the opening/closing execution mode of the low-frequency winning mode, the winning of the variable winning device 22 does not substantially occur. It is good to have a configuration. For example, in the high-frequency winning mode, the product of the game cycle of the game ball and the opening limit number is set shorter than the opening time limit for one opening, while in the low-frequency winning mode, the opening is set for one opening. The product of the game cycle of the game ball and the release limit number may be set to be longer than the release limit time. Further, even if the interval between the game balls is shot and the opening time of one big winning opening 22a is not the above, in the low frequency winning mode, by setting the latter to be shorter than the former, It is possible to easily realize a configuration in which substantially no prize is won in the variable winning device 22.

  As a support mode of the lower working port 24 in the electric accessory 24a, when compared in a situation where the game balls are continuously emitted in a similar manner to the game area, the electric working object 24a in the lower working port 24 is Low-frequency support mode (low-frequency support state or low-frequency guide state) and high-frequency support mode (high-frequency support state or high-frequency guide state) so that the frequency of the open state per unit time is relatively high or low. And are set.

  Specifically, in the low-frequency support mode and the high-frequency support mode, the probability that the electric role open state wins in the electric role open lottery using the electric role open counter C4 is the same (for example, both are 4/5). However, in the high frequency support mode, the number of times the electric accessory 24a is in the open state when the electric role is released is set to be larger than in the low frequency support mode, and one more opening is performed. The time is set long. In this case, in the high-frequency support mode, when the electric power open state is won, and the electric accessory 24a is opened a plurality of times, it is closed from the end of one open state to the start of the next open state. The time is set shorter than one opening time. Furthermore, the high-frequency support mode is shorter than the low-frequency support mode in that the minimum secured time required for the next electric accessory release lottery after one electric accessory release lottery is performed is shorter. Is set to be selected.

  As described above, in the high frequency support mode, there is a higher probability that a prize will be awarded to the lower working opening 24 than in the low frequency support mode. In other words, in the low frequency support mode, the probability of winning a prize in the upper working opening 23 is higher than in the lower working opening 24, but in the high frequency support mode, the winning in the lower working opening 24 is higher than that in the upper working opening 23. The probability of winning a prize increases. Then, when a prize is given to the lower working opening 24, a predetermined number of game balls are paid out, so in the high-frequency support mode, the player plays the game while not reducing the number of balls that he holds. be able to.

  The configuration for increasing the frequency of the high frequency support mode being in the electric role open state per unit time is higher than that of the low frequency support mode is not limited to the above-mentioned one. It is also possible to adopt a configuration in which the probability of winning the electric role open state in is increased. In addition, a securing time that is secured when the next electric accessory release lottery is performed after one electric accessory release lottery is performed (for example, in the accessory display unit 34 based on the winning of the through gate 25). In a configuration in which multiple types of variable display time) are prepared, the high-frequency support mode is set so that a shorter securing time is easier to select or the average securing time is shorter than in the low-frequency support mode. It may have been done. Furthermore, the number of times of opening is increased, the opening time is increased, and the securing time that is secured when the next electric accessory release lottery is performed after one electric accessory release lottery is performed (that is, , Shortening one time variable display time on the accessory display 34), shortening the average time of the securing time and increasing the winning probability, any one condition or a condition of any combination is applied. Therefore, the advantage of the high frequency support mode over the low frequency support mode may be increased.

  The distribution destination of the game result to the jackpot type counter C2 (that is, the lottery result by the winning/discarding lottery and the sorting lottery) is a distribution table (sorting information) Group). And as such a distribution destination, a normal jackpot result (low probability corresponding special game result), an explicit 2R certainty variation jackpot result (explicit high probability corresponding game result or a result that suddenly becomes a certainty variation state), and 15R certainty variation jackpot result (high probability) Corresponding special game result) is set.

  The normal jackpot result is a jackpot result in which the opening/closing execution mode becomes the high frequency winning mode, and after the opening/closing execution mode ends, the winning/winning lottery mode becomes the low probability mode and the support mode becomes the high frequency support mode. However, the high frequency support mode shifts to the low frequency support mode when the number of games reaches the end reference number (specifically, 100 times) after the shift. In other words, the normal jackpot result is a jackpot result of shifting the game state to the normal jackpot state (low probability corresponding special game state).

  The explicit 2R probability variation jackpot result is a jackpot result in which the opening/closing execution mode becomes the low-frequency winning mode, and after the opening/closing execution mode ends, the winning/winning lottery mode becomes the high-probability mode and the support mode becomes the high-frequency support mode. .. These high-probability mode and high-frequency support mode are continued until the lottery result in the winning/winning lottery is a big hit state winning and the big hit state is brought about. In other words, the explicit 2R certainty variation jackpot result is a jackpot result of shifting the gaming state to the explicit 2R certainty variation jackpot state (explicit high probability corresponding gaming state).

  The 15R probability variable jackpot result is a jackpot result in which the opening/closing execution mode becomes the high-frequency winning mode, and after the opening/closing execution mode ends, the winning/winning lottery mode becomes the high-probability mode and the support mode becomes the high-frequency support mode. These high-probability mode and high-frequency support mode are continued until the lottery result in the winning/winning lottery is a big hit state winning and the big hit state is brought about. In other words, the 15R certainty variation jackpot result is a jackpot result of shifting the gaming state to the 15R certainty variation jackpot state (high probability corresponding special gaming state).

  The normal game state in relation to each of the above-mentioned game states means a state in which the winning/winning lottery mode is the low-probability mode and the support mode is the low-frequency support mode.

  In the distribution table, among the values of the jackpot type counter C2 of “0 to 29”, “0 to 9” correspond to the normal jackpot result, and “10 to 14” correspond to the explicit 2R certainty variation jackpot result. "15-29" corresponds to the 15R probability variation jackpot result.

  As described above, since the explicit 2R probability variation jackpot result is set as the probability variation jackpot result, the manner of the probability variation jackpot result is diversified. That is, when comparing two types of probability variation jackpot results, the degree of advantage for the player is that the 15R probability variation jackpot result is the highest in the high-frequency winning mode in the opening/closing execution mode and the high frequency support mode in the support mode. In the support mode, which is the low-frequency winning mode, the high-frequency support mode is the high-frequency support mode. As a result, the monotony of the game can be suppressed, and the attention of the game can be increased.

  As a kind of probability variation jackpot result, the opening/closing execution mode becomes the low frequency winning mode, and after the opening/closing execution mode ends, the win/loss lottery mode becomes the high-probability mode and the support mode is maintained to the previous mode. The non-explicit 2R certainty variation jackpot result (the result of the non-explicit high probability corresponding game result or the latent probability variation state) may be included. In this case, the probability variation jackpot result is further diversified.

  Furthermore, as a kind of the miss result in the win/win lottery, a special miss result which does not occur in the win/win lottery mode and the support mode after the transition to the opening/closing execution mode of the low frequency winning mode may be included. .. In the configuration in which both the implicit 2R probability variation jackpot result and the special outlying result are set as described above, the opening/closing execution mode shifts to the low frequency winning mode, and the support mode is maintained to the previous mode. It is common to be done, but because the transition mode of the win/loss lottery mode is different, for example, when one of the implicit 2R certainty variation jackpot result or special outlier result occurs in the normal gaming state, It is possible to make the player predict which result actually corresponds to.

  The reach random number counter C3 is configured to be sequentially incremented by 1 in the range of 0 to 238, for example, and then returned to 0 after reaching the maximum value. The reach random number counter C3 is regularly updated and is stored in the reserved ball storage area 64b of the RAM 64 at the timing when the game ball wins the upper working opening 23 or the lower working opening 24.

  Here, in the pachinko machine 10, an expected effect is set as a kind of display effect in the symbol display device 31. The expected effect is provided with a symbol display device 31 capable of performing variable display (or variable display) of symbols (patterns), and variable display at the game time when the open/close execution mode of the variable winning device 22 is the high frequency winning mode. In the gaming machine in which the subsequent stop display result is the special display result, the variable display (or variable display) of the symbol (pattern) on the symbol display device 31 is started, and then the stop display result is derived and displayed. It is a display state for making the player think that it is a variable display state in which a special display result is likely to occur.

  Two types of expected display are set: the reach display and a notice display for expecting the reach display or the special display result in a stage before the reach display occurs.

  In the reach display, the symbols are stopped and displayed for a part of the symbol rows displayed on the display screen of the symbol display device 31, so that a combination of the jackpot symbols corresponding to the occurrence of the high frequency winning mode can be obtained. It includes a display state in which reach symbol combinations that may be established are displayed, and variable display of symbols is displayed in the remaining symbol columns in that state. In addition, while displaying the combination of reach symbols as described above, while performing variable display of the symbols in the remaining symbol columns, and by performing a reach effect by displaying a predetermined character or the like as a moving image on the background screen, , Which includes reducing or displaying a combination of reach symbols and displaying a predetermined character or the like as a moving image on substantially the entire display screen to perform a reach effect.

  Regarding the reach display related to the variable display of the symbols, specifically, as a step before ending the variable display of the symbols, on the preset effective line in the display screen of the symbol display device 31, the occurrence of the high frequency winning mode is generated. A reach line is formed by stopping and displaying the reach symbol combination in which the corresponding jackpot symbol combination may be established, and the variable display of the symbol is displayed by the final stop symbol row in the situation where the reach line is formed. Is to do.

  Explaining the display contents of FIG. 5 in detail, first, the variable display of symbols is finished in the upper symbol row Z1, and the variable display of symbols is finished in the lower symbol row Z3. Reach lines are formed by stopping and displaying the main symbols having the same numbers on the lines L1 to L5, and in the situation where the reach lines are formed, variable display of symbols is displayed in the middle symbol row Z2. Reach display will be given. Then, when the high-frequency winning mode occurs, the main symbol with the same number as the main symbol forming the reach line is stopped and displayed on the reach line, and in the middle symbol row Z2. The variable display of symbols is ended.

  The notice display is a situation in which the symbols are variably displayed in all the symbol columns Z1 to Z3 after the variable display of the symbols is started on the display screen of the symbol display device 31, or a part of the symbol columns. In a situation in which the symbols are variably displayed in a plurality of symbol columns, a mode in which the character is displayed separately from the symbols on the symbol columns Z1 to Z3 is included. Further, the background screen may be a predetermined mode different from the previous modes, and the symbols on the symbol rows Z1 to Z3 may be predetermined modes different from the previous modes. Such advance notice display can occur in both game times when the reach display is performed and when the reach display is not performed, but the reach display is higher than the case where the reach display is not performed. It is set to occur with a probability.

  The reach display is executed irrespective of the value of the reach random number counter C3 in the game game in which the open/close execution mode is entered. Further, in the game times that do not shift to the open/close execution mode, the reach random number counter C3 acquired at a predetermined timing corresponds to the occurrence of the reach display by referring to the reach table stored in the reach table storage area of the ROM 63. Is executed if On the other hand, the decision as to whether or not to display the advance notice is made in the display control device 100, not in the main control device 60. This will be described in detail later.

  The fluctuation type counter CS is configured to be incremented by 1 in order within the range of 0 to 198, for example, and then returns to 0 after reaching the maximum value. The variation type counter CS is used in determining the variation display time on the main display portion 33 and the variation display time of the symbol on the symbol display device 31 in the MPU 62. The variation type counter CS is updated once every time a normal process described below is executed once, and is repeatedly updated within the remaining time in the normal process. Then, the buffer value of the fluctuation type counter CS is acquired when the fluctuation display is started on the main display portion 33 and the fluctuation pattern is determined by the symbol display device 31 at the start of the fluctuation of the symbol.

  The electric accessory release counter C4 is configured so that, for example, it is sequentially incremented by 1 in the range of 0 to 250, and then returns to 0 after reaching the maximum value. The electric accessory release counter C4 is regularly updated, and is stored in the electricity reserve area 64c of the RAM 64 at the timing when the game ball wins the through gate 25. Then, at a predetermined timing, a lottery is performed on whether or not the electric accessory 24a is controlled to the open state by the stored value of the electric accessory release counter C4.

  As already described, the MPU 62 uses at least the buffer value of the fluctuation type counter CS to determine the fluctuation display time in the main display section 33. When determining the fluctuation display time, the fluctuation display time table storage area 63c of the ROM 63 is used. Be done.

<Various processes executed by main controller 60>
Next, the timer interrupt process and the normal process executed by the MPU 62 in the main controller 60 to advance the game at each game time will be described. In addition to the timer interrupt process and the normal process, the MPU 62 executes a main process that is started when the power is turned on and an NMI interrupt process that is started when a power failure signal is input to the NMI terminal (non-maskable terminal). However, description of these processes is omitted.

<Timer interrupt processing>
First, the timer interrupt processing will be described with reference to the flowchart of FIG. This processing is activated by the MPU 62 periodically (for example, in a cycle of 2 msec).

  In step S101, reading processing of various detection sensors is executed. The reading process includes a process of reading the states of the various winning detection sensors 67a to 67e, determining the states of the various winning detection sensors 67a to 67e, and storing the winning detection information.

  After the reading process is executed in step S101, the process proceeds to step S102. In step S102, the random number initial value counter CINI is updated. Specifically, the random number initial value counter CINI is incremented by 1, and is cleared to 0 when the counter value reaches the maximum value. Then, the updated value of the random number initial value counter CINI is stored in the corresponding buffer area of the RAM 64.

  In a succeeding step S103, the jackpot random number counter C1, the jackpot type counter C2, the reach random number counter C3, and the electric accessory release counter C4 are updated. Specifically, the jackpot random number counter C1, the jackpot type counter C2, the reach random number counter C3, and the electric accessory release counter C4 are each incremented by 1, and when they reach their maximum values, they are cleared to 0. Then, the updated values of the counters C1 to C4 are stored in the corresponding buffer areas of the RAM 64.

  In a succeeding step S104, a through winning process associated with winning in the through gate 25 is executed. In the through winning process, when the winning to the through gate 25 has been generated, the number of stored accessory holdings stored in the electric hand holding area 64c is less than the upper limit number (for example, "4"). Under the condition, the value of the electric accessory release counter C4 updated in step S103 is stored in the electric accessory holding area 64c. Further, the voice lamp control device 90 is subjected to processing for turning on the second holding lamp section 36 of the variable display unit 26 corresponding to the number of stored accessory holdings.

  In a succeeding step S105, a winning process for the working opening associated with the winning in the upper working opening 23 or the lower working opening 24 is executed. In the winning process for the working opening, if a winning has occurred in the upper working opening 23 or the lower working opening 24, the number of start pending memories stored in the reserved ball storage area 64b is the upper limit number (for example, " 4”), the values of the big hit random number counter C1, the big hit type counter C2, and the reach random number counter C3 updated in step S103 are stored in the holding area RE of the holding ball storage area 64b. In this case, it is stored in the first holding area among the empty holding areas RE1 to RE4 of the holding area RE, that is, in the holding area corresponding to the current starting holding storage number. Further, the voice lamp control device 90 is subjected to a process for turning on the first holding lamp section 35 of the variable display unit 26 corresponding to the number of starting holding memories. After the processing of step S105 is executed, the timer interrupt processing ends.

<Normal processing>
Next, the flow of normal processing will be described with reference to the flowchart of FIG. The normal process is a process that is started after the main process started when the power is turned on is executed, and the main process of the game is executed in the normal process. As an outline thereof, the processing of steps S201 to S207 is executed as a regular processing of a cycle of 4 msec, and the counter updating processing of steps S209 and S210 is executed in the remaining time.

  In the normal process, in step S201, output data such as a command set in the timer interrupt process or the previous normal process is transmitted to each sub-side control device. Specifically, the presence/absence of a prize ball command is determined, and if the prize ball command is set, it is transmitted to the payout control device 70. Further, when a production command such as a variation command, a type command, or a variation end command is set, it is transmitted to the voice lamp control device 90.

  In a succeeding step S202, the fluctuation type counter CS is updated. Specifically, the variation type counter CS is incremented by 1, and when the counter value reaches the maximum value, the counter value is cleared to 0. Then, the updated value of the fluctuation type counter CS is stored in the corresponding buffer area of the RAM 64.

  In a succeeding step S203, a game time control process for controlling a game in each game time is executed. In this game time control processing, jackpot determination, setting of variable display of symbols by the symbol display device 31, display control of the main display unit 33, and the like are performed. Details of the game number control process will be described later.

  Then, in step S204, a game state transition process for shifting the game state is executed. Although the details will be described later, the game state shift processing shifts the game state to the open/close execution mode, the high probability mode, the high frequency support mode, or the like.

  In a succeeding step S205, an electric power combination support process for driving and controlling the electric accessory 24a provided in the lower operation port 24 is executed. In this electric power support processing, the information stored in the electric power holding area 64c of the RAM 64 is used to determine whether to open the electric accessory 24a, the opening/closing process of the electric accessory 24a, and the accessory use. The display of the display unit 34 is controlled.

  Then, in step S206, a game ball firing control process is executed. In the game ball launch control process, the solenoid of the game ball launch mechanism 81 is excited once in a predetermined period (for example, 0.6 sec) on condition that a launch permission signal is input from the power supply and the launch control device 80. .. As a result, the game ball is launched toward the game area.

  In a succeeding step S207, it is determined whether or not the power failure flag is stored in the RAM 64. The power failure flag is a flag that is stored when the occurrence of power failure is confirmed in the power failure monitoring board 65 and a power failure signal is input from the power failure monitoring board 65 to the NMI terminal of the MPU 62, and is erased in the next main processing.

  If the power failure flag is not stored, it means that the last process of the plurality of processes to be repeatedly executed has been completed, so whether or not the execution timing of the next normal process is reached in step S208, that is, the previous normal process is executed. It is determined whether a predetermined time (4 msec in this embodiment) has elapsed from the start of the process. Then, the random number initial value counter CINI and the variation type counter CS are repeatedly updated within the remaining time until the execution timing of the next normal process.

  That is, in step S209, the random number initial value counter CINI is updated. Specifically, the random number initial value counter CINI is incremented by 1, and is cleared to 0 when the counter value reaches the maximum value. Then, the updated value of the random number initial value counter CINI is stored in the corresponding area of the RAM 64. In step S210, the fluctuation type counter CS is updated. Specifically, the fluctuation type counter CS is incremented by 1, and when the counter values reach their maximum values, they are cleared to 0. Then, the updated value of the fluctuation type counter CS is stored in the corresponding area of the RAM 64.

  On the other hand, if it is determined in step S207 that the power failure flag is stored, it means that the power supply has been cut off, and therefore the processing at the time of power failure after step S211 is executed. That is, in step S211, the generation of timer interrupt processing is prohibited, after that, in step S212, the RAM determination value is calculated and stored, and in step S213, the access to the RAM 64 is prohibited, and then the power is completely cut off to perform processing. Continue infinite loop until can no longer be executed.

<Game time control processing>
Next, the game number control process of step S203 will be described with reference to the flowchart of FIG.

  In the game time control process, first in step S301, it is determined whether or not the opening/closing execution mode is in effect. Specifically, it is determined whether or not the open/close execution mode flag is stored in the open/close execution mode flag storage area in the various flag storage areas 64e of the RAM 64. The opening/closing execution mode flag is stored when the game state is changed to the opening/closing execution mode in the game state transition process described later, and is erased when the opening/closing execution mode is also ended in the game state transition process.

  When in the open/close execution mode, this game is executed without executing any of the processing from step S302, that is, the processing for starting game times in steps S303 to S305 and the processing for advancing game times in steps S306 to S309. The turn control process ends. That is, in the open/close execution mode, the game game is not started regardless of whether or not a prize has been paid to the operating ports 23, 24.

  When it is not in the open/close execution mode, it is determined in step S302 whether or not the main display unit 33 is in the variable display. This determination is performed by determining whether or not the variable display flag is stored in the variable display flag storage area in the various flag storage area 64e of the RAM 64. The variable display flag is stored when the variable display is started on the main display unit 33, and is erased when the variable display ends.

  If the main display portion 33 is not in the variable display, the process proceeds to the game times start process of steps S303 to S305. In the process for starting game times, first in step S303, the number-of-holding storage area NA of the holding ball storage area 64b is referred to, and whether or not the number N of startup holding storages, which is the number of pieces of holding information held and stored, is "0". To determine. The case where the number N of startup pending storages is "0" means that the pending information is not stored in the reserved ball storage area 64b. Therefore, this game time control processing is ended as it is. If the number N of startup pending memories is not "0", a data setting process is executed in step S304.

  In the data setting process, first, the start pending storage number N is subtracted by 1. Further, the data stored in the first holding area RE1 of the holding area RE in the holding ball storage area 64b is moved to the execution area AE. Then, the process of shifting the data stored in each of the holding areas RE1 to RE4 of the holding area RE is executed. This data shift process is a process of sequentially shifting the data stored in the first holding area RE1 to the fourth holding area RE4 to the lower area side, and clears the data in the first holding area RE1 and The data in each area is shifted in the order of holding area RE2→first holding area RE1, third holding area RE3→second holding area RE2, fourth holding area RE4→third holding area RE3.

  In the data setting process, a process for making the voice lamp controller 90 recognize that the holding information has been shifted and changing the display on the first holding lamp unit 35 in correspondence with the decrease in the number of holdings is executed. To do.

  After executing the data setting process, the variation start process is executed in step S305, and then the present game number control process is ended. Here, the fluctuation start process will be described with reference to the flowchart of FIG.

  In step S401, a win/fail judgment process is executed. In the win/loss determination process, it is first determined whether or not the win/loss lottery mode is the high-probability mode. In the high probability mode, by referring to the high probability mode win/loss table among the tables stored in the win/loss table storage area 63a, the win/failure determination information among the information stored in the execution area AE, that is, It is determined whether or not the value of the jackpot random number counter C1 matches the jackpot numerical value information for high probability. Further, in the low probability mode, the value related to the jackpot random number counter C1 stored in the execution area AE is referred by referring to the low probability mode win/loss table stored in the win/loss table storage area 63a. It is determined whether or not is in agreement with the jackpot numerical information for low probability.

  In a succeeding step S402, it is determined whether or not the result of the win/loss determination process in step S401 is a jackpot winning result. If it is a jackpot winning result, type determination processing is executed in step S403.

  In the type determination processing, the information for type determination, that is, the information related to the jackpot type counter C2 among the information stored in the execution area AE is grasped. Then, by referring to the distribution table stored in the distribution table storage area 63b, it is specified which big hit type the information related to the grasped big hit type counter C2 corresponds to.

  In a succeeding step S404, it is determined whether or not the jackpot type identified in the type determining process of the step S403 corresponds to the probability variation jackpot result. When it corresponds to the probability variation jackpot result, it is determined in step S405 whether or not the jackpot type corresponds to the 15R probability variation jackpot result.

  If the result is the 15R certainty variation jackpot result, the stop result setting process for the 15R certainty variation jackpot is executed in step S406. If the 15R certainty variation jackpot result is not the 15R certainty variation jackpot result, the 2R certainty variation jackpot is explicitly specified in step S407. The stop result setting process for the. If the probability variation jackpot result is not the result (step S404: NO), a normal jackpot stop result setting process is executed in step S408. Furthermore, when it is determined that the result of the win/no determination process in step S401 is not the jackpot winning result, a stop result setting process for out-of-coupling is executed in step S409.

  In the stop result setting process of steps S406 to S409, the information of the mode of the picture finally stopped and displayed on the main display unit 33 is specified from the information stored in advance in the ROM 63, and the specified information is stored in the RAM 64. To do. In addition, in step S406, step S407 and step S408, the RAM 64 provides information for identifying the MPU 62 that the hit determination result of this game time is the 15R certainty variation jackpot result, the explicit 2R certainty variation jackpot result or the normal jackpot result. To store. Specifically, the 15R probability variation flag is stored in step S406, the explicit 2R probability variation flag is stored in step S407, and the normal jackpot flag is stored in step S408.

  After executing any one of steps S406 to S409, a variable display time setting process is executed in step S410.

  In this process, the value of the fluctuation type counter CS stored in the fluctuation type counter buffer in the lottery counter buffer 64a of the RAM 64 is acquired. In addition, it is determined whether or not the reach display is generated on the symbol display device 31 at the current game time. Specifically, it is determined whether or not the RAM 64 stores either the 15R probability variation flag, the explicit 2R probability variation flag, or the normal jackpot flag. If any of the flags is stored, it is determined that the reach display is generated. Even if none of the above flags are stored, if the value related to the reach random number counter C3 stored in the execution area AE is a value corresponding to the occurrence of reach, the reach display is displayed. Determined to occur.

  If it is determined that the reach display is generated, the reach display change display time table stored in the change display time table storage area 63c of the ROM 63 is referred to, and the change display corresponding to the value of the present change type counter CS is displayed. The time information is acquired, and the variation display time information is set in the variation display time counter (variation display time measuring means) provided in various counter areas 64d of the RAM 64. On the other hand, when it is determined that the reach display does not occur, the variable display time table for reach non-occurrence stored in the variable display time table storage area 63c is referred to, and the value of the current variation type counter CS is dealt with. The variable display time is acquired, and the variable display time information is set in the variable display time counter.

  The variable display time information when the reach is not generated is set so that the variable display time becomes shorter as the number N of start pending memories increases. In addition, when the support mode is the high-frequency support mode, compared with the case where the support frequency is the low-frequency support mode, the reach non-reach time is selected so that a shorter variable display time is selected, compared with the case where the number of hold information is the same. The variable display time table for generation is set. However, the present invention is not limited to this, and a configuration in which the variable display time does not vary according to the number N of start-up holding balls or the support mode may be adopted, and the above relationship may be reversed. Further, the above configuration may be applied to the variable display time when the reach occurs. In addition, a variable display time table is set for each of the 15R probability variable jackpot result, the explicit 2R probability variable jackpot result, the normal jackpot result, the missed reach condition, and the complete missed condition. Good. In this case, the variable display time is distributed according to each game result.

  After the variable display time setting process is executed in step S410, the fluctuation command and the type command are set in step S411. The variation command includes information regarding whether or not reach has occurred and information regarding variation display time. Further, the type command includes information on the game result. That is, the type command includes, as the information on the game result, information on the 15R certainty variation jackpot result, information on the explicit 2R certainty variation jackpot result, information on the normal jackpot result, information on the outlier result, and the like.

  The variation command and the type command set in step S411 are transmitted to the voice lamp control device 90 in step S201 in the normal process (FIG. 8). The voice lamp control device 90 determines a light emission pattern of the display lamp section 54 and a sound output pattern from the speaker section 55 in the game time based on the received variation command and type command, and the content of the determined effect. The display lamp unit 54 and the speaker unit 55 are controlled so that Further, the voice lamp control device 90 transmits the variation command and the type command to the display control device 100 while maintaining the information form. In the display control device 100, based on the received command for variation and the type command received, the variable display pattern on the symbol display device 31 in the game is determined, and the symbol display device 31 is executed so that the variable display pattern is executed. Display control. The specific content of the display control will be described later.

  After executing the process of step S411, the variable display of the pattern is started on the main display unit 33 in step S412. Then, this fluctuation start process is terminated.

  Returning to the explanation of the game time control process (FIG. 9 ), when the main display portion 33 is in the variable display, the game time progress process of steps S306 to S309 is executed.

  In the game time progression process, first in step S306, it is determined whether or not the variation display time of the current game time has elapsed. Specifically, it is determined whether or not the value of the variable display time information stored in the variable display time counter of the RAM 64 has become “0”. The value of the variable display time information is set in the variable display time setting process (step S410) as described above. Further, the value of the set variable display time information is decremented by 1 each time the timer interrupt process (FIG. 7) is started.

  If the variable display time has not elapsed, the variable display process is executed in step S307. In the variable display process, the display mode on the main display unit 33 is changed. Then, this game time control processing is ended.

  If the variation display time has elapsed, variation end processing is executed in step S308. In the fluctuation ending process, the information stored in the RAM 64 in any of the processes of step S406 to step S409 is specified, and the main display section 33 displays the pattern corresponding to the information. The display of the unit 33 is controlled.

  In a succeeding step S309, a fluctuation end command is set. The set fluctuation end command is transmitted to the voice lamp control device 90 in step S201 in the normal process (FIG. 8). The voice lamp control device 90 transmits the received fluctuation end command to the display control device 100 while maintaining its information form. In the display control device 100, by receiving the variation end command, the final stop symbol combination in the game time is confirmed and displayed (final stop display). Then, this game time control processing is ended.

<Game state transition processing>
Next, the game state transition processing of step S204 will be described with reference to the flowchart of FIG.

  First, in step S501, it is determined whether the open/close execution mode is in effect. If it is not in the opening/closing execution mode, the process proceeds to step S502, and it is determined whether or not it is the timing when the variable display of the pattern on the main display portion 33 of one game time is finished. If it is not the timing when the variable display is finished, the game state transition processing is finished as it is.

  If it is the timing when the variable display is finished, it is determined in step S503 whether or not the game result of the current game time corresponds to the shift to the open/close execution mode. Specifically, it is determined whether or not any of the 15R probability variation flag, the explicit 2R probability variation flag, and the normal jackpot flag are stored in the RAM 64. If none of the above flags are stored, the game state transition processing is ended.

  If any of the above flags is stored, the opening/closing execution mode start processing is executed in step S504. In the start process, an opening waiting time (starting waiting period) for waiting without opening the special winning opening 22a of the variable winning device 22 for opening in the opening/closing execution mode is set. Specifically, the waiting time information for opening stored in advance in the ROM 63 is set in the waiting time counter area provided in the various counter areas 64d of the RAM 64. In this case, the waiting time information that is set differs depending on whether the open/close execution mode is the high-frequency winning mode, and the waiting time information shows that the low-frequency winning mode has a longer waiting time than the high-frequency winning mode. It is set to be short. For example, in the high frequency winning mode, the count value of the waiting time information is set so that the waiting time is 1 sec, and in the low frequency winning mode, the count value of the waiting time information is set to be 0.2 sec. Is set. The value of the waiting time information set here is decremented by 1 each time the timer interrupt processing (FIG. 7) is executed.

  In a succeeding step S505, it is determined whether or not the opening/closing execution mode this time is the high frequency winning mode. Specifically, it is determined whether or not the 15R probability variation flag or the normal jackpot flag is stored in the RAM 64. If it is not the high frequency winning mode, that is, if it is the low frequency winning mode, "2" is set to the round counter RC provided in the various counter areas 64d of the RAM 64 in step S506. The round counter RC is a counter area for counting the number of times the special winning opening 22a is opened. On the other hand, in the case of the high frequency winning mode, "15" is set to the round counter RC in step S507.

  After executing the processing of step S506 or step S507, after setting the opening command in step S508, the game state transition processing is ended. The opening command set in step S508 is transmitted to the voice lamp controller 90 in step S201 in the normal process (FIG. 8). The opening command includes information on whether the mode is the high frequency winning mode or the low frequency winning mode.

  In the voice lamp control device 90, the light emission pattern of the display lamp section 54 and the sound output pattern from the speaker section 55 in the opening/closing execution mode are determined based on the received opening command, and the content of the determined effect is executed. The display lamp unit 54 and the speaker unit 55 are controlled as described above. Further, the voice lamp control device 90 transmits the opening command to the display control device 100 while maintaining its information form. In the display control device 100, an effect corresponding to the opening/closing execution mode is started on the symbol display device 31 based on the received opening command. The specific content of the display control will be described later.

  On the other hand, if it is in the open/close execution mode (step S501: YES), the process proceeds to step S509. In step S509, it is determined whether or not the waiting time for opening has elapsed. If the waiting time for the opening has not elapsed, the game state transition processing is ended as it is. If the waiting time for the opening has elapsed, the special winning opening opening/closing process is executed in step S510. Here, the special winning opening opening/closing processing will be described with reference to the flowchart of FIG.

  First, in step S601, it is determined whether or not the special winning opening 22a is open. Specifically, this determination is made based on the drive state of the variable winning drive unit 22c. If the special winning opening 22a is not open, it is determined in step S602 whether or not the value of the round counter RC is "0", and in step S603, the timer T provided in the various counter areas 64d of the RAM 64 is set. It is determined whether the value is "0".

  When the value of the round counter RC is “0” or the value of the timer T is not “0”, the main winning opening opening/closing process is ended as it is. On the other hand, when the value of the round counter RC is not "0" and the value of the timer T is "0", the process proceeds to step S604, and the variable winning drive unit 22c is driven to open the special winning opening 22a. To do.

  In a succeeding step S605, a setting process for each round is executed. In the setting process for each round, it is first determined whether or not the high frequency winning mode is set, and when it is the high frequency winning mode, the timer T is set to "15000" (that is, 30 sec). The count value set here is decremented by 1 each time the timer interrupt processing (FIG. 7) is activated, that is, in a cycle of 2 msec. Further, in order to count the number of winning game balls to the special winning opening 22a, "10" is set in the winning counter area PC provided in various counter areas 64d of the RAM 64. On the other hand, when it is not the high frequency winning mode, that is, the low frequency winning mode, the timer T is set to "100" (that is, 0.2 sec) and the winning counter area PC is set to "6". ..

  After that, the opening command is set in step S606, and the main winning opening/closing processing is ended. The set opening command is transmitted to the voice lamp control device 90 in step S201 in the normal process (FIG. 8). The voice lamp control device 90 changes the effect contents in the display lamp unit 54 and the speaker unit 55 based on the received opening command. Further, the audio lamp control device 90 transmits the opening command to the display control device 100 while maintaining its information form. In the display control device 100, the effect for the open/close execution mode in the symbol display device 31 is switched based on the received opening command. The specific content of the display control will be described later.

  On the other hand, when the special winning opening 22a is open (step S601: YES), the process proceeds to step S607, and it is determined whether the value of the timer T is "0". If the value of the timer T is not "0", it is determined in step S608 whether or not the game ball has won the special winning opening 22a, based on the detection state of the detection sensor corresponding to the variable winning device 22. If no winning is generated, the main winning opening opening/closing process is ended as it is. On the other hand, if a winning has occurred, the value of the winning counter area PC is decremented by 1 in step S609, and then it is determined in step S610 whether or not the value of the winning counter area PC is "0". If not, the main prize opening/closing processing is ended as it is.

  If the value of the timer T is "0" in step S607, or if the value of the winning counter area PC is "0" in step S610, it means that the special winning opening closing condition is satisfied. In such a case, in step S611, the variable winning award driving unit 22c is brought into a non-driving state to close the special winning opening 22a.

  In the subsequent step S612, the value of the round counter RC is decremented by 1, and it is determined in step S613 whether the value of the round counter RC is "0". When the value of the round counter RC is “0”, the main winning opening/closing processing is ended as it is. If the value of the round counter RC is not "0", it is determined in step S614 whether or not the high frequency winning mode is set.

  In the high frequency winning mode, the timer T is set to "1000" (that is, 2 sec), and in the low frequency winning mode, the timer T is set to "100" (that is, 0.2 sec). That is, in the low frequency winning mode, the time during which the special winning opening 22a is closed between rounds is set shorter than in the high frequency winning mode. After that, a closing command is set in step S617, and the main winning opening/closing processing is ended.

  The set closing command is transmitted to the voice lamp controller 90 in step S201 in the normal process (FIG. 8). The voice lamp control device 90 specifies that the opening of the special winning opening 22a for one round is completed based on the received closing command. Further, the voice lamp control device 90 transmits the closing command to the display control device 100 while maintaining its information form. The display control device 100 specifies that the opening of the special winning opening 22a for one round is completed based on the received closing command, and executes the corresponding process. The specific content of such processing will be described later.

  Returning to the explanation of the game state transition processing (FIG. 11 ), after executing the special winning opening opening/closing processing in step S510, it is determined whether or not the value of the round counter RC is “0” in step S511, and step In S512, it is determined whether the waiting time for ending has elapsed. Here, the pachinko machine 10 is configured such that the ending effect is executed by the symbol display device 31 or the like when the opening/closing execution mode ends, and the ending standby time is the ending effect. It is a period for waiting for the start of the next game time in the main controller 60 until the end of.

  When the value of the round counter RC is not "0" or when the waiting time for ending has not elapsed, this game state transition processing is ended as it is. On the other hand, if the value of the round counter RC is "0" and the waiting time for ending has elapsed, an ending command is set in step S513. The ending command is transmitted to the voice lamp control device 90 in step S201 in the normal process (FIG. 8). The voice lamp control device 90 ends the effect for the open/close execution mode in the display lamp section 54 and the speaker section 55 based on the received ending command. Further, the voice lamp control device 90 transmits the ending command to the display control device 100 while maintaining the information form thereof. In the display control device 100, the effect for the opening/closing execution mode in the symbol display device 31 is terminated based on the received ending command. The specific content of the display control will be described later.

  In a succeeding step S514, a transition process at the end of the open/close execution mode is executed. In the migration processing, it is determined whether the RAM 64 stores the 15R certainty variation flag, the explicit 2R certainty variation flag, or the normal jackpot flag. When the 15R probability variation flag or the explicit 2R probability variation flag is stored, the win/loss lottery mode is set to the high probability mode, the support mode is set to the high frequency support mode, and the normal jackpot flag is stored. The winning/winning lottery mode is set to the low probability mode and the support mode is set to the high frequency support mode.

  By the way, when the normal jackpot flag is stored, "100" which is the end reference number is set in the game number counter in the various counter areas 64d of the RAM 64. The number-of-games counter is decremented by 1 each time the variation start process is executed, and when the value of the number-of-games counter becomes "0", the support mode is set to the high-frequency support mode.

  Then, in step S515, after executing the ending process of the open/close execution mode, the game state transition process is ended. In the opening/closing execution mode ending process, if any of the explicit 2R probability variation flag, 15R probability variation flag, and normal jackpot flag is stored, it is deleted, and if not already stored, that state is maintained. To do.

<Electrical configuration of the voice lamp controller 90>
Next, the electrical configuration of the voice lamp control device 90 will be described with reference to the block diagram of FIG.

  The voice lamp control device 90 is provided with a voice lamp control board 110. The voice lamp control board 110 is provided with a sub CPU 111, a ROM 112, and a RAM 113.

  The sub CPU 111 has a function as a main control unit in the audio lamp control device 90. The sub CPU 111 is connected to the main control device 60 via an input port 114 provided on the voice lamp control board 110, and various commands transmitted from the main control device 60, specifically, a variation command, a type command, and A command for game time control (game time control information) such as a variation end command and a jackpot performance command (jackpot performance information) such as an opening command, an ending command, an opening command and a closing command are sent to the sub CPU 111 through the input port 114. Is entered. The sub CPU 111 is also connected to the ROM 112 and the RAM 113 via a bus.

  The ROM 112 is a non-volatile storage unit for storing various control programs executed by the sub CPU 111 and control information such as fixed value data, and is specifically configured by a NOR flash memory. Part of the fixed value data is stored in advance in each area 112a-112b of the ROM 112. The details of each of the areas 112a to 112b will be described together with the description of the processing executed by the sub CPU 111.

  The RAM 113 is a control volatile storage unit for temporarily storing work data, flags, and the like used when the sub CPU 111 executes various programs, and is specifically configured by a DRAM. Work data, flags, etc. are stored in the RAM 113.

  When various commands are input from the main control device 60, the sub CPU 111 uses the ROM 112 and the RAM 113 to execute processing corresponding to the input commands. Specifically, the sub CPU 111 is equipped with an arithmetic circuit 121 and a register 122 capable of temporarily storing the result of the arithmetic operation by the arithmetic circuit 121. When various commands are input, the sub CPU 111 reads out a program corresponding to the command input from the ROM 112 and causes the arithmetic circuit 121 to execute the program. Then, the calculation result of the calculation circuit 121 is written in the register 122 and the RAM 113. The data written in the register 122 or the like is output to the LED substrate 91, the speaker unit 55, and the display control device 100, and the LED substrate 91, the speaker unit 55, and the display control device 100 operate based on the above data.

  The sub CPU 111 outputs each command received from the main control device 60 to the display control device 100 while maintaining the information form, and the display control device 100 displays the command on the display screen G based on each command. The pattern display device 31 is controlled so that an image is displayed.

  Regarding the configuration of the output side of the sub CPU 111, specifically, the audio lamp control board 110 is provided with output ports 131, 132, 133 corresponding to the LED board 91, the speaker section 55, and the display control device 100, respectively. In addition, data output circuits 134, 135, 136 for outputting the data of the register 122 to the output ports 131, 132, 133 are provided. The output ports 131, 132, 133 are connected to the sub CPU 111 via corresponding data output circuits 134, 135, 136, respectively. The output ports 131, 132, 133 are connected to the corresponding LED board 91, speaker section 55, and display control device 100, respectively. The data set in the register 122 is output to the output ports 131, 132, 133 by the data output circuits 134, 135, 136, and the LED substrate 91 and the speaker are output via the output ports 131, 132, 133. It is output to the unit 55 and the display control device 100.

<Electrical configuration relating to drive control of various light emitting elements>
As described above, the pachinko machine 10 is provided with various lamp parts, and these lamp parts are provided with LEDs as light emitting elements. These LEDs are driven based on the data output from the data output circuit 134 to the LED substrate 91 via the output port 131. Therefore, the configuration of the data and the configuration of the data output circuit 134 will be described below with reference to the circuit diagram of FIG.

  As shown in FIG. 14, the data output circuit 134 includes a plurality of buses (more specifically, five) that connect the sub CPU 111 and the output port 131. Different data is output to each bus. Specifically, the LED drive data SD, the clock signal SG1, the data write signal SG2, the first permission signal SG3, and the second permission signal SG4 are output to the output port 131. The output port 131 has a plurality of terminals, and the LED drive data SD and each signal are configured to be input to the corresponding terminals among the plurality of terminals. Hereinafter, configurations related to the LED drive data SD and each signal will be individually described.

  First, the configuration related to the LED drive data SD will be described. The register 122 is provided with an LED drive register 141 corresponding to the LED drive data SD that determines whether or not the LED emits light. The LED driving register 141 includes a first data register 141a and a second data register 141b as a storage area having a storage capacity of 8 bits, and can store 16-bit information as a whole. Each of the data registers 141a and 141b is connected to the data output circuit 134. The data output circuit 134 is configured to output the LED drive data SD to the output port 131 based on the information stored in each of the data registers 141a and 141b.

  Specifically, the data output circuit 134 is provided with an n-type MOSFET 142 as a switching element. The source of the MOSFET 142 is grounded, and the drain is connected to the DATA terminal of the output port 131 while being pulled up to +5V. A voltage of +5V is applied between the source and drain. The gate of the MOSFET 142 is connected to the LED driving register 141 and is pulled up to +3.3V. The +3.3V is a voltage value larger than the threshold voltage of the MOSFET 142. A voltage (HI signal or LOW signal) corresponding to the bit information stored in the LED driving register 141 is applied to the gate of the MOSFET 142.

  Specifically, when the information (LOW signal) of “0” is stored in a predetermined bit of the LED driving register 141, 0V is applied to the gate of the MOSFET 142. In this case, the MOSFET 142 is turned off, and +5V corresponding to the HI signal is input to the DATA terminal.

  On the other hand, when the information (HI signal) of "1" is stored in a predetermined bit of the LED driving register 141 or the information of the predetermined bit is indefinite, +3.3V is applied to the gate of the MOSFET 142. Is entered. In this case, the MOSFET 142 is turned on and the source and drain are electrically connected. As a result, 0V corresponding to the LOW signal is input to the DATA terminal.

  From the above, the data (voltage) output to the DATA terminal differs depending on the bit information stored in the LED driving register 141.

  In such a configuration, the LED driving register 141 sequentially outputs the bit information to the DATA terminal in time series by sequentially changing the reference destination of the bit information that determines the input voltage to the gate of the MOSFET 142. It has become. As a result, the LED drive data SD stored in the LED drive register 141 is sequentially output to the DATA terminal of the output port 131.

  Here, in a situation in which the LED drive data SD stored in one of the first data register 141a and the second data register 141b is being output, the LED to be output to another data register in the future The drive data SD is set. As a result, the transmission period of the LED drive data SD can be shortened by the period related to the writing of the LED drive data SD into the LED drive register 141.

  Next, the configuration related to the clock signal SG1 will be described. The register 122 is provided with a clock signal register 143 that controls the clock signal SG1. The clock signal register 143 has a storage capacity of 1 bit, and information of "1" and information of "0" are alternately input in a predetermined cycle. The clock signal register 143 is connected to the data output circuit 134. The data output circuit 134 outputs the clock signal SG1 having a predetermined cycle to the output port 131 based on the switching of the information of the clock signal register 143.

  Specifically, the data output circuit 134 is provided with an n-type MOSFET 144 as a switching element. The MOSFET 144 is connected to the CLK terminal of the output port 131 in a state where the source is grounded and the drain is pulled up to +5V. The gate of the MOSFET 144 is connected to the clock signal register 143 in a pulled-up state.

  With such a configuration, the MOSFET 144 is alternately switched between ON and OFF based on the information written in the clock signal register 143 being alternately switched to “1” and “0” at a predetermined cycle. By switching ON/OFF of the MOSFET 144, the clock signal SG1 having the above-mentioned predetermined cycle is input to the CLK terminal. The clock signal SG1 is used to transmit the LED drive data SD on the LED substrate 91. Details of the transmission will be described later.

  Next, the structure related to the data write signal SG2 will be described. The register 122 is provided with a data write signal register 145 corresponding to the data write signal SG2. The data write signal register 145 has a storage capacity of 1 bit and is set so that information “1” is written when a predetermined condition is satisfied. The data write signal register 145 is connected to the data output circuit 134. The data output circuit 134 outputs a signal based on the information written in the data write signal register 145 to the output port 131.

  Specifically, the data output circuit 134 is provided with an n-type MOSFET 146 as a switching element. The MOSFET 146 has a source grounded and a drain connected to the L terminal of the output port 131 in a state of being pulled up to +5V. The gate of the MOSFET 146 is connected to the data write signal register 145 in a pulled-up state.

  With this configuration, when the information “1” is written in the data write signal register 145 or when the information stored in the data write signal register 145 is indefinite, the gate of the MOSFET 146 is HI. The voltage corresponding to the signal is input, and the MOSFET 146 is turned on. As a result, 0V corresponding to the LOW signal is input to the L terminal.

  On the other hand, when "0" information is written in the data write signal register 145, 0V corresponding to the LOW signal is input to the gate of the MOSFET 146, and the MOSFET 146 is turned off. As a result, +5V corresponding to the HI signal is input to the L terminal. The data write signal SG2 is used when setting the LED drive data SD for each LED. Details of the setting will be described later.

  Next, the configuration related to each permission signal SG3, SG4 will be described. The register 122 is provided with a first permission signal register 147 corresponding to the first permission signal SG3 and a second permission signal register 148 corresponding to the second permission signal SG4. Each of the permission signal registers 147 and 148 has a storage capacity of 1 bit and stores information of "1" or "0". The permission signal registers 147 and 148 are connected to the data output circuit 134 via different buses. The data output circuit 134 outputs a signal corresponding to the information written in each of the permission signal registers 147 and 148 to the output port 131.

  Specifically, the data output circuit 134 is provided with an n-type MOSFET 149 corresponding to the first permission signal register 147 and an n-type MOSFET 150 corresponding to the second permission signal register 148. Has been. The sources of the MOSFETs 149 and 150 are grounded. The drain of the MOSFET 149 is connected to the E1 terminal of the output port 131 while being pulled up to +5V, and the drain of the MOSFET 150 is connected to the E2 terminal of the output port 131 while being pulled up to +5V. The gate of the MOSFET 149 is connected to the first permission signal register 147, and the gate of the MOSFET 150 is connected to the second permission signal register 148.

  With this configuration, a signal according to the information written in the first permission signal register 147 is input to the E1 terminal, and a signal according to the information written in the second permission signal register 148 is generated. It is input to the E2 terminal. Specifically, for example, when the information “1” is set in the first permission signal register 147, the LOW signal is input to the E1 terminal and the information “0” is set in the first permission signal register 147. If so, the HI signal is input to the E1 terminal.

  Here, two buses for connecting the enable signal registers 147 and 148 and the output port 131 are provided corresponding to the individual provision of the enable signal registers 147 and 148. The output port 131 is provided with an E1 terminal and an E2 terminal. That is, the first permission signal SG3 and the second permission signal SG4 are configured to be transmitted in different systems. As a result, it is possible to control the first permission signal SG3 and the second permission signal SG4 individually, and even if noise is included in either one, the influence of the noise is less likely to affect the other. Is becoming These permission signals SG3 and SG4 are used to control lighting and extinction of each light emitting element. Details of the control will be described later.

  As described above, since the inputs to the gates of the MOSFETs 142, 144, 146, 149, 150 are pulled up, when the information in the register 122 is indefinite, the MOSFETs 142, 144, 146, 149, 150 are each. Turns on. As a result, the LOW signal is input to each terminal (DATA terminal, CLK terminal, L terminal, E1 terminal, E2 terminal).

  Further, the +5V power source is connected in parallel to the bus connecting the drains of the MOSFETs 142, 144, 146, 149, 150 and the output port 131, but on the bus connecting the bus and the +5V power source. A clamp diode 160 is provided. The clamp diode 160 is connected with the +5V power supply side as a cathode. As a result, when the potential on the bus temporarily rises due to noise entering the bus connecting the drain and the output port 131, a current temporarily flows to the +5V power supply side, and the output A large current does not flow to the port 131 side.

  Further, a gate resistance 161 for preventing vibration is provided at the gates of the MOSFETs 142, 144, 146, 149, 150. The gate resistance 161 reduces the Q value (stability) of the parasitic resonance circuit due to the parasitic capacitance and the parasitic inductance of the MOSFETs 142, 144, 146, 149, 150, and makes parasitic resonance less likely to occur. This can suppress the influence of the parasitic resonance.

  Further, the output port 131 is provided with a +5V terminal and a GND terminal. A +5V power source is connected to the +5V terminal, and +5V is applied from the +5V power source. On the other hand, the GND terminal is grounded.

  Next, a configuration for driving each light emitting element using these various signals will be described with reference to FIG. FIG. 15 is a circuit diagram of various circuits mounted on the LED board 91.

  As shown in FIG. 15, the LED substrate 91 is provided with an input port 171 having a plurality of input terminals, and various signals output from the output port 131 are individually input to the input port 171. It Each of the various signals is output to the LED drive unit 172 provided on the LED substrate 91 via wiring. The LED drive unit 172 is connected to a plurality of LEDs 173 as a plurality of light emitting elements, and drives the LEDs 173 based on the input of various signals.

  A Schmitt trigger type inverter 180 is provided on each wiring. The inverter 180 has a hysteresis characteristic in which the threshold voltage for HI output and the threshold voltage for LOW output are different. As a result, it is possible to suppress the influence of noise mixed in various signals, for example, the occurrence of chattering.

  The LED driving unit 172 includes a plurality of LED driving ICs. Specifically, the LED driving unit 172 is serially connected to the first driving IC 191 to which the LED driving data SD of various signals is input and the first driving IC 191. And a second drive IC 192 connected thereto. Each of the drive ICs 191 and 192 has a plurality of input terminals and output terminals. Specifically, DATAIN terminals (data input sections), CLK terminals, L terminals, E terminals, VDD terminals, and GND terminals are used as input terminals. It also has a DATAOUT terminal (data output section) and a plurality of OUT terminals as output terminals. The DATAIN terminal of the first drive IC 191 is connected to the DATA terminal of the input port 171 via wiring (wiring from the element control means), and the DATAIN terminal of the second drive IC 192 is connected to wiring (serial connection wiring). ) Is connected to the DATAOUT terminal of the first driving IC 191.

  The VDD terminal is connected to the +5V power source, and the GND terminal is grounded. The clock signal SG1, the data write signal SG2, and the first permission signal SG3 among various signals are input to the CLK terminal, the L terminal, and the E terminal, respectively, and in detail, each drive IC 191, The CLK terminal of 192 and the CLK terminal of the input port 171 are connected by wiring, and the L terminal of each driving IC 191 and 192 and the L terminal of the input port 171 are connected by wiring, and each driving IC 191 and 192 is connected. The E terminal and the E1 terminal of the input port 171 are connected by wiring. In this case, each wiring is branched so that the clock signal SG1, the data write signal SG2, and the first permission signal SG3 are input in parallel to each drive IC 191, 192. As a result, the clock signal SG1, the data write signal SG2, and the first permission signal SG3 are simultaneously input to the drive ICs 191 and 192. The first driving IC 191 and the second driving IC 192 are configured to transmit the LED driving data SD using the clock signal SG1 and to individually set each LED 173 using the data write signal SG2 and the first permission signal SG3. Has been done.

  The internal configuration of each drive IC 191, 192 will be described in detail with reference to the block diagram of FIG. Since the drive ICs 191 and 192 have the same internal configuration, only the first drive IC 191 will be described and the internal configuration of the second drive IC 192 will be omitted.

  As shown in FIG. 16, the first drive IC 191 includes an update circuit 191a that acquires and updates the LED drive data SD, and a register 191b in which the LED drive data SD is written. The update circuit 191a includes an update buffer 191c. The update buffer 191c has an 8-bit data area D0 to D7 and an output out data area DA. The out data area DA is a copy area of the data area D7, and is an area in which the same information as the data area D7 is set. The out-data area DA is connected to the DATAOUT terminal of the first drive IC 191, and is connected to the DATAIN terminal (data input section) of the second drive IC 192 via the DATAOUT terminal and the wiring (wiring for serial connection). There is. The update circuit 191a is connected to the DATAIN terminal to which the LED drive data SD is input and also to the CLK terminal to which the clock signal SG1 is input. The update circuit 191a writes the LED drive data SD in the data area D0 in synchronization with the rising edge of the clock signal SG1 and sequentially shifts the data already written in the data areas D0 to D7. The update circuit 191a is configured to output the data written in the out data area DA to the second drive IC 192 in synchronization with the falling edge of the clock signal SG1.

  Briefly describing an example of a specific configuration of the update circuit 191a, the update circuit 191a includes eight D flip-flops corresponding to the data areas D0 to D7. Each D flip-flop has an input terminal (D terminal), an output terminal (Q terminal), and a clock terminal, and the clock signal SG1 is input to each clock terminal. Each D flip-flop is configured to output the information input to the input terminal from the output terminal in synchronization with the rising edge of the clock signal SG1. The respective D flip-flops are connected in series, and specifically, the output terminal of the D flip-flop corresponding to the predetermined data area Dx (for example, D0) is the next data area D with respect to the predetermined data area Dx. It is connected via a bus to the input terminal of the D flip-flop corresponding to (x+1) (for example, D1). The LED driving data SD is input to the input terminal of the D flip-flop corresponding to the data area D0.

  The output terminal of the D flip-flop corresponding to the data area D7 is connected to the D flip-flop corresponding to the out data area DA. Unlike the D flip-flops in the data areas D0 to D7, the D flip-flop is configured to output the information input to the input terminal from the output terminal in synchronization with the fall of the clock signal SG1.

  Although the second driving IC 192 has the same configuration, in order to distinguish it from the first driving IC 191, the updating circuit of the second driving IC 192 is the updating circuit 192a, the register of the second driving IC 192 is the register 192b, and the second driving IC 192 is the second driving IC 192. The update buffer of the IC 192 is referred to as an update buffer 192c, the data areas of the update buffer 192c are referred to as data areas D8 to D15, and the OUT terminals of the second drive IC 192 are referred to as OUT8 terminals to OUT15 terminals.

  The configuration of the update circuit 191a is not limited to the D flip-flop, and a JK flip-flop or the like may be used, for example. In short, the update circuit 191a has a plurality of information holding units and is configured to be able to input and output data, and is sequentially held in each information holding unit at a predetermined update timing. Any data may be updated and input/output.

  Further, a CPU (control circuit) that outputs a control signal capable of individually controlling each data stored in the update buffer 191c may be provided.

  Here, as described above, since the DATAIN terminal of the second driving IC 192 and the DATAOUT terminal of the first driving IC 191 are electrically connected via the wiring, the update circuit 192a synchronizes with the rising edge of the clock signal SG1. Then, the LED drive data SD output from the first drive IC 191 (specifically, the data written in the out data area DA of the update buffer 191c of the update circuit 191a of the first drive IC 191) is written in the data area D8. , The data already written in the data areas D8 to D15 are sequentially shifted. Further, the update circuit 192a outputs the data written in the out data area DA in synchronization with the fall of the clock signal SG1.

  The operation of the update circuit 191a will be described with reference to the timing chart of FIG. 17A is a waveform of the clock signal SG1 input to the CLK terminal of the input port 171, FIG. 17B is a data mode of the LED drive data SD input to the DATA terminal of the input port 171, 17C is the actual waveform of the LED drive data SD input to the DATA terminal of the input port 171, FIG. 17D is the mode of each data area D0 to D7, and FIG. 17E is the DATAOUT terminal. The output waveform from is shown.

  Here, the timing of t2, t4, t5, t7 is the rising timing of the clock signal SG1, and the timing of t6, t8 is the falling timing of the clock signal SG1.

  As shown in FIGS. 17(a), (b) and (c), in a situation where the LED drive data SD is sequentially input in time series, the LED drive at the rising timing is synchronized with the rising of the clock signal SG1. The data SD is set in the data areas D0 to D7.

  Specifically, first, the output of the LED drive data SD is started at the timing of t1. Specifically, as shown in FIG. 17B, the LED drive data SD (for example, “1”) set in the data area D8 of the second drive IC 192 is output. After that, at the timing of t2, the clock signal SG1 rises, and the update processing is performed by the update circuits 191a and 192a. In this case, since the LED drive data SD is "1" (HI signal), "1" is set in the data area D0. Specifically, the HI signal is output from the Q terminal of the D flip-flop corresponding to the data area D0.

  At the subsequent timing of t3, the LED drive data SD is updated. Specifically, the LED drive data SD (for example, "0") set in the data area D7 is output. Then, at the timing of t4, the information of "1" stored in the data area D0 is shifted to the data area D1, and the information of the LED drive data SD is set in the data area D0. Specifically, at the timing of t4, since the output of the LED drive data SD is “0” (LOW signal), “0” is set in the data area D0.

  As described above, each time the clock signal SG1 rises, the data stored in the data areas D0 to D7 at that time is sequentially shifted (Dx→D(x+1)) and is output at that time. The LED drive data SD present is written in the data area D0. In this case, the LED drive data SD is sequentially updated, and the updated LED drive data SD is sequentially captured in the data area D0.

  Here, the update timing of the LED drive data SD (timing of t1 and t3) and the update timing of the data areas D0 to DA (timing of t2 and t4) are set not to be synchronized. Specifically, the rising timing of the clock signal SG1 is deviated from the update timing of the LED drive data SD by a predetermined period T1 (specifically delayed), and the update interval of the LED drive data SD is clocked. It is set to an integral multiple (specifically, equal to) of the cycle T2 of the signal SG1. As a result, the update timing of the LED drive data SD and the rising timing of the clock signal SG1 do not coincide with each other, so that the update of the LED drive data SD and the update of the data areas D0 to D7 are not performed at the same time. There is. As a result, an acquisition error is less likely to occur when acquiring the LED drive data SD.

  That is, if the acquisition timing of the LED drive data SD and the update timing of the LED drive data SD are the same, it is not known whether the acquired LED drive data SD is before or after the update, and it is unstable. Become. On the other hand, according to the present embodiment, since the acquisition timing of the LED drive data SD is delayed from the update timing of the LED drive data SD by the predetermined period T1, the stable LED drive data SD is acquired. It becomes possible to do. As a result, an error in acquiring the LED drive data SD is less likely to occur.

  In particular, the update interval of the LED drive data SD is set to be the same as the cycle T2 of the clock signal SG1. As a result, the LED drive data SD and the data area Dx are alternately updated, so that the same LED drive data SD is not reflected in the data area Dx.

  The predetermined period T1 may be set longer than the period required to update the LED drive data SD, specifically, the period required to rise or fall the LED drive data SD.

  At the timing of t5 when the LED drive data SD is set in each of the data areas D0 to D7, the information of the data area D7 is written in the out data area DA as the data is written in the data area D7.

  Thereafter, at the timing of t6, the data written in the out data area DA is output. In this case, since the data to be written in the data area D8, specifically, the information of "1" is set in the out data area DA, the HI signal corresponding to "1" is output (FIG. 17(e)). )reference).

  After that, the data areas D0 to D7 are updated at the timing of t7. Specifically, the data in the data area Dx is shifted to the data area D(x+1), and the information of the LED drive data SD at the timing t7, specifically, “1” is written in the data area D0. Then, as the information in the data area D7 is updated, the information in the out data area DA is updated.

  Further, the data areas D8 to D15 in the second drive IC 192 are updated in synchronization with the rising of the clock signal SG1. Therefore, at the timing of t7, the data corresponding to the data area D8 output from the DATAOUT terminal of the first drive IC 191 is acquired, the data is written to the data area D8, and the data of the data areas D8 to D15 is written. shift. As a result, the LED drive data SD is set in the update buffer 192c. The transmission mode of the LED drive data SD and the operation of the second drive IC 192 performed between the first drive IC 191 and the second drive IC 192 will be described in detail later.

  Then, at the timing of t8, "0" written in the out data area DA is output.

  That is, each time the predetermined update timing (the rising timing of the clock signal SG1) is reached, the data of the LED drive data SD is fetched, and the data written in the data area Dx is written in the next data area D(x+1). It is sequentially shifted. The data in the out data area DA, which is a copy of the data area D7, is output every time the timing is different from the update timing (falling timing of the clock signal SG1). As a result, the LED drive data SD is transmitted from the update buffer 191c of the first drive IC 191 to the update buffer 192c of the second drive IC 192.

  Note that the specific configurations of the update circuits 191a and 192a are not limited to those using the D flip-flops described above, and are arbitrary as long as they realize the above operation.

  Returning to the description of FIG. 16, the register 191b has 8-bit data areas D'0 to D'7, and each data area D'0 to D'7 is the data area D0 to D7 of the update buffer 191c. Connected to. The data areas D'0 to D'5 are connected to the LEDs 173 via output terminals, respectively. Further, the register 191b is configured to receive the data write signal SG2 and the first permission signal SG3. The register 191b receives the data set in each of the data areas D0 to D7 based on the rise of the data write signal SG2 in the situation where the first permission signal SG3 is LOW, and stores its own data area D'0 to D'7. To the LED 173 via each OUT terminal (OUT0 terminal to OUT7 terminal). Each LED 173 is configured to operate based on the output data.

  Specifically, the anode of each LED 173 is connected to the +5V power source, and the cathode of each LED 173 is connected to the corresponding data area D′0 to D′5. According to this configuration, for example, when the data area D0 is "1", "1" is set in the data area D'0, and the potential corresponding to the data areas D'0 to "1" (specifically, Outputs +5V). In this case, since there is no potential difference between the anode and the cathode of the LED 173, the LED 173 does not emit light. On the other hand, when the data area D0 is "0", "0" is set in the data area D'0, and the potential (specifically, 0 V) corresponding to "0" is output from the data area D'0. To be done. In this case, a potential difference occurs between the anode and cathode of the LED 173, and the LED 173 emits light. In other words, when the data area Dx is “0”, it can be said that the cathode of the LED 173 is grounded and the light capable of emitting light is supplied to the LED 173.

  Returning to the explanation of FIG. 15, the LED board 91 is provided with a winning notification circuit 201 for driving the winning notification LED 37. The winning notification circuit 201 is connected to the second drive IC 192, and the LED drive data SD is transmitted from the second drive IC 192. The winning notification circuit 201 is configured to receive the clock signal SG1, the data write signal SG2, and the second permission signal SG4, and drives the winning notification LED 37 based on these signals.

  The winning notification circuit 201 will be described with reference to the circuit diagram of FIG.

  The winning notification circuit 201 includes a voltage applying circuit 202 that applies a voltage to the winning notification LED 37, and a third drive IC 203 that controls the driving of the voltage applying circuit 202. Like the first drive IC 191, the third drive IC 203 has DATAIN terminals, CLK terminals, L terminals, and E terminals as input terminals, and OUT16 to OUT23 terminals and DATAOUT terminals as output terminals. .. The LED drive data SD, the clock signal SG1, and the data write signal SG2 are input to the respective terminals (DATAIN terminal, CLK terminal, L terminal).

  Here, the third driving IC 203 is connected in series to the first driving IC 191 and the second driving IC 192. Specifically, the DATAOUT terminal of the second driving IC 192 is wired (serially connected) to the DATAIN terminal of the third driving IC 203. Connection wiring). As a result, the LED drive data SD is input to the third drive IC 203 via the first drive IC 191 and the second drive IC 192. In this case, it can be said that the third drive IC 203 is provided on the most downstream side of the transmission path through which the LED drive data SD is transmitted. The operation of the third drive IC 203 is the same as that of the first drive IC 191, and thus the description thereof is omitted.

  The third drive IC 203, unlike the drive ICs 191 and 192, is adapted to receive the second permission signal SG4. Specifically, the E2 terminal of the input port 171 is connected to the E terminal of the third drive IC 203 (see FIG. 15). Therefore, the third drive IC 203 outputs a signal corresponding to the LED drive data SD via the OUT16 terminal to the OUT23 terminal based on the rising of the data write signal SG2 in the situation where the second permission signal SG4 is LOW. .

  The voltage application circuit 202 is connected to the third drive IC 203 and receives the second permission signal SG4. The voltage application circuit 202 applies a voltage at which the winning notification LED 37 can emit light to the winning notification LED 37 when the signal from the third driving IC 203 and the second permission signal SG4 satisfy a predetermined condition.

  Specifically, the voltage application circuit 202 includes a winning notification LED 37, and a p-type MOSFET 211 and an n-type MOSFET 212 that are connected in series to the winning notification LED 37. The winning notification LED 37 is connected to the +5V power source via the p-type MOSFET 211, and is grounded via the n-type MOSFET 212. Specifically, the drain of the p-type MOSFET 211 is connected to the anode of the notification LED 37 for winning, the source is connected to the +5V power source, and the drain of the n-type MOSFET 212 is connected to the cathode of the LED 37 for winning notification. , The source is grounded. The gate of the p-type MOSFET 211 is connected to the OUT16 terminal of the third drive IC 203, and the gate of the n-type MOSFET 212 is connected to the E2 terminal via the Schmitt inverter 213.

  According to this configuration, when (A) LOW is output from the OUT16 terminal of the third drive IC 203, and (B) the second permission signal SG4 is LOW, both MOSFETs 211 and 212 are turned ON, and the winning notification is given. A voltage is applied to the LED 37 for notification and the LED 37 for notification of the winning is emitted. In this case, even if either condition (A) or (B) is satisfied, no current flows to the winning notification LED 37, and the winning notification LED 37 does not emit light.

  Since the gate of the n-type MOSFET 212 is pulled down, the n-type MOSFET 212 is turned off when the second permission signal SG4 is indefinite. As a result, when the second permission signal SG4 is indefinite, the winning notification LED 37 does not light up.

  Here, a time constant circuit 221 for processing the LED drive data SD output from the OUT16 terminal is provided on the wiring connecting the OUT16 terminal of the third drive IC 203 and the p-type MOSFET 211. The time constant circuit 221 includes a resistor 222 provided on the wiring and a capacitor 223 connected in parallel with the resistor 222. One end of the resistor 222 is connected to the OUT16 terminal, and the other end of the resistor 222 is connected to the gate of the p-type MOSFET 211. One end of the capacitor 223 is connected to the other end of the resistor 222, and the other end of the capacitor 223 is grounded. Further, the wiring connecting the OUT16 terminal of the third drive IC 203 and one end of the resistor 222 is connected to the +5V power source via the pull-up resistor 224 and is pulled up.

  With this configuration, when the signal output from the OUT16 terminal is HI or open, HI is input to the p-type MOSFET 211. Therefore, the p-type MOSFET 211 is turned off.

  On the other hand, when the signal output from the OUT16 terminal becomes LOW, the LOW signal output from the OUT16 terminal is delayed by the transient phenomenon of the resistor 222 and the capacitor 223 and input to the gate of the p-type MOSFET 211. Specifically, when the signal output from the OUT16 terminal becomes LOW, the charge accumulated in the capacitor 223 is discharged (discharged state), and the voltage corresponding to the charge discharged to the gate of the p-type MOSFET 211 is changed. Is applied. As a result, the LOW signal is input to the gate of the p-type MOSFET 211 and the p-type MOSFET 211 is turned on after a predetermined period has elapsed since the signal output from the OUT16 terminal became LOW. The predetermined period is determined by the resistance value R of the resistor 222 and the electrostatic capacitance C of the capacitor 223, and is specifically set to be longer than the execution cycle of the sound emission control process performed by the sound lamp control device 90 described later. ing.

  In this case, when the signal at the OUT16 terminal becomes HI while the capacitor 223 is in the discharging state, the capacitor 223 shifts from the discharging state in which electric charges are discharged to the charging state in which electric charges are accumulated. Therefore, the p-type MOSFET 211 remains off. That is, the p-type MOSFET 211 is turned on based on the fact that the LOW signal continues from the OUT16 terminal for the predetermined period. As a result, when the output from the OUT16 terminal becomes LOW temporarily due to the influence of noise or the like, a LOW signal is temporarily input to the wiring connecting the OUT16 terminal and the gate of the p-type MOSFET 211 due to noise or the like. Even in this case, since the p-type MOSFET 211 remains off, the winning notification LED 37 does not emit light. Therefore, malfunction of the winning notification LED 37 due to noise can be suppressed. In other words, the time constant circuit 221 outputs the LOW signal to the voltage application circuit 202 based on the output of the LOW signal as the drive signal from the third drive IC 203 for a predetermined period. You can say that.

  Further, the time constant circuit 221 has a frequency characteristic, and a signal having a frequency higher than a specific frequency f0 predetermined by the time constant circuit 221 is attenuated, while a signal having a frequency lower than the specific frequency f0 passes. To do. As a result, when the signal passing through the time constant circuit 221 contains high frequency noise having a frequency higher than the specific frequency f0, the high frequency noise is removed. As a result, a signal from which high-frequency noise has been removed is input to the gate of the p-type MOSFET 211, and the disadvantage that the p-type MOSFET 211 malfunctions due to high-frequency noise is avoided.

  The specific frequency f0 is determined by the capacitance C of the capacitor 223 and the resistance value R of the resistor 222 (f0=1/2πRC), and the time constant circuit 221 is a signal for controlling the driving of the winning notification LED 37. The electrostatic capacitance C and the resistance value R are set so as not to be removed. Specifically, the specific frequency f0 is set to be higher than the light emission frequency (light emission interval) of the winning notification LED 37. Here, the winning notification LED 37 is set to emit light in seconds from the viewpoint of attracting attention to the player. Therefore, each capacitance C and resistance value R are set so that the specific frequency f0 is 1 Hz or higher.

  Further, only the voltage application circuit 202 is connected to the OUT16 terminal of the third drive IC 203, and the other OUT terminals (OUT17 to OUT23 terminals) are open. As a result, noise is suppressed from being mixed in the signal output from the OUT16 terminal due to the influence of the wiring connected to the other OUT terminal.

  Further, since the voltage application circuit 202 is provided, unlike the drive ICs 191 and 192, the current flowing through the winning notification LED 37 does not directly flow into the third drive IC 203. This makes it difficult for the third drive IC 203 to be destroyed due to the high current flowing in the third drive IC 203.

  That is, in order to make the emission intensity of the winning notification LED 37 higher than that of the other LEDs 173, it is necessary to increase the current flowing through the winning notification LED 37. In such a situation, if the current flowing through the winning notification LED 37 directly flows into the third driving IC 203, the third driving IC 203 may be destroyed. On the other hand, according to the present embodiment, the third driving IC 203 only controls the p-type MOSFET 211, and the current path of the winning notification LED 37 is independent of the third driving IC 203. As a result, the current flowing through the winning notification LED 37 does not flow into the third drive IC 203.

<Various processes executed by the voice lamp control device 90>
Next, various processes performed by the sub CPU 111 of the voice lamp control device 90 will be described. The various processes performed by the sub CPU 111 include a sound emission control process for controlling the speaker unit 55 and the LED 173, and a startup process performed when the power is turned on. These processes will be described below.

  First, the startup process of the voice lamp control device 90 will be described with reference to the flowchart of FIG. The startup process is executed when the pachinko machine 10 is powered on.

  First, in step S701, each permission signal SG3, SG4 is set so that each drive IC 191, 192, 203 does not operate. Specifically, "1" is set to each of the permission signal registers 147 and 148 so that each of the permission signals SG3 and SG4 becomes HI.

  In this case, as described above, since the bus connecting the respective permission signal registers 147 and 148 and the corresponding gates of the MOSFETs 149 and 150 is pulled up, the information of the respective permission signal registers 147 and 148 is undefined. Even if there is, each permission signal SG3, SG4 becomes HI. As a result, the drive ICs 191, 192, 203 are less likely to malfunction even before the process of setting "1" to the permission signal registers 147, 148.

  In subsequent step S702, various startup processes are executed. Specifically, the initialization process of the RAM 113 in the sub CPU 111 is executed, and the abnormality determination process of whether or not there is any abnormality is executed. In addition, an initialization signal is output to the display control device 100, the speaker unit 55, and the LED substrate 91 connected to the audio lamp control device 90, and the initialization is performed in the display control device 100, the speaker unit 55, and the LED substrate 91. Control to be performed.

  Then, in step S703, it is determined whether or not a predetermined period has elapsed. If the predetermined period has not elapsed, the process of step S703 is executed again. The predetermined period is set longer than the period related to the initialization of the display control device 100, the speaker unit 55, and the LED board 91. Accordingly, it can be said that the voice lamp control device 90 is on standby until the initialization of the device to be controlled is completed.

  The measurement of this period is performed by counting the number of times of processing in step S703. For example, when the time required to execute the process of step S703 again after the negative determination is made in step S703 is 0.1 msec, the count value becomes 10,000 times, so that various startup processes of step S703 are performed. It is determined that 1 sec has passed since the end. The specific configuration for measuring the period is arbitrary, and the period may be measured using a real-time clock, for example. If it is determined in step S703 that the predetermined period has elapsed, the process proceeds to step S704.

  In step S704, the first permission signal SG3 is set to LOW while the second permission signal SG4 is set to HI. Specifically, “0” is set in the first permission signal register 147, while “1” is set in the second permission signal register 148. As a result, the first drive IC 191 and the second drive IC 192 become operable, while the third drive IC 203 becomes inoperable.

  From the above, by setting each permission signal SG3, SG4 to HI in the stage before executing various startup processing, each drive IC 191, 192, 203 does not operate during various startup processing. There is. This prevents the drive ICs 191, 192, and 203 from malfunctioning when the power is turned on and the LEDs 173 and the winning notification LED 37 from malfunctioning. Then, after the start-up is completed, the drive ICs 191 and 192 can operate and the LEDs 173 can emit light. In this case, since the second permission signal SG4 is HI, the winning notification LED 37 does not emit light.

  Next, the sound emission control process will be described with reference to the flowchart of FIG. The sound emission control process is activated in a predetermined cycle, specifically, in a 4 msec cycle. The sound emission control process executes processes corresponding to various commands transmitted from the main control device 60.

  First, in step S801, it is determined whether the command received from the main control device 60 is a variation command. If the command is a fluctuation command, the flow advances to step S802 to execute fluctuation start processing.

  The fluctuation start process will be described with reference to the flowchart of FIG.

  First, in step S901, based on the variation command and the type command, the presence or absence of a big hit in the current game time, and if it is a big hit, the type and the presence or absence of the reach occurrence are grasped.

  Then, in step S902, it is determined whether or not it is a big hit, based on the above-mentioned grasped result. When it is determined that the jackpot is a big hit, the winning notification effect lottery process is executed in step S903.

  Specifically, the RAM 113 of the voice lamp control device 90 is provided with an effect lottery counter area 113a, and an effect lottery counter that updates at a predetermined cycle is stored in the area. In step S903, the current value of the effect lottery counter is acquired, and the value of the counter is determined in advance by referring to the winning announcement effect lottery table stored in the winning notification effect lottery table storage area 112a. It is determined whether or not

  A plurality of predetermined winning values are set in the winning announcement production lottery table, and the winning probability is determined by the ratio between the number of the winning values and the number of numerical values that the production lottery counter can take. In such a configuration, a plurality of winning announcement production lottery tables with different numbers of winning values set, and by switching the winning announcement production lottery table to be referred to according to the game situation, the winning probability of the winning announcement production may be switched. Good.

  When the winning notification effect is won, the process proceeds to step S905, and the LED drive pattern table corresponding to the winning notification effect is set. An LED drive pattern table storage area 112b is provided in the ROM 112, and a plurality of types of LED drive pattern tables are stored in the LED drive pattern table storage area 112b. Each LED drive pattern table is a table in which the LED drive data SD is set in a one-to-one correspondence with the information of the period after the variable display of the main display portion 33 is started. As a result, when a predetermined period has elapsed from the start of the variable display, the LED drive pattern table is referred to obtain the LED drive data SD corresponding to the period, and the obtained LED drive data SD is acquired. By setting, each LED 173 is drive-controlled.

  In the process of step S905, the LED drive pattern table corresponding to the winning notification effect is selected as the LED drive pattern table referred to in the current game. The LED drive pattern table corresponding to the winning notification effect is a table set so that the winning notification LED 37 emits light at a predetermined timing.

  On the other hand, if it is not a big hit (step S902: NO), or if the winning notification effect has not been won (step S904: NO), the process proceeds to step S906, and the determination process of other effects is executed. In the other effect determination process, effect contents other than the winning notification effect are determined.

  Then, in step S907, the LED drive pattern table corresponding to other effects is selected as the LED drive pattern table to be referred to in the current game. The LED drive pattern table corresponding to the other effects is a table set so that the winning notification LED 37 does not emit light.

  After executing the processing of step S905 or step S907, writing of the LED drive data SD is started in step S908. Specifically, by referring to the LED drive pattern table selected in step S905 or step S907, all LED drive data SD corresponding to the fluctuation start timing is acquired. Then, the data of the storage capacity (8 bits) of each of the data registers 141a and 141b of the acquired all LED drive data SD is converted into one of the data registers 141a and 141b (specifically, the first data register). Write to 141a).

  In a succeeding step S909, processing for outputting the clock signal SG1 is executed. Specifically, the information of "1" and the information of "0" are alternately set in the clock signal register 143. As a result, the transmission of the LED drive data SD is started. In this case, when the output of the clock signal SG1 is started, it is preset so that the LED drive data SD stored in the first data register 141a is first transmitted.

  After that, in step S910, the writing process of the LED drive data SD is executed. Specifically, the uninputted LED drive data SD is written into a data register different from the previously written data register. For example, if the LED drive data SD is written to the first data register 141a in the previous LED drive data writing process, the LED drive data SD is written to the second data register 141b. Switch the write target. In this case, the LED driving register 141 is configured to transmit the information of the data register which is not written. That is, the LED drive data SD is alternately written to the first data register 141a and the second data register 141b, and the LED drive data SD of the register which is not written is transmitted. .. As a result, the transmission period of the LED drive data SD can be shortened.

  In a succeeding step S911, it is determined whether or not all the LED drive data SD has been written to the LED drive register 141, and the LED drive data SD write process and the above determination process are repeated until the write is completed. Specifically, in step S911, it is determined whether or not there is LED drive data SD that has not yet been input to the LED drive register 141 among all the LED drive data SD. If it is determined in the determination process that there is uninput LED drive data SD, the uninput LED drive data SD is sequentially written in step S910.

  Here, the relationship between the writing of the LED driving data SD and the output of the clock signal SG1 will be described. The writing of the LED driving data SD is started and then the output of the clock signal SG1 is started. Specifically, the output of the clock signal SG1 is started after the first writing of the LED drive data SD. After that, the LED drive data SD is written while the writing process to the clock signal register 143 is performed so that the clock signal SG1 is output. This suppresses transmission of undefined information that does not correspond to the acquired LED drive data SD.

  Note that the determination process of step S911 is not limited to this, and for example, the number of times the writing process of the LED drive data SD is performed, and whether the count number is the number required to write all the LED drive data SD is determined. The determination may be made. Further, when the writing process of the LED drive data SD is performed, it may be configured to determine whether or not there is an empty area in the data register in which the writing is performed. The point is that it is optional as long as it can be specified that the writing of all the LED drive data SD has been completed.

  When the writing of the LED drive data SD is completed, the process proceeds to step S912, and the process of raising the data write signal SG2 is executed. Specifically, "0" is set to the data write signal register 145. As a result, the data write signal SG2 rises. In synchronization with the rising, each drive IC 191, 192, 203 outputs a signal corresponding to the LED drive data SD from each OUT terminal.

  Here, although illustration is omitted, a wait period for transmitting the last written LED drive data SD, specifically, a period for eight cycles of the clock signal SG1 is provided between step S911 and step S912. It is provided. This avoids the inconvenience of the data write signal SG2 rising before the last written LED drive data SD is transmitted. That is, the completion of the transmission of the LED drive data SD is specified by the determination process of step S911 (and the process of setting the wait period after the determination process is positively determined). In other words, it can be said that the determination process of step S911 is a process of determining whether or not the transmission of the LED drive data SD is completed.

  After that, in step S913, a process of stopping the clock signal SG1 is executed, and in step S914, other processes related to the control of the speaker unit 55 and the display control device 100 are executed, and the fluctuation start process is ended. To do.

  The operation of the first drive IC 191 and the second drive IC 192 when such processing is performed will be described with reference to the timing chart of FIG. 22A is a waveform of the clock signal SG1 input to the CLK terminal of the input port 171, FIG. 22B is a waveform of the LED drive data SD input to the DATA terminal of the input port 171, and FIG. 22(c) is a mode of each data area D0 to D7 and out data area DA, FIG. 22(d) is an output waveform of the DATAOUT terminal of the first drive IC 191, and FIG. 22(e) is each data area D8 to D15 and out. The mode of the data area DA, FIG. 22(f) shows the waveform of the data write signal SG2 input to the L terminal of the input port 171. The timings t12, t13, t15, t17, t18, and t21 are the rising timings of the clock signal SG1, and the timings t14, t16, and t19 are the falling timings of the clock signal SG1.

  First, at the timing of t11, writing of the LED drive data SD to the LED drive register 141 is started, and the output of the LED drive data SD is started. After that, at the timing of t12, the output of the clock signal SG1 is started, and the updating of the data areas D0 to D7 is started. In this case, since the clock signal SG1 is simultaneously input to the first drive IC 191 and the second drive IC 192, the data regions D8 to D15 are updated also in the second drive IC 192.

  Since the out data area DA of the first drive IC 191 is indefinite at the timing of t12, the second drive IC 192 acquires indefinite information. For convenience of explanation, a data area in which indeterminate information is stored is shown as blank. The output from the DATAOUT terminal when the out data area DA is indefinite is shown as 0V.

  After that, when the information “1” acquired at the timing of t12 is set in the data area D7 of the first driving IC 191 at the timing of t13, the subsequent falling timing of the clock signal SG1 is t14. At the timing of, the information of "1" is output from the DATAOUT terminal.

  Then, at the timing of t15, the data areas D0 to D7 of the first drive IC 191 are updated, and the data areas D8 to D15 of the second drive IC 192 are updated. In this case, since the information “1” is output from the DATAOUT terminal of the first drive IC 191, the second drive IC 192 sets the information “1” in the data area D8. On the other hand, the first drive IC 191 acquires new LED drive data SD in the data area D0 and sequentially shifts the information written in each of the data areas D0 to D7. As a result, the information in the data area D7 is updated to "0" and the information in the out data area DA is updated to "0".

  Then, at the timing of t16, the information of the out data area DA is output to the second drive IC 192 via the DATAOUT terminal. As a result, the output from the DATAOUT terminal becomes "0". Then, at the timing of t17, the second drive IC 192 shifts the information written in the data area D8 to the data area D9, and writes the information “0” in the data area D8.

  That is, by sequentially shifting the LED drive data SD from the first drive IC 191 toward the second drive IC 192 like a bucket relay, the LED drive data SD is sequentially set in the data areas D8 to D15 of the second drive IC 192. To be done. As a result, the LED drive data SD can be transmitted to the second drive IC 192 without directly setting the LED drive data SD to the second drive IC 192. Therefore, it is not necessary to separately provide a wiring for transmitting the LED drive data SD for each of the drive ICs 191 and 192, and thus the wiring for driving the LED 173 can be reduced.

  Here, the acquisition timing of the LED drive data SD (update timing of the data areas D0 to D16) in each drive IC 191, 192 and the transmission timing of the LED drive data SD (output timing of the out data area DA) are different. Specifically, the acquisition timing of the LED drive data SD is delayed from the transmission timing of the LED drive data SD by a half cycle of the clock signal SG1. As a result, a transmission error is less likely to occur when the LED drive data SD is transmitted between the drive ICs 191 and 192.

  That is, if the acquisition timing of the LED drive data SD and the transmission timing of the LED drive data SD are the same, whether the acquired LED drive data SD is the newly output LED drive data SD or has been output by then. The LED drive data SD that has been used is unknown and becomes unstable. In other words, the LED drive data SD may or may not be transmitted correctly. On the other hand, according to the present embodiment, the acquisition timing of the LED drive data SD is delayed from the transmission timing of the LED drive data SD by a predetermined period (half cycle of the clock signal SG1), so that the stable state is obtained. It becomes possible to acquire the LED drive data SD of. As a result, a transmission error of the LED drive data SD between the drive ICs 191 and 192 is unlikely to occur. Therefore, it is possible to avoid the inconvenience that may occur when the LED drive data SD is transmitted between the drive ICs 191 and 192.

  In particular, the same clock signal SG1 is used to shift the acquisition timing of the LED drive data SD and the transmission timing of the LED drive data SD. Specifically, the data areas D0 to D15 are updated at the rising edge of the clock signal SG1, while the LED drive data SD is output at the falling edge of the clock signal SG1. As a result, even if the clock signal SG1 is delayed by the influence of noise, parasitic capacitance, etc. and input to each drive IC 191, 192, a period corresponding to the shift, specifically, a half cycle of the clock signal SG1. The period of minutes is secured. As a result, it is possible to avoid the inconvenience that the acquisition timing and the transmission timing are synchronized with each other due to the delay of the clock signal SG1.

  The interval from the rise to the fall of the clock signal SG1, that is, the pulse width, is set to be longer than the period required for updating the updating circuit 191a and the like. This can prevent the LED drive data SD from being output before the update of the update circuit 191a is completed.

  Furthermore, the interval from the falling edge to the rising edge of the clock signal SG1 is set to be longer than the period required to output the LED drive data SD in the out data area DA. As a result, it is possible to prevent the update process of the update circuit 191a from being performed before the output of the LED drive data SD is completed and to cause a transmission error of the LED drive data SD.

  The interval between the acquisition timing and the transmission timing can be easily realized by adjusting the duty ratio and frequency of the clock signal SG1. In other words, by adjusting the duty ratio and frequency of the clock signal SG1, the acquisition timing of the LED drive data SD and the output of the LED drive data SD from the out data area DA are reduced so that a transmission error of the LED drive data SD is less likely to occur. The interval with the timing can be adjusted. As a result, the occurrence of transmission error of the LED drive data SD can be reduced more favorably.

  Further, the clock signal SG1 is configured to be input in parallel to each of the drive ICs 191 and 192. As a result, the clock signal SG1 is less likely to shift between the drive ICs 191 and 192, and the inconvenience of the acquisition timing and the transmission timing being synchronized due to the clock signal SG1 shifting is avoided.

  Similarly, for the third drive IC 203, the LED drive data SD is acquired from the second drive IC 192 and the acquired LED drive data SD is set in the data area D0. In this case, the acquisition timing of the LED drive data SD is delayed with respect to the output timing of the LED drive data SD, similar to the transmission of the LED drive data SD between the first drive IC 191 and the second drive IC 192.

  Incidentally, the delay of the LED drive data SD will be described. The transmission distance of the LED drive data SD in each drive IC 191, 192, 203 is sufficiently shorter than the transmission distance between the drive ICs 191, 192 or between the drive ICs 192, 203. Therefore, the delay caused by the transmission of the LED drive data SD between the drive ICs 191 and 192 or between the drive ICs 192 and 203 is dominant.

  After that, at the timing of t18, the writing of the LED drive data SD to the LED drive register 141 is completed, and the transmission of the LED drive data SD to each drive IC 191, 192 is completed. The period from the timing t11 to the timing t18 is the period required to transmit the LED drive data SD.

  Here, the LED drive data SD when the winning announcement effect is not performed, that is, the LED drive data SD set in the LED drive pattern table corresponding to other effects (in the following description, also simply referred to as normal LED drive data SDa) Has only information corresponding to the first drive IC 191 and the second drive IC 192, and does not have information corresponding to the third drive IC 203. Specifically, the normal LED drive data SDa corresponds to only the data areas D0 to D15 and has 16-bit information as a whole. As a result, the processing load of the writing process of the LED drive data SD is reduced by the amount of processing related to the setting of the LED drive data SD corresponding to the winning notification LED 37, and the period required for the transmission of the LED drive data SD is reduced. ing.

  Further, if a data area (specifically, a data area corresponding to the output of the OUT16 terminal of the third driving IC 203) that controls the drive control of the winning notification LED 37 is arranged on the upstream side of the data areas D0 to D15, The LED drive data SD corresponding to the data areas D0 to D15 is set via the data area corresponding to the winning notification LED 37, and the period required for transmission of the LED drive data SD becomes longer by the amount of the above passage. ..

  On the other hand, according to the present embodiment, since the third drive IC 203 that drives the winning notification LED 37 is arranged on the downstream side of the first driving IC 191 and the second driving IC 192, the winning notification LED 37 is displayed. The data area corresponding to is arranged on the downstream side of each of the data areas D0 to D15. As a result, the LED drive data SD is set for each of the data areas D0 to D15 without passing through the data area corresponding to the winning notification LED 37, so that the third drive IC 203 is arranged on the upstream side in comparison. Thus, it is possible to shorten the period required to transmit the LED drive data SD.

  After that, the data write signal SG2 rises at the timing of t19. In synchronization with the rising of the data write signal SG2, the LED drive data SD written in the update buffers 191c and 192c on condition that the first permission signal SG3 is LOW is the register 191b of the drive ICs 191 and 192. The LEDs 173 written in 192b and connected to the driving ICs 191 and 192 are driven. On the other hand, since the second permission signal SG4 is HI, the third driving IC 203 does not operate. A period T3 from the timing t11 to the timing t19 is a period required for each drive IC 191 and 192 to control each LED 173, and is a period required to control each LED 173 when the winning notification effect is not performed.

  The period T3 is set to be shorter than 4 msec which is the execution cycle of the sound emission control process. Specifically, the frequency of the clock signal SG1 is set such that the period T3 is shorter than the execution cycle of the sound emission control process, and specifically, the frequency of the clock signal SG1 is set to several hundred MHz. As a result, the setting of the mode of each LED 173 is completed within the execution cycle of the sound emission control process.

  Moreover, since the LED drive data SD is written to the register 122 by the rise of the data write signal SG2 after the transmission of the LED drive data SD is completed, the LEDs 173 are driven simultaneously. As a result, variations in the drive timing of the LEDs 173 that may occur due to the sequential transmission of the LED drive data SD are prevented.

  Then, at the timing of t20, the output of the clock signal SG1 is stopped. As a result, the drive ICs 191 and 192 maintain the currently set state. Therefore, each LED 173 maintains its light emitting mode for a predetermined period after the timing of t19, specifically, until the next LED drive data SD is transmitted and the rising of the data write signal SG2 occurs. Becomes

  After that, at the timing of t21, each of the data areas D0 to D15 is updated based on that the clock signal SG1 is input again and the LED drive data SD is input.

  Returning to the description of the sound emission control process (FIG. 20 ), if the variation command is not received, the process proceeds to step S803, and it is determined whether or not the variation is in progress. If it is changing, the process proceeds to step S804, and the changing process for updating the LED drive data SD is executed.

  The changing process will be described with reference to the flowchart of FIG.

  First, in step S1001, it is determined whether it is the update timing of the LED drive data SD by referring to the LED drive pattern table. As already described, period information indicating the period from the fluctuation start timing is set in the LED drive pattern table, and whether or not the elapsed period from the fluctuation start timing in this processing time corresponds to the above period information. To judge.

  If it is not the update timing of the LED drive data SD, the process proceeds to step S1016, and if it is the update timing of the LED drive data SD, in step S1002, it is determined whether or not the current game time corresponds to the winning notification effect. Determine whether. Specifically, it is determined whether or not the selected LED drive pattern table is a variation pattern table corresponding to the winning notification effect.

  If the LED drive pattern table corresponds to the winning notification effect, the process proceeds to step S1003. In step S1003, it is determined whether or not it is the winning notification effect start timing by referring to the LED drive pattern table. In the LED drive pattern table corresponding to the winning notification effect, specific information capable of specifying the winning notification effect start timing in association with the period information is set, and in the process of step S1003, the specific information is set. It is determined whether it has been done.

  If it is the winning notification effect start timing, the process advances to step S1004 to set “0” in the second permission signal register 148. As a result, the second permission signal SG4 becomes LOW, the third drive IC 203 becomes operable, and the n-type MOSFET 212 of the voltage application circuit 202 is turned on.

  In a succeeding step S1005, a process of updating the LED drive data SD is executed. Specifically, by referring to the LED drive pattern table, the LED drive data SD corresponding to this processing time is grasped. The LED drive data SD is data set so that the winning notification LED 37 emits light. Specifically, the LED drive data SD is “0” data so that “0” is output from the OUT16 terminal of the third drive IC 203. Has been added. That is, since the LED drive data SD (hereinafter, also referred to as the specific LED drive data SDb) for performing the winning notification effect has the data that determines the output mode of the third driving IC 203, the winning notification effect is performed. The information amount is set to be larger than the LED drive data SD (normal LED drive data SDa) that is set when there is no information, and has an information amount of 17 bits as a whole.

  On the other hand, if it is not the timing to start the winning notification effect, the process advances to step S1006 to determine whether it is the timing to end the winning notification effect. Specifically, in the LED pattern table corresponding to the winning notification effect, specific information for setting the end timing of the winning notification effect is set in association with the period information, and in the process of step S1006, It is determined whether or not the specific information is set.

  If it is determined that it is not the timing for ending the winning notification effect, the process advances to step S1007 to execute a process of updating the LED drive data SD. Specifically, by referring to the LED drive pattern table corresponding to the winning notification effect, the LED drive data SD corresponding to this processing time is grasped. The LED drive data SD is the specific LED drive data SDb set so that the winning notification LED 37 emits light. Specifically, “0” is output from the OUT16 terminal of the third drive IC 203. This is data to which information "0" is added.

  On the other hand, when it is determined that it is the end timing of the winning notification effect, the process proceeds to step S1008, and “1” is written in the second permission signal register 148. As a result, the second permission signal SG4 becomes HI.

  Then, in step S1009, a process of updating the LED drive data SD is executed. Specifically, by referring to the LED drive pattern table corresponding to the winning notification effect, the LED drive data SD corresponding to this processing time is grasped. The LED drive data SD does not include data that determines the output mode of the third drive IC 203, but only data that determines the output mode of the first drive IC 191 and the second drive IC 192. This is the data SDa.

  That is, when the winning notification effect is performed, the specific LED drive data SDb to which the data determining the output mode of the third drive IC 203 is added is updated over the period of the winning notification effect. The specific LED drive data SDb is the LED drive data SD set to be output LOW from the OUT16 terminal of the third drive IC 203.

  Here, the update timing of the LED drive data SD is set so that the LOW signal output from the OUT16 terminal of the third drive IC 203 continues at least a plurality of processing times (specifically, three times). As a result, the LOW signal output from the OUT16 terminal continues for a period corresponding to a plurality of processing times. The LED drive pattern table is not limited to the above-described configuration. For example, in the LED drive pattern table corresponding to the winning effect, the LED drive data SD output LOW from the OUT16 terminal of the third drive IC 203 over a period corresponding to a plurality of processing times. It may be configured to be updated.

  If the current game time does not correspond to the winning notification effect (step S1002: NO), the LED drive data update process is executed in step S1010. Specifically, by referring to the LED drive pattern table selected in the current game time, specifically, the LED drive pattern table corresponding to other effects, the LED drive data SD corresponding to the current process time can be obtained. Figure out The LED drive data SD is normal LED drive data SDa.

  After the processing of step S1005, step S1007, step S1009 or step S1010 is executed, the drive control processing of each LED 173 and the winning notification LED 37 is executed in step S1011 to step S1016. Since the process is the same as steps S908 to S913 of the fluctuation start process, description thereof will be omitted. Then, in step S1017, other processing is executed, and the present changing processing ends. Since this and other processes are the same as those in step S914, description thereof will be omitted.

  Next, the operation of the winning notification LED 37 when the above process is performed will be described with reference to the timing chart of FIG. 24A shows the execution timing of the sound emission control process, FIG. 24B shows the waveform of the second permission signal SG4 input to the E2 terminal of the input port 171, and FIG. 24C shows the waveform. FIG. 24D shows the output waveform of the OUT16 terminal, FIG. 24D shows the gate voltage of the p-type MOSFET 211, and FIG. 24E shows the operation mode of the winning notification LED 37. The timings of t31, t33, t34, and t36 indicate the execution timing of the voice emission control process performed by the sub CPU 111, and the period Ta indicates the execution cycle (specifically, 4 msec) of the voice emission control process.

  In the sound emission control process at the timing of t31, the process related to the start of the winning notification effect (step S1004 to step S1005) is performed, and the second permission signal SG4 becomes LOW by the process (see FIG. 24(b)).

  Then, at the timing of t32 when the period required for the transmission of the LED drive data SD (the period T3 shown in FIG. 24) has elapsed from the timing of t31, the LOW signal is output from the OUT16 terminal of the third drive IC 203 (FIG. 24). (See (c)). The period T3 is a period sufficiently shorter than 4 msec (the period shown by Ta in FIG. 24) which is the execution cycle of the sound emission control process, but is shown with a predetermined interval for the sake of drawing.

  Based on the output of the LOW signal from the OUT16 terminal of the third drive IC 203, as shown in FIG. 24D, the gate voltage input to the gate of the p-type MOSFET 211 due to the transient phenomenon of the time constant circuit 221. Gradually decreases.

  After that, the threshold voltage Vth at which the p-type MOSFET 211 is turned on becomes the threshold voltage Vth at the timing of t35 after the audio emission control processing is performed twice at the timing of t33 and the timing of t34. As a result, the p-type MOSFET 211 is turned on, a voltage is applied to the winning notification LED 37, and the winning notification LED 37 emits light. The light emission allows the player to recognize that the jackpot has been won.

  In this case, the ON timing of the p-type MOSFET 211 with respect to the LOW signal output timing from the third driving IC 203 is delayed by the time constant circuit 221 for the delay period T4 from the timing of t2 to the timing of t35. The delay period T4 is set to be longer than the execution cycle (period Ta) of the sound emission control process, and is specifically set to a plurality of process periods. As a result, when the LOW signal from the third driving IC 203 continues for a plurality of processing times, the winning notification LED 37 emits light. As a result, even if the LOW signal is temporarily output from the third drive IC 203 due to a transmission error or noise of the LED drive data SD, the winning notification LED 37 does not emit light. As a result, it is possible to avoid the inconvenience that the winning notification LED 37 malfunctions when it is not intended.

  Here, as already described, since the winning notification LED 37 is set to emit light when it is a big hit, whether or not the winning notification LED 37 emits light is an important point for the player. .. Therefore, the player's attention to the winning notification LED 37 is high. Further, in order to increase the impact on the player due to the emission of the winning notification LED 37, the emission intensity of the winning notification LED 37 is set higher than that of the other LEDs 173, and the position is relatively easy for the player to see. It is provided on the frame 32. Therefore, the malfunction of the winning notification LED 37 is likely to be conspicuous, and the player is likely to misunderstand.

  On the other hand, according to the present embodiment, since the time constant circuit 221 is provided, the LOW signal is temporarily output from the third drive IC 203 due to a transmission error or noise of the LED drive data SD. However, the winning notification LED 37 does not emit light.

  Although the delay period T4 is set to be longer than twice the execution cycle of the sound emission control process, the delay period T4 is not limited to this and may be, for example, three times, four times,.

  After that, at the timing of t36, when the process (step S1008 to step S1009) related to the end timing of the winning notification effect is executed, the second permission signal SG4 becomes HI. When the second permission signal SG4 becomes HI, the n-type MOSFET 212 of the voltage application circuit 202 is turned off. As a result, the winning notification LED 37 is immediately turned off and does not emit light.

  Further, based on the fact that the second permission signal SG4 becomes HI, the third drive IC 203 does not operate, and the output from each OUT terminal of the third drive IC 203 becomes open. In this case, since the gate voltage of the p-type MOSFET 211 is pulled up, the gate voltage of the p-type MOSFET 211 gradually increases. Then, at the timing of t37, the gate voltage of the p-type MOSFET 211 becomes the threshold voltage Vth, and after the timing of t37, the p-type MOSFET 211 is turned off.

  That is, the timing at which the winning notification LED 37 emits light is delayed by the time constant circuit 221 by a predetermined period (a period including the period T3 and the delay period T4) with respect to the execution timing of the process related to the start of the winning notification effect. On the other hand, the timing at which the winning notification LED 37 stops emitting is immediately after the process related to the stopping of the winning notification effect is performed, regardless of the time constant circuit 221. As a result, it is possible to quickly stop the emission of the winning notification LED 37 while suppressing the malfunction of the winning notification LED 37.

  That is, since the time constant circuit 221 is provided, the timing at which the p-type MOSFET 211 is turned off is delayed with respect to the timing at which the second permission signal SG4 is HI. For this reason, the light emission stop of the winning notification LED 37 is delayed, and the winning notification effect may not be appropriately performed. In particular, the delay period T5 (the period T5 from the timing t36 to the timing t37) becomes longer as the delay period T4 becomes longer. For this reason, if the delay period T4 is set to be long from the viewpoint of preventing malfunction, the stop timing of the winning notification effect becomes large and the winning notification effect is likely to be hindered.

  On the other hand, according to the present embodiment, since the n-type MOSFET 212 that switches the voltage application to the winning notification LED 37 by being turned on/off according to the second permission signal SG4 is provided, the second permission signal is provided. By controlling SG4, it is possible to immediately stop the emission of the winning notification LED 37 regardless of the time constant circuit 221.

  Further, the second permission signal SG4 is set to be LOW only while the winning notification presentation effect is being performed. As a result, when the winning notification effect is not produced, the third drive IC 203 does not operate (outputs from all OUT terminals are open), and the voltage applying circuit 202 does not operate (voltage for the winning notification LED 37 is increased). Is not applied). Therefore, malfunction of the winning notification LED 37 is less likely to occur.

  Here, since the winning notification LED 37 is set to emit light in the case of a big hit, the frequency of light emission is lower than that of the other LEDs 173 or the like which are constantly lit. Focusing on this point, the first permission signal SG3 is input to the first drive IC 191 and the second drive IC 192 that drive the LED 173 having a relatively high light emission frequency, while the second permission signal SG4 is input. It can be said that is set to be input to the third drive IC 203 that drives the winning notification LED 37 having a relatively low light emission frequency. In this case, by setting the first permission signal SG3 to LOW at all times and setting the second permission signal SG4 to HI, it can be said that the malfunction of the LED with low light emission frequency is suppressed.

  Returning to the description of the sound emission control process (FIG. 20), if it is determined that the fluctuation is not occurring (step S803: NO), it is determined in step S805 whether or not it is the fluctuation end timing. If it is the change end timing, the process proceeds to step S806, and the LED drive pattern table corresponding to the change end timing is grasped by referring to the currently selected LED drive pattern table.

  In a succeeding step S807, a process of controlling the LED 173 is executed using the grasped LED drive data SD. Specifically, the processing of steps S908 to S913 is executed. Then, in step S808, the clock signal SG1 is stopped and the sound emission control process is ended.

  On the other hand, if it is not the change end timing, in step S809, other command response processing is executed, and this voice emission control processing is ended. In the other command corresponding processing, the received command is specified and the processing corresponding to the command is executed.

  According to this embodiment described in detail above, the following excellent effects are exhibited.

  A plurality of drive ICs 191, 192, 203 capable of individually driving the plurality of LEDs 173 and the winning notification LED 37 are provided, and the respective drive ICs 191, 192, 203 are connected in series. Then, the LED drive data SD that determines the light emission mode of the LED 173 and the winning LED 37 is transmitted between the drive ICs 191, 192, and 203. As a result, it is possible to reduce the number of wires that connect the audio lamp control board 110 that outputs the LED drive data SD and the LED board 91, and connect the input port 171 and each drive IC 191, 192, 203 in the LED board 91. Wiring required can be reduced. As a result, malfunction of the winning notification LED 37 and the like due to interference between wirings can be suppressed.

  Further, the data areas D0 to D16 are updated in synchronization with the rising edge of the clock signal SG1, while the LED drive data SD set in the out data area DA is output in synchronization with the falling edge of the clock signal SG1. And As a result, even when the clock signal SG1 is delayed due to the influence of noise, interference between wirings, etc., the acquisition timing of the LED drive data SD (update timing of each data area D0 to D16) and the LED drive data SD A predetermined period (half cycle of the clock signal SG1) is secured between the output timing and the output timing. Therefore, it is possible to suppress the transmission error of the LED drive data SD due to the above influence and to suppress the complication of the configuration due to the use of the plurality of clock signals.

  Further, according to the above configuration, by adjusting the duty ratio and the frequency of the clock signal SG1, the transmission error of the LED drive data SD occurs between the acquisition timing of the LED drive data SD and the output timing of the LED drive data SD. It can be adjusted to difficult intervals. As a result, it is possible to more appropriately suppress the occurrence of transmission errors.

  A time constant circuit 221 for delaying the signal output from the OUT16 terminal is provided on the wiring connecting the OUT16 terminal and the gate of the p-type MOSFET 211. The time constant circuit 221 is configured to output the LOW signal to the gate of the p-type MOSFET 211 when the LOW signal as the drive signal is output from the OUT16 terminal for a predetermined period. As a result, even when the LOW signal is temporarily output from the OUT16 terminal due to the influence of noise or the like, the winning notification LED 37 does not emit light, and thus malfunction of the winning notification LED 37 due to noise or the like can be suppressed. ..

  In particular, since the LOW signal is delayed by the time constant circuit 221, it is not necessary for the sub CPU 111 side to determine whether or not a predetermined period has elapsed. As a result, the processing load on the sub CPU 111 can be reduced.

  Further, since the time constant circuit 221 is provided on the wiring connecting the OUT16 terminal and the gate of the p-type MOSFET 211, it is not necessary to provide the voltage application circuit 202 with a circuit for counting the predetermined period. As a result, it is possible to suppress the loss of power applied by the voltage application circuit 202 to the winning notification LED 37. Therefore, a current can be suitably flown to the winning notification LED 37, and the emission brightness of the winning notification LED 37 can be suitably increased.

  Furthermore, the time constant circuit 221 has a frequency characteristic that cuts off a signal having a frequency higher than a specific frequency. As a result, high frequency noise mixed in the signal input to the gate of the p-type MOSFET 211 can be removed. As a result, malfunction of the winning notification LED 37 due to high frequency noise can be suppressed.

  Each drive IC 191, 192, 203 is configured to operate when the permission signal is in a predetermined mode (specifically, LOW). In such a configuration, for the drive ICs 191 and 192 that set the first permission signal SG3 and the second permission signal SG4 as the permission signals in different systems, and drive the LED 173 that is frequently used (usually used). While allowing the first permission signal SG3 to be input, the second permission is given to the third drive IC 203 that drives the winning notification LED 37 that is used at a low frequency (used when performing the winning notification effect). The signal SG4 is input. Accordingly, when other effects are performed (when the winning notification effect is not performed), by setting the second permission signal SG4 to HI, it is possible to suppress the malfunction of the third driving IC 203, and other It is possible to avoid the inconvenience that the winning notification LED 37 emits light in the situation of performing the effect.

  A voltage application circuit 202 for applying a voltage to the winning notification LED 37 is provided. The voltage application circuit 202 is configured to apply a voltage to the winning notification LED 37 when (A) a LOW signal is output from the OUT16 terminal and (B) the second permission signal SG4 is LOW. Has been done. The output signal from the OUT16 terminal and the second permission signal SG4 are in different systems. As a result, the winning notification LED 37 does not emit light even when noise that may cause a malfunction is mixed in either one of them.

  Further, the voltage application circuit 202 is configured so that the current flowing through the winning notification LED 37 does not flow into the third drive IC 203. Accordingly, it is possible to avoid the inconvenience that a large current flows into the third drive IC 203 and the third drive IC 203 fails.

<Second Embodiment>
In this embodiment, the configuration of the drive IC is different from that of the first embodiment. Specifically, in the first embodiment, the first drive IC 191 and the like are configured to sequentially shift the LED drive data SD at each rising timing of the clock signal SG1, but in the present embodiment, instead of this, At each rising timing of the clock signal SG1, an empty buffer is specified in the update buffer, and the LED drive data SD is sequentially set in the empty buffer.

  The first drive IC 301 and the second drive IC 302 of this embodiment will be described with reference to FIG. FIG. 25 is a block diagram showing the internal configuration of the drive IC in this embodiment. Since the first drive IC 301 and the second drive IC 302 have the same configuration, only the first drive IC 301 will be described.

  Similar to the first embodiment, the first drive IC 301 is configured to receive the LED drive data SD, the clock signal SG1, the data write signal SG2, and the first permission signal SG3. Further, the first driving IC 301 is newly provided with a Z terminal as an input terminal, and the Z terminal is stored in the register 122 of the sub CPU 111 via the input port 171 of the LED board 91 and the output port 131 of the audio lamp control board 110. It is connected to the provided acquisition permission flag register. The acquisition permission flag is configured to be set when the writing process of the LED drive data SD (step S908 or the like) is started. Then, when the setting of the LED drive data SD is completed, the acquisition permission flag is configured to be deleted in detail in the process of turning off the clock signal SG1 (step S913 and the like).

  Similar to the first embodiment, the first drive IC 301 includes an update circuit 301a and a register 301b, and the update circuit 301a includes an update buffer 301c. The update buffer 301c includes data areas D0 to D7 and an out data area DA, and also includes a set flag area DF and an acquisition permission flag area DZ. The acquisition permission flag area DZ is connected to the Z terminal of the second drive IC 302 via the output terminal.

  The update circuit 301a is configured to output the data set in the out data area DA in synchronization with the falling edge of the clock signal SG1 as in the first embodiment. Here, the out data area DA in the present embodiment is not a copy area of the data area D7, and is configured such that the LED drive data SD is separately set by the update circuit 301a.

  The out data area DA, the set flag area DF, and the acquisition permission flag area DZ are configured to be cleared to 0 at a predetermined timing, specifically, in the process of turning off the clock signal SG1 (step S913 and the like). ..

  Next, the update process executed by the update circuit 301a will be described with reference to the flowchart of FIG. The update process is executed in synchronization with the rising edge of the clock signal SG1.

  First, in step S1101, it is determined whether the acquisition permission flag is set. Specifically, in the case of the first drive IC 301, it is determined whether or not the acquisition permission flag is set in the acquisition permission flag register of the sub CPU 111, and in the case of the second drive IC 302, the first drive IC 302 It is determined whether the acquisition permission flag is set in the acquisition permission flag area DZ of the drive IC 301. When the acquisition permission flag is not set, the update processing is ended as it is, while when the acquisition permission flag is set, the process proceeds to step S1102, and the LED drive data SD is acquired.

  After that, in step S1103, it is determined whether or not the set flag is set in the set flag area DF. The set flag is a flag that is set when the setting of the LED drive data SD for each of the data areas D0 to D7 is completed.

  If the set flag is not set, the process proceeds to step S1104, and the acquired LED drive data SD is sequentially set in the empty areas that have not been set in the data areas D0 to D7. In this case, it is determined whether or not the data area is vacant in the order of the data area D0→the data area D1→..., If the data area is vacant, the acquired LED drive data SD is set. As a result, the LED drive data SD is set in the order of data area D0→data area D1→....

  Instead of the process of determining whether or not there is an empty space, a counter circuit may be separately provided and a process of updating the counter each time the data areas D0 to D7 are set. In this case, by referring to the value of the counter, it is preferable to execute the process of specifying the data area in which the LED drive data SD should be set in the current process.

  In a succeeding step S1105, it is determined whether or not the setting of the LED drive data SD has been completed for all the data areas D0 to D7. If the setting of all the data areas D0 to D7 has not been completed, the update processing is ended as it is, while if the setting of all the data areas D0 to D7 has been completed, the set flag is set in step S1106. The already set flag is set in the area DF, and this update processing ends.

  On the other hand, when the set flag is set (step S1103: YES), the process proceeds to step S1107. In step S1107, the acquired LED drive data SD is set in the out data area DA.

  After that, in step S1108, the acquisition permission flag is set in the acquisition permission flag area DZ, and the present update processing ends.

  When this process is performed, the LED drive data SD is sequentially set in the data areas D0 to D7 of the first drive IC 301, and when the setting is completed, the acquired LED drive data SD is the out data. It is output toward the second drive IC 302 via the area DA. In this case, the information set in each data area D0 to D7 is not shifted. That is, when the setting of the LED drive data SD for each of the data areas D0 to D7 is completed, the first drive IC 301 outputs the acquired LED drive data SD as it is toward the second drive IC 302. .. Then, the update circuit 302a of the second drive IC 302 updates the LED drive data SD input from the first drive IC 301, on condition that the acquisition permission flag is set in the acquisition permission flag area DZ of the first drive IC 301. The data areas D8 to D15 of the update buffer 302c provided in the circuit 302a are sequentially set.

  In this case, the acquisition permission flag is set after setting the LED drive data SD in the out-data area DA, and thus the LED drive data SD is set in the second after the LED drive data SD is set in the out-data area DA of the first drive IC 301. The drive IC 302 acquires the information in the out data area DA. As a result, the dummy data that is not the LED drive data SD is acquired by the second drive IC 302, and the dummy data is not set in the empty area. This avoids setting dummy data for each of the data areas D8 to D15.

<Third Embodiment>
In the first embodiment and the like described above, the clock signal SG1 is input in parallel to each of the drive ICs 191 and 192. On the other hand, in the present embodiment, the clock signal SG1 is input in series to each drive IC. Then, each drive IC is configured to transmit the clock signal SG1 to the connected drive IC when a predetermined condition is satisfied.

  The first drive IC 401 and the second drive IC 402 of this embodiment will be described with reference to FIG. FIG. 27 is a block diagram showing the internal structure of the drive IC in this embodiment. Since the first drive IC 401 and the second drive IC 402 have the same configuration, only the first drive IC 401 will be described.

  The first drive IC 401 includes an update circuit 401a and a register 401b, and the update circuit 401a is provided with an update buffer 401c. The update buffer 401c is provided with the data areas D0 to D7 and the out-data area DA, as well as the set flag area DF. Since these are the same as those described in the first and second embodiments, detailed description thereof will be omitted.

  Here, the update buffer 401c is provided with a clock signal permission flag area DC that controls the transmission of the clock signal SG1. The clock signal permission flag area DC has 1-bit information, and is configured to be able to store the clock signal permission flag. When the clock signal permission flag is set in the clock signal permission flag area DC, that is, when the information of "1" is set, the clock signal SG1 is used as the clock as the output terminal provided in the first drive IC 401. On the other hand, when the clock signal permission flag is not set in the clock signal permission flag area DC, that is, when the information of "0" is set, the clock is output through the signal terminal. It is configured not to output the signal SG1.

  Here, in the clock signal permission flag area DC, information of "0" is set in the initial state. Specifically, the first drive IC 401 has a configuration in which the startup process is performed when the power is turned on, and the configuration is such that “0” is set in the clock signal permission flag area DC in the startup process. Has become.

  Like the first and second embodiments, the update circuit 401a having such a configuration executes an update process of acquiring the LED drive data SD and updating each of the data areas D0 to D7 in synchronization with the rising edge of the clock signal SG1. At the same time, the process of outputting the data stored in the out data area DA is executed in synchronization with the fall of the clock signal SG1.

  The update process performed by the update circuit 401a will be described with reference to the flowchart of FIG.

  First, in step S1201, the LED drive data SD is acquired. Then, in step S1202, a process of determining whether or not the set flag is set in the set flag area DF is executed.

  When the set flag is not set, the process proceeds to step S1203, and the acquired LED drive data SD is sequentially set in the empty areas that have not been set in the data areas D0 to D7. In this case, it is determined whether or not the data areas D0 to D7 are vacant in the order of the data area D0→the data area D1→.. If the data areas D0 to D7 are vacant, the acquired LED drive data SD is set. As a result, the LED drive data SD is set in the order of data area D0→data area D1→....

  In a succeeding step S1204, a process of determining whether or not the setting of all the data areas D0 to D7 is completed is executed. If the setting of all the data areas D0 to D7 has not been completed, the update processing is terminated as it is, while if the setting of all the data areas D0 to D7 has been completed, the process proceeds to step S1205 and the setting is completed. A flag is set and this update processing is completed.

  On the other hand, when the set flag is set (step S1202: YES), the process proceeds to step S1206. In step S1206, a process of setting the acquired LED drive data SD in the out data area DA is executed.

  After that, in step S1207, the clock signal permission flag is set in the clock signal permission flag area DC, and the present update processing ends. The clock signal SG1 is output to the second driving IC 402 based on the setting of the clock signal permission flag. As a result, the update process of the second drive IC 402 is started, and the LED drive data SD is set in the second drive IC 402.

  When such a process is performed, the LED drive data SD for the first drive IC 401 is set, and then the LED drive data SD for the second drive IC 402 is set. In this case, the LED drive data SD and the clock signal SG1 are input to the second drive IC 402 after the LED drive data SD is set for the first drive IC 401. This avoids the inconvenience of updating the second drive IC 402 before the transmission of the LED drive data SD is started, obtaining dummy data that is not the LED drive data SD, and setting the dummy data in the empty area. can do.

<Fourth Embodiment>
In the first embodiment, each drive IC 191, 192, 203 is configured to operate using the same clock signal SG1. On the other hand, in the present embodiment, the input clock signals are different between the drive ICs 191, 192 and 203. The different points will be described with reference to FIG. FIG. 29 is a block diagram of various circuits mounted on the LED board 91. The same components as those in the first embodiment are designated by the same reference numerals and the description thereof will be omitted.

  A phase shift circuit 501 that shifts the phase of the clock signal SG1 by a predetermined amount is provided on the wiring that connects the CLK terminal of the second drive IC 192 and the CLK terminal of the input port 171. The phase shift circuit 501 has a position that does not affect the clock signal SG1 input to the first driving IC 191, specifically, a wiring that connects the CLK terminal of the second driving IC 192 and the CLK terminal of the input port 171. The first driving IC 191 and the second driving IC 192 are provided at downstream positions on the side of the second driving IC 192 with respect to branch points branching from each other. The phase shift circuit 501 delays the phase of the clock signal SG1 by a predetermined amount (specifically, 1/4 cycle) based on the input of the clock signal SG1 via the input port 171, and also delays the phase. The delayed clock signal DSG1 is output to the second drive IC 192. In this case, the rising timing of the delayed clock signal DSG1 input to the second driving IC 192 is delayed by a predetermined amount with respect to the rising timing of the clock signal SG1 input to the first driving IC 191, so the first driving IC 191 The update of each data area D0 to D7 in the above and the update of each data area D8 to D15 in the second drive IC 192 are not performed at the same time. Accordingly, even if the LED drive data SD stored in the out data area DA is output in synchronization with the rising of the clock signal SG1, the output timing of the LED drive data SD in the first drive IC 191 and The acquisition timing of the LED drive data SD in the second drive IC 192 does not match. As a result, it is possible to suppress a transmission error of the LED drive data SD that may be caused by the coincidence of the output timing and the acquisition timing.

  The delayed clock signal DSG1 whose phase is shifted by the phase shift circuit 501 is output to the second driving IC 192 and also to the third driving IC 203 of the winning notification circuit 201. Specifically, the phase shift circuit 501 is connected in parallel to the second drive IC 192 and the third drive IC 203.

  Here, a phase shift circuit 502 is further provided on the wiring connecting the phase shift circuit 501 and the third drive IC 203. The phase shift circuit 502 has the same internal configuration as the phase shift circuit 501, and delays the delayed clock signal DSG1 output from the phase shift circuit 501 by a predetermined amount (specifically, 1/4 cycle) to perform the third driving. It is configured to output to the IC 203. As a result, the delayed clock signal DSG2 input to the third driving IC 203 is delayed by ¼ cycle with respect to the delayed clock signal DSG1 input to the second driving IC 192. In this case, the delayed clock signal DSG2 input to the third driving IC 203 is delayed by a half cycle with respect to the clock signal SG1 input to the first driving IC 191.

  With this configuration, the clock signals SG1, DSG1, and DSG2 having different phases are input to the drive ICs 191, 192, and 203, respectively, so that the update timing is different in each drive IC 191, 192, and 203. As a result, each drive IC 191, 192, 203 temporarily acquires the LED drive data SD in synchronization with the rising of each clock signal SG1, DSG1, DSG2, updates each data area D0 to D16, and outputs the out data area. Even if the LED drive data SD set to DA is output, a transmission error of the LED drive data SD is unlikely to occur.

  In particular, the clock signal that triggers the operation is set to be gradually delayed from the drive IC on the upstream side (first drive IC 191) to the drive IC on the downstream side (third drive IC 203) (clock signal SG1). → delayed clock signal DSG1 → delayed clock signal DSG2). As a result, the LED drive data SD is acquired by the downstream drive IC after the setting of the out data area DA by the upstream drive IC is completed. The inconvenience of acquiring can be avoided.

  Although the phase shift circuits 501 and 502 that shift the phase of the clock signal SG1 are provided in the present embodiment, the present invention is not limited to this, and a configuration may be provided in which a modulation circuit that changes the duty ratio is provided. Even in this case, the rising timing of the clock signal input to each drive IC 191, 192, 203 can be shifted.

<Fifth Embodiment>
In this embodiment, the configuration of the winning notification circuit 601 is different from that of the first embodiment. The different points will be described with reference to FIG. FIG. 30 is a circuit diagram showing a winning notification circuit 601 according to the present embodiment.

  As shown in FIG. 30, the winning notification circuit 601 in the present embodiment is configured so that the discharge control signal SG5 is input in addition to the clock signal SG1, the data write signal SG2, and the second permission signal SG4. .. Specifically, the register 122 of the sub CPU 111 (see FIGS. 13 and 14) is provided with a discharge control signal register for outputting the discharge control signal SG5. The discharge control signal register has a storage capacity of 1 bit, and information of "0" is usually written therein. The discharge control signal register is connected to the data output circuit 134. When the information of “1” is written in the discharge control signal register or when the information of the discharge control signal register is indefinite, the data output circuit 134 is connected to the S terminal provided in the output port 131. And outputs a LOW signal. On the other hand, the data output circuit 134 outputs the HI signal to the S terminal of the output port 131 when the information of “0” is written in the discharge control signal register.

  The S terminal of the output port 131 is connected to the S terminal provided on the input port 171 of the LED board 91 (see FIG. 15), and the S terminal of the input port 171 is connected to the winning notification circuit 601. . As a result, the discharge control signal SG5 is input to the winning notification circuit 601. The winning notification circuit 601 controls the voltage application circuit 202 by controlling the charging/discharging of the capacitor 223 of the time constant circuit 221 based on the discharge control signal SG5. Note that the Schmitt type inverter 180 is not provided between the S terminal and the winning notification circuit 601, and both are directly connected. That is, the signal output from the S terminal is transmitted to the winning notification circuit 601 without being inverted.

  The winning notification circuit 601 will be described. The winning notification circuit 601 includes an OR circuit 602. The OR circuit 602 is connected to the OUT16 terminal of the third driving IC 203 and the S terminal of the input port 171, and is also connected to the voltage applying circuit 202. The OR circuit 602 controls the voltage application circuit 202 by outputting a signal corresponding to both the signal output from the OUT16 terminal and the signal output from the S terminal to the voltage application circuit 202.

  Specifically, the OR circuit 602 has two input terminals and one output terminal, and one of the two input terminals is connected to the OUT16 terminal. As a result, the signal corresponding to the LED drive data SD output from the OUT16 terminal is directly input to the OR circuit 602. The one input terminal is pulled up.

  On the other hand, the other input terminal is connected to the S terminal via the time constant circuit 221. As a result, the signal from the S terminal is input to the input terminal of the OR circuit 602 via the time constant circuit 221. In this case, the input of the signal to the OR circuit 602 is delayed due to the transient phenomenon of the time constant circuit 221.

  The output terminal of the OR circuit 602 is connected to the gate of the p-type MOSFET 211 of the voltage application circuit 202. In this case, when the LOW signal is output from the OR circuit 602, the p-type MOSFET 211 is turned on, and when the HI signal is output from the OR circuit 602, the p-type MOSFET 211 is turned off.

  With such a configuration, when the HI signal is input to the OR circuit 602 from at least one of the S terminal and the OUT16 terminal, the HI signal is output from the OR circuit 602. In this case, since the p-type MOSFET 211 is off, the winning notification LED 37 does not emit light.

  On the other hand, when the LOW signal is input to the OR circuit 602 from both the S terminal and the OUT16 terminal, the LOW signal is output from the OR circuit 602. In this case, the winning notification LED 37 emits light on condition that the p-type MOSFET 211 is turned on and the n-type MOSFET 212 is turned on.

  Here, in step S704 of the start-up process (FIG. 19) performed by the voice lamp control device 90, a process of setting "0" information in the discharge control signal register is executed. As a result, the signal output from the S terminal in the normal gaming state is the HI signal. Therefore, the capacitor 223 is in the charging state in the normal gaming state.

  Next, the confirmation process for the reservation notice in the present embodiment will be described with reference to the flowchart in FIG.

  The confirmation process for the reservation notice is executed when the reservation information is acquired in the winning process for the operating port in step S105 in the timer interrupt process (FIG. 7). In the confirmation process for announcing the hold, the jackpot random number counter C1 of the acquired hold information is judged to be right or wrong.

  Specifically, first, in step S1301, the value of the jackpot random number counter C1 of the pending information acquired this time is grasped. Then, in step S1302, a win/loss determination process is executed for the jackpot random number counter C1 grasped in step S1301.

  Then, in step S1303, it is determined whether or not the result of the above-mentioned win/win determination is a big hit. If the jackpot is not won, the confirmation process for the notice of holding is ended as it is. On the other hand, if the jackpot is won, a winning hold command is set in step S1304, and this confirmation processing is ended.

  The winning suspension command is output to the voice lamp control device 90 in the external output process (step S201) of the normal process (FIG. 8). When the voice lamp control device 90 receives the winning hold command, the voice lamp controlling device 90 executes a process corresponding to the winning hold command in the other command handling process (step S809). Specifically, the information of "1" is set in the discharge control signal register so that the LOW signal is input to the time constant circuit 221. As a result, the discharge control signal SG5 input to the S terminal of the input port 171 becomes a LOW signal, and the LOW signal is input to the time constant circuit 221. As a result, discharge from the capacitor 223 of the time constant circuit 221 is started.

  Here, in order to discharge the capacitor 223, the other input terminal of the OR circuit 602 and the OUT terminal (X terminal) of the third drive IC 203 are connected via the time constant circuit 221 and further discharged. A configuration in which the LED drive data SD is separately prepared is also conceivable. The LED drive data SD for discharge is the same LED drive data SD except that the data relating to the X terminal is different. Then, when the discharge timing comes, a process of updating the current LED drive data SD to the LED drive data SD for discharge corresponding to the current LED drive data SD is executed. In the above configuration, since the LED drive data SD for discharge is separately prepared, there is a concern that the data amount of the LED drive data SD will increase.

  On the other hand, in the present embodiment, the S terminal used for transmitting the discharge control signal SG5 is separately provided, and the wiring for transmitting the discharge control signal SG5 is provided separately from the wiring for transmitting the LED drive data SD. It was In addition, the time constant circuit 221 is provided on the wiring for transmitting the discharge control signal SG5 in the winning notification circuit 601. The discharge control signal SG5 is controlled by a system different from that of the LED drive data SD. As a result, the capacitor 223 can be discharged while suppressing an increase in the data amount of the LED drive data SD.

  Next, the fluctuation start process in the present embodiment will be described using the flowchart in FIG. Note that the processing of steps S1401 to S1405 is the same as the corresponding processing of the first embodiment, so description will be omitted.

  If it is determined in step S1404 that the lottery for notifying whether or not to perform the winning notification effect has not been won, the process proceeds to step S1406, and a charging process for starting charging of the capacitor 223 is executed.

  Here, when the game number corresponding to the jackpot is started, since the winning hold command is received at the timing before the timing when the game number is started, the game number corresponding to the jackpot is started. At the timing, the capacitor 223 is in a discharged state. In step S1406, information of "0" is set in the discharge control signal register so that the capacitor 223 of the time constant circuit 221 changes from the discharged state to the charged state. As a result, the discharge control signal SG5 input to the time constant circuit 221 becomes the HI signal. Therefore, the charging of the capacitor 223 is started, and then the HI signal is input to the other input terminal of the OR circuit 602.

  After that, the processes of steps S1407 and S1408 are executed, and the process proceeds to step S1409. The processes of steps S1407 and S1408 are the same as the processes of steps S906 and S907 of the first embodiment, and thus the description thereof will be omitted.

  In step S1409, LED drive data setting processing is executed. The LED drive data setting process is a process for transmitting the grasped LED drive data SD, and is specifically the process of steps S908 to S913 of the first embodiment. Then, in step S1410, other processing is executed to end the fluctuation start processing.

  Next, the changing process in the present embodiment will be described using the flowchart in FIG. Note that the processing of steps S1501 to S1506 and steps S1509 to S1511 is the same as the corresponding processing in the first embodiment, and therefore description thereof is omitted.

  When it is determined in step S1506 that it is not the end timing of the winning notification effect, the LED drive data updating process is executed in step S1507, and the process proceeds to step S1512. In this case, the LED drive data SD is updated so that the winning notification LED 37 blinks in a predetermined cycle. Specifically, the target to be grasped in a predetermined cycle is switched to the normal LED drive data SDa and the specific LED drive data SDb. As a result, the signal output from the OUT16 terminal is alternately switched between HI and LOW.

  On the other hand, if it is determined in step S1506 that it is the timing for ending the winning notification effect, the process advances to step S1508 to execute the charging process. As a result, the capacitor 223 is charged. After that, the processes of steps S1509 and S1510 are executed, and the process proceeds to step S1512. In step S1512, LED drive data setting processing is executed. Since the processing is as described above, the description is omitted. Then, in step S1513, other processing is executed, and the present changing processing ends.

  According to this processing, in the game times for executing the winning announcement effect, the winning announcement LED 37 starts to emit light at the start timing of the relevant announcement effect, and the winning announcement LED 37 over a specific period (a plurality of update timings). Flashes. Then, at the end timing of the winning notification effect, the LED 37 for winning notification stops emitting light, and the charging of the capacitor 223 is started.

  Next, the operation of the winning notification LED 37 when each of the above processes is performed will be described with reference to the timing chart of FIG. 34(a) shows the output waveform from the S terminal, FIG. 34(b) shows the output waveform from the time constant circuit 221, FIG. 34(c) shows the output waveform from the OUT16 terminal, and FIG. d) shows the operation of the winning notification LED 37.

  When the hold information corresponding to the jackpot win is acquired at the timing of t41, the win hold command is transmitted to the voice lamp control device 90. Then, the voice lamp control device 90 changes the discharge control signal SG5 to the LOW signal based on the reception of the winning suspension command (see FIG. 34(a)). As a result, as shown in FIG. 34B, the voltage output from the time constant circuit 221 due to the transient phenomenon of the time constant circuit 221, that is, the voltage input to the other input terminal of the OR circuit 602 gradually decreases. ..

  After that, at the timing of t42, the voltage input to the other input terminal of the OR circuit 602 becomes the threshold voltage Vth at which the OR circuit 602 determines that it is a LOW signal. Accordingly, the OR circuit 602 determines that the LOW signal is input to the input terminal connected to the time constant circuit 221. The period from the timing of t41 to the timing of t42 corresponds to the delay period T4.

  After that, the game times related to the hold information that triggered the transmission of the winning hold command are started. Then, at the timing of t43 which is the start timing of the winning notification effect in the game time, the process related to the start of the winning notification effect (steps S1504, S1505, S1512) is performed. Then, at the timing of t44 when the period T3 required for transmitting the LED drive data SD has elapsed from the timing of t43, the LOW signal is output from the OUT16 terminal. As a result, the output from the output terminal of the OR circuit 602 becomes LOW, and the p-type MOSFET 211 becomes ON. As a result, the winning notification LED 37 is turned on on condition that the n-type MOSFET 212 is turned on (the second permission signal SG4 is a LOW signal).

  After that, the output signal from the OUT16 terminal is alternately switched to HI and LOW in a predetermined cycle, and the winning notification LED 37 blinks correspondingly. In this case, since the output signal from the time constant circuit 221 maintains LOW, the output signal of the OR circuit 602 depends only on the output signal from the OUT16 terminal.

  Then, at the timing of t45, which is the end timing of the winning notification presentation, the discharge control signal SG5 output from the S terminal becomes the HI signal, so that the charging of the capacitor 223 is started. As a result, the voltage input to the other input terminal of the OR circuit 602 gradually increases.

  After that, at the timing of t46 when the period T3 has passed from the timing of t45, the HI signal is output from the OUT16 terminal, and the emission of the winning notification LED 37 is stopped.

  According to this embodiment described in detail above, the following excellent effects are exhibited.

  The discharge of the capacitor 223 is started at a timing before the start timing of the winning notification effect. This makes it possible to reduce the time lag that occurs between the internal start timing of the winning notification effect due to the delay period T4 by the time constant circuit 221 and the actual light emission timing of the winning notification LED 37. Therefore, the signal output from the OUT16 terminal and the light emission timing of the winning notification LED 37 can be suitably synchronized, and the winning notification LED 37 can be controlled appropriately.

  Particularly, from the viewpoint of suppressing malfunction of the winning notification LED 37, it is preferable to secure a long delay period T4. For example, the electrostatic capacitance C of the capacitor 223 and the resistance value R of the resistor 222 may be set so that the delay period T4 is a period in seconds. However, if the delay period T4 is lengthened, the above-mentioned time lag increases, and it becomes difficult to control the winning notification LED 37.

  On the other hand, according to the present embodiment, the capacitor 223 is discharged in advance at a timing prior to the start timing of the winning notification effect, thereby ensuring the delay period T4 and controlling the winning notification LED 37. Can be done easily.

  Further, the HI signal is immediately output from the OR circuit 602 based on the HI signal output from the OUT16 terminal. Thereby, the emission of the winning notification LED 37 can be stopped without waiting for the delay due to the transient phenomenon of the time constant circuit 221. As a result, it is possible to suitably control the winning notification LED 37.

  As the timing to start discharging the capacitor 223, the timing at which the winning suspension command is received is set. The winning selection pending command is a command set when the pending information corresponding to the jackpot winning is acquired. This makes it possible to secure a longer discharge period as compared with the configuration in which the start timing of the game times related to the jackpot winning is set, and the discharge of the capacitor 223 is surely completed at the start timing of the winning notification effect. be able to.

  Further, since the condenser 223 is discharged before the game times related to the jackpot winning are started, the start timing of the winning announcement effect is the start timing of the game times related to the jackpot winning and the game times related to the jackpot winning. It is possible to set the timing from the start timing until the delay period T4 elapses. As a result, it is possible to increase the degree of freedom of the execution timing of the winning notification effect (light emission timing of the winning notification LED 37).

  Here, if a long discharge period is secured, the period in which the output from the time constant circuit 221 is the LOW signal becomes long. In this case, the frequency of malfunction of the winning notification LED 37 increases due to the influence of noise or the like. However, the situation in which the output from the time constant circuit 221 is the LOW signal has occurred based on the acquisition of the pending information related to the jackpot winning. Therefore, the malfunction of the winning notification LED 37 in a situation where the output from the time constant circuit 221 is a LOW signal is easily misidentified as an intentional operation corresponding to the jackpot winning. Therefore, it is possible to avoid an inconvenience that may be caused by increasing the discharge period, specifically, an inconvenience that the player is mistakenly recognized that the jackpot win occurs due to the malfunction of the winning notification LED 37.

  Further, if the configuration is such that the winning notification LED 37 is controlled only by the signal output from the S terminal, due to the transient phenomenon of the time constant circuit 221, the followability of the winning notification LED 37 for signal switching is deteriorated. Further, in the case where the winning notification LED 37 blinks, the timing at which the winning notification LED 37 blinks varies due to the residual charge accumulated in the capacitor 223. Therefore, in the effect of blinking the winning notification LED 37, the blinking cannot be performed appropriately.

  On the other hand, according to the present embodiment, in the winning notification effect, the output from the S terminal, that is, the output from the time constant circuit 221 is maintained at the LOW signal. As a result, the winning notification LED 37 can be controlled by the signal output from the OUT16 terminal instead of the signal output from the time constant circuit 221, and the winning notification LED 37 can be suitably blinked.

  Here, if the output from the time constant circuit 221 is maintained at the LOW signal, it may be considered that the time constant circuit 221 is not provided. However, since the time constant circuit 221 has not only the delay function but also the noise removal function, if the time constant circuit 221 is not provided, it is easily affected by noise. In this respect, according to the present embodiment, it is possible to suitably control the winning notification LED 37 while suppressing the influence of noise mixed in the wiring.

  Further, the charging/discharging control of the capacitor 223 is configured to be performed in a system different from the control based on the LED drive data SD. As a result, the charging/discharging of the capacitor 223 can be controlled without affecting the control by the LED drive data SD.

  In particular, in the configuration in which the charging of the capacitor 223 is started based on the reception of the winning suspension command, the charging start timing of the capacitor 223 is irregular, and the charging start timing can be the normal start timing. Therefore, if the LED drive data SD is used to control the charging/discharging of the capacitor 223, the control of the LED drive data SD becomes complicated. Further, if the LED driving data SD for charging and the LED driving data SD for discharging are prepared to simplify the control, there is a concern that the data amount of the LED driving data SD will increase.

  On the other hand, according to the present embodiment, the configuration in which the capacitor 223 is charged and discharged by another system suppresses an increase in the amount of data and allows the capacitor 223 to be charged and discharged with relatively simple control. Control can be performed.

  In the present embodiment, the charging/discharging of the capacitor 223 is controlled by a system different from the control based on the LED driving data SD, but the present invention is not limited to this. For example, charging/discharging of the capacitor 223 is based on the LED driving data SD. It may be configured to be controlled. Specifically, the OUT16 terminal and the time constant circuit 221 may be connected. In this case, when the winning suspension command is received, the LED drive data SD set at that time is grasped. Then, "0" is set as the first data so that the LOW signal is output from the OUT16 terminal, and subsequently, the LED drive data SD ascertained above is set. As a result, the capacitor 223 can be charged and discharged without changing the light emitting mode of the LED 173 at the present time.

  Further, in the present embodiment, the time constant circuit 221 is provided on the wiring that connects the S terminal and the OR circuit 602, but the present invention is not limited to this. For example, on the wiring that connects the OUT16 terminal and the OR circuit 602. It may be provided. In this case, the signal from the OUT16 terminal corresponds to the discharge control signal SG5, and the signal from the S terminal corresponds to the signal for controlling the light emission of the winning notification LED 37.

  Further, although the timing at which the hold information corresponding to the jackpot winning is obtained is set as the timing to start charging the capacitor 223, the timing is not limited to this, for example, the timing at which the game time related to the hold information corresponding to the jackpot winning is started. May be More specifically, the configuration is such that charging of the capacitor 223 is started when the lottery for the winning announcement effect is won. In this case, the start timing of the winning notification effect may be set to a timing at least the delay period T4 has elapsed from the start timing of the game time. Thereby, the start timing of the winning notification effect and the actual light emission timing of the winning notification LED 37 can be suitably synchronized.

  Further, even if a plurality of holding information corresponding to the jackpot winning is stored in the holding area RE, the winning notification effect may be suitably performed.

  Specifically, when the winning hold command is received, the jackpot holding counter provided in each of the various counter areas 64d is incremented by 1. Then, when it is determined in the variation start process (FIG. 32) that the game is a big hit, the big hit holding counter is decremented by one. When the jackpot holding counter is 0 when the negative determination is made in step S1404, the charging process is executed in step S1406 when the jackpot holding counter is 0. On the other hand, when the jackpot holding counter is not 0, it may be configured to proceed to step S1407 without executing the charging process.

  Further, when the determination in step S1506 of the changing process (FIG. 33) is negative, it is determined whether the jackpot holding counter is 0 or not. When the jackpot holding counter is 0, the charging process is executed in step S1508. On the other hand, when the jackpot holding counter is not 0, it may be configured to proceed to step S1509 without executing the charging process of step S1508.

  According to the above process, in a situation where a plurality of holding information corresponding to the big hit is stored, the charging process is executed due to the start of the game times for one big hit, and the game for the next big hit. It is possible to avoid a situation in which the winning notification LED 37 cannot be made to emit light when the turn is started.

  Further, in the present embodiment, the holding information that can be the target of the winning notification effect is all the game times corresponding to the big hit, but the present invention is not limited to this. For example, a game number executed at a timing before the delay period T4 elapses after the winning suspension command is received (after the discharge is started) may be excluded from the winning notification effect.

  That is, when there is no other hold information and the game time is not in progress, the game time according to the acquired hold information is immediately started. In this case, since the interval between the reception timing of the winning hold command and the reception timing of the variation command is short, it may not be possible to sufficiently secure the period related to discharge. In particular, in the case of a configuration in which the winning notification effect is started immediately after the game time is started, the above inconvenience is likely to occur.

  On the other hand, if the game time related to the jackpot win is started before the delay period T4 elapses after receiving the win hold command, do not execute the win announcement effect in the game time. By doing so, it is possible to avoid the execution of the winning notification effect in the state where the discharge is insufficient.

  Specifically, for example, when the winning suspension command is received, the measurement of the period is started using a predetermined timer counter. When it is determined that the jackpot is a big hit in the variation start process of the voice lamp control device 90 (step S1402: YES), whether or not the delay period T4 has elapsed from the discharge start timing is determined based on the value of the predetermined timer counter. judge. When it is determined that the delay period T4 has elapsed from the discharge start timing, the process proceeds to step S1403. On the other hand, if it is determined that the delay period T4 has not elapsed from the discharge start timing, the process proceeds to step S1406. As a result, it is possible to avoid the execution of the winning notification effect when the discharge is insufficient.

  The start timing of the winning notification effect may be set to a timing at which the delay period T4 has not elapsed from the start timing of the game time. That is, the period from the start timing of the game times to the start timing of the winning notification effect may be set shorter than the delay period T4.

  In this case, when it is determined that it is a big hit (step S1402: YES), whether the period from the discharge start timing to the start timing of the winning notification effect is longer than the delay period T4 based on the value of the predetermined timer counter. It may be configured to determine whether or not. If it is determined that the period from the discharge start timing to the winning notification start timing is longer than the delay period T4, the process proceeds to step S1403. On the other hand, if it is determined that the period from the discharge start timing to the winning notification start timing is shorter than the delay period T4, the process may proceed to step S1406. As a result, the execution frequency of the winning notification effect can be increased while avoiding the execution of the winning notification effect when the discharge is insufficient.

  In short, because the period from the acquisition timing of the jackpot winning hold information to the start timing of the game times related to the hold information varies, the dischargeable period from the discharge start timing to the start timing of the winning notification effect is In the fluctuating configuration, it may be determined whether or not the winning notification effect is executed based on the dischargeable period and the delay period T4.

  The start timing of the winning notification effect may be set to the timing at least the delay period T4 has elapsed from the start timing of the game time. In this case, even if the game time related to the acquired hold information is immediately started, the winning announcement effect can be suitably executed. However, from the viewpoint of the degree of freedom of the execution timing of the winning notification effect, the above configuration is preferable.

  In the present embodiment, the winning announcement effect lottery process is configured to be performed when the game number corresponding to the jackpot winning is started, but is not limited to this, for example, when the pending information corresponding to the jackpot winning is acquired It may be configured to execute the above. Specifically, when the positive determination is made in step S1303 of the confirmation process for holding notice (FIG. 31), the winning notification effect lottery process may be executed. In this case, when the winning notification effect is won, the RAM 113 is stored with specific information for specifying that the player has won, and the specific information is confirmed when the game number corresponding to the big hit is started. It is good to have a configuration. However, in view of the increase in the processing load of the confirmation process for the reservation notice and the increase in the data capacity due to securing the area for storing the above specific information, the game time corresponding to the jackpot winning It is better to have a configuration in which the winning announcement production lottery process is executed.

  In addition, in the configuration that executes the winning announcement effect lottery process when the hold information corresponding to the jackpot win is acquired, when the lottery process is won It may be configured such that the winning notification effect is performed in the previous game time.

  Further, the signal output from the S terminal is configured to maintain the LOW signal during the period in which the winning notification presentation is performed, but the configuration is not limited to this, and may be configured to be synchronized with the signal output from the OUT16 terminal, for example. .. However, in view of the influence of the transient phenomenon of the time constant circuit 221, it is preferable to maintain the LOW signal.

  A Schmitt type inverter 180 may be provided between the S terminal and the time constant circuit 221. In this case, it goes without saying that HI and LOW of the discharge control signal SG5 output from the sub CPU 111 are reversed to control.

  Alternatively, a plurality of capacitors may be provided, and the winning notification LED 37 may emit light when charging of all capacitors is completed. In this case, some of the plurality of capacitors may be charged as the precharge. As a result, it is possible to shorten the period required to charge all the capacitors, and it is possible to cause the winning notification LED 37 to emit light at a desired timing.

  Further, as the pre-charging, a configuration may be adopted in which one capacitor accumulates a charge by a predetermined charge amount smaller than the charge amount that triggers signal switching. Even in this case, the effects described above can be obtained.

  Further, when the variable display is started, the variable display time may be grasped, and the winning notification LED 37 may be caused to emit light at a predetermined specific timing in the variable display time. In this case, when the variable display is started, the current charging state is grasped, it is judged whether or not the charging is completed by the specific timing, and if the charging is judged to be completed, the winning notification effect is presented. On the other hand, when it is determined that the charging is not completed, a configuration different from the winning announcement production may be executed.

  Further, the winning notification LED 37 may be configured to emit light during the opening/closing execution mode, the high probability mode, or the high frequency support mode, which is advantageous for the player. In this case, the configuration may be such that it is always charged during each mode. As a result, the winning notification LED 37 can be caused to emit light at a desired timing in each mode.

<Sixth Embodiment>
In this embodiment, the configuration of the winning notification circuit 701 is different from that of the first embodiment. The different points will be described with reference to FIG. FIG. 35 is a circuit diagram showing a winning notification circuit 701 according to this embodiment.

  The winning notification circuit 701 of the present embodiment does not include the third driving IC 203, but is connected to the second driving IC 192. The winning notification circuit 701 controls the light emission of the winning notification LED 37 based on the signal from the second drive IC 192 and the switching signal SG6 input from the sub CPU 111.

  Specifically, the sub CPU 111 is configured to output a switching signal SG6 for controlling the emission of the winning notification LED 37 to the LED substrate 91. Specifically, the register 122 of the sub CPU 111 is provided with a register for outputting the switching signal SG6. The register has a storage capacity of 1 bit, and information of "1" is usually written therein.

  The register is connected to the data output circuit 134 (see FIG. 14). The data output circuit 134 outputs a LOW signal to the SW terminal provided in the output port 131 when the information “1” is written in the register. On the other hand, the data output circuit 134 outputs the HI signal to the SW terminal when the information “0” is written in the register.

  The SW terminal of the output port 131 is connected to the SW terminal provided on the input port 171 (see FIG. 15) of the LED board 91. The SW terminal of the input port 171 is connected to the winning notification circuit 701 as shown in FIG. As a result, the switching signal SG6 is input to the winning notification circuit 701 in a system different from that of the other signals SG1 to SG3.

  It should be noted that no circuit such as a Schmitt type inverter 180 for inverting a signal is provided between the SW terminal of the input port 171 and the winning notification circuit 701, and the switching signal SG6 input to the SW terminal is directly won. It is input to the notification circuit 701.

  The winning notification circuit 701 includes a voltage application circuit 202. The voltage application circuit 202 includes the p-type MOSFET 211 and the n-type MOSFET 212, as described above. The gate of the p-type MOSFET 211 is connected to the OUT14 terminal of the second drive IC 192. The gate of the n-type MOSFET 212 is connected to the SW terminal.

  With this configuration, when the LOW signal is output from the OUT14 terminal of the second drive IC 192 and the switching signal SG6 is the HI signal, the winning notification LED 37 emits light, and in other cases, the winning notification LED 37 Does not emit light. As a result, even if noise is mixed into either the signal from the OUT14 terminal or the switching signal SG6, the winning notification LED 37 does not emit light, and thus malfunction of the winning notification LED 37 can be suppressed. ..

  Next, the light emission control of the winning notification LED 37 will be described.

  First, in step S704 of the startup process (FIG. 19) of the voice lamp control device 90, "1" is set in the register corresponding to the switching signal SG6 so that the switching signal SG6 becomes a LOW signal. As a result, in the normal state, the n-type MOSFET 212 is turned off and the winning notification LED 37 does not emit light.

  After that, when it is elected to execute the winning notification effect, and when the execution start timing of the winning notification effect is reached (step S1003: YES), the register corresponding to the switching signal SG6 is updated so that the switching signal SG6 becomes the HI signal. I do. Then, the LED drive data SD is updated so that the signal output from the OUT14 terminal becomes the LOW signal. As a result, the winning notification LED 37 emits light.

  After that, when it is the end timing of the winning notification presentation (step S1006: YES), the register corresponding to the switching signal SG6 is updated so that the switching signal SG6 becomes the LOW signal. Then, the LED drive data SD is updated so that the signal output from the OUT14 terminal becomes the HI signal. As a result, the emission of the winning notification LED 37 is stopped.

  According to the embodiment described in detail above, the winning notification circuit 701 is connected to the second driving IC 192 that controls the light emission of the LED 173, and the signal output from the second driving IC 192 (specifically, from the OUT14 terminal The light emission control of the winning notification LED 37 is performed by the output signal) and the switching signal SG6. Thereby, the emission control of the winning notification LED 37 can be suitably performed without providing the third drive IC 203. Therefore, the structure can be simplified in that it is not necessary to provide the third drive IC 203.

  Moreover, since the data related to the signal of the OUT14 terminal in the LED drive data SD is used as the data related to the emission control of the winning notification LED 37, it is not necessary to prepare the data related to the signal of the OUT16 terminal. This makes it possible to reduce the data amount of the LED drive data SD.

  That is, when controlling the winning notification LED 37 based on the signal from the OUT16 terminal, it is necessary to set the data relating to the OUT14 terminal and the OUT15 terminal to which the LED 173 is not connected due to the data transmission of the LED drive data SD. .. Therefore, it is necessary to prepare dummy data set in the data areas D14 and D15 for the LED drive data SD.

  On the other hand, by connecting the winning notification circuit 701 to the OUT14 terminal, it is not necessary to set dummy data, so that the data amount of the LED drive data SD can be reduced by the amount of the dummy data.

  Furthermore, since it is not necessary to transmit the LED drive data SD from the second drive IC 192 to the third drive IC 203, and the amount of data relating to the transmission is reduced, the transmission period of the LED drive data SD can be shortened.

  In particular, the signal output from the OUT14 terminal of the second drive IC 192 is based on the LED drive data SD. Therefore, an error may occur in the data transmission of the LED drive data SD between the drive ICs 191 and 192.

  On the other hand, according to the present embodiment, the signal based on the LED drive data SD and the switching signal SG6 which is transmitted in a separate system from the LED drive data SD and which is directly input from the sub CPU 111. The light emission control of the winning notification LED 37 is performed based on the. As a result, even if an error occurs in the data transmission of the LED drive data SD, it is possible to suppress the malfunction of the winning notification LED 37.

  The configuration for performing the emission control of the winning notification LED 37 based on the signal based on the LED drive data SD and the signal input from the sub CPU 111 separately from the LED drive data SD is not limited to the present embodiment. The same applies to other embodiments. Specifically, in the first to fourth embodiments, the signal input to the gate of the n-type MOSFET 212 corresponds to the “signal input from the sub CPU 111 separately from the LED drive data SD”. In the fifth embodiment, the signal input to the gate of the n-type MOSFET 212 and the discharge control signal SG5 correspond to “a signal input from the sub CPU 111 separately from the LED drive data SD”.

  Further, since the current path of the winning notification LED 37 is different from the current path of the LED 173, it is possible to apply different voltages to the winning notification LED 37 and the LED 173. As a result, it is possible to apply a higher voltage (for example, +12 V) than the voltage applied to the LED 173 to the winning notification LED 37 to increase the emission intensity of the winning notification LED 37.

  By the way, when performing the effect of blinking the winning notification LED 37, the signal from the OUT14 terminal is fixed to the LOW signal while the effect is performed, and the winning notification LED 37 is controlled only by the switching signal SG6. It is good to do. As a result, the processing load can be reduced in that it is not necessary to update the LED drive data SD, and an increase in the amount of data is suppressed in that it is not necessary to separately prepare the LED drive data SD for blinking. can do.

  Note that the configuration is not limited to the above configuration, and the configuration may be such that the signal output from the OUT14 terminal is alternately switched in response to switching of the switching signal SG6. In this case, the malfunction of the winning notification LED 37 can be suppressed more preferably.

  Although the time constant circuit 221 is not provided in this embodiment, the time constant circuit 221 may be provided. In this case, the time constant circuit 221 may be provided on the wiring that connects the p-type MOSFET 211 and the OUT14 terminal, and the time constant circuit 221 may be provided on the wiring that connects the n-type MOSFET 212 and the SW terminal.

  Further, a plurality of winning notification LEDs 37 may be provided in parallel. In this case, the plurality of winning notification LEDs 37 can be collectively controlled by the signal output from the OUT14 terminal and the switching signal SG6.

  Further, in the present embodiment, the switching control of the p-type MOSFET 211 is performed based on the signal related to the LED drive data SD, and the switching control of the n-type MOSFET 212 is performed based on the switching signal SG6. However, the present invention is not limited to this. For example, both MOSFETs 211 and 212 may be configured to be controlled based on the signal related to the LED drive data SD.

  Specifically, the OUT15 terminal is connected to the gate of the n-type MOSFET 212 instead of the SW terminal. Then, at the start timing of the winning notification effect, a signal for causing the winning notification LED 37 to emit from both the OUT14 terminal and the OUT15 terminal, specifically, the LOW signal is output from the OUT14 terminal and the HI signal is output from the OUT15 terminal. The LED drive data SD may be updated as described above. This allows the winning notification LED 37 to emit light. In this case, the winning notification LED 37 does not emit light even if an error occurs in any of the data relating to the OUT14 terminal signal and the OUT15 terminal signal.

  Further, if the OUT14 terminal and the OUT15 terminal are short-circuited, the signals output from both terminals become the same signal (either the HI signal or the LOW signal). Therefore, even if both terminals are short-circuited, the winning notification LED 37 does not emit light. Therefore, malfunction of the winning notification LED 37 due to short-circuiting of both terminals can be suppressed.

  The above-described configuration (configuration in which the driving IC performs switching control of both MOSFETs 211 and 212) is not limited to this embodiment, and the same applies to other embodiments. Specifically, in the first to fifth embodiments, the OUT17 terminal of the third driving IC 203 may be connected to the gate of the n-type MOSFET 212.

  Further, in the present embodiment, the two MOSFETs 211 and 212 are used to control the emission of the winning notification LED 37, but the present invention is not limited to this, and one MOSFET may be used. The configuration will be described with reference to FIG. FIG. 36 is a circuit diagram of the winning notification circuit 801.

  As shown in FIG. 36, the winning notification circuit 801 includes the winning notification LED 37 and the n-type MOSFET 212. The winning notification LED 37 and the n-type MOSFET 212 are connected, and specifically, the cathode of the winning notification LED 37 is connected to the source of the n-type MOSFET 212. The anode of the winning notification LED 37 is connected to the +5V power source. The drain of the n-type MOSFET 212 is connected to the OUT14 terminal. The switching signal SG6 is input to the gate of the n-type MOSFET 212.

  With this configuration, when the LOW signal is output from the OUT14 terminal (the OUT14 terminal becomes the ground potential) and the switching signal SG6 is the HI signal, the winning notification LED 37 emits light. As a result, the winning based on the control signals of two systems using the one MOSFET, specifically the signal from the OUT14 terminal (the signal based on the LED drive data SD) and the switching signal SG6 (the signal directly output from the sub CPU 111). It is possible to control the light emission of the notification LED 37. This makes it possible to suitably control the light emission of the winning notification LED 37 while simplifying the configuration.

<Other embodiments>
It should be noted that the present invention is not limited to the description of the above-described embodiment, and various modifications and improvements can be made without departing from the spirit of the present invention. For example, you may change as follows. By the way, the configurations of the following different modes may be applied individually or in combination with the configurations of the above-described embodiments.

  (1) In each of the above-described embodiments, three driving ICs 191, 192, and 203 are provided, but the invention is not limited to this, and may be four or five, for example, depending on the number of LEDs 173 to be driven. Should be provided.

  Here, when the newly provided drive IC is provided so as to correspond to the LED that is constantly lit, the second drive IC is the second drive IC so that the third drive IC 203 is arranged on the most downstream side. The third drive IC 203 may be connected in series to the new drive IC while being connected in series to the downstream side of the drive IC 192. Then, the first permission signal SG3, the clock signal SG1, and the data write signal SG2 are input to the new drive IC, and the information of the LED drive data SD is increased corresponding to the number of the LEDs 173. As a result, each drive IC including the new drive IC can be suitably operated, and when the winning notification LED 37 is not turned on, the LED drive data SD corresponding to the third drive IC 203 is set and transmitted. By omitting it, it is possible to reduce the processing load and the period required to transmit the LED drive data SD.

  When a drive IC for driving the winning notification LEDs 37 is newly provided in correspondence with the plurality of winning notification LEDs 37, the third driving IC 203 may be connected in series. Then, the second permission signal SG4, the clock signal SG1 and the data write signal SG2 are input to the new drive IC, and the LED drive data SD is increased corresponding to the newly provided winning notification LED 37. Let As a result, the winning notification LED 37 can be added without changing the existing drive IC.

  In this case, if the LED driving data SD corresponding to the winning notification LED 37 is set even when the winning notification LED 37 does not emit light, the LED driving register 37 increases as the winning notification LED 37 increases. The processing load of the writing process of the LED drive data SD to 141 increases, and the period required for the transmission of the LED drive data SD becomes longer. On the other hand, as shown in the first embodiment and the like, when the winning notification LED 37 does not emit light, by using the normal LED drive data SDa in which the data corresponding to the winning notification LED 37 is omitted. It is possible to shorten the processing load of writing the LED drive data SD and the period required for transmitting the LED drive data SD.

  (2) In each of the above-described embodiments, the LED 173 used in various lamp units for informing the game situation has been described, but the present invention is not limited to this. For example, when the symbol display device 31 uses a liquid crystal display device having an LED backlight structure, The present invention may be applied to the LED group of the LED backlight.

  Further, although the LED 173 is used as the light emitting element, the light emitting element is not limited to this, and other light emitting elements such as a fluorescent lamp, an incandescent lamp, and an organic EL may be used. Even in this case, the present invention can be applied. However, from the viewpoints of installation space, power consumption, etc., the configuration using the LED 173 is superior.

  (3) In each of the above-described embodiments, the control targets of the drive ICs 191, 192, and 203 are the plurality of LEDs 173 and the winning notification LEDs 37, but the invention is not limited to this. When the accessory is provided, the effect movable accessory may be set as a control target. In short, as long as a plurality of electric devices (elements) of the same kind are controlled by a plurality of drive ICs, any device can be controlled.

  (4) In each of the above embodiments, the clock signal SG1 is output only when the writing process of the LED drive data SD is performed. However, the present invention is not limited to this, and the clock signal SG1 is continuously output when the power is turned on. It may be configured to output. Even in this case, the driving mode of each LED 173 is not changed unless the data write signal SG2 rises. In the case of the above configuration, it is preferable that the LED drive data SD keeps outputting “1” (or “0”). As a result, the data areas D0 to D16 can be initialized.

  (5) In each of the above-described embodiments, 6 pins of the OUT terminals in each of the drive ICs 191 and 192 are used to light the LED 173. However, the present invention is not limited to this, and for example, all 8 pins may be used, which is arbitrary. However, considering the total current value flowing into the drive IC and the local heat generation, 6-pin is preferable.

  (6) In each of the above-described embodiments, the set amount of information is different between the normal LED drive data SDa when the winning notification effect is not performed and the specific LED drive data SDb when the winning notification effect is performed. Although the settings have been made, the present invention is not limited to this, and the same settings may be made. Specifically, information of "1" may be added to the normal LED drive data SDa so that the HI signal is output from the OUT16 terminal when the winning notification effect is not performed. However, in view of reducing the processing load and shortening the transmission period of the LED drive data SD, the normal LED drive data SDa not corresponding to the winning notification LED 37 and the specific LED drive data SDb corresponding to the winning notification LED 37 are set. The configuration is better.

  (7) In each of the above embodiments, the time constant circuit 221 is provided only on the wiring that connects the p-type MOSFET 211 and the OUT16 terminal, but the present invention is not limited to this, and the wiring that connects the normal LED 173 and the drive IC. The time constant circuit 221 may be provided above. However, if attention is paid to the points that malfunctions are not noticeable, the configuration is complicated, and the installation space and the like, the time constant circuit 221 is provided only on the wiring corresponding to the important LED in the game such as the winning notification LED 37. Is better.

  (8) In each of the above embodiments, the time constant circuit 221 that delays the LOW signal output from the OUT16 terminal by a predetermined period (a plurality of processing times) is provided, but the present invention is not limited to this. Instead of 221, a count circuit for counting rising or falling may be provided. In this case, a predetermined pulse signal is output from the OUT16 terminal every time the sound emission control process is performed in the situation of performing the winning announcement effect, and the count circuit is configured to count a predetermined number of times. It is preferable to output the LOW signal to the gate of the p-type MOSFET 211. Even with such a configuration, malfunction of the p-type MOSFET 211 due to noise can be suppressed, and malfunction of the winning notification LED 37 can be suppressed. However, from the viewpoints of removing high frequency noise and simplifying the configuration, the configuration including the time constant circuit 221 is superior.

  (9) According to each of the above-described embodiments, the circuit in which the resistor 222 and the capacitor 223 are connected in parallel is provided as the time constant circuit 221 that removes high frequency noise. However, the present invention is not limited to this, and a configuration using an operational amplifier, for example, is also possible. Good. In this case, it is preferable to provide negative feedback via the feedback resistor and provide a capacitor in parallel with the feedback resistor. In short, it is only necessary to transmit a signal having a frequency within a predetermined specific range and to block a signal having another frequency, and the drive signal for driving the winning notification LED 37 is within the above specific range. It only needs to be set.

  (10) In the above embodiments, the permission signals SG3 and SG4 are set to HI in the start-up process, but the present invention is not limited to this. For example, the permission signals SG3 and SG4 may be set to LOW in the start-up process. In this case, the LED drive data SD set so that each LED 173 emits light may be transmitted to execute the process of causing each LED 173 to emit light. This makes it possible to confirm whether or not each LED 173 emits light normally.

  (11) In each of the above-described embodiments, a current detection sensor for determining whether or not the LED 173 is normally emitting light is provided, and the detection result of the current detection sensor is output via the input port 114 of the audio lamp control board 110. It may be input to the sub CPU 111. In this case, the sub CPU 111 determines whether or not there is an abnormality in the LED 173 based on the detection result, and if there is an abnormality, sends a command to the display control device 100 so that the display screen G is informed accordingly. You should execute the process. This makes it possible to easily inspect the LED 173 for abnormality.

  (12) In each of the above embodiments, the information in each of the data areas D0 to D16 is sequentially updated without being initialized. However, the present invention is not limited to this, and, for example, the writing process of the LED drive data SD is performed. Based on this, each drive IC 191, 192, 203 may be configured to execute the initialization processing of the data areas D0 to D16. The execution timing of the initialization processing may be after the rising of the data write signal SG2 and is arbitrary.

  (13) In each of the above embodiments, the first permission signal SG3 and the second permission signal SG4 are individually output, the LED 173 having a relatively high light emission frequency is controlled by the first permission signal SG3, and the second permission signal SG4 is controlled. Although the winning notification LED 37 having a relatively low light emission frequency is controlled by the above, the present invention is not limited to this. For example, the first permission signal SG3 is used to control the LED corresponding to the first effect, and The second permission signal SG4 may be used to control the LED corresponding to the second effect having different effect contents. Furthermore, when the LED for performing various abnormality notifications and the effect LED have different configurations, the first permission signal SG3 and the second permission signal SG4 may be set in correspondence with both. ..

  (14) In each of the above embodiments, the voltage application circuit 202 can apply the voltage to the winning notification LED 37 when the second permission signal SG4 is LOW. However, the voltage application circuit 202 is not limited to this, and the second permission signal can be applied. The configuration may be controlled only by the output from the OUT16 terminal regardless of the signal SG4. However, from the viewpoint of erroneous operation due to noise and quick stop of light emission of the winning notification LED 37, a configuration that can be controlled by the second permission signal SG4 is preferable.

  (15) In each of the above embodiments, an OR circuit may be newly provided on the LED substrate 91, and the voltage input to the gate of the p-type MOSFET 211 may be determined based on the output of the OR circuit. Specifically, the wiring from the OUT16 terminal is bifurcated, and the bifurcated wiring is connected to the input terminal of the OR circuit. Then, the output terminal of the OR circuit is connected to the gate of the p-type MOSFET 211. In this case, the time constant circuit 221 is provided only on one of the bifurcated wires. According to this configuration, when the LOW signal is output from the OUT16 terminal, LOW is immediately input to one input terminal of the OR circuit, while the LOW signal is output from the wiring on the side where the time constant circuit 221 is provided. The input of the LOW signal is delayed. As a result, LOW is output to the gate of the p-type MOSFET 211 after the output from the OUT16 terminal has passed a predetermined period, so that it is less susceptible to noise and the like.

  On the other hand, when the signal from the OUT16 terminal switches from LOW to HI, HI is input to one input terminal of the OR circuit due to the switching, and HI is immediately input to the gate of the p-type MOSFET 211. It will be. As a result, the winning notification LED 37 can be quickly stopped emitting light.

  (16) In each of the above-described embodiments, the drive ICs 191, 192, 203 operate when the permission signals SG3, SG4 are LOW, but it is a so-called low active type. However, the present invention is not limited to this. It may be. In this case, each bus and wiring is switched from pull-up to pull-down. However, if attention is paid to the size of the noise margin, the low active type is preferable.

  Further, the LED 173 is configured to emit light when the output from each OUT terminal is “0”, but is not limited to this, and may be configured to emit light when the output from each OUT terminal is “1”.

  (17) In each of the above embodiments, the voltage application circuit 202 is provided. However, the present invention is not limited to this, and the third drive IC 203 and the winning notification LED 37 may be directly connected. However, in this case, when the second permission signal SG4 becomes HI, it is not possible to immediately stop the emission of the winning notification LED 37, and there is a possibility that the third drive IC 203 is destroyed. In view of these points, the configuration in which the voltage applying circuit 202 is provided is superior.

  (18) In each of the above embodiments, the voltage application circuit 202 applies the drive voltage to the winning notification LED 37 when the output from the OUT16 terminal is LOW. However, the present invention is not limited to this. When the output from the terminal is HI, the voltage application circuit 202 may apply a drive voltage to the winning notification LED 37. In this case, an n-type MOSFET is provided instead of the p-type MOSFET 211, and the gate voltage of the n-type MOSFET is pulled down. However, considering the size of the noise margin, the configuration in which the voltage application circuit 202 applies the drive voltage to the winning notification LED 37 when the output from the OUT0 terminal is LOW is superior.

  (19) In each of the above embodiments, the LED substrate 91 and the voice lamp control device 90 are connected, and the winning notification LED 37 and the like are controlled by the voice lamp control device 90. However, the present invention is not limited to this. For example, the main control device 60 may control the winning notification LED 37.

  (20) In each of the above embodiments, the winning notification LED 37 emits light in the game time in the case of a big win, but the present invention is not limited to this. For example, the LED 37 emits light during the high probability mode or the high frequency support mode. Good.

  (21) In each of the above embodiments, when the winning notification LED 37 emits light, the speaker unit 55 may output a predetermined specific sound. As a result, the winning notification effect can be made flashy, and the degree of attention to the winning notification effect can be increased. In this case, since the voice lamp control device 90 is configured to control the speaker unit 55 and the winning notification LED 37, it is possible to easily associate the two.

  (22) In each of the above embodiments, the data areas D0 to D7 are updated in synchronization with the rising edge of the clock signal SG1, and the data in the out data area DA is output in synchronization with the falling edge of the clock signal SG1. However, the data areas D0 to D7 are updated in synchronization with the falling edge of the clock signal SG1, and the data in the out data area DA is output in synchronization with the rising edge of the clock signal SG1. May be performed.

  Further, although the clock signal SG1 that is periodically output as the signal for synchronizing is used, the present invention is not limited to this, and for example, a pulse signal group in which a plurality of pulse signals having different pulse widths as one unit is output at a predetermined cycle. A configuration may be employed in which pulse signal output means is provided and synchronization is achieved using the pulse signal group. In short, the interval between rising edges and/or the interval between falling edges may vary as long as the signal has a falling edge between a predetermined rising edge and the next rising edge. May vary.

  (23) In each of the above-described embodiments, the clock signal SG1 is started to be output after the writing of the LED drive data SD is started. However, the present invention is not limited to this, and the clock signal SG1 is output. The LED drive data SD may be written. In detail, the processes of step S908 and step S1011 may be omitted. In this case, after a predetermined period (specifically, a period required to write the LED drive data SD to the data register) has passed since the clock signal SG1 was turned on, the clock is supplied to each drive IC 191, 192, 203. A delay circuit that delays the clock signal SG1 so that the signal SG1 is input may be provided. This makes it possible to suppress the transmission of undefined information even when the processes of steps S908 and S1011 are omitted.

  (24) In each of the above embodiments, instead of the clock signal register 143, a dedicated clock signal output circuit may be separately mounted on the audio lamp control board 110. In this case, the sub CPU 111 may be configured to permit or prohibit the clock signal output from the clock signal output circuit from being transmitted to the LED substrate 91.

  (25) In each of the above embodiments, the clock signal SG1 may be constantly output in the situation where a game is being played. However, from the viewpoint of malfunction, it is better to turn on the output of the clock signal SG1 when necessary.

  (26) The capacitor 223 may be discharged in advance before the winning notification LED 37 emits light. As a result, it is possible to suppress the delay in the light emission timing of the winning notification LED 37 that may occur due to the provision of the time constant circuit 221 for removing noise. However, from the viewpoint of suppressing malfunction of the winning notification LED 37, the first embodiment and the like are superior.

  In addition, as the pre-stage of causing the winning notification LED 37 to emit light, for example, the timing at which the fluctuation start process is executed, the timing at which the jackpot winning is specified, the timing at which the winning notification effect is won, or the like can be considered. Further, based on the fact that the game ball has entered the operation ports 23, 24, a function of executing a destination specifying process for making a success/failure determination at a timing prior to the timing at which the variation start process relating to the entrance is performed is provided. In the gaming machine, a configuration is conceivable in which the timing at which the hit determination is performed by the destination specifying process, the timing at which the hit determination determines that the jackpot is a big hit, and the like are set as the discharge start timing of the capacitor 223.

  Also, for example, an OR circuit may be provided in which one input terminal is connected to the output of the time constant circuit 221, the other input terminal is connected to the OUT17 terminal, and the output terminal is connected to the gate of the p-type MOSFET 211. Good. In this case, the signal output from the OUT16 terminal is switched from the HI signal to the LOW signal in advance timing before the light emission timing of the winning notification LED 37, and the signal output from the OUT17 terminal is changed from the HI signal in the above light emission timing. It is preferable to control the third driving IC 203 so as to switch to the LOW signal. Accordingly, the light emission timing of the winning notification LED 37 can be controlled appropriately. In this case, the period between the advance timing and the light emission timing may be set longer than the period required for discharging the capacitor 223.

  (27) Other types of pachinko machines different from the above embodiments, such as a pachinko machine in which the electric accessory opens a predetermined number of times when a game ball enters a specific area of a special device, or a game ball in a specific area of the special device. The present invention can also be applied to a pachinko machine in which a right is generated and a big hit occurs, a pachinko machine provided with another accessory, an arrangement ball machine, a game machine such as a sparrow ball.

  Further, a non-ball-ball type gaming machine, for example, a plurality of reels provided with a plurality of kinds of symbols in the circumferential direction is provided, the reel is started to rotate by inserting a medal and operating a start lever, and a stop switch is operated. Or, after the reels have stopped due to the lapse of a predetermined period, if a specific symbol or a combination of specific symbols is established on the activated line visible from the display window, the player is given a privilege such as payout of medals. The present invention can also be applied to a slot machine.

  In addition, a pachinko machine and a slot machine that include a take-in device and start rotation of a reel by operating a start lever after a predetermined number of game balls stored in a storage section have been taken in by the take-in device. The present invention can be applied to a gaming machine in which

<Regarding invention groups extracted from the above-described embodiment>
The features of the invention group extracted from the above-described embodiments will be described below, showing effects and the like as necessary. In the following, for ease of understanding, the corresponding configuration in the above embodiment is appropriately shown in parentheses or the like, but is not limited to the specific configuration shown in brackets or the like.

<Feature A group>
Features A1. A plurality of elements (LED173),
Element driving means (LED driving section 172) for individually driving the plurality of elements,
An element control unit (sub CPU 111) that is connected to the element driving unit via wiring and outputs predetermined drive data to the element driving unit via the wiring to individually control each element;
Equipped with
In the gaming machine, the element driving means individually drives each element in a mode corresponding to the drive data when the drive data is input from the element control means through the wiring,
The element driving means includes a plurality of driving units (driving ICs 191, 192, 203) connected in series to each other,
The plurality of driving units are connected in a state in which the plurality of elements are allocated,
The element drive unit sequentially transmits the drive data between the plurality of drive units at each predetermined update timing in a situation where the drive data is input from the element control unit, and thereby each element A game machine characterized by sequentially setting the modes.

  According to the characteristic A1, the driving state of each element is set by transmitting the driving data between the plurality of driving units. With this, it is not necessary to transmit drive data to each drive unit, so that it is possible to reduce the number of wirings that connect the element drive unit and the element control unit. In this case, since the space occupied by the wiring can be reduced, it becomes easy to adjust the position of the wiring or perform a coating process so that ambient noise does not enter the wiring. Therefore, malfunction of each element due to noise can be suppressed.

  From the above, it is possible to preferably drive each element while simplifying the configuration.

  Further, when a device is newly provided, the device and the drive unit corresponding to the device may be further provided in series, and the design change to the existing drive unit can be small. This makes it possible to easily deal with the addition of elements and the like.

Feature A2. Each of the plurality of drive units,
A data input section (DATAIN terminal) to which the drive data is input,
A data output unit (DATAOUT terminal) to which the drive data is output,
Equipped with
Wiring for serial connection for connecting the respective driving units in series (wiring for connecting the DATAOUT terminal of the first driving IC 191 and the DATAIN terminal of the second driving IC 192, the DATAOUT terminal of the second driving IC 192 and the DATAIN terminal of the third driving IC 203 Wiring to connect the
The serial connection wiring connects the data output section of a predetermined drive section of the plurality of drive sections to the data input section of another predetermined drive section, whereby the plurality of drive sections are connected in series. Cage,
The game machine according to feature A1, wherein a wiring from the element control means is connected to a data input unit of the drive unit in which the serial connection wiring is not connected to the data input unit.

  According to the characteristic A2, the data output section of the predetermined drive section and the data input section of the other predetermined drive section are connected by the serial connection wiring, and the serial connection wiring is not connected to the data input section. The element control means is connected to the data input section of the drive section. Accordingly, the drive data input from the element control unit to the specific drive unit can be sequentially transmitted from the specific drive unit to each drive unit.

  The “driving unit in which the wiring for serial connection is not connected to the data input unit” is specifically, arranged among the plurality of driving units connected in series in the uppermost stream in the driving data transmission path. Drive unit.

Features A3. The drive unit is
A drive data acquisition unit (update circuit 191a, which acquires the drive data each time a predetermined acquisition timing is reached and sets the acquired drive data in a predetermined storage area (data areas D0 to D16). 192a etc.),
A drive data transmission unit (update circuits 191a, 192a, etc.) that transmits the drive data stored in the storage area each time a predetermined transmission timing is reached;
Equipped with
The gaming machine according to feature A1 or feature A2, wherein the acquisition timing and the transmission timing are set to be different from each other.

  According to the characteristic A3, the drive data is acquired at each acquisition timing, the acquired drive data is stored in the storage area, and the drive data stored in the storage area is output at each transmission timing. As a result, drive data is sequentially transmitted between a plurality of drive units like a bucket brigade.

  In such a configuration, if the acquisition timing and the transmission timing are the same, it is unknown whether the drive data already stored in the storage area is transmitted or the drive data newly acquired by the drive data acquisition unit is transmitted. Therefore, the transmission of drive data becomes unstable. Therefore, the drive data may not be transmitted correctly.

  On the other hand, according to this feature, since the transmission timing is different from the acquisition timing, the drive data stored in the storage area is transmitted in a stable state. As a result, the transmission error of the drive data as described above can be suppressed, and the malfunction of the element due to the transmission error can be suppressed.

Features A4. The acquisition timing is set to have a predetermined cycle,
The gap between the acquisition timing and the transmission timing is set to be smaller than the predetermined cycle, and the gaming machine according to feature A3.

  According to the characteristic A4, drive data is sequentially acquired at a predetermined cycle. In this case, since the deviation between the acquisition timing and the transmission timing is set to be smaller than the drive data acquisition interval, the acquisition and the output are alternately performed. As a result, it is possible to avoid the inconvenience of, for example, acquiring the same data redundantly. Therefore, it is possible to avoid the inconvenience that may be caused by shifting the acquisition timing and the transmission timing.

Features A5. A specific signal output means (function of outputting the clock signal SG1 in the sub CPU 111) for outputting a specific signal in which the HI level signal and the LOW level signal are alternately switched,
The drive data acquisition unit acquires the drive data based on the specific signal having a predetermined first form, and sets the acquired drive data in a predetermined storage area. Yes,
The gaming machine according to the feature A3 or the feature A4, wherein the drive data transmission unit outputs the drive data based on the specific signal being in a second form different from the first form. ..

  According to the characteristic A5, the drive data is transmitted based on the specific signal having the first form, and the drive data is acquired based on the specific signal having the second form. Since the first form and the second form are different from each other, the acquisition timing and the transmission timing are different. As a result, the acquisition timing and the transmission timing can be made different by using the same specific signal.

  Here, for example, when the drive data acquisition unit and the drive data transmission unit operate with different specific signals, the transmission timing and the acquisition timing may be synchronized due to the delay of one specific signal or the like. On the other hand, according to this feature, since the same specific signal is used, even if the specific signal is delayed, a predetermined interval is secured between the transmission timing and the acquisition timing. .. As a result, it is possible to avoid the inconvenience that the transmission and the reception of the drive data are synchronized with each other due to the delay of the specific signal.

Features A6. The specific signal output unit is a clock unit that outputs a clock signal at a predetermined cycle as the specific signal,
The drive data acquisition unit acquires the drive data based on the clock signal being in the first form, and sets the acquired drive data in a predetermined storage area,
The gaming machine according to Feature A5, wherein the drive data transmission unit outputs the drive data based on the clock signal being in the second form.

  According to the characteristic A6, the effect of the characteristic A5 can be obtained by using the clock signal as the specific signal.

Features A7. The first mode is one of rising and falling of the clock signal,
The game machine according to feature A6, wherein the second form is the other of the clock signals.

  According to the characteristic A7, by adjusting the duty ratio of the clock signal, the interval between the transmission timing and the acquisition timing of the drive data can be adjusted. As a result, it is possible to easily perform the adjustment work for adjusting the interval so that the transmission error of the drive data does not easily occur.

  Feature A8. In the feature A6 or the feature A7, the clock means is connected in parallel to the plurality of drive units and outputs the clock signal to each drive unit at the same time. The game machine described.

  According to the characteristic A8, the clock means is connected in parallel to each drive unit, and the clock signal is output to each drive unit, so that the clock signal is transmitted in series between the drive units. Compared with the configuration described above, the shift of the clock signal between the drive units is less likely to occur. As a result, it is possible to suppress the transmission error of the activation data due to the deviation of the transmission timing or the acquisition timing of the drive data in each drive unit.

  Feature A9. Any of the characteristics A6 to A8, wherein the clock means stops the output of the clock signal to each drive section when the drive data is not input to the element drive means. The gaming machine described in 1.

  According to the feature A9, the clock signal is not input to each drive unit in the situation where the drive data is not input to the element drive unit. As a result, since each drive unit does not transmit data, it is possible to avoid the inconvenience that the data transmission is erroneously performed and the element malfunctions.

Feature A10. Determination means for determining whether or not the transmission of the drive data has been completed (function of executing the process of step S911 in the voice lamp control device 90);
When the determination unit determines that the transmission of the drive data has been completed, a drive start signal output unit that outputs a drive start signal to each drive unit (the voice lamp control device 90 executes the process of step S912). Function),
Equipped with
The drive unit drives each element in a manner corresponding to the drive data based on the input of the drive start signal, according to any one of features A1 to A9. Amusement machine.

  According to the characteristic A10, the drive start signal is output when the transmission of the drive data is completed, and each element is driven. Accordingly, it is possible to avoid the inconvenience that the driving is started at the timing before the transmission of the driving data is completed.

  Further, each element is driven based on the input of the drive start signal, so that the drive start timing of each element can be synchronized. Therefore, it is possible to suppress the inconvenience that the drive start timing of each element varies due to the delay that may occur due to the sequential transmission of the drive data.

  The drive start signal output means is preferably connected in parallel to each drive unit and outputs the drive start signal to each drive unit. This makes it difficult for the drive start signals to shift between the drive units.

Features A11. The wiring is a first wiring (a wiring for transmitting the LED drive data SD),
Permission signal output means for outputting a predetermined permission signal (function of the sub CPU 111 for outputting the first permission signal SG3 and the second permission signal SG4);
A second wiring (wiring for transmitting the first permission signal SG3 and the second permission signal SG4) which connects the permission signal output means and each drive unit, and which is a system different from the first wiring;
Equipped with
The drive unit drives each element in a manner corresponding to the drive data when the permission signal is input via the second wiring, while the permission signal is input via the second wiring. The gaming machine according to any one of the features A1 to A10, characterized in that, if not, each element is not driven.

  According to the characteristic A11, each element is driven by the drive unit when the permission signal is input, whereas each element is not driven when the permission signal is not input. With this, by controlling the permission signal, it is possible to suppress the malfunction of the element which is not desired to be driven.

  In such a configuration, since the transmission of the drive data and the transmission of the permission signal are performed by separate wiring lines, even if noise is introduced into one of the two, it has little effect on the other, and as a result, the drive section is Less susceptible to noise. As a result, it is possible to avoid the inconvenience that the element malfunctions due to noise.

  In addition, since it is not necessary to separately set special information such as a flag in the drive data when transmitting the drive data, it is possible to simplify the configuration of the drive data transmission and set the special information. It is possible to suppress a transmission error that may occur due to

  Further, by configuring the permission signal to be transmitted in a system different from that of the drive data, it is possible to prevent the both from interfering with each other. As a result, it is possible to suppress malfunction of each element that may occur due to interference between the permission signal and the drive data.

Feature A12. An award determination unit (a function of the main control device 60 for executing the process of step S401) that determines whether or not to grant the privilege based on the satisfaction of a predetermined condition;
When the determination result of the grant determining means is a grant corresponding result of granting a privilege, a privilege granting means for granting a privilege to the player (a function of executing a game state transition process in the main controller 60) ,
Equipped with
The element control means, when the determination result of the application determination means is the application correspondence result, the drive data so that a predetermined specific element of the plurality of elements is driven in a predetermined specific mode. Is output to the element driving means,
The permission signal output means,
First output means (function of outputting a second permission signal SG4 in the sub CPU 111) for outputting the permission signal to the specific drive section corresponding to the specific element;
A second output unit that outputs the permission signal to a drive unit other than the specific drive unit among the plurality of drive units (a function that outputs the first permission signal SG3 in the sub CPU 111);
The gaming machine according to feature A11, which is provided with:

  According to the characteristic A12, the first output means and the second output means are provided, and the specific drive section drives the specific element based on the input of the permission signal from the first output means. Thus, when the specific element is not driven, the first output means is set not to output the permission signal, while the second output means is set to output the permission signal. It is possible to drive elements other than the specific element while preventing them from occurring.

Feature A13. The element control means is
First storage means and second storage means (LED drive register 141) capable of storing the drive data;
Drive data writing means (a function of executing the processing of step S908 in the audio lamp control device 90) for executing writing processing for writing the drive data alternately to the first storage means and the second storage means;
Transmitting means for transmitting the drive data stored in the storage means, of the first storage means and the second storage means, in which the write processing is not performed by the drive data writing means, to the element drive means,
The gaming machine according to any one of the features A1 to A12, which is characterized by comprising:

  According to the characteristic A13, while the drive data stored in the one storage unit is being transmitted to the element drive unit, the drive data write process is performed in the other storage unit. As a result, it is not necessary to wait for the output of drive data until the writing process is completed, and thus the period required for transmission of drive data can be shortened. Therefore, it is possible to reduce the lengthening of the transmission period that may be caused by sequentially transmitting the drive data.

Features A14. The element control means includes drive data update means (a function of executing LED drive data update processing) that updates the drive data at a predetermined specific cycle (execution cycle of audio light emission control processing), and the drive data update To sequentially output the drive data updated by the means,
The gaming machine according to any one of features A1 to A13, wherein the transmission of the drive data is set to be completed in a period shorter than the specific cycle.

  According to the characteristic A14, the drive state of each element is periodically updated by updating the drive data at a predetermined specific cycle. In such a configuration, the transmission of the drive data is set to be completed in a period shorter than the specific cycle, so that the drive mode can follow the update of the drive data. As a result, it is possible to suppress malfunction of each element that may be caused by updating the drive data before the transmission of the drive data is completed.

  According to the relationship with the characteristic A3, "the interval between the acquisition timings and the interval between the transmission timings are set so that the transmission of the drive data is completed in a period shorter than the specific cycle". Good.

  Further, according to the relationship with the characteristic A6, “the frequency of the clock signal is set so that the transmission of the drive data is completed in a period shorter than the specific cycle”.

  Feature A15. The gaming machine according to any one of features A1 to A14, characterized in that the device includes a light emitting device (LED 173 and winning notification LED 37) that emits light to inform about a game.

  According to the characteristic A15, the information about the game is given by the light emitting element. As a result, the player's attention can be attracted to the light emitting element, and the degree of attention to the game can be increased.

  Here, if the light emitting element malfunctions in a situation where the player's attention is attracted to the light emitting element, the player may be misunderstood, and the intended game property may not be transmitted to the player. In particular, a malfunction of a light emitting element is accompanied by light emission, and is therefore more conspicuous than other elements.

  On the other hand, since the malfunction of the light emitting element can be suppressed by applying the configuration of the feature A3 or the like, it is possible to avoid the inconvenience that the intended game property is not transmitted to the player.

  Further, in order to increase the degree of attention to the game, it is preferable that a plurality of light emitting elements be provided. In this respect, by applying the configuration of the feature 1, a plurality of light emitting elements can be easily driven by further adding a drive section connected to the light emitting elements in series. With this, it is possible to easily realize a configuration for increasing the degree of attention to the game.

Feature A16. An award determination unit (a function of the main control device 60 for executing the process of step S401) that determines whether or not to grant the privilege based on the satisfaction of a predetermined condition;
When the determination result of the grant determining means is a grant corresponding result of granting a privilege, a privilege granting means for granting a privilege to the player (a function of executing a game state transition process in the main controller 60) ,
Equipped with
The element control means drives a predetermined specific element (the winning notification LED 37) of the plurality of elements in a predetermined specific mode when the determination result of the assignment determination means is the assignment correspondence result. The gaming machine according to any one of the features A1 to A15, wherein the driving data is output to the element driving means as described above.

  According to the characteristic A16, the specific element is driven in a specific mode when the result is the assignment correspondence result. As a result, the player's attention can be attracted to the specific element, and the degree of attention to the game can be increased.

  Here, if the malfunction of the specific element occurs, the player may be misunderstood and the intended game property may not be transmitted to the player. In particular, in a situation where the player is paying attention to the specific element, the malfunction of the specific element is easily noticeable. On the other hand, by applying the configuration of the feature A3 or the like, it is possible to suppress the malfunction of the specific element, so that it is possible to avoid the inconvenience that the intended game property is not transmitted to the player.

  In addition, in relation to the characteristic A15, the specific element may be a specific light emitting element. In this case, when a plurality of light emitting elements are provided as the plurality of elements, it is preferable that the specific light emitting element has a larger light amount than the other light emitting elements. As a result, it is possible to perform a light effect that makes the player visually recognize impact light, while the malfunction of the specific light-emitting element becomes more noticeable when the malfunction occurs. On the other hand, by applying the configuration of the characteristic A3 or the like, it is possible to avoid inconvenience that may occur due to the strength of the impact while notifying the player of the impact.

Feature A17. The specific element is connected to a predetermined specific drive section (third drive IC 203 in the first to fifth embodiments, second drive IC 192 in the sixth embodiment) among the plurality of drive sections. When a predetermined drive signal is input from the specific drive unit, the specific drive unit is configured to drive in the specific mode,
The gaming machine according to feature A16, further comprising a noise removing unit (time constant circuit 221) provided between the specific element and the specific drive unit, for removing noise included in the drive signal.

  According to the characteristic A17, since the noise removing unit is provided, the noise of the drive signal input to the specific element is reduced. Accordingly, it is possible to avoid the inconvenience that the specific element malfunctions due to noise mixed in the drive signal output from the drive unit to the specific element.

Features A18. The specific element is connected to a predetermined specific drive section (third drive IC 203 in the first to fifth embodiments, second drive IC 192 in the sixth embodiment) among the plurality of drive sections. When a predetermined drive signal is input from the specific drive unit, the specific drive unit is configured to drive in the specific mode,
A transmission that is provided between the specific element and the specific drive section and that transmits the drive signal to the specific element based on that the drive signal is output from the specific drive section for a predetermined period. The game machine according to feature A16 or feature A17, which is provided with means.

  If the specific element is driven immediately with the input of the drive signal, the specific element may be instantaneously driven by noise. Therefore, the player may be misunderstood, and the intended game property may not be transmitted to the player. In particular, when the specific element is arranged at a position that is easy for the player to see in order to increase the degree of attention to the game, the above-mentioned malfunction is easily noticeable.

  On the other hand, according to this feature, when the state in which the drive signal is output from the specific drive unit is maintained for a predetermined period, the drive signal is transmitted to the specific element and the specific element is driven. .. As a result, even when a signal corresponding to the drive signal is momentarily generated due to the influence of noise, the specific element is not driven. Therefore, it is possible to reduce the influence of noise and to avoid the inconvenience.

Features A19. The element driving means includes a specific element driving means (winning notification circuit 201, 601, 701, 801) for driving a predetermined specific element (winning notification LED 37) of the plurality of elements,
The element control means is
Means for outputting predetermined specific drive data (specific LED drive data SDb etc.) on the basis of a predetermined specific trigger (function for outputting the LED drive data SD);
Based on the specific trigger, a specific drive signal that is predetermined separately from the specific drive data (the second permission signal SG4 input to the gate of the n-type MOSFET 212 in the first to fourth embodiments, in the fifth embodiment, A means (second permission signal SG4, discharge control signal SG5, switching signal SG6, etc.) for outputting the second permission signal SG4 and the discharge control signal SG5, which are input to the gate of the n-type MOSFET 212, and the switching signal SG6 in the sixth embodiment are output. Output function),
Equipped with
Features A1 to A18, characterized in that the specific element driving means operates the specific element in a predetermined specific mode when the specific drive data is input and the specific drive signal is input. The gaming machine according to any one of 1.

  According to the characteristic A19, the specific element operates in the specific mode by inputting the specific drive data and the specific drive signal to the specific element drive means in different systems. As a result, even if an error occurs in the specific drive data due to the transmission of the specific drive data between the drive units, the specific element is unlikely to malfunction. Therefore, in the configuration in which the specific drive data is transmitted between the drive units, it is possible to preferably suppress the malfunction of the specific element.

  The above characteristic group A is effective for the following problems.

  For example, some gaming machines such as pachinko machines are provided with a symbol display device having a display screen. For example, on the display screen of the pachinko machine, the symbols are variably displayed on the condition that the game ball passes through the operation opening provided in the game area, and an effect that enhances the interest of the game is performed, or a specific symbol is satisfied when a predetermined condition is satisfied. There is one that stops and displays, and teaches a special game state that is advantageous to a player such as a jackpot. As an effect that enhances the entertainment of the game, for example, there is a reach effect that is closely related to the jackpot and raises a player's expectation for the jackpot. In addition, in recent years, in order to further enhance the interest of the game, in addition to the symbols that are variably displayed for each game time, a character for production and the like are displayed, and reach production is performed using this character, or displayed on the display screen. Ingenuity such as increasing the number of symbols has been made, and display effects are becoming more diverse.

  Here, in order to enhance the interest of the game, in addition to the symbol display device, a plurality of elements used in various games such as a light emitting element and an electric movable element are provided, and an element driving means for driving the element. The drive circuit as is mounted. The drive circuit is connected to a control device that controls the game, for example, via wiring, and is configured to drive a corresponding element when a control signal is input from the control device.

  In such a configuration, if a plurality of elements are provided in order to enhance the interest of the game, for example, there is a concern that the configuration will become complicated, for example, the wiring connection configuration will be complicated. Further, if noise enters the driving circuit, the device may malfunction.

  The above-mentioned problem is a problem common to gaming machines provided with a plurality of elements and element driving means for driving each element.

  Incidentally, the configuration defined by any one of the following features B1 to B17, the following features C1 to C17, and the following features D1 to D13 may be applied to the configuration of any one of the above features A1 to A19. In this case, it is possible to obtain further effects by applying each configuration.

<Feature B group>
Feature B1. A light-emitting element (LED173) for emitting information about the game by emitting light,
Drive signal output means (drive ICs 191, 192, 203 in the first to fourth embodiments, drive ICs 191, 192, 203 in the fifth embodiment, and discharge control signals in the first to fourth embodiments) that outputs a predetermined drive signal according to the game situation. Function to output SG5),
Drive means (voltage application circuit 202) for causing the light emitting element to emit light when the drive signal is output from the drive signal output means,
A game machine comprising: a noise removing unit (time constant circuit 221) for removing noise mixed in the drive signal.

  According to the feature B1, it is possible to grasp the game situation by causing the light emitting element to emit light according to the game situation. As a result, the player's attention can be attracted to the light emitting element, and the degree of attention to the game can be increased.

  In such a configuration, if noise is mixed in the drive signal, the noise may cause the light emitting element to emit light instantaneously. Therefore, the player may be misunderstood, and the intended game property may not be transmitted to the player. In particular, when the light emitting element is arranged at a position that is easy for the player to see and the light amount of the light emitting element is set to be high in order to increase the degree of attention to the game, the light emission due to the above-mentioned malfunction is conspicuous.

  On the other hand, according to this feature, since the noise removing unit is provided, the noise of the drive signal input to the light emitting element is reduced. Accordingly, it is possible to avoid the inconvenience that the light emitting element malfunctions due to noise mixed in the drive signal output from the driving unit to the light emitting element.

  From the above, the light emitting element can be favorably driven.

Feature B2. A wiring that connects the drive signal output means and the drive means and that transmits the drive signal (a wiring that connects the OUT16 terminal and the p-type MOSFET 211);
The gaming machine according to Feature B1, wherein the noise removing unit is provided on the wiring and includes a regulating unit that regulates transmission of a signal having a frequency within a predetermined range.

  According to the characteristic B2, the transmission of the signal having the frequency within the predetermined range is regulated by the regulation means. As a result, noise having a frequency within a predetermined range can be removed from the drive signal.

  Feature B3. The gaming machine according to Feature B2, wherein the restricting unit includes a specific circuit having a resistor provided on the wiring and a capacitor connected in parallel to the resistor.

  According to the feature B3, since the specific circuit is provided, the transmission of the signal having a frequency higher than the specific frequency is regulated by the specific circuit, and the signal having the frequency lower than the specific frequency is transmitted through the specific circuit. It The specific frequency is determined based on the electric capacity of the capacitor and the resistance value of the resistor. With this, by adjusting the electric capacitance of the capacitor and the resistance value of the resistor to set the specific frequency in accordance with the frequency of the noise to be removed, the noise can be suitably removed.

  Feature B4. In the feature B3, the specific circuit outputs the drive signal or a signal corresponding thereto to the drive means based on the drive signal being output for a predetermined period. The game machine described.

  If the driving unit is configured to immediately cause the light emitting element to emit light in response to the output of the drive signal, the light emitting element may momentarily emit light due to noise. Therefore, the player may be misunderstood, and the intended game property may not be transmitted to the player. In particular, when the light emitting element is arranged at a position that is easy for the player to see or the light amount of the light emitting element is set to be high in order to raise the degree of attention to the game, the light emission due to the above-mentioned malfunction is likely to be conspicuous.

  On the other hand, according to this feature, the light emitting element emits light when the state in which the drive signal is output is maintained for a predetermined period. As a result, even if a signal corresponding to the drive signal is momentarily generated due to the influence of noise, the drive means does not drive. Therefore, the influence of noise can be reduced, the malfunction of the light emitting element can be suppressed, and the above inconvenience can be avoided.

Feature B5. Drive data updating means (function for executing LED drive data updating process) for updating predetermined drive data in a periodic process executed in a predetermined specific cycle,
The drive signal output means outputs the drive signal based on the drive data,
The gaming machine according to feature B4, wherein the predetermined period is set longer than the specific period.

  According to the feature B5, the drive signal is output based on the drive data output from the drive data updating unit, and the light emitting element emits light. The drive data is updated in a regular process performed every specific period. In this case, by updating the drive data, for example, an effect of blinking the light emitting element in a predetermined cycle can be performed.

  In such a configuration, when the output period of the drive signal is longer than the specific period, the drive unit operates and the light emitting element emits light. As a result, even if an error occurs in updating the drive data due to the influence of noise, the light emitting element does not emit light unless the error occurs a plurality of times. Accordingly, it is possible to prevent the light emitting element from malfunctioning due to an error that may occur when the drive data is updated or an error that may occur when the drive signal is output based on the drive data. Therefore, it is possible to suitably control the light emitting element by updating the drive data and suppress malfunction of the light emitting element due to an error that may occur.

  As a specific configuration of this feature, it is conceivable that “the capacitance of the capacitor and the resistance value of the resistor are set such that the predetermined period is longer than the specific period”.

Feature B6. The drive signal output means has a first drive signal (LOW signal of discharge control signal SG5 in the fifth embodiment) and a second drive signal (LOW signal output from the OUT16 terminal in the fifth embodiment) as the drive signals. And outputs
The noise removing means outputs the first drive signal when the first drive signal is output from the drive signal output means for a predetermined period.
When the first drive signal is input from the noise removal unit and the second drive signal is input from the drive signal output unit, the drive unit is controlled so that the light emitting element emits light. A drive control unit (OR circuit 602) is provided to control the drive unit so that the light emitting element does not emit light when either the first drive signal or the second drive signal is not input. The gaming machine according to any one of features B1 to B5.

  According to Feature B6, in the configuration in which the first drive signal and the second drive signal are input in different systems, the light emitting element emits light when each drive signal is input to the drive control means, or either one of them. When is not input, the light emission of the light emitting element is stopped. Accordingly, the light emitting element can be immediately stopped by stopping the output of the second drive signal regardless of the mode of the first drive signal. Therefore, the light emission of the light emitting element can be appropriately stopped.

  Further, since the light emitting element emits light only when each drive signal is input to the drive control means, the light emitting element emits light based on the output of the first drive signal for a predetermined period. .. As a result, even if a signal corresponding to the first drive signal is momentarily generated due to the influence of noise, the drive means does not drive. Therefore, the influence of noise can be suppressed, and malfunction of the light emitting element can be suppressed.

  Feature B7. The drive signal output means outputs the first drive signal at a timing that is at least the predetermined period before a predetermined light emission start timing, and outputs the second drive signal at the light emission start timing. The gaming machine according to feature B6, which is characterized by being

  According to the feature B7, the light emitting element can emit light at the light emission start timing by outputting the first drive signal in advance at the timing before the light emission start timing. As a result, a time lag can be prevented from occurring between the internally predetermined light emission start timing and the actual light emission timing, and the light emission timing of the light emitting element can be suitably controlled.

Feature B8. Granting means (a function of executing the process of step S401 in the main control device 60, and a process of step S1302 in the fifth embodiment, which determines whether or not to grant a privilege, when a predetermined condition is satisfied. Function to execute)
When the determination result of the grant determining means is a grant corresponding result of granting a privilege, a privilege granting means for granting a privilege to the player (a function of executing a game state transition process in the main controller 60) ,
After performing the grant determination by the grant determination means, a game operation execution means for performing a game operation corresponding to the determination result of the grant determination means (executes game time control processing in the MPU 62 of the main controller 60) Function)
Equipped with
The gaming machine according to Feature B7, wherein the drive signal output unit can start outputting the first drive signal when the grant determination is made by the grant determination unit.

  According to the feature B8, the output of the first drive signal can be started when the grant determination is performed by the grant determination unit. Thereby, the output of the first drive signal can be started before the game operation related to the grant determination is performed. Therefore, it is possible to reduce a time lag due to a predetermined period when the light emitting element is caused to emit light in the game operation related to the above-mentioned grant determination.

  In addition, it is preferable that the “drive signal output means starts outputting the first drive signal when the addition determination means determines the addition correspondence result”. With this, the light emitting element can emit light in the game operation related to the assignment correspondence result, so that the degree of attention to the light emitting element can be increased more suitably.

Feature B9. An information acquisition unit for acquiring special information based on the establishment of a predetermined acquisition condition (a function for acquiring reserved information in the process of step S105 in the MPU 62 of the main control device 60);
Acquired information storage means for storing the special information acquired by the information acquisition means as a plurality of numbers with a prescribed number set in advance as an upper limit (holding information is reserved area in the processing of step S105 in the MPU 62 of the main control device 60). Function to memorize in RE),
In the case where the special information stored in the acquired information storage means determines whether or not the special information corresponds to predetermined predetermined information, and a plurality of special information is stored in the acquired information storage means. And an addition determination means (a function of executing the process of step S401 in the MPU 62 of the main control device 60) for sequentially performing the addition determination on the plurality of pieces of special information,
Privilege granting means (main control) for granting a privilege to the player based on the result of the grant determination by the grant determining means being a grant corresponding result that the special information to be determined corresponds to the grant information. A function of executing a game state transition process in the MPU 62 of the device 60),
Prior to the grant determination unit making the grant determination or based on the grant determination unit making the grant determination, the game reusing operation is started and corresponds to the result of the grant determination unit. As the result of the notification, the operation for ending the game use is regarded as one of the game times, and the operation for the game use for each game time is performed according to the special information stored in the acquired information storage means. Game time control means for controlling a predetermined notifying means (function for executing game time control processing in the MPU 62 of the main control device 60),
Information that reflects the determination result when the predetermined special information stored in the acquired information storage means is the target of the addition determination is set before the predetermined special information is the target of the addition determination. Destination specifying means for specifying at timing (a function of executing confirmation processing for holding notice of the MPU 62 of the main control device 60 in the fifth embodiment);
Equipped with
The gaming machine according to feature B7, wherein the drive signal output means is capable of starting output of the first drive signal when the identification by the destination identification means is performed.

  According to the feature B9, in the configuration in which the result of the grant determination for the predetermined special information is specified at the timing before the special information is the target of the grant determination, the specification for the predetermined special information is performed. The output of the first drive signal may be started when the output is turned off. As a result, it is possible to start the counting of the predetermined period at a timing before the timing at which the game time relating to the predetermined special information is started. Therefore, it is possible to set the start timing of the game times related to the predetermined special information as the light emission start timing, and the degree of freedom of the light emission timing of the light emitting element can be increased.

  In addition, as a specific configuration of this feature, for example, "the drive signal output means can start outputting the first drive signal at a timing when the identification by the destination identification means is performed. As the light emission start timing, it is possible to output the second drive signal at a timing when at least the predetermined period has elapsed since the identification by the pre-identification unit was performed”.

  In this case, "means for grasping the signal duration from the timing at which the identification by the destination identification means is performed to the timing at which the game time for the predetermined special information is started, and the game time for the predetermined special information And a means for determining whether or not the signal duration is shorter than the predetermined period, when the drive signal output means is configured so that the signal duration is shorter than the predetermined period. If it is determined that at least one of the first drive signal and the second drive signal is not output.” As a result, when the light emitting element is caused to emit light in the game time relating to the predetermined hold information, if the time lag based on the predetermined period may occur, the light emitting element itself does not emit light. Therefore, it is possible to prevent the player from feeling uncomfortable due to the time lag.

  In addition, it is preferable that “the drive signal output means starts outputting the first drive signal when the identification result by the destination identification means is a result corresponding to the assignment correspondence result”. Accordingly, the light emitting element can be caused to emit light in the game time related to the assignment correspondence result, so that the degree of attention to the light emitting element can be increased more suitably.

Feature B10. The game time control means executes the process of step S1403 in the sub CPU 111 of the voice lamp control device 90, which performs a lottery on whether or not to emit the light emitting element when the game time is started. Function),
The drive signal output means stops the output of the first drive signal when the lottery result by the light emission lottery means corresponds to the fact that the light emitting element is not made to emit light. A gaming machine described in Feature B9.

  According to the characteristic B10, when the game time is started, a lottery is performed to determine whether or not the light emitting element is to emit light, and when the game is missed, the output of the first drive signal is stopped. It is possible to avoid the situation where the light emitting element emits light.

  Feature B11. The drive signal output means maintains the output of the first drive signal until a predetermined specific period (the period during which the winning notification effect is performed) has elapsed from the light emission start timing. The gaming machine according to any one of features B7 to B10.

  According to Feature B11, since the output of the first drive signal is maintained during the specific period, by controlling the second drive signal, the light emitting element can be controlled without considering the predetermined period. it can. Thereby, the light emitting element can be controlled appropriately.

  Feature B12. The drive signal output means is provided with means for controlling the second drive signal so that the light emitting element blinks in the specific period (function of executing the process of step S1507 of the sub CPU 111). The gaming machine described in Feature B11.

  According to the feature B12, it is possible to perform an effect in which the light emitting element blinks in a specific period, and it is possible to increase the degree of attention to the game through the effect.

  Here, assuming that the drive signal is only the first drive signal, the control of the first drive signal may not follow the blinking of the light emitting element depending on the relationship between the predetermined period and the blinking cycle. Can happen.

  On the other hand, according to this feature, since the light emitting element is controlled by controlling the second drive signal transmitted without waiting for the predetermined period, it is possible to avoid the inconvenience. You can

Feature B13. Drive data update means (function for executing LED drive data update processing) for updating predetermined drive data in regular processing executed in a predetermined specific cycle,
The drive signal output means outputs the first drive signal based on the drive data, while outputting the second drive signal separately from the drive data. The gaming machine according to any one of the above.

  According to Feature B13, the first drive signal is output based on the drive data output from the drive data updating unit, so that the light emitting element can emit light. The drive data is updated in a regular process performed every specific period. In this case, by updating the drive data, for example, an effect of blinking the light emitting element in a predetermined cycle can be performed.

  In such a configuration, the second drive signal is output separately from the drive data. As a result, the second drive signal can be controlled without updating the drive data. Therefore, control of the second drive signal can be facilitated, and even when the output timing of the second drive signal is irregular, the irregularity can be appropriately dealt with.

Feature B14. A predetermined permission signal (second permission signal SG4) is provided to the drive signal output means and the permission signal output means (function to output the second permission signal SG4 in the sub CPU 111) to the drive means;
The drive signal output means transitions from a state in which the drive signal cannot be output or a difficult state to a state in which the drive signal can be output based on the input of the permission signal from the permission signal output means. ,
The driving means drives the light emitting element when the permission signal is input from the permission signal output means and the drive signal is input from the drive signal output means.
The gaming machine according to any one of features B1 to B13, wherein the permission signal output means stops outputting the permission signal when the light emitting element is not caused to emit light.

  According to the feature B14, the drive signal can be output when the permission signal is output. Thus, when the drive data is not output, it is possible to prevent the drive signal from being erroneously output by not outputting the permission signal.

  Further, since the driving means drives the light emitting element when the permission signal is input, even if the drive signal is erroneously output, the drive means is driven unless the permission signal is input. Means do not work. Accordingly, it is possible to suppress the malfunction of the light emitting element when the driving signal or the signal corresponding thereto is input to the driving unit by the malfunction.

  Here, when the noise removing means is provided, when the drive signal is stopped by the noise removing means, the transmission of the signal related to the stop may be delayed. In particular, when a predetermined period is set in order to reduce the influence of noise, as in the feature B4, the delay becomes remarkable, and the stop of light emission of the light emitting element is delayed.

  On the other hand, according to this feature, by stopping the output of the permission signal, the light emission of the light emitting element is immediately stopped even if the transmission of the signal related to the stop of the drive signal is delayed by the noise removing unit. be able to. Therefore, it is possible to avoid the inconvenience that may be caused by providing the noise removing means.

Feature B15. A plurality of the light emitting elements are provided, and a plurality of the drive signal output means are provided corresponding to each light emitting element,
Each drive signal output means is connected in series with each other,
Each drive signal output means is connected in a state in which the plurality of light emitting elements are allocated,
Drive data control means (sub drive) that outputs predetermined drive data to at least one drive signal output means of the plurality of drive signal output means, and updates the drive data each time a predetermined update timing is reached. CPU111),
Each drive signal output means sequentially transmits the drive data between the drive signal output means each time a predetermined update timing is reached in a situation where the drive data is being output from the drive data control means. The output state of the drive signal is set to correspond to the drive data,
One of the features B1 to B14, wherein the noise removing means removes noise mixed in a drive signal output from a predetermined drive signal output means of the plurality of drive signal output means. The gaming machine described in 1.

  According to Feature B15, a plurality of light emitting elements are provided, and a plurality of drive signal output means are provided corresponding to each light emitting element. When the drive data is being output by the drive data control means, the drive data is transmitted between the drive signal output means, and the output state of the drive signal of each drive signal output means corresponds to the drive data. Is set. With this, it is not necessary to connect the drive data control unit and each drive signal output unit to each other to transmit the drive data, so that the number of wirings connecting the drive data control unit and the drive signal output unit can be reduced. You can Therefore, it is possible to preferably drive each light emitting element while simplifying the configuration.

  In such a configuration, noise mixed in the drive signal of the predetermined drive signal output unit among the plurality of drive signal output units is removed by the noise removal unit. Thus, by setting, as the predetermined drive signal, for example, a drive signal that controls the drive control of the light emitting element that is particularly noticeable in the game, it is possible to suppress the malfunction of the light emitting element that is easily noticeable. Further, as the predetermined drive signal, for example, by setting a drive signal that is more likely to contain noise than other drive signals depending on the positional relationship with other game equipment such as a power supply unit that converts a commercial power source into a DC power source, In particular, it is possible to suppress malfunction of a drive signal that is prone to noise.

Feature B16. An award determination unit (a function of the main control device 60 for executing the process of step S401) that determines whether or not to grant the privilege based on the satisfaction of a predetermined condition;
When the determination result of the grant determining means is a grant corresponding result of granting a privilege, a privilege granting means for granting a privilege to the player (a function of executing a game state transition process in the main controller 60) ,
Equipped with
The drive data control means sets the drive data such that a predetermined specific light emitting element among the light emitting elements emits light in a predetermined specific mode when the assignment correspondence result is obtained. ,
The noise removing means is provided between a specific drive means for driving the specific light emitting element and a specific drive signal output means for outputting the drive signal to the specific drive means, and noise mixed in the drive signal. The gaming machine according to feature B15, which is characterized in that

  According to the characteristic B16, the specific light emitting element emits light in a specific mode when the result is the assignment correspondence result. As a result, it is possible to attract the player's attention to the specific light emitting element, and it is possible to increase the degree of attention to the game. In this case, due to the high degree of attention to the specific light emitting element, the light emission due to the malfunction of the specific light emitting element is likely to be visually recognized by the player and is easily noticeable. This may give a misunderstanding to the player, and the intended game property may not be transmitted to the player.

  On the other hand, according to this feature, since noise mixed in the drive signal for driving the specific light emitting element is removed by the noise removing unit, malfunction of the specific light emitting element is less likely to occur. As a result, malfunction of the specific light emitting element can be suppressed, and inconvenience that may occur due to the malfunction can be avoided.

  Feature B17. The gaming machine according to feature B16, wherein the specific drive signal output means is provided on a downstream side in a drive data transmission path formed by the plurality of drive signal output means.

  The design of the specific light emitting element is easily changed for each type of gaming machine in order to enhance the interest in the game. In this respect, according to this feature, the specific drive signal output means for outputting a drive signal to the specific drive means for controlling the drive of the specific light emitting element is provided on the downstream side in the drive data transmission path. When it is necessary to change the specific light emitting element separately, it is not necessary to change the configuration on the upstream side. This makes it possible to easily change the specific light emitting element and the configuration for driving and controlling the specific light emitting element.

  Incidentally, the configuration defined by any one of the features A1 to A19 and the following features D1 to D13 may be applied to the configuration of any one of the features B1 to B17. In this case, it is possible to obtain further effects by applying each configuration.

<Characteristic C group>
Feature C1. A light-emitting element (LED173) for emitting information about the game by emitting light,
Drive means (voltage application circuit 202) for causing the light emitting element to emit light;
Drive signal output means (drive ICs 191, 192, 203 in the first to fourth embodiments, drive ICs 191, 192 in the fifth embodiment) that outputs a predetermined drive signal to the drive means according to the game situation. , 203 and the function of outputting the discharge control signal SG5),
Drive control means for controlling the drive means so that the light emitting element emits light based on the drive signal being output for a predetermined period (the time constant circuits 221 and 5 in the first to fourth embodiments). A time constant circuit 221 and an OR circuit 602) in the embodiment;
A gaming machine characterized by being equipped with.

  According to the characteristic C1, it is possible to grasp the game situation by causing the light emitting element to emit light according to the game situation. As a result, the player's attention can be attracted to the light emitting element, and the degree of attention to the game can be increased.

  In such a configuration, if the driving unit causes the light emitting element to immediately emit light in response to the output of the drive signal, the light emitting element may momentarily emit light due to noise. Therefore, the player may be misunderstood, and the intended game property may not be transmitted to the player. In particular, when the light emitting element is arranged in a position that is easy for the player to see or the light amount of the light emitting element is set to be high in order to increase the degree of attention to the game, the light emission due to the above-mentioned malfunction is conspicuous.

  On the other hand, according to this feature, the light emitting element emits light when the state in which the drive signal is output is maintained for a predetermined period. As a result, even if a signal corresponding to the drive signal is momentarily generated due to the influence of noise, the drive means does not drive. Therefore, it is possible to reduce the influence of noise and to avoid the inconvenience.

  From the above, the light emitting element can be favorably driven.

Feature C2. Drive data updating means (function for executing LED drive data updating process) for updating predetermined drive data in a periodic process executed in a predetermined specific cycle,
The drive signal output means outputs the drive signal based on the drive data,
The gaming machine according to feature C1, wherein the predetermined period is set longer than the specific period.

  According to the characteristic C2, the drive signal is output based on the drive data output from the drive data updating unit, and the light emitting element emits light. The drive data is updated in a regular process performed every specific period. In this case, by updating the drive data, for example, an effect of blinking the light emitting element in a predetermined cycle can be performed.

  In such a configuration, when the output period of the drive signal is longer than the specific period, the drive unit operates and the light emitting element emits light. As a result, even if an error occurs in updating the drive data due to the influence of noise, the light emitting element does not emit light unless the error occurs a plurality of times. Accordingly, it is possible to prevent the light emitting element from malfunctioning due to an error that may occur when the drive data is updated or an error that may occur when the drive signal is output based on the drive data. Therefore, it is possible to suitably control the light emitting element by updating the drive data and suppress malfunction of the light emitting element due to an error that may occur.

Feature C3. A wiring that connects the drive signal output means and the drive means and that transmits the drive signal (a wiring that connects the OUT16 terminal and the p-type MOSFET 211);
The drive control means is provided on the wiring and transmits the drive signal to the drive means when the state in which the drive signal is output from the drive signal output means continues for the predetermined period. The gaming machine described in the feature C1 or the feature C2, which is provided with a transmission unit (time constant circuit 221) that does.

  In order to increase the brightness of the light emitting element from the viewpoint of increasing attention to the light emitting element, it is necessary to increase the power supplied to the light emitting element. In this case, if a structure corresponding to a predetermined period such as a structure for measuring a predetermined period is provided to the driving means, power loss occurs due to the structure, and power is not appropriately supplied to the light emitting element. Fear can occur.

  On the other hand, according to this feature, since the transmission means is provided on the wiring connecting the drive signal output means and the drive means, it is necessary to separately provide the drive means with a configuration corresponding to a predetermined period. There is no. Thereby, the power supply to the light emitting element can be suitably performed, and the emission brightness of the light emitting element can be suitably enhanced. Therefore, it is possible to increase the degree of attention to the light emitting element while securing the effect of the feature C1.

Feature C4. The transmission means is
The gaming machine according to feature C3, comprising a specific circuit having a resistor provided on the wiring and a capacitor connected in parallel to the resistor.

  According to the feature C4, since the resistor and the capacitor connected in parallel to the resistor are provided, when the drive signal is output, the transmission of the drive signal is delayed due to the transient phenomenon of the resistor and the capacitor. It The delay period is determined by the resistance value of the resistor and the capacitance of the capacitor. Accordingly, the predetermined period can be adjusted by adjusting the resistance value and the electrostatic capacitance, and the period in which malfunction does not easily occur can be set.

  Feature C5. The gaming machine according to feature C3 or feature C4, wherein the transmission means includes a regulation means that regulates transmission of a signal having a frequency higher than a predetermined specific frequency.

  According to the characteristic C5, since the transmission of the signal having the frequency higher than the specific frequency is regulated by the regulation means, the high frequency signal mixed in the drive signal is removed. With this, it is possible to suppress a malfunction that may occur due to the high-frequency signal entering the driving unit.

  According to the relationship with the characteristic C4, the signal having a frequency higher than the specific frequency is removed by the specific circuit. That is, the specific circuit functions as a transmission means as well as a regulation means. This makes it possible to achieve the above effects while simplifying the configuration.

Feature C6. The drive signal output means outputs a first drive signal (LOW signal of the discharge control signal SG5) and a second drive signal (LOW signal output from the OUT16 terminal) as the drive signals,
The drive control means,
Specific output means (time constant circuit 221) that outputs the first drive signal when the first drive signal is output from the drive signal output means for the predetermined period;
When the first drive signal is input from the specific output means and the second drive signal is input from the drive signal output means, the drive means is controlled so that the light emitting element emits light. Specific drive control means (OR circuit 602) for controlling the drive means so as not to emit light from the light emitting element when either the first drive signal or the second drive signal is not input,
The gaming machine according to any one of the features C1 to C5, which is characterized by including:

  According to Feature C6, in the configuration in which the first drive signal and the second drive signal are input in different systems, the light emitting element emits light when each drive signal is input to the specific drive control means. On the other hand, when one of the drive signals is not input, the light emitting element stops emitting light. Accordingly, the light emitting element can be immediately stopped by stopping the output of the second drive signal regardless of the mode of the first drive signal. Therefore, the light emission of the light emitting element can be appropriately stopped.

  Further, since the light emitting element emits light only when each drive signal is input to the specific drive control means, the light emitting element emits light based on the output of the first drive signal for a predetermined period. Become. As a result, even if a signal corresponding to the first drive signal is momentarily generated due to the influence of noise, the drive means does not drive. Therefore, the influence of noise can be suppressed, and malfunction of the light emitting element can be suppressed.

  Feature C7. The drive signal output means outputs the first drive signal at a timing that is at least the predetermined period before a predetermined light emission start timing, and outputs the second drive signal at the light emission start timing. The gaming machine according to feature C6, which is

  According to feature C7, the light emitting element can be caused to emit light at the emission start timing by outputting the first drive signal in advance at a timing before the emission start timing. As a result, a time lag can be prevented from occurring between the light emission start timing and the actual light emission timing, and the light emission timing of the light emitting element can be suitably controlled.

Feature C8. Granting means (a function of executing the process of step S401 in the main control device 60, and a process of step S1302 in the fifth embodiment, which determines whether or not to grant a privilege, when a predetermined condition is satisfied. Function to execute)
When the determination result of the grant determining means is a grant corresponding result of granting a privilege, a privilege granting means for granting a privilege to the player (a function of executing a game state transition process in the main controller 60) ,
After performing the grant determination by the grant determination means, a game operation execution means for performing a game operation corresponding to the determination result of the grant determination means (executes game time control processing in the MPU 62 of the main controller 60) Function)
Equipped with
The gaming machine according to Feature C7, wherein the drive signal output unit can start outputting the first drive signal when the grant determination is made by the grant determination unit.

  According to the characteristic C8, the output of the first drive signal can be started when the grant determination is performed by the grant determination unit. Thereby, the output of the first drive signal can be started before the game operation related to the grant determination is performed. Therefore, when the light emitting element is caused to emit light in the game operation related to the above-mentioned grant determination, the time lag due to the predetermined period can be reduced.

  In addition, it is preferable that the “drive signal output means starts outputting the first drive signal when the addition determination means determines the addition correspondence result”. With this, the light emitting element can emit light in the game operation related to the assignment correspondence result, so that the degree of attention to the light emitting element can be increased more suitably.

Feature C9. An information acquisition unit for acquiring special information based on the establishment of a predetermined acquisition condition (a function for acquiring reserved information in the process of step S105 in the MPU 62 of the main control device 60);
Acquired information storage means for storing the special information acquired by the information acquisition means as a plurality of numbers with a prescribed number set in advance as an upper limit (holding information is reserved area in the processing of step S105 in the MPU 62 of the main control device 60). Function to remember in RE),
In the case where the special information stored in the acquired information storage means determines whether or not the special information corresponds to predetermined predetermined information, and a plurality of special information is stored in the acquired information storage means. And an addition determination means (a function of executing the process of step S401 in the MPU 62 of the main control device 60) for sequentially performing the addition determination for the plurality of special information items
Privilege granting means (main control) for granting a privilege to the player based on the result of the grant determination by the grant determining means being a grant corresponding result that the special information to be determined corresponds to the grant information. A function of executing a game state transition process in the MPU 62 of the device 60),
Prior to the grant determination unit making the grant determination or based on the grant determination unit making the grant determination, the game reusing operation is started and corresponds to the result of the grant determination unit. As the result of the notification, the operation for ending the game use is regarded as one of the game times, and the operation for the game use for each game time is performed according to the special information stored in the acquired information storage means. Game time control means for controlling a predetermined notification means (function for executing game time control processing in the MPU 62 of the main control device 60),
Information that reflects the determination result when the predetermined special information stored in the acquired information storage means is the target of the addition determination is set before the predetermined special information is the target of the addition determination. Destination specifying means for specifying at timing (a function of executing confirmation processing for holding notice in the MPU 62 of the main control device 60 in the fifth embodiment);
Equipped with
The gaming machine according to Feature C7, wherein the drive signal output unit is capable of starting output of the first drive signal when the identification by the destination identification unit is performed.

  According to the characteristic C9, in the configuration in which the result of the grant determination for the predetermined special information is specified at the timing before the special information is the target of the grant determination, the specification for the predetermined special information is performed. The output of the first drive signal may be started when the output is turned off. As a result, it is possible to start counting the predetermined period at a timing before the timing at which the game time relating to the predetermined special information is started. Therefore, it is possible to set the start timing of the game times related to the predetermined special information as the light emission start timing, and the degree of freedom of the light emission timing of the light emitting element can be increased.

  In addition, as a specific configuration of this feature, for example, "the drive signal output means can start outputting the first drive signal at a timing when the identification by the destination identification means is performed. As the light emission start timing, it is possible to output the second drive signal at a timing when at least the predetermined period has elapsed since the identification by the pre-identification unit was performed”.

  In this case, "means for grasping the signal duration from the timing at which the identification by the destination identification means is performed to the timing at which the game time for the predetermined special information is started, and the game time for the predetermined special information And a means for determining whether or not the signal duration is shorter than the predetermined period, when the drive signal output means is configured so that the signal duration is shorter than the predetermined period. If it is determined that at least one of the first drive signal and the second drive signal is not output.” As a result, when the light emitting element is caused to emit light in the game time relating to the predetermined hold information, if the time lag based on the predetermined period may occur, the light emitting element itself does not emit light. Therefore, it is possible to prevent the player from feeling uncomfortable due to the time lag.

  In addition, it is preferable that “the drive signal output means starts outputting the first drive signal when the identification result by the destination identification means is a result corresponding to the assignment correspondence result”. Accordingly, the light emitting element can be caused to emit light in the game time related to the assignment correspondence result, so that the degree of attention to the light emitting element can be increased more suitably.

Feature C10. The game time control means executes the process of step S1403 in the sub CPU 111 of the voice lamp control device 90, which performs a lottery on whether or not to emit the light emitting element when the game time is started. Function),
The drive signal output means stops the output of the first drive signal when the lottery result by the light emission lottery means corresponds to the fact that the light emitting element is not made to emit light. The gaming machine described in Feature C9.

  According to the characteristic C10, when the game time is started, a lottery is performed on whether or not the light emitting element is caused to emit light, and when the game is missed, the output of the first drive signal is stopped. It is possible to avoid the situation where the light emitting element emits light.

  Feature C11. The drive signal output means maintains the output of the first drive signal until a predetermined specific period (a period during which the winning notification effect is performed) has elapsed from the light emission start timing. The gaming machine according to any one of features C7 to C10.

  According to the characteristic C11, since the output of the first drive signal is maintained during the specific period, it is possible to control the light emitting element by controlling the second drive signal without considering the predetermined period. it can. Thereby, the light emitting element can be controlled appropriately.

  Feature C12. The drive signal output means is provided with means for controlling the second drive signal so that the light emitting element blinks in the specific period (function of executing the process of step S1507 of the sub CPU 111). The gaming machine described in Feature C11.

  According to the characteristic C12, it is possible to perform an effect in which the light emitting element blinks during the specific period, and it is possible to increase the degree of attention to the game through the effect.

  Here, assuming that the drive signal is only the first drive signal, the control of the first drive signal may not follow the blinking of the light emitting element depending on the relationship between the predetermined period and the blinking cycle. Can happen.

  On the other hand, according to this feature, since the light emitting element is controlled by controlling the second drive signal transmitted without waiting for the predetermined period, it is possible to avoid the inconvenience. You can

Feature C13. Drive data update means (function for executing LED drive data update processing) for updating predetermined drive data in regular processing executed in a predetermined specific cycle,
The drive signal output means outputs the first drive signal based on the drive data, while outputting the second drive signal separately from the drive data. The gaming machine according to any one of the above.

  According to the characteristic C13, the first drive signal is output based on the drive data output from the drive data updating unit, so that the light emitting element can emit light. The drive data is updated in a regular process performed every specific period. In this case, by updating the drive data, for example, an effect of blinking the light emitting element in a predetermined cycle can be performed.

  In such a configuration, the second drive signal is output separately from the drive data. Accordingly, the second drive signal can be controlled without updating the drive data. Therefore, the control of the second drive signal can be facilitated, and even if the output timing of the second drive signal is irregular, the irregularity can be appropriately dealt with.

Feature C14. A predetermined permission signal (second permission signal SG4) is provided to the drive signal output means and the permission signal output means (function to output the second permission signal SG4 in the sub CPU 111) to the drive means;
The drive signal output means transitions from a state in which the drive signal cannot be output or a difficult state to a state in which the drive signal can be output based on the input of the permission signal from the permission signal output means. ,
The driving means drives the light emitting element when the permission signal is input from the permission signal output means and the drive signal is input from the drive signal output means.
The gaming machine according to any one of features C1 to C13, wherein the permission signal output means stops outputting the permission signal when the light emitting element is not caused to emit light.

  According to the characteristic C14, the drive signal can be output when the permission signal is output. Thus, when the drive signal is not output, it is possible to prevent the drive signal from being erroneously output by not outputting the permission signal.

  Further, since the driving means drives the light emitting element when the permission signal is input, even if the drive signal is erroneously output, the drive means is driven unless the permission signal is input. Means do not work. Accordingly, it is possible to suppress the malfunction of the light emitting element when the driving signal or the signal corresponding thereto is input to the driving unit by the malfunction.

  Here, according to the relationship with the feature C3, when the transmission means is provided, when the drive signal is stopped by the transmission means, the transmission of the signal related to the stop may be delayed. On the other hand, according to this feature, by stopping the output of the permission signal, the light emission of the light emitting element is immediately stopped even if the transmission of the signal related to the stop of the drive signal is delayed by the transmission means. You can Therefore, it is possible to avoid the inconvenience that may be caused by providing the noise removing means.

Feature C15. A plurality of the light emitting elements are provided, and a plurality of the drive signal output means are provided corresponding to each light emitting element,
Each drive signal output means is connected in series with each other,
Each drive signal output means is connected in a state where the plurality of light emitting elements are allocated,
Drive data control means (sub drive) that outputs predetermined drive data to at least one drive signal output means of the plurality of drive signal output means, and updates the drive data each time a predetermined update timing is reached. CPU111),
Each drive signal output means sequentially transmits the drive data between the drive signal output means each time a predetermined update timing is reached in a situation where the drive data is being output from the drive data control means. The output state of the drive signal is set to correspond to the drive data,
The drive control means outputs the drive signal output from a predetermined drive signal output means of the plurality of drive signal output means to the predetermined drive signal output means based on the drive signal being output for the predetermined period. The gaming machine according to any one of the features C1 to C14, characterized in that the connected light emitting elements are caused to emit light.

  According to Feature C15, a plurality of light emitting elements are provided, and a plurality of drive signal output means are provided corresponding to each light emitting element. When the drive data is being output by the drive data control means, the drive data is transmitted between the drive signal output means, and the output state of the drive signal of each drive signal output means corresponds to the drive data. Is set. With this, it is not necessary to connect the drive data control unit and each drive signal output unit to each other to transmit the drive data, so that the number of wirings connecting the drive data control unit and the drive signal output unit can be reduced. You can Therefore, it is possible to preferably drive each light emitting element while simplifying the configuration.

  In such a configuration, when the drive signal of the predetermined drive signal output means of the plurality of drive signal output means is output for a predetermined period, the light emitting element connected to the predetermined drive signal output means emits light. Thus, by suppressing the malfunction of the light-emitting element, which is likely to malfunction, by using the drive signal output means that outputs the drive signal that controls the drive control of the light-emitting element, which is particularly noticeable in the game, as the predetermined drive signal output means. You can Further, as the predetermined drive signal output means, for example, the drive signal output means which is more susceptible to noise than other drive signals is set depending on the positional relationship with other game equipment such as a power supply section for converting a commercial power source into a direct current power source. By doing so, it is possible to suppress malfunction of the drive signal that is particularly prone to noise.

Feature C16. An award determination unit (a function of the main controller 60 for executing the process of step S401) that determines whether or not to grant a privilege based on the satisfaction of a predetermined condition;
When the determination result of the grant determining means is a grant corresponding result of granting a privilege, a privilege granting means for granting a privilege to the player (a function of executing a game state transition process in the main controller 60) ,
Equipped with
The drive data control means sets the drive data such that a predetermined specific light emitting element among the light emitting elements emits light in a predetermined specific mode when the assignment correspondence result is obtained. ,
The drive control means,
It is provided between a specific drive means for driving the specific light emitting element and a specific drive signal output means for outputting the drive signal to the specific drive means, and the drive signal is output from the specific drive signal output means. The gaming machine according to feature C15, further comprising: a transmission unit that transmits the drive signal to the specific drive unit when the existing state continues for the predetermined period.

  According to the characteristic C16, the specific light emitting element emits light in a specific mode when the result is the assignment correspondence result. As a result, it is possible to attract the player's attention to the specific light emitting element, and it is possible to raise the attention level of the game. In this case, due to the high degree of attention to the specific light emitting element, the light emission due to the malfunction of the specific light emitting element is easily visible to the player and is easily noticeable. This may give a misunderstanding to the player, and the intended game property may not be transmitted to the player.

  On the other hand, according to this feature, when the drive signal for driving the specific light emitting element is output only for a predetermined period, the drive signal is transmitted to the specific drive means, and the specific light emitting element emits light. As a result, malfunction of the specific light emitting element due to noise can be suppressed, and inconvenience that may occur due to the malfunction can be avoided.

  Feature C17. The gaming machine according to feature C16, wherein the specific drive signal output means is provided on a downstream side in a drive data transmission path formed by the plurality of drive signal output means.

  The design of the specific light emitting element is easily changed for each type of gaming machine in order to enhance the interest in the game. In this respect, according to this feature, the specific drive signal output means for outputting a drive signal to the specific drive means for controlling the drive of the specific light emitting element is provided on the downstream side in the drive data transmission path. When it is necessary to change the specific light emitting element separately, it is not necessary to change the configuration on the upstream side. This makes it possible to easily change the specific light emitting element and the configuration for driving and controlling the specific light emitting element.

  Incidentally, the configuration defined by any one of the features A1 to A19 and the following features D1 to D13 may be applied to the configuration of any one of the features C1 to C17. In this case, it is possible to obtain further effects by applying each configuration.

  The above feature B group and feature C group are effective for the following problems.

  For example, some gaming machines such as pachinko machines are provided with a symbol display device having a display screen. For example, on the display screen of the pachinko machine, the symbols are variably displayed on the condition that the game ball passes through the operation opening provided in the game area, and an effect that enhances the interest of the game is performed, or a specific symbol is satisfied when a predetermined condition is satisfied. There is one that stops and displays, and teaches a special game state that is advantageous to a player such as a jackpot. As an effect that enhances the entertainment of the game, for example, there is a reach effect that is closely related to the jackpot and raises a player's expectation for the jackpot. In addition, in recent years, in order to further enhance the interest of the game, in addition to the symbols that are variably displayed for each game time, a character for production and the like are displayed, and reach production is performed using this character, or displayed on the display screen. Ingenuity such as increasing the number of symbols has been made, and display effects are becoming more diverse.

  Here, in order to enhance the interest of the game, a light emitting element is provided in addition to the symbol display device, and a drive circuit as an element drive means for driving the light emitting element is mounted. The drive circuit is connected to a control device that controls the game, for example, via wiring, and causes a light emitting element to emit light when a control signal is input from the control device. The interest of the game is improved by the light emission.

  In such a configuration, for example, if noise is input to the drive circuit, the light emitting element malfunctions, which may give a misunderstanding to the player, and the intended game property may not be transmitted to the player.

  The above problem is a problem common to gaming machines provided with a light emitting element and an element driving means for driving the light emitting element.

<Feature D group>
Feature D1. A plurality of elements (LED173),
Element driving means (LED driving section 172) for individually driving the plurality of elements,
An element control unit (sub CPU 111) that is connected to the element driving unit via wiring and outputs predetermined drive data to the element driving unit via the wiring to individually control each element;
Equipped with
In the gaming machine, the element driving means individually drives each element in a mode corresponding to the drive data when the drive data is input from the element control means through the wiring,
The element driving means includes a plurality of driving units (driving ICs 191, 192, 203) connected in series to each other,
The plurality of driving units are connected in a state in which the plurality of elements are allocated,
The element drive unit sequentially transmits the drive data between the plurality of drive units at each predetermined update timing in a situation where the drive data is input from the element control unit, and thereby each element To sequentially set the mode of
Each of the driving units is for causing the element connected to itself to operate in the set mode,
A game machine comprising a selection unit (sub CPU 111) for selecting an operating drive unit among the plurality of drive units.

  According to the feature D1, the driving state of each element is set by transmitting the driving data between the plurality of driving units. With this, it is not necessary to transmit drive data to each drive unit, so that it is possible to reduce wirings connecting the element control unit and the element drive unit. In this case, since the space occupied by the wiring can be reduced, it becomes easy to adjust the position of the wiring or perform a coating process so that ambient noise does not enter the wiring. Therefore, malfunction of each element due to noise can be suppressed.

  Further, when a device is newly provided, the device and the drive unit corresponding to the device may be further provided in series, and the design change to the existing drive unit can be small. This makes it possible to easily deal with the addition of elements and the like.

  In such a configuration, a transmission error may occur during transmission of drive data, and noise may occur in the drive data. In these cases, the element control unit may set an incorrect mode and the element may malfunction.

  On the other hand, according to this feature, by selecting only the drive units corresponding to the elements to be driven in the drive data and not selecting the drive units corresponding to the elements not to be driven, It is possible to prevent the drive unit corresponding to the non-target element from operating. As a result, it is possible to suppress the driving of the element that is not the driving target due to the transmission error or noise.

  From the above, it is possible to preferably drive each element while simplifying the configuration.

Feature D2. The wiring is a first wiring (a wiring for transmitting the LED drive data SD),
The selection means includes a permission signal output means (function of outputting each permission signal SG3, SG4 in the sub CPU 111) for outputting a predetermined permission signal (first permission signal SG3 and second permission signal SG4),
The permission signal output means is connected to each drive unit via a second wiring (a wiring that transmits each permission signal SG3, SG4) different from the first wiring,
The drive unit is configured to operate when the permission signal is input via the second wiring,
The gaming machine according to Feature D1, wherein the selecting unit selects an operating drive unit by switching a drive unit that is an output target of the permission signal.

  According to the feature D2, by switching the drive unit that outputs the permission signal, the drive unit that operates regardless of the transmission of the drive data can be selected. In this case, since the transmission of the drive data and the transmission of the permission signal are performed in different systems, even if noise is included in either one of them, the influence on the other is small, and as a result, the drive unit is affected by the noise. It is hard to receive. As a result, it is possible to avoid the inconvenience that the element malfunctions due to noise.

  In addition, since it is not necessary to separately set special information such as a flag in the drive data when transmitting the drive data, it is possible to simplify the configuration of the drive data transmission and set the special information. It is possible to suppress a transmission error that may occur due to

  Further, by configuring the permission signal to be transmitted in a system different from that of the drive data, it is possible to prevent the both from interfering with each other. As a result, it is possible to suppress malfunction of each element that may occur due to interference between the permission signal and the drive data.

Feature D3. The permission signal output means,
A first output unit (sub-output unit) that outputs a predetermined first permission signal (first permission signal SG3) to a first drive unit (first drive IC 191, second drive IC 192) of the plurality of drive units. A function of outputting the first permission signal SG3 in the CPU 111),
A second output unit (second sub CPU 111 in the sub CPU 111) that outputs a predetermined second permission signal (second permission signal SG4) to a second drive unit (third drive IC 203) different from the first drive unit. 2 function to output the permission signal SG4),
Equipped with
The first drive unit is configured to operate when the first permission signal is input,
The second drive unit is configured to operate when the second permission signal is input,
The gaming machine according to Feature D2, wherein the selecting unit selects each driving unit to operate by controlling each permission signal from the first outputting unit and the second outputting unit.

  According to the feature D3, for example, by controlling the first output unit to output the first permission signal and the second output unit to not output the second permission signal, the element connected to the first drive unit. Can be driven, while the element connected to the second drive unit cannot be driven. As a result, it is possible to suppress the malfunction of the element which is not desired to be driven by the signal control of each output means.

Feature D4. The plurality of elements include a first element (LED 173) connected to the first drive unit and a second element (LED 37 for notification of winning) connected to the second drive unit. Cage,
The gaming machine according to Feature D3, wherein the element control unit controls the driving frequency of the first element to be higher than the driving frequency of the second element.

  According to the feature D4, the first driving unit that operates according to the first permission signal and the second driving unit that operates according to the second permission signal are classified according to the driving frequency of the elements connected to each driving unit. ing. As a result, by outputting the first permission signal while not outputting the second permission signal, the first drive section corresponding to the first element, which has a relatively high drive frequency, is always operated and the drive frequency is relatively high. It is possible to prevent the second driving unit corresponding to the second low element from operating. Therefore, the processing load can be reduced as much as the second drive unit is not operated, and the malfunction of the second element can be suppressed.

Feature D5. The second element includes a specific notification element (winning notification LED 37) for notifying about a game,
An award determination unit (a function of the main control device 60 for executing the process of step S401) that determines whether or not to grant the privilege based on the satisfaction of a predetermined condition;
When the determination result of the grant determining means is a grant corresponding result of granting a privilege, a privilege granting means for granting a privilege to the player (a function of executing a game state transition process in the main controller 60) ,
Equipped with
The element control means, in the case of the assignment correspondence result, sets the drive data so that the specific notification element is driven in a predetermined specific mode,
The gaming machine according to Feature D4, wherein the selection unit controls the second output unit so that the second permission signal is output when the assignment correspondence result is obtained.

  According to the characteristic D5, the specific notification element is driven in the specific mode when the result is the assignment correspondence result. As a result, the player's attention can be attracted to the specific notification element, and the degree of attention to the game can be increased. In this case, due to the high degree of attention to the specific notification element, the driving due to the malfunction of the specific notification element is easily visible to the player and is easily noticeable. This may give a misunderstanding to the player, and the intended game property may not be transmitted to the player.

  On the other hand, according to this feature, the second drive unit that drives the specific notification element operates only when the result of the assignment correspondence is obtained. As a result, the malfunction that the specific notification element is driven when the assignment correspondence result is not obtained is suppressed. Therefore, it is possible to avoid the inconvenience that gives a misunderstanding to the player.

  In the case of a configuration in which a plurality of notification elements are provided as a plurality of elements, it is preferable that the specific notification element has a larger light amount than other elements.

  Feature D6. The gaming machine according to Feature D5, wherein the second drive unit is provided on a downstream side in a drive data transmission path formed by the plurality of drive units.

  The design of the specific notification element is likely to be changed for each type of gaming machine in order to increase interest in the game. In this respect, according to this feature, since the second drive unit is provided on the downstream side in the drive data transmission path, it is necessary to separately change the specific notification element and the second drive unit that drives the specific notification element. If this happens, there is no need to change the upstream configuration. This makes it possible to easily change the design of the specific notification element and the second drive unit.

  Feature D7. The gaming machine according to feature D5 or feature D6, wherein the specific notification element is a light emitting element.

  According to the feature D7, the light-emitting element emits light, so that the player can be provided with a light effect, and the player's attention can be increased through the light effect. In such a configuration, it is possible to increase the light amount of the light emitting element from the viewpoint of increasing the attention to the game. In this case, while attention can be paid to the light emitting element, when the light emitting element malfunctions, the malfunction may be noticeable.

  On the other hand, by applying the configuration of the feature D1 or the like, it is possible to suppress the occurrence of the malfunction, and it is possible to preferably perform the light effect by the light emission of the light emitting element while avoiding the inconvenience.

  In the case of a configuration including a plurality of light emitting elements as the plurality of elements, the specific notification element may be a specific light emitting element whose light amount is set higher than that of the plurality of light emitting elements. Thereby, the specific light emitting element can be made more conspicuous as compared with other light emitting elements.

Feature D8. The element control means includes a supply means (voltage application circuit 202) capable of supplying electric power capable of driving the second element to the second element,
The second drive unit outputs a drive signal, which is predetermined based on the drive data, to the supply unit when the second permission signal is input (third drive). IC203 has a function to output a LOW signal from the OUT16 terminal),
The second output means outputs the second permission signal also to the supply means,
Features D4 to D4, wherein the supply unit supplies the electric power to the second element when the second permission signal is input and the drive signal is input. The gaming machine described in any one of D7.

  According to Feature D8, when the second permission signal is not input to the supply unit, the second element is not driven even if the drive signal is input from the drive signal output unit. As a result, even if a signal corresponding to the drive signal is output due to noise, the supply unit does not operate unless the second permission signal is input, so that the second element may malfunction due to the noise or the transmission error. Can be suppressed.

Feature D9. A drive signal wiring for connecting the supply means and the drive signal output section and transmitting the drive signal,
Transmission means provided on the drive signal wiring and transmitting the drive signal to the supply means when the state in which the drive signal is output from the drive signal output unit continues for a predetermined period. A constant circuit 221),
A gaming machine described in feature D8, which is provided with:

  If the drive unit is configured to drive the second element immediately with the output of the drive signal, the second element may be momentarily driven by noise. In particular, like the feature D5, when the specific notification element malfunctions, it may give a misunderstanding to the player, and the game nature intended by the player may not be transmitted.

  On the other hand, according to this feature, when the state in which the drive signal is output is maintained for a predetermined period, the drive signal is transmitted to the supply unit, and the second drive unit operates, The second element is driven. As a result, even when a signal corresponding to the drive signal is momentarily generated due to the influence of noise, the supply means does not operate. Therefore, the influence of noise can be reduced, the malfunction of the second element can be suppressed, and the above inconvenience can be avoided.

  In such a configuration, when the output of the drive signal is stopped, the transmission of the signal related to the stop of the drive signal may be delayed by the transmission unit for a predetermined period. On the other hand, by applying the configuration of the feature D8, it is possible to immediately stop the power supply by the supply unit by stopping the output of the second permission signal. This makes it possible to avoid the inconvenience that may occur due to the provision of the transmission means.

Feature D10. The element control means includes drive data update means (a function for executing LED drive data update processing) that updates the drive data in a periodic process (voice emission control process) executed in a predetermined specific cycle,
The gaming machine according to Feature D9, wherein the predetermined period is set longer than the specific cycle.

  According to the characteristic D10, when the output period of the drive signal is longer than the specific period, the supply unit operates and the second element drives. As a result, even if an error occurs when updating the drive data due to the influence of noise, the second element is not driven unless the error occurs a plurality of times. Accordingly, it is possible to prevent the second element from malfunctioning due to an error that may occur when the drive data is updated or an error that may occur when the drive signal is output based on the drive data. Therefore, it is possible to suitably control the second element by updating the drive data, and at the same time, prevent malfunction of the second element due to an error that may occur.

Feature D11. The plurality of elements are a plurality of LEDs,
The drive unit shifts from a non-active state in which the plurality of LEDs cannot be driven to an active state in which the plurality of LEDs can be driven based on the input of the permission signal. The gaming machine according to any one of the features D2 to D10.

  According to the feature D11, based on the input of the permission signal to the drive IC, the drive IC becomes active and each LED can be driven. As a result, by switching the drive IC that is the output target of the permission signal, the drive IC in the active state can be selected.

Feature D12. Further comprising a control means (sub CPU 111) for executing game control relating to the progress of the game,
The control means executes a specific process including an initialization process prior to the game control when operating power is supplied,
The game machine according to any one of the features D1 to D11, wherein the selection unit prevents each drive unit from operating during the specific process.

  According to the feature D12, each drive unit does not operate while the specific processing is being performed, so that the element does not malfunction during the specific processing. As a result, it is possible to avoid the inconvenience in which each element malfunctions before the game is started and misleads the player.

Feature D13. Each of the plurality of drive units,
A data input section (DATAIN terminal) to which the drive data is input,
A data output unit (DATAOUT terminal) to which the drive data is output,
Equipped with
Wiring for serial connection for connecting the respective driving units in series (wiring for connecting the DATAOUT terminal of the first driving IC 191 and the DATAIN terminal of the second driving IC 192, the DATAOUT terminal of the second driving IC 192 and the DATAIN terminal of the third driving IC 203 Wiring to connect the
The serial connection wiring connects the data output section of a predetermined drive section of the plurality of drive sections to the data input section of another predetermined drive section, whereby the plurality of drive sections are connected in series. Cage,
The wiring from the element control means is connected to the data input section of the drive section in which the serial connection wiring is not connected to the data input section, and the wiring is connected to the data input section. Game machine.

  According to the feature D13, the data output section of the predetermined drive section and the data input section of the other predetermined drive section are connected by the serial connection wiring, and the serial connection wiring is not connected to the data input section. The element control means is connected to the data input section of the drive section. Accordingly, the drive data input from the element control unit to the specific drive unit can be sequentially transmitted from the specific drive unit to each drive unit.

  The “driving unit in which the wiring for serial connection is not connected to the data input unit” is specifically, arranged among the plurality of driving units connected in series in the uppermost stream in the driving data transmission path. Drive unit.

  The above characteristic D group is effective for the following problems.

  For example, some gaming machines such as pachinko machines are provided with a symbol display device having a display screen. For example, on the display screen of the pachinko machine, the symbols are variably displayed on the condition that the game ball passes through the operation opening provided in the game area, and an effect that enhances the interest of the game is performed, or a specific symbol is satisfied when a predetermined condition is satisfied. There is one that stops and displays, and teaches a special game state that is advantageous to a player such as a jackpot. As an effect that enhances the entertainment of the game, for example, there is a reach effect that is closely related to the jackpot and raises a player's expectation for the jackpot. In addition, in recent years, in order to further enhance the interest of the game, in addition to the symbols that are variably displayed for each game time, a character for production and the like are displayed, and reach production is performed using this character, or displayed on the display screen. Ingenuity such as increasing the number of symbols has been made, and display effects are becoming more diverse.

  Here, in order to enhance the interest of the game, in addition to the symbol display device, a plurality of elements used in various games such as a light emitting element and an electric movable element are provided, and element driving means for driving the element. The drive circuit as is mounted. The drive circuit is connected to a control device that controls the game, for example, via wiring, and is configured to drive a corresponding element when a control signal is input from the control device.

  In such a configuration, if a plurality of elements are provided in order to enhance the interest of the game, for example, there is a concern that the configuration of the wiring may be complicated and the configuration may be complicated. Further, if noise enters the driving circuit, the device may malfunction.

  The above-mentioned problem is a problem common to gaming machines provided with a plurality of elements and element driving means for driving each element.

  Incidentally, the configuration defined by any one of the features A1 to A19, the features B1 to B17, and the features C1 to C17 may be applied to the configuration of any one of the features D1 to D13. In this case, it is possible to obtain further effects by applying each configuration.

  The basic configuration of a gaming machine to which each of the above features can be applied is shown below.

  Pachinko gaming machine: operating means operated by a player, game ball launching means for launching a game ball based on the operation of the operating means, a ball passage for guiding the launched game ball to a predetermined game area, and a game A gaming machine that includes each game component arranged in the area, and gives a bonus to the player when a game ball passes through a predetermined passage portion of each of the game components.

  Rotating type gaming machine such as slot machine: equipped with a pattern display device for variably displaying a plurality of patterns, the variable display of the plurality of patterns is started by the operation of the start operation means, and caused by the operation of the stop operation means Then, the variable display of the plurality of patterns is stopped, and a gaming machine that gives a privilege to the player according to the stopped patterns.

  10... Pachinko machine, 20... Game board, 35, 36... Hold lamp section, 37... Winning notification LED, 60... Main control device, 90... Voice lamp control device, 91... LED board, 111... Sub CPU, 121... Arithmetic circuit, 122... Register, 131... Output port, 134... Data output circuit, 141... LED driving register, 143... Clock signal register, 145... Data write signal register, 147, 148... Permission signal register, 171 ... Input port, 173... LED, 191, 192, 203... Driving IC, 191a, 192a... Update circuit, 191b, 192b... Register, 191c, 192c... Update buffer, 201... Winning notification circuit, 202... Voltage application circuit , 211... P-type MOSFET, 212... N-type MOSFET, 221... Time constant circuit, 222... Resistor, 223... Capacitor, 301, 302... Drive IC, 401, 402... Drive IC, 501, 502... Phase shift circuit, 601 ...Winning notification circuit in the fifth embodiment, 602... OR circuit, 701... Winning notification circuit in the sixth embodiment.

Claims (1)

A light emitting element that emits light to inform about the game,
Drive signal output means for outputting a predetermined drive signal according to the situation of the game,
Drive means for causing the light emitting element to emit light when the drive signal is output from the drive signal output means,
A wire that connects the drive signal output means and the drive means and transmits the drive signal;
Noise removing means for removing noise mixed in the drive signal,
In a gaming machine equipped with
The noise removing means is provided in the middle of the route of the wiring, and when the state in which the drive signal is being output from the drive signal output means is continued for a predetermined period, the drive signal is sent to the drive means. Equipped with transmission means for transmitting,
The drive signal output means can output the drive signal continuously for a longer period than a period for causing the light emitting element to emit light,
The gaming machine is
A grant determination means for determining whether or not to grant a privilege when a predetermined condition is satisfied,
When the determination result of the grant determination means is a grant corresponding result of granting a privilege, a privilege granting means capable of granting a privilege to the player,
Equipped with
A means for causing the drive signal output means to output the drive signal corresponding to causing the light emitting element to emit light in a predetermined specific mode when the determination result of the application determination means is the assignment correspondence result. A gaming machine characterized by being equipped with.

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