JP2020043628A - Overcurrent detector - Google Patents

Abstract

To accurately detect that overcurrent is generated in any of a plurality of power semiconductors connected in parallel.SOLUTION: An overcurrent detector comprises a detection circuit, a determination circuit, and a specifying circuit. The detection circuit detects a power semiconductor having a sense current larger than a first threshold value by comparing the sense current of each of a plurality of power semiconductors connected in parallel with the first threshold value. The determination circuit determines that an overcurrent is generated in any of the plurality of power semiconductors when an average value is larger than a second threshold value, by comparing the average value of respective sense currents of the plurality of power semiconductors with the second threshold value larger than the first threshold value. The specifying circuit specifies a power semiconductor in which the overcurrent is generated based on a detection result from the detection circuit and a determination result from the determination circuit.SELECTED DRAWING: Figure 1

Description

  The present invention relates to an overcurrent detection device, and more particularly, to an overcurrent detection device that detects occurrence of an overcurrent in any of a plurality of power semiconductors connected in parallel.

  Conventionally, as a technique for detecting an overcurrent of a power semiconductor, a technique has been proposed in which an output obtained by comparing a detection value of a sense current of a power semiconductor with a determination value for determining an overcurrent is fed back to a drive circuit via a delay circuit. (For example, see Patent Document 1). In this technique, noise is removed by using such a delay circuit (filter), and erroneous detection of overcurrent is prevented.

  Further, there has been proposed a device that compares the sense current of two power semiconductors connected in parallel with the average value thereof (for example, see Patent Document 2). This technique specifies that an overcurrent has occurred in a power semiconductor having a sense current larger than the average value.

JP-A-03-40517 JP-A-2002-142444

  However, in the former technique (the technique of Patent Document 1), when a plurality of power semiconductors are driven in parallel, an erroneous detection may occur when an overcurrent occurs in any of the power semiconductors. When power semiconductors are connected in parallel, an imbalance occurs in sense current due to parasitic parameters caused by the configuration of the parallel connection. This current imbalance causes deterioration in detection accuracy, and causes erroneous detection when an overcurrent occurs in any of the power semiconductors.

  In the latter technique (the technique of Patent Document 2), since the determination is made by comparing the sense current with the average value, it is only possible to specify the power semiconductor having the large sense current, and the power is excessive to the semiconductor. It is difficult to accurately determine whether a current is generated.

  The main object of the overcurrent detection device of the present invention is to accurately detect the occurrence of overcurrent in any of a plurality of power semiconductors connected in parallel.

  The present invention employs the following means in order to achieve the above-mentioned main object.

The overcurrent detection device of the present invention,
An overcurrent detection device that detects that an overcurrent has occurred in any of a plurality of power semiconductors connected in parallel,
A detection circuit that compares a sense current of the plurality of power semiconductors with a first threshold and detects a power semiconductor having a sense current larger than the first threshold;
An average value of the sense currents of the plurality of power semiconductors is compared with a second threshold value larger than the first threshold value. When the average value is larger than the second threshold value, an overcurrent occurs in any of the plurality of power semiconductors. A determination circuit for determining that
A specifying circuit that specifies a power semiconductor in which an overcurrent has occurred based on a detection result by the detection circuit and a determination result by the determination circuit;
The gist is to provide.

  In the overcurrent detection device according to the present invention, the detection circuit compares the sense currents of the plurality of power semiconductors connected in parallel with the first threshold, and detects the power semiconductor having the sense current larger than the first threshold. Also, the determination circuit compares the average value of the sense currents of the plurality of power semiconductors with a second threshold value larger than the first threshold value. It is determined that it has occurred. Then, the power semiconductor in which the overcurrent has occurred is specified by the specifying circuit based on the detection result by the detection circuit and the determination result by the determination circuit. That is, when the determination circuit determines that an overcurrent has occurred in any of the power semiconductors, it is specified that an overcurrent has occurred in the power semiconductor having a sense current larger than the first threshold value detected by the detection circuit. is there. This makes it possible to accurately detect the occurrence of an overcurrent in any of the plurality of power semiconductors connected in parallel.

  The overcurrent detection device of the present invention may include a delay circuit that delays the output of the overcurrent determination circuit and inputs the output to the specific circuit. The overcurrent determination circuit may include a delay circuit that delays the average value of the sense current of each power semiconductor and compares the average value with the second threshold value. By using such a delay circuit (filter), erroneous detection due to noise can be suppressed.

  In the overcurrent detection device according to the present invention, when the sense current of each power semiconductor is larger than the third threshold larger than the second threshold, a short circuit occurs in the power semiconductor corresponding to the sense current larger than the third threshold. May be provided. In this way, a short circuit of the power semiconductor can be detected. In this case, a delay circuit for delaying the output of the short-circuit detection circuit may be provided. In this case, erroneous detection due to noise in short circuit detection can be suppressed.

FIG. 1 is a configuration diagram schematically illustrating a configuration of an overcurrent detection device 20 as one embodiment of the present invention. It is a block diagram which shows the outline of the structure of the overcurrent detection apparatus 120 of a modification. It is a block diagram which shows the outline of the structure of the overcurrent detection apparatus 220 of a modification.

  Next, an embodiment for carrying out the present invention will be described using an embodiment.

  FIG. 1 is a configuration diagram schematically showing the configuration of an overcurrent detection device 20 as one embodiment of the present invention. As shown in the figure, the overcurrent detection device 20 according to the embodiment detects an overcurrent in one of the parallel-connected power semiconductors Q1 and Q2 (for example, IGBTs) that are driven or cut off by the drive / cutoff switching circuit 10. It is configured as a circuit that detects the occurrence and outputs it to the drive / cutoff switching circuit 10. The overcurrent detection device 20 according to the embodiment includes a detection circuit 30, an average value circuit 40, a determination circuit 50, a delay circuit 60, and a specific circuit 70. The collector currents (sense currents) of the power semiconductors Q1 and Q2 can be detected as voltages because the sense current lines are grounded via the resistors R1 and R2 as shown in the figure. I have. Hereinafter, the voltage that reflects this sense current is referred to as a sense signal. In the embodiment, the resistors R1 and R2 have the same value.

  The detection circuit 30 includes a first comparator 32 and a second comparator 34. The sense signal from the power semiconductor Q1 is input to the negative input terminal of the first comparator 32, and the reference potential V1 is input to the positive input terminal. The first comparator 32 outputs a Hi signal when the sense signal from the power semiconductor Q1 is higher than the reference potential V1, and outputs a Low signal when the sense signal from the power semiconductor Q1 is lower than the reference potential V1. . The reference potential V1 is set as a potential corresponding to a sense signal when a current slightly larger than the upper limit current of the normal range of the collector current of the power semiconductor Q1 flows. Therefore, when the Hi signal is output from the first comparator 32, it can be determined that there is a possibility that an overcurrent has occurred in the power semiconductor Q1. The sense signal from the power semiconductor Q2 is input to the negative input terminal of the second comparator 34, and the reference potential V1 is input to the positive input terminal. The second comparator 34 outputs a Hi signal when the sense signal from the power semiconductor Q2 is higher than the reference potential V1, and outputs a Low signal when the sense signal from the power semiconductor Q2 is lower than the reference potential V1. . When the Hi signal is output from the second comparator 34, it can be determined that there is a possibility that an overcurrent has occurred in the power semiconductor Q2.

  The averaging circuit 40 includes a comparator 42, an inverter 44, and resistors R3, R4, and R5. To the negative input terminal of the comparator 44, a sense signal from the power semiconductor Q1 is input via a resistor R3, and a sense signal from the power semiconductor Q2 is input via a resistor R4. A virtual ground is connected to the positive input terminal of the comparator 44. The output terminal of the comparator 44 is connected to the negative input terminal via a resistor R5. With such a negative feedback circuit, the potentials of the negative input terminal and the positive input terminal are equal, and become 0 V due to virtual grounding. Therefore, a current obtained by adding the currents flowing through the resistors R3 and R4 flows through the resistor R5. In the embodiment, the resistors R3 and R4 have the same value, and the resistor R5 has a half value of the resistor R3. Therefore, the average inversion value of the sense signal (voltage) from the power semiconductors Q1 and Q2 is output from the comparator 42. The inverter 44 is configured as a well-known inverter that inverts the sign of the input signal, and receives an output signal from the comparator 42. From these facts, the average value circuit 40 outputs the average value of the sense signals (voltages) from the power semiconductors Q1 and Q2.

  The determination circuit 50 includes a comparator 52. The output from the averaging circuit 40 (the average value of the sense signals (voltages) from the power semiconductors Q1 and Q2) is input to the negative input terminal of the comparator 52, and the reference potential V2 is input to the positive input terminal. Has been entered. Therefore, the determination circuit 50 outputs a Hi signal when the average value of the sense signals (voltages) from the power semiconductors Q1 and Q2 is larger than the reference potential V2, and conversely, outputs a Hi signal from the power semiconductors Q1 and Q2. ) Is output when the average value is smaller than the reference potential V2. The reference potential V2 is set as a value higher than the reference potential V1. Therefore, when the Hi signal is output from the comparator 52, it can be determined that an overcurrent has occurred in any of the power semiconductors Q1 and Q2.

  The delay circuit 60 is configured as a well-known circuit that delays an input signal for a predetermined time and outputs the delayed signal, and receives an output signal from the determination circuit 50.

  The specifying circuit 70 includes a first AND circuit 72 and a second AND circuit 74. The first AND circuit 72 is configured as a well-known AND circuit that calculates a logical product, and receives an output signal from the first comparator 32 of the detection circuit 50 and an output signal from the delay circuit 60. . Therefore, the first AND circuit 72 outputs the Hi signal when the sense signal from the power semiconductor Q1 is higher than the reference potential V1 and the average value of the sense signals (voltages) from the power semiconductors Q1 and Q2 is higher than the reference potential V2. Is output. Thus, when the output signal of the first AND circuit 72 is a Hi signal, it means that an overcurrent has occurred in the power semiconductor Q1. The output signal from the first AND circuit 72 is input to the drive / cutoff switching circuit 10.

  Similarly to the first AND circuit 72, the second AND circuit 74 is configured as a well-known AND circuit that calculates a logical product, and outputs the output signal from the second comparator 34 of the detection circuit 50 and the output signal from the delay circuit 60. The output signal is input. Therefore, the second AND circuit 74 outputs the Hi signal when the sense signal from the power semiconductor Q2 is higher than the reference potential V1 and the average value of the sense signals (voltages) from the power semiconductors Q1 and Q2 is higher than the reference potential V2. Is output. Thus, when the output signal of the second AND circuit 74 is a Hi signal, it means that an overcurrent has occurred in the power semiconductor Q2. The output signal from the second AND circuit 74 is input to the drive / cutoff switching circuit 10.

  Next, the operation of the overcurrent detection device 20 according to the embodiment configured as described above will be described. Now, consider a case where an overcurrent occurs in the power semiconductor Q1. At this time, the Hi signal is output from the first comparator 32 of the detection circuit 30, and the Hi signal is output from the determination circuit 50. Therefore, the Hi signal is output from the first AND circuit 72 of the specific circuit 50 to the drive / cutoff switching circuit 10. When the Hi signal is output from the first AND circuit 72, the sense signal from the power semiconductor Q1 is higher than the reference potential V1, and the average value of the sense signals (voltages) from the power semiconductors Q1 and Q2 is equal to the reference potential V2. Since it is larger than the time, the drive / interruption switching circuit 10 determines that an overcurrent has occurred in the power semiconductor Q1, and shuts off the power semiconductor Q1.

  Next, consider a case where an overcurrent occurs in the power semiconductor Q2. At this time, the Hi signal is output from the second comparator 34 of the detection circuit 30 and the Hi signal is output from the determination circuit 50. Therefore, the Hi signal is output from the second AND circuit 74 of the specific circuit 50 to the drive / cutoff switching circuit 10. When the Hi signal is output from second AND circuit 74, the sense signal from power semiconductor Q2 is higher than reference potential V1, and the average value of the sense signals (voltages) from power semiconductors Q1 and Q2 is equal to reference potential V2. Since it is larger than the time, the drive / interruption switching circuit 10 determines that an overcurrent has occurred in the power semiconductor Q2, and shuts off the power semiconductor Q1.

  In the overcurrent detection device 20 of the embodiment described above, the detection circuit 30 detects the power semiconductor in which the overcurrent is likely to occur among the power semiconductors Q1 and Q2, and the average circuit 40 and the determination circuit 50 It is determined that an overcurrent has occurred in any of the power semiconductors Q1 and Q2. Then, based on the detection result of the detection circuit 30 and the determination results of the average value circuit 40 and the determination circuit 50, the identification circuit 70 identifies the occurrence of the overcurrent and the power semiconductor in which the overcurrent is occurring. This makes it possible to accurately detect the occurrence of an overcurrent in one of the power semiconductors Q1 and Q2 connected in parallel. Since the output signal of the decision circuit 50 is delayed by the delay circuit 60 and is input to the first AND circuit 72 and the second AND circuit 74 of the specific circuit 70, the decision circuit 70 temporarily causes the power semiconductors Q1 and Q2 to be out of noise. Erroneous detection that an overcurrent has occurred in any of the above.

  In the overcurrent detection device 20 of the embodiment, the delay circuit 60 is provided at the subsequent stage of the determination circuit 50 so that the output signal of the determination circuit 50 is delayed and input to the specific circuit 70. As shown in the overcurrent detection device 120, a delay circuit 60 may be provided between the average value circuit 40 and the determination circuit 50 so that the output signal from the average value circuit 40 is delayed and input to the determination circuit 50. Good. Since the delay circuit 60 is provided to suppress erroneous detection due to noise, it is unnecessary when erroneous detection due to noise does not occur.

  The overcurrent detection device 20 of the embodiment is configured to accurately detect the occurrence of an overcurrent in one of the power semiconductors Q1 and Q2 when the overcurrent is occurring. As shown in the overcurrent detection device 220 of the third modification, the overcurrent detection device 220 may include a short-circuit detection circuit 80 that detects that a short-circuit has occurred in any of the power semiconductors Q1 and Q2.

  The short circuit detection circuit 80 includes a first comparator 82 and a second comparator 84. The sense signal from the power semiconductor Q1 is input to the negative input terminal of the first comparator 82, and the reference potential V3 is input to the positive input terminal. The first comparator 82 outputs a Hi signal when the sense signal from the power semiconductor Q1 is higher than the reference potential V3, and outputs a Low signal when the sense signal from the power semiconductor Q1 is lower than the reference potential V3. . The reference potential V3 is set as a potential higher than the reference potential V2 for determining overcurrent. Therefore, when the Hi signal is output from the first comparator 82, it can be determined that a short circuit has occurred in the power semiconductor Q1. The output signal from the first comparator 82 is input to the drive / cutoff switching circuit 10 via the delay circuit 86 (noise removal filter). Therefore, when the Hi signal is input from the first comparator 82, the drive / cutoff switching circuit 10 determines that a short circuit has occurred in the power semiconductor Q1, and can deal with this.

  The sense signal from the power semiconductor Q2 is input to the negative input terminal of the second comparator 84, and the reference potential V3 is input to the positive input terminal. The second comparator 84 outputs a Hi signal when the sense signal from the power semiconductor Q2 is higher than the reference potential V3, and outputs a Low signal when the sense signal from the power semiconductor Q2 is lower than the reference potential V3. . Therefore, when the Hi signal is output from the second comparator 84, it can be determined that a short circuit has occurred in the power semiconductor Q2. The output signal from the second comparator 84 is input to the drive / cutoff switching circuit 10 via the delay circuit 88 (noise removal filter). Therefore, when the Hi signal is input from the second comparator 84, the drive / cutoff switching circuit 10 determines that a short circuit has occurred in the power semiconductor Q2, and can deal with this.

  The overcurrent detection device 220 of the modified example configured in this way can accurately detect that an overcurrent has occurred in one of the power semiconductors Q1 and Q2. At the same time, the occurrence of a short circuit in one of the power semiconductors Q1 and Q2 can be detected with high accuracy.

  In the overcurrent detection device 20 of the embodiment, the description has been given by applying to the case where two power semiconductors Q1 and Q2 are provided as the power semiconductors connected in parallel. However, the present invention is applied to the case where three or more power semiconductors are connected in parallel. It may be a thing. In this case, the detection circuit compares the sense signal with the reference potential V1 by a comparator for each power semiconductor, and the average circuit compares the average value of the sense signal of each power semiconductor with the reference potential V2. And it is sufficient. The average value circuit compares the average value of each combination of two sense signals among the sense signals of each power semiconductor with the reference potential V2, and when the average value of any one combination is higher than the reference potential V2, A circuit that outputs a Hi signal may be used.

  As described above, the embodiments for carrying out the present invention have been described using the embodiments. However, the present invention is not limited to these embodiments at all, and various forms may be provided without departing from the gist of the present invention. Of course, it can be implemented.

  INDUSTRIAL APPLICABILITY The present invention is applicable to, for example, a manufacturing industry of an overcurrent detection device.

  Reference Signs List 10 driving / cutoff switching circuit, 20, 120, 220 overcurrent detection device, 30 detection circuit, 32 first comparator, 34 second comparator, 40 average value circuit, 42 comparator, 44 inverter, 50 judgment circuit, 52 comparator, 60 delay circuit, 70 identification circuit, 72 first AND circuit, 74 second AND circuit, 80 short circuit detection circuit, 82 first comparator, 84 second comparator, 86,88 delay circuit, Q1, Q2 Power semiconductor, R1-R5 resistors.

Claims (1)

An overcurrent detection device that detects that an overcurrent has occurred in any of a plurality of power semiconductors connected in parallel,
A detection circuit that compares a sense current of the plurality of power semiconductors with a first threshold and detects a power semiconductor having a sense current larger than the first threshold;
An average value of the sense currents of the plurality of power semiconductors is compared with a second threshold value larger than the first threshold value. When the average value is larger than the second threshold value, an overcurrent occurs in any of the plurality of power semiconductors. A determination circuit for determining that
A specifying circuit that specifies a power semiconductor in which an overcurrent has occurred based on a detection result by the detection circuit and a determination result by the overcurrent determination circuit;
An overcurrent detection device comprising:

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