JP2020031374A - PWM signal receiving device - Google Patents

Abstract

To provide a PWM signal receiving device capable of removing an influence of spike noise and acquiring a duty ratio included in a PWM signal.SOLUTION: The PWM signal receiving device includes: an edge detection unit for detecting a rising edge (upper edge) of a PWM signal; a time measurement unit for measuring an ON time from an upper edge to the next edge; and a duty ratio output unit. The duty ratio output unit executes a time addition process SA and a duty ratio calculation process SB. In the time addition process SA, a variable i is incremented until the total time from a first upper edge to an i-th upper edge of the PWM signal becomes equal to two PWM cycles (S13, S14). The duty ratio calculation process SB calculates the total on-time included between the first upper edge and the i-th upper edge if the total time is equal to two PWM cycles, and outputs a ratio of the total on-time to the time of two PWM cycles as a duty ratio (S17-S19).SELECTED DRAWING: Figure 3

Description

  The technology disclosed in this specification relates to a PWM signal receiving device. In particular, the present invention relates to a PWM signal receiving device capable of acquiring a duty ratio included in a PWM signal under an environment where spike noise is received.

  2. Description of the Related Art A sensor that transmits a measured physical quantity as a PWM signal by expressing it as a duty ratio is known (for example, Patent Document 1). On the other hand, a communication device may include a mechanism for removing noise superimposed on a signal to be communicated. For example, Patent Document 2 discloses a technique for removing noise in a temperature detection system. In that technique, first digital data obtained by AD-converting analog temperature information on which noise is superimposed is communicated with second digital data obtained by AD-converting noise. The receiving device calculates a difference between the first digital data and the second digital data and removes a noise component. Patent Document 3 discloses a technique for removing pulse noise superimposed on an FM broadcast communication signal.

JP 2012-004815 A Patent No. 5,139,952 JP 2006-319815 A

  The receiving device of the PWM signal determines that the time from the rising edge to the next rising edge is one cycle, and obtains the duty ratio from the ratio of the on-time from the first rising edge to the next falling edge to one cycle. When spike noise is superimposed on a PWM signal, a rising edge and a falling edge caused by spike noise are superimposed in one original cycle. In that case, the receiving device may erroneously recognize the period from the first rising to the rising edge caused by the spike noise as one cycle of the PWM signal. Since one cycle of the PWM signal (PWM signal cycle) is known, it is assumed that if the time between two rising edges is out of the PWM signal cycle, the signal is excluded and the process waits for the next PWM signal. Is done. However, in that case, information included in the excluded signal is lost. In the case of using a sensor that transmits a measured physical quantity by expressing it as a duty ratio, it is not preferable that the latest sensor data is lost. The present specification provides a PWM signal receiving apparatus capable of removing the influence of spike noise and acquiring a duty ratio included in a PWM signal.

  The PWM signal receiving device disclosed in this specification includes an edge detection unit, a measurement unit, and a duty ratio calculation unit. The edge detection unit detects one of a rising edge and a falling edge included in the received PWM signal as a separation edge. Although the PWM signal receiving apparatus detects both the rising edge and the falling edge, for convenience of explanation, the edge detecting unit is defined as described above. Normally, the period from the rising edge to the next rising edge represents one cycle, but the edge indicating the start of the cycle is divided so as to correspond to the case where the period from the falling edge to the next falling edge is represented as one cycle. It will be referred to as an edge.

  The measuring unit measures an on-time from a break edge to a next edge (an edge opposite to the break edge). If the delimiting edge is a rising edge, the next edge is a falling edge. If the break edge is a falling edge, the next edge is a rising edge. The duty ratio output unit executes a time addition process and a duty ratio calculation process described below. In the time addition process, the duty ratio output unit sets the total time from the first delimiting edge of the received PWM signal to the i-th delimiting edge in the past until the total time becomes equal to N times the assumed PWM reference period. Increment the variable i. In the duty ratio calculation process, when the total time becomes equal to N times the PWM reference period, the duty ratio output unit outputs the total on-time (N) included between the first and the i-th division edges. Then, a ratio of the total ON time to N times the PWM reference period is output as a duty ratio.

  The above-described processing will be described by taking a case where N = 2 as an example, with a rising edge as a dividing edge. In the time addition process, even if a rising edge caused by spike noise is included, the rising edge between the first rising edge and the past rising edge is ignored until the time from the first rising edge becomes equal to twice the PWM reference cycle. I do. When there is no spike noise, a period between the first rising edge and the third rising edge in the past represents a PWM signal of two cycles. If one or more rising edges are superimposed upon receiving spike noise during this signal, the time until the third rising edge is less than twice the PWM reference period. In that case, in the time addition processing, the third rising edge is ignored, and the total time until the fourth rising edge is obtained. If the time until the fourth rising edge is less than twice the PWM reference period, the total time until the fifth rising edge is obtained. In this way, when the total time becomes equal to twice the PWM reference cycle, the time addition processing ends. In order to allow an error, when the total time up to the i-th rising edge belongs to an allowable time width including N times the PWM reference cycle, it may be determined that the total time is equal to N times the PWM reference cycle. . For example, when the total time belongs to an allowable range of an error of 10% with respect to a time length N times the PWM reference cycle, the total time may be determined to be equal to N times the PWM reference cycle.

  When the time addition process is completed, a signal between the first to the i-th rising edge in the past corresponds to a PWM signal for two cycles. Therefore, in the duty ratio calculation processing, the total on-time (total on-time) included between the first to the i-th rising edge in the past is calculated. The total on-time is an on-time included in the PWM signal of two cycles. In the duty ratio calculation process, the ratio of the total on-time to twice the PWM reference period is output as the duty ratio. Thus, the rising edge caused by the spike noise is removed, and the average of the duty ratios included in the PWM signals for the latest two periods can be obtained. If N = 1, the latest duty ratio of the PWM signal can be obtained.

  The details and further improvements of the technology disclosed in this specification will be described in the following “Detailed description of the invention”.

It is a block diagram of a system including a PWM signal receiving device of an example. It is a flowchart of a noise detection process. It is a flowchart of a noise removal process.

  A PWM signal receiving apparatus 10 according to an embodiment will be described with reference to the drawings. FIG. 1 shows a block diagram of a system including the PWM signal receiving device 10. The PWM signal receiving device 10 according to the embodiment is connected to the temperature sensor 2 via a signal line 3. The temperature measuring element of the temperature sensor 2 is arranged near a heat source HS such as a switching element. The temperature sensor 2 measures the temperature of the heat source HS, and transmits a PWM signal representing the measured temperature by a duty ratio to the PWM signal receiving device 10. The PWM signal receiving device 10 acquires a duty ratio from the received PWM signal, converts the duty ratio into a temperature using known map data, and transmits the temperature to the host computer 4.

  As described above, the measurement target (heat source HS) of the temperature sensor 2 is, for example, a switching element of an inverter. The switching element generates switching noise during switching. The signal line 3 between the temperature sensor 2 and the PWM signal receiving device 10 is exposed to switching noise. The switching noise becomes spike noise, and a new rising edge and a new falling edge may be superimposed on the PWM signal transmitted on the signal line 3. Hereinafter, for the sake of simplicity, the rising edge is referred to as “upper edge” and the falling edge is referred to as “lower edge”.

  In the example system, the start of the PWM signal is the upper edge. That is, the upper edge represents the break of the period of the PWM signal. In the following, the upper edge representing a period break may be referred to as a break edge. One cycle of the PWM signal starts at the upper edge and ends at the next upper edge. A period between two consecutive upper edges (separation edges) represents a PWM signal of one cycle. That is, the time between two successive upper edges (separation edges) corresponds to one cycle time. One lower edge exists between two consecutive upper edges (separation edges). The time from the first upper edge to the next lower edge is called on-time. The ratio of the ON time to the time from the first upper edge to the next upper edge corresponds to the duty ratio.

  If an upper edge and a lower edge caused by spike noise are added between two upper edges, there is a possibility that a part from the first upper edge to an upper edge caused by spike noise is erroneously recognized as one cycle of the PWM signal. . The PWM signal receiving device 10 has a function of removing the influence of the upper edge and the lower edge caused by spike noise. Hereinafter, the PWM signal receiving device 10 will be described.

  The PWM signal receiving device 10 includes an edge detection unit 12, a time measurement unit 13, a period learning unit 14, a duty ratio output unit 15, a conversion unit 16, a buffer 17, and a nonvolatile memory 18. The period learning unit 14, the duty ratio output unit 15, and the conversion unit 16 are realized by a program executed by a central processing unit (CPU). The program is stored in the nonvolatile memory 18. The edge detection unit 12 and the time measurement unit 13 are realized by hardware. The time measuring unit 13 measures the time between edges. The measured time is temporarily stored in the buffer 17. The cycle learning unit 14 calculates the average of the individual cycle times included in the received PWM signal. The buffer 17 is also used when calculating the average of the cycle time.

  The edge detecting unit 12 detects an upper edge and a lower edge included in the received PWM signal. The time measuring unit 13 measures the time (on time) from the detected upper edge to the next lower edge, and measures the time from the detected upper edge to the next upper edge (time between upper edges). . The measured ON time and the time between upper edges are stored in the buffer 17. The buffer 17 is a ring buffer, and stores the ON time and the time between upper edges from the latest to the last 20 times. An index variable indicating which buffer the latest data corresponds to is attached to the ring buffer. From this index variable, it is determined which data (the on-time and the time between the upper edges) corresponds from the latest to the past.

  The cycle learning unit 14 acquires individual cycle times included in the PWM signal, and outputs an average of them as a PWM reference cycle. Supplementary information about the PWM reference cycle will be given. The cycle of the PWM signal output by the temperature sensor 2 is set to a predetermined cycle in design. However, the individual cycles included in the output PWM signal slightly change due to the operation accuracy of the components mounted on the temperature sensor 2 and the temperature change of the temperature sensor itself. The PWM signal receiving apparatus 10 according to the embodiment responds to a change in each cycle included in the PWM signal. The period learning unit 14 outputs, for example, a moving average of the latest ten periods of the PWM signal as an actual period (PWM reference period) of the PWM signal. Whether there is an upper edge due to spike noise and which upper edge is to be extracted as a period dividing edge will be described later.

  The duty ratio output unit 15 specifies an upper edge corresponding to a delimiter edge based on the upper edge detected by the edge detector 12 and the time between the upper edges measured by the time measurement unit 13, and includes the upper edge. The duty ratio is calculated from the ON time. The duty ratio output unit 15 performs the noise detection processing shown in FIG. 2 and the noise removal processing shown in FIG. The processing will be described.

  The noise detection processing shown in FIG. 2 is executed each time the edge detection unit 12 detects an upper edge (delimiter edge). Hereinafter, the latest upper edge is referred to as a first upper edge, and the next newer upper edge is referred to as a second upper edge. In general terms, the latest upper edge is referred to as a first upper edge, and is referred to as an i-th upper edge in order from the first upper edge toward the past.

  The edge detecting unit 12 determines whether or not the time from the first upper edge to the second upper edge (the latest time between upper edges) is within the reference cycle range (Step S2). Here, "within the reference cycle range" means a time zone within an error range of 10% with respect to the PWM reference cycle. That is, in other words, the process of step S2 determines whether or not the latest time between upper edges coincides with the PWM reference cycle within an error range of 10%. If the latest time between upper edges is out of the reference cycle range (step S2: NO), it is determined that the latest time between upper edges is separated by the upper edge caused by spike noise. The process proceeds to the removal process (step S10). The noise removal processing will be described later.

  If the latest time between upper edges is within the reference cycle range (step S2: YES), the duty ratio output unit 15 next determines the time from the second upper edge to the third upper edge (second upper edge (Time) is within the reference cycle range (step S3). If the second upper edge time is out of the reference cycle range (step S3: NO), it is determined that the second upper edge time is separated by the upper edge caused by spike noise. The process proceeds to the noise removal process (step S10). The noise removal processing will be described later.

  The reason for monitoring both the latest upper inter-edge time and the second upper inter-edge time is as follows. Every period of the actual PWM signal includes an error. By simply monitoring the latest time between upper edges, it is not possible to remove spike noise generated within the range of the error. By confirming that the cycle is within the normal range continuously for the latest two cycles and the second cycle, spike noise generated within the error of the latest cycle can be detected / removed.

  If the time between the latest and second upper edges is within the reference cycle range (YES in steps S2 and S3), it means that the time between the latest and second upper edges is both separated by the original delimiter edge. I do. That is, it means that no edge due to spike noise exists until the second time between upper edges. In this case, the duty ratio output unit 15 obtains the ON time between the first upper edge and the second upper edge from the buffer 17, and sets this as the total ON time (step S4).

  Next, the duty ratio output section 15 obtains a duty ratio by dividing the total on-time by the PWM reference cycle (step S5). Since the first upper edge and the second upper edge are original break edges, the ON time between them corresponds to the ON time in the latest PWM1 cycle. Then, the duty ratio output unit 15 outputs the calculated duty ratio to the conversion unit 16 (Step S6). Finally, the duty ratio output unit 15 sends a signal to the cycle learning unit 14 to update the PWM reference cycle (step S7). The process of updating the PWM reference cycle will be described later.

  The conversion unit 16 stores a map (or conversion formula) defining the relationship between the duty ratio and the temperature in advance. The conversion unit 16 converts the received duty ratio into a temperature using a map (or conversion formula), and outputs the temperature to the host computer 4.

  The noise removal processing (FIG. 3) will be described. In the noise removal processing, an upper edge serving as a delimiter of the PWM signal for two cycles from the first upper edge (latest delimiter edge) is detected, and the latest duty ratio is calculated from the on-time during that period. First, the duty ratio output unit 15 substitutes 4 for a variable i in the program (Step S12). The reason why 4 is substituted for the variable i is that it is clear that the time to the third upper edge is less than twice the PWM reference cycle by the noise detection processing.

  Next, the duty ratio output unit 15 determines whether or not the time from the first upper edge to the i-th upper edge is within the range of two reference periods (step S13). Here, “within the reference two cycle range” means a time zone in which the error is 10% with respect to the time twice as long as the PWM reference cycle. In other words, the processing in step S13 is, in other words, determining whether the time from the first upper edge to the i-th upper edge coincides with twice the PWM reference cycle within a range of an error of 10%. Become. If the time from the first upper edge to the i-th upper edge is less than the reference two cycle range (step S13: NO), the variable i is incremented (step S14). Increment is a process of adding one. Step S15 will be described later. The duty ratio output unit 15 increments the variable i until the time from the first upper edge to the i-th upper edge falls within the reference two-cycle range (return to S13 from S14 to S15). The processing from steps S12 to S15 is referred to as time addition processing SA. The time addition process SA is a process of incrementing the variable i until the total time from the first partition edge of the received PWM signal to the past i-th partition edge becomes equal to twice the PWM reference cycle.

  The time addition process SA is a process of ignoring an upper edge in the middle until a time corresponding to two cycles from the first upper edge (the latest delimiting edge) reaches a time corresponding to two cycles, and specifying an upper edge corresponding to the time of two cycles. . The upper edge in the middle is an upper edge generated due to spike noise.

  When the variable i reaches the predetermined upper limit value during the repetition of the time addition processing SA, the duty ratio output unit 15 outputs a signal indicating that the duty ratio cannot be detected to the conversion unit 16 (Step S15: YES, Step S16). . If the variable i has reached the upper limit, the duty ratio output unit 15 determines that an accurate duty ratio cannot be obtained even if the variable i is further increased, executes step S16, and ends the process. Upon receiving the signal indicating that the duty ratio cannot be detected, the conversion unit 16 outputs the same signal to the host computer 4. The host computer 4 that has received the signal indicating that the duty ratio cannot be detected executes a process corresponding to the signal.

  When the time from the first upper edge to the i-th upper edge falls within the reference two cycle range, the duty ratio output unit 15 obtains the on-time from the first upper edge to the i-th upper edge from the buffer 17, The sum is set as the total on-time (step S13: YES, step S17).

  Next, the duty ratio output unit 15 obtains a duty ratio by dividing the total on-time by a time twice as long as the PWM reference cycle (step S18). Since the time from the first upper edge to the i-th upper edge corresponds to two PWM cycles, the total ON time within that time corresponds to the ON time included in the two latest PWM signal cycles. The duty ratio output unit 15 outputs the calculated duty ratio to the conversion unit 16 (Step S19). Finally, the duty ratio output unit 15 sends a signal to the cycle learning unit 14 to update the PWM reference cycle (Step S20). The process of updating the PWM reference cycle will be described later.

  As described above, the conversion unit 16 converts the received duty ratio into a temperature using a map (or a conversion formula), and outputs the converted temperature to the host computer 4.

  The processing from steps S17 to S19 is referred to as duty ratio calculation processing SB. The duty ratio calculation process SB calculates the total on-time included between the first delimiting edge and the i-th delimiting edge, and outputs a ratio of the total on-time to twice the PWM reference cycle as a duty ratio. Processing.

  As described above, the noise removal processing (time addition processing SA and duty ratio calculation processing SB) removes the rising edge caused by spike noise, specifies the original break edge, and obtains the latest duty ratio.

  The update process of the PWM reference cycle will be described. When the process of step S7 in FIG. 2 is performed, the determinations in steps S2 and S3 are YES. Therefore, when the process in step S7 is executed, it is known that the latest time between upper edges and the time between second upper edges indicate the original PWM cycle. The cycle learning unit 14 that has received the instruction to update the PWM reference cycle in step S7 stores the latest time between upper edges and the second time between upper edges in the buffer 17 (ring buffer) as the cycle time of the latest PWM signal. Add. Then, the cycle learning unit 14 obtains the latest 10 cycle times from the buffer 17 and updates the average as a new PWM reference cycle.

  When the process of step S20 in FIG. 3 is performed, it is known that the time from the first upper edge to the i-th upper edge is within the range of two reference periods (step S13: YES). Upon receiving the instruction to update the PWM reference cycle in step S20, the cycle learning unit 14 sets the value obtained by dividing the time from the first upper edge to the ith upper edge by 2 as the cycle time of the latest PWM signal in the buffer 17 (ring). Buffer). Then, the cycle learning unit 14 obtains the latest 10 cycle times from the buffer 17 and updates the average as a new PWM reference cycle. In FIG. 1, an arrow is drawn from the time measurement unit 13 to the period learning unit 14. This arrow indicates that the cycle learning unit 14 updates the PWM reference cycle using the on-time measured by the time measurement unit 13 and the time between upper edges.

  Points to keep in mind regarding the technology described in the embodiment will be described. In the process of FIG. 3, a delimiter edge corresponding to the latest two PWM cycles is extracted. The “two cycles” of the processing in FIG. 3 is satisfied even if it is replaced with “N cycles” (N is a natural number). In particular, when N = 1, it is possible to specify the upper edge (breaking edge) corresponding to the latest PWM cycle. On the other hand, N may be 3 or more.

  In the embodiment, the upper edge is set as the dividing edge. The technology disclosed in this specification can also deal with a PWM signal having a lower edge as a dividing edge. In the case where the lower edge is used as the dividing edge, a period in which the signal potential level is low from the dividing edge (lower edge) to the next edge (upper edge) corresponds to the on-time.

  The noise detection processing of FIG. 2 may be omitted, and the noise removal processing of FIG. 3 may be executed each time the edge detection unit 12 detects a partition edge. In that case, in step S12, it is preferable that the variable i starts from 2.

  As described in the embodiment, the duty ratio output unit 15 sets the total time from the first upper edge to the i-th upper edge to a predetermined allowable time width including twice (N times) the PWM reference cycle. If so, it is determined that the total time is equal to twice (N times) the PWM reference cycle (step S13). The total time belongs to a predetermined allowable time width including twice (N times) the PWM reference cycle means that the total time belongs to a time twice (N times) the PWM reference cycle plus or minus an error. It is. The error may be predetermined.

  As described above, specific examples of the present invention have been described in detail, but these are merely examples, and do not limit the scope of the claims. The technology described in the claims includes various modifications and alterations of the specific examples illustrated above. The technical elements described in the present specification or the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technology illustrated in the present specification or the drawings can simultaneously achieve a plurality of objects, and has technical utility by achieving one of the objects.

2: Temperature sensor 3: Signal line 4: Host computer 10: PWM signal receiving device 12: Edge detection unit 13: Time measurement unit 14: Period learning unit 15: Duty ratio output unit 16: Conversion unit 17: Buffer 18: Non-volatile Memory HS: Heat source SA: Time addition processing SB: Duty ratio calculation processing

Claims (5)

An edge detection unit that detects one of a rising edge and a falling edge of the received PWM signal as a separation edge;
A time measurement unit that measures the on-time from the break edge to the next edge,
A duty ratio output section;
With
The duty ratio output unit includes:
Time addition processing for incrementing the variable i until the total time from the first delimiter edge of the received PWM signal to the past i-th delimiter edge becomes equal to N times the PWM reference cycle;
When the total time becomes equal to N times the PWM reference cycle, the total on-time included between the first partition edge and the i-th partition edge is calculated, and the total ON time is calculated based on the PWM reference cycle. A duty ratio calculation process of outputting a ratio of the total on-time to N times as a duty ratio;
, A PWM signal receiving device.   The duty ratio output unit determines that the total time is equal to N times the PWM reference cycle when the total time belongs to a predetermined allowable time width including N times the PWM reference cycle. The PWM signal receiving device according to claim 1.   3. The PWM signal receiving device according to claim 1, further comprising a period learning unit configured to acquire each period time from the PWM signal and output an average of a plurality of past period times as the PWM reference period. 4. . The duty ratio output unit includes:
The time from the first delimiting edge to the past second delimiting edge belongs to a predetermined one cycle time width including the PWM reference cycle, and the time from the second delimiting edge to the past third delimiting edge is set. If the time belongs to the one cycle time width, the time addition processing and the duty ratio calculation processing are skipped, and the ON time included between the first delimiter edge and the second delimiter edge is skipped. The PWM signal receiving device according to any one of claims 1 to 3, wherein a ratio of the PWM signal to the PWM reference cycle is output as a duty ratio.   The PWM signal device according to any one of claims 1 to 4, wherein the duty ratio output unit outputs a signal indicating that the duty ratio cannot be detected when the variable i reaches a predetermined upper limit value.

Images