JP2020010386A - High frequency low-noise amplifier - Google Patents

Abstract

To provide a high frequency low-noise amplifier, capable of suppressing unwanted oscillation while approaching an impedance to minimize the noise figure and an impedance to maximize the gain.SOLUTION: A high frequency low-noise amplifier includes a circuit board, a first and a second bonding wires, and a field effect transistor. The circuit board includes a ground conductor on its reverse surface, and a first and a second microstrip lines. One-end parts of the microstrip lines are connected to the ground conductor, and the microstrip lines provide inductance. The other-end part of the first microstrip line and a source electrode are connected with a first bonding wire. The other-end part of the second microstrip line and a source electrode are connected with a second bonding wire. A distance between the one-end part and the other-end part of the microstrip line is different from a distance between the one-end part and the other-end part of the second microstrip line.SELECTED DRAWING: Figure 1

Description

  Embodiments of the present invention relate to a high frequency low noise amplifier.

  When a field effect transistor including a HEMT (High Electron Mobility Transistor) is used, a high frequency low noise amplifier can be realized.

  When the source of the field-effect transistor is grounded via the inductor, the impedance at which the noise figure becomes minimum and the impedance at which the gain becomes maximum can be made close to each other.

  The ground inductor can be configured using a short-circuited microstrip line or the like. When a parasitic capacitance occurs in the line pattern, the parasitic capacitance and the ground inductance resonate in parallel, and the source of the low-noise amplifier may be close to open. Even when there is no parasitic capacitance, the source of the low-noise amplifier may be close to open at a frequency where the line length is a quarter wavelength. As a result, unnecessary oscillation occurs, and the operation of the field effect transistor becomes unstable.

Patent No. 3592873

  Provided is a high-frequency low-noise amplifier capable of suppressing unnecessary oscillation while approaching an impedance with a minimum noise figure and an impedance with a maximum gain.

  The high-frequency low-noise amplifier according to the embodiment includes a substrate, a bonding wire, an insulating adhesive, and a field-effect transistor. The substrate is a substrate provided with a ground conductor on the back surface, and has a microstrip line having one end connected to the ground conductor and having an inductance in a band, and a surface insulating region. The field effect transistor is disposed on the substrate and has a source electrode on a surface. The other end of the microstrip line and the source electrode are connected by the bonding wire. The back surface of the field effect transistor is insulated from the microstrip line by being joined to the surface insulating region by the insulating adhesive. The impedance between the source electrode of the field effect transistor and the ground conductor has an inductance component in a desired range within the band.

FIG. 1A is a schematic plan view of the high-frequency low-noise amplifier according to the first embodiment, FIG. 1B is a schematic cross-sectional view taken along line AA, and FIG. 1C is a schematic view of a field-effect transistor. FIG. 1D is a plan view, and FIG. 1D is an equivalent circuit diagram between the source and the ground in an ideal state. FIG. 2A is a schematic plan view in which a field-effect transistor is bonded on a substrate pattern, FIG. 2B is a schematic view illustrating a parasitic capacitance generated by the pattern, and FIG. It is an equivalent circuit diagram between grounds. FIG. 3A is a schematic plan view of a high-frequency low-noise amplifier according to a comparative example, FIG. 3B is a schematic view illustrating a parasitic capacitance, and FIG. 3C is an equivalent circuit diagram between a source and a ground. . FIG. 4A is a schematic plan view of the high-frequency low-noise amplifier according to the second embodiment, and FIG. 4B is a schematic cross-sectional view along line BB. FIG. 5A is a schematic diagram illustrating a common-source inductor in the second embodiment, and FIG. 5B is an equivalent circuit diagram between a source electrode and ground. FIG. 6A is a schematic diagram illustrating a common-source inductor of the high-frequency low-noise amplifier according to the third embodiment, and FIG. 6B is an equivalent circuit diagram between the source electrode and the ground. FIG. 7A is a schematic sectional view of a high-frequency low-noise amplifier according to the fourth embodiment, and FIG. 7B is an equivalent circuit diagram between a source electrode and ground. FIG. 8A is a schematic sectional view of a high-frequency low-noise amplifier according to a fifth embodiment, and FIG. 8B is an equivalent circuit diagram between a source electrode and ground.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1A is a schematic plan view of the high-frequency low-noise amplifier according to the first embodiment, FIG. 1B is a schematic sectional view taken along line AA, and FIG. It is an equivalent circuit diagram between grounds.
The high-frequency low-noise amplifier 10 includes a substrate 80, bonding wires 52 and 54, and the field-effect transistor 20.

  The field effect transistor 20 can be a HEMT, a metal semiconductor field effect transistor (MESFET), or the like. The material may be a nitride semiconductor containing AlGaN / GaN, AlGaAs / GaAs, or the like.

  The substrate 80 includes microstrip lines 31 and 32 for grounding the source electrode S of the field effect transistor 20 via an inductor. In addition, the substrate 80 may further include the input terminal 40, the input circuit 42, the output circuit 48, the output terminal 50, and the like.

  As shown in FIG. 1B, the substrate 80 has an insulator 81, a conductor provided on the front surface of the insulator 81, and a ground conductor 82 provided on the back surface. The first and second microstrip lines 31, 32 and the like are provided on the conductor on the surface. One end of each of the microstrip lines 31 and 32 is connected to the ground conductor 82 via conductors in through holes H1 and H2 provided in the insulator 81. The substrate 80 can be made of, for example, ceramic such as alumina.

  As shown in FIG. 1C, the field-effect transistor 20 has a source electrode (S) 72, a gate electrode (G) 70, and a drain electrode (D) 74 on the surface of the semiconductor laminate. A finger source electrode 70a is provided on the surface, and a drain current is controlled by changing a gate voltage in a channel formed between the finger source electrode 72a and the finger drain electrode 74b.

  In low-noise amplification applications, the number of finger gate electrodes 70a can be several or less. In the figure, two finger gate electrodes 70a are connected to a gate terminal electrode 70b. One finger drain electrode 74a is connected to the drain terminal electrode 74b. The finger source electrode 72a is connected to two source terminal electrodes 72b and 73b, respectively. Note that the two source terminal electrodes 72b and 73b may be connected on a chip.

  Gate terminal electrode 70b is connected to terminal 44 of input circuit 42. The input circuit 42 can include a matching circuit that keeps the gain near the maximum value while keeping the noise figure near the minimum value. The drain terminal electrode 74b is connected to the terminal 46 of the output circuit 48. The output circuit includes a matching circuit that sets the gain near the maximum value.

  FIG. 1D is an equivalent circuit diagram of an ideal field-effect transistor having no parasitic capacitance and a grounded source inductance of L0.

  The field effect transistor 20 is bonded to a die pad region provided on the substrate 80 with a conductive adhesive 56. The conductive adhesive 56 can be a metal solder, a conductive paste, or the like. The other end of the first microstrip line 31 and the source electrode S are connected by a first bonding wire 52, and the other end of the second microstrip line 32 and the source electrode S are connected by a second bonding wire. They are connected by wires 54.

FIG. 2A is a schematic plan view in which a field-effect transistor is bonded on a substrate pattern, FIG. 2B is a schematic view illustrating a parasitic capacitance generated by the pattern, and FIG. It is an equivalent circuit diagram between grounds.
The distance (electrical length EL1) between one end and the other end of the first microstrip line 31 and the distance between one end and the other end of the second microstrip line 32 The distance (EL2) is set to be different from the distance (EL2). Note that the electrical length EL1 is a distance between (the center of) the bonding position B1 and the center of the through hole H1. The electric length EL2 is a distance between (the center of) the bonding position B2 and the center of the through hole 2.

  The other end of the first microstrip line 31 and the other end of the second microstrip line 32 are connected by a conductive die pad region 33 to which the field effect transistor 20 is adhered. The die pad regions 33a and 33b between the bonding positions B1 and B2 generate the capacitors 27 and 28 between the die pads and the ground conductor 82 of the substrate 10, respectively, and the line ends of the first microstrip line 31, the second microstrip It becomes the parasitic capacitance of the line end of the line 32. That is, an equivalent circuit as shown in FIG. Note that the regions 33a and 3b are actually continuous.

  In the first embodiment, the electrical length EL1 of the first microstrip line 31 is different from the electrical length EL2 of the second microstrip line 32. Therefore, the resonance frequency of the first microstrip line 31 and the capacitor 27 can be different from the resonance frequency of the second microstrip circuit 32 and the capacitor 28. In addition, it is easy to keep the impedance that minimizes the noise figure and the impedance that maximizes the gain close to each other by using the common source inductor while keeping the stability index K of the amplifier circuit larger than 1.

  That is, even if one of the parallel resonance circuits has a frequency near the open state, the other parallel resonance circuit does not become open. The source electrode S is grounded via an inductor. For this reason, the field effect transistor 20 is prevented from becoming unstable and oscillating.

  In FIG. 2C, when the parasitic capacitance is small, the grounded source inductances are the inductances L1a and L1b of the bonding wires 52 and 54, the inductance L2 of the first microstrip line 31, and the second microstrip line 32. Is synthesized.

FIG. 3A is a schematic plan view of a high-frequency low-noise amplifier according to a comparative example, FIG. 3B is a schematic view illustrating a parasitic capacitance, and FIG. 3C is an equivalent circuit diagram between a source and a ground. .
The high-frequency low-noise amplifier 110 includes a substrate (not shown), bonding wires 152 and 154, and a field-effect transistor 120.

  The substrate 180 includes microstrip lines 131 and 132 for grounding the source electrode S of the field effect transistor 120 via an inductor. The electrical length EL1 of the microstrip line 131 is equal to the electrical length EL2 of the microstrip line 132. For this reason, near the frequency at which the parasitic capacitor and the inductor resonate in parallel, the source electrode S is close to open, and the field-effect transistor easily oscillates.

  The gate width of the field effect transistor for low noise amplification is sufficiently smaller than the gate width of the field effect transistor for power amplification, and the field effect transistor of the low noise amplifier has a high gain in the band. For this reason, when the source electrode S approaches an open state, oscillation is caused and the operation becomes unstable.

  On the other hand, in the first embodiment, in order to realize the common source inductance L0 (ideal value) that minimizes the noise figure (NF), there is a degree of freedom to change the combination of the inductance L2 and the inductance L3. That is, in the band of the low-noise amplifier, the inductance is combined so that the source electrode S moves away from the open state, and unnecessary oscillation can be suppressed.

FIG. 4A is a schematic plan view of the high-frequency low-noise amplifier according to the second embodiment, and FIG. 4B is a schematic cross-sectional view along line BB.
The high-frequency low-noise amplifier 10 includes a substrate 80, bonding wires 52 and 54, and the field-effect transistor 20.

  The substrate 80 includes first and second microstrip lines 31 and 32 for grounding the source electrode S of the field effect transistor 20 via an inductor. The electrical lengths EL1, EL2 of the first and second microstrip lines 31, 32 are the same.

  The back surface of the field effect transistor 20 and the microstrip lines 31 and 32 are insulated. That is, in this drawing, the field-effect transistor 20 is bonded to the die pad region 33 provided on the surface of the substrate 80 with the conductive adhesive 56. The die pad region 33 and the first and second microstrip lines 31 and 32 can be formed using the same process. The other end of the first microstrip line 31 and the source electrode 72 are connected by a first bonding wire 52, and the other end of the second microstrip line 32 and the source electrode 72 are connected by a second bonding wire. They are connected by wires 54.

FIG. 5A is a schematic diagram illustrating a parasitic capacitance of a pattern in the second embodiment, and FIG. 5B is an equivalent circuit diagram between a source electrode and ground.
A die pad region (not shown) to which the field-effect transistor 20 is bonded is separated from the first and second microstrip lines 31 and 32. For this reason, the die pad region is not connected to the connection position between the bonding wires 52, 54 and the other ends of the first and second microstrip lines 31, 32. Therefore, the parasitic capacitance can be made sufficiently small as shown in the equivalent circuit diagram of FIG. That is, it is possible to prevent the source electrode S from being opened due to parallel resonance as compared with the first embodiment, and to suppress oscillation.

FIG. 6A is a schematic diagram illustrating the parasitic capacitance of the high-frequency low-noise amplifier according to the third embodiment, and FIG. 6B is an equivalent circuit diagram between the source electrode and the ground.
In the third embodiment, the electrical length EL1 of the first microstrip line 31 is different from the electrical length EL2 of the second microstrip line 32. Further, the die pad region to which the field effect transistor 20 is bonded is not connected to the first and the microstrip lines 31 and 32. Therefore, the parasitic capacitance applied to the microstrip line in parallel can be sufficiently reduced. Even when there is no parasitic capacitance, the impedance at the line end is close to open at a frequency at which the line length becomes a quarter wavelength, but the electric length EL1 of the first microstrip line 31 and the second microstrip line Since the electrical length EL2 is different from 32, the impedances of the two lines are not simultaneously opened.

  In FIG. 6A, assuming that the parasitic capacitance can be neglected, the ideal source ground inductance L0 can be expressed by Expression (1).

1 / L0 = 1 / (L1a + L2) + 1 / (L1b + L3) Equation (1)

Here, L1a: inductance of the bonding wire 52
L1b: inductance of the bonding wire 54
L2: inductance of the microstrip line 31
L3: inductance of the microstrip line 32

  In the third embodiment, in order to realize the grounded source inductance L0 (ideal value) that minimizes the noise figure, there is a degree of freedom to change the combination of the inductance L2 and the inductance L3. That is, the source electrode S of the low-noise amplifier is set not to be open even at a frequency where the impedance at the line end of one of the microstrip lines is close to open while realizing the common source inductance L0. it can.

FIG. 7A is a schematic sectional view of a high-frequency low-noise amplifier according to the fourth embodiment, and FIG. 7B is an equivalent circuit diagram between a source electrode and ground.
Capacitors 90 and 92 are generated between the source electrodes (S) 72 and 73 of the field-effect transistor 20 shown in FIG. When the die pad 33 is provided as in the second embodiment shown in FIG. 4, capacitances 91 and 93 occur between the die pad 33 and the ground conductor 82 of the substrate 80.

  As shown in FIG. 7B, the capacitances 91 and 93 and the capacitances 90 and 92 are connected in series between the source electrode S and the ground conductor 82, and serve as a parasitic capacitance for the source electrode S. At a frequency at which this parasitic capacitance causes parallel resonance with the ground inductance, the source electrode S tends to approach open.

  When the capacitances 90 and 92 are sufficiently small, the effects of the capacitances 91 and 93 can be ignored. When a conductive adhesive is used, in the second embodiment shown in FIG. 4, if the size of the die pad region 33 is made larger than the size of the field effect transistor 20, the adhesive does not protrude, and the assembly becomes easy. However, when the thickness of the field effect transistor 20 is small and the source electrode S is relatively large, the capacitances 90 and 92 increase, and the influence of the capacitances 90 and 92 cannot be ignored.

  On the other hand, in the fourth embodiment, a die pad area larger than the chip size is not provided. That is, the back surface of the field-effect transistor 20 and the microstrip lines 31 and 32 are insulated. In the figure, the size of the back conductor 78 of the field effect transistor 20 is smaller than the size of the field effect transistor 20. In addition, when the conductive adhesive spreads, a capacitance is generated as in the case of the die pad. Therefore, the insulating adhesive 79 bonds between the field effect transistor 20 and the surface insulating region 81a of the substrate 80.

  A capacitor 90 is generated between the source electrode 72 and the back surface conductor 78. Further, a capacitor 91 is generated between the back conductor 78 and the ground conductor 82 of the substrate 80. Therefore, capacitors 90 and 91 are connected in series between source electrode 72 and ground. Similarly, capacitors 92 and 93 are connected in series between the source electrode 73 and the ground. The value of the parasitic capacitance connected in series can be smaller than the parasitic capacitance of the second embodiment in FIG. For this reason, unnecessary oscillation is further suppressed.

FIG. 8A is a schematic cross-sectional view of a high-frequency low-noise amplifier according to the fifth embodiment, and FIG. 8B is an equivalent circuit diagram between a source electrode and ground.
In the fifth embodiment, the back conductor is not provided on the chip, and the insulating region on the back surface of the field effect transistor 20 and the front insulating region 81a of the substrate 80 are bonded with the insulating adhesive 79. Therefore, only the space between the source electrodes (S) 72 and 73 and the ground conductor 82 becomes a capacitance, so that the capacitance of the parasitic capacitor 94 and the capacitance of the parasitic capacitor 95 can be reduced as compared with the second embodiment, and unnecessary oscillation is further suppressed. Is done.

  According to the first to fifth embodiments and the accompanying modifications, there is provided a high-frequency low-noise amplifier capable of suppressing unnecessary oscillation while approaching an impedance with a minimum noise figure and an impedance with a maximum gain. Is done. These high-frequency low-noise amplifiers can be widely applied to microwave communication equipment and the like.

  While some embodiments of the invention have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. These new embodiments can be implemented in other various forms, and various omissions, replacements, and changes can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are also included in the invention described in the claims and their equivalents.

Reference Signs List 10 high frequency low noise amplifier, 20 field effect transistor, 31 first microstrip line, 32 second microstrip line, 33 die pad region, 52 first bonding wire, 54 second bonding wire, 72, 73 source electrode , 78 back conductor, 79 insulating adhesive, 80 substrate, 81a surface insulating area, 82 ground conductor, EL1, EL2 electrical length, H1, H2 through hole

Claims (3)

A substrate provided with a ground conductor on the back surface, a microstrip line having one end connected to the ground conductor and having an inductance in a band, and a substrate having a surface insulating region,
A bonding wire;
An insulating adhesive;
A field-effect transistor disposed on the substrate and having a source electrode on a surface, wherein the other end of the microstrip line and the source electrode are connected by the bonding wire,
With
The back surface of the field effect transistor is insulated from the microstrip line by being joined to the surface insulating region by the insulating adhesive,
A high frequency low noise amplifier, wherein an impedance between the source electrode of the field effect transistor and the ground conductor has an inductance component in a desired range within the band.   The high-frequency low-noise amplifier according to claim 1, wherein the back surface of the field-effect transistor does not include a back conductor and is an insulating region. The field effect transistor includes a back conductor,
The size of the back conductor is smaller than the size of the field effect transistor,
The high-frequency low-noise amplifier according to claim 1, wherein the back conductor and the front insulating region are bonded by the insulating adhesive.

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