JP2019186496A5 - Semiconductor device - Google Patents

Semiconductor device Download PDF

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JP2019186496A5
JP2019186496A5 JP2018078955A JP2018078955A JP2019186496A5 JP 2019186496 A5 JP2019186496 A5 JP 2019186496A5 JP 2018078955 A JP2018078955 A JP 2018078955A JP 2018078955 A JP2018078955 A JP 2018078955A JP 2019186496 A5 JP2019186496 A5 JP 2019186496A5
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oxide
overlaps
insulator
conductor
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JP7046692B2 (en
JP2019186496A (en
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Claims (8)

第1の絶縁体と、
前記第1の絶縁体上の第1の酸化物と、
前記第1の酸化物上の第2の酸化物と、
前記第2の酸化物上の第3の酸化物および第4の酸化物と、
前記第2の酸化物上の第5の酸化物と、
前記第5の酸化物上の第2の絶縁体と、
前記第2の絶縁体上に位置し、前記第2の酸化物と重なる導電体と、を有し、
前記第2の酸化物は、第1の領域、第2の領域、および前記第1の領域と前記第2の領域の間に位置する第3の領域を有し、
前記第1の領域、および前記第2の領域は、それぞれ前記第3の領域よりも抵抗が低い領域を有し、
前記第3の酸化物は、前記第1の領域と重畳し、かつ前記第3の領域と重畳する領域を有し、
前記第4の酸化物は、前記第2の領域と重畳し、かつ前記第3の領域と重畳する領域を有する、導体装置。
With the first insulator,
With the first oxide on the first insulator,
With the second oxide on the first oxide,
With the third oxide and the fourth oxide on the second oxide,
With the fifth oxide on the second oxide,
With the second insulator on the fifth oxide,
It has a conductor that is located on the second insulator and overlaps with the second oxide.
The second oxide has a first region, a second region, and a third region located between the first region and the second region.
The first region and the second region each have a region having a lower resistance than the third region.
The third oxide has a region that overlaps with the first region and overlaps with the third region.
The fourth oxide may overlap the second region and has a region overlapping with the third region, a semi-conductor device.
請求項1において、
前記第1の領域と重畳する前記第3の酸化物は、前記第3の領域と重畳する前記第3の酸化物よりも抵抗が低く、
前記第2の領域と重畳する前記第4の酸化物は、前記第3の領域と重畳する前記第4の酸化物よりも抵抗が低い、導体装置。
In claim 1,
The third oxide superimposing on the first region has a lower resistance than the third oxide superimposing on the third region.
Wherein the fourth oxide which overlaps with the second region has a lower resistance than the said fourth oxide of the third to the area and superimposed, semi conductor device.
第1の絶縁体と、
前記第1の絶縁体上の第1の酸化物と、
前記第1の酸化物上の第2の酸化物と、
前記第2の酸化物上の第3の酸化物および第4の酸化物と、
前記第2の酸化物上の第5の酸化物と、
前記第5の酸化物上の第2の絶縁体と、
前記第2の絶縁体上に位置し、前記第2の酸化物と重なる導電体と、を有し、
前記第2の酸化物は、第1の領域、第2の領域、および前記第1の領域と前記第2の領域の間に位置する第3の領域を有し、
前記第1の領域、および前記第2の領域は、それぞれ前記第3の領域よりも結晶性が低い領域を有し、
前記第3の酸化物は、前記第1の領域と重畳し、かつ前記第3の領域と重畳する領域を有し、
前記第4の酸化物は、前記第2の領域と重畳し、かつ前記第3の領域と重畳する領域を有する、導体装置。
With the first insulator,
With the first oxide on the first insulator,
With the second oxide on the first oxide,
With the third oxide and the fourth oxide on the second oxide,
With the fifth oxide on the second oxide,
With the second insulator on the fifth oxide,
It has a conductor that is located on the second insulator and overlaps with the second oxide.
The second oxide has a first region, a second region, and a third region located between the first region and the second region.
The first region and the second region each have a region having a lower crystallinity than the third region.
The third oxide has a region that overlaps with the first region and overlaps with the third region.
The fourth oxide may overlap the second region and has a region overlapping with the third region, a semi-conductor device.
請求項3において、
前記第1の領域と重畳する前記第3の酸化物は、前記第3の領域と重畳する前記第3の酸化物よりも結晶性が低く、
前記第2の領域と重畳する前記第4の酸化物は、前記第3の領域と重畳する前記第4の酸化物よりも結晶性が低い、導体装置。
In claim 3,
The third oxide superimposing on the first region has lower crystallinity than the third oxide superimposing on the third region.
The fourth oxide which overlaps with the second region is less crystalline than the fourth oxide of overlapping the third region, a semi-conductor device.
請求項1乃至請求項4のいずれかにおいて、前記第3の酸化物および前記第4の酸化物は、それぞれ亜鉛を含む半導体装置。 In any one of claims 1 to 4, wherein the third oxide and said fourth oxide of each include zinc, semiconductor device. 請求項1乃至請求項5のいずれかにおいて、
前記導電体は、前記第3の酸化物および前記第4の酸化物と重畳する領域を有する半導体装置。
In any one of claims 1 to 5,
The conductor is a semiconductor device having a region that overlaps with the third oxide and the fourth oxide.
請求項1乃至請求項6のいずれかにおいて、
前記第2の酸化物は、Inと、元素M(MはAl、Ga、Y、またはSn)と、Znと、を有する、導体装置。
In any one of claims 1 to 6,
The second oxides have a In, the element M (M is Al, Ga, Y or Sn,) and, with Zn, a semi-conductor device.
請求項1乃至請求項7のいずれかにおいて、
前記第1の領域、および前記第2の領域は、リン、およびホウ素の一方を含む半導体装置。
In any one of claims 1 to 7,
Said first region, and said second region includes one of phosphorus, and boron, semiconductor device.
JP2018078955A 2018-04-17 2018-04-17 Semiconductor device Active JP7046692B2 (en)

Priority Applications (1)

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Publications (3)

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JP2019186496A JP2019186496A (en) 2019-10-24
JP2019186496A5 true JP2019186496A5 (en) 2021-05-06
JP7046692B2 JP7046692B2 (en) 2022-04-04

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Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009016469A (en) * 2007-07-03 2009-01-22 Mitsubishi Electric Corp Semiconductor apparatus and method of manufacturing the same
KR20160114511A (en) 2015-03-24 2016-10-05 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Method for manufacturing semiconductor device
TWI693719B (en) 2015-05-11 2020-05-11 日商半導體能源研究所股份有限公司 Manufacturing method of semiconductor device
WO2017081579A1 (en) * 2015-11-13 2017-05-18 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same

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