JP2019161975A - Power storage device and power storage system - Google Patents

Abstract

To provide a power storage device capable of improving energy storage efficiency and usage efficiency by using power output from a power generating element that outputs high voltage and low current.SOLUTION: A power storage device 1 connected to a power generating element and a load circuit includes: a power storage section 7 including a plurality of power storage devices C1, C2; a timing control section 5 controlling to switch between series and parallel in the power storage devices; and a series/parallel switch section 6 controlled by the timing control section 5 and switching between series and parallel in the power storage devices. The timing control section 5 is provided with hysteresis to control the timing of switching.SELECTED DRAWING: Figure 12

Description

  The present invention relates to a power storage device and a power storage system.

  Along with the progress of IoT technology, efforts are being made to reduce the power supply to edge devices by energy harvesting technology. For example, an application has been realized in which an LED is turned on with electric power generated by electrostatic induction by a piezoelectric element, peeling electrification and frictional electrification in an electric power generation rubber, electret, or the like.

  However, power generation due to piezoelectric elements, triboelectric charging, and electrostatic induction has a high generated voltage and a small generated current, so it is suitable for applications where LEDs are connected in series for instantaneous light emission, but the CPU operation required for IoT edge devices. And voltage and current required for sensor drive and wireless transmission cannot be satisfied. For this reason, there is a need for technology development that efficiently utilizes generated power even when the generated voltage is high and the current is small.

  In general, in the case of a small amount of generated power, the generated power is stored in a capacitor and converted into a drive voltage necessary for the edge device by a DC / DC converter. However, since power generation devices using piezoelectric elements and electrostatic induction have high output impedance, there is a problem in that storing electricity directly in a low-impedance capacitor results in storing in the low voltage state during storage, resulting in low energy storage efficiency. .

  In view of this, Patent Document 1 proposes a power supply circuit that generates operating power using minute power generated by a power generating element that has a high output impedance and outputs a low current. In this power supply circuit, an electret element is assumed as a power generation element that outputs minute electric power, and has a high output impedance of 15 MΩ, and a power generation element having a maximum output of 92.5 Vp-p, 3.1 μA.

  However, assuming that the power supply circuit of Patent Document 1 is applied to a power generation rubber having a maximum output of 400 V and 1 μA, the power generation rubber has a higher output voltage than the electret element, so that the power consumed by the internal resistance of the power generation rubber is reduced. Because it grows, it is inefficient.

  In view of the above circumstances, an object of the present invention is to provide a power storage device that can improve energy storage efficiency and use efficiency using power output by a power generation element that outputs high voltage and low current. .

In order to solve the above problems, the present invention has the following means.
According to one aspect, a power storage device connected to a power generation element and a load circuit,
A power storage unit having a plurality of power storage devices;
A timing control unit that controls to switch the series-parallel of the plurality of power storage devices;
Controlled by the timing control unit, and having a series-parallel changeover switch unit for switching series-parallel of the plurality of power storage devices,
The timing controller is provided with a hysteresis to control the switching timing.

  According to one aspect, in the power storage device, energy storage efficiency and use efficiency can be improved using the power output by the power generation element that outputs high voltage and low current.

Schematic of the electrical storage system which concerns on embodiment of this invention. Schematic of the electrical storage system which concerns on a comparative example. The conceptual diagram of the electric power generation element mounted in an electrical storage system. The equivalent circuit diagram at the time of the electrical storage using a power generating element, and the figure explaining the electrical storage energy rate by the conditions stored in a capacitor | condenser. The equivalent circuit diagram at the time of the generated power consumption by the resistive load using a power generating element, and the figure explaining the ratio of the electric power supply amount by the conditions which supply electric power to a resistive load. The figure explaining the state of the switch which connects two capacitors in series. The figure explaining the state of the switch which connects two capacitors in parallel. Explanatory drawing of the structural example 1 of a serial / parallel switching timing control part. Explanatory drawing of the example 2 of a structure of a serial / parallel switching timing control part. The specific circuit diagram of the electrical storage apparatus of one Embodiment of this invention. The figure which shows the flow of the electric current at the time of electrical storage and electric power supply in the electrical storage apparatus of FIG. The circuit diagram of the electrical storage system of FIG. The figure explaining the Example at the time of adding the function linked with the communication module mounted with a microcomputer to the IC function of FIG. FIG. 11 is a timing chart of a series-parallel switching operation in the power storage device of FIG. 10. (A) Circuit diagram with fixed capacitor capacity, (b) Storage current and storage voltage in the state of (a), transition of capacitor terminal voltage during discharge, state of storage and discharge in the state of the diagram The figure which shows transition of the electric current at the time. (A) The circuit diagram which switches the series-parallel of a capacitor | condenser, The figure which shows transition of the electrical storage current in the state of (b) and (a), the electrical storage voltage, and the voltage between capacitor terminals in the case of discharge. The figure explaining the Example of the circuit which connects four capacitors in series. The figure explaining the Example of a capacitor | condenser multistage connection circuit.

  Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings. In the following drawings, the same components are denoted by the same reference numerals, and redundant description may be omitted.

<Power storage system>
First, the power storage system of the present invention will be described with reference to FIG. FIG. 1 is a schematic diagram of a power storage system (energy power storage system) according to an embodiment of the present invention.

  The power storage system 100 includes a power generation element 2, a rectifier circuit 4, a power storage device 1, and a load circuit 3.

  The power storage device 1 includes a series-parallel switching timing control unit 5, a series-parallel switching switch unit 6, and a power storage unit 7. The power storage unit 7 includes capacitors C1 and C2 that are a plurality of power storage devices that can be switched between a series connection state and a parallel connection state.

  The power generation element 2 is generated by power generation rubber, a piezoelectric element, or electrostatic induction. The generated power is a high voltage and a low current, and power generation will be described later with reference to FIG.

  The load circuit 3 is, for example, an LED (light emitting diode), an IC (Integrated Circuit) having a CPU (Central Processing Unit) function, a sensor, a wireless transmission IC, or the like.

  In the power storage system 1, the energy generated by the power generation element 2 is rectified by the rectifier circuit 4, and then energy is stored at a high voltage in a plurality of capacitors C 1 and C 2 connected in series (see FIG. 12). , C2 are connected in parallel to supply energy to the load circuit 3.

  More specifically, the AC energy generated by the power generation element 2 is rectified by the rectifier circuit (rectifier unit) 4. At this time, the series-parallel switching timing control unit 5 controls the series-parallel switching unit 6 to store energy (storage voltage) in the capacitors C1 and C2 connected in series by the storage unit 7. When the stored voltage reaches a certain voltage, the series-parallel switching timing control unit 5 controls the series-parallel switching switch unit 6 so that the plurality of capacitors C1 and C2 are connected in parallel to supply power to the load circuit 3. .

  When the output potential of the power storage unit 7 becomes a certain voltage or less, the series-parallel switching timing control unit 5 controls the series-parallel switching switch unit 6 to return the plurality of capacitors C1 and C2 to series connection, thereby generating elements. The energy generated from 2 is stored.

<Comparative example>
For comparison, FIG. 2 shows a schematic diagram of a system for storing energy generated by the energy harvesting element and supplying the energy to the load circuit.

  FIG. 2 shows an example of a general energy harvesting system. Also in this example, the energy generated by the energy harvesting element is supplied to the load circuit through the rectifier circuit 4 and the power storage device 1X.

  The power storage device 1X of FIG. 2 includes a first power storage unit 101 that is a power storage side power storage unit, a power conversion circuit 102, and a second power storage unit 103 that is a supply side power storage unit. That is, in the general energy storage system 100X, the power storage unit is provided with the first power storage unit 101 for power storage and the second power storage unit 103 on the supply side separately.

In the configuration of FIG. 2, the voltage stored in the first power storage unit 101 is converted into the operating voltage of the load circuit 3 by the power conversion circuit 102 such as a DC / DC converter and stored in the second power storage unit 103, thereby Supply power to the circuit. At this time, this power storage device has the following problems.
(A): Generation of loss due to current consumption in power conversion circuit 102 (B): Generation of loss due to conversion efficiency (C): Addition of components such as inductor

  Specifically, the voltage needs to be step-up converted or step-down converted according to the relationship between the voltage stored in the first power storage unit 101 and the voltage stored in the second power storage unit 103.

  When the storage voltage of the first power storage unit 101 <the storage voltage of the second power storage unit 103, it is necessary to perform step-up conversion. Power is stored at a low voltage, and the power storage device 1X needs to be enlarged according to the following (formula 1).

  In addition, since the stored energy is proportional to the square of the stored voltage, power storage by the power generation element 2 that outputs a low current at a high voltage, such as a power generation rubber, causes a loss due to current consumption in the power conversion circuit 102, thereby The voltage increase efficiency is poor, and the power storage efficiency is low (A).

  Next, when the storage voltage of the first power storage unit 101> the storage voltage of the second power storage unit 103, it is necessary to perform step-down conversion. In this case, since energy can be stored in the first power storage unit 101 with a high voltage according to (Equation 1), the energy can be stored with a high voltage by reducing the power storage device. However, since a difference between the storage voltage of the first power storage unit 101 and the storage voltage of the second power storage unit 103 occurs, a loss occurs and energy conversion efficiency decreases (B).

  As described above, in the configuration of FIG. 2, the loss due to the current consumption in the power conversion circuit 102 and the loss due to the voltage change are increased, and the power storage device is increased in size by the increase in the number of components. .

  Compared to this, in the power storage system of the embodiment of the present invention shown in FIG. 1, a power storage unit having a plurality of capacitors is commonly used for power storage and power supply, and the power storage unit is driven. Energy efficiency is good because less current is required and there is no voltage conversion loss.

<Power generation element>
FIG. 3 is a conceptual diagram of the power generation element 2 mounted on the power storage system of the present invention.

  The power generation element 2 is made of, for example, a power generation rubber, and generates electric charges by applying a peeling force, a friction force, a vibration force, or a deformation force, and generates power.

  The power generation amount of the power generation element 2 is a voltage of 10 to 1000 V (for example, 40 V) and a current of 50 nA to 100 μA (for example, 6 μA).

  In addition, since the power generation element composed of the power generation rubber or the piezoelectric element has a high resistance and outputs a current due to a predetermined charge, it can be approximated by the current source 21 and the internal resistance 22. The resistance value of the internal resistor 22 is 1 to 100 MΩ (mega ohms) (for example, 10 MΩ).

  Here, a capacitor and a resistance load connected to the power generation element 2 will be described with reference to FIGS. 4 and 5.

  FIG. 4A is an equivalent circuit diagram during power storage using the power generation element, and FIG. 4B is a diagram illustrating a power storage energy rate depending on conditions for storing power in a capacitor.

  In FIG. 4B, the energy generated by the power generation element is represented by a ratio (%) obtained by calculation with the stored energy at the time of the maximum stored energy by changing the capacitance value of the capacitor as 100%. It is.

  When the capacitance of the capacitor is set at the arrowed portion in FIG. 4B, impedance matching is achieved between the capacitor and the power generating element 2 (output side) including the constant current source and the internal resistance, and energy can be stored most efficiently. .

  FIG. 5A is an equivalent circuit diagram when power generated by a resistive load using the power generating element 2 is consumed, and FIG. 5B illustrates the ratio of the amount of power supplied according to the condition for supplying power to the resistive load. It is a figure to do.

  In FIG. 5 (b), the energy generated by the power generation element is expressed by a ratio (%) obtained by calculation by changing the resistance value of the load resistance and assuming that the consumed energy is 100% as the maximum consumed energy. It is a graph.

  When the resistance value of the load resistance is set at the arrowed portion in FIG. 5B, the load resistance and the internal resistance of the power generating element 2 are equal to each other, and when the internal resistance = the load resistance, the load circuit 3 (output side) ) And impedance matching, energy can be used most efficiently.

<Series-parallel switching>
FIG. 6 is a schematic diagram showing a state of a switch connecting two capacitors in series. FIG. 7 is a schematic diagram showing a state of a switch that connects two capacitors in parallel.

  The series / parallel changeover switch unit 6 includes three switches Sw1, Sw2, and Sw3. The power storage unit 7 includes two capacitors C1 and C2. A capacitor | condenser is an example of an electrical storage device, Comprising: An electric double layer capacitor, a lithium ion capacitor, a lithium ion battery, a lead storage battery, and various electrical storage devices may be used.

  As shown in FIG. 6, when the switch Sw2 of the series / parallel changeover switch unit 6 is ON and the switches Sw1 and Sw3 are OFF, the capacitors C1 and C2 of the power storage unit 7 are connected in series.

  Moreover, as shown in FIG. 7, when the switches Sw1 and Sw3 of the series / parallel changeover switch unit 6 are ON and the switch Sw2 is OFF, the capacitors C1 and C2 of the power storage unit 7 are connected in parallel.

<Linear switching timing control unit>
FIG. 8 is a diagram illustrating a first configuration example of the serial-parallel switching timing control unit.
The series / parallel switching timing control unit 5 (timing control unit) shown in FIG. 8 includes a series / parallel switching switch control unit 50, two resistors R1 and R2, and two switches Sw4 and Sw5.

  The series / parallel changeover switch control unit 50 functions as a voltage monitor circuit that monitors the input voltage Vin serving as a reference for series / parallel changeover and outputs a control signal S1. The series / parallel changeover switch control unit 50 generates a control signal S1 according to the detection result of the input voltage Vin to the terminal 11, and controls the switch Sw4 and the switch Sw5 with the generated control signal S1.

  In the series-parallel switching timing control unit 5, the resistor R1 and the switch Sw4 form a high impedance drive inverter 51, and the resistor R2 and the switch Sw5 form a high impedance drive inverter 52. The switches Sw4 and Sw5 are configured by Nch transistors, for example.

  The serial / parallel switching timing control unit 5 generates control signals φ 1 and φ 2 for controlling the serial / parallel switching switch unit 6 and outputs the control signals φ 1 and φ 2 from the terminals 53 and 54.

  In the series-parallel switching timing control unit 5, the series-parallel switching switch control unit 50 and the inverter 51 function as a hysteresis generation circuit H. The hysteresis generation circuit H quickly detects a change in the input voltage Vin, and has a hysteresis in the switching threshold so as to prevent the signal once switched from the L level to the H level (or from the H level to the L level) from being unstablely switched. (Difference) is provided. In this example, when the input voltage Vin increases and reaches a predetermined first voltage, the hysteresis generation circuit H switches the control signal φ1 from the H level to the L level, and the input voltage Vin decreases from the first voltage. When the predetermined second voltage is reached, the control signal φ1 is switched from the L level to the H level. Details will be described later with reference to FIG.

  In this configuration, by using the high impedance resistors R1 and R2 for the inverters 51 and 52, the power storage device even in the high impedance output power generation element 2 having a high voltage and a low current generated by a piezoelectric element or electrostatic induction. One circuit can be driven. For example, the resistance values of the resistors R1 and R2 are 1 MΩ to 500 MΩ.

FIG. 9 is a diagram illustrating a second configuration example of the serial-parallel switching timing control unit.
The series / parallel switching timing control unit 5A shown in FIG. 9 includes a series / parallel switching switch control unit 50, two constant current sources IC1 and IC2, and two switches Sw4 and Sw5.

  In the series / parallel switching timing control unit 5A, the constant current source IC1 and the switch Sw4 form a high impedance drive inverter 51A, and the constant current source IC2 and the switch Sw5 form a high impedance drive inverter 52A. The switches Sw4 and Sw5 are configured by Nch transistors, for example.

  The control signal S1 generated by the series / parallel changeover switch control unit 50 controls the switches Sw4 and Sw5 to generate control signals φ1 and φ2 for controlling the series / parallel changeover switch unit 6, and outputs them from the terminals 53 and 54. . In the serial-parallel switching timing control unit 5A, the switch control unit 50 and the inverter 51A function as a hysteresis generation circuit H.

  In this configuration, by using the high-impedance constant current sources IC1 and IC2 for the inverters 51A and 52A, the high-impedance output power generation element 2 having a high voltage and a low current generated by a piezoelectric element or electrostatic induction can be used. The circuit of the power storage device 1 can be driven. For example, the current values generated by the constant current sources IC1 and IC2 included in the inverters 51A and 52A are 10 nA to 100 μA.

  FIG. 10 is a specific circuit diagram of the power storage device 1 according to the embodiment of the present invention.

  The power storage device 1 includes a series-parallel switching timing control unit 5B, a series-parallel switching switch unit 6, a power storage unit 7, and an output switch unit 8 (output unit). The power storage device 1 may be integrated into one IC as a power storage IC.

  The series-parallel switching timing control unit 5B includes a switching switch control unit 50B, two depletion transistors Tr1 and Tr3, and two Nch transistors (FET: Field effect transistors) Tr2 and Tr4.

  In this configuration, the changeover switch control unit 50B includes an Nch transistor Tr5 and three resistors R3, R4, and R5. The three resistors R3, R4, and R5 are high resistances having high resistance values (high impedance). The transistor Tr5 is a hysteresis generation switch, and a signal indicating the state of the load circuit 3 may be input thereto.

  The series-parallel changeover switch control unit 50B monitors the input voltage Vin, which is a series-parallel changeover voltage, and outputs a control signal S1.

  The serial / parallel switching timing control unit 5B includes two inverters 51B and 52B controlled by the control signal (S1) generated by the serial / parallel switching switch control unit 50B.

  The inverter 51B includes a depletion transistor Tr1 and an Nch transistor Tr2. Control signal φ1 from inverter 51B is taken out at terminal 53.

  The series / parallel changeover switch control unit 50B and the inverter 51B constitute a hysteresis generation circuit H.

  The inverter 52B includes a depletion transistor Tr3 and an Nch transistor Tr4. Control signal φ2 from inverter 52B is taken out at terminal 54.

  The depletion transistors Tr1 and Tr3 function as the constant current sources IC1 and IC2 in FIG. The Nch transistors Tr2 and Tr4 function as the switches Sw4 and Sw5 in FIG.

  The series-parallel switching timing control unit 5B outputs an H level control signal φ1 and an L level control signal φ2 so as to connect a plurality of capacitors C1 and C2 in series during the storage period.

  Then, when the input voltage Vin reaches a predetermined first voltage, an L level control signal φ1 and an H level control signal φ2 are output so that the capacitors C1 and C2 are connected in parallel.

  After that, when the voltage Vin decreases due to power use by the load circuit and becomes smaller than the predetermined second voltage, the H level control signal φ1 and the L level control are performed so that the plurality of capacitors C1 and C2 are connected in series. The signal φ2 is output.

  The series-parallel changeover switch unit 6 is formed by a Pch transistor Tr6, an Nch transistor Tr7, and analog switches Tr8 and Tr9.

  In the series-parallel switching unit 6, the Pch transistor Tr6 corresponds to the switch Sw1 in FIGS. 6 and 7, the Nch transistor Tr7 corresponds to the switch Sw3, and the switch Sw2 is an analog switch including two transistors Tr8 and Tr9. It is configured.

  By configuring the serial-parallel changeover switch unit 6 and the output switch unit 8 with transistors that are analog switches, voltage loss (potential difference) does not occur. As a comparison, if a switch is configured with a diode, a voltage loss occurs. Therefore, in the present invention, the switch can be operated without a potential difference.

  Although not shown in FIG. 1, the power storage device 1 may include an output switch unit 8 that supplies power to the load circuit when connected in parallel. The output switch unit 8 is formed by an analog switch of two transistors Tr10 and Tr11.

  In the power storage device 1 of the present invention, a high resistance or constant current transistor having a high resistance is used, and therefore the series-parallel switching timing control unit 5B has a high impedance (high impedance).

  Therefore, the power storage device 1 can be driven with a current (for example, 60 nA) that is lower than a high-voltage, low-current (for example, 400 V, 6 μA) generated power that is generated from the power generation element.

  Further, in the configuration of FIG. 10, the total impedance of the elements constituting the timing control unit 5 </ b> B, the series-parallel changeover switch unit 6, and the output switch unit 8 can be made higher than the internal impedance of the power generation element 2. As a result, it is possible to suppress the drive power consumption required for the series-parallel switching of the power generation device, and to increase the energy storage efficiency.

  Since the elements constituting the series-parallel changeover switch unit 6 and the output switch unit 8 are configured by MOS transistors, the series-parallel changeover switch unit 6 and the output switch unit 8 are controlled by the series-parallel changeover timing control unit 5B. The power consumed is only the MOS transistor gate drive power when the switch unit is on and off, and the energy storage efficiency can be increased.

  Furthermore, the impedance of power storage device 1 during power storage is higher than the impedance of power storage device 1 during use. Therefore, the power storage device 1 can store power at a high voltage and a low current, and energy storage efficiency can be improved. In use, the output voltage of the power storage device 1 is 3 V, for example, and an electronic device such as a CPU that requires power consumption of several mA can be driven.

  In FIG. 10, the inverters 51B and 52B configured by the depletion transistor and the Nch transistor have a two-stage configuration. However, if a gain is required, the number of stages of similar inverters may be increased.

  In that case, the signal change timings of the control signals φ1 and φ2 of the inverters 51B and 52B are matched with the switch switching timing of the series-parallel switch unit 6.

  Here, FIG. 11 shows a current flow in the power storage device 1 of FIG. In FIG. 11, (a) shows a state when capacitors are connected in series and stored, and (b) shows a state when power is used with capacitors connected in parallel.

  Since the control signal φ1 is input to the gate of the Pch transistor Tr6 constituting the switch Sw1, the control signal φ1 is L, that is, is turned on at the time of discharging.

  Since the control signal φ2 is input to the gate of the Nch transistor Tr7 constituting the switch Sw3, the control signal φ2 is H, that is, is turned on during discharging.

  The control signal φ2 is input to the gate of the Pch transistor Tr8 constituting the switch Sw2, and the control signal φ2 is input to the gate of the Nch transistor Tr9. Therefore, the switch Sw2 is turned on when the control signal φ2 is L and the control signal φ1 is H, that is, during power storage.

  In the switch Sw4 of the output switch unit 8, the control signal φ1 is input to the gate of the Pch transistor Tr10, and the control signal φ2 is input to the gate of the Nch transistor Tr11. Therefore, the switch Sw4 is turned on when the control signal φ1 is L and the control signal φ2 is H, that is, when the output voltage is supplied to the load circuit 3 during discharging.

  A current flows through the switches Sw1, Sw2, and Sw3 included in the series-parallel changeover switch unit 6 and the switch Sw4 of the output switch unit 8 in order to change the switch state only at the time of series-parallel switching. Therefore, current consumption during power storage and use (during discharge) can be reduced.

  FIG. 12 is a diagram illustrating an example of a specific circuit diagram of the power storage system 100 of FIG.

  The rectifier circuit 4 is configured by a diode bridge including four diodes D1, D2, D3, and D4. The rectifier circuit 4 performs full-wave rectification on the AC power output from the power generation element 2.

  The rectified power is stored in a plurality of series-connected capacitors C1 and C2 in the power storage device 1, and when a certain voltage is reached, the power is supplied to the load circuit 3 with the plurality of capacitors C1 and C2 connected in parallel. .

<IC integration>
FIG. 13 is a schematic diagram illustrating a configuration example in which a function linked to a communication module equipped with a microcomputer is added in the power storage system.

  In the present embodiment, the load circuit 3 includes a communication module 31 and a sensor 32.

  In the power storage device 1 </ b> C of FIG. 13, the functions of the series / parallel switching timing control unit 5, the series / parallel switching switch unit 6, and the output switch unit 8 are integrated as a series / parallel switching IC 9.

  In the present embodiment, a function for controlling the serial / parallel switching timing is further added to the serial / parallel switching IC 9 in cooperation with the communication module 31 equipped with the microcomputer.

  In the power storage system 100 </ b> C, power is supplied to the communication module 31 and the sensor 32 by the output voltage Vout of the series-parallel switching IC 9.

When the connection of the capacitors C1 and C2 is in a parallel state, the series-parallel switching IC 9 of the power storage device 1C outputs a signal _SST indicating the parallel state to the microcomputer mounted on the communication module 31, and the communication module 31 Tell that the power supply is possible.

After the system operation of the communication module 31 is completed, at a predetermined timing, the communication module 31 outputs to the serial-parallel switching IC 9 a signal S _END indicating that the voltage is no longer necessary for the microcomputer, and instructs to shift to charging. Then, in the power storage device 1, the capacitors C1 and C2 are switched to the serial connection state to start charging. The signal _SEND is a signal for changing the connection of the capacitors C1 and C2 from parallel to serial by controlling the voltage at the gate of the transistor Tr5 of the serial-parallel switching timing control unit 5B of FIG.

  In the power storage system 100 </ b> C having this configuration, the power storage device 1 </ b> C can improve power storage efficiency by cooperating with the load-side CPU.

  In addition, this system can also use the result of signal processing of the signal from the sensor 32 by a microcomputer mounted on the communication module 31 as an IoT edge terminal through wireless communication means.

<Timing chart>
Next, a connection switching operation in the power storage device will be described with reference to FIG. FIG. 14 is a timing chart regarding the series-parallel switching operation in the power storage device 1.

  As shown in FIG. 12, the power generated by the power generation element 2 is rectified by the rectifier circuit 4 and supplied to the power storage device 1.

  At time T0, the capacitors C1 and C2 are not charged.

  When power rectified from time T1 starts to be supplied to the power storage device 1, the series-parallel switching timing control unit 5B has a high impedance configuration, and thus the circuit is activated by the power output from the power generation element 2 with high impedance. Control signals φ1 and φ2 are generated.

  When the power storage is started, the control signal φ1 becomes HIGH, the control signal φ2 becomes LOW level, the series / parallel changeover switch unit 6 operates, the switches Sw1 and Sw3 are turned OFF, the switch Sw2 is turned ON, and the capacitor C1 of the power storage unit 7 , C2 are connected in series.

When the capacitors C1 and C2 are in series and the input voltage Vin, which is the power from the power generating element 2, reaches 10V (first voltage), the series / parallel changeover switch control unit 50 operates at the timing of T2, and the control signal φ1 Is LOW, and the control signal φ2 is switched to HIGH. In response to this, the series / parallel changeover switch unit 6 operates, the switch Sw2 is turned off, the switches Sw1 and Sw3 are turned on, and the capacitors C1 and C2 of the power storage unit 7 are connected in parallel. When the capacitors C1 and C2 of the power storage unit 7 are switched from the serial connection to the parallel connection, the voltage changes from the state of (Vin = V _C1 + V _C2 ) to the state of (Vin = V _C1 = V _C2 ). The input voltage Vin) is reduced by half (10V⇒5V).

  When the load circuit 3 is driven at the timing of T3, power (output voltage Vout) is supplied to the load circuit 3 and the input voltage Vin also decreases.

  Here, it is assumed that no power is supplied from the power generation element 2 from time T2 to time T4.

  When the input voltage Vin decreases to reach 2V (second voltage), the control signal φ1 becomes HIGH, the control signal φ2 becomes LOW, the switches Sw1 and Sw3 are turned OFF, and the switch Sw2 is turned ON at the timing of T4. The capacitors C1 and C2 of the power storage unit 7 are connected in series, and the electric power from the power generation element 2 is accumulated.

  Thereafter, when the input voltage Vin increases and reaches 10 V (first voltage), the capacitors C1 and C2 are connected in parallel.

  The above operation is continued.

  Here, although the timing of T2 is 10V and the timing of T4 is 2V, any voltage can be set by changing the resistance values of the resistors R3, R4, and R5 of the series / parallel changeover switch control unit 50.

  It is also possible to continue supplying power from the power generation element 2 in a parallel state. In that case, the voltage drop of the input voltage Vin from T3 to T4 may be moderate or increase.

  Next, the operation in the power storage system 100C in cooperation with the communication module in FIG. 13 will be described using the right side in FIG. The operation from T0 to T5 is the same in the configuration of FIG.

At time T6, the serial-parallel switching IC 9 outputs a signal _SST indicating that the communication module 31 is in a parallel state to the microcomputer mounted with the communication module 31 to inform the communication module 31 that power can be supplied. In FIG. 14, during periods T3 to T4 and T6 to T7, the load circuit operation period (discharge period, system operation period) in which the power storage device 1 supplies power to the communication module 31 in synchronization with the communication module 31. ).

After the system operation of the communication module 31 is completed at time T7, at the timing of T8, when the communication module 31 outputs a signal S _END to serial-parallel switching IC 9, the charging switches the capacitors C1, C2 in series connection state Let it begin.

When the power storage device 1 operates in cooperation with the communication module 31, the power supply is stopped during the discharge period when the voltage drops to 2 V or the signal S _END is output, whichever comes first. In FIG. 14, since the signal S _END is output before the voltage drops to 2V, the power supply is stopped at that time, and the connection state of the capacitors C1 and C2 is switched in series to shift to the power storage operation. .

<Storage energy>
Here, the energy stored in the capacitor will be described.

  The energy W (J) that can be stored in the capacitor can be expressed by the following equation.

また、コンデンサをｎ個、直列接続すると、容量(Csn)は、

When n capacitors are connected in series, the capacitance (Csn) is

コンデンサをｎ個、並列接続すると、容量(Cpn)は、

When n capacitors are connected in parallel, the capacitance (Cpn) is

コンデンサｎ個直列接続で蓄電できるエネルギー（Ws）は、

The energy (Ws) that can be stored by connecting n capacitors in series is

コンデンサｎ個並列接続で蓄電できるエネルギー（Wp）は、

The energy (Wp) that can be stored by connecting n capacitors in parallel is

例えば具体的に、n=2、C=1(μF)、V=5（V）とすると
コンデンサ２個直列接続で蓄電できるエネルギー（Ws）は、

For example, when n = 2, C = 1 (μF), and V = 5 (V), the energy (Ws) that can be stored by connecting two capacitors in series is

コンデンサ２個並列接続で蓄電できるエネルギー（Wp）は、

The energy (Wp) that can be stored by connecting two capacitors in parallel is

As described above, Ws = Wp, and the same amount of energy can be stored in the capacitor regardless of whether n capacitors with the same capacity are stored in series or in parallel.
In order to store n capacitors in series, it is necessary to store in a state of high voltage n × V (V). On the other hand, the stored energy is required to be supplied to an electronic device that drives a CPU or connects a sensor or the like in a system such as the Internet of Things (IoT). These devices are required to be driven with about 1 to 3 lithium batteries, that is, with a voltage of about 3 to 10 V and a current of about several μA to several mA.

  Here, n capacitors with the same capacity C are stored in a high impedance state connected in series, and the capacitors are switched from a series connection to a parallel connection, so that the energy stored in the capacitor is maintained at a low voltage. IoT systems can be driven in a low impedance state.

  When the resistance on the circuit is R, the impedance (Z) is defined by the following equation.

コンデンサをｎ個直列にした場合の回路のインピーダンス（Zsn）は、（式２）で示したようにCsn＝C/nとなるので、下記（式９）のように示される。

The impedance (Zsn) of the circuit when n capacitors are connected in series is Csn = C / n as shown in (Expression 2), and is expressed as (Expression 9) below.

コンデンサをｎ個並列にした場合の回路のインピーダンス（Zpn）は、（式３）で示したようにCpn＝n×Cとなるので、下記（式１０）のように示される。

The impedance (Zpn) of the circuit when n capacitors are arranged in parallel is expressed as (Equation 10) below because Cpn = n × C as shown in (Equation 3).

となる。ここで、回路上に付く抵抗Rを小さくすると、直列時のインピーダンスZsn（式９）が高く、並列時のインピーダンスZpn（式１０）が低いことがわかる。

It becomes. Here, it can be seen that when the resistance R on the circuit is reduced, the impedance Zsn (Equation 9) at the time of series is high and the impedance Zpn (Equation 10) at the time of parallel is low.

  As described above, by switching the capacitors in series and parallel, when storing energy, (Equation 4) and (Equation 9) are stored with high impedance at high voltage n × V (V), and when energy is supplied (equation It can be seen from 5) and (Equation 10) that power can be efficiently supplied to the system equipment at a low voltage V (V).

  In power generation by electrostatic induction of a piezoelectric element or power generation rubber, a high voltage of several tens to several hundreds of volts is generated. Further, the output current is a low current in a unit of nA to μA, and can be regarded as a low current power source having a high output impedance. Therefore, a circuit that converts energy stored in a capacitor at a high voltage by a piezoelectric element or electrostatic induction into energy supplied to a system that is driven by a current of about several μA to several mA at a voltage of about 3 to 10 V with high efficiency. Is required.

  Here, as a comparative example, FIG. 15 shows a state in which the capacitance of the capacitor is fixed, and FIG. 16 shows a state in which the capacitance of the capacitor is switched in series and in parallel as in the present invention.

  Specifically, FIG. 15A shows a circuit diagram in which the capacitance of the capacitor is fixed, and FIG. 15B shows the storage current and storage voltage in the state of FIG. 15A, between the capacitor terminals at the time of discharge. It is a figure which shows transition of a voltage.

  FIG. 15 shows an example in which one capacitor having a capacity of 0.25 μF (microfarad) is used and operated at a capacity of 0.25 μF both during charging and discharging.

  In general, the drive voltage of the CPU operation, sensor drive, and wireless transmission IC is about 2 to 5V. As shown in FIG. 15 (b), in this configuration example, since the capacity stored in the capacitor at the time of discharging is small, the voltage value drops rapidly, and the time during which the voltage value is in the range of 2 to 4.5V is 20 ms. Therefore, power can be used only for 20 ms.

  On the other hand, FIG. 16A shows a circuit diagram for switching between series and parallel capacitors, and FIG. 16B shows the storage current and storage voltage in the state of FIG. The figure which shows transition of an inter-voltage is shown.

  FIG. 16 shows an example in which two capacitors having a capacity of 0.5 μF are used to operate in a series state at the time of charging and operate at a capacity of 0.25 μF and operate in a parallel state at the time of discharging to operate at a capacity of 1.0 μF. Yes.

  As shown in FIG. 16B, in this configuration example, the capacitor is switched from series connection to parallel connection at the time of discharging, so that the voltage value is halved at the time of switching. Thereafter, discharging using a capacitor having a large capacity is performed. As a result, the voltage value gradually drops. Therefore, the time during which the voltage value is in the range of 2 to 4.5 V is 84 ms. Compared with FIG. 15 (b), the capacity of the capacitor at the time of charging is the same, but by switching in FIG. 16, the time in which power can be used at the time of discharging increases more than four times.

  As shown in FIG. 16, in the power storage system of the present invention, energy is stored by impedance matching with high voltage and high impedance during power storage by switching between series connection and parallel connection of capacitors. On the other hand, at the time of discharging, energy can be supplied by matching the impedance with a low impedance at a necessary voltage for an IoT system or the like.

<Example of providing many capacitors in the power storage device>
Although the above demonstrated the structure which contains two capacitors in the electrical storage apparatus 1, the number of several capacitors is not restricted to two. FIG. 17 is a diagram illustrating an embodiment of a circuit in which four capacitors are connected in series.

  FIG. 17 is an internal block diagram of the 4-series / parallel switching IC 90.

  The series-parallel changeover switch unit 60 corresponds to the series-parallel changeover switch unit 6 of FIG. 10 and includes switch groups 61, 62, and 63. The switch groups 61 and 63 are turned on when the capacitors C1, C2, C3, and C4 are connected in parallel, and are turned off when they are connected in series. The switch group 62 is turned on when the capacitors C1, C2, C3, and C4 are connected in series, and turned off when the capacitors C1 and C2 are connected in parallel.

  The switch 80 corresponds to the output switch unit 8.

  The series-parallel switching timing control unit 5D is the same as the two capacitor switching series-parallel switching timing control unit 5B of FIG. 10, but when cascode connection and multi-stage series connection of capacitors as shown in FIG. A switching circuit 55 for switching between the master side and the slave side is mounted.

  FIG. 18 is a diagram for explaining an embodiment of a capacitor multistage connection circuit.

  In FIG. 18, the capacitor multi-stage connection circuit 90 </ b> E includes a four series / parallel switching master IC 91 and four series / parallel switching slave ICs 92, 93, 94, and 95.

  17 is mounted on the master IC 91 so that the four ICs 92, 93, 94, and 95 can be cascode-connected as slave ICs, and each output voltage Vout output is switched in four series-parallel. It can be connected to the master IC 91 and multistage connection is possible.

  In this way, when multistage connection is performed, cascode connection is controlled in a multistage connection by a master-slave system. By connecting in this way, it is possible to connect more stages of capacitors and further increase the efficiency.

  In the above embodiment, the power storage device of the present invention can detect the switching voltage at a high voltage and a low current, and can operate at a high voltage and a low current to switch the series-parallel connection and store the power with high efficiency. It is.

  In the above embodiment, the series-parallel switching timing control unit 5 includes the hysteresis generation circuit H to provide hysteresis for the control signal φ1, but the series-parallel switching timing control unit 5 provides hysteresis. As long as it can be provided, the hysteresis generation circuit may exist in addition to the series-parallel switching timing control unit 5.

  The preferred embodiment of the present invention has been described in detail above, but the present invention is not limited to the specific embodiment, and within the scope of the gist of the embodiment of the present invention described in the claims, Various modifications and changes are possible.

1, 1C power storage device 2 power generation element 3 load circuit 4 rectifier circuit (rectifier unit)
5,5D Series-parallel switching timing controller (timing controller)
6, 60 Series-parallel switching unit 7 Power storage unit 8 Output switch unit (output unit)
9, 90, 90E Series-parallel switching IC
31 Communication Module 32 Sensor 50 Series / Parallel Switching Control Unit (Voltage Monitor Circuit)
51, 52 Inverter 61, 62, 63 Switch group 91 Master IC
92, 93, 94, 95 Slave IC
100 Power storage system C1, C2, C3, C4 Capacitor (power storage device)
H hysteresis generating circuit Tr1, Tr3 depletion transistor Tr2, Tr4 Nch transistor

JP 2013-236506 A

Claims (18)

A power storage device connected to a power generation element and a load circuit,
A power storage unit having a plurality of power storage devices;
A timing control unit that controls to switch the series-parallel of the plurality of power storage devices;
Controlled by the timing control unit, and having a series-parallel changeover switch unit for switching series-parallel of the plurality of power storage devices,
The timing controller is provided with hysteresis to control switching timing. The power storage device according to claim 1, wherein the timing control unit includes a hysteresis generation circuit to provide the hysteresis. The power storage device according to claim 2, wherein the hysteresis generation circuit includes a resistor, an inverter, and a transistor. The power storage device according to claim 3, wherein the inverter includes a series circuit of a resistor and an N-channel transistor. The power storage device according to claim 3, wherein the inverter includes a series circuit of a depletion transistor and an N-channel transistor. The power storage device according to any one of claims 1 to 5, wherein the serial-parallel changeover switch unit includes an analog switch. The power storage device has an output unit that outputs an output voltage to the load circuit,
The electrical storage according to any one of claims 1 to 6, wherein a sum of impedances of the timing control unit, the series-parallel changeover switch unit, and the output unit is equal to or greater than an internal impedance of the power generation element. apparatus. The timing control unit includes a voltage monitor circuit that monitors an input voltage to the power storage device,
When the timing control unit controls the series-parallel changeover switch unit, the plurality of power storage devices are connected in series during a power storage operation, and the monitored input voltage reaches a first voltage. In parallel,
8. The plurality of power storage devices are connected in series when the monitored input voltage reaches a second voltage lower than the first voltage during a discharge operation. The power storage device according to one item. The power storage device according to any one of claims 1 to 8,
A power generating element for generating electric power;
A rectifier connected to the power generation element;
The power storage device connected to the subsequent stage of the rectifying unit;
And a load circuit. The power storage system according to claim 9, wherein a signal is transmitted from the load circuit to the power storage device. The power storage system according to claim 10, wherein the signal is a signal that changes a voltage with respect to an input of the hysteresis of the timing control unit. The power storage system according to any one of claims 9 to 11, wherein the plurality of power storage devices are operated at a high voltage by cascode connection. The power storage system according to claim 12, wherein the cascode connection can be controlled in a multistage connection by a master-slave method. 14. The power storage system according to claim 9, wherein the power generation amount by the power generation element is a power generation voltage of 10 V to 1000 V, and a power generation current is 50 nA to 100 μA. The power storage system according to any one of claims 9 to 14, wherein the power generation element is a power generation element that generates power by friction due to deformation and vibration. The power storage system according to any one of claims 9 to 14, wherein the power generation element is a power generation rubber that generates power by deformation and vibration. The power generation system according to any one of claims 9 to 14, wherein the power generation element is a power generation element that generates power by pressure due to deformation and vibration. The power storage system according to any one of claims 9 to 14, wherein the power generation element is a power generation element that generates power by electrostatic induction caused by deformation and vibration.

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