JP2019161310A - Image quality improvement device, display device, and image quality improvement method - Google Patents

Abstract

To simplify a configuration with respect to image quality improvement processing.SOLUTION: An image quality improvement device of an aspect of the invention comprises: a resolution conversion unit for converting a first image signal to a second image signal having resolution differing from that of the first image signal; a two-dimensional low-pass filter that includes a dependently connected plurality of delay elements, coefficient multipliers, and adders to which a brightness signal of the second image signal is input and a selection unit for selecting either of a signal passing through the delay elements, coefficient multipliers, and adders or a signal passing through the plurality of delay elements only depending on a switching signal and outputs the brightness signal and either of the brightness signal and a result of extracting low range components in the vertical and horizontal directions of the brightness signal of the second image signal; a brightness signal subtractor for subtracting output of the two-dimensional low-pass filter from the brightness signal; a brightness signal adder for adding a result of the subtraction to the brightness signal; and a switching signal generation unit that depending on an aspect ratio of the first image signal and resolution of an output image, generates and outputs the switching signal.SELECTED DRAWING: Figure 12

Description

  The present invention relates to an image quality improvement device, a display device, and an image quality improvement method.

  In a projection image display apparatus (hereinafter referred to as “projector”), when the resolution of an input image signal and the resolution of an output image are different, for example, the following resolution conversion processing is performed. Here, as an example, an input image signal is an FHD (Full High Definition) signal (aspect ratio 16: 9, horizontal resolution 1920 pixels, vertical resolution 1080 Line), or WUXGA (Wide Ultra extended Graphics Array) signal (aspect ratio). A case where an image signal to be projected (output) is an XGA signal (aspect ratio 4: 3, horizontal resolution 1024 pixels, vertical resolution 768 Line) at 16:10, horizontal resolution 1920 pixels, and vertical resolution 1200 Line) will be described. In this case, the projector displays the image by downscaling (reducing) the resolution in the resolution conversion unit in the projector, but there is a case where the image is reduced and displayed while maintaining the aspect ratio of the input image signal. . In the case of reduced display, for example, as shown in FIG. 13, in the output image 2, black signals are displayed on the upper and lower portions of an image corresponding to the input image signal (hereinafter referred to as “image signal input display unit”) I1. The pixel portion (hereinafter referred to as “black display pixel portion”) I2 is adjacent. Here, FIG. 13 is a schematic diagram illustrating a display example of the output image 2 of the projector.

  As shown in FIG. 13, when the black display pixel portion I2 is adjacent to the upper and lower portions of the image signal input display portion I1, flare occurs at the boundary between the image signal input display portion I1 and the black display pixel portion I2, and the image quality is reduced. It is known to decrease (Patent Document 1). Flare is a phenomenon in which light in a bright place leaks into a dark place due to reflection or scattering of light on a lens such as a projection tube or a projection surface, and an edge portion having a large luminance difference is blurred. In Patent Document 1, in order to prevent occurrence of flare, a two-dimensional low-pass filter that extracts low-frequency components in the vertical direction and horizontal direction of a luminance signal obtained from an image signal is used to make the edge portion of the luminance signal stand out. An image quality improvement circuit that performs correction processing (applying sharpness to an input image signal) is shown. Such an image quality improvement circuit is also called a sharpness circuit, a contrast improvement circuit, or the like. The two-dimensional low-pass filter described in Patent Document 1 is configured by cascade-connecting an FIR (Finite Impulse Response) filter and an IIR (Infinite Impulse Response) filter.

  By the way, when the image quality improvement circuit described in Patent Document 1 is arranged at the subsequent stage of the resolution conversion unit, the following problems occur. That is, the image quality improvement circuit described in Patent Document 1 corresponds to the high frequency component of the luminance signal by subtracting the vertical and horizontal low frequency components of the luminance signal extracted by the two-dimensional low-pass filter from the luminance signal. An edge signal is generated. The image quality improvement circuit corrects the luminance signal by adding the generated edge signal to the luminance signal. When this edge signal addition processing is performed continuously across the boundary portion of the luminance difference, for example, in the vicinity of the boundary line between the black display pixel portion I2 and the image signal input display portion I1 surrounded by a chain line as shown in FIG. However, the edge signal is emphasized and superimposed. Here, FIG. 14 is a schematic diagram showing a display example of the output image 2 of the projector as in FIG. In the example shown in FIG. 14, on the other hand, the luminance of the black display pixel portion I2 changes suddenly from light to dark toward the boundary near the boundary, while the luminance of the image signal input display I1 is near the boundary. It changes rapidly from light gray to white toward the boundary. On the other hand, in the image quality improvement circuit described in Patent Document 1, this problem is solved by performing the following processing. That is, in the image quality improvement circuit described in Patent Document 1, the FIR filter and the IIR filter constituting the two-dimensional low-pass filter have the start value of the image signal input display unit I1 at the start timing of the image signal input display unit I1. Set for each delay element. In this image quality improvement circuit, the black display pixel unit I2 does not update the value of each delay element, but holds the end value of the image signal input display unit I1. As described above, in the image quality improvement circuit described in Patent Document 1, the start value and the end value of the image signal input display unit I1 are forcibly set in each delay element constituting the two-dimensional low-pass filter. The edge signal is prevented from being emphasized and superimposed in the vicinity of the boundary line.

JP 2002-290772 A

  As described above, when the black display pixel portion I2 is adjacent to, for example, the upper portion and the lower portion of the image signal input display portion I1 corresponding to the input image signal, the image quality improvement circuit described in Patent Document 1 is two-dimensional. For example, a process of setting a starting value of the image signal input display unit I1 is performed on each delay element included in the FIR filter and the IIR filter constituting the low-pass filter. Therefore, a configuration for setting an arbitrary value to each delay element is required, and there is a problem that the configuration becomes complicated.

  SUMMARY An advantage of some aspects of the invention is that it provides an image quality improvement apparatus, a display apparatus, and an image quality improvement method capable of simplifying a configuration related to an image quality improvement process.

  In order to solve the above problems, according to one aspect of the present invention, a resolution conversion unit that converts the resolution of an input first image signal into a different resolution and outputs the second image signal, and a luminance signal of the second image signal A plurality of subordinately connected delay elements, a plurality of coefficient units for inputting inputs or outputs of the plurality of delay elements, a plurality of adders for adding outputs of the plurality of coefficient units, and a switching signal In response, either one of the signals via the plurality of delay elements, the plurality of coefficient units, and the plurality of adders, or the signal that does not pass through the coefficient units and the adder and passes through the plurality of delay elements. A selection unit for selecting and outputting, either one of the extraction result of the low-frequency component in the vertical and horizontal directions of the luminance signal output from the selection unit or the luminance signal, the coefficient unit, and the adder Multiple before without going through A two-dimensional low-pass filter that outputs the luminance signal via a delay element; a luminance signal subtracter that subtracts the output of the selection unit from the luminance signal output from the two-dimensional low-pass filter; and the luminance signal subtractor subtracts A luminance signal adder for adding the result to the luminance signal output by the two-dimensional low-pass filter, and an output image for generating a third image signal representing an output image based on the outputs of the second image signal and the luminance signal adder An image quality improvement apparatus comprising: a signal generation unit; and a switching signal generation unit that generates and outputs the switching signal according to an aspect ratio of the first image signal and a resolution of the output image.

  According to another aspect of the present invention, a resolution conversion unit that converts the resolution of the input first image signal to a different resolution and outputs the second image signal, and a slave connection that inputs a luminance signal of the second image signal A plurality of delay elements, a plurality of coefficient units for inputting inputs or outputs of the plurality of delay elements, a plurality of adders for adding outputs of the plurality of coefficient units, and a plurality of the plurality of adders according to a switching signal Select and output one of a signal that has passed through a delay element, a plurality of coefficient units, and a plurality of adders, or a signal that has passed through a plurality of delay elements without passing through the coefficient unit and the adder A plurality of selection results of the low-frequency component in the vertical and horizontal directions of the luminance signal output by the selection unit or the luminance signal, and a plurality of values without passing through the coefficient unit and the adder. Via the delay element A two-dimensional low-pass filter that outputs the luminance signal; a luminance signal subtracter that subtracts the output of the selection unit from the luminance signal output from the two-dimensional low-pass filter; A luminance signal adder to be added to the luminance signal output by the three-dimensional low-pass filter, an output image signal generation unit that generates a third image signal representing an output image based on outputs of the second image signal and the luminance signal adder, A switching signal generation unit configured to generate and output the switching signal according to an aspect ratio of the first image signal and a resolution of the output image; and a display unit configured to display the output image based on the third image signal. It is a display device.

  According to another aspect of the present invention, a resolution conversion unit that converts the resolution of the input first image signal to a different resolution and outputs the second image signal, and a slave connection that inputs a luminance signal of the second image signal A plurality of delay elements, a plurality of coefficient units for inputting inputs or outputs of the plurality of delay elements, a plurality of adders for adding outputs of the plurality of coefficient units, and a plurality of the plurality of adders according to a switching signal Select and output one of a signal that has passed through a delay element, a plurality of coefficient units, and a plurality of adders, or a signal that has passed through a plurality of delay elements without passing through the coefficient unit and the adder A plurality of selection results of the low-frequency component in the vertical and horizontal directions of the luminance signal output by the selection unit or the luminance signal, and a plurality of values without passing through the coefficient unit and the adder. Via the delay element A two-dimensional low-pass filter that outputs the luminance signal; a luminance signal subtracter that subtracts the output of the selection unit from the luminance signal output from the two-dimensional low-pass filter; A luminance signal adder to be added to the luminance signal output by the three-dimensional low-pass filter, an output image signal generation unit that generates a third image signal representing an output image based on outputs of the second image signal and the luminance signal adder, A switching signal generation unit that generates and outputs the switching signal according to the aspect ratio of the first image signal and the resolution of the output image, and improves the image quality of the second image signal to improve the third image signal. Is an image quality improvement method for generating the image.

  According to each aspect of the present invention, the configuration related to the image quality improvement processing can be simplified.

It is a block diagram which shows the structural example of the projector which concerns on one Embodiment of this invention. It is a figure which shows the example of the aspect-ratio information signal shown in FIG. FIG. 2 is a block diagram illustrating a configuration example of a delay processing unit 320, a correction area setting unit 330, and a correction setting holding unit 340 illustrated in FIG. FIG. 2 is a block diagram illustrating a configuration example of an image quality improvement circuit unit 350 illustrated in FIG. 1. FIG. 5 is a block diagram illustrating a configuration example of a two-dimensional low-pass filter 3531 illustrated in FIG. FIG. 6 is a circuit diagram illustrating a configuration example of the vertical low-pass filter 71 illustrated in FIG. 5. FIG. 6 is a circuit diagram illustrating a configuration example of a horizontal low-pass filter 72 illustrated in FIG. 5. FIG. 6 is a circuit diagram illustrating a configuration example of a delay circuit 73 illustrated in FIG. 5. 3 is a timing chart illustrating an operation example of the projector 1 illustrated in FIG. 1. 3 is a timing chart illustrating an operation example of the projector 1 illustrated in FIG. 1. It is a figure which shows the operation example of the projector 1 shown in FIG. It is a block diagram which shows the basic structural example which concerns on one Embodiment of this invention. It is a schematic diagram which shows an example of an output image. It is a schematic diagram which shows an example of an output image.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a configuration diagram illustrating a configuration example of a projector 1 according to an embodiment of the present invention. A projector 1 shown in FIG. 1 includes a video input unit 10, a resolution conversion unit 20, a signal processing unit 30, an LCD (Liquid Crystal Display) driving unit 40, a CPU (Central Processing Unit) 50, and a CPU system bus 60. Is provided. The projector 1 inputs an image signal output from an external image signal output device (not shown) as an image signal (1), and outputs an output image in which, for example, the resolution is converted to a predetermined value based on the image signal (1). Output from the LCD driver 40. The LCD drive unit 40 includes, for example, a light source, an LCD panel, and an optical system. The LCD driving unit 40 inputs an image signal (3) obtained by performing a predetermined image quality improvement process on the image signal (2) obtained by converting the resolution of the image signal (1). Then, the LCD drive unit 40 changes the transmittance for each pixel on the LCD panel according to the image signal (3), transmits the light emitted from the light source to the LCD panel, and passes it to an external screen or the like via the optical system. Project the output image.

  The video input unit 10 includes a signal determination unit 110. The video input unit 10 inputs an image signal (1) from the outside, and supplies the input image signal (1) to the resolution conversion unit 20. As shown in FIG. 9, the signal discriminating unit 110 discriminates signals for each period of the vertical synchronization signal of the image signal (1), detects the aspect ratio of the input image signal (1), and detects the detected result. The signal is output to the signal processing unit 30 as an aspect ratio information signal. The signal determination unit 110 may determine the resolution of the image signal (1) and output a signal indicating the determined resolution to the CPU 50 or the like.

  FIG. 9 is a timing chart showing an operation example of the projector 1 shown in FIG. FIG. 9 shows, in order from the top, the vertical synchronization signal of the image signal (1) (and the image signal (2)), the image signal (1), the signal determination timing of the signal determination unit 110, and the image signal (2). . FIG. 9 shows the output timing of the aspect ratio information signal from the signal determination unit 110 and the output of the aspect ratio information signal (after delay processing) from the delay processing unit 320 in order from the top under the image signal (2). Indicates timing. The example illustrated in FIG. 9 illustrates an example in which an image based on the image signal (1) is changed from an image having an aspect ratio of “4: 3” to an image having an aspect ratio of “16: 9”.

  FIG. 2 shows an example of the aspect ratio information signal output from the signal determination unit 110. In the example shown in FIG. 2, when the aspect ratio of the input image signal (1) is “4: 3”, the aspect ratio information signal is “00” (binary number). When the aspect ratio of the input image signal (1) is “16: 9”, the aspect ratio information signal is “01” (binary number). When the aspect ratio of the input image signal is “16:10”, the aspect ratio information signal is “10” (binary number). When the aspect ratio of the input image signal is other than the above, the aspect ratio information signal is “11” (binary number). In the example shown in FIG. 2, the aspect ratio information signal can be a 2-bit signal.

  The resolution conversion unit 20 receives the image signal (1) output from the video input unit 10, converts the resolution of the image signal (1) into the resolution of the output image output from the LCD drive unit 40, and outputs the image signal (2 ). Note that the vertical synchronization signal of the image signal (2) is synchronized with the vertical synchronization signal of the image signal (1). In the present embodiment, as shown in FIG. 9, the resolution conversion unit 20 delays the input image signal (1) by several frames, converts it into an image signal (2) having a different resolution, and outputs it. Hereinafter, in the projector 1, the input image signal (1) is an FHD signal (resolution 1920 × 1080 and an aspect ratio of 16: 9), and output images (image signal (2) and image signal (3)) are XGA signals. A case where the resolution is 1024 × 768 and the aspect ratio is 4: 3 will be described as an example.

  The signal processing unit 30 includes a delay processing unit 320, a correction area setting unit 330, a correction setting holding unit 340, and an image quality improvement circuit unit 350. The signal processing unit 30 receives the image signal (2) output from the resolution conversion unit 20, performs a correction process that makes the image sharper in the image quality improvement circuit unit 350, and then outputs the image signal (3).

  Here, with reference to FIG. 3, a configuration example of the delay processing unit 320, the correction region setting unit 330, and the correction setting holding unit 340 illustrated in FIG. 1 will be described. FIG. 3 is a block diagram illustrating a configuration example of the delay processing unit 320, the correction area setting unit 330, and the correction setting holding unit 340 illustrated in FIG. The delay processing unit 320 illustrated in FIG. 3 includes a vertical delay unit 321. The delay processing unit 320 receives the DE signal (data enable signal) included in the image signal (2) (or extracted from the image signal (2)) and the vertical synchronization signal, and the aspect output by the signal determination unit 110. Input a ratio information signal. The delay processing unit 320 outputs the input DE signal and the vertical synchronization signal as they are to the correction area setting unit 330, and delays the input aspect ratio information signal by several frames to correct it as an aspect ratio information signal (after delay processing). The data is output to the area setting unit 330. Here, the DE signal is a signal that becomes active during a period in which the image signal (2) (or the image signal (1)) includes valid image data and becomes inactive during a period that does not include valid image data. In this embodiment, the DE signal becomes active during a period in which the image signal (2) includes a pixel value corresponding to the display area of the LCD panel included in the LCD driving unit 40. The DE signal is active only for a certain period among the period from each horizontal synchronizing signal to the next horizontal synchronizing signal. Therefore, as shown in FIG. 10, when the DE signal is counted starting from the vertical synchronization signal, the count value is a value representing the number of horizontal lines. FIG. 10 is a timing chart showing an operation example of the projector 1 shown in FIG. FIG. 10 shows, in order from the top, the vertical synchronization signal of the image signal (2), the DE signal, the count value of the counter 333 (the count value of the DE signal), the LPF (Low Pass Filter) switching signal, and FIG. The output (signal LPF) of the two-dimensional low-pass filter 3531 is shown.

  The vertical delay unit 321 receives the vertical synchronization signal of the image signal (2) and the aspect ratio information signal output from the signal determination unit 110, and inputs the aspect of the image signal (2) corresponding to several frames based on the vertical synchronization signal. The ratio information signal is delayed and output as an aspect ratio information signal (after delay processing). The vertical delay unit 321 sets a delay time (the number of delay frames) based on the aspect ratio vertical delay setting output from the correction setting holding unit 340. For example, as shown in FIG. 9, the delay time in the vertical delay device 321 is set so as to correspond to the time required for the resolution conversion processing in the resolution conversion unit 20. That is, the delay processing unit 320 performs delay adjustment for matching the aspect ratio information signal sent from the signal determination unit 110 with the output timing of the image signal (2) from the resolution conversion unit 20. In the example shown in FIG. 9, the aspect ratio of the image signal (2) is “4: delayed by several frames from the timing at which the aspect ratio of the image signal (1) has changed from“ 4: 3 ”to“ 16: 9 ”. 3 ”to“ 16: 9 ”. In this case, in the vertical delay device 321, the value of the aspect ratio information signal (after delay processing) is synchronized with the timing at which the aspect ratio of the image signal (2) changes from “4: 3” to “16: 9”. The delay time is set so as to change from “4: 3” to “16: 9”.

  On the other hand, the correction area setting unit 330 includes a falling edge detection unit 331, a rising edge detection unit 332, a counter 333, a correction start position calculation unit 334, a correction end position calculation unit 335, and a comparison circuit 336. The correction area setting unit 330 receives the DE signal, the vertical synchronization signal, and the aspect ratio information signal (after delay processing) output from the delay processing unit 320, and outputs the image resolution setting and aspect ratio output from the correction setting holding unit 340. The switch valid setting is input and the LPF switching signal is output. Here, the output image resolution setting is information indicating the resolution of the output image output by the LCD drive unit 40. The resolution of the output image output by the LCD drive unit 40 is the same as the resolution of the image signal (2) and the resolution of the image signal (3). As described above, in this description, the horizontal resolution is “1024”. The vertical resolution is “768”. The aspect ratio switching valid setting is information for setting whether or not to switch the content of the image quality improvement processing for each predetermined range (or for each predetermined area) in the screen. When the aspect ratio switching valid setting is “valid”, the range of correction processing (image quality improvement processing) in the image quality improvement circuit unit 350 is limited. When “invalid”, the range is not limited and the entire area of the screen is not limited. Correction processing is performed. The LPF switching signal is a signal for switching the output of the two-dimensional low-pass filter 3531 shown in FIG. 4 included in the image quality improvement circuit unit 350. When the LPF switching signal is active (“1” (High)) as the signal LPF, the two-dimensional low-pass filter 3531 shown in FIG. 4 outputs the low frequency component of the luminance signal YIN that is the input signal, and the LPF switching signal When inactive (“0” (Low)), a luminance signal YIN that is an input signal is output.

  The falling edge detection unit 331 detects the position where the DE signal changes from the active state to the inactive state, and outputs a pulse-like signal that is active for a certain period to the count terminal of the counter 333 when the changing position is detected. To do. The rising edge detector 332 detects the position where the vertical synchronization signal changes from the inactive state to the active state, and outputs a pulse-like signal that is active for a certain period to the reset terminal of the counter 333 when the changing position is detected. To do. The counter 333 is a 10-bit counter that can count from “0” to “1023”. The counter 333 clears the count value at the timing when the rising edge detection unit 332 detects the change of the vertical synchronization signal from inactive to active. Further, the counter 333 increments the count value by 1 (“+1”) at each timing when the falling edge detection unit 331 detects the change of the DE signal from active to inactive. The counter 333 outputs a signal indicating the count value to the comparison circuit 336. An example of the operation of the counter 333 is shown in FIG.

  The correction start position calculation unit 334 determines the correction start position according to the aspect ratio information signal (after delay processing) input from the delay processing unit 320 and the output image resolution setting and aspect ratio switching valid setting input from the correction setting holding unit 340. calculate. The correction end position calculation unit 335 also includes the aspect ratio information signal (after delay processing) input from the delay processing unit 320 and the output image resolution setting input from the correction setting holding unit 340 and the correction calculated by the correction start position calculation unit 334. A correction end position is calculated according to the start position. For example, the correction start position calculation unit 334 and the correction end position calculation unit 335 calculate the correction start position and the correction end position as follows.

  When the aspect ratio switching valid setting is “valid”, the correction start position calculation unit 334 calculates the correction start position by the following equation. That is, the correction start position calculation unit 334 calculates the correction start position using the expression “correction start position = (output image vertical resolution−number of lines of the image signal input display unit I1 in the output image) / 2”. When the aspect ratio switching valid setting is “valid”, the correction end position calculation unit 335 calculates the correction end position using the expression “correction end position = output image vertical resolution−correction start position”. Here, the number of lines of the image signal input display unit I1 is the number of lines of the image signal input display unit I1 described with reference to FIG. 13, and the image signal input to the horizontal resolution of the output image 2 shown in FIG. It is calculated by multiplying the reciprocal of the aspect ratio value (= previous term / rear term) in (1).

  When the horizontal resolution is set to “1024” and the vertical resolution is set to “768” as the output image resolution settings in the correction setting holding unit 340, and the aspect ratio of the input image signal (1) is “16: 9” The correction start position is calculated as follows. That is, in this case, the correction start position is calculated as correction start position = (768−1024 ÷ 16 × 9) ÷ 2 = 96. The correction end position is calculated as correction end position = 768−96 = 672.

  On the other hand, when the aspect ratio switching valid setting is “invalid”, the correction start position calculation unit 334 sets the correction start position to “0”. When the aspect ratio switching valid setting is “invalid”, the correction end position calculation unit 335 sets the correction end position as the output image vertical resolution (= 768).

  The comparison circuit 336 compares the 10-bit count value output from the counter 333 with the correction start position and correction end position output from the correction start position calculation unit 334 and the correction end position calculation unit 335, and generates an LPF switching signal. The comparison circuit 336 makes the LPF switching signal active (“1” (High)) when the count value of the counter 333 is equal to the correction start position output by the correction start position calculation unit 334, and the count value of the counter 333 is corrected. When it is equal to the correction end position output by the position calculation unit 335, it is inactive (“0” (Low)). When the correction start position is “96” and the correction end position is “672”, the LPF switching signal is changed from “0” to “1” when the count value of the counter 333 becomes “96” as shown in FIG. When the count value of the counter 333 changes to “672”, the LPF switching signal changes from “1” to “0”.

  With the above configuration, the correction region setting unit 330 becomes inactive in, for example, the black display pixel unit I2 illustrated in FIG. 13 in synchronization with the output timing of the image signal (2) from the resolution conversion unit 20, and the image signal input An LPF switching signal that is active on the display unit I1 is output.

  The CPU 50 shown in FIG. 1 transmits and receives predetermined control signals to and from the video input unit 10, the resolution conversion unit 20, the signal processing unit 30, the LCD drive unit 40, and the like via the CPU system bus 60. Control. For example, the CPU 50 stores the output image resolution setting, the aspect ratio switching valid setting, and the aspect ratio vertical delay setting in the correction setting holding unit 340 via the CPU system bus 60. The correction setting holding unit 340 holds an output image resolution setting (horizontal resolution and vertical resolution of the output image), an aspect ratio switching valid setting, and an aspect ratio vertical delay setting.

  Next, the image quality improvement circuit unit 350 shown in FIG. 1 will be described with reference to FIGS. FIG. 4 is a block diagram illustrating a configuration example of the image quality improvement circuit unit 350 illustrated in FIG. FIG. 5 is a block diagram showing a configuration example of the two-dimensional low-pass filter 3531 shown in FIG. FIG. 6 is a circuit diagram showing a configuration example of the vertical low-pass filter 71 shown in FIG. FIG. 7 is a circuit diagram showing a configuration example of the horizontal low-pass filter 72 shown in FIG. FIG. 8 is a circuit diagram showing a configuration example of the delay circuit 73 shown in FIG.

  The image quality improvement circuit unit 350 illustrated in FIG. 4 includes a luminance signal separation unit 351, a luminance signal synthesis unit 352, an image quality improvement unit 353, and a delay circuit 354. The delay circuit 354 receives the image signal (2) output from the resolution converter 20 and holds and delays the image signal (3) for a predetermined time longer than the processing time for the luminance signal YIN in the image quality improvement unit 353. To the LCD drive unit 40. The luminance signal separation unit 351 separates (or extracts) the luminance signal YIN from the image signal (2) held by the delay circuit 354 and outputs it to the image quality improvement unit 353. For example, when the image signal (2) is an R, G, B primary color signal, the luminance signal separation unit 351 converts the primary color signal into a luminance signal YIN and a color difference signal, and the converted luminance signal YIN is an image quality improvement unit. Output to 353. The luminance signal synthesis unit 352 receives the luminance signal YOUT output from the image quality improvement unit 353, and synthesizes the luminance signal YOUT output from the image quality improvement unit 353 with the image signal (2) held by the delay circuit 354. . For example, when the image signal (2) is an R, G, B primary color signal, the luminance signal synthesis unit 352 converts the primary color signal into a luminance signal YIN and a color difference signal, and the converted luminance signal YIN is an image quality improvement unit. The luminance signal YOUT and the color difference signal are converted to the primary color signal by replacing the luminance signal YOUT output by the output signal 353 to generate the image signal (3).

  The image quality improvement unit 353 includes a two-dimensional low-pass filter 3531, a subtractor 3532, a gain adjustment circuit 3533, and an adder 3534. The two-dimensional low-pass filter 3531 first extracts the low-frequency component in the vertical direction of the input luminance signal YIN, and then extracts the horizontal low-frequency component from the extracted vertical low-frequency component as the signal LPF. Output. However, as described above, the two-dimensional low-pass filter 3531 uses the LPF switching signal output from the correction region setting unit 330 to extract the result of extracting the low-frequency components in the vertical and horizontal directions when the LPF switching signal is active as the signal LPF. When the LPF switching signal is inactive, the input luminance signal YIN is output as the signal LPF. The two-dimensional low-pass filter 3531 outputs the input luminance signal YIN as a signal MAIN.

  The subtractor 3532 inputs the signal MAIN output from the two-dimensional low-pass filter 3531 to the “+” terminal and inputs the signal LPF output from the two-dimensional low-pass filter 3531 to the “−” terminal. The subtractor 3532 subtracts the signal LPF from the signal MAIN, and outputs a signal representing the subtraction result to the gain adjustment circuit 3533. When the LPF switching signal is active, the signal MAIN is the luminance signal YIN, and the signal LPF is a signal (low-frequency extraction signal) composed of low-frequency components in the vertical and horizontal directions of the luminance signal YIN. Therefore, when the LPF switching signal is active, the subtractor 3532 outputs a result obtained by subtracting the low-frequency extraction signal from the luminance signal YIN. The subtraction result is an edge signal that is a signal that includes many high-frequency components in the vertical and horizontal directions of the luminance signal YIN. On the other hand, when the LPF switching signal is inactive, both the signal MAIN and the signal LPF are the luminance signal YIN. Therefore, when the LPF switching signal is inactive, the subtractor 3532 outputs a subtraction result “0”.

  The gain adjustment circuit 3533 receives the output signal of the subtractor 3532, multiplies the output signal by a predetermined gain so that the gamma characteristic becomes a linear characteristic, and outputs the multiplication result. The gain adjustment circuit 3533 adjusts the gain in order to prevent the sensitivity of the flare correction filter from being lowered in an image dark portion having a low signal level when a nonlinear signal multiplied by a gamma value is used as an input signal. The output of the gain adjustment circuit 3533, that is, the edge signal corrected so that the gamma characteristic is linear is input to one input terminal of the adder 3534.

  The adder 3534 inputs the signal MAIN output from the two-dimensional low-pass filter 3531 to one input terminal, and also outputs the output signal of the gain adjustment circuit 3533 (the edge signal subjected to gain adjustment by the gain adjustment circuit 3533). Input to one input terminal and add. Then, the adder 3534 outputs the addition result to the luminance signal synthesis unit 352 as the luminance signal YOUT.

  Next, a configuration example of the two-dimensional low-pass filter 3531 shown in FIG. 4 will be described with reference to FIG. A two-dimensional low-pass filter 3531 shown in FIG. 5 includes a vertical low-pass filter 71, a horizontal low-pass filter 72, a delay circuit 73, a selector 74, a delay circuit 75, and a delay circuit 76. The vertical low-pass filter 71 extracts the low-frequency component in the vertical direction of the input luminance signal YIN and outputs it as a signal VLPF, and delays the input luminance signal YIN by the same processing time required to output the signal VLPF. And output as a signal MAIN (1). The horizontal low-pass filter 72 extracts a low-frequency component in the horizontal direction of the signal VLPF input from the vertical low-pass filter 71 and outputs it as a signal HLPF. The delay circuit 73 delays the signal MAIN (1) input from the vertical low-pass filter 71 by the same amount as the processing time required to output the signal VLPF input from the horizontal low-pass filter 72 as the signal HLPF, to obtain the signal MAIN (2). Output. The selector 74 inputs the signal MAIN (2) output from the delay circuit 73 to one input terminal, inputs the signal HLPF output from the horizontal low-pass filter 72 to the other input terminal, and depending on the LPF switching signal, One of the input signals is selected and output to the delay circuit 76. In this case, the selector 74 selects and outputs the signal HLPF to the delay circuit 76 when the LPF switching signal is active, and selects the signal MAIN (2) to the delay circuit 76 when the LPF switching signal is inactive. Output. The delay circuit 75 receives the signal MAIN (2) output from the delay circuit 73, delays it for a predetermined time, and outputs it as a signal MAIN. The delay circuit 76 receives the output of the selector 74, delays the output to synchronize with the output timing of the delay circuit 75, and outputs the delayed signal as a signal LPF.

  Next, a configuration example of the vertical low-pass filter 71 shown in FIG. 5 will be described with reference to FIG. The vertical low-pass filter 71 shown in FIG. 6 includes a 12 Tap FIR filter 711 and a 1 Tap IIR filter 712 connected in cascade.

  The FIR filter 711 includes 11 delay line elements 81 connected in cascade to input the luminance signal YIN from the left end, and 12 coefficient units 82 respectively input the luminance signal YIN and the output of each delay element 81. These 11 adders 83 add the outputs of the coefficient units 82, respectively. The output of the eleventh delay element 81 is branched into two lines, the line supplied to the twelfth coefficient unit 82 and the line of the signal MAIN (1), and the output of the eleventh adder 83 is the FIR. This is the output of the filter 71.

  The IIR filter 712 includes two coefficient units 84 and 87, an adder 85, and a delay element 86 that is a line memory. The coefficient unit 84 receives the output of the FIR filter 711 as an input, and the output is supplied to one input of the adder 85. The output of the adder 83 is branched into two. One is a signal VLPF which is an output signal of the vertical low-pass filter 71, and the other is supplied to the delay element 86. The output of the delay element 86 is supplied to the other input of the adder 85 through the coefficient unit 87.

  Next, a configuration example of the horizontal low-pass filter 72 shown in FIG. 5 will be described with reference to FIG. The horizontal low-pass filter 72 shown in FIG. 7 includes a 17 Tap FIR filter 721 and a 1 Tap IIR filter 722 connected in cascade. The FIR filter 721 includes 16 delay elements (registers) 91 connected in cascade to input the signal VLPF output from the vertical low-pass filter 71 from the left end, and 17 inputs each of the signal VLPF and the output of each delay element 91. It comprises a coefficient unit 92 and 16 adders 93 for adding the outputs of the coefficient units 92 respectively. The output of the 16th adder 93 is the output of the FIR filter 721.

  The IIR filter 722 includes two coefficient units 94 and 97, an adder 95, and a delay element 96 that is a register. The coefficient unit 94 receives the output of the FIR filter 721 as an input, and the output is supplied to one input of the adder 95. The output of the adder 95 is branched into two, one being a signal LPF that is the output of the two-dimensional low-pass filter 3531 and the other being supplied to a delay element 96. The output of the delay element 96 is supplied to the other input of the adder 95 via the coefficient unit 97.

  Next, a configuration example of the delay circuit 73 shown in FIG. 5 will be described with reference to FIG. The delay circuit 73 shown in FIG. 8 includes 16 cascaded delay elements (registers) 98 that receive the signal MAIN (1) output from the vertical low-pass filter 71 from the left end. The output of the 16th delay element 98 is the signal MAIN (2) which is the output of the delay circuit 73. The 16 delay elements 98 operate in synchronization with the 16 delay elements 91 included in the horizontal low-pass filter 72 shown in FIG.

  As described above, the vertical low-pass filter 71 receives the luminance signal YIN, extracts the low-frequency component in the vertical direction of the luminance signal YIN, outputs it as the signal VLPF, and synchronizes the input luminance signal YIN with the signal VLPF. The signal MAIN (1) is output after being delayed. The horizontal low-pass filter 72 receives the signal VLPF output from the vertical low-pass filter 71, extracts a low-frequency component in the horizontal direction of the signal VLPF, and outputs it as a signal HLPF. The delay circuit 73 receives the signal MAIN (1) output from the vertical low-pass filter 71, delays the signal MAIN (1) input so as to be synchronized with the signal HLPF output from the horizontal low-pass filter 72, and outputs the signal MAIN. Output as (2). The selector 74 selects and outputs the signal HLPF to the delay circuit 76 when the LPF switching signal is active, and selects and outputs the signal MAIN (2) to the delay circuit 76 when the LPF switching signal is inactive. To do. The delay circuit 75 receives the signal MAIN (2) output from the delay circuit 73, delays it for a predetermined time, and outputs it as a signal MAIN. The delay circuit 76 receives the output of the selector 74, delays the output to synchronize with the output timing of the delay circuit 75, and outputs the delayed signal as a signal LPF.

  With the above configuration, the two-dimensional low-pass filter 3531 shown in FIG. 5 outputs, as the signal LPF, the extraction signal of the low-frequency component in the vertical and horizontal directions of the luminance signal YIN when the LPF switching signal is active as shown in FIG. At the same time, the luminance signal YIN is output as a signal MAIN in synchronization with the signal LPF. As shown in FIG. 10, the two-dimensional low-pass filter 3531 outputs the luminance signal YIN as the signal LPF when the LPF switching signal is inactive, and outputs the luminance signal YIN as the signal MAIN in synchronization with the signal LPF. .

  Note that the selection state of the selector 74 (that is, the LPF switching signal active or Data is supplied and operating regardless of the inactive state. Therefore, each delay element 81, 91, and 98 always holds and transfers the luminance signal YIN regardless of the selection state of the selector 74 (that is, the active or inactive state of the LPF switching signal). Therefore, when the state of the selector 74 (the state of the LPF switching signal) changes, it is not necessary to reset the values stored in the delay elements 81, 91, and 98.

  Further, when the LPF switching signal is active, the image quality improvement unit 353 performs gain adjustment on the edge signal generated based on the luminance signal YIN, and adds a signal obtained by adding the gain-adjusted edge signal to the luminance signal YIN as the luminance signal YOUT. Output. In this case, the luminance signal YOUT is delayed with respect to the luminance signal YIN by a time required for filtering processing by the two-dimensional low-pass filter 3531. On the other hand, when the LPF switching signal is inactive, the image quality improvement unit 353 delays the luminance signal YIN itself for the time required for the filtering process in the two-dimensional low-pass filter 3531 and outputs the luminance signal YOUT. Therefore, when the LPF switching signal is active, for example, when the luminance signal YIN changes as indicated by a chain line as shown in FIG. 11, the image quality improvement unit 353 has an edge portion as indicated by a solid line. Generated to emphasize. In this case, the viewer can see an output image having a luminance change as indicated by a broken line. On the other hand, when the LPF switching signal is inactive, the image quality improvement unit 353 makes the luminance signal YIN and the luminance signal YOUT the same signal. Therefore, for example, the black display pixel unit I2 and the image signal input display unit are made inactive by making the LPF switching signal inactive in the black display pixel unit I2 shown in FIG. 13 and making the LPF switching signal active in the image signal input display unit I1. It is possible to prevent the edge signal from being superimposed near the boundary line of I1. That is, the problem that the edge signal is emphasized and superimposed near the boundary line as described with reference to FIG. 14 can be solved.

  As described above, the present embodiment includes the signal determination unit 110, the resolution conversion unit 20, the delay processing unit 320, the correction region setting unit 330, and the image quality improvement circuit unit 350 as illustrated in FIG. The signal determination unit 110 detects the aspect ratio of the input image signal (1), generates and outputs an aspect ratio information signal indicating the aspect ratio of the image signal (1). Further, the delay processing unit 320 delays the aspect ratio information signal so as to be synchronized with the image signal (2), and outputs it as an aspect ratio information signal (after delay processing). The resolution converter 20 converts the resolution of the image signal (1) and outputs it as an image signal (2). The correction area setting unit 330 generates and outputs an LPF switching signal for setting the range of the correction effect in the image quality improvement circuit unit 350 based on the aspect ratio information signal (after delay processing). The image quality improvement circuit unit 350 performs processing for correcting the contrast of the image signal (2) in order to improve the image quality by using sharpness during the period when the LPF switching signal is active. At that time, the image quality improvement circuit unit 350 appropriately changes the operation of the two-dimensional low-pass filter 3531 according to the aspect ratio of the input image signal (1). Therefore, the image quality improvement circuit unit 353 can be operated correctly only in the image signal input display unit I1 on which the input image signal is displayed without being affected by the black display pixel unit I2.

  Further, according to the present embodiment, the same data is held in each delay element of the FIR filter and the IIR filter constituting the two-dimensional low-pass filter when the LPF switching signal is active and inactive. Therefore, it is not necessary to perform the process of setting the starting value of the image signal input display unit I1 for each delay element. Therefore, there is no need for a configuration for setting an arbitrary value for each delay element, and the configuration related to the image quality improvement processing can be simplified.

  In addition, the said embodiment can be deform | transformed as follows, for example. That is, in the vertical low-pass filter 71 shown in FIG. 6, the FIR filter 711 and the IIR filter 712 are connected in cascade, but the FIR filter 711 and the IIR filter 712 may be connected in parallel. In this case, an adder having the output of the adder 83 as one input is added to the configuration shown in FIG. Further, the signal MAIN (1) is input to the coefficient unit 84 instead of the output of the eleventh adder 83. Further, the output of the adder 85 is input to the other input of the added adder. In this configuration, the output of the added adder is the signal VLPF. In the horizontal low-pass filter 72 shown in FIG. 7, the FIR filter 721 and the IIR filter 722 are connected in cascade, but the FIR filter 721 and the IIR filter 722 may be connected in parallel. In this case, an adder having the output of the adder 93 as one input is added to the configuration shown in FIG. Further, not the output of the 16th adder 93 but the output of the 16th delay element 91 is inputted to the coefficient unit 94. Further, the output of the adder 95 is input to the other input of the added adder. In this configuration, the output of the added adder becomes the signal LPF.

  In addition, when displaying the black display pixel portion I2 on the left or right or top / bottom / left / right of the image signal input display portion I1, the LPF switching signal is made active during the period corresponding to the image signal input display portion I1 and corresponds to the black display pixel portion I2. The LPF switching signal may be inactive during the period. In this case, the correction area setting unit 330 is configured to compare the number of vertical lines and the number of horizontal pixels in accordance with the aspect ratio of the image signal (1) and the resolution of the image signal (3) that is the output image. Thus, the LPF switching signal can be generated.

  In addition, the display device according to the present invention is not limited to a projector, and may be an image display device such as a liquid crystal display or a display using a self-luminous element.

  Next, a basic configuration according to the embodiment will be described with reference to FIG. FIG. 12 is a block diagram illustrating a basic configuration example according to an embodiment of the present invention. A display device 100 illustrated in FIG. 1 includes an image quality improvement device 120 and a display unit 190. The image quality improvement apparatus 120 includes a resolution conversion unit 130, a two-dimensional low-pass filter 140, a luminance signal subtracter 150, a luminance signal adder 160, an output image signal generation unit 170, and a switching signal generation unit 180. The resolution conversion unit 130 converts the resolution of the input first image signal to a different resolution and outputs it as a second image signal. The two-dimensional low-pass filter 140 includes a plurality of delay elements 141, a plurality of coefficient units 142, a plurality of adders 143, and a selection unit 144. The plurality of delay elements 141 are cascade-connected and receive the luminance signal of the second image signal from the delay element 141 in the input stage. The plurality of coefficient units 142 inputs the inputs or outputs of the plurality of delay elements 141. The plurality of adders 143 add the outputs of the plurality of coefficient units 142. The selection unit 144 is a signal (signal A) that has passed through the plurality of delay elements 141, the plurality of coefficient units 142, and the plurality of adders 143, or the coefficient unit 142, according to the switching signal output from the switching signal generation unit 180. One of the signals (signal B) that does not pass through the adder 143 but passes through the plurality of delay elements 141 is selected and output. The two-dimensional low-pass filter 140 includes either a vertical component or a horizontal low-frequency component extraction result (signal A) or a luminance signal (signal B) of the luminance signal output from the selection unit 144, a coefficient unit 142, and an adder. A luminance signal (signal B) that passes through a plurality of delay elements 141 without passing through 143 is output. The luminance signal subtracter 150 subtracts the output (signal A or signal B) of the selection unit 144 from the luminance signal (signal B) output from the two-dimensional low-pass filter 140. The luminance signal adder 160 adds the result obtained by the subtraction by the luminance signal subtracter 150 to the luminance signal (signal B) output from the two-dimensional low-pass filter 140. The output image signal generation unit 170 generates a third image signal representing an output image based on the second image signal and the output of the luminance signal adder 160. The switching signal generator 180 generates and outputs a switching signal according to the aspect ratio of the first image signal and the resolution of the output image. The display unit 190 displays an output image based on the third image signal.

  According to the above configuration, each delay element 141 constituting the two-dimensional low-pass filter 140 holds the same data when the switching signal is active and when it is inactive. Therefore, it is not necessary to perform the process of setting the starting value of the image signal for each delay element. Therefore, there is no need for a configuration for setting an arbitrary value for each delay element, and the configuration related to the image quality improvement processing can be simplified.

  The correspondence between the configuration of the embodiment described with reference to FIGS. 1 to 8 and the like and the configuration described with reference to FIG. 12 is as follows. That is, the display device 100 shown in FIG. 12 corresponds to the projector 1 shown in FIG. The image quality improvement apparatus 120 illustrated in FIG. 12 corresponds to a configuration in which the video input unit 10, the resolution conversion unit 20, and the signal processing unit 30 illustrated in FIG. The resolution conversion unit 130 illustrated in FIG. 12 corresponds to the resolution conversion unit 20 illustrated in FIG. The two-dimensional low-pass filter 140 shown in FIG. 12 corresponds to the two-dimensional low-pass filter 3531 shown in FIG. The delay element 141 shown in FIG. 12 corresponds to the delay element 81 shown in FIG. 6, the delay element 91 shown in FIG. 7, and the delay element 98 shown in FIG. The coefficient unit 142 shown in FIG. 12 corresponds to the coefficient unit 82 shown in FIG. 6 and the coefficient unit 92 shown in FIG. 12 corresponds to the adder 83 shown in FIG. 6 and the adder 93 shown in FIG. The selection unit 144 illustrated in FIG. 12 corresponds to the selector 74 illustrated in FIG. The luminance signal subtracter 150 shown in FIG. 12 corresponds to the subtractor 3532 shown in FIG. The luminance signal adder 160 shown in FIG. 12 corresponds to the adder 3534 shown in FIG. The output image signal generation unit 170 illustrated in FIG. 12 corresponds to a configuration in which the luminance signal synthesis unit 352 and the delay circuit 354 illustrated in FIG. 4 are combined. The switching signal generation unit 180 illustrated in FIG. 12 corresponds to a configuration in which the signal determination unit 110, the delay processing unit 320, and the correction region setting unit 330 illustrated in FIG. The display unit 190 shown in FIG. 12 corresponds to the LCD driving unit 40 shown in FIG. The first image signal shown in FIG. 12 corresponds to the image signal (1) shown in FIG. The second image signal shown in FIG. 12 corresponds to the image signal (2) shown in FIG. The third image signal shown in FIG. 12 corresponds to the image signal (3) shown in FIG. The switching signal shown in FIG. 12 corresponds to the LPF switching signal shown in FIG. A signal A shown in FIG. 12 corresponds to the signal HLPF shown in FIG. The signal B shown in FIG. 12 corresponds to the signal MAIN (2) shown in FIG.

  When the output image of the display unit 190 includes a display area that displays an image according to the first image signal and a non-display area that does not display an image according to the first image signal, the switching signal generation unit 180 Thus, the switching signal can be generated and output. That is, the switching signal generation unit 180 causes the selection unit 144 to select signals (signal A) that have passed through the plurality of delay elements 141, the plurality of coefficient units 142, and the plurality of adders 143 for a period corresponding to the display area, A switching signal can be generated and output so that a signal (signal B) that has passed through a plurality of delay elements 141 is selected without passing through the coefficient multiplier 142 and the adder 143 for a period corresponding to the display area. Here, the display area corresponds to the image signal input display section I1 shown in FIG. The non-display area corresponds to the black display pixel portion I2 shown in FIG.

  The switching signal generation unit 180 includes a signal determination unit that determines the aspect ratio of the first image signal, and a delay unit that delays the determination result of the aspect ratio by the signal determination unit by the time of the resolution conversion processing by the resolution conversion unit 130. The switching signal can be generated and output according to the determination result delayed by the delay unit and the resolution of the output image. Here, the signal discriminating unit corresponds to the signal discriminating unit 110 shown in FIG. The delay unit corresponds to the delay processing unit 320 illustrated in FIG.

  The switching signal generation unit 180 always selects a signal (signal A) that has passed through the plurality of delay elements 141, the plurality of coefficient units 142, and the plurality of adders 143 when a predetermined valid signal is invalid. The switch signal can be generated and output. Here, the predetermined valid signal corresponds to the aspect ratio switching valid setting shown in FIG.

  The embodiment of the present invention has been described in detail with reference to the drawings. However, the specific configuration is not limited to this embodiment, and includes design and the like within a scope not departing from the gist of the present invention.

DESCRIPTION OF SYMBOLS 1 ... Projector, 10 ... Image | video input part, 20, 130 ... Resolution conversion part, 30 ... Signal processing part, 40 ... LCD drive part, 74 ... Selector, 81, 91, 98, 141 ... Delay element, 82, 92, 142 ... Coefficient unit, 83, 93, 143, 3534 ... Adder, 100 ... Display device, 110 ... Signal discrimination unit, 120 ... Image quality improvement device, 140, 3531 ... 2-dimensional low-pass filter, 144 ... Selection unit, 150 ... Luminance signal Subtractor, 160 ... Luminance signal adder, 170 ... Output image signal generation unit, 180 ... Switching signal generation unit, 190 ... Display unit, 320 ... Delay processing unit, 330 ... Correction area setting unit, 340 ... Correction setting holding unit, 352... Luminance signal synthesizer, 354... Delay circuit, 3532.

Claims (6)

A resolution converter that converts the resolution of the input first image signal to a different resolution and outputs the converted image as a second image signal;
A plurality of cascade-connected delay elements for inputting the luminance signal of the second image signal, a plurality of coefficient units for inputting inputs or outputs of the plurality of delay elements, and a plurality for adding outputs of the plurality of coefficient units And a plurality of the delay elements and a plurality of the coefficient units and a signal that has passed through the plurality of adders according to a switching signal, or a plurality of the delay elements that do not pass through the coefficient unit and the adder. A selection unit that selects and outputs one of the signals that have passed through, and the extraction result of the low-frequency component in the vertical and horizontal directions of the luminance signal output from the selection unit or the luminance signal A two-dimensional low-pass filter that outputs the luminance signal that has passed through the plurality of delay elements without passing through the coefficient unit and the adder;
A luminance signal subtracter that subtracts the output of the selection unit from the luminance signal output by the two-dimensional low-pass filter;
A luminance signal adder that adds the result of subtraction by the luminance signal subtracter to the luminance signal output by the two-dimensional low-pass filter;
An output image signal generation unit that generates a third image signal representing an output image based on the output of the second image signal and the luminance signal adder;
A switching signal generation unit that generates and outputs the switching signal according to an aspect ratio of the first image signal and a resolution of the output image;
An image quality improving apparatus. The output image includes a display area that displays an image according to the first image signal, and a non-display area that does not display an image according to the first image signal,
The switching signal generation unit causes the selection unit to select a signal that has passed through the plurality of delay elements, the plurality of coefficient multipliers, and the plurality of adders for a period corresponding to the display region, and displays the non-display region. The image quality improvement apparatus according to claim 1, wherein the switching signal is generated and output so as to select a signal that has passed through the plurality of delay elements without passing through the coefficient unit and the adder during a corresponding period. The switching signal generation unit includes a signal determination unit that determines an aspect ratio of the first image signal, and a delay that delays the determination result of the aspect ratio by the signal determination unit by a time of resolution conversion processing by the resolution conversion unit. The image quality improvement apparatus according to claim 1, wherein the switching signal is generated and output according to the determination result delayed by the delay unit and the resolution of the output image. The switching signal generation unit generates the switching signal so that a signal that has passed through the plurality of delay elements, the plurality of coefficient units, and the plurality of adders is always selected when a predetermined valid signal is invalid. The image quality improvement apparatus according to any one of claims 1 to 3. A resolution converter that converts the resolution of the input first image signal to a different resolution and outputs the converted image as a second image signal;
A plurality of cascade-connected delay elements for inputting the luminance signal of the second image signal, a plurality of coefficient units for inputting inputs or outputs of the plurality of delay elements, and a plurality for adding outputs of the plurality of coefficient units And a plurality of the delay elements and a plurality of the coefficient units and a signal that has passed through the plurality of adders according to a switching signal, or a plurality of the delay elements that do not pass through the coefficient unit and the adder. A selection unit that selects and outputs one of the signals that have passed through, and the extraction result of the low-frequency component in the vertical and horizontal directions of the luminance signal output from the selection unit or the luminance signal A two-dimensional low-pass filter that outputs the luminance signal that has passed through the plurality of delay elements without passing through the coefficient unit and the adder;
A luminance signal subtracter that subtracts the output of the selection unit from the luminance signal output by the two-dimensional low-pass filter;
A luminance signal adder that adds the result of subtraction by the luminance signal subtracter to the luminance signal output by the two-dimensional low-pass filter;
An output image signal generation unit that generates a third image signal representing an output image based on the output of the second image signal and the luminance signal adder;
A switching signal generation unit that generates and outputs the switching signal according to an aspect ratio of the first image signal and a resolution of the output image;
A display unit configured to display the output image based on the third image signal. A resolution converter that converts the resolution of the input first image signal to a different resolution and outputs the converted image as a second image signal;
A plurality of cascade-connected delay elements for inputting the luminance signal of the second image signal, a plurality of coefficient units for inputting inputs or outputs of the plurality of delay elements, and a plurality for adding outputs of the plurality of coefficient units And a plurality of the delay elements and a plurality of the coefficient units and a signal that has passed through the plurality of adders according to a switching signal, or a plurality of the delay elements that do not pass through the coefficient unit and the adder. A selection unit that selects and outputs one of the signals that have passed through, and the extraction result of the low-frequency component in the vertical and horizontal directions of the luminance signal output from the selection unit or the luminance signal A two-dimensional low-pass filter that outputs the luminance signal that has passed through the plurality of delay elements without passing through the coefficient unit and the adder;
A luminance signal subtracter that subtracts the output of the selection unit from the luminance signal output by the two-dimensional low-pass filter;
A luminance signal adder that adds the result of subtraction by the luminance signal subtracter to the luminance signal output by the two-dimensional low-pass filter;
An output image signal generation unit that generates a third image signal representing an output image based on the output of the second image signal and the luminance signal adder;
A switching signal generating unit that generates and outputs the switching signal according to the aspect ratio of the first image signal and the resolution of the output image;
An image quality improvement method for generating the third image signal by improving the image quality of the second image signal.

Images