JP2019125601A - Semiconductor device - Google Patents

Abstract

To achieve a semiconductor device in which an IC chip including a rewiring layer for transmitting high frequency signals formed therein is mounted and loss of high frequency signals is reduced.SOLUTION: A semiconductor device includes: a wiring member 1 including high frequency wiring 12 for transmitting high frequency signals on one surface 11a thereof; and an IC chip 3 including a rewiring layer 34. In the semiconductor device, as viewed from the normal direction with respect to the one surface 11a, the high frequency wiring 12 and a high frequency rewiring layer 341 electrically connected to the high frequency wiring 12 in the rewiring layer 34 are extended in a straight line and arranged on a straight line. Thus, in the semiconductor device, loss in transmitting high frequency signals to the high frequency wiring 12 and the high frequency rewiring layer 341 can be reduced.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a semiconductor device mounted with an IC chip having a redistribution layer.

  Conventionally, a semiconductor chip provided with an IC (abbreviated as Integrated Circuit), that is, an IC chip is known. Although this type of IC chip has a plurality of input / output terminals in an integrated circuit, since the distance between these terminals is narrow and it is difficult to mount on a wiring member or the like as it is, reconnection to these terminals is required. A wiring layer is formed. As such an IC chip, for example, the one described in Patent Document 1 can be mentioned.

  The IC chip described in Patent Document 1 includes an IC having a plurality of terminals, an insulating layer covering one surface of the IC, a rewiring layer electrically connected to the terminals and formed in the insulating layer, and the insulating layer. And a plurality of bumps electrically connected to the redistribution layer while being exposed. The IC chip is electrically connected through the rewiring layer while the bumps, which are portions to be connected to the wiring member, and the terminals of the IC are offset, as viewed from the normal direction to the one surface. It is considered as the structure which the mounting property to a member etc. improved.

  Here, “offset” means that the positions of the terminals of the IC and the bumps electrically connected to the terminals through the rewiring layer are deviated when the IC chip is viewed from above. Points to be.

Unexamined-Japanese-Patent No. 2004-64016

  By the way, this type of IC chip has a structure in which the distance between the terminals of the IC is increased through the rewiring layer for the purpose of improving the mountability to the wiring member etc. Larger than the planar size of the IC. Further, in the IC chip of this type, the IC is disposed near the center of the IC chip in top view, and the offset amount of the rewiring layer is small near the center of the IC chip and increases toward the outer periphery.

  Here, the "offset amount" refers to the distance between the terminal of the IC and the bump when the IC chip is viewed from the top, and in the case where the offset amount is zero, the terminal of the IC overlaps with the bump. It becomes. That is, the "offset amount" can be reworded as the length of the redistribution layer in top view, and the terminal and the bump are separated as the offset amount is larger.

  Here, in the case where the bumps of the IC chip have a minute size, all the terminals of the IC need to be offset from the viewpoint of securing durability and reliability. In addition, among the rewiring layers of this type of IC chip, those which input / output high frequency signals have a small offset amount in order to reduce loss (hereinafter referred to as “transmission loss”) when transmitting high frequency signals. Is preferred.

  In addition, among the wiring members, wiring for passing high frequency signals (hereinafter referred to as “high frequency wiring”) and rewiring layer for passing high frequency signals (hereinafter referred to as “high frequency rewiring layer”) of rewiring layers of IC chip are complicated. If shaped, high frequency signal losses can occur in these lines. Specifically, discontinuity of the characteristic impedance of the wiring occurs in the middle of each of the high frequency wiring and the high frequency rewiring layer which is a transmission path of the high frequency signal and at the connection portion thereof, and a part of the high frequency signal is reflected. There may be transmission losses due to it. In this case, even if the wiring design in consideration of the high frequency characteristics is performed on the wiring member or the IC chip, the actually obtained high frequency characteristics cause a deviation from the design value, which is not preferable.

  The invention described in Patent Document 1 has transmission loss because the redistribution layer is randomly offset in a top view and there is a portion having a bent shape between the terminal and the bump. This configuration can not be effectively reduced.

  The present invention has been made in view of the above-mentioned points, and it is an object of the present invention to provide a semiconductor device including an IC chip in which a high frequency redistribution layer is formed, and in which the transmission loss is reduced compared to the prior art.

  In order to achieve the above object, the semiconductor device according to claim 1 is electrically provided with a wiring member (1) provided on one side (11a) with a high frequency wiring (12) for transmitting a high frequency signal, and a high frequency wiring member. It comprises an antenna (21, 22) connected and an IC chip (3) mounted on one surface and electrically connected to the antenna via a high frequency wiring. In such a configuration, the high frequency wiring is extended linearly as viewed in the normal direction to one surface, and the IC chip is provided with a plurality of terminals (311) and a semiconductor chip (31) on which an IC is formed. And a plurality of rewiring layers (34) connected to each of the plurality of terminals, at least a portion of the plurality of rewiring layers being electrically connected to the high frequency wiring. It is a wiring layer (341), and the high frequency rewiring layer extends in a straight line when viewed from the normal direction, and is disposed on the straight line formed by the high frequency wiring.

  According to this, the high frequency wiring for transmitting the high frequency signal between the antenna and the terminal of the IC chip and the high frequency rewiring layer connected thereto are linearly arranged in a top view, and the high frequency signal In the semiconductor device, the discontinuity of the characteristic impedance of the wiring for transmitting the signal is reduced. Further, in addition to the above-described effects, since the offset amount of the high frequency redistribution layer can be reduced, it is possible to provide a semiconductor device capable of reducing the loss in transmission of the high frequency signal more than the conventional one.

  In addition, the code | symbol in the parenthesis of each said means shows an example of the correspondence with the specific means as described in embodiment mentioned later.

It is a plane schematic diagram which shows the plane layout when the semiconductor device of 1st Embodiment is seen from the back surface side of an IC chip. FIG. 2 is a cross-sectional view showing a cross section between II and II indicated by an alternate long and short dash line in FIG. FIG. 5 is a schematic plan view showing the back surface side of the IC chip in the semiconductor device of the first embodiment. FIG. 4 is a cross-sectional view showing a cross section between IV and IV indicated by an alternate long and short dash line in FIG. 3; It is the plane schematic diagram which showed the back surface side of IC chip among the semiconductor devices of 2nd Embodiment. FIG. 18 is a schematic plan view showing a planar layout when the arrangement of the wiring member of the IC chip in the contraction direction in the semiconductor device of the second embodiment is viewed from the back surface side of the IC chip. It is the plane schematic diagram which showed what looked at the example which changed the IC chip among the semiconductor devices of a 2nd embodiment from the back side. It is the plane schematic diagram which showed the back surface side of IC chip among the semiconductor devices of 3rd Embodiment. It is the plane schematic diagram which showed what looked at the example which changed the IC chip among the semiconductor devices of 3rd Embodiment from the back surface side. It is the plane schematic diagram which showed the back surface side of IC chip among the semiconductor devices of 4th Embodiment.

  Hereinafter, an embodiment of the present invention will be described based on the drawings. In the following embodiments, parts that are the same as or equivalent to each other will be described with the same reference numerals.

First Embodiment
The semiconductor device of the first embodiment will be described with reference to FIGS. 1 to 4. The semiconductor device of the present embodiment is, for example, mounted in a vehicle such as a car and applied as a semiconductor device for driving various electronic devices for vehicles. In the present embodiment, an example in which the semiconductor device is applied to a millimeter wave radar will be described.

  In FIG. 1, in order to make the configuration of the semiconductor device of this embodiment easy to understand, components other than the wiring member 1, the antenna 2 and the IC chip 3 to be described later are omitted, and the number of wires and terminals is reduced to deform. Show what. Further, in FIG. 1, in order to make it easy to understand the connection relationship between the IC chip 3 and the high frequency wiring 12 to be described later, the lengths and sizes of the rewiring layer 34 to be described later Exaggerately shown. Furthermore, in FIG. 1, in order to make it easy to see, the rewiring layer 34 and the terminal 311 which are covered by the insulating layer 32 described later are shown by solid lines, and the outline of the wiring member 1 is shown by dashed dotted lines. In FIG. 3 and FIG. 4, in order to make the configuration of the IC chip 3 easy to understand, the size and thickness of each component are exaggerated after being deformed, and the rewiring layer 34, the terminal 311, and the like covered with the insulating layer 32. The outline of the semiconductor chip 31 described later is indicated by a broken line.

  As shown in FIG. 1, the semiconductor device of the present embodiment includes a wiring member 1 having a high frequency wiring 12 for transmitting a high frequency signal, and an antenna 2 and an IC chip 3 mounted on the wiring member 1. . The semiconductor device of this embodiment functions as, for example, an RF circuit and an antenna in any millimeter wave radar, and is configured to reduce transmission loss in a wire for transmitting a high frequency signal in the millimeter wave band (frequency 30 GHz to 300 GHz). There is. The specific arrangement of the wiring for reducing the transmission loss will be described later.

  The principle of operation of the millimeter wave radar and components other than the semiconductor device of the present embodiment (for example, DSP (digital processing signal circuit), radome, etc.) are known, and therefore, the detailed description thereof will be made in this specification. I omit it.

  As shown in FIG. 1, the wiring member 1 has, for example, a plate-like supporting substrate 11 having a surface 11a and made of glass epoxy resin, prepreg, etc., and a high frequency wiring 12 disposed on the surface 11a. Have. The wiring member 1 includes at least the high frequency wiring 12, but the configuration other than the high frequency wiring 12 may be changed as appropriate.

  The high frequency wiring 12 is made of, for example, a metal material such as Cu (copper), and as shown in FIG. 1, is a wiring for transmitting a high frequency signal between the antenna 2 and the IC chip 3 and is formed by electrolytic plating or the like. It is formed. As shown in FIG. 1, a plurality of high frequency wiring lines 12 are formed, and in plan view, they are in the form of straight lines extended so as to connect the respective antennas 2 and the IC chip 3, be independent.

  As shown in FIG. 1, the high frequency wiring 12 is disposed on a straight line formed by the high frequency rewiring layer 341 electrically connected to the high frequency wiring 12 in a plan view. Thereby, the transmission loss in the wiring for transmitting the high frequency signal between the antenna 2 and the IC chip 3 is reduced. The reason will be described later.

  In the present embodiment, the antenna 2 performs transmission or reception of a millimeter wave band radio wave (hereinafter referred to as "millimeter wave radio wave"), and for example, an arbitrary millimeter wave antenna such as a microstrip antenna is applied. For example, as shown in FIG. 2, a plurality of antennas 2 are disposed on one surface 11 a of the wiring member 1 and are respectively connected to the high frequency wiring 12 by a bonding material or the like (not shown). The antenna 2 has a transmitting antenna 21 and a receiving antenna 22 in the present embodiment.

  The transmitting antenna 21 transmits the high frequency signal transmitted from the IC chip 3, that is, the millimeter wave toward the outside of the vehicle mounted with the millimeter wave radar to which the semiconductor device of the embodiment is applied, for example. It is an antenna. In the present embodiment, as shown in FIG. 1, in the present embodiment, the left and right directions in FIG. 1 are left and right, and the directions orthogonal to the left and right directions in FIG. , And the IC chip 3 are disposed in the left direction and the lower direction, respectively.

  The receiving antenna 22 is an antenna for receiving the reflected millimeter wave among the millimeter waves transmitted to the outside by the transmitting antenna 21. For example, as shown in FIG. 1, the receiving antennas 22 are respectively disposed in the left direction and the lower direction of the IC chip 3, and are alternately arranged with the transmitting antennas 21.

  The number of transmission antennas 21 and the number of reception antennas 22 and the arrangement thereof are not limited to the above, and may be changed as appropriate.

  As shown in FIG. 4, the IC chip 3 is, for example, a rectangular plate having one surface 31a and the other surface 31b, and includes a semiconductor chip 31 provided with a plurality of terminals 311, an insulating layer 32, and a sealing resin 33. A plurality of redistribution layers 34 and a plurality of connection portions 35 are provided. As shown in FIG. 3 or 4, the IC chip 3 is covered with the sealing resin 33 having a larger planar size than the semiconductor chip 31 except for the other surface 31b of the semiconductor chip 31, and the other surface 31b of the semiconductor chip 31 and the seal are sealed. The insulating layer 32 covers the other surface 31 b of the stop resin 33. As shown in FIG. 4, in the IC chip 3, the plurality of terminals 311 formed on the other surface 31 b side of the semiconductor chip 31 are electrically connected to the rewiring layer 34 formed in the insulating layer 32. As shown in FIG. 4, the IC chip 3 is electrically connected to the connection portion 35 exposed on the opposite side of the semiconductor chip 31 in the insulating layer 32 through the redistribution layer 34.

  As shown in FIG. 4, the IC chip 3 has a surface opposite to the semiconductor chip 31 in the sealing resin 33 as the front surface 3a, and the opposite surface as the back surface 3b. At least a part of the redistribution layer 34 is straight when viewed from the “direction”. Specifically, the high frequency rewiring layer 341 of the rewiring layer 34 for transmitting a high frequency signal is linear as viewed from the back surface normal direction as shown in FIG.

  The IC chip 3 is manufactured by sealing the semiconductor chip 31 with the sealing resin 33 in a normal molding process, and forming the insulating layer 32, the rewiring layer 34, and the connection portion 35 in a normal rewiring process. Ru. The IC chip 3 may have an arbitrary configuration except for the high frequency rewiring layer 341, and is connected to a digital processing circuit (not shown) or the like via a wiring (not shown).

  The semiconductor chip 31 includes an integrated circuit (IC), and exchanges and processes high frequency signals with the antenna 2 through the high frequency wiring 12 and the rewiring layer 34, and is manufactured by a normal semiconductor process. . The semiconductor chip 31 is provided with a plurality of terminals 311 through which high frequency signals and other electric signals are input and output.

  For example, as shown in FIG. 3, the terminals 311 are arranged in an array when viewed from the other surface 31 b side of the semiconductor chip 31. A part of the terminals 311 is a high frequency terminal connected to the high frequency redistribution layer 341.

  The insulating layer 32 is made of an insulating material used in a normal rewiring process, for example, a resin material such as polyimide. In the present embodiment, as shown in FIG. 4, the insulating layer 32 has a configuration in which two insulating films 321 and 322 are stacked.

  The sealing resin 33 is made of a sealing material used in a conventional sealing process of a semiconductor device, for example, a resin material such as an epoxy resin, and is formed by compression molding or the like.

  The rewiring layer 34 is made of a conductive material used in a normal rewiring process, for example, a metal material such as Cu, Al (aluminum), Ag (silver) or Au (gold). For example, as shown in FIG. 4, the rewiring layer 34 is formed by electrolytic plating, electroless plating, or the like, and electrically connects the terminal 311 and the connection portion 35.

  Incidentally, as shown in FIG. 1, the rewiring layer 34 includes those which exchange high frequency signals with the antenna 2 and those which do not, and in the following description, for the sake of convenience, The former is referred to as a high frequency redistribution layer 341, and the latter is referred to as another redistribution layer 342.

  As shown in FIG. 1, the high frequency rewiring layer 341 is linear when viewed from the back surface normal direction, and is electrically connected to the high frequency wiring 12 via, for example, the connection portion 35. As shown in FIG. 1, the high frequency rewiring layer 341 is arranged in line with the electrically connected high frequency wiring 12 when viewed from the back surface normal direction.

  The other rewiring layer 342 is electrically connected to another wiring (not shown) and the like, and may extend linearly as viewed from the back surface normal direction, similarly to the high frequency rewiring layer 341 And may be different from straight.

  The connection portion 35 electrically connects the terminal 311 of the semiconductor chip 31 and the wiring formed on the wiring member 1, and in the present embodiment, for example, a bump made of a conductive material such as solder and the like. However, other forms such as conductive vias may be used. As a result, the IC chip 3 is electrically connected to the high frequency wiring 12 on the wiring member 1 and other wirings not shown, and transmission / reception of high frequency signals with the antenna 2 and a signal not shown based on this, etc. It becomes the structure to output.

  The above is the configuration of the semiconductor device of this embodiment.

  Next, the arrangement of the high frequency redistribution layer 341 and the effect thereof will be described.

  The high frequency rewiring layer 341, as shown in FIG. 1, offsets the terminal 311 disposed on the outermost side, that is, the outermost periphery of the plurality of terminals 311, when the IC chip 3 is viewed from the back surface normal direction. Is preferred. In other words, the high frequency redistribution layer 341 is preferably disposed at the outermost periphery of the IC chip 3. This can avoid interference with other wiring (not shown) in the connection between the high frequency rewiring layer 341 and the high frequency wiring 12 and arrange the high frequency rewiring layer 341 and the high frequency wiring 12 in a straight line. It is to be easy.

  Here, the “terminal 311 disposed at the outermost periphery” refers to the terminal 311 disposed at the outer edge portion of the plurality of terminals 311 when viewed from the normal direction to the other surface 31 b of the semiconductor chip 31. .

  The high frequency rewiring layer 341, as shown in FIG. 1, is straight and is a straight line formed by the high frequency wiring 12 electrically connected to the high frequency rewiring layer 341. It is located on the top. This is because the semiconductor device having such an arrangement is used when the direction in which the present inventors transmit the high-frequency signal is not the same as the output direction of the high-frequency signal transmitted from the re-wiring layer. By focusing on the deterioration of the high frequency characteristics of the

  Specifically, for example, the IC chip 3 is mounted on the wiring member 1 such that the straight line formed by the high-frequency rewiring layer 341 and the straight line formed by the high-frequency wiring 12 connected thereto make a right angle in plan view. Consider the case. At this time, the direction from the one end on the terminal 311 side to the other end on the connection portion 35 side of the high frequency redistribution layer 341 is taken as the extraction direction. Further, when the high frequency signal is transmitted through the high frequency wiring 12, the direction from the one end on the IC chip 3 side of the high frequency wiring 12 toward the other end on the antenna 2 side is taken as the output direction. In this case, the direction in which the high frequency redistribution layer 341 is drawn out is different from the output direction of the high frequency signal transmitted to the high frequency wiring 12 through the high frequency redistribution layer 341.

  The inventors of the present invention notice that the high frequency characteristics of the semiconductor device in such a state are degraded, and this phenomenon is a discontinuity of the characteristic impedance in the wiring of the high frequency rewiring layer 341 and the high frequency wiring 12. I thought it was due to. Specifically, when a high frequency signal is transmitted through two connected wires having different characteristic impedances, the high frequency signal may be reflected by a part of the high frequency signal at the connection portion. It was inferred that signal transmission loss occurred.

  Conversely, the discontinuity of the characteristic impedance is reduced by providing the semiconductor device in which the drawing direction of the high-frequency rewiring layer 341 for transmitting the high-frequency signal coincides with the output direction of the high-frequency signal. High frequency characteristics can be improved. That is, in the configuration in which the change in the wiring structure due to the connection between the high frequency rewiring layer 341 and the high frequency wiring 12 is small, that is, the configuration in which the high frequency rewiring layer 341 and the high frequency wiring 12 are disposed on a straight line in plan view. , Its characteristic impedance discontinuity is reduced. By such an idea, the inventors arrived at the semiconductor device of the present embodiment in which the high frequency redistribution layer 341 is disposed on the straight line formed by the high frequency wiring 12.

  The high frequency rewiring layer 341 may be disposed on a straight line formed by the high frequency wiring 12 electrically connected to the high frequency rewiring layer 341, as shown in FIG. The drawing directions of the wiring layers 341 may not all coincide with each other.

  According to the present embodiment, the transmission loss of the high frequency signal is reduced as compared to the conventional case by having the configuration in which the drawing direction of the high frequency rewiring layer 341 and the output direction of the high frequency signal coincide with each other in plan view. It becomes a semiconductor device.

Second Embodiment
The semiconductor device of the second embodiment will be described with reference to FIGS. 5 and 6. In FIG. 5, the rewiring layer 34 and the terminal 311 covered with the insulating layer 32 are shown by solid lines for easy viewing. Similar to FIG. 1, FIG. 6 shows deformation in order to make the configuration easy to understand and exaggerates the numbers and sizes of the terminals 311, the rewiring layer 34 and the connecting portion 35, and the wiring member 1 and IC Configurations other than the chip 3 are omitted.

  In the semiconductor device of the present embodiment, as shown in FIG. 5, all the drawing directions of the rewiring layer 34 including the high-frequency rewiring layer 341 are aligned, and the short side direction of the rectangular IC chip 3 is formed. The direction is parallel to the Further, in the semiconductor device of the present embodiment, the rewiring layer 34 is arranged along the direction in which the contraction direction of the wiring member 1 shown by the outlined arrow in FIG. 6 is the smallest. The semiconductor device of the present embodiment is different from the semiconductor device of the first embodiment in these points. In the present embodiment, these differences will be mainly described.

  The plurality of terminals 311 of the IC chip 3 are offset by the rewiring layer 34, as shown in FIG.

  In the present embodiment, as shown in FIG. 5, the rewiring layer 34 is formed such that the drawing direction thereof is aligned in a direction parallel to the short side direction of the IC chip 3. With such an offset, the IC chip 3 has a shape in which the length in the short side direction is close to the length in the long side direction, that is, the shape is close to a square plate. Thereby, the stress of the IC chip 3 is relieved, the connection between the wiring member 1 and the IC chip 3 is stabilized, and the semiconductor device with improved connection reliability can be obtained. Further, the IC chip 3 has a structure in which all the drawing directions of the rewiring layer 34 are aligned, thereby providing a semiconductor device in which the design of the rewiring layer 34 is easy and the number of manufacturing steps is reduced.

  Further, in the present embodiment, as shown in FIG. 6, in the present embodiment, the drawing direction of the rewiring layer 34 and the direction of the smallest contraction of the wiring member 1 are aligned, ie, parallel. It is arranged. The reason is that the stress applied to the connection portion between the wiring member 1 and the IC chip 3 caused by the contraction of the wiring member 1 is alleviated to provide a semiconductor device having improved connection reliability.

  Note that “the direction in which the contraction is the smallest” of the wiring member 1 is, for example, the short side direction when the support substrate 11 is formed in a rectangular plate shape made of a uniform material, and includes glass cloth When it is made of a prepreg, the mesh of the glass cloth is in the dense direction. As described above, the direction in which the contraction of the wiring member 1 is the smallest changes depending on the shape of the support substrate 11, the constituent material, and the like. The IC chip 3 is disposed such that the direction in which the contraction of the wiring member 1 is the smallest is parallel to the direction in which the redistribution layer 34 is drawn. Also, the arrangement of the high frequency wiring 12 is appropriately changed in accordance with the arrangement of the redistribution layer 34.

  According to the present embodiment, in addition to the effects obtained in the first embodiment, the semiconductor device can have high connection reliability between the wiring member 1 and the IC chip 3 and can easily design the rewiring layer 34.

(Modification of the second embodiment)
In the second embodiment, an example in which all the drawing directions of the redistribution layer 34 are aligned has been described. However, the rewiring layer 34 may be disposed along the short side direction of the IC chip 3 in a rectangular plate shape, and as shown in FIG. It may be reversed.

  Even in the case of arranging such a redistribution layer 34, the same effect as described above can be obtained. FIG. 7 shows an example in which the drawing direction of the three rows of rewiring layers 34 on the left side of the drawing of FIG. 7 and the drawing direction of the two rows of rewiring layers 34 on the right of the drawing are reversed. The number and arrangement of the redistribution layers 34 may be changed as appropriate.

Third Embodiment
The semiconductor device of the third embodiment will be described with reference to FIG.

  In the semiconductor device of this embodiment, as shown in FIG. 8, the drawing direction of the rewiring layer 34 including the high-frequency rewiring layer 341 is all aligned, and the long side direction of the IC chip 3 has a rectangular plate shape. Are different from the first embodiment in that they are parallel to each other. In the present embodiment, this difference is mainly described.

  As shown in FIG. 8, the rewiring layer 34 is formed to align along the long side direction of the IC chip 3 whose drawing direction is a rectangular plate shape. As a result, the area of the IC chip 3 is smaller than in the case where the lead-out directions of the redistribution layer 34 are aligned along the short side direction of the IC chip 3, and a semiconductor device with reduced manufacturing cost can be obtained.

  Specifically, the IC chip 3 in the form of a rectangular plate has a shape in which the direction along the drawing direction of the redistribution layer 34 is longer than the direction orthogonal to the direction. At this time, the length in the long side direction of the IC chip 3 is X, the length in the short side direction is Y, and the length in the long side direction extends by α when the rewiring layer 34 is drawn out. The area of the IC chip 3 when the side direction extends is considered.

  The area of the IC chip 3 in the case where the long side direction extends is (XY + αY) which is obtained by multiplying the length (X + α) in the long side direction and the length Y in the short side direction in this case. On the other hand, the area of the IC chip 3 in the case where the short side direction extends is obtained by multiplying the length X in the long side direction and the length (Y + α) in the short side direction in this case (XY + αX) . Here, since X> Y, αX> αY, and the area of the IC chip 3 when the long side direction extends is smaller than the area of the IC chip 3 when the short side direction extends.

  Therefore, in the semiconductor device of the present embodiment in which the lead-out direction of the redistribution layer 34 is aligned along the long side direction of the IC chip 3, the area of the IC chip 3 becomes smaller, and the structure is advantageous to the manufacturing cost. Further, since all the drawing directions of the rewiring layer 34 are aligned, the design of the rewiring layer 34 is facilitated as in the second embodiment.

  According to the present embodiment, in addition to the effects obtained in the first embodiment, the area of the IC chip 3 is further reduced, the manufacturing cost is advantageous, and the design of the rewiring layer 34 is easy.

(Modification of the third embodiment)
The rewiring layer 34 may be disposed along the short side direction of the IC chip 3 in which the rewiring layer 34 is formed in a rectangular plate shape, and as shown in FIG. It may be done.

  Even in the case of arranging such a redistribution layer 34, the same effect as described above can be obtained. 9 shows an example in which the drawing direction of the five rows of rewiring layers 34 on the upper side of the plane of FIG. 9 and the drawing direction of the three rows of rewiring layers 34 on the lower side of the plane of FIG. However, the number and arrangement of the redistribution layers 34 may be changed as appropriate.

Fourth Embodiment
The semiconductor device of the fourth embodiment will be described with reference to FIG.

  In the semiconductor device of the present embodiment, as shown in FIG. 10, the offset amount of the high frequency rewiring layer 341 disposed on the end side of the IC chip 3 in the rewiring layer 34 is other than that. The point smaller than the offset amount of the redistribution layer 342 is different from the first embodiment. In the present embodiment, this difference is mainly described.

  Here, the end portion of the IC chip 3 refers to an outer portion in a direction parallel to the drawing direction of the redistribution layer 34 in the outer surface of the IC chip 3 when viewed from the back surface normal direction.

  The high frequency redistribution layer 341 of the redistribution layer 34 is disposed closer to the end of the IC chip 3 than the other redistribution layers 342, as shown in FIG. The other rewiring layer 342 is disposed on the inner side of the IC chip 3 than the high frequency rewiring layer 341 in plan view, and is larger than the offset amount of the high frequency rewiring layer 341. Thereby, the offset amount of the high frequency redistribution layer 341 becomes smaller than the offset amount of the high frequency redistribution layer 341 in each of the above embodiments, and the transmission loss of the high frequency signal in the high frequency redistribution layer 341 is reduced. .

  The offset amount of the high frequency redistribution layer 341 disposed on the end side of the IC chip 3 may be smaller than the offset amount of the other redistribution layers 342 disposed on the inner side, as shown in FIG. The present invention is not limited to the example, and the number and arrangement of the redistribution layers 34 may be changed as appropriate.

  According to this embodiment, in addition to the effects obtained in the first embodiment, the semiconductor device can have a smaller offset amount of the high frequency redistribution layer 341, that is, a transmission loss of high frequency signals further reduced.

(Other embodiments)
Note that the semiconductor device shown in each of the above-described embodiments is an example of the semiconductor device of the present invention, and is not limited to the above-described embodiments, and is within the scope of the claims. It is possible to change as appropriate.

  (1) For example, in the second embodiment, an example in which all the rewiring layers 34 are drawn out in the same direction has been described. However, for the purpose of ensuring the connection reliability between the high frequency wiring 12 for transmitting high frequency signals and the high frequency rewiring layer 341, it is preferable that the drawing directions of the high frequency rewiring layer 341 be aligned. The drawing directions of the other redistribution layers 342 may not be the same.

  (2) In each said embodiment, what has the support substrate 11 was mentioned as an example of the wiring member 1 provided with the wiring 12 for high frequencies. However, the wiring member 1 is not limited to the form of the substrate as long as the wiring member 1 includes the high frequency wiring 12 and can mount the antenna 2 and the IC chip 3, and is a form of a housing component or other electronic components. It may also be in another form.

  (3) In the above embodiments, the example in which the antenna 2 is mounted on the one surface 11 a of the wiring member 1 together with the IC chip 3 has been described, but the antenna 2 is electrically connected to the high frequency wiring 12 3 and high frequency signals can be exchanged. Therefore, the antenna 2 is disposed on the surface of the wiring member 1 opposite to the surface 11a on which the IC chip 3 is mounted, and is electrically connected to the high frequency wiring 12 through a through hole via or the like (not shown). It is also good.

Reference Signs List 1 wiring member 11 support base 12 high frequency wiring 2 antenna 3 IC chip 31 semiconductor chip 34 rewiring layer 341 high frequency rewiring layer 35 connection portion

Claims (8)

A wiring member (1) provided on one side (11a) with high frequency wiring (12) for transmitting high frequency signals;
Antennas (21, 22) electrically connected to the high frequency wiring;
And an IC chip (3) mounted on the one surface and electrically connected to the antenna via the high frequency wiring.
The high frequency wiring is extended linearly as seen in the normal direction to the one surface,
The IC chip includes a plurality of terminals (311), and includes a semiconductor chip (31) on which an IC is formed, and a plurality of rewiring layers (34) connected to each of the plurality of terminals. ,
At least a part of the plurality of rewiring layers is a high frequency rewiring layer (341) electrically connected to the high frequency wiring,
The high frequency rewiring layer extends in a straight line when viewed from the normal direction, and is disposed on a straight line formed by the high frequency wiring. The IC chip further comprises a plurality of connection portions (35) connected to the redistribution layer;
The high frequency redistribution layer is electrically connected to the high frequency wiring through the connection portion,
The semiconductor device according to claim 1, wherein the connection portion is a bump.   3. The semiconductor device according to claim 1, wherein the redistribution layer disposed at the outermost periphery among the plurality of redistribution layers when viewed from the normal direction is the high frequency redistribution layer. Taking the length of the redistribution layer as viewed from the normal direction as an offset amount,
The offset amount of the high frequency redistribution layer is the offset of the redistribution layer disposed on the inner side of the IC chip with respect to the high frequency redistribution layer in the redistribution layer when viewed from the normal direction. The semiconductor device according to any one of claims 1 to 3, which is smaller than the amount.   The semiconductor device according to any one of claims 1 to 4, wherein the high frequency rewiring layer is extended along the direction in which the contraction is the smallest among the wiring members when viewed from the normal direction. A plurality of the high frequency rewiring layers are formed,
The drawing direction of the plurality of high-frequency rewiring layers is the same, with the direction from the one end on the terminal side to the opposite end of the high-frequency rewiring layers as the drawing direction. The semiconductor device according to any one of the items. The IC chip has a rectangular plate shape,
7. The semiconductor device according to claim 6, wherein the high frequency rewiring layer is disposed along a short side direction of an outer contour of the IC chip. The IC chip has a rectangular plate shape,
7. The semiconductor device according to claim 6, wherein the high frequency rewiring layer is disposed along the long side direction of the outline of the IC chip.

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