JP2019102660A - Electronic equipment and manufacturing method for electronic equipment - Google Patents

Abstract

To integrate electronic components with high density, while shortening wiring.SOLUTION: Electronic equipment includes a resin film 10, electronic components 20a, 20b embedded in the resin film 10, and placed alternately while partially overlapping in a facing direction of a pair of principal surfaces of the resin film 10, a via 22a connected with the electronic component 20a located at one principal surface 12 side out of the pair of principal surfaces of the resin film 10 and embedded in the resin film 10, and extending between one principal surface 12 of the resin film 10 and the electronic component 20a and exposed to the one principal surface 12 of the resin film 10, and a via 22b connected with the electronic component 20b located at the other principal surface 14 side out of the pair of principal surfaces of the resin film 10 and embedded in the resin film 10, and extending between the other principal surface 12 of the resin film 10 and the electronic component 20b and exposed to the one principal surface 12 of the resin film 10.SELECTED DRAWING: Figure 1

Description

  The present invention relates to an electronic device and a method of manufacturing the electronic device.

  A fan out wafer level package (FOWLP) is known as an effective technology for high density integration of electronic components. For example, an antenna device using a reconstructed wafer (pseudo wafer) manufactured by the FOWLP technique is known (for example, Patent Document 1). Moreover, the array antenna apparatus provided with several antennas, such as a phased array antenna apparatus, is known (for example, patent documents 1 to 3).

JP, 2015-103842, A Unexamined-Japanese-Patent No. 2000-196331 International Publication No. 2017/073644

  Although FOWLP technology is an effective technology for high density integration of electronic components, there is room for improvement in further high density integration. Moreover, in order to reduce the transmission loss in wiring of the signal input-output to an electronic component, it is preferable to shorten the wiring connected to an electronic component. For example, in an array antenna device, since it becomes susceptible to the influence of transmission loss due to wiring as the frequency of a signal increases, it is possible to integrate a plurality of electronic components at a high density at intervals of a plurality of radiating elements to shorten wiring. preferable. However, since the spacing between the plurality of radiation elements becomes narrower as the signal becomes higher frequency, it is difficult in the conventional FOWLP technology to integrate a plurality of electronic components at a high density with the spacing of the plurality of radiation elements.

  In one aspect, the present invention aims to integrate electronic components at high density and shorten wiring.

  In one aspect, a first electronic component and a second electronic component embedded in a resin film and the resin film, and partially overlapping each other in a direction in which a pair of main surfaces of the resin film oppose each other are alternately arranged And the first electronic component positioned on one main surface side of the pair of main surfaces of the resin film and embedded in the resin film, and the one main surface of the resin film and the first electronic component The first via extending between the first electronic component and exposed to the one main surface of the resin film, and the other of the pair of main surfaces of the resin film are located on the other main surface side It is connected to a second electronic component and embedded in the resin film, and it extends between the one main surface of the resin film and the second electronic component and is exposed at the one main surface of the resin film And the second via.

  In one aspect, disposing a plurality of electronic components provided with conductive pillars on one main surface on a support substrate such that the plurality of electronic components are partially overlapped with each other and alternately, the plurality of electronic components and the conductive Of forming a resin film on the supporting substrate so as to embed the conductive pillars, and processing the one main surface of the resin film to expose the end face of the conductive pillars. It is a method.

  As one aspect, electronic components can be integrated at high density and wiring can be shortened.

FIG. 1 is a cross-sectional view of the electronic device according to the first embodiment. 2A to 2D are cross-sectional views (part 1) illustrating the method of manufacturing the electronic device according to the first embodiment. 3A to 3C are cross-sectional views (part 2) illustrating the method of manufacturing the electronic device according to the first embodiment. FIG. 4 (a) is a perspective view of a phased array antenna apparatus according to a second embodiment, and FIG. 4 (b) is a plan view of FIG. Fig.5 (a) is a see-through perspective view of a part of phased array antenna apparatus concerning Example 2, FIG.5 (b) is a see-through | perspective side view which looked at Fig.5 (a) from A direction. 6 (a) to 6 (d) are cross-sectional views (part 1) showing a method of manufacturing a phased array antenna apparatus according to a second embodiment. 7 (a) to 7 (d) are cross-sectional views (part 2) showing a method of manufacturing a phased array antenna apparatus according to a second embodiment. 8A and 8B are perspective views (No. 1) showing a method of manufacturing a phased array antenna apparatus according to the second embodiment. FIG. 9A and FIG. 9B are perspective views (No. 2) showing a method of manufacturing a phased array antenna apparatus according to the second embodiment.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a cross-sectional view of the electronic device according to the first embodiment. As shown in FIG. 1, the electronic device 100 according to the first embodiment includes the resin film 10, one or more electronic components 20a, one or more electronic components 20b, vias 22a connected to the electronic components 20a, and the electronic components 20b. The via 22b is connected. The resin film 10 is, for example, an epoxy resin, and may contain a filler such as an inorganic filler. Examples of the inorganic filler include aluminum oxide, silicon oxide, aluminum hydroxide, and aluminum nitride.

  The electronic components 20a and 20b are embedded in the resin film 10, and partially overlap each other in the direction in which the one main surface 12 and the other main surface 14 of the resin film 10 face each other and are alternately arranged. The electronic component 20 a is provided on one main surface 12 side of the resin film 10, and the electronic component 20 b is provided on the other main surface 14 side. The electronic components 20a and 20b are chip components such as active components such as semiconductor components using silicon or compound semiconductor, passive components such as resistors, capacitors or inductors, or sensor components such as current sensors or magnetic sensors. It may be a module including these. For example, the electronic components 20a and 20b may be integrated circuits such as monolithic microwave integrated circuits (MMICs).

  The vias 22 a are electrically connected to the electronic component 20 a and embedded in the resin film 10. The vias 22 a extend linearly between the one main surface 12 of the resin film 10 and the one main surface 24 a that is the circuit surface of the electronic component 20 a, and the end surface on the one main surface 12 of the resin film 10 Is exposed. One main surface 12 of the resin film 10 and the end surface of the via 22a are substantially the same surface. In addition, the substantially same surface includes the deviation of a manufacturing error grade (it is the same in the following).

  The vias 22 b are electrically connected to the electronic component 20 b and embedded in the resin film 10. The via 22 b extends linearly between the one main surface 12 of the resin film 10 and the one main surface 24 b which is the circuit surface of the electronic component 20 b, and the end surface on the one main surface 12 of the resin film 10 Is exposed. One main surface 12 of the resin film 10 and the end surface of the via 22b are substantially the same surface.

  The electronic component 20 a is located on one main surface 12 side of the resin film 10, and the electronic component 20 b is located on the other main surface 14 side of the resin film 10. Therefore, the via 22a extending between the electronic component 20a and the one main surface 12 of the resin film 10 is closer to the via 22b extending between the electronic component 20b and the one main surface 12 of the resin film 10 Is also shorter. The vias 22a and 22b have, for example, a cylindrical shape, but may have a prismatic shape such as a quadrangular prism or an elliptical shape. The material of the vias 22a and 22b is not particularly limited as long as it is formed of a conductive material, and is formed of, for example, a single metal such as copper, aluminum, titanium, gold, platinum, or silver or an alloy thereof.

  In a region outside the region where the electronic components 20a and 20b of the resin film 10 are provided, a through via 30 is provided which penetrates between the one main surface 12 and the other main surface 14 of the resin film 10 There is. The through via 30 has, for example, a cylindrical shape, but may have a prismatic shape such as a quadrangular prism or an elliptical shape. The through vias 30 may have a larger diameter (width) than the vias 22a and 22b. The diameter of the vias 22a and 22b is, for example, about 300 μm, and the diameter of the through via 30 is, for example, about 500 μm. The through vias 30 are formed of, for example, a single metal such as copper, aluminum, titanium, gold, platinum, or silver, or an alloy thereof.

  A metal member 32 is provided in the resin film 10 and on the other main surface 26 a of the electronic component 20 a. The metal member 32 is not provided on the other main surface 26 b of the electronic component 20 b. The surface of the metal member 32 opposite to the electronic component 20a and the other main surface 26b of the electronic component 20b are substantially the same surface. The metal member 32 is provided in the central region of the other main surface 26a of the electronic component 20a, not in the end region, and away from the side surface of the electronic component 20b.

  A metal film 34 connected to the other main surface 26 b of the electronic component 20 b and the metal member 32 is provided on the other main surface 14 of the resin film 10. The metal film 34 is thermally connected to the electronic component 20 b and the metal member 32. The metal member 32 is thermally connected to the electronic component 20a because it is provided on the other main surface 26a of the electronic component 20a. Therefore, the metal film 34 is thermally connected to the electronic components 20a and 20b.

  The metal film 34 is provided, for example, on the entire surface of the other main surface 14 of the resin film 10 and is electrically connected to the through via 30. The metal film 34 is connected to the ground through the through via 30. For example, when the electronic device 100 is mounted on a substrate or the like, the through via 30 is joined to the ground wiring of the substrate, whereby the metal film 34 is connected to the ground through the through via 30.

  FIGS. 2A to 3C are cross-sectional views showing a method of manufacturing the electronic device according to the first embodiment. As shown in FIG. 2A, a plurality of electronic components 20 in which conductive pillars 36 are provided on one main surface which is a circuit surface are prepared. The conductive pillars 36 are formed of, for example, a single metal such as copper, aluminum, titanium, gold, platinum, or silver, or an alloy of these metals.

  As shown in FIG. 2B, the metal member 32 is formed on the other main surface of the electronic component 20a among the plurality of electronic components 20. For example, the metal member 32 which is a metal plate such as a copper plate is attached onto the other main surface of the electronic component 20a. The metal member 32 is not formed on the electronic component 20 b of the plurality of electronic components 20.

  As shown in FIG. 2C, the electronic components 20a and 20b are disposed on the supporting substrate 38 so that the parts overlap with each other and alternate with each other. In addition, the conductive pillars 39 are disposed on the support substrate 38 outside the electronic components 20 a and 20 b. The conductive pillars 39 are formed of, for example, a single metal such as copper, aluminum, titanium, gold, platinum, or silver, or an alloy of these metals.

  As shown in FIG. 2D, for example, a resin such as an epoxy resin is dropped on the support substrate 38 to form the resin film 10 in which the electronic components 20a and 20b and the conductive pillars 36 and 39 are embedded.

  As shown in FIG. 3A, the resin film 10 in which the electronic components 20a and 20b and the conductive pillars 36 and 39 are embedded is peeled off from the support substrate 38.

  As shown in FIG. 3B, the main surface of the resin film 10 opposite to the main surface adhered to the support substrate 38 is processed (for example, ground), and the end surfaces of the conductive pillars 36 and 39 are resin film 10 Exposed from Thereby, the conductive pillars 36 become vias 22 a and 22 b, and the conductive pillars 39 become through vias 30.

  As shown in FIG. 3C, a metal film 34 is formed on the main surface (the main surface on the side where the conductive pillars 36 are not exposed) of the resin film 10 bonded to the support substrate 38 using, for example, a sputtering method. Form Thus, the electronic device 100 of the first embodiment is formed.

  According to the first embodiment, as shown in FIG. 1, the electronic components 20a and 20b are partially in the direction in which the pair of main surfaces (one main surface 12 and the other main surface 14) of the resin film 10 are opposed. Overlapping and arranged alternately. Thereby, the electronic components 20a and 20b can be integrated at high density as compared with the case where the electronic components 20a and 20b are provided on the same surface. Further, the via 22a connected to the electronic component 20a extends between the one main surface 12 of the resin film 10 and the electronic component 20a and is exposed to the one main surface 12 of the resin film 10. Similarly, the via 22 b connected to the electronic component 20 b extends between the one main surface 12 of the resin film 10 and the electronic component 20 b and is exposed to the one main surface 12 of the resin film 10. Thus, the wiring electrically connected to the electronic components 20a and 20b can be shortened. Therefore, according to the first embodiment, the electronic components can be integrated at high density and the wiring can be shortened.

  Further, according to the first embodiment, as shown in FIG. 2C, the supporting substrate is formed such that the electronic components 20a and 20b provided with the conductive pillars 36 on one main surface partially overlap each other and alternate with each other. Place on 38. As shown in FIG. 2D, the resin film 10 is formed on the support substrate 38 so as to embed the electronic components 20a and 20b and the conductive pillars 36. As shown in FIG. 3B, one main surface of the resin film 10 is processed to expose the end face of the conductive pillar 36. This makes it possible to obtain an electronic device in which electronic components are integrated at high density and wiring is short.

  Further, according to the first embodiment, as shown in FIG. 1, the metal member 32 embedded in the resin film 10 is provided on the other main surface 26 a of the electronic component 20 a. The metal film 34 is provided to be connected to the metal member 32 and the electronic component 20 b. Since the metal film 34 is thermally connected to the electronic components 20a and 20b, the heat generated by the electronic components 20a and 20b can be released to the metal film 34, and the heat dissipation can be improved. Such a structure can be obtained by forming a metal film 34 connected to the metal member 32 and the electronic component 20 b on the surface of the resin film 10 from which the support substrate 38 is removed as shown in FIG. .

  The metal film 34 is preferably exposed from the resin film 10 in order to improve the heat dissipation of the electronic components 20a and 20b, and preferably covers all the electronic components 20a and 20b. The metal member 32 and the metal film 34 are preferably formed of a metal having a high thermal conductivity, for example, preferably formed of copper or gold. It is preferable that the electronic component 20a and the metal member 32 be joined by a highly thermally conductive material such as TIM (Thermal Interface Material) so that heat is easily transmitted from the electronic component 20a to the metal member 32.

  Further, according to the first embodiment, as shown in FIG. 1, the metal film 34 is provided via the through via 30 provided in the region outside the region where the electronic components 20 a and 20 b of the resin film 10 are provided. Connected to ground. Thereby, even when the electronic components 20a and 20b are disposed close to each other, signal interference can be suppressed.

  Further, according to the first embodiment, as shown in FIG. 2B, the metal member 32 is formed on the other main surface of the electronic component 20a. Then, as shown in FIG. 2C, the electronic component 20a provided with the metal member 32 and the electronic component 20b not provided with the metal member 32 are superimposed on the supporting substrate 38 so that they partially overlap each other. Deploy. Thus, the plurality of electronic components can be easily arranged so as to be partially overlapped with each other.

  In the first embodiment, in view of high density integration of the electronic components 20a and 20b, the overlapping area of the electronic components 20a and 20b is preferably 1/10 or more of the area of the respective main surface, and 1/8 or more is more preferable. Preferably, 1/6 or more is more preferable. On the other hand, in order to secure the area where the vias 22b are provided, the overlapping area of the electronic components 20a and 20b is preferably 1/3 or less, more preferably 1/4 or less, of the area of the respective main surfaces. Is more preferred.

  In the second embodiment, an example in which the electronic device is a phased array antenna device will be described. FIG. 4 (a) is a perspective view of a phased array antenna apparatus according to a second embodiment, and FIG. 4 (b) is a plan view of FIG. As shown in FIGS. 4A and 4B, the phased array antenna apparatus 200 of the second embodiment includes a module 50 and an antenna substrate 52. The antenna substrate 52 includes dielectric layers 54a and 54b, a ground conductor layer 56 sandwiched therebetween, a feed line (shown in FIGS. 5A and 5B), a plurality of radiating elements 58, Have. The plurality of radiation elements 58 are provided on the surface of the dielectric layer 54 b opposite to the ground conductor layer 56. The plurality of radiation elements 58 are arranged at an equal pitch according to the frequency. The plurality of radiation elements 58 are arranged, for example, in a grid, but may be arranged in a staggered manner or the like. Moreover, although the some radiation element 58 is carrying out the rectangular shape of a square, for example, you may have other shapes, such as circular shape. The antenna substrate 52 is formed, for example, by processing a substrate in which a glass epoxy resin and a metal foil in accordance with the FR-4 (Flame Retardant type 4) standard are laminated, or a substrate in which a ceramic and a metal foil are laminated.

  Fig.5 (a) is a see-through perspective view of a part of phased array antenna apparatus concerning Example 2, FIG.5 (b) is a see-through | perspective side view which looked at Fig.5 (a) from A direction. In FIG. 5A, the portion seen through is shown by a broken line, and the metal member 32 and the metal film 34 are not shown for the sake of clarity of the drawing. Further, in FIG. 5 (b), for the sake of clarity of the figure, a portion which is seen through is also shown by solid lines and hatched. As shown in FIGS. 5A and 5B, the module 50 has the same structure as the electronic device 100 of the first embodiment except that the arrangement of the electronic components 20a and 20b is different. That is, in the electronic device 100 according to the first embodiment, the electronic components 20a and 20b are arranged in a straight line, and the vias 22a and 22b are also arranged in a straight line. On the other hand, in the module 50 of the second embodiment, the electronic component 20a and the electronic component 20b are arranged in a line in the first direction, but the electronic component 20a intersects the electronic component 20b in the first direction (for example, orthogonally ) In the second direction.

  The via 22a is joined to a feed line 60a which is a wiring layer provided on the surface of the dielectric layer 54a opposite to the ground conductor layer 56 by a joining member 23 such as a solder ball, for example. That is, the via 22a is electrically connected to the feed line 60a. The via 22b is joined to the feed line 60b, which is a wiring layer provided on the surface of the dielectric layer 54a opposite to the ground conductor layer 56, by the joining member 23 such as a solder ball, for example. That is, the via 22b is electrically connected to the feed line 60b. The through vias 30 are joined to ground wiring 64 which is a wiring layer provided on the surface of the dielectric layer 54a opposite to the ground conductor layer 56 by a joint member 23 such as a solder ball, for example. The ground wiring 64 is connected to, for example, the ground conductor layer 56. Thereby, the metal film 34 is connected to the ground through the through via 30.

  The ground conductor layer 56 is provided with a through hole 62 at a position overlapping the radiation element 58. The ground conductor layer 56 is an example of a reference potential layer held at the ground potential. The feed lines 60 a and 60 b are connected to the radiation element 58 through the dielectric layers 54 a and 54 b through the through holes 62 provided in the ground conductor layer 56. Therefore, feed lines 60 a and 60 b are not connected to ground conductor layer 56. Here, of the plurality of radiation elements 58, the radiation element connected to the feed line 60a is referred to as a radiation element 58a, and the radiation element connected to the feed line 60b is referred to as a radiation element 58b. Therefore, the radiation element 58a receives power from the feed line 60a, and the radiation element 58b receives power from the feed line 60b. The feed lines 60a and 60b may not be provided to penetrate through the dielectric layers 54a and 54b, and may be fed from the feed lines 60a and 60b to the radiation elements 58a and 58b by electromagnetic coupling.

  The electronic components 20a and 20b have phase shifters and amplifiers, and when signals (such as high frequency signals and control signals) are input from the outside, control the phase shifters and amplifiers according to the control signals in the signals. Thereby, the amplitude and phase of the high frequency signal input from the outside are adjusted. The high frequency signals whose amplitudes and phases are adjusted by the electronic components 20a and 20b are output to the feed lines 60a and 60b through the vias 22a and 22b. The high frequency signals transmitted through the feed lines 60a and 60b are fed to the radiation elements 58a and 58b, and radio waves are radiated to the space from the radiation elements 58a and 58b. In FIGS. 5 (a) and 5 (b), for the sake of clarity of the drawings, the electronic components 20a and 20b are electrically connected, and external signals (such as high frequency signals and control signals) are input. The illustration of the terminals is omitted.

  Here, as described above, both the electronic component 20a and the electronic component 20b are arranged in line in the first direction, but the electronic component 20a is shifted in the second direction with respect to the electronic component 20b. The reason for displacing the electronic component 20a in the second direction with respect to the electronic component 20b is as follows.

  That is, the electronic component 20 a is disposed on one main surface 12 side of the resin film 10, and the electronic component 20 b is disposed on the other main surface 14 side. Therefore, the via 22a connected to the electronic component 20a is shorter than the via 22b connected to the electronic component 20b. Therefore, when the electronic component 20a and the electronic component 20b are arranged in a straight line in the first direction without being shifted in the second direction, the transmission distance of the signal from the electronic component 20a to the radiating element 58a is the distance from the electronic component 20b to the radiating element 58b. It may be shorter than the transmission distance of the signal. As a result, even when a high frequency signal whose amplitude and phase are properly adjusted is output from the electronic components 20a and 20b, the radiation characteristic may be deteriorated. Therefore, in order to absorb the difference in length between the via 22a and the via 22b by the feed lines 60a and 60b, the electronic component 20a is arranged to be shifted in the second direction with respect to the electronic component 20b. That is, the length of the feed line 60a from the connection where the via 22a is connected to the feed line 60a to the radiation element 58a is greater than the length of the feed line 60b from the connection where the via 22b is connected to the feed line 60b to the radiation element 58b Also, the via 22b and the via 22a are made to be longer by approximately the same length. As a result, the sum of the lengths of the via 22a from the electronic component 20a to the radiation element 58a and the feed line 60a and the sum of the lengths of the via 22b from the electronic component 20b to the radiation element 58b and the feed line 60b can be made substantially the same. The deterioration of the radiation characteristics can be suppressed. Note that “substantially the same” means that the difference in the degree of manufacturing error is the same.

  6 (a) to 7 (d) are cross-sectional views showing a method of manufacturing a phased array antenna apparatus according to a second embodiment. FIGS. 8A to 9B are perspective views showing a method of manufacturing a phased array antenna apparatus according to the second embodiment. As shown in FIG. 6A, after forming a thermoplastic adhesive 68 on a supporting substrate 66 formed of, for example, stainless steel, the electronic chip 70 is attached to the adhesive 68. At this time, the circuit surface including the external terminal 72 of the electronic chip 70 is attached to the adhesive 68. The electronic chip 70 is, for example, an active component such as a semiconductor component, a passive component such as a resistor, or a sensor component such as a current sensor. Next, for example, a resin such as an epoxy resin is dropped onto the supporting substrate 66 and pressurized using a mold, to form a resin film 74 in which the electronic chip 70 is embedded. The pressure applied by the mold is, for example, about 10 kPa.

  As shown in FIG. 6B, by heating the adhesive 68, the resin film 74 in which the electronic chip 70 is embedded is peeled off from the support substrate 66. The heating temperature of the adhesive 68 is, for example, about 80 ° C to 170 ° C. Thereafter, the resin film 74 is fired to form the electronic chip built-in substrate 76. The baking is performed, for example, in an oven at 180 ° C. to 250 ° C. for 1 hour.

  As shown in FIG. 6C, photosensitive polyimide, for example, is applied by spin coating on the surface of the electronic chip built-in substrate 76 where the external terminals 72 are exposed, and temporary curing is performed to form an insulating film 78. Temporary curing is performed, for example, on a hot plate at 150 ° C. for 2 minutes. Next, after an opening is formed in a region overlapping the external terminal 72 in the insulating film 78 using an exposure technique, the insulating film 78 is subjected to main curing. The main curing is performed, for example, in an oven at 180 ° C. to 250 ° C. in a nitrogen atmosphere for 1 hour. The diameter of the external terminal 72 is, for example, about 500 μm, the diameter of the opening formed in the insulating film 78 is, for example, about 300 μm, and the thickness of the insulating film 78 is, for example, about 20 μm.

  Next, copper plating is performed using an electrolytic plating method to form vias 80 embedded in the openings formed in the insulating film 78 and lands 82 on the vias 80, and also form interconnections 84 connecting the electronic chips 70. Do. The land 82 has a diameter of, for example, about 500 μm and a height of, for example, about 10 μm. The width of the wiring 84 is, for example, about 200 μm and the height is, for example, about 10 μm. The formation of the vias 80, the lands 82, and the wiring 84 is performed, for example, by the following method. First, a titanium layer having a thickness of, for example, about 0.1 μm as an adhesive layer and a copper layer having a thickness of about 0.5 μm as a seed layer are deposited in this order on the insulating film 78 by sputtering. Thereafter, a resist film is applied by spin coating, and then the resist film is exposed and developed to remove the resist film in the areas where the vias 80, the lands 82, and the wirings 84 are to be formed. Electrolytic plating is performed using the resist film as a mask, and copper plating is performed on the regions where the vias 80, the lands 82, and the wirings 84 are to be formed. Next, after peeling off the resist film, the seed layer and the titanium layer in the portions not plated are removed. Thus, the vias 80, the lands 82, and the interconnections 84 are formed.

  As shown in FIG. 6D, vias 88 and lands 90 connected to the insulating film 86 and the lands 82 are formed on the insulating film 78 by using the same method as the method described with reference to FIG. 6C. The thickness of the insulating film 86 is, for example, about 20 μm. In the electroplating for forming the vias 88 and the lands 90, for example, copper plating of about 20 μm thickness, for example, nickel plating of about 3 μm thickness, for example, tin silver plating of about 10 μm thickness is performed in this order.

  As shown in FIG. 7A, a back grind tape 92 is attached to the surface of the electronic chip built-in substrate 76 where the lands 90 are exposed. Thereafter, the resin film 74 is processed (for example, ground) to expose the main surface of the electronic chip 70 from the resin film 74. The thickness of the electronic chip built-in substrate 76 after the resin film 74 is processed is, for example, about 100 μm.

  As shown in FIG. 7B, a metal film 94 is formed on the processed surface of the resin film 74 by sputtering, and then ultraviolet light is irradiated to peel the back grind tape 92 from the electronic chip built-in substrate 76. The metal film 94 is, for example, a laminated metal film of a titanium layer having a thickness of about 0.1 μm as an adhesive layer and a gold layer having a thickness of about 0.5 μm as a metal layer. Then, a member 98 having an opening 96 at a position corresponding to the land 90 is attached to the electronic chip built-in substrate 76. The member 98 is, for example, a polyvinyl alcohol plastic plate having a thickness of 400 μm, and is attached to the electronic chip embedded substrate 76 under a pressure of 20 N and a condition of 200 ° C. for 1 second. The diameter of the opening 96 provided in the member 98 is, for example, 400 μm.

  As shown in FIG. 7C, for example, a metal pin having a diameter of about 300 μm and a length of about 500 μm and having a diameter of about 500 μm and a height of about 50 μm is distributed on the member 98 and vibrates in the opening 96 by vibration. Deploy. Thereafter, the metal pins are pressed from above at a pressure of 20 N and a condition of 300 ° C. for 5 seconds to form conductive pillars 91 made of metal pins joined to the lands 90.

  As shown in FIG. 7D, the member 98 is peeled off from the electronic chip built-in substrate 76. The peeling of the member 98 is performed, for example, by immersing in warm water at 60 ° C. for 5 minutes. Thereafter, the electronic chip built-in substrate 76 is cut into a predetermined size by dicing, whereby the electronic component 20 in which the conductive pillar 91 is provided on one main surface is obtained. The size of the electronic component 20 is, for example, 8 mm square. In addition, a plurality of conductive pillars 91 among the conductive pillars 91 are terminals to which a signal (such as a high frequency signal and a control signal) is input to the electronic component 20, and a conductive pillar provided by only one is It becomes a terminal to which a signal is output from the electronic component 20.

  As shown in FIG. 8A, on the main surface opposite to the main surface on which the conductive pillar 91 of the electronic component 20a of the plurality of electronic components 20 is provided, the metal member 32 is provided via the TIM. Form. The metal member 32 is, for example, a copper plate having a thickness of about 300 μm, a length of about 8 mm, and a width of about 1.8 mm. The metal member 32 is not formed on the electronic component 20 b among the plurality of electronic components 20.

  As shown in FIG. 8 (b), after forming a thermoplastic adhesive 95 on a support substrate 93 made of, for example, stainless steel, the electronic components 20a and 20b are bonded so that they partially overlap and become staggered. Paste on agent 95. At this time, the electronic component 20a is attached to the electronic component 20b by shifting the electronic component 20b by a size substantially the same as the thickness of the metal member 32 in a direction intersecting the direction in which the electronic components 20a and 20b are aligned. In other words, the length of the conductive pillar 91 connected to the electronic component 20a after the conductive pillar 91 described later is exposed from the resin film 10 in the direction intersecting the direction in which the electronic components 20a and 20b are aligned. The electronic component 20b is attached by being shifted relative to the electronic component 20b by approximately the same length as the difference between the length of the conductive pillar 91 connected to the electronic component 20b. Also, conductive pillars 97 are attached to the adhesive 95 around the electronic components 20 a and 20 b. The conductive pillars 97 have, for example, a columnar shape with a diameter of about 500 μm and a length of about 1 mm, and are formed of a single metal such as copper, aluminum, titanium, gold, platinum, or silver, or an alloy thereof.

  As shown in FIG. 9A, for example, a resin such as an epoxy resin is dropped onto the supporting substrate 93 and pressurized using a mold, so that the resin film 10 in which the electronic components 20a and 20b and the conductive pillars 91 and 97 are embedded. Form The pressure applied by the mold is, for example, about 10 kPa.

  As shown in FIG. 9B, by heating the adhesive 95, the resin film 10 in which the electronic components 20a and 20b are embedded is peeled off from the support substrate 93. The heating temperature of the adhesive 95 is, for example, about 80 ° C. to 170 ° C. Thereafter, the resin film 10 is fired. The baking is performed, for example, in an oven at 180 ° C. to 250 ° C. for 1 hour. Next, the main surface of the resin film 10 opposite to the main surface bonded to the support substrate 93 is processed (for example, ground) to expose the end surfaces of the conductive pillars 91 and 97 from the resin film 10. Thus, the conductive pillars 91 provided by only one of the conductive pillars 91 become the vias 22 a and 22 b, and the conductive pillar 97 becomes the through via 30. The thickness of the resin film 10 after processing is, for example, 600 μm. Thereafter, a metal film 34 is formed on the main surface of the resin film 10 adhered to the support substrate 93 using, for example, a sputtering method. The metal film 34 is, for example, a laminated metal film in which a titanium layer having a thickness of 0.1 μm as an adhesive layer and a gold layer having a thickness of 0.5 μm as a metal layer are laminated. Thus, the module 50 is formed. Thereafter, the module 50 is mounted on the antenna substrate 52 prepared in advance, whereby the phased array antenna apparatus 200 of the second embodiment is formed.

  According to the second embodiment, as shown in FIGS. 5A and 5B, the antenna substrate 52 is provided on one main surface 12 of the resin film 10. The antenna substrate 52 includes a feed line 60a connected to the via 22a and a feed line 60b connected to the via 22b, a radiating element 58a receiving a feed from the feed line 60a, and a radiating element 58b receiving a feed from the feed line 60b. And. As a result, the electronic components 20a and 20b are integrated at a high density at the intervals of the radiating elements 58a and 58b, and a phased array antenna device 200 having a short wiring connected to the electronic components 20a and 20b can be obtained.

  Further, according to the second embodiment, as described with reference to FIGS. 5A and 5B, the length from the connection portion to which the via 22a of the feeding line 60a is connected to the radiation element 58a is the feeding line 60b. The length between the connection portion to which the via 22b is connected and the radiating element 58b is longer by approximately the same length as the difference between the lengths of the via 22b and the via 22a. That is, the transmission distance from the electronic component 20a to the radiating element 58a through the via 22a and the feeding line 60a of the high frequency signal and the radiating element through the via 22b and the feeding line 60b of the high frequency signal output from the electronic component 20b. The transmission distance up to 58 b is substantially the same. Therefore, the deterioration of the radiation characteristic can be suppressed.

  Further, according to the second embodiment, as shown in FIG. 8B, the electronic components 20a and 20b are disposed on the support substrate 93 so that the portions overlap with each other. At this time, the length of the conductive pillar 91 connected to the electronic component 20a after the conductive pillar 91 is exposed from the resin film 10 in the direction crossing the electronic components 20a and 20b in the direction in which the electronic components 20a and 20b are aligned. It arrange | positions on the support substrate 93 by shifting only the length substantially the same as the difference with the length of the electroconductive pillar 91 connected to the electronic component 20b. Thereby, the transmission distance to the radiating element 58a via the via 22a and the feed line 60a of the high frequency signal output from the electronic component 20a and the radiation via the via 22b and the feed line 60b of the high frequency signal output from the electronic component 20b The transmission distance to the element 58b can be made substantially the same. Therefore, the deterioration of the radiation characteristic can be suppressed.

  Further, according to the second embodiment, as shown in FIG. 6A, after arranging the plurality of electronic chips 70 on the supporting substrate 66, the resin film 74 is formed on the supporting substrate 66 so as to embed the plurality of electronic chips 70. Form As shown in FIG. 6 (b), after removing the support substrate 66, as shown in FIG. 7 (b) to FIG. 7 (d), the main surface of the electronic chip 70 on the side from which the support substrate 66 is removed is electrically conductive. By forming the conductive pillars 91, the plurality of electronic components 20 provided with the conductive pillars 91 are formed. Thereby, the electronic component 20 in which the plurality of electronic chips 70 are integrated at high density can be obtained.

  Further, according to the second embodiment, as shown in FIG. 7B, a member 98 having an opening 96 is formed on the main surface of the electronic chip 70 from which the support substrate 66 has been removed. Then, a metal pin is scattered on the member 98 and vibration is applied to arrange the metal pin in the opening 96 of the member 98, thereby forming the metal pin on the main surface of the electronic chip 70 from which the support substrate 66 is removed. The conductive pillars 91 are formed. This makes it possible to form the conductive pillar 91 whose length is sufficiently long with respect to the width.

  As mentioned above, although the embodiment of the present invention has been described in detail, the present invention is not limited to such a specific embodiment, and various modifications may be made within the scope of the subject matter of the present invention described in the claims. Changes are possible.

The following appendices will be further disclosed in connection with the above description.
(Supplementary Note 1) A resin film, and a first electronic component and a second electronic component which are embedded in the resin film, and partially arranged in an overlapping manner in a direction in which a pair of main surfaces of the resin film oppose each other A first electronic component positioned on one principal surface side of the pair of principal surfaces of the resin film is connected and embedded in the resin film, and the one principal surface of the resin film and the first The first via extending between the first electronic component and the first main surface of the resin film and the other of the main surfaces of the pair of main surfaces of the resin film [2] It is connected to the electronic component and embedded in the resin film, and it extends between the one main surface of the resin film and the second electronic component and is exposed at the one main surface of the resin film And a second via.
(Supplementary Note 2) A metal member provided on the main surface of the first electronic component opposite to the main surface provided with the first via, and embedded in the resin film, the metal member, and the first metal component The electronic device according to claim 1, further comprising: a metal film connected to a main surface opposite to the main surface provided with the second via of the two electronic components.
(Supplementary Note 3) The electronic device according to Supplementary note 2, wherein the metal film is exposed from the resin film.
(Supplementary Note 4) The resin film is penetrated from the one main surface to the other main surface in a region outside the region where the first electronic component and the second electronic component are provided in the resin film. The electronic device according to claim 2 or 3, further comprising a through via, wherein the metal film is connected to a ground via the through via.
(Supplementary Note 5) A first feed line provided on the one main surface of the resin film, and a second feed line connected to the first via and a second feed line connected to the second via, and the first feed line The electronic device according to any one of appendices 1 to 4, comprising: a substrate having a first radiation element receiving power from the second power source and a second radiation element receiving power from the second power supply line.
(Supplementary Note 6) A transmission distance in which a signal output from the first electronic component is transmitted to the first radiation element through the first via and the first feed line, and a signal output from the second electronic component The electronic device according to claim 5, wherein a transmission distance of the second radiation element transmitted to the second radiation element through the second via and the second feed line is substantially the same.
(Supplementary Note 7) The length of the first via is shorter than the length of the second via, and the length from the connection portion to which the first via of the first feed line is connected to the first radiation element is Note that the length between the second via and the first via is substantially the same as the difference between the length of the connection between the second via of the second feed line and the second radiating element, and the length between the second via and the first via. The electronic device according to 5 or 6.
(Supplementary Note 8) A step of arranging a plurality of electronic components in which conductive pillars are provided on one main surface on the first support substrate such that a part thereof overlaps and alternates, the plurality of electronic components and the above Forming a first resin film on the first support substrate so as to embed the conductive pillar; and processing one main surface of the first resin film to expose the end face of the conductive pillar; And a method of manufacturing an electronic device.
(Supplementary Note 9) A step of forming a metal member on the other main surface of the first electronic component of the plurality of electronic components, and disposing the plurality of electronic components on the first support substrate, The first support substrate so that the first electronic component in which the metal member of the plurality of electronic components is formed and the second electronic component in which the metal member is not formed are partially overlapped and alternate with each other. 24. A method of manufacturing an electronic device according to appendix 8, comprising the step of disposing on top.
(Supplementary Note 10) The step of removing the first support substrate, and after removing the first support substrate, the metal member and the second on the surface of the first resin film from which the first support substrate has been removed. The method of manufacturing an electronic device according to claim 9, comprising the step of forming a metal film connected to the other main surface of the electronic component.
(Supplementary Note 11) In the step of arranging the plurality of electronic components on the first support substrate, the first electronic component positioned on the one main surface side of the first resin film of the plurality of electronic components and The second electronic component positioned on the other main surface side of the first resin film is partially overlapped with each other in a direction intersecting with a direction in which the first electronic component and the second electronic component are arranged in a line. The length of the conductive pillar connected to the first electronic component and the length of the conductive pillar connected to the second electronic component after the end face of the conductive pillar is exposed from the first resin film 10. A method of manufacturing an electronic device according to any one of appendices 8 to 10, including the step of disposing on the first support substrate while being shifted by approximately the same length as the difference.
(Supplementary Note 12) A step of arranging a plurality of electronic chips on a second support substrate, a step of forming a second resin film on the second support substrate so as to embed the plurality of electronic chips, and the second resin After forming the film, the conductive pillar is formed by removing the second support substrate, and forming the conductive pillar on the main surface of the plurality of electronic chips from which the second support substrate is removed. The method for manufacturing the electronic device according to any one of Appendices 8 to 11, further comprising the step of forming the plurality of electronic components provided with the elastic pillars.
(Supplementary Note 13) In the step of forming the plurality of electronic components provided with the conductive pillar, a member having an opening is formed on the main surface of the plurality of electronic chips from which the second support substrate is removed. Forming a plurality of electronic components provided with the conductive pillars composed of the metal pins by dispersing metal pins on the member and applying vibration to arrange the metal pins in the opening of the member A method of manufacturing an electronic device according to claim 12, comprising the steps of:

DESCRIPTION OF SYMBOLS 10 resin film 12 one main surface of resin film 14 other main surface of resin film 20-20b electronic component 22a, 22b via 24a, 24b one main surface of electronic component 26a, 26b other main surface of electronic component 30 penetration Via 32 Metal member 34 Metal film 36, 39 Conductive pillar 38 Support substrate 50 Module 52 Antenna substrate 54a, 54b Dielectric layer 56 Ground conductor layer 58 to 58b Radiation element 60a, 60b Feeding line 62 Through hole 64 Ground wiring 66, 93 Support substrate 70 electronic chip 74 resin film 91, 97 conductive pillar 94 metal film 96 opening 98 member 100 electronic device 200 phased array antenna device

Claims (10)

Resin film,
A first electronic component and a second electronic component embedded in the resin film, and partially and alternately arranged in a direction in which the main surfaces of the resin film face each other in a facing direction;
It is connected to the first electronic component positioned on one principal surface side of the pair of principal surfaces of the resin film and embedded in the resin film, and the one principal surface of the resin film and the first A first via extending between the electronic component and exposed on the one main surface of the resin film;
It is connected to the second electronic component positioned on the other main surface side of the pair of main surfaces of the resin film and embedded in the resin film, and the one main surface of the resin film and the second An electronic device comprising: a second via that extends between an electronic component and is exposed on the one main surface of the resin film. A metal member provided on the main surface opposite to the main surface on which the first via of the first electronic component is provided, and embedded in the resin film;
The electronic device according to claim 1, further comprising: a metal film connected to a main surface opposite to the main surface on which the metal member and the second via of the second electronic component are provided. The resin film is provided with a through via penetrating from the one main surface of the resin film to the other main surface in a region outside the region where the first electronic component and the second electronic component are provided in the resin film. ,
The electronic device according to claim 2, wherein the metal film is connected to a ground via the through via.   A first feed line provided on the one main surface of the resin film and a second feed line connected to the first via and a second feed line connected to the second via; and feeding from the first feed line The electronic device according to any one of claims 1 to 3, further comprising: a substrate having: a first radiation element to be received; and a second radiation element to be fed from the second feed line.   A transmission distance in which a signal output from the first electronic component is transmitted to the first radiation element through the first via and the first feed line, and a signal output from the second electronic component are the second The electronic device according to claim 4, wherein a transmission distance transmitted to the second radiation element through the via and the second feed line is substantially the same. The length of the first via is shorter than the length of the second via,
The length from the connection portion connected to the first via of the first feed line to the first radiation element is the length from the connection portion connected to the second via of the second feed line to the second radiation element The electronic device according to claim 4 or 5, wherein the length of the second via and the length of the first via are substantially the same as the length difference between the second via and the first via. Arranging a plurality of electronic components provided with conductive pillars on one main surface on the support substrate so that they partially overlap and are alternately arranged;
Forming a resin film on the support substrate so as to embed the plurality of electronic components and the conductive pillar;
And D. processing the one main surface of the resin film to expose the end face of the conductive pillar. Forming a metal member on the other main surface of the first electronic component of the plurality of electronic components;
In the step of arranging the plurality of electronic components on the support substrate, the first electronic component in which the metal member is formed among the plurality of electronic components and a second electronic component in which the metal member is not formed 8. A method of manufacturing an electronic device according to claim 7, further comprising the step of: arranging on the supporting substrate such that the portions thereof overlap each other and alternate with each other. Removing the support substrate;
Forming a metal film connected to the other main surface of the metal member and the second electronic component on the surface of the resin film from which the support substrate has been removed after the support substrate is removed; A method of manufacturing an electronic device according to claim 8.   In the step of arranging the plurality of electronic components on the support substrate, the first electronic component positioned on the one main surface side of the resin film of the plurality of electronic components and the other main surface of the resin film The end face of the conductive pillar is from the resin film in a direction in which the second electronic component located on the side is partially overlapped and alternated with the direction in which the first electronic component and the second electronic component are aligned. The supporting substrate is shifted by approximately the same length as the difference between the length of the conductive pillar connected to the first electronic component and the length of the conductive pillar connected to the second electronic component after being exposed A method of manufacturing an electronic device according to any one of claims 7 to 9, comprising the step of disposing on top.

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