JP2019068648A - Inverter device - Google Patents

Inverter device Download PDF

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Publication number
JP2019068648A
JP2019068648A JP2017192834A JP2017192834A JP2019068648A JP 2019068648 A JP2019068648 A JP 2019068648A JP 2017192834 A JP2017192834 A JP 2017192834A JP 2017192834 A JP2017192834 A JP 2017192834A JP 2019068648 A JP2019068648 A JP 2019068648A
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JP
Japan
Prior art keywords
switching element
arm switching
emitter
lower arm
phase
Prior art date
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Withdrawn
Application number
JP2017192834A
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Japanese (ja)
Inventor
賢治 早川
Kenji Hayakawa
賢治 早川
洋史 湯口
Hiroshi Yuguchi
洋史 湯口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toyota Industries Corp
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Toyota Industries Corp
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Publication date
Application filed by Toyota Industries Corp filed Critical Toyota Industries Corp
Priority to JP2017192834A priority Critical patent/JP2019068648A/en
Priority to CN201811122349.7A priority patent/CN109600053A/en
Priority to DE102018124030.9A priority patent/DE102018124030A1/en
Publication of JP2019068648A publication Critical patent/JP2019068648A/en
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Inverter Devices (AREA)

Abstract

To provide an inverter device capable of achieving compaction of switching element while restraining unbalance of the switching element.SOLUTION: An inverter device includes a main circuit board 40 and a control board, where conductive plates for wiring 90, 92, 94, 96, 98, 100 are joined directly to the emitter electrodes in the switching elements Q1, Q3, Q5 for upper arm and the switching elements Q2, Q4, Q6 for lower arm of three phases U, V, W, auxiliary emitters 91, 93, 95, 97, 99, 101 branched from the conductive plates for wiring 90, 92, 94, 96, 98, 100 are connected with control terminals 53, 54, 59, 60, 64, 66, which extend from the main circuit board 40 to the control board and connected electrically with a driver.SELECTED DRAWING: Figure 3

Description

本発明は、インバータ装置に関するものである。   The present invention relates to an inverter device.

車載用電動圧縮機等においてモータがインバータ装置によって駆動されることにより圧縮機構によって冷媒が圧縮される。三相インバータ装置は、Ｕ、Ｖ、Ｗの相毎にそれぞれ、正極母線と負極母線との間に上アーム用スイッチング素子と下アーム用スイッチング素子が直列接続されている。この種の技術として、特許文献１にはパワーモジュールの上面の電極パッドと外部エミッタ端子とをボンディングワイヤで接続したりボンディングワイヤに代えてはんだで直接接合することが開示されている。   In the on-vehicle motor-driven compressor or the like, the refrigerant is compressed by the compression mechanism as the motor is driven by the inverter device. In the three-phase inverter device, an upper arm switching element and a lower arm switching element are connected in series between the positive electrode bus and the negative electrode bus for each of U, V, and W phases. As a technique of this type, Patent Document 1 discloses that an electrode pad on the upper surface of a power module and an external emitter terminal are connected by bonding wires or directly bonded by solder instead of bonding wires.

特開２００３−３１７６５号公報Unexamined-Japanese-Patent No. 2003-31765

ところで、Ｕ、Ｖ、Ｗの各相の上下のアーム用スイッチング素子はドライバにより駆動される。各スイッチング素子は主回路基板に搭載され、ドライバは制御基板に搭載される。スイッチング素子としてＩＧＢＴを用いた場合においてＩＧＢＴのスイッチングの高速化及び安定的な動作のためにＩＧＢＴのエミッタからドライバまでの配線経路を短くすべくＩＧＢＴの上面に補助エミッタ用パッドを設けてボンディングワイヤを介してドライバと接続する。ところが、ＩＧＢＴの補助エミッタ用パッドが小型化の阻害要因になってしまう。また、Ｕ、Ｖ、Ｗの相間のエミッタ配線経路のアンバランスのみならず上下のアーム間のエミッタ配線経路のアンバランスを抑制する必要がある。   The upper and lower arm switching elements of each phase of U, V, and W are driven by a driver. Each switching element is mounted on the main circuit board, and the driver is mounted on the control board. When an IGBT is used as a switching element, an auxiliary emitter pad is provided on the upper surface of the IGBT to shorten a wiring path from the emitter of the IGBT to the driver for high speed switching and stable operation of the IGBT, and a bonding wire is provided. Connect with the driver via However, the auxiliary emitter pad of the IGBT is an obstacle to miniaturization. In addition, it is necessary to suppress not only the unbalance of the emitter wiring path between the U, V, and W phases, but also the unbalance of the emitter wiring path between the upper and lower arms.

本発明の目的は、スイッチング素子の小型化を図るとともにエミッタ配線経路のアンバランスを抑制することができるインバータ装置を提供することにある。   An object of the present invention is to provide an inverter device capable of reducing the size of a switching element and suppressing unbalance of an emitter wiring path.

請求項１に記載の発明では、正極母線と負極母線との間に上アーム用スイッチング素子と下アーム用スイッチング素子が直列接続されたＵ、Ｖ、Ｗの三相、それぞれについて、前記上アーム用スイッチング素子と前記下アーム用スイッチング素子とを、隣接して配置された状態で搭載した主回路基板と、前記Ｕ、Ｖ、Ｗの三相、それぞれについて、前記上アーム用スイッチング素子と前記下アーム用スイッチング素子を駆動するドライバを、対応する前記上アーム用スイッチング素子と前記下アーム用スイッチング素子に対向配置された状態で搭載した制御基板と、を備え、前記Ｕ、Ｖ、Ｗの三相、それぞれについて、前記上アーム用スイッチング素子及び前記下アーム用スイッチング素子におけるエミッタ電極に配線用導電板が直接接合され、前記配線用導電板から分岐する補助エミッタが制御端子に接続され、前記制御端子が前記主回路基板から前記制御基板に延び、前記ドライバに電気的に接続されてなることを要旨とする。   In the invention according to claim 1, three phases of U, V and W in which an upper arm switching element and a lower arm switching element are connected in series between a positive electrode bus and a negative electrode bus are respectively used for the upper arm The main circuit board on which the switching element and the lower arm switching element are disposed adjacent to each other, and the three phases of U, V, and W, respectively, the upper arm switching element and the lower arm A driver for driving the switching element for the upper arm and a control board mounted in a state of being disposed opposite to the switching element for the lower arm, and the three phases of U, V and W, In each of them, the conductive plate for wiring is directly joined to the emitter electrode in the upper arm switching element and the lower arm switching element. , Auxiliary emitter branched from the wiring conductive plate is connected to the control terminal, the control terminal extends to the control board from the main circuit board, and summarized in that become electrically connected to the driver.

請求項１に記載の発明によれば、主回路基板において上アーム用スイッチング素子と下アーム用スイッチング素子とが隣接して配置されるとともにドライバが上アーム用スイッチング素子と下アーム用スイッチング素子に対向配置された状態で制御基板に搭載されており、エミッタ電極に直接接合された配線用導電板から分岐する補助エミッタを介してドライバに電気的に接続されていることにより、スイッチング素子のエミッタからドライバまでの経路が短くなり、Ｕ、Ｖ、Ｗの相間のエミッタ配線経路、及び、上下のアーム間のエミッタ配線経路を短くしてエミッタ配線経路のアンバランスを抑制することが可能となる。また、スイッチング素子の上面に補助エミッタ用パッドを設けてボンディングワイヤを介してドライバと接続する場合に比べ、補助エミッタ用パッドを不要にでき小型化が図られる。その結果、スイッチング素子の小型化を図るとともにエミッタ配線経路のアンバランスを抑制することができる。   According to the first aspect of the present invention, the upper arm switching element and the lower arm switching element are disposed adjacent to each other on the main circuit board and the driver faces the upper arm switching element and the lower arm switching element. The driver is electrically connected to the driver via the auxiliary emitter which is mounted on the control substrate in a state of being arranged and which branches from the conductive plate for wiring directly joined to the emitter electrode, whereby the driver from the emitter of the switching element is driven. It becomes possible to reduce the unbalance of the emitter wiring path by shortening the path to the emitter wiring path between the U, V and W phases and the emitter wiring path between the upper and lower arms. Further, as compared with the case where the pad for the auxiliary emitter is provided on the upper surface of the switching element and connected to the driver through the bonding wire, the pad for the auxiliary emitter can be made unnecessary and miniaturization can be achieved. As a result, it is possible to miniaturize the switching element and to suppress the unbalance of the emitter wiring path.

請求項２に記載のように、請求項１に記載のインバータ装置において、前記制御基板はメイングランド基準で動作する電流検出用回路が相別に設けられ、シャント抵抗が、負極母線と下アーム用スイッチング素子のエミッタ端子との間に配置され、前記シャント抵抗のエミッタ端子側から前記補助エミッタが分岐し、前記シャント抵抗の両端は前記電流検出用回路に接続され、前記下アーム用スイッチング素子は、メイングランドとは別の補助エミッタ用グランド基準で駆動するとよい。   As described in claim 2, in the inverter device according to claim 1, the control substrate is provided with a circuit for current detection operating on a main ground basis, and a shunt resistor is provided for switching between the negative electrode bus and the lower arm. The auxiliary emitter is disposed between the emitter terminal of the element and the emitter terminal side of the shunt resistor, both ends of the shunt resistor are connected to the current detection circuit, and the lower arm switching element is a main It is preferable to drive with a ground reference for an auxiliary emitter other than the ground.

請求項３に記載のように、請求項１又は２に記載のインバータ装置において、前記制御端子は、三相整列し、前記上アーム用スイッチング素子と前記下アーム用スイッチング素子も整列しているとよい。   As described in claim 3, in the inverter device according to claim 1 or 2, the control terminals are aligned in three phases, and the upper arm switching element and the lower arm switching element are also aligned. Good.

本発明によれば、スイッチング素子の小型化を図るとともにエミッタ配線経路のアンバランスを抑制することができる。   According to the present invention, it is possible to miniaturize the switching element and to suppress the unbalance of the emitter wiring path.

電動圧縮機の一部を破断して示す側面図。The side view which fractures and shows a part of electric compressor. 図１のＡ−Ａ線での断面図。Sectional drawing in the AA of FIG. （ａ）はパワーモジュールの平面図、（ｂ）は（ａ）のＢ−Ｂ線でのパワーモジュールの正面図。(A) is a top view of a power module, (b) is a front view of a power module in the BB line of (a). パワーモジュールの斜視図。The perspective view of a power module. （ａ）はパワーモジュールの一部平面図、（ｂ）はパワーモジュールの一部側面図。(A) is a partial top view of a power module, (b) is a partial side view of a power module. 実施形態のインバータ装置の電気的構成を示す回路図。The circuit diagram which shows the electric constitution of the inverter apparatus of embodiment. 実施形態の制御基板の概略平面図。The schematic plan view of the control board of an embodiment. 実施形態におけるターンオフ時のゲート・エミッタ電圧、コレクタ電流、コレクタ・エミッタ電圧の測定結果を示す図。The figure which shows the measurement result of the gate emitter voltage at the time of turn-off in embodiment, collector current, and collector emitter voltage. 比較例の制御基板の概略平面図。The schematic plan view of the control board of a comparative example. 比較例のインバータ装置の電気的構成を示す回路図。The circuit diagram which shows the electric constitution of the inverter apparatus of a comparative example. 比較例におけるターンオフ時のゲート・エミッタ電圧、コレクタ電流、コレクタ・エミッタ電圧の測定結果を示す図。The figure which shows the measurement result of the gate emitter voltage at the time of turn-off in a comparative example, collector current, and collector emitter voltage.

以下、本発明を車載用の電動圧縮機に具体化した一実施形態を図面に従って説明する。
図１に示すように、電動圧縮機１０は、圧縮機構（例えばスクロール圧縮機構）１１と、モータ部１２と、モータ部１２の三相交流モータ１３を駆動する三相インバータ装置１４とが三相交流モータ１３の軸方向であるＺ方向に並んでいる。電動圧縮機１０は、ハウジング１５を有している。筒型のハウジング１５の内部に、冷媒を圧縮する圧縮機構１１、及び、圧縮機構１１を駆動するモータ部１２が収納され、軸方向であるＺ方向一端側に仕切壁１５ａを設けて閉塞されている。仕切壁１５ａは円板状をなしている。 An embodiment of the present invention embodied in an on-vehicle electric compressor will be described below with reference to the drawings.
As shown in FIG. 1, the electric compressor 10 includes a compression mechanism (for example, a scroll compression mechanism) 11, a motor unit 12, and a three-phase inverter device 14 for driving a three-phase AC motor 13 of the motor unit 12. They are aligned in the Z direction which is the axial direction of the AC motor 13. The electric compressor 10 has a housing 15. A compression mechanism 11 for compressing a refrigerant and a motor unit 12 for driving the compression mechanism 11 are housed inside a cylindrical housing 15, and a partition wall 15a is provided on one end side in the Z direction which is an axial direction to be closed. There is. The partition wall 15a has a disk shape.

ハウジング１５は、有底円筒状の第１ハウジング１６と、第１ハウジング１６の開口部に設けられる有蓋円筒状の第２ハウジング１７とを有している。第１ハウジング１６と第２ハウジング１７とは例えばアルミ材料よりなる。ハウジング１５は、第１ハウジング１６と第２ハウジング１７とを連結することで構成されている。第１ハウジング１６には、第１ハウジング１６内に冷媒を流入させる流入口１８が第１ハウジング１６の径方向に貫通して設けられている。第１ハウジング１６に圧縮機構１１とモータ部１２が収容されている。   The housing 15 has a bottomed cylindrical first housing 16 and a covered cylindrical second housing 17 provided in the opening of the first housing 16. The first housing 16 and the second housing 17 are made of, for example, an aluminum material. The housing 15 is configured by connecting the first housing 16 and the second housing 17. The first housing 16 is provided with an inlet 18 which allows the refrigerant to flow into the first housing 16 in the radial direction of the first housing 16. The compression mechanism 11 and the motor unit 12 are accommodated in the first housing 16.

三相交流モータ１３は、シャフト１３ａがベアリングボックス１３ｂ内のベアリングにより回転可能に支持されている。また、三相交流モータ１３は、シャフト１３ａに固定されたロータ１３ｃと、ロータ１３ｃの外周側において第１ハウジング１６に固定されたステータ１３ｄを有する。ステータ１３ｄのステータコアにコイル１３ｅが巻回されている。   In the three-phase AC motor 13, a shaft 13a is rotatably supported by a bearing in a bearing box 13b. Further, the three-phase alternating current motor 13 has a rotor 13c fixed to the shaft 13a, and a stator 13d fixed to the first housing 16 on the outer peripheral side of the rotor 13c. A coil 13e is wound around the stator core of the stator 13d.

図１及び図２に示すように、第１ハウジング１６の軸方向であるＺ方向の外表面（第１ハウジング１６の軸方向であるＺ方向の端面）には、三相交流モータ１３を駆動させる三相インバータ装置１４が配置されている。三相インバータ装置１４は、有蓋円筒状のカバー１９で覆われている。詳しくは、第１ハウジング１６の端部に軸方向であるＺ方向から、有蓋円筒状のカバー１９を嵌めることにより三相インバータ装置１４がカバー１９で覆われ、この状態でカバー１９が第１ハウジング１６にネジ等により固定されている。カバー１９は例えばアルミ材料よりなる。また、樹脂でコーティングされた鉄製材料でもよい。   As shown in FIGS. 1 and 2, the three-phase alternating current motor 13 is driven on the outer surface in the Z direction which is the axial direction of the first housing 16 (the end surface in the Z direction which is the axial direction of the first housing 16). Three-phase inverter device 14 is arranged. The three-phase inverter device 14 is covered by a covered cylindrical cover 19. More specifically, the three-phase inverter device 14 is covered with the cover 19 by fitting the cylindrical cover 19 with a lid in the Z direction, which is the axial direction, to the end of the first housing 16. In this state, the cover 19 is the first housing It is fixed to 16 by a screw or the like. The cover 19 is made of, for example, an aluminum material. Alternatively, it may be an iron material coated with a resin.

インバータ装置１４はパワーモジュール２０を含む。パワーモジュール２０により図６のインバータ回路２１が構成されている。パワーモジュール２０には、アームを構成するパワー素子（図６のスイッチング素子Ｑ１〜Ｑ６及びダイオードＤ１〜Ｄ６）が内蔵されている。   The inverter device 14 includes a power module 20. The power module 20 constitutes the inverter circuit 21 of FIG. The power module 20 incorporates power elements (switching elements Q1 to Q6 and diodes D1 to D6 in FIG. 6) that constitute an arm.

図６に示すように、インバータ装置１４は、インバータ回路２１とインバータ制御装置２２とコイル２３とコンデンサ２４を備えている。インバータ制御装置２２は相毎のドライバ２５，２６，２７を備えている。ドライバ２５がＵ相用ドライバであり、ドライバ２６がＶ相用ドライバであり、ドライバ２７がＷ相用ドライバである。ドライバ２５，２６，２７としてＩＣ化されたチップ（ＩＣチップ）を用いている。   As shown in FIG. 6, the inverter device 14 includes an inverter circuit 21, an inverter control device 22, a coil 23, and a capacitor 24. The inverter controller 22 is provided with drivers 25 26 and 27 for each phase. The driver 25 is a U-phase driver, the driver 26 is a V-phase driver, and the driver 27 is a W-phase driver. An IC chip (IC chip) is used as the drivers 25, 26 and 27.

インバータ回路２１は、６つのスイッチング素子Ｑ１〜Ｑ６と６つのダイオードＤ１〜Ｄ６を有する。スイッチング素子Ｑ１〜Ｑ６としてＩＧＢＴを用いている。正極母線Ｌｐと負極母線Ｌｎとの間に、Ｕ相上アームを構成するスイッチング素子Ｑ１と、Ｕ相下アームを構成するスイッチング素子Ｑ２が直列接続されている。正極母線Ｌｐと負極母線Ｌｎとの間に、Ｖ相上アームを構成するスイッチング素子Ｑ３と、Ｖ相下アームを構成するスイッチング素子Ｑ４が直列接続されている。正極母線Ｌｐと負極母線Ｌｎとの間に、Ｗ相上アームを構成するスイッチング素子Ｑ５と、Ｗ相下アームを構成するスイッチング素子Ｑ６が直列接続されている。スイッチング素子Ｑ１〜Ｑ６にはダイオードＤ１〜Ｄ６が逆並列接続されている。正極母線Ｌｐ、負極母線Ｌｎには直流電源としての車載バッテリ２８が接続される。車載バッテリ２８は高圧、例えば６００Ｖバッテリである。   The inverter circuit 21 has six switching elements Q1 to Q6 and six diodes D1 to D6. IGBTs are used as the switching elements Q1 to Q6. Between the positive electrode bus Lp and the negative electrode bus Ln, the switching element Q1 forming the U-phase upper arm and the switching element Q2 forming the U-phase lower arm are connected in series. Between the positive electrode bus Lp and the negative electrode bus Ln, the switching element Q3 forming the V-phase upper arm and the switching element Q4 forming the V-phase lower arm are connected in series. Between the positive electrode bus Lp and the negative electrode bus Ln, a switching element Q5 that constitutes a W-phase upper arm and a switching element Q6 that constitutes a W-phase lower arm are connected in series. Diodes D1 to D6 are connected in antiparallel to the switching elements Q1 to Q6. An on-vehicle battery 28 as a DC power supply is connected to the positive electrode bus Lp and the negative electrode bus Ln. The on-vehicle battery 28 is a high voltage, for example, a 600 V battery.

スイッチング素子Ｑ１とスイッチング素子Ｑ２の間が三相交流モータ１３のＵ相端子に接続される。スイッチング素子Ｑ３とスイッチング素子Ｑ４の間がモータ１３のＶ相端子に接続される。スイッチング素子Ｑ５とスイッチング素子Ｑ６の間がモータ１３のＷ相端子に接続される。上下のアームを構成するスイッチング素子Ｑ１〜Ｑ６及びダイオードＤ１〜Ｄ６を有するインバータ回路２１は、スイッチング素子Ｑ１〜Ｑ６のスイッチング動作に伴い車載バッテリ２８の電圧である直流電圧を交流電圧に変換してモータ１３に供給することができるようになっている。   The U-phase terminal of the three-phase AC motor 13 is connected between the switching element Q1 and the switching element Q2. The V phase terminal of the motor 13 is connected between the switching element Q3 and the switching element Q4. The W phase terminal of the motor 13 is connected between the switching element Q5 and the switching element Q6. The inverter circuit 21 having the switching elements Q1 to Q6 and the diodes D1 to D6 constituting the upper and lower arms converts a DC voltage, which is a voltage of the on-board battery 28, into an AC voltage in accordance with the switching operation of the switching elements Q1 to Q6. It is designed to be able to supply thirteen.

スイッチング素子Ｑ１，Ｑ２のゲート端子にはＵ相用のドライバ２５が接続されている。スイッチング素子Ｑ３，Ｑ４のゲート端子にはＶ相用のドライバ２６が接続されている。スイッチング素子Ｑ５，Ｑ６のゲート端子にはＷ相用のドライバ２７が接続されている。各ドライバ２５，２６，２７は、スイッチング素子Ｑ１〜Ｑ６をスイッチング動作させる。つまり、インバータ回路２１は、スイッチング素子Ｑ１〜Ｑ６及びダイオードＤ１〜Ｄ６により、各相の上下のアームを構成しており、スイッチング素子Ｑ１〜Ｑ６のスイッチング動作により車載バッテリ２８から供給される直流を適宜の周波数の三相交流に変換して三相交流モータ１３の各相のコイル（図１のコイル１３ｅ）に供給する。即ち、スイッチング素子Ｑ１〜Ｑ６のスイッチング動作により三相交流モータ１３の各相のコイル（図１のコイル１３ｅ）が通電されて三相交流モータ１３を駆動することができる。   A U-phase driver 25 is connected to gate terminals of the switching elements Q1 and Q2. A driver 26 for the V phase is connected to the gate terminals of the switching elements Q3 and Q4. The driver 27 for the W phase is connected to the gate terminals of the switching elements Q5 and Q6. The drivers 25, 26 and 27 perform switching operation of the switching elements Q1 to Q6. That is, the inverter circuit 21 constitutes upper and lower arms of each phase by the switching elements Q1 to Q6 and the diodes D1 to D6, and the direct current supplied from the on-board battery 28 by the switching operation of the switching elements Q1 to Q6 is appropriately selected. It converts into three-phase alternating current of the frequency of, and supplies it to the coil (coil 13e of FIG. 1) of each phase of the three-phase alternating current motor 13. That is, the coil (coil 13e of FIG. 1) of each phase of the three-phase AC motor 13 is energized by the switching operation of the switching elements Q1 to Q6 to drive the three-phase AC motor 13.

スイッチング素子Ｑ２のエミッタ端子と負極母線Ｌｎとの間には電流検出用のシャント抵抗Ｒｓ１が接続されている。スイッチング素子Ｑ４のエミッタ端子と負極母線Ｌｎとの間には電流検出用のシャント抵抗Ｒｓ２が接続されている。スイッチング素子Ｑ６のエミッタ端子と負極母線Ｌｎとの間には電流検出用のシャント抵抗Ｒｓ３が接続されている。   A shunt resistor Rs1 for current detection is connected between the emitter terminal of the switching element Q2 and the negative electrode bus Ln. A shunt resistor Rs2 for current detection is connected between the emitter terminal of the switching element Q4 and the negative electrode bus Ln. A shunt resistor Rs3 for current detection is connected between the emitter terminal of the switching element Q6 and the negative electrode bus Ln.

制御基板３０（図１参照）はメイングランド１１０基準で動作する電流検出用回路としてのＩＣ（３５，３６，３７）が相別に設けられ、シャント抵抗Ｒｓ１，Ｒｓ２，Ｒｓ３の両端は電流検出用回路としてのＩＣ３５，３６，３７に接続されている。詳しくは、インバータ制御装置２２には電流検出回路としての電流検出用のＩＣ３５が備えられ、シャント抵抗Ｒｓ１の両端間の電圧を検知する。同様に、インバータ制御装置２２には電流検出用のＩＣ３６が備えられ、シャント抵抗Ｒｓ２の両端間の電圧を検知する。インバータ制御装置２２には電流検出用のＩＣ３７が備えられ、シャント抵抗Ｒｓ３の両端間の電圧を検知する。各電流検出用のＩＣ３５，３６，３７は、このように検知した各シャント抵抗の両端電圧から、Ｕ相電流、Ｖ相電流、Ｗ相電流を検出してスイッチング素子Ｑ１〜Ｑ６の制御に反映させる。各ドライバ２５，２６，２７および各電流検出用のＩＣ３５，３６，３７には図示しない制御電源が供給されている。   The control board 30 (see FIG. 1) is provided with an IC (35, 36, 37) as a current detection circuit operating on the basis of the main ground 110 for each phase, and both ends of the shunt resistors Rs1, Rs2, Rs3 are current detection circuits. Are connected to the ICs 35, 36, 37. Specifically, the inverter control device 22 is provided with a current detection IC 35 as a current detection circuit, and detects a voltage across the shunt resistor Rs1. Similarly, the inverter controller 22 is provided with an IC 36 for current detection, and detects a voltage across the shunt resistor Rs2. The inverter controller 22 is provided with an IC 37 for current detection, and detects a voltage across the shunt resistor Rs3. The ICs 35, 36, 37 for current detection detect the U-phase current, the V-phase current, and the W-phase current from the voltage across each of the shunt resistors detected in this way and reflect them in the control of the switching elements Q1 to Q6. . A control power supply (not shown) is supplied to the drivers 25, 26, 27 and the ICs 35, 36, 37 for current detection.

インバータ回路２１の入力側には、コイル２３とコンデンサ２４からなるフィルタ回路が設けられている。コンデンサ２４には例えばフィルムコンデンサが用いられる。コンデンサ２４の一端は正極母線Ｌｐに、他端は負極母線Ｌｎに接続されている。コイル２３の一端は車載バッテリ２８の正極端子側に、他端は正極母線Ｌｐ側に接続されている。   A filter circuit including a coil 23 and a capacitor 24 is provided on the input side of the inverter circuit 21. For example, a film capacitor is used for the capacitor 24. One end of the capacitor 24 is connected to the positive electrode bus Lp, and the other end is connected to the negative electrode bus Ln. One end of the coil 23 is connected to the positive electrode terminal side of the in-vehicle battery 28, and the other end is connected to the positive electrode bus Lp side.

次に、インバータ装置１４の構造について説明する。
図１，２に示すように、インバータ装置１４には、パワーモジュール２０、コイル２３、コンデンサ２４、制御基板３０等が配置されている。制御基板３０はハウジング１５に固定され、制御基板３０にはパワーモジュール２０、コイル２３、コンデンサ２４、ドライバ２５，２６，２７、電流検出用のＩＣ３５，３６，３７等が実装されている。パワーモジュール２０、コイル２３、コンデンサ２４、制御基板３０等はカバー１９で覆われている。カバー１９はハウジング１５と導通している。制御基板３０は円板状をなしている。有蓋円筒状のカバー１９の内径と、円板状の制御基板３０の外径は、ほぼ同じである。 Next, the structure of the inverter device 14 will be described.
As shown in FIGS. 1 and 2, in the inverter device 14, a power module 20, a coil 23, a capacitor 24, a control board 30 and the like are arranged. The control substrate 30 is fixed to the housing 15, and the power module 20, the coil 23, the capacitor 24, the drivers 25, 26, 27 and the ICs 35, 36, 37 for current detection, etc. are mounted on the control substrate 30. The power module 20, the coil 23, the capacitor 24, the control board 30 and the like are covered with a cover 19. The cover 19 is in electrical communication with the housing 15. The control board 30 has a disk shape. The inner diameter of the covered cylindrical cover 19 and the outer diameter of the disk-like control substrate 30 are substantially the same.

図７に示すように、制御基板３０は、絶縁基板３１に導体パターン（導体パターンＰｇ等）が形成されている。制御基板３０での部品実装状態として、制御基板３０にドライバ２５，２６，２７がＸ方向に並んだ状態で実装されている。   As shown in FIG. 7, in the control substrate 30, a conductor pattern (conductor pattern Pg or the like) is formed on the insulating substrate 31. As components mounted on the control board 30, the drivers 25, 26 and 27 are mounted on the control board 30 in the X direction.

図７における制御基板３０での導体パターンとして、制御基板３０は、グランド導体パターン（接地導体パターン）Ｐｇを有する。グランド導体パターンＰｇはＹ方向に延びるスリット３２を有する。メイングランド端子１１２がグランド導体パターンＰｇにおけるＸ方向でのスリット３２の左側に接続されている。ドライバ２５，２６，２７がグランド導体パターンＰｇにおけるＸ方向でのスリット３２の右側に接続されている。このとき、メイングランド端子１１２とドライバ２５，２６，２７とは、スリット３２によりグランド導体パターンＰｇでの経路（グランド配線ライン）が長くなっている。   As a conductor pattern on the control board 30 in FIG. 7, the control board 30 has a ground conductor pattern (ground conductor pattern) Pg. The ground conductor pattern Pg has a slit 32 extending in the Y direction. The main ground terminal 112 is connected to the left side of the slit 32 in the X direction in the ground conductor pattern Pg. The drivers 25, 26 and 27 are connected to the right side of the slit 32 in the X direction in the ground conductor pattern Pg. At this time, the route (ground wiring line) in the ground conductor pattern Pg is longer due to the slits 32 between the main ground terminal 112 and the drivers 25, 26 and 27.

図１に示すように、ねじＳｃ１が制御基板３０を貫通してハウジング１５のボス（円柱部）２９に螺入されることにより制御基板３０がハウジング１５に固定されている。
図２に示すように、ハウジング１５の円形の端面（仕切壁）における円弧部にパワーモジュール２０が配置されている。つまり、パワーモジュール２０は円弧部を有し、パワーモジュール２０の円弧部がハウジング１５の円形の端面（仕切壁）における円弧部に沿うようにパワーモジュール２０が配置されている。パワーモジュール２０は三相交流モータ１３と電気的に接続されている。パワーモジュール２０、コイル２３、コンデンサ２４等は制御基板３０と電気的に接続されている。 As shown in FIG. 1, the control board 30 is fixed to the housing 15 by screwing the screw Sc1 into the boss (cylindrical portion) 29 of the housing 15 through the control board 30.
As shown in FIG. 2, the power module 20 is disposed in an arc portion of a circular end surface (partition wall) of the housing 15. That is, the power module 20 has an arc portion, and the power module 20 is disposed such that the arc portion of the power module 20 follows the arc portion of the circular end surface (partition wall) of the housing 15. The power module 20 is electrically connected to the three-phase AC motor 13. The power module 20, the coil 23, the capacitor 24 and the like are electrically connected to the control substrate 30.

図３（ａ），（ｂ）及び図４にはパワーモジュール２０を示す。
図３（ａ），（ｂ）及び図４に示すように、パワーモジュール２０は、主回路基板４０を備えている。主回路基板４０は、例えば銅よりなる金属板の上面に絶縁層が形成された絶縁基板に、銅よりなる導体パターン７５，７６，７７，７８，７９，８０，８１，８２，８３，８４，８５，８６，８７，８８，８９が形成されている。主回路基板４０は扇型をなしている。 The power module 20 is shown in FIG. 3 (a), (b) and FIG.
As shown in FIGS. 3A, 3 B and 4, the power module 20 includes a main circuit board 40. The main circuit board 40 is, for example, a conductor pattern 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, made of copper on an insulating substrate having an insulating layer formed on the upper surface of a metal plate made of copper. 85, 86, 87, 88, 89 are formed. The main circuit board 40 is fan-shaped.

導体パターン７５にはスイッチング素子（チップ）Ｑ２とダイオード（チップ）Ｄ２がはんだ付けされている。導体パターン７６が導体パターン７５の右側に形成され、導体パターン７６にはスイッチング素子（チップ）Ｑ１とダイオード（チップ）Ｄ１がはんだ付けされている。導体パターン７７が導体パターン７６の右側に形成され、導体パターン７７にはスイッチング素子（チップ）Ｑ４とダイオード（チップ）Ｄ４がはんだ付けされている。導体パターン７８が導体パターン７７の右側に形成され、導体パターン７８にはスイッチング素子（チップ）Ｑ３とダイオード（チップ）Ｄ３がはんだ付けされている。導体パターン７９が導体パターン７８の右側に形成され、導体パターン７９にはスイッチング素子（チップ）Ｑ６とダイオード（チップ）Ｄ６がはんだ付けされている。導体パターン８０が導体パターン７９の右側に形成され、導体パターン８０にはスイッチング素子（チップ）Ｑ５とダイオード（チップ）Ｄ５がはんだ付けされている。スイッチング素子Ｑ１〜Ｑ６は外周側（Ｙ方向正側）に、ダイオードＤ１〜Ｄ６は内周側（Ｙ方向負側）に配置されている。   A switching element (chip) Q2 and a diode (chip) D2 are soldered to the conductor pattern 75. The conductor pattern 76 is formed on the right side of the conductor pattern 75, and the switching element (chip) Q1 and the diode (chip) D1 are soldered to the conductor pattern 76. A conductor pattern 77 is formed on the right side of the conductor pattern 76, and a switching element (chip) Q4 and a diode (chip) D4 are soldered to the conductor pattern 77. A conductor pattern 78 is formed on the right side of the conductor pattern 77, and a switching element (chip) Q3 and a diode (chip) D3 are soldered to the conductor pattern 78. A conductor pattern 79 is formed on the right side of the conductor pattern 78, and a switching element (chip) Q6 and a diode (chip) D6 are soldered to the conductor pattern 79. A conductor pattern 80 is formed on the right side of the conductor pattern 79, and a switching element (chip) Q5 and a diode (chip) D5 are soldered to the conductor pattern 80. The switching elements Q1 to Q6 are disposed on the outer peripheral side (positive side in the Y direction), and the diodes D1 to D6 are disposed on the inner peripheral side (negative side in the Y direction).

図５（ａ），（ｂ）に示すように、配線用導電板９０が、スイッチング素子Ｑ２の上面のエミッタ電極１０２、ダイオードＤ２の上面電極、導体パターン８１に直接接合されている。以下同様に、図３（ａ）、図４、図５（ａ），（ｂ）に示すごとく、配線用導電板９２が、スイッチング素子Ｑ１の上面のエミッタ電極１０２、ダイオードＤ１の上面電極、導体パターン７５に直接接合されている。配線用導電板９２はＵ相出力端子１２０と電気的に接続されている。配線用導電板９４が、スイッチング素子Ｑ４の上面のエミッタ電極１０２、ダイオードＤ４の上面電極、導体パターン８２に直接接合されている。配線用導電板９６が、スイッチング素子Ｑ３の上面のエミッタ電極１０２、ダイオードＤ３の上面電極、導体パターン７７に直接接合されている。配線用導電板９６はＶ相出力端子１２１と電気的に接続されている。配線用導電板９８が、スイッチング素子Ｑ６の上面のエミッタ電極１０２、ダイオードＤ６の上面電極、導体パターン８３に直接接合されている。配線用導電板１００が、スイッチング素子Ｑ５の上面のエミッタ電極１０２、ダイオードＤ５の上面電極、導体パターン７９に直接接合されている。配線用導電板１００はＷ相出力端子１２２と電気的に接続されている。   As shown in FIGS. 5A and 5B, the wiring conductive plate 90 is directly bonded to the emitter electrode 102 on the top surface of the switching element Q2, the top surface electrode of the diode D2, and the conductor pattern 81. Likewise, as shown in FIGS. 3A, 4, 5A, and 5B, the conductive plate 92 for wiring is formed of the emitter electrode 102 on the upper surface of the switching element Q1, the upper surface electrode of the diode D1, and the conductor. It is directly bonded to the pattern 75. The wiring conductive plate 92 is electrically connected to the U-phase output terminal 120. The wiring conductive plate 94 is directly bonded to the emitter electrode 102 on the top surface of the switching element Q4, the top surface electrode of the diode D4, and the conductor pattern 82. The wiring conductive plate 96 is directly bonded to the emitter electrode 102 on the top surface of the switching element Q3, the top surface electrode of the diode D3, and the conductor pattern 77. The wiring conductive plate 96 is electrically connected to the V-phase output terminal 121. The wiring conductive plate 98 is directly bonded to the emitter electrode 102 on the top surface of the switching element Q6, the top surface electrode of the diode D6, and the conductor pattern 83. The wiring conductive plate 100 is directly bonded to the emitter electrode 102 on the top surface of the switching element Q5, the top surface electrode of the diode D5, and the conductor pattern 79. The wiring conductive plate 100 is electrically connected to the W-phase output terminal 122.

スイッチング素子Ｑ１〜Ｑ６及びダイオードＤ１〜Ｄ６はディスクリート部品であり、図３（ａ）に示すように平面視において長方形状をなしている。また、図３（ｂ）に示すように、パワーモジュール２０における基板４０の裏面は平坦面であり、この裏面がパワーモジュール２０の放熱面となっており、パワーモジュール２０における基板４０の放熱面がハウジング１５に熱的に接続されている。   The switching elements Q1 to Q6 and the diodes D1 to D6 are discrete components, and have a rectangular shape in plan view as shown in FIG. 3 (a). Further, as shown in FIG. 3B, the back surface of the substrate 40 in the power module 20 is a flat surface, the back surface is a heat dissipation surface of the power module 20, and the heat dissipation surface of the substrate 40 in the power module 20 is It is thermally connected to the housing 15.

さらに、図２及び図３（ａ）に示すように、ハウジング１５の外形（外周面）は円弧状をなしている。そして、スイッチング素子Ｑ１〜Ｑ６及びダイオードＤ１〜Ｄ６はハウジング１５の外形に沿って配置されている。   Furthermore, as shown in FIG. 2 and FIG. 3A, the outer shape (outer peripheral surface) of the housing 15 is arc-shaped. The switching elements Q1 to Q6 and the diodes D1 to D6 are disposed along the outer shape of the housing 15.

このように、主回路基板４０において、Ｕ、Ｖ、Ｗの三相、それぞれについて、図３（ａ）、図４に示すように上アーム用スイッチング素子Ｑ１，Ｑ３，Ｑ５と下アーム用スイッチング素子Ｑ２，Ｑ４，Ｑ６とが、隣接して配置された状態で搭載されている。また、制御基板３０において、Ｕ、Ｖ、Ｗの三相、それぞれについて、上アーム用スイッチング素子Ｑ１，Ｑ３，Ｑ５と下アーム用スイッチング素子Ｑ２，Ｑ４，Ｑ６を駆動するドライバ２５，２６，２７が、図２に示すように、対応する上アーム用スイッチング素子Ｑ１，Ｑ３，Ｑ５と下アーム用スイッチング素子Ｑ２，Ｑ４，Ｑ６に対向配置された状態で搭載されている。   Thus, in the main circuit board 40, the upper arm switching elements Q1, Q3 and Q5 and the lower arm switching elements as shown in FIG. 3 (a) and FIG. 4 for each of the three phases U, V and W. Q2, Q4, and Q6 are mounted adjacent to each other. Further, in the control substrate 30, drivers 25, 26 and 27 for driving the upper arm switching elements Q1, Q3 and Q5 and the lower arm switching elements Q2, Q4 and Q6 for the three phases U, V and W respectively are provided. As shown in FIG. 2, the upper arm switching elements Q1, Q3 and Q5 and the lower arm switching elements Q2, Q4 and Q6 are mounted opposite to each other.

図３（ａ）、図４に示すように、Ｚ方向に離間して形成された導体パターン８１，８１にはシャント抵抗（チップ抵抗器）Ｒｓ１がはんだ付けされている。Ｚ方向に離間して形成された導体パターン８２，８２にはシャント抵抗（チップ抵抗器）Ｒｓ２がはんだ付けされている。Ｚ方向に離間して形成された導体パターン８３，８３にはシャント抵抗（チップ抵抗器）Ｒｓ３はんだ付けされている。シャント抵抗Ｒｓ１〜Ｒｓ３はディスクリート部品である。   As shown in FIG. 3A and FIG. 4, a shunt resistor (chip resistor) Rs1 is soldered to the conductor patterns 81, 81 formed to be separated in the Z direction. A shunt resistor (chip resistor) Rs2 is soldered to the conductor patterns 82, 82 formed separately in the Z direction. The shunt resistor (chip resistor) Rs3 is soldered to the conductor patterns 83, 83 formed separately in the Z direction. The shunt resistors Rs1 to Rs3 are discrete components.

ボンディングワイヤにて、導体パターン７５，７６，７７，７８，７９，８０の外周側に形成された導体パターン８４，８５，８６，８７，８８，８９とスイッチング素子Ｑ１〜Ｑ６の上面のゲート電極とが電気的に接続されている。導体パターン８４，８５，８６，８７，８８，８９には信号端子としての制御端子５２，５５，５８，６１，６５，６７が立設されている。シャント抵抗Ｒｓ１，Ｒｓ２，Ｒｓ３の一方の電極に繋がる導体パターン８１，８２，８３には信号端子としての電圧モニタ端子５０，５６，６２が立設されている。シャント抵抗Ｒｓ１，Ｒｓ２，Ｒｓ３の他方の電極に繋がる導体パターン８１，８２，８３には信号端子としての電圧モニタ端子５１，５７，６３が立設されている。   Conductor patterns 84, 85, 86, 87, 88, 89 formed on the outer peripheral side of conductor patterns 75, 76, 77, 78, 79, 80 by bonding wires and a gate electrode on the upper surface of switching elements Q1 to Q6 Are electrically connected. Control terminals 52, 55, 58, 61, 65, 67 as signal terminals are erected on the conductor patterns 84, 85, 86, 87, 88, 89, respectively. Voltage monitor terminals 50, 56, 62 as signal terminals are erected on the conductor patterns 81, 82, 83 connected to one of the electrodes of the shunt resistors Rs1, Rs2, Rs3. Voltage monitor terminals 51, 57, 63 as signal terminals are erected on the conductor patterns 81, 82, 83 connected to the other electrodes of the shunt resistors Rs1, Rs2, Rs3.

図３（ａ）、図４、図５（ａ），（ｂ）に示すように、配線用導電板９０が、下アーム用スイッチング素子Ｑ２におけるエミッタ電極１０２に直接接合されるが、配線用導電板９０から補助エミッタ（配線用導電板）９１が分岐している。補助エミッタ９１には立設する制御端子５３が電気的に接続されている。同様に、配線用導電板９２が、上アーム用スイッチング素子Ｑ１におけるエミッタ電極１０２に直接接合されるが、配線用導電板９２から補助エミッタ（配線用導電板）９３が分岐している。補助エミッタ９３には立設する制御端子５４が電気的に接続されている。配線用導電板９４が、下アーム用スイッチング素子Ｑ４におけるエミッタ電極１０２に直接接合されるが、配線用導電板９４から補助エミッタ（配線用導電板）９５が分岐している。補助エミッタ９５には立設する制御端子５９が電気的に接続されている。配線用導電板９６が、上アーム用スイッチング素子Ｑ３におけるエミッタ電極１０２に直接接合されるが、配線用導電板９６から補助エミッタ（配線用導電板）９７が分岐している。補助エミッタ９７には立設する制御端子６０が電気的に接続されている。配線用導電板９８が、下アーム用スイッチング素子Ｑ６におけるエミッタ電極１０２に直接接合されるが、配線用導電板９８から補助エミッタ（配線用導電板）９９が分岐している。補助エミッタ９９には立設する制御端子６４が電気的に接続されている。配線用導電板１００が、上アーム用スイッチング素子Ｑ５におけるエミッタ電極１０２に直接接合されるが、配線用導電板１００から補助エミッタ（配線用導電板）１０１が分岐している。補助エミッタ１０１には立設する制御端子６６が電気的に接続されている。   As shown in FIGS. 3A, 4 and 5A and 5B, the wiring conductive plate 90 is directly joined to the emitter electrode 102 in the lower arm switching element Q2, but the wiring conductive An auxiliary emitter (wiring conductive plate) 91 is branched from the plate 90. The auxiliary emitter 91 is electrically connected to a control terminal 53 provided upright. Similarly, the wiring conductive plate 92 is directly joined to the emitter electrode 102 in the upper arm switching element Q1, but the auxiliary emitter (wiring conductive plate) 93 is branched from the wiring conductive plate 92. The auxiliary emitter 93 is electrically connected to a control terminal 54 provided upright. The wiring conductive plate 94 is directly joined to the emitter electrode 102 in the lower arm switching element Q4, but the auxiliary emitter (wiring conductive plate) 95 is branched from the wiring conductive plate 94. The auxiliary emitter 95 is electrically connected to a control terminal 59 provided upright. The wiring conductive plate 96 is directly joined to the emitter electrode 102 in the upper arm switching element Q3, but the auxiliary emitter (wiring conductive plate) 97 branches from the wiring conductive plate 96. A control terminal 60 which is erected is electrically connected to the auxiliary emitter 97. The wiring conductive plate 98 is directly joined to the emitter electrode 102 in the lower arm switching element Q6, but the auxiliary emitter (wiring conductive plate) 99 branches from the wiring conductive plate 98. The auxiliary emitter 99 is electrically connected to a control terminal 64 that is erected. The wiring conductive plate 100 is directly joined to the emitter electrode 102 in the upper arm switching element Q5, but the auxiliary emitter (wiring conductive plate) 101 is branched from the wiring conductive plate 100. A control terminal 66 standingly connected to the auxiliary emitter 101 is electrically connected.

図３（ａ），（ｂ）、図４に示すように、負極用端子７０がシャント抵抗Ｒｓ１，Ｒｓ２，Ｒｓ３の一方の導体パターン８１，８２，８３と接続されているとともに上方に延設されている。正極用端子７１が導体パターン７６，７８，８０と接続されているとともに上方に延設されている。   As shown in FIGS. 3A, 3B and 4, the negative electrode terminal 70 is connected to one of the conductor patterns 81, 82, 83 of the shunt resistors Rs1, Rs2, Rs3 and extended upward. ing. The positive electrode terminal 71 is connected to the conductor patterns 76, 78, and 80 and extends upward.

図１に示すように、パワーモジュール２０から延びる端子５０〜６７は、制御基板３０を貫通して制御基板３０にはんだ付けされている。このとき、補助エミッタ９１，９３，９５，９７，９９，１０１に接続される制御端子５３，５４，５９，６０，６４，６６が主回路基板４０から制御基板３０に向かってＺ方向に延び、制御基板３０においてドライバ２５，２６，２７に電気的に接続されている。   As shown in FIG. 1, terminals 50 to 67 extending from the power module 20 are soldered to the control substrate 30 through the control substrate 30. At this time, control terminals 53, 54, 59, 60, 64, 66 connected to the auxiliary emitters 91, 93, 95, 97, 99, 101 extend in the Z direction from the main circuit board 40 toward the control board 30, The control board 30 is electrically connected to the drivers 25, 26 and 27.

また、Ｕ相出力端子（コネクタ）１２０、Ｖ相出力端子（コネクタ）１２１、Ｗ相出力端子（コネクタ）１２２がモータ部１２に接続されている。
図６に示すように、電流検出用のＩＣ３５，３６，３７はメイングランド（メイングランド端子）１１０基準で動作し、下アーム用スイッチング素子Ｑ２，Ｑ４，Ｑ６は、メイングランド１１０とは別の補助エミッタ用グランド（補助エミッタ用グランド端子）１１１基準で駆動する。 A U-phase output terminal (connector) 120, a V-phase output terminal (connector) 121, and a W-phase output terminal (connector) 122 are connected to the motor unit 12.
As shown in FIG. 6, the ICs 35, 36, 37 for current detection operate on the basis of the main ground (main ground terminal) 110, and the lower arm switching elements Q2, Q4, Q6 are auxiliary other than the main ground 110. Drive with reference to emitter ground (auxiliary emitter ground terminal) 111.

図３（ａ）に示すように、各端子５０〜６７は、左側のＵ相、右側のＷ相、中央のＶ相としてＸ方向に並んで配置されている。即ち、各端子５０〜６７は、三相整列されている。また、Ｙ方向においてスイッチング素子Ｑ１，Ｑ２、スイッチング素子Ｑ３，Ｑ４、スイッチング素子Ｑ５，Ｑ６が、並んで配置されている。即ち、上アーム用スイッチング素子Ｑ１，Ｑ３，Ｑ５と下アーム用スイッチング素子Ｑ２，Ｑ４，Ｑ６が整列している。   As shown in FIG. 3A, the terminals 50 to 67 are arranged side by side in the X direction as the U phase on the left side, the W phase on the right side, and the V phase at the center. That is, the terminals 50 to 67 are aligned in three phases. Further, in the Y direction, switching elements Q1 and Q2, switching elements Q3 and Q4, and switching elements Q5 and Q6 are arranged side by side. That is, the upper arm switching elements Q1, Q3, Q5 and the lower arm switching elements Q2, Q4, Q6 are aligned.

次に、作用について説明する。
Ｕ相用のドライバ２５によりスイッチング素子Ｑ１，Ｑ２のゲート電極にパルス状のゲート電圧が印加され、スイッチング素子Ｑ１，Ｑ２がオンオフ制御される。同様に、Ｖ相用のドライバ２６によりスイッチング素子Ｑ３，Ｑ４のゲート電極にパルス状のゲート電圧が印加され、スイッチング素子Ｑ３，Ｑ４がオンオフ制御される。Ｗ相用のドライバ２７によりスイッチング素子Ｑ５，Ｑ６のゲート電極にパルス状のゲート電圧が印加され、スイッチング素子Ｑ５，Ｑ６がオンオフ制御される。このスイッチング素子Ｑ１〜Ｑ６のスイッチング動作により車載バッテリ２８から供給される直流が適宜の周波数の三相交流に変換されて三相交流モータ１３の各相のコイルに供給される。スイッチング素子（ＩＧＢＴ）Ｑ１〜Ｑ６においてはオン時にはゲートを充電し、オフ時にはゲートから放電する。 Next, the operation will be described.
A pulsed gate voltage is applied to the gate electrodes of the switching elements Q1 and Q2 by the U-phase driver 25, and the switching elements Q1 and Q2 are on / off controlled. Similarly, a pulse-like gate voltage is applied to the gate electrodes of the switching elements Q3 and Q4 by the V-phase driver 26, and the switching elements Q3 and Q4 are on / off controlled. A pulsed gate voltage is applied to the gate electrodes of the switching elements Q5 and Q6 by the W-phase driver 27, and the switching elements Q5 and Q6 are on / off controlled. By the switching operation of the switching elements Q1 to Q6, the direct current supplied from the on-vehicle battery 28 is converted into a three-phase alternating current of an appropriate frequency and supplied to the coil of each phase of the three-phase alternating current motor 13. The switching elements (IGBTs) Q1 to Q6 charge the gate when turned on, and discharge from the gate when turned off.

以下、下アーム用スイッチング素子としてＷ相下アーム用のスイッチング素子（ＩＧＢＴ）Ｑ６のターンオフ動作安定化のためゲートループを改善することについて説明する。
図８には、実施形態における特定のスイッチング素子における、ターンオフ時のゲート・エミッタ電圧Ｖｇｅ、コレクタ電流Ｉｃ、コレクタ・エミッタ電圧Ｖｃｅの測定結果を示す。図８において閾値電圧Ｖｔｈを併記している。 The improvement of the gate loop for stabilizing the turn-off operation of the switching element (IGBT) Q6 for the W-phase lower arm as the lower arm switching element will be described below.
FIG. 8 shows the measurement results of the gate-emitter voltage Vge at turn-off, the collector current Ic, and the collector-emitter voltage Vce in the specific switching element in the embodiment. The threshold voltage Vth is also shown in FIG.

図９、図１０、図１１は比較例である。図６に対して図１０の比較例ではスイッチング素子Ｑ２，Ｑ４，Ｑ６における補助エミッタラインは無い。また、電流検出用のＩＣの機能はドライバに組み込まれている。図７に対して図９の比較例ではスイッチング素子Ｑ２，Ｑ４，Ｑ６のエミッタはグランド導体パターンＰｇで繋がっている。その結果、図８に対して図１１の測定結果を得た。   FIG. 9, FIG. 10, and FIG. 11 are comparative examples. In contrast to FIG. 6, in the comparative example of FIG. 10, there is no auxiliary emitter line in the switching elements Q2, Q4 and Q6. Also, the function of the current detection IC is incorporated in the driver. The emitters of the switching elements Q2, Q4, and Q6 in the comparative example of FIG. 9 with respect to FIG. 7 are connected by the ground conductor pattern Pg. As a result, the measurement result of FIG. 11 was obtained with respect to FIG.

図９、図１０に示す比較例においては、図１０における破線及び図９における破線で示すごとくＩＧＢＴのエミッタからドライバ２７のメイングランド（端子）１１０までの配線経路（パワーライン）が長い。そのため、図１１に示すようにコレクタ電流Ｉｃの遮断時においてゲート・エミッタ電圧Ｖｇｅが閾値電圧Ｖｔｈを跨ぐように閾値電圧Ｖｔｈ付近で停滞し誤ったオンが生じてしまいコレクタ電流Ｉｃが流れる。   In the comparative example shown in FIGS. 9 and 10, the wiring path (power line) from the emitter of the IGBT to the main ground (terminal) 110 of the driver 27 is long as shown by the broken line in FIG. 10 and the broken line in FIG. Therefore, as shown in FIG. 11, when the collector current Ic is cut off, the gate-emitter voltage Vge stagnates in the vicinity of the threshold voltage Vth so that the gate-emitter voltage Vge crosses the threshold voltage Vth.

これに対し図６、図７に示す本実施形態においては、図６における破線及び図７における破線で示すごとくＩＧＢＴのエミッタからドライバ２７の補助エミッタ用グランド（端子）１１１までの配線経路（パワーライン）が短い。そのため、配線インダクタンスを低減でき、これにより図８に示すようにコレクタ電流Ｉｃの遮断時のインダクタンスを小さくしてゲート・エミッタ電圧Ｖｇｅの持ち上がりを抑制することができる。その結果、ゲート・エミッタ電圧Ｖｇｅが閾値電圧Ｖｔｈ付近で停滞することなく誤ったオンが生じることなくコレクタ電流Ｉｃも流れることもない。   On the other hand, in the present embodiment shown in FIGS. 6 and 7, a wiring path (power line) from the emitter of the IGBT to the auxiliary emitter ground (terminal) 111 of the driver 27 as shown by the broken line in FIG. ) Is short. Therefore, the wiring inductance can be reduced, and as shown in FIG. 8, the inductance at the time of interruption of the collector current Ic can be reduced to suppress the lifting of the gate-emitter voltage Vge. As a result, the gate-emitter voltage Vge does not stagnate in the vicinity of the threshold voltage Vth, and no erroneous on occurs, nor does the collector current Ic flow.

次に、補助エミッタパッドでワイヤボンディングする場合について言及する。
大型のＩＧＢＴのスイッチングスピードのアップ及び安定的な動作のために、ＩＧＢＴのゲート・エミッタ間とドライバ２５，２６，２７までのループ（ゲートループ）は、比較例として、小信号用の補助エミッタ用パッドをＩＧＢＴのエミッタ電極上に設け、極力短いループになるようにワイヤボンドでドライバと接続しゲート駆動を行うものがある。しかし、チップの小型化が進むにつれて補助エミッタのワイヤボンディングに必要なパッド面積比率が高くなり、小型化の阻害要因になりうる。また、密集した部位にワイヤボンディングを行う製造上の課題にもなりうる。通常、小型（３０Ａクラスの電流容量）では補助エミッタを設けずに実装することが多い。 Next, the case of wire bonding with an auxiliary emitter pad will be mentioned.
The loop (gate loop) between the gate and the emitter of the IGBT and the drivers 25, 26 and 27 is for a small signal auxiliary emitter as a comparative example, for the switching speed increase and stable operation of a large IGBT. There is a device in which a pad is provided on the emitter electrode of the IGBT and connected to a driver by wire bonding to perform gate driving so as to form a loop as short as possible. However, as the miniaturization of chips progresses, the pad area ratio required for wire bonding of the auxiliary emitters becomes high, which may be a hindrance to miniaturization. In addition, it can also be a manufacturing problem in which wire bonding is performed on dense portions. Usually, small size (30 A class current capacity) is often mounted without providing an auxiliary emitter.

本実施形態では、ＤＬＢ（ダイレクト・リード・ボンド）接続をすることで、メインエミッタと補助エミッタを１箇所に集約して接続する。そして、ＩＧＢＴのエミッタ配線用導電板（メインエミッタのリード）の途中から補助エミッタ９１，９３，９５，９７，９９，１０１を分岐している。   In this embodiment, the main emitters and the auxiliary emitters are collectively connected to one place by DLB (direct lead bond) connection. The auxiliary emitters 91, 93, 95, 97, 99, 101 are branched from the middle of the emitter wiring conductive plate (lead of the main emitter) of the IGBT.

このようにして、１点集約で接続し途中から分岐することで補助エミッタ用パッドを別途設ける必要が無く、小型のチップでも補助エミッタをつけることができ、短いゲートループを構成することができる。よって、ターンオフ動作安定化のためゲートループを改善できる。つまり、スイッチング素子（ＩＧＢＴ）のエミッタからドライバのグランドまでの経路を短くしてループ上の配線インダクタンス（寄生インダクタンス）を低減してコレクタ電流の遮断時に発生するゲート・エミッタ電圧Ｖｇｅ＝Ｌｓ・ｄｉ／ｄｔにおける寄生インダクタンスＬｓを小さくしてゲート・エミッタ電圧Ｖｇｅの持ち上がりを抑制することができる。また、ＤＬＢ工法を用いることでメインエミッタと補助エミッタ９１，９３，９５，９７，９９，１０１の接続を１箇所に集約でき実装の簡素化が図られる。また、スイッチング動作（ターンオン及びターンオフ）の安定化及び高速化を図ることができる。   In this way, it is not necessary to separately provide an auxiliary emitter pad by connecting at one-point connection and branching from the middle, and an auxiliary emitter can be attached even with a small chip, and a short gate loop can be configured. Thus, the gate loop can be improved to stabilize the turn-off operation. That is, the path from the emitter of the switching element (IGBT) to the ground of the driver is shortened to reduce the wiring inductance (parasitic inductance) on the loop to reduce the gate-emitter voltage Vge = Ls · di / generated when the collector current is cut off. The parasitic inductance Ls at dt can be reduced to suppress lifting of the gate-emitter voltage Vge. Further, by using the DLB method, the connection of the main emitter and the auxiliary emitters 91, 93, 95, 97, 99, 101 can be concentrated at one place, and the mounting can be simplified. In addition, the switching operation (turn on and turn off) can be stabilized and speeded up.

上記実施形態によれば、以下のような効果を得ることができる。
（１）インバータ装置１４の構成として、正極母線Ｌｐと負極母線Ｌｎとの間に上アーム用スイッチング素子Ｑ１，Ｑ３，Ｑ５と下アーム用スイッチング素子Ｑ２，Ｑ４，Ｑ６が直列接続されたＵ、Ｖ、Ｗの三相、それぞれについて、上アーム用スイッチング素子Ｑ１，Ｑ３，Ｑ５と下アーム用スイッチング素子Ｑ２，Ｑ４，Ｑ６とを、隣接して配置された状態で搭載した主回路基板４０を備える。Ｕ、Ｖ、Ｗの三相、それぞれについて、上アーム用スイッチング素子Ｑ１，Ｑ３，Ｑ５と下アーム用スイッチング素子Ｑ２，Ｑ４，Ｑ６を駆動するドライバ２５，２６，２７を、対応する上アーム用スイッチング素子Ｑ１，Ｑ３，Ｑ５と下アーム用スイッチング素子Ｑ２，Ｑ４，Ｑ６に対向配置された状態で搭載した制御基板３０を備える。Ｕ、Ｖ、Ｗの三相、それぞれについて、上アーム用スイッチング素子Ｑ１，Ｑ３，Ｑ５及び下アーム用スイッチング素子Ｑ２，Ｑ４，Ｑ６におけるエミッタ電極１０２に配線用導電板９０，９２，９４，９６，９８，１００が直接接合され、配線用導電板９０，９２，９４，９６，９８，１００から分岐する補助エミッタ９１，９３，９５，９７，９９，１０１が制御端子５３，５４，５９，６０，６４，６６に接続されている。制御端子５３，５４，５９，６０，６４，６６が主回路基板４０から制御基板３０に延び、ドライバ２５，２６，２７に電気的に接続されている。 According to the above embodiment, the following effects can be obtained.
(1) U and V in which upper arm switching elements Q1, Q3 and Q5 and lower arm switching elements Q2, Q4 and Q6 are connected in series between positive electrode bus Lp and negative electrode bus Ln as a configuration of inverter device 14 , W for the three phases, the main circuit board 40 on which the upper arm switching elements Q1, Q3 and Q5 and the lower arm switching elements Q2, Q4 and Q6 are disposed adjacent to each other. Upper arm switching elements Q1, Q3, Q5 and drivers 25, 26, 27 for driving the lower arm switching elements Q2, Q4, Q6 for U, V, W three phases respectively corresponding to the upper arm switching The control substrate 30 is mounted in a state in which the elements Q1, Q3 and Q5 and the lower arm switching elements Q2, Q4 and Q6 are disposed to face each other. Conductive plates 90, 92, 94, 96, for the wiring of the emitter electrode 102 of the upper arm switching elements Q1, Q3, Q5 and the lower arm switching elements Q2, Q4, Q6 for U, V, W three phases respectively. 98, 100 are directly joined, and auxiliary emitters 91, 93, 95, 97, 99, 101 branched from conductive plates 90, 92, 94, 96, 98, 100 for control terminals 53, 54, 59, 60, 64, 66 are connected. Control terminals 53, 54, 59, 60, 64, 66 extend from the main circuit board 40 to the control board 30 and are electrically connected to the drivers 25, 26, 27.

よって、主回路基板４０において上アーム用スイッチング素子Ｑ１，Ｑ３，Ｑ５と下アーム用スイッチング素子Ｑ２，Ｑ４，Ｑ６とが隣接して配置されるとともにドライバ２５，２６，２７が上アーム用スイッチング素子Ｑ１，Ｑ３，Ｑ５と下アーム用スイッチング素子Ｑ２，Ｑ４，Ｑ６に対向配置された状態で制御基板に搭載されており、エミッタ電極１０２に直接接合された配線用導電板９０，９２，９４，９６，９８，１００から分岐する補助エミッタ９１，９３，９５，９７，９９，１０１を介してドライバ２５，２６，２７に電気的に接続されていることにより、スイッチング素子のエミッタからドライバまでの経路が短くなり、Ｕ、Ｖ、Ｗの相間のエミッタ配線経路、及び、上下のアーム間のエミッタ配線経路を短くしてエミッタ配線経路のアンバランスを抑制することが可能となる。つまり、Ｕ、Ｖ、Ｗの相間のエミッタ配線経路での寄生インダクタンスの均等化が図られるとともに上下のアーム間のエミッタ配線経路での寄生インダクタンスの均等化が図られる。また、スイッチング素子の上面に補助エミッタ用パッドを設けてボンディングワイヤを介してドライバと接続する場合に比べ、補助エミッタ用パッドを不要にでき小型化が図られる。その結果、スイッチング素子の小型化を図るとともにエミッタ配線経路のアンバランスを抑制することができる。また、スイッチング素子のエミッタからドライバまでの経路が短くなり、配線インダクタンスが低減される。   Therefore, on the main circuit board 40, the upper arm switching elements Q1, Q3 and Q5 and the lower arm switching elements Q2, Q4 and Q6 are disposed adjacent to each other, and the drivers 25, 26 and 27 are upper arm switching elements Q1. , Q3 and Q5 and the lower arm switching elements Q2, Q4 and Q6 are mounted on the control substrate in a state of being opposed to each other, and are directly connected to the emitter electrode 102. By electrically connecting to the drivers 25, 26 and 27 via auxiliary emitters 91, 93, 95, 97, 99 and 101 branched from 98 and 100, the path from the emitter of the switching element to the driver is short. The emitter wiring path between the U, V, and W phases, and the emitter wiring path between the upper and lower arms are shortened to It is possible to suppress the imbalance of wiring paths. That is, the parasitic inductance in the emitter wiring path between the U, V, and W phases can be equalized, and the parasitic inductance in the emitter wiring path between the upper and lower arms can be equalized. Further, as compared with the case where the pad for the auxiliary emitter is provided on the upper surface of the switching element and connected to the driver through the bonding wire, the pad for the auxiliary emitter can be made unnecessary and miniaturization can be achieved. As a result, it is possible to miniaturize the switching element and to suppress the unbalance of the emitter wiring path. In addition, the path from the emitter of the switching element to the driver is shortened, and the wiring inductance is reduced.

（２）メイングランドで動作する電流検出用のＩＣ３５，３６，３７が設けられている。シャント抵抗Ｒｓ１，Ｒｓ２，Ｒｓ３が、負極母線Ｌｎと下アーム用スイッチング素子Ｑ２，Ｑ４，Ｑ６のエミッタ端子との間に配置され、シャント抵抗Ｒｓ１，Ｒｓ２，Ｒｓ３のエミッタ端子側から補助エミッタ９１，９５，９９が分岐している。シャント抵抗Ｒｓ１，Ｒｓ２，Ｒｓ３の両端は各相の電流検出用のＩＣ３５，３６，３７に接続されている。下アーム用スイッチング素子Ｑ２，Ｑ４，Ｑ６は、メイングランド１１０とは別の補助エミッタ用グランド（専用の端子）１１１基準で駆動する。よって、シャント抵抗におけるもう一方の端子側（反エミッタ端子側）からドライバに接続するよりもインダクタンスを小さくすることができる。   (2) The ICs 35, 36, 37 for current detection operating at the main ground are provided. Shunt resistors Rs1, Rs2 and Rs3 are arranged between negative pole bus Ln and the emitter terminals of lower arm switching elements Q2, Q4 and Q6, and auxiliary emitters 91 and 95 are arranged from the emitter terminal side of shunt resistors Rs1, Rs2 and Rs3. , 99 are branched. Both ends of the shunt resistors Rs1, Rs2 and Rs3 are connected to the ICs 35, 36 and 37 for current detection of each phase. The lower arm switching elements Q 2, Q 4 and Q 6 are driven by reference to an auxiliary emitter ground (dedicated terminal) 111 different from the main ground 110. Therefore, the inductance can be made smaller than that of the shunt resistor connected to the driver from the other terminal side (anti-emitter terminal side).

仮に、電流制御用のＩＣ３５，３６，３７も下アーム用スイッチング素子と同様に補助エミッタ用グランド１１１で動作させようとすると、基準となる電圧が補助エミッタ用グランド１１１の電位となってしまう。正確な値を得るためには補助エミッタをシャント抵抗の反エミッタ端子側で取る必要があるが、そうすると下アーム用スイッチング素子の動作としては補助エミッタがシャント抵抗を介すこととなり、インダクタンスが増えてしまう。   If the current control ICs 35, 36, 37 are to be operated with the auxiliary emitter ground 111 in the same manner as the lower arm switching elements, the reference voltage becomes the potential of the auxiliary emitter ground 111. In order to obtain an accurate value, it is necessary to take the auxiliary emitter on the side opposite to the emitter terminal of the shunt resistor, but this causes the auxiliary emitter to go through the shunt resistor for the operation of the lower arm switching element, increasing the inductance. I will.

（３）制御端子５３，５４，５９，６０，６４，６６は、三相整列し、上アーム用スイッチング素子Ｑ１，Ｑ３，Ｑ５と下アーム用スイッチング素子Ｑ２，Ｑ４，Ｑ６も整列している。これにより、省スペース化を図ることができる。   (3) The control terminals 53, 54, 59, 60, 64, 66 are three-phase aligned, and the upper arm switching elements Q1, Q3, Q5 and the lower arm switching elements Q2, Q4, Q6 are also aligned. This can save space.

実施形態は前記に限定されるものではなく、例えば、次のように具体化してもよい。
○ ドライバは、Ｕ相用ドライバ、Ｖ相用ドライバ、Ｗ相用ドライバを有していたが、Ｕ相、Ｖ相、Ｗ相で１つのドライバを用いてもよい。 The embodiment is not limited to the above, and may be embodied as follows, for example.
The driver includes the U-phase driver, the V-phase driver, and the W-phase driver, but one driver may be used for the U-phase, the V-phase, and the W-phase.

○ シャント抵抗の無い構成としてもよく、シャント抵抗に代わりホール素子等で電流を計測する構成としてもよい。シャント抵抗は三相のうち二相のみに設けてもよい。
○ 電動圧縮機に用いるインバータ装置に適用したが、電動圧縮機以外の機器におけるインバータ装置に適用してもよい。 ○ It is good also as composition without a shunt resistance, and it is good also as composition which measures current with a Hall element etc. instead of shunt resistance. The shunt resistor may be provided in only two of the three phases.
Although the present invention is applied to the inverter device used for the electric compressor, it may be applied to the inverter device in equipment other than the electric compressor.

１４…インバータ装置、２５，２６，２７…ドライバ、３０…制御基板、３５，３６，３７…ＩＣ、４０…主回路基板、５３，５４，５９，６０，６４，６６…制御端子、９０，９２，９４，９６，９８，１００…配線用導電板、９１，９３，９５，９７，９９，１０１…補助エミッタ、１０２…エミッタ電極、１１０…メイングランド、１１１…補助エミッタ用グランド、Ｌｐ…正極母線、Ｌｎ…負極母線、Ｑ１，Ｑ３，Ｑ５…上アーム用スイッチング素子、Ｑ２，Ｑ４，Ｑ６…下アーム用スイッチング素子、Ｒｓ１，Ｒｓ２，Ｒｓ３…シャント抵抗。   14 inverter device 25 26 27 driver 30 control board 35 36 IC 37 40 main circuit board 53 54 59 60 64 control terminal 90 92 , 94, 96, 98, 100 ... conductive plate for wiring, 91, 93, 95, 97, 99, 101 ... auxiliary emitter, 102 ... emitter electrode, 110 ... main ground, 111 ... ground for auxiliary emitter, Lp ... positive electrode bus Ln: Negative electrode bus bar, Q1, Q3, Q5: Upper arm switching element, Q2, Q4, Q6 ... Lower arm switching element, Rs1, Rs2, Rs3: Shunt resistance.

Claims (3)

正極母線と負極母線との間に上アーム用スイッチング素子と下アーム用スイッチング素子が直列接続されたＵ、Ｖ、Ｗの三相、それぞれについて、前記上アーム用スイッチング素子と前記下アーム用スイッチング素子とを、隣接して配置された状態で搭載した主回路基板と、
前記Ｕ、Ｖ、Ｗの三相、それぞれについて、前記上アーム用スイッチング素子と前記下アーム用スイッチング素子を駆動するドライバを、対応する前記上アーム用スイッチング素子と前記下アーム用スイッチング素子に対向配置された状態で搭載した制御基板と、
を備え、
前記Ｕ、Ｖ、Ｗの三相、それぞれについて、前記上アーム用スイッチング素子及び前記下アーム用スイッチング素子におけるエミッタ電極に配線用導電板が直接接合され、
前記配線用導電板から分岐する補助エミッタが制御端子に接続され、前記制御端子が前記主回路基板から前記制御基板に延び、前記ドライバに電気的に接続されてなる
ことを特徴とするインバータ装置。 The upper arm switching element and the lower arm switching element for each of three phases of U, V and W in which an upper arm switching element and a lower arm switching element are connected in series between the positive electrode bus and the negative electrode bus And a main circuit board mounted in a state of being disposed adjacent to each other,
For each of the three phases U, V, and W, a driver for driving the upper arm switching element and the lower arm switching element is disposed opposite to the corresponding upper arm switching element and the lower arm switching element. The control board mounted in the
Equipped with
A conductive plate for wiring is directly joined to an emitter electrode in the upper arm switching element and the lower arm switching element for each of the three phases of U, V, and W, respectively,
An inverter device comprising: an auxiliary emitter branched from the wiring conductive plate connected to a control terminal; the control terminal extending from the main circuit board to the control board; and electrically connected to the driver. 前記制御基板はメイングランド基準で動作する電流検出用回路が相別に設けられ、
シャント抵抗が、負極母線と下アーム用スイッチング素子のエミッタ端子との間に配置され、前記シャント抵抗のエミッタ端子側から前記補助エミッタが分岐し、
前記シャント抵抗の両端は前記電流検出用回路に接続され、
前記下アーム用スイッチング素子は、メイングランドとは別の補助エミッタ用グランド基準で駆動することを特徴とする請求項１に記載のインバータ装置。 The control board is provided with a circuit for current detection operating on a main ground basis separately for each phase,
The shunt resistor is disposed between the negative electrode bus bar and the emitter terminal of the lower arm switching element, and the auxiliary emitter branches from the emitter terminal side of the shunt resistor.
Both ends of the shunt resistor are connected to the current detection circuit,
The inverter device according to claim 1, wherein the lower arm switching element is driven by a ground reference for an auxiliary emitter different from the main ground. 前記制御端子は、三相整列し、前記上アーム用スイッチング素子と前記下アーム用スイッチング素子も整列していることを特徴とする請求項１又は２に記載のインバータ装置。   The inverter device according to claim 1 or 2, wherein the control terminals are in three phase alignment, and the upper arm switching element and the lower arm switching element are also aligned.
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