JP2019054132A - Method for evaluating semiconductor wafer - Google Patents

Abstract

To provide a method for performing evaluation about a slip caused at an edge of a semiconductor wafer by a non-destructive manner in short time.SOLUTION: A method for evaluating a semiconductor wafer subjected to thermal treatment, provided that the semiconductor wafer has, as principal faces, a main surface and a main rear face and has a chamfered face formed by chamfering an edge portion, comprises the steps of: applying a laser beam to the edge portion including the chamfered face of the semiconductor wafer; detecting reflected light in both of a bright field and a dark field to obtain a bright field image and a dark field image; and making determination that a defect detected in both of the bright field image and dark field image and having a size smaller than a predetermined size is a slip.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a semiconductor wafer evaluation method.

  It is known that slip is generated particularly at an edge portion by subjecting a semiconductor wafer to a heat treatment such as epitaxial growth or Ar annealing. There are many documents regarding methods for suppressing the occurrence of slip, for example, Patent Document 1 and Patent Document 2 are disclosed. Patent Document 3 discloses a method for predicting the occurrence of slip. Incidentally, slip is also called slip dislocation and is a kind of defect that occurs in a semiconductor wafer. Such a slip is known to cause a leakage defect in a semiconductor device manufactured using a semiconductor wafer.

  XRT (X-Ray Topography) is generally used as a method for detecting a slip of a semiconductor wafer. However, since XRT particularly uses X-rays, it is necessary to protect and manage X-rays. In addition, XRT makes it difficult to measure only the edge portion. For example, a semiconductor wafer having a diameter of 300 mm requires several hours to measure one.

  In addition, Patent Document 4 is disclosed as a technique for detecting a slip, and this applies a wavelength tunable laser beam from both the upper and lower surfaces of a wafer. The technique of Patent Document 4 is characterized in that laser light having a wavelength of 700 nm to 1100 nm, mainly in the vicinity of the IR region, is used, and the laser light is transmitted from both the upper and lower surfaces of the wafer. However, this method can deal only with the upper and lower surfaces where the shape of the wafer is stable, and is difficult to use at the edge portion where the shape change is large. In addition, the design of the apparatus is complicated because the laser beam is irradiated from the upper and lower two locations, and the initial cost and running cost are high.

JP 2007-329447 A JP-A-9-321105 JP 2011-108766 A JP-A-10-62355

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a method for evaluating a slip generated at an edge portion of a semiconductor wafer in a short time and in a nondestructive manner.

  In order to achieve the above object, the present invention provides a method for evaluating a heat-treated semiconductor wafer, wherein the semiconductor wafer has a main surface and a main back surface as main surfaces, and chamfering is performed on an edge portion. A semiconductor wafer having a chamfered surface, and irradiating an edge portion including the chamfered surface of the semiconductor wafer with a laser beam, and detecting reflected light in both a bright field and a dark field, Provided is a method for evaluating a semiconductor wafer by obtaining a dark-field image and determining a defect detected in both the bright-field image and the dark-field image that is less than a predetermined size as a slip.

  With such a semiconductor wafer evaluation method, it is possible to evaluate a slip generated at the edge portion of the semiconductor wafer in a short time and in a non-destructive manner.

  The heat treatment preferably includes epitaxial growth.

  In the present invention, it is possible to evaluate a semiconductor wafer that has been subjected to such a heat treatment.

  The wavelength of the laser beam is preferably 200 nm to 700 nm.

  By setting the wavelength of such a laser beam, it is possible to evaluate the slip more efficiently and to provide a semiconductor wafer evaluation method with simplified equipment.

  Further, it is preferable that the predetermined size is determined based on a relationship between a defect type and a size determined in advance.

  The predetermined size is preferably 0.4 mm.

  By determining the predetermined size in this way, it is possible to determine slip more efficiently.

  As described above, according to the semiconductor wafer evaluation method of the present invention, the slip generated at the edge portion of the semiconductor wafer can be evaluated in a short time and in a nondestructive manner. In other words, by rotating the wafer, the slip generated near the edge can be reliably captured in a few minutes per piece, so the position and number of slips generated by the heat treatment process can be evaluated in a short time. In addition, since it is a nondestructive inspection, there is no reduction in product yield. Further, the present invention is characterized in that it does not use diffraction and transmission such as XRT and IR as described above, and only one laser source having a wavelength of 200 to 700 nm and a detection unit are required, and the equipment can be simplified. Further, by knowing the occurrence position and the number of slips of the semiconductor wafer at the inspection stage of the semiconductor wafer, it is possible to acquire data effective for the process management of the slip quality of the heat treatment process including epitaxial growth. Specifically, it can be used for grasping the difference between heat treatment furnaces including an epitaxial furnace and changing heat treatment conditions.

It is an example of the schematic diagram which shows the evaluation method of the semiconductor wafer of this invention. It is a flowchart which shows an example of the evaluation method of the semiconductor wafer after heat processing. It is an example of the bright-field image of the edge part of the semiconductor wafer obtained by the evaluation method of the semiconductor wafer of this invention. It is an example of the dark field image of the edge part of the semiconductor wafer obtained by the evaluation method of the semiconductor wafer of this invention. It is the bright field image and dark field image of the slip in the edge part of the semiconductor wafer obtained in the Example. It is the bright field image and dark field image of the particle | grains in the edge part of the semiconductor wafer obtained in the Example. It is the bright field image and dark field image of the chip | tip in the edge part of the semiconductor wafer obtained in the Example. It is an XRT image of the whole semiconductor wafer obtained in the reference example. It is a comparison of an XRT image and the bright field image by the evaluation method of the semiconductor wafer of this invention about arbitrary 10 points | pieces slips in the edge part of the semiconductor wafer obtained by the reference example.

  As described above, development of a method for evaluating slip generated at the edge portion of a semiconductor wafer in a short time and in a non-destructive manner has been demanded.

  As a result of intensive studies on the above problems, the present inventors have observed a semiconductor wafer in which slip has occurred. In both bright field and dark field, the slip is less than a certain size (predetermined size). Other defects such as scratches, chips, cracks, etc., are detected in various sizes in the dark field, but in the bright field, those having a size smaller than the predetermined size are detected. It has been found that this is not the case and the present invention has been completed.

  That is, the present invention is a method for evaluating a heat-treated semiconductor wafer, the semiconductor wafer having a main surface and a main back surface as main surfaces, and a chamfered surface having chamfered edges. The semiconductor wafer has a laser beam applied to the edge portion including the chamfered surface of the semiconductor wafer, and the reflected light is detected in both a bright field and a dark field to obtain a bright field image and a dark field image. This is a method for evaluating a semiconductor wafer in which a defect detected in both the bright field image and the dark field image and having a size less than a predetermined size is determined to be a slip.

  Hereinafter, although the evaluation method of the semiconductor wafer of this invention is demonstrated in detail, this invention is not limited to these.

<Semiconductor wafer evaluation method>
FIG. 1 is an example of a schematic diagram showing a semiconductor wafer evaluation method of the present invention. The edge part 1 of the semiconductor wafer is irradiated with laser light from the laser source 2, and reflected light (direct reflected light) 5 and reflected light (scattered light) 6 are detected by the bright field detector 3 and the dark field detector 4. A bright-field image and a dark-field image can be obtained.

<Heat-treated semiconductor wafer>
A semiconductor wafer is a substrate material used to produce a semiconductor IC (Integrated Circuit) such as silicon, GaAs, GaN, or SiC. In the semiconductor wafer evaluation method of the present invention, a semiconductor wafer that has been subjected to a heat treatment in which the occurrence of slip is a concern is targeted. In addition, since an inspection process is generally performed after the semiconductor wafer is processed or heat-treated, FIG. 2 shows a typical flow of the semiconductor wafer. In the preceding stage from the flow chart of FIG. 2, for example, steps such as ingot production, slicing, chamfering, lapping, surface grinding, double-head grinding, etching, polishing, and cleaning can be performed. In addition, an inspection step different from the polishing step, the cleaning step, and the edge inspection step may be included between the heat treatment step (S1) and the edge inspection step (S2) in FIG.

  In the heat treatment step (S1) of FIG. 2, an epitaxial growth process is generally used, but short-time annealing called RTP (Rapid Thermal Process) or annealing using a vertical furnace or the like longer than RTP. Such a heat treatment process is also included in this heat treatment step. In addition, all heat treatments that may cause slip into the semiconductor wafer are included.

  Semiconductor wafer support parts called susceptors used in epitaxial growth processes and semiconductor wafer support parts called boats used in heat treatment processes such as Ar annealing often have contact points at the edge of the semiconductor wafer, In many cases, the slip is generated from the contact of the edge portion.

  The edge inspection step (S2) in FIG. 2 is a step of inspecting defects such as scratches, chips and cracks in the chamfered surface and its vicinity, for example, the region (edge portion) from the most advanced portion of the semiconductor wafer to the inside of several mm. is there. Here, the most advanced part of the semiconductor wafer refers to the outermost peripheral part farthest in the radial direction from the center of the circle on the front and back surfaces of the semiconductor wafer. Further, the inside of several mm refers to the inside of about 2 mm to 3 mm from the most advanced part of the semiconductor wafer. This range is, for example, a target portion for edge inspection because defects such as scratches on the front and back surfaces of the semiconductor wafer and particles cannot be inspected.

  In this edge inspection process, inspection by laser light is mainly used, and defects are identified by observing light reflected on scratches, chips, cracks and the like as described above. Further, in this edge inspection process, by using the semiconductor wafer evaluation method of the present invention, by providing means for automatically recording the slip occurrence position and the number of slip occurrences from the slip image, the process control of the heat treatment process For example, it can be used for grasping the machine difference of the heat treatment furnace, the balance of the contact point between the boat and the semiconductor wafer in the heat treatment furnace, and the like.

<Bright field image and dark field image>
3 and 4 are examples of a bright field image and a dark field image obtained by the semiconductor wafer evaluation method of the present invention. How to view this image will be described. The horizontal direction is the entire circumference of the wafer 7 and shows that 360 degrees of the circumference of this wafer was measured. Further, the positional relationship among the entire circumference 7 of the semiconductor wafer is shown on the lower side of the image, and the main surface 8, the main back surface 9, and the chamfered surface 10 are shown on the right side of the image. Thus, the feature of this image is that the entire periphery of the edge portion of the semiconductor wafer is extended and shown in a rectangular shape. Since the bright-field image of FIG. 3 is obtained by detecting the directly reflected laser beam, if there are defects such as scratches, chips, cracks, or foreign matter, the portion in the bright-field image becomes dark. On the other hand, since the dark field image of FIG. 4 is obtained by detecting scattered light, if there are defects such as scratches, chips, cracks, and foreign matters, the dark field image becomes brighter.

<Laser light>
The wavelength of the laser beam used in the semiconductor wafer evaluation method of the present invention is preferably 200 nm to 700 nm. If the wavelength is 700 nm or less, it is a wavelength suitable for the semiconductor wafer evaluation method of the present invention using reflection of laser light, unlike Patent Document 4 in which a semiconductor wafer is transmitted and inspected. In addition, if the wavelength is 200 nm or more, since it is not a radiation region including X-rays, the cost for its management is not high.

<Predetermined size>
When a semiconductor wafer is observed, a slip smaller than a specific size (predetermined size) is detected in both the bright field and dark field. On the other hand, in other defects such as scratches, chips and cracks, defects of various sizes are detected in the dark field, but in the bright field, those having a size smaller than the predetermined size are hardly detected. The specific size is the circumferential length that can be confirmed in the dark field of the semiconductor wafer, for example, 0.4 mm, but it is possible to identify slips and other defects by using this size-specific region.

  Here, the reason why particles and scratches other than slip are not detected in the bright field will be described. When the observation target is irradiated with laser light, the laser light has a certain size called a spot diameter. If the defect size is significantly smaller than the spot diameter, the reflected light is not attenuated, and there is also an interpolation with the adjacent inspection area, making detection difficult in the bright field. However, even if the defect size in the radial direction is the same, if the vertical direction (for example, height and depth) of the defect from the wafer main surface is different, a difference in detection sensitivity occurs. In the present invention, the defect height or the defect depth of the slip is detected in a bright field by utilizing the fact that it has characteristics different from those of other defects.

  As described above, according to the semiconductor wafer evaluation method of the present invention, the slip generated at the edge portion of the semiconductor wafer can be evaluated in a short time and in a non-destructive manner. In addition, as described above, conventionally, the edge portion is irradiated with laser light and the reflected light is detected and evaluated mainly for scratches, cracks, and cracks, and slip detection has not been performed. If it is the evaluation method of the semiconductor wafer of this invention, a slip can be detected by observing less than predetermined size using both the bright field and dark field of reflected light.

EXAMPLES Hereinafter, although this invention is demonstrated concretely using an Example and a comparative example, this invention is not limited to these.
[Example]

<Preparation of heat-treated semiconductor wafer>
In this example, a semiconductor wafer obtained from a silicon single crystal having a diameter of 300 mm grown by the Czochralski method was used. The number of samples of the semiconductor wafer was five. Hereinafter, description will be made with reference to the flow of FIG. In the previous stage of the heat treatment step (S1), mirror finishing by a polishing step was performed. In the heat treatment step (S1), epitaxial growth was performed using a single-wafer epitaxial growth apparatus (Centura manufactured by Applied Material). Incidentally, since the semiconductor wafer sample used in the example is intended for slip detection, it is processed under conditions where slip is likely to occur during epitaxial growth. Cleaning is performed between the heat treatment step (S1) and the edge inspection step (S2), specifically, so-called SC1 cleaning in which water, ammonia water and hydrogen peroxide water are mixed, and further water, hydrochloric acid, excess water. So-called SC2 cleaning in which hydrogen oxide water is mixed is performed.

<Measurement of bright field image and dark field image>
In the edge inspection step (S2), a bright field image and a dark field image of the edge portion of the semiconductor wafer subjected to heat treatment using the CV-300 series manufactured by KLA-Tencor were obtained. As the laser light, a 405 nm oscillator was used, a CCD (Charge Coupled Device) was used as a bright field detector, and a PMT (Photomultiplier Tube) was used as a dark field detector. Although not shown, the semiconductor wafer is rotating and only the edge portion is inspected.

  FIG. 5 is a bright-field image and a dark-field image of a slip obtained from the edge portion of the semiconductor wafer. Incidentally, the image shows the circumferential direction 11 of the semiconductor wafer on the horizontal side and the radial direction 12 on the vertical side. Here, the defect size is defined as the circumferential length of the defect shown in the dark field image. From FIG. 5, it can be seen that two points of slip can be confirmed from both images, and the size is about 0.2 mm from the scale.

  FIG. 6 shows a bright-field image and a dark-field image when particles are measured as defects that are not slips. A particle is a foreign substance adhering to a semiconductor wafer. It can be seen from the scale that the defect size reflected in the dark field image is about 0.3 mm. It can be seen that the particles in FIG. 6 are not shown in the bright field image although they are larger than the slip shown in FIG.

  FIG. 7 shows a bright-field image and a dark-field image when a chip formed on a semiconductor wafer is measured. A chip is a small chipped state, sometimes called chipping. It can be seen from the scale that the defect size is a little over 1 mm. In the case of such a large defect, it is possible to detect both bright field and dark field without using the above-mentioned slip, but in such a case, it is easily distinguishable from the slip from the size. .

Since the present invention is characterized in that slip can be detected in both bright field and dark field as described above, it is quantified using an index called bright field detection rate as follows (the calculation method is Equation 1). See). Specifically, as shown in FIG. 5, the ratio at which the slip detected in the dark field can be confirmed in the bright field image at the same position was calculated. Incidentally, since the dark field is designed to have higher sensitivity in this apparatus, a situation in which slip is detected in the bright field but not in the dark field does not occur.
Bright field detection rate (%) = (number of bright field detection points / number of dark field detection points) × 100 (Equation 1)

  Table 1 shows the bright field detection rate for each defect size calculated using Equation 1. Here, 0.2 to 0.3 mm shown in Table 1 means that the circumferential length of the defect in the dark field is 0.2 mm or more and less than 0.3 mm. The N number for calculating the bright field detection rate for each defect size is 50 points arbitrarily extracted from five semiconductor wafer samples. For example, if the slip of 0.2 to 0.3 mm is 98%, it is determined that the slip is 50% in advance by XRT and the defect size is confirmed to be 0.2 to 0.3 mm by dark field observation. This means that 49 points were confirmed by the bright field image at the same position. In addition, the defect size region of 0.4 to 0.5 mm or the defect size region of 0.5 mm or more was indicated as “not detected”, but such a large slip could not be confirmed, and this was confirmed by XRT separately. It is. On the other hand, since defect sizes of less than 0.2 mm are close to the detection limit in this apparatus and lack stability, only defects having a defect size of 0.2 mm or more were used for the calculation of the bright field detection rate. Table 1 shows that the defect size of 0.2 to 0.3 mm and 0.3 to 0.4 mm, that is, 0.4 mm as a predetermined defect size, the bright field detection rate less than this value is the slip detection rate. From this, it can be seen that slip can be detected with a high accuracy of 90% or more.

  Table 2 shows the total measurement time of five semiconductor wafer samples used in the present invention. It took 19 minutes to measure slip and other defects in the examples. It can be measured in less than 4 minutes per sample.

[Comparative example]
In the comparative example, the total measurement time when the five semiconductor wafer samples used in the examples were observed with XRT was shown. The result was 610 minutes from Table 2, which was a little over 120 minutes per sample.

  From the above results, according to the semiconductor wafer evaluation method of the present invention, it is possible to determine non-destructively whether or not a slip is caused by the presence or absence of a defect that is smaller than a predetermined size and detected in a bright field. Further, it is possible to determine that a defect larger than a predetermined size among the defects detected in the bright field is not a slip. Further, it has been found that the time required for slip detection can be significantly reduced as compared with the conventional XRT. On the other hand, the XRT observation of the comparative example required a long time for measurement.

[Reference example]
FIG. 8 is an XRT image of one of the same five semiconductor wafer samples used in the examples and comparative examples. As the XRT apparatus, XRTmicron manufactured by Rigaku was used. It was confirmed from this XRT image whether slip detection could be obtained in the bright field image and dark field image of the example. Therefore, such an XRT image is unnecessary in the actual evaluation according to the present invention. FIG. 9 shows an XRT image obtained by enlarging the edge portion of the slip detected at the edge portion of the semiconductor wafer sample used in FIG. 8 and an arbitrary 10 points of the bright field image of the present invention. This image is an example because of any 10 points, but all the slips detected by XRT can be confirmed in the bright field image. Although the dark field image is omitted, all slips are confirmed in the dark field image as in the bright field image.

  The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits the same effects. Are included in the technical scope.

DESCRIPTION OF SYMBOLS 1 ... Semiconductor wafer edge part, 2 ... Laser source, 3 ... Bright field detector,
4 ... dark field detector, 5 ... reflected light (direct reflected light), 6 ... reflected light (scattered light),
7 ... Whole circumference of semiconductor wafer, 8 ... Main surface, 9 ... Main back surface, 10 ... Chamfered surface,
11 ... circumferential direction, 12 ... radial direction.

Claims (5)

A method for evaluating a heat-treated semiconductor wafer,
The semiconductor wafer is a semiconductor wafer having a main surface and a main back surface as main surfaces and a chamfered surface with chamfered edges, and a laser is applied to the edge portion including the chamfered surface of the semiconductor wafer. Irradiating light and detecting the reflected light in both bright and dark fields to obtain bright field and dark field images, defects detected in both the bright field and dark field images, A method for evaluating a semiconductor wafer, wherein a defect having a size less than a predetermined size is determined to be a slip.   2. The semiconductor wafer evaluation method according to claim 1, wherein the heat treatment includes epitaxial growth.   3. The semiconductor wafer evaluation method according to claim 1, wherein a wavelength of the laser beam is set to 200 nm to 700 nm.   The semiconductor wafer evaluation method according to any one of claims 1 to 3, wherein the predetermined size is determined based on a relationship between a defect type and a size obtained in advance.   The semiconductor wafer evaluation method according to claim 1, wherein the predetermined size is 0.4 mm.