JP2019045676A - Display device - Google Patents

Abstract

To provide a high-definition display device.SOLUTION: A display device includes: a glass substrate 140 having a first surface 140a, a second surface 140b, and a through hole penetrating through the first and second surfaces; display elements arranged in matrix on the first surface and including thin-film transistors 124 and electric optical elements 113; a drive IC 105 arranged on the second surface and controlling the thin-film transistors and the electric optical elements; and through electrodes 150 arranged in the first surface, the second surface, and the through hole, to electrically connect the drive IC to the thin-film transistors.SELECTED DRAWING: Figure 9

Description

  One embodiment of the present disclosure relates to a display device.

  In recent years, in public spaces such as streets, public institutions such as stations and airports, shopping malls and showrooms, various types of information have been transmitted using large displays. As one of large displays, a micro LED display has attracted attention. A micro LED display has a plurality of fine LED elements spread over the display, and can display a high-quality image. In addition, since the micro LED display can be configured by bonding a plurality of display units each having a fine LED element, the display can be enlarged according to the installation location.

  For example, Patent Document 1 discloses a technique for configuring a large-screen micro LED display by bonding a printed circuit board made of a resin on which a plurality of LED elements are mounted in a tile shape.

JP-A-2015-197544

  However, in the technique disclosed in Patent Document 1, as the area of the printed board increases, the printed board is warped. Also, the line width of the wiring arranged on the printed circuit board made of resin and the distance between the wiring and the wiring are larger than the line width of the wiring formed using photolithography and the distance between the wiring and the wiring. large. Therefore, it is difficult to construct a high-definition display by laying a plurality of LED elements on a printed circuit board made of resin at a high density and without seams.

  Therefore, one of the objects in the embodiment of the present disclosure is to provide a high-definition display device.

  One embodiment of the present disclosure is a display device. The display device includes a glass substrate having a first surface, a second surface, and a through-hole penetrating the first surface and the second surface, and is arranged in a matrix on the first surface. A display element having an element, a driving IC provided on the second surface for controlling the thin film transistor and the electro-optical element, and provided on the first surface, the second surface, and the through hole, and electrically connecting the driving IC and the thin film transistor to each other. And a through electrode to be connected to each other.

  One embodiment of the present disclosure is a display device. The display device includes a first wiring, a second wiring, and a third wiring provided on the first surface, a first insulating film and a second insulating film provided between the first surface and the first wiring, and the first wiring. And a third insulating film provided between the second wiring and the second wiring, and a fourth insulating film provided between the second wiring and the third wiring.

  One embodiment of the present disclosure is a display device. The first wiring included in the display device may be electrically connected to the through electrode through an opening that opens the first insulating film and the second insulating film.

  One embodiment of the present disclosure is a display device. The second wiring included in the display device may be electrically connected to the first wiring through an opening that opens the third insulating film.

  One embodiment of the present disclosure is a display device. The third wiring included in the display device may be electrically connected to the second wiring through an opening that opens the fourth insulating film.

  One embodiment of the present disclosure is a display device. The thin film transistor included in the display device includes a first terminal connected to the first wiring and the through electrode, an opening opening the fourth insulating film, and an opening opening the second insulating film and the third insulating film. A second terminal connected to the third wiring and the second wiring, and a gate line between the first terminal and the second terminal through an opening for opening the second insulating film and the third insulating film. And a gate terminal for controlling the conduction.

  One embodiment of the present disclosure is a display device. The electro-optical element included in the display device may be electrically connected to the second terminal.

  One embodiment of the present disclosure is a display device. The electro-optical element included in the display device may be an LED element or an EL element.

  One embodiment of the present disclosure is a display device. The display device includes a glass substrate having a first surface, a second surface, a through-hole penetrating the first surface and the second surface, thin film transistors arranged in a matrix on the first surface, A display element having electro-optic elements arranged in a matrix on two surfaces; a driving IC provided on the first surface for controlling the thin film transistor and the electro-optic element; the first surface, the second surface, and the through-hole A through electrode provided in the hole and electrically connecting the electro-optic element and the thin film transistor;

  One embodiment of the present disclosure is a display device. The display device includes a first insulating film and a second insulating film provided between the first surface and the first wiring, a third insulating film provided between the first wiring and the second wiring, and a second wiring. And a fourth insulating film provided between the first wiring and the third wiring.

  One embodiment of the present disclosure is a display device. The first wiring included in the display device may be electrically connected to the through electrode through an opening that opens the first insulating film and the second insulating film.

  One embodiment of the present disclosure is a display device. The second wiring included in the display device may be electrically connected to the first wiring through an opening that opens the third insulating film.

  One embodiment of the present disclosure is a display device. The third wiring included in the display device may be electrically connected to the second wiring through an opening that opens the fourth insulating film.

  One embodiment of the present disclosure is a display device. The thin film transistor included in the display device includes a first terminal connected to the first wiring and the through electrode, an opening opening the fourth insulating film, and an opening opening the second insulating film and the third insulating film. The second terminal connected to the third wiring and the second wiring through the opening that opens the second insulating film and the third insulating film, and between the first terminal and the second terminal connected to the gate line And a gate terminal for controlling conduction.

  One embodiment of the present disclosure is a display device. The electro-optical element included in the display device may be electrically connected to the first terminal, and the driving IC may be electrically connected to the second terminal.

  One embodiment of the present disclosure is a display device. The electro-optical element included in the display device may be an LED element or an EL element.

It is a perspective view explaining a display concerning one embodiment of this indication. It is sectional drawing along the A1-A2 line | wire of the display apparatus shown in FIG. It is a top view explaining a display concerning one embodiment of this indication. 3 is a plan view illustrating a pixel circuit of a display device according to an embodiment of the present disclosure. FIG. 3 is a plan view illustrating a pixel circuit of a display device according to an embodiment of the present disclosure. FIG. 3 is a plan view illustrating a pixel circuit of a display device according to an embodiment of the present disclosure. FIG. 3 is a plan view illustrating a layout of a display device according to an embodiment of the present disclosure. FIG. 3 is a plan view illustrating a wiring layout of a display device according to an embodiment of the present disclosure. FIG. FIG. 8 is a cross-sectional view taken along line B1-B2 of the display device shown in FIG. 5 is a cross-sectional view illustrating a manufacturing process of a display device according to an embodiment of the present disclosure. FIG. 5 is a cross-sectional view illustrating a manufacturing process of a display device according to an embodiment of the present disclosure. FIG. 5 is a cross-sectional view illustrating a manufacturing process of a display device according to an embodiment of the present disclosure. FIG. 5 is a cross-sectional view illustrating a manufacturing process of a display device according to an embodiment of the present disclosure. FIG. 5 is a cross-sectional view illustrating a manufacturing process of a display device according to an embodiment of the present disclosure. FIG. 5 is a cross-sectional view illustrating a manufacturing process of a display device according to an embodiment of the present disclosure. FIG. 5 is a cross-sectional view illustrating a manufacturing process of a display device according to an embodiment of the present disclosure. FIG. 5 is a cross-sectional view illustrating a manufacturing process of a display device according to an embodiment of the present disclosure. FIG. 5 is a cross-sectional view illustrating a manufacturing process of a display device according to an embodiment of the present disclosure. FIG. 5 is a cross-sectional view illustrating a manufacturing process of a display device according to an embodiment of the present disclosure. FIG. 5 is a cross-sectional view illustrating a manufacturing process of a display device according to an embodiment of the present disclosure. FIG. 5 is a cross-sectional view illustrating a manufacturing process of a display device according to an embodiment of the present disclosure. FIG. 6A and 6B are a plan view and a cross-sectional view illustrating a through electrode of a display device according to an embodiment of the present disclosure. 5 is a cross-sectional view illustrating a manufacturing process of a through electrode of a display device according to an embodiment of the present disclosure. FIG. 5 is a cross-sectional view illustrating a manufacturing process of a through electrode of a display device according to an embodiment of the present disclosure. FIG. 5 is a cross-sectional view illustrating a manufacturing process of a through electrode of a display device according to an embodiment of the present disclosure. FIG. 5 is a cross-sectional view illustrating a manufacturing process of a through electrode of a display device according to an embodiment of the present disclosure. FIG.

  Hereinafter, each embodiment of the present disclosure will be described with reference to the drawings. However, the present disclosure can be implemented in various modes without departing from the gist thereof, and is not construed as being limited to the description of the embodiments exemplified below.

  In order to clarify the description, the drawings may be schematically represented with respect to the width, thickness, shape, and the like of each part as compared to actual aspects, but are merely examples and limit the interpretation of the present disclosure. Not what you want. In the present specification and each drawing, elements having the same functions as those described with reference to the previous drawings may be denoted by the same reference numerals, and redundant description may be omitted.

  In the present specification and claims, in expressing a mode of disposing another structure on a certain structure, when simply describing “on top”, unless otherwise specified, It includes both the case where another structure is disposed immediately above and a case where another structure is disposed via another structure above a certain structure. Further, in the present specification and claims, U and its arrow represent the top and top in the cross section, and D and its arrow represent the bottom and the bottom in the cross section.

  In the present specification and claims, the expression that a certain structure and another structure overlap each other means that at least a part thereof overlaps in plan view of these structures. In other words, it means that one of these structures is positioned above or below the other, and when these structures are viewed from the upper surface or from the lower surface, at least part of them overlap each other. To do.

(First embodiment)
(1-1. Structure of display device)
FIG. 1 is a perspective view illustrating an example of a display device 100 that is one embodiment of the present disclosure. The display device 100 includes a support substrate 101 and a display element mounting substrate 110. A plurality of display element mounting substrates 110 are laid out on the support substrate 101 in a tile shape. FIG. 1 shows an example in which, for example, 25 display element mounting substrates 110 are arranged on the support substrate 101.

  FIG. 2 shows a cross-sectional view along the line A1-A2 of FIG. The display element mounting substrate 110 includes a first drive IC 103, a wiring substrate 111, a display element drive layer 116, and an electro-optical element 113. The wiring substrate 111 passes through the first surface 140a, the second surface 140b, and the glass substrate 140 having a through hole, the first surface 140a, the second surface 140b, and the first surface 140a and the second surface 140b. And a through electrode 115 provided in the through hole. Note that the first surface 140a and the second surface 140b have a relationship of upper and lower or front and back with respect to the wiring substrate 111.

  The through electrode 115 has a role of electrically connecting the wiring extending to the first surface 140 a of the wiring substrate 111 and the wiring extending to the second surface 140 b of the wiring substrate 111.

  The display element driving layer 116 is provided on the first surface 140a. Although details will be described later, the display element driving layer 116 includes a thin film transistor, and the thin film transistor and the through electrode 115 are electrically connected to a wiring extending on the first surface 140a of the wiring substrate 111. . Further, although details will be described later, the electro-optical element 113 is provided on the first surface 140 a and is electrically connected to the wiring layer provided on the display element driving layer 116 by the bump 114.

  The first drive IC 103 is provided on the second surface 140b. The first driving IC 103 is electrically connected to the wiring extending to the second surface 140 b of the wiring substrate 111 and the through electrode 115 by the bump 114.

  FIG. 3 is a plan view of the display element mounting substrate 110 included in the display device 100 that is one embodiment of the present disclosure. The display element mounting substrate 110 includes a display area 102, a first drive IC 103 that controls the display area 102, a second drive IC 105 that controls the display area 102, and a third drive IC 106 that controls the display area 102. The display region 102 is provided with a plurality of display elements 112 arranged in a matrix. Although not shown, like the first drive IC 103, the second drive IC 105 and the third drive IC 106 also have a bump 114 and a wiring that extends to the second surface 140 b of the wiring substrate 111 and a through hole. The electrode 115 is electrically connected.

  The first drive IC 103 and the second drive IC 105 drive pixel circuits provided in each of the plurality of display elements 112 and control light emission of the plurality of display elements 112.

  The first drive IC 103 is connected to a plurality of gate lines 211 (shown in FIG. 4). The plurality of gate lines 211 are provided for each row of the plurality of display elements 112. The first driving IC 103 sequentially selects the plurality of gate lines 211 according to a clock signal, a timing signal, a voltage supplied to a power source, and the like. The first driving IC 103 is the same as, for example, a gate line driving circuit, a gate driver, a gate driver IC, and the like.

  The second driving IC 105 is connected to a plurality of signal lines 213 (shown in FIG. 4). The plurality of signal lines 213 are provided for each column of the plurality of display elements 112. The second driving IC 105 selects a voltage corresponding to the video signal of the selected display element 112 via each of the plurality of signal lines 213 in accordance with the selection of the gate line 211 by the first driving IC 103. 112 writes. In addition, the second driving IC 105 supplies a voltage to the voltage line 212 and causes the selected display element 112 to emit light. The second driver IC 105 is the same as, for example, a source line driver circuit, a source driver, a driver IC, and the like.

  The third driving IC 106 is electrically connected to the first driving IC 103 and the second driving IC 105 by the bump 114, the through electrode 115, and a wiring layer (not shown) on the second surface 140b, A power supply voltage or the like is supplied to the first drive IC 103 and the second drive IC 105. The third drive IC 106 can generate each signal and power supply voltage using a logic circuit (not shown) and a voltage generation circuit (not shown) included in the third drive IC 106. The positions where the first drive IC 103, the second drive IC 105, and the third drive IC 106 are arranged are not limited to the positions shown in FIG. For example, the first drive IC 103 is disposed on the right side of the display element mounting substrate 110 in plan view, but may be disposed on the center or the left side. In addition, the second drive IC 105 is disposed below the display element mounting substrate 110 in plan view, but may be disposed at the center or above. The third drive IC 106 is disposed at the lower right in the plan view, but may be disposed at the center, the upper left, the upper right, or the lower left. 3 shows an example in which the first drive IC 103, the second drive IC 105, and the third drive IC 106 are arranged one by one on the display element mounting substrate 110, but the present invention is not limited to this example. For example, the display element mounting substrate 110 may be divided into two parts, and the first drive IC 103, the second drive IC 105, and the third drive IC 106 may be provided in each of the divided parts. By arranging a plurality of first drive ICs 103, second drive ICs 105, and third drive ICs 106 on the display element mounting substrate 110, each of the first drive IC 103, the second drive IC 105, and the third drive IC 106 is driven. Since the number of display elements 112 can be reduced, the size of each IC can be reduced.

(1-2. Pixel circuit)
FIG. 4 shows a pixel circuit in the region 104 of the display element mounting substrate 110 shown in FIG. In the region 104, display elements 112 are provided in 2 rows × 3 columns. The display element 112 includes a data writing transistor 122, a display element driving transistor 124, a storage capacitor 126, and an electro-optical element 113. The display element 112 corresponds to one pixel of the display device 100. Note that the configuration of the display element 112 is an example, and the present invention is not limited to this. The data writing transistor 122 and the display element driving transistor 124 are thin film transistors.

  In the display region 102, a plurality of gate lines 211, a plurality of reference voltage lines 214, a plurality of power supply lines 216, and a plurality of ground lines 218 extending in the row direction are provided. In the display region 102, a plurality of voltage lines 212 and a plurality of signal lines 213 extending in the column direction are provided.

  The display element driving transistor 124 is connected to the electro-optical element 113 and has a role of controlling the light emission luminance of the electro-optical element 113. In the display element driving transistor 124, the drain current is controlled by the voltage between the gate and the source. The display element driving transistor 124 has a gate connected to the drain of the data writing transistor 122, a drain connected to the voltage line 212, and a source connected to one of the two terminals of the electro-optical element 113.

  The data writing transistor 122 has a role of controlling a conduction state between the signal line 213 and the gate of the display element driving transistor 124 by an on / off operation. The data writing transistor 122 has a gate connected to the gate line 211, a source connected to the signal line 213, and a drain connected to the gate of the display element driving transistor 124.

  In the electro-optic element 113, one of the two terminals is connected to the source of the display element driving transistor 124, and the other of the two terminals is connected to the reference voltage line 214. Between the voltage line 212 and the reference voltage line 214, the display element driving transistor 124 and the electro-optical element 113 are connected in series. Since the display element driving transistor 124 can control the current flowing from the voltage line 212 to the reference voltage line 214 through the electro-optical element 113, the light emission luminance of the electro-optical element 113 can be controlled. In order to increase the current flowing through the electro-optical element 113, for example, the width of the gate electrode of the display element driving transistor 124, the so-called gate length or the channel length is reduced, or the semiconductor layer of the display element driving transistor 124 is reduced. This can be realized by increasing the width, so-called channel width.

  As the electro-optic element 113, for example, a light emitting diode (LED) element or an electroluminescence (EL) element can be used. The electro-optic element 113 generally uses three colors: an element that emits red light, an element that emits green light, and an element that emits blue light. Further, the electro-optical element 113 may be four or more colors by using an element that emits white light or an element that emits yellow light. For example, when an LED element is used as the electro-optical element 113, among the three rows shown in FIG. 4, the right side emits red light, the middle LED emits green light, and the left side emits blue light. Can be used. FIG. 4 shows an example in which one electro-optic element 113 is provided, but the present invention is not limited to this example. For example, as shown in FIG. 5, three electro-optical elements may be configured by one IC (electro-optical element IC 113 a), and may be electrically connected to each display element 112. If it is desired to increase the current flowing through the electro-optical element 113, for example, as shown in the electro-optical element IC 113b with an analog buffer in FIG. 6, an analog buffer 113c for amplifying the current is separately provided in the electro-optical element IC 113a, The electro-optical element 113 may be electrically connected. The analog buffer 113 c is supplied with a voltage from the ground line 218 and the power supply line 216.

  The storage capacitor 126 is connected between the gate and drain of the display element driving transistor 124. The storage capacitor 126 holds a charge corresponding to a voltage applied between the gate and drain of the display element driving transistor 124.

  Each of the plurality of gate lines 211 is provided with a through electrode 115a. The through electrode 115 a is electrically connected to the gate of the display element driving transistor 124 included in each display element 112 through the gate line 211. Each of the plurality of reference voltage lines 214 is provided with a through electrode 115f. The through electrode 115 f is electrically connected to the other of the two terminals of the electro-optical element 113 included in each display element 112 via the reference voltage line 214. Each of the plurality of power supply lines 216 is provided with a through electrode 115d. Each of the plurality of power supply lines 216 is provided with a through electrode 115e. Each of the plurality of voltage lines 212 is provided with a through electrode 115b. The through electrode 115 b is electrically connected to the drain of the display element driving transistor 124 included in each display element 112 via the voltage line 212. Each of the plurality of signal lines 213 is provided with a through electrode 115c. The through electrode 115 c is electrically connected to the source of the data write transistor 122 included in each display element 112 through the signal line 213.

  Although FIG. 4 shows an example in which through electrodes are provided in all of the gate line 211, the reference voltage line 214, the ground line 218, the power supply line 216, the voltage line 212, and the signal line 213, the present invention is not limited to this configuration. For example, a through electrode may be provided in the gate line 211 and the signal line 213, or a through electrode may be provided in the reference voltage line 214, the power supply line 216, the power supply line 216, and the voltage line 212. By providing the through electrode, the wiring arranged on the first surface 140a and the wiring arranged on the second surface 140b can be electrically connected. When wiring is disposed only on the first surface 140a or the second surface 140b by electrically connecting the wiring disposed on the first surface 140a and the wiring disposed on the second surface 140b. Compared with, the resistance value of the wiring can be reduced. Further, by reducing the resistance value of the wiring, for example, signal delay can be reduced, and the amount of current that can be passed through the wiring can be increased. Note that the through electrode may be provided for each of a plurality of rows or a plurality of columns. Further, the through electrode can be provided as appropriate depending on the layout of the display element.

  FIG. 7 shows an example of the layout of the pixel circuit in the region 104 of the display element mounting substrate 110 shown in FIG. FIG. 7 shows wiring layers and semiconductor layers such as electrodes, power supply lines, and signal lines that constitute the display element 112, and illustration of the substrate and the insulating film is omitted.

  A gate line 211, a reference voltage line 214, a ground line 218, and a power supply line 216 are arranged in the x direction (row direction) of the display region 102. A voltage line 212 and a signal line 213 are arranged in the y direction (column direction) of the display area 102.

  The gate line 211, the reference voltage line 214, the ground line 218, and the power supply line 216 are electrically connected to the through electrode 150 at the left and right ends of each line in plan view. The voltage line 212 and the signal line 213 are connected to the through electrode 150 through the same wiring layer as the gate line 211, the reference voltage line 214, the ground line 218, and the power supply line 216 in the plan view. Electrically connected. The through electrode 150 shown in FIG. 7 is the through electrodes 115a to 115f shown in FIG.

  A semiconductor layer 141 is provided so as to overlap with a gate electrode electrically connected to the gate line 211. A region 141a where the semiconductor layer 141 and the gate electrode overlap functions as a channel region of the data write transistor 122 (shown in FIG. 4). Further, a semiconductor layer 142 is provided so as to overlap with the gate electrode 146 connected to the source or drain electrode 148-1. A region 142a where the semiconductor layer 142 and the gate electrode 146 overlap functions as a channel region of the display element driving transistor 124 (shown in FIG. 4).

  One of a source region and a drain region of the semiconductor layer 141 is connected to the signal line 213. The other of the source region and the drain region of the semiconductor layer 141 is connected to the source or drain electrode 148-1. One of the source region and the drain region of the semiconductor layer 142 is connected to the voltage line 212. A source electrode or a drain electrode 148-2 is connected to the other of the source region and the drain region of the semiconductor layer 142. The semiconductor layer 141 is connected to the gate electrode 146 through a source or drain electrode 148-1.

  One of the electro-optic elements 113 is connected to the source or drain electrode 148-2. The other end of the electro-optical element 113 is connected to the reference voltage line 214 through the same wiring layer as the gate line 211, the reference voltage line 214, the ground line 218, the power supply line 216, and the like.

  A signal for selecting the display element 112 is input to the gate line 211 from the first driving IC 103 via the through electrode 115a. The signal for selecting the display element 112 is, for example, a signal for causing the electro-optical element 113 included in the display element 112 to emit light based on a signal input to the signal line 213.

  A signal corresponding to the video signal is input to the signal line 213 from the second driving IC 105 through the through electrode 115c. The signal corresponding to the video signal is, for example, a signal that controls the emission luminance of the electro-optical element 113 included in the display element 112. Specifically, when the electro-optical element 113 included in the display element 112 is an element that emits red light, a voltage corresponding to a video signal that emits red light is supplied to the signal line 213. The light emission luminance can be changed depending on the supplied voltage.

  A fixed voltage (constant potential) is supplied to the reference voltage line 214 from the first driving IC 103 via the through electrode 115f. A fixed voltage (constant potential) is supplied to the ground line 218 from the first driving IC 103 via the through electrode 115e. A fixed voltage (constant potential) is supplied to the power supply line 216 from the first drive IC 103 via the through electrode 115d. A fixed voltage (constant potential) is supplied to the voltage line 212 from the second drive IC 105 via the through electrode 115b. Note that the driving IC that supplies a voltage to each line described here is not limited to the example described here. For example, the voltage supplied to the voltage line 212 may be laid out so as to be supplied from the first drive IC 103, and the voltage supplied to the ground line 218 and the power supply line 216 is supplied from the second drive IC 105. The layout may be as follows. Moreover, although the example which supplies a constant potential to each line was demonstrated, it is not limited to this example. For example, when the threshold value or current value of the display element driving transistor 124 that controls each display element 112 is corrected, the voltage supplied to the reference voltage line 214 is changed according to the timing of a signal for selecting the display element 112. Alternatively, the voltage supplied to the voltage line 212 may be changed. What is necessary is just to examine suitably according to the specification and application of the display apparatus 100.

  FIG. 8 illustrates an example of wiring extending from the first driving IC 103 and wiring extending from the second driving IC 105 disposed on the second surface 140 b of the display element mounting substrate 110. Each wiring is connected to the gate line 211, the reference voltage line 214, the ground line 218, the power supply line 216, the voltage line 212, and the signal line 213 on the first surface 140a through the through electrode. Note that the wiring extending from each driving IC may be a part of the through electrode.

  As described above, the wiring extending from the first drive IC 103 provided on the display element mounting substrate 110 is connected to the display element mounting substrate 110 by the through electrode 115a, the through electrode 115e, the through electrode 115d, and the through electrode 115f. The gate line 211, the reference voltage line 214, the power supply line 216, and the ground line 218 extending on the first surface can be connected. Further, the wiring extending from the second driving IC 105 provided on the display element mounting substrate 110 includes a voltage line 212 extending to the first surface of the display element mounting substrate 110 by the through electrode 115b and the through electrode 115c, and Each of the signal lines 213 can be connected.

(1-3. Connection between display element mounting substrate, driving IC and display element)
FIG. 9 is a cross-sectional view of the display element mounting substrate 110 taken along line B1-B2 of the display device 100 shown in FIG.

  A through electrode 150 is provided on the first surface 140 a of the glass substrate 140. An insulating layer 151 is provided on the through electrode 150. A semiconductor layer 142 and an insulating layer 152 are provided over the insulating layer 151. A wiring layer 153 and an insulating layer 154 are provided over the insulating layer 152. A wiring layer 155 and an insulating layer 156 are provided over the insulating layer 154. A wiring layer 157 is provided over the insulating layer 156. On the wiring layer 157, the electro-optical element 113 is provided. The through electrode 150 is also provided on the second surface 140b of the glass substrate 140 (in the direction of the arrow D in the figure). A second driving IC 105 is provided on the through electrode 150. Note that the wiring extending from the second driving IC 105 is also provided on the second surface 140b. In the present disclosure, an example in which the wiring extending from each driving IC is a part of the through electrode is shown.

  The wiring layer 153 is connected to the through electrode 150 through an opening that opens the insulating layer 151 and the insulating layer 152. The wiring layer 155 is connected to the semiconductor layer through an opening that opens the insulating layer 154 and the insulating layer 152. The wiring layer 155 is also connected to the wiring layer 153 through an opening that opens the insulating layer 154. The wiring layer 157 is connected to the wiring layer 155 through an opening that opens the insulating layer 156. The wiring layer 157 is connected to the electro-optical element 113 through the bumps 114. The through electrode 150 on the second surface 140b of the glass substrate 140 (in the direction of the arrow D in the figure) is connected to the second drive IC 105 through the bump 114.

  The wiring layer 155 is, for example, the voltage line 212 and the source or drain electrode 148-2. The wiring layer 153 is, for example, the gate line 211 and the gate electrode 146. The wiring layer 157 is, for example, an under bump metal 144. The bump 114 is, for example, a solder ball.

  As described above, the display region 102 including the display element driving layer 116 including the semiconductor layer 142, the wiring layers, and the insulating layers, and the electro-optic element 113 is formed on the first surface 140 a of the glass substrate 140. By providing the driving IC on the second surface 140b of the glass substrate 140, the driving IC is electrically connected to the first surface 140a and the second surface 140b of the glass substrate 140 through the through electrode 150 provided in the through hole. The display device 100 can be configured by electrically connecting the optical element 113.

(1-4. Manufacturing process of display device)
10 to 13 show an example of a manufacturing process of the display device 110 shown in FIG. 10 to 13 are cross-sectional views of the display element mounting substrate 110 taken along line B1-B2 line B1-B2 of the display device 100 shown in FIG. 7, similarly to FIG.

  First, as shown in FIG. 10, a through hole 150 a that penetrates the first surface 140 a and the second surface 140 b is formed in the glass substrate 140.

  In the embodiment of the present disclosure, the wiring substrate 111 uses the glass substrate 140 as an example, but is not limited to this example. The wiring substrate 111 is preferably made of a material having high rigidity, for example. In addition to a glass substrate, a quartz substrate, a sapphire substrate, a silicon carbide substrate, an alumina (Al 2 O 3) substrate, an aluminum nitride (AlN) substrate, zirconia oxide ( A ZrO2) substrate or a substrate in which these substrates are stacked can be used. Further, a Si wafer may be used. Further, the wiring board 111 may include a board made of a conductive material such as an aluminum board or a stainless steel board. By using a material having high rigidity as the wiring substrate 111, a display device with almost no warping of the substrate can be realized. The thickness of the glass substrate 140 is not particularly limited, but is preferably set to a thickness of 300 μm or more and 700 μm or less, for example. Further, by using a glass substrate, for example, processing by a heat treatment of 400 degrees or more is possible.

  The hole diameter of the opening of the through hole is preferably 30 μm or more and 100 μm or less. In the present specification, the hole diameter is defined as the larger diameter of the hole diameters of the first surface 140a and the second surface 140b. When the cross section of the through hole is not a circle, the diameter of the circle whose circumference is the circumference of the cross section is defined as the width of the through hole, that is, the hole diameter.

  The through-hole 150a is formed, for example, by irradiating the glass substrate 140 with a high-power laser beam and melting the glass substrate 140. Specifically, as in the embodiment of the present disclosure, when the glass substrate 140 is used as the wiring substrate 111, the through hole 150a is formed using a CO2 laser. In addition to the CO2 laser, an excimer laser, an Nd: YAG laser, and a femtosecond laser Nd: YAG laser may be used as a laser for processing the through-hole 150a.

  Note that the through-hole 150a may be formed by a blasting process in which an abrasive is sprayed onto the glass substrate 140. The through hole 150a may be formed by appropriately combining laser light irradiation and wet etching. At that time, a deteriorated layer may be formed in a region where the through hole 150a of the glass substrate 140 is to be formed by laser light irradiation.

  In addition, when using the glass substrate 140 for the wiring board 111, the chemical | medical solution used for wet etching is a hydrofluoric acid (HF), buffered hydrofluoric acid (BHF), surfactant addition buffered hydrofluoric acid (LAL), sulfuric acid, for example. (H2SO4), nitric acid (HNO3), hydrochloric acid (HCl) or the like, or a chemical solution obtained by mixing the above chemical solutions is used. The chemical used for the wet etching may be appropriately selected depending on the material of the wiring board 111.

  The through hole 150a may be formed by dry etching. Examples of the dry etching include a reactive ion etching (RIE) method, a DRIE (Deep Reactive Ion Etching) method using a Bosch process, and the like. Furthermore, the through hole 150a may be formed by a laser ablation method. Moreover, after forming the through-hole 150a by the laser ablation method, the shape of the through-hole 150a may be adjusted by performing discharge treatment inside the formed through-hole 150a.

  The through hole 150a may be formed by appropriately combining wet etching and a processing method including the dry etching.

  Next, as shown in FIG. 11, the through electrode 150 is formed in the through hole 150a, the first surface 140a, and the second surface 140b. First, a conductive film is formed in the through hole 150a, the first surface 140a, and the second surface 140b. Next, the through electrode 153 can be formed by patterning by a photolithography method. As a method for forming the conductive film, for example, a sputtering method can be used. As a material used for the through electrode 150, for example, a metal such as copper, gold, platinum, tin, aluminum, nickel, chromium, titanium, tungsten, or an alloy in which these metals are combined can be used. FIG. 11 shows an example in which the through electrode 150 is formed so as to fill the through hole 150a, but is not limited to this example. For example, a conductive film may be formed on the side wall of the through hole 150a. FIG. 11 shows an example in which a part of the through electrode 150 formed on the second surface 140b is a wiring extending from each driving IC.

  Subsequently, as shown in FIGS. 12 and 13, a display element driving layer 116 is formed.

  First, as shown in FIG. 12, the insulating layer 151 is formed on the first surface 140 a of the glass substrate 140 and on the through electrode 150 of the first surface 140 a of the glass substrate 140. As a method for forming the insulating layer 151, for example, a CVD method or a sputtering method can be used. As a material of the insulating layer 151, for example, an inorganic compound such as silicon oxide, silicon nitride oxide, silicon oxynitride, or silicon nitride can be used. In addition, FIG. 12 illustrates an example in which the insulating layer 151 is formed of one layer; however, the present invention is not limited to this example. For example, the insulating layer 151 may have a two-layer structure in which two of the above materials are stacked.

  Next, the semiconductor film 142 is formed over the insulating layer 151. The semiconductor film 142 is formed, for example, by forming a semiconductor layer by a CVD method and performing patterning by a photolithography method. As a material of the semiconductor film 142 and the semiconductor layer, for example, silicon or an oxide semiconductor can be used. As the oxide semiconductor, for example, a mixed oxide (IGZO) of indium, gallium, and zinc can be given. Further, the crystallinity of the semiconductor film 142 and the semiconductor layer may be any of amorphous, microcrystal, polycrystal, single crystal, or a mixture thereof, and can be appropriately selected according to the purpose and application. .

  Next, the insulating layer 152 is formed over the insulating layer 151 and the semiconductor film 142. The formation method and material of the insulating layer 152 can be the same formation method and material as the insulating layer 151.

  Next, an opening for opening the insulating layer 151 and the insulating layer 152 is formed. The opening is formed by patterning by a photolithography method. The opening exposes the through electrode 150. In the present disclosure, the formation of the opening for opening the insulating layer 151 and the insulating layer 152 has been described as an example, but the present invention is not limited to this example. For example, the opening for opening the insulating layer 151 may be formed after the opening for opening the insulating layer 152 is formed.

  Next, after a conductive film is formed by a sputtering method on the insulating layer 152, an opening for opening the insulating layer 151 and the insulating layer 152, and a portion where the through electrode 150 is exposed, patterning is performed by a photolithography method. Thereby, the wiring layer 153 is formed. The material used for the wiring layer 153 can be the same material as that used when forming the through electrode 150, such as aluminum, nickel, titanium, or tungsten. The wiring layer 153 is, for example, a wiring connected to the gate line 211, the gate electrode 146, and the through electrode.

  Next, the insulating layer 154 is formed over the insulating layer 152 and the wiring layer 153. The formation method and material of the insulating layer 154 can be the same formation method and material as the insulating layer 151. Subsequently, an opening for opening the insulating layer 154 and the insulating layer 152 and an opening for opening the insulating layer 154 are formed. The opening is formed by patterning by a photolithography method. The opening exposes the semiconductor film 142 and the wiring layer 153. In the present disclosure, the formation of the opening for opening the insulating layer 154 and the insulating layer 152 and the opening for opening the insulating layer 154 has been described as an example, but the present invention is not limited to this example. For example, after forming the opening for opening the insulating layer 154, the opening for opening the insulating layer 154 and the insulating layer 152 may be formed, or after forming the opening for opening the insulating layer 154, An opening for opening the insulating layer 152 may be formed.

  Next, a sputtering method is performed on the insulating layer 154 with an opening that opens the insulating layer 154 and the insulating layer 152, an opening that opens the insulating layer 154, a portion where the wiring layer 153 is exposed, and a portion where the semiconductor film 142 is exposed. After forming the conductive film, the wiring layer 155 is formed by patterning by a photolithography method. As the material of the wiring layer 155, the same material as that of the wiring layer 153 can be used. The wiring layer 155 is, for example, the voltage line 212 and the source or drain electrode 148-2.

  Next, the insulating layer 156 is formed over the insulating layer 154 and the wiring layer 155. The formation method and material of the insulating layer 156 can be the same formation method and material as the insulating layer 151. The material of the insulating layer 156 may be an organic resin such as polyimide or acrylic. In the case where an organic resin is used for the material of the insulating layer 156, for example, a spin coating method or a dipping method can be applied as a method of forming the insulating layer 156 using a liquid material. Note that a resin film of a film material can be used for the insulating layer 156. Subsequently, an opening for opening the insulating layer 156 is formed. The opening is formed by patterning by a photolithography method. The opening exposes the wiring layer 155.

  Subsequently, as shown in FIG. 13, a wiring layer 157 is formed. The wiring layer 157 is formed by forming a conductive film by a sputtering method in a portion where the wiring layer 155 is exposed, and then performing patterning by a photolithography method. As the material of the wiring layer 155, the same material as that of the wiring layer 153 can be used. The wiring layer 157 is, for example, an under bump metal 144.

  Through the above manufacturing process, the data writing transistor 122, the thin film transistor such as the display element driving transistor 124, and the display element driving layer 116 including wiring can be formed over the glass substrate 140. In addition, the manufacturing method of the display apparatus of one embodiment of this indication is an example, Comprising: It is not limited to the manufacturing method shown here. For example, any manufacturing method that is normally used in the technical field of display devices can be employed.

  The display element driving layer 116 includes a display element driving transistor 124. The display element driving transistor 124 is electrically connected to the wiring layer 153 and the through electrode 150 through an opening that opens the insulating layer 154 and the insulating layer 152 and an opening that opens the insulating layer 154. In the display element driving transistor 124, the drain is electrically connected to the wiring layer 153 and is a first terminal. In addition, the display element driving transistor 124 is electrically connected to the wiring layer 157 and the wiring layer 155 through an opening that opens the insulating layer 154 and the insulating layer 152 and an opening that opens the insulating layer 156. In the display element driving transistor 124, the source is electrically connected to the wiring layer 155 and the second terminal. Further, the display element driving transistor 124 includes a gate electrode 146 connected to the gate line 211. In the display element driving transistor 124, conduction between the source and the drain is controlled by the gate electrode 146. Note that the gate electrode 146 is also referred to as a gate or a gate terminal.

  In the present disclosure, the structure of the display element driving transistor 124 is an example of a top gate type with one gate electrode (single gate); however, the structure of the display element driving transistor 124 is not limited to this structure. For example, the structure of the display element driving transistor 124 may be a bottom gate type or a multi-gate type having a plurality of gate electrodes.

  Finally, the electro-optical element 113 is connected to the wiring layer 157 by the bump 114. Further, the second driving IC 105 is connected to the through electrode 150 by the bump 114. The bump 114 is, for example, a solder ball. Here, one of the two terminals of the electro-optical element 113 is electrically connected to the source of the display element driving transistor 124 through the bump 114, the wiring layer 157, and the wiring layer 155 (source electrode or drain electrode 148-2). Connected to. The other of the two terminals of the electro-optical element 113 is connected to the wiring layer 153 (reference voltage line 214) via the bump 114, the wiring layer 157 (under bump metal 144), and the wiring layer 155. Further, the driving IC 105 is electrically connected to the drain of the display element driving transistor 124 through the through electrode 150, the wiring layer 153, and the wiring layer 155. Further, a resin may be disposed on the first surface 140a and the second surface 140b.

  The display device 100 shown in FIG. 9 can be manufactured by bonding a plurality of display element mounting substrates 110 manufactured as described above.

  As described above, the display device according to the embodiment of the present disclosure includes the first electrode of the glass substrate via the through electrode provided in the through hole of the glass substrate and the wiring layer extending from the through electrode. A display element mounting substrate in which a thin film transistor, a wiring, and a plurality of LED elements arranged on the surface and a driving IC arranged on the second surface of the glass substrate are electrically connected can be bonded to each other. Therefore, according to the invention of the present disclosure, a high-definition display device using a substrate that hardly warps can be realized. In addition, according to the invention of the present disclosure, it is possible to eliminate a seam when a plurality of display element mounting substrates are bonded together, and to realize a high-quality display device without a seam of substrates.

(Second Embodiment)
In the embodiment of the present disclosure, a manufacturing method different from the manufacturing method of the display device 100 described in the first embodiment will be described with reference to FIGS. A description of the same configuration as in the first embodiment may be omitted.

  First, as shown in FIG. 14, a wiring layer 159 is formed on the first surface 140 a of the glass substrate 140. The wiring layer 159 is formed by forming a conductive film on the first surface 140a by sputtering and then patterning by photolithography. As a material of the wiring layer 159, for example, a metal such as copper, gold, platinum, tin, aluminum, nickel, chromium, titanium, tungsten, or an alloy in which these metals are combined can be used.

  Next, as shown in FIG. 15, the display element driving layer 116 is formed. Since the manufacturing method of the display element driving layer 116 is the same as the manufacturing method of the display element driving layer 116 described in the first embodiment, the description thereof is omitted. Note that the wiring layer 153 is connected to the wiring layer 159 through an opening that opens the insulating layer 151 and the insulating layer 152.

  Next, as illustrated in FIG. 16, the insulating layer 160 is formed after the formation of the wiring layer 157. The material used for the insulating layer 160 may be, for example, an organic resin such as polyimide or acrylic, a resin film of a film material, silicon oxide, silicon nitride oxide, silicon oxynitride, silicon nitride, or the like. Inorganic compounds may be used. As a method of forming the insulating layer 160, for example, when an organic resin is used, a spin coating method or the like can be used using a liquid material or a film material, and when an inorganic compound is used, a CVD method, a sputtering method, or the like is used. be able to. In order to improve flatness, for example, chemical mechanical polishing may be used. An apparatus, a process, a process, or the like that can form the insulating layer may be used without departing from the embodiment of the present disclosure. With the above configuration, the surface of the display device 100 can be protected.

  Next, a through hole 150 b that penetrates the wiring layer 159 from the second surface 140 b of the glass substrate 140 is formed. Since the specific manufacturing method of the through hole is the same as the manufacturing method of the through hole described in the first embodiment, detailed description thereof is omitted.

  Next, as shown in FIG. 17, the through electrode 150 is formed in the through hole 150b and the second surface 140b. Since the specific manufacturing method of the through electrode is the same as the manufacturing method of the through electrode described in the first embodiment, detailed description thereof is omitted. FIG. 17 shows an example in which the through electrode 150 is formed so as to fill the through hole 150b, but the invention is not limited to this example. For example, a conductive film may be formed on the side wall of the through hole 150b. FIG. 17 shows an example in which a part of the through electrode 150 formed on the second surface 140b is a wiring extending from each driving IC. Further, after the through electrode 150 is formed, the insulating layer 160 is removed. The insulating layer 160 can be removed by wet etching using a chemical solution, for example.

  Finally, as shown in FIG. 18, the electro-optical element 113 is connected to the wiring layer 157 (under bump metal 144) by the bump 114. Further, the second driving IC 105 is connected to the through electrode 150 by the bump 114. The bump 114 is, for example, a solder ball. Here, one of the two terminals of the electro-optical element 113 is electrically connected to the source of the display element driving transistor 124 through the bump 114, the wiring layer 157, and the wiring layer 155 (source electrode or drain electrode 148-2). Connected to. The other of the two terminals of the electro-optical element 113 is connected to the wiring layer 153 (reference voltage line 214) via the bump 114, the wiring layer 157 (under bump metal 144), and the wiring layer 155. Further, the driving IC 105 is electrically connected to the drain of the display element driving transistor 124 through the through electrode 150, the wiring layer 159, the wiring layer 153, and the wiring layer 155. Further, a resin may be disposed on the first surface 140a and the second surface 140b.

  The display device 100 shown in FIG. 18 can be manufactured by bonding a plurality of display element mounting substrates 110 manufactured as described above.

  As described above, in the display device according to an embodiment of the present disclosure, a through electrode can be provided in a through hole penetrating the wiring layer 159 from the second surface of the glass substrate, and the wiring can be formed from the through electrode. The layer can be extended. Therefore, according to the invention of the present disclosure, even when a thin film transistor, a wiring, or the like is formed on the first surface of the glass substrate using photolithography and the through hole is formed from the second surface of the glass substrate, the substrate is hardly warped. A high-definition display device can be realized. Further, according to the invention of the present disclosure, the thin film transistor, the wiring, and the plurality of LED elements arranged on the first surface of the glass substrate via the through electrode and the wiring layer extending from the through electrode, and the first of the glass substrate Since the drive ICs arranged on the two surfaces can be electrically connected, the seam when a plurality of display element mounting substrates are bonded together can be eliminated, and a high-quality display device having no substrate seam can be obtained. Can be realized.

(Third embodiment)
In the embodiment of the present disclosure, a manufacturing method for increasing the number of wiring layers formed on the second surface 140b in addition to the structure of the display device 100 described in the second embodiment will be described with reference to FIGS. A description of the same configuration as that of the first embodiment or the second embodiment may be omitted.

  Since the manufacturing method of the display device 100 according to the embodiment of the present disclosure is the same up to the manufacturing method illustrated in FIG. 16 according to the second embodiment, the description thereof is omitted.

  As shown in FIG. 19, after the formation of the insulating layer 160 shown in FIG. 16 of the second embodiment, the through electrode 150 and the wiring layer 172 are formed in the through hole 150b and the second surface 140b. Since the specific manufacturing method of the through electrode is the same as the manufacturing method of the through electrode described in the first embodiment, detailed description thereof is omitted. FIG. 17 shows an example in which the through electrode 150 is formed so as to fill the through hole 150b, but the invention is not limited to this example. For example, a conductive film may be formed on the side wall of the through hole 150b. FIG. 17 shows an example in which a part of the through electrode 150 formed on the second surface 140b is a wiring extending from each driving IC. Furthermore, the wiring layer 172 does not have to be formed simultaneously with the formation of the through electrode 150. The wiring layer 172 may be formed after the through electrode 150 is formed. Note that the wiring layer 172 can be formed using, for example, the same manufacturing method and material as the wiring layer 159 described in FIG.

  Next, an insulating film 171 is formed on the second surface 140b, the through electrode 150, and the wiring layer 172. The formation method and material of the insulating film 171 can be the same as the formation method and material of the insulating film 160 described with reference to FIGS. Subsequently, an opening for opening the insulating layer 171 is formed. The opening is formed by patterning by a photolithography method. The opening exposes the through electrode 150 and the wiring layer 172. Furthermore, after a conductive film is formed by a sputtering method in the opening where the insulating layer 171 is opened, the portion where the wiring layer 172 is exposed, and the portion where the through electrode 150 is exposed, patterning is performed by a photolithography method. Then, the wiring layer 173 is formed. As the material of the wiring layer 173, for example, the same manufacturing method and material as the manufacturing method and material of the wiring layer 159 described in FIG.

  Next, as shown in FIG. 20, the insulating layer 160 is removed. The insulating layer 160 can be removed by wet etching using a chemical solution, for example. Finally, as shown in FIG. 20, the electro-optical element 113 is connected to the wiring layer 157 (under bump metal 144) by the bump 114. Further, the second drive IC 105 is connected to the wiring layer 173 by the bump 114. The bump 114 is, for example, a solder ball. Here, one of the two terminals of the electro-optical element 113 is electrically connected to the source of the display element driving transistor 124 through the bump 114, the wiring layer 157, and the wiring layer 155 (source electrode or drain electrode 148-2). Connected to. The other of the two terminals of the electro-optical element 113 is connected to the wiring layer 153 (reference voltage line 214) via the bump 114, the wiring layer 157 (under bump metal 144), and the wiring layer 155. Further, the driving IC 105 is electrically connected to the drain of the display element driving transistor 124 through the wiring layer 173, the through electrode 150, the wiring layer 159, the wiring layer 153, and the wiring layer 155. Further, a resin may be disposed on the first surface 140a and the second surface 140b.

  The display device 100 shown in FIG. 20 can be manufactured by bonding a plurality of display element mounting substrates 110 manufactured as described above.

  As described above, since the display device according to the embodiment of the present disclosure can increase the wiring layer on the second surface of the glass substrate, the wiring layer extending from the through electrode and the increased wiring layer Can be crossed. Therefore, according to the invention of the present disclosure, multilayer wiring can be formed on the second surface of the glass substrate, so that the degree of freedom in forming the wiring is improved and the degree of freedom in arranging the integrated circuit including the driving IC is improved. Can be made.

(Fourth embodiment)
In the embodiment of the present disclosure, an example in which the electro-optical element 113 is disposed on the first surface 140a of the glass substrate 140 and the second driving IC 105 is disposed on the second surface 140b of the glass substrate 140 will be described with reference to FIG. To do. A description of the same configuration as in the first to third embodiments may be omitted.

  Since the manufacturing method of the display device 100 according to the embodiment of the present disclosure is the same up to the manufacturing method illustrated in FIGS. 10 to 13 according to the first embodiment, the description thereof is omitted.

  As shown in FIG. 21, after the wiring layer 157 (under bump metal 144) is formed, the second drive IC 105 is connected to the wiring layer 157 (under bump metal 144) by the bump 114. Further, the electro-optical element 113 is connected to the through electrode 150 by the bump 114. The bump 114 is, for example, a solder ball. Here, the driving IC 105 is electrically connected to the drain of the display element driving transistor 124 through the bump 114, the wiring layer 157, and the wiring layer 155. One of the two terminals of the electro-optical element 113 is electrically connected to the source of the display element driving transistor 124 through the bump 114, the through electrode 150, the wiring layer 153, and the wiring layer 155. Although not shown, the other of the two terminals of the electro-optical element 113 is connected to the wiring layer 153 (reference voltage line 214) via the bump 114 and the through electrode 150. Further, a resin may be disposed on the first surface 140a and the second surface 140b.

  The display device 100 shown in FIG. 21 can be manufactured by bonding a plurality of display element mounting substrates 110 manufactured as described above.

  As described above, according to the present disclosure, even when the driving IC is mounted on the first surface of the glass substrate and the electro-optic element is mounted on the second surface of the glass substrate, there is almost no warping of the substrate. A seam when a plurality of display element mounting substrates are bonded together can be eliminated, and a high-definition display device can be realized.

(Fifth embodiment)
In the embodiment of the present disclosure, a through electrode forming method will be described with reference to FIGS. Descriptions of configurations similar to those in the first to fourth embodiments may be omitted.

  FIG. 22A is a plan view of the through electrode included in the display device 100 according to the embodiment of the present disclosure. FIG. 22B is a schematic cross-sectional view taken along the line C1-C2 of the through electrode in FIG.

  As illustrated in FIG. 22A, in the display device 100 according to the embodiment of the present disclosure, one through hole 180 that penetrates the first surface 140 a and the second surface 140 b is formed in the glass substrate 140. The through hole 180 is filled with an insulator 181. The insulator 181 is provided with four through holes 182. A through electrode 183 is provided in each of the four through holes 182. Therefore, four through electrodes are provided for one through hole 180.

  As shown in FIG. 22B, the integrated circuit 184 is electrically connected to the through electrode 183 formed on the second surface 140b via the bump 114.

  First, as shown in FIG. 23, a through-hole 180 that penetrates the first surface 140 a and the second surface 140 b is formed in the glass substrate 140. Since the method of forming the through hole is described in FIG. 10, the description thereof is omitted here.

  Next, as shown in FIG. 24, an insulator 181 is formed in the through hole 180. Note that the formation method and material of the insulator 181 can be the formation method and material of the insulating layer 160 illustrated in FIGS. For example, the insulator 181 is formed using a spin coating method using an organic resin such as polyimide or acrylic, a liquid material, or a film material.

  Next, as shown in FIG. 25, a through hole 182 is formed in the insulator 181. The through hole 182 is formed by performing patterning by, for example, a photolithography method.

  Finally, as shown in FIG. 26, the through electrode 183 is formed in the through hole 182, the first surface 140a, and the second surface 140b. As the formation method and material of the through electrode 183, the formation method and material of the through electrode 150 shown in FIG. 11 can be used. For example, a through electrode 183 is formed by forming a metal such as aluminum, titanium, or tungsten on the through hole 182, the first surface 140a, and the second surface 140b using a sputtering method, and performing patterning using a photolithography method. can do. In FIG. 26, the example in which the through electrode 183 is formed on the side wall of the through hole 182 is shown, but the present invention is not limited to this example. For example, the through electrode 183 may be formed so as to fill the through hole 182. When the through electrode 183 is formed on the side wall of the through hole 182, the through hole formed by the through electrode 183 formed on the side wall may be filled with an insulator. FIG. 26 shows an example in which a part of the through electrode 183 formed on the second surface 140b is a wiring extending from the integrated circuit 184 via the bump 114.

  As described above, according to the invention of the present disclosure, a plurality of through holes are formed by filling one through hole formed on the glass substrate with an insulator, and a through electrode is formed in each of the plurality of through holes. Can be formed. Therefore, since a plurality of through electrodes can be formed together in one through hole, wiring formed by the through electrodes can be efficiently laid out.

  The embodiments described above as the embodiments of the present disclosure can be implemented in appropriate combination as long as they do not contradict each other. In addition, components that are appropriately added, deleted, or changed in design by those skilled in the art based on each embodiment are also included in the scope of the present disclosure as long as they include the gist of the present disclosure.

  Of course, other operational effects that are different from the operational effects provided by each of the above-described embodiments are obvious from the description of the present specification or can be easily predicted by those skilled in the art. It is understood that this disclosure provides.

  100: display device, 101: support substrate, 102: display region, 103: first drive IC, 104: region, 105: second drive IC, 106: third drive IC, 110: display element mounting substrate, 111: wiring Substrate, 112: Display element, 113: Electro-optical element, 113a: Electro-optical element IC, 113b: Electro-optical element IC with analog buffer, 113c: Analog buffer, 114: Bump, 115a to 115f: Through electrode, 116: Display element Drive layer, 122: data writing transistor, 124: display element drive transistor, 126: storage capacitor, 130: integrated circuit, 140: glass substrate, 140a: first surface, 140b: second surface, 141: semiconductor film, 142: Semiconductor film, 141a: channel region, 142a: channel region, 142b: source region or gate In region, 144: under bump metal, 148-1: source electrode or drain electrode, 148-2: source electrode or drain electrode, 146: gate electrode, 150: through electrode, 150a: through hole, 150b: through hole, 151 : Insulating layer, 152: insulating layer, 153: wiring layer, 154: insulating layer, 155: wiring layer, 156: insulating layer, 157: wiring layer, 159: wiring layer, 160: insulating layer, 170: multilayer wiring layer, 171: Insulating layer, 172: Wiring layer, 173: Wiring layer, 180: Through hole, 181: Insulator, 182: Through hole, 183: Through electrode, 184: Integrated circuit, 211: Gate line, 212: Voltage line 213: signal line, 214: reference voltage line, 216: power supply line, 218: ground line

Claims (16)

A glass substrate having a first surface, a second surface, and a through-hole penetrating the first surface and the second surface;
A display element arranged in a matrix on the first surface and having a thin film transistor and an electro-optic element;
A driving IC provided on the second surface for controlling the thin film transistor and the electro-optic element;
A through electrode provided in the first surface, the second surface, and the through hole, and electrically connecting the driving IC and the thin film transistor;
A display device. A first wiring, a second wiring, and a third wiring provided on the first surface;
A first insulating film and a second insulating film provided between the first surface and the first wiring;
A third insulating film provided between the first wiring and the second wiring;
The display device according to claim 1, further comprising: a fourth insulating film provided between the second wiring and the third wiring.   The display device according to claim 2, wherein the first wiring is electrically connected to the through electrode through an opening that opens the first insulating film and the second insulating film.   The display device according to claim 2, wherein the second wiring is electrically connected to the first wiring through an opening that opens the third insulating film.   The display device according to claim 2, wherein the third wiring is electrically connected to the second wiring through an opening that opens the fourth insulating film. The thin film transistor includes a first terminal connected to the first wiring and the through electrode through an opening that opens the second insulating film and the third insulating film;
A second terminal connected to the third wiring and the second wiring through the opening opening the fourth insulating film and the opening opening the second insulating film and the third insulating film;
A gate terminal connected to a gate line for controlling conduction between the first terminal and the second terminal;
The display device according to claim 2, comprising:   The display device according to claim 6, wherein the electro-optical element is electrically connected to the second terminal.   The display device according to claim 1, wherein the electro-optical element is an LED element or an EL element. A glass substrate having a first surface, a second surface, and a through-hole penetrating the first surface and the second surface;
A display element having thin film transistors arranged in a matrix on the first surface and electro-optic elements arranged in a matrix on the second surface;
A driving IC provided on the first surface and controlling the thin film transistor and the electro-optic element;
A through electrode provided in the first surface, the second surface, and the through hole, and electrically connecting the electro-optic element and the thin film transistor;
A display device. A first wiring, a second wiring, and a third wiring provided on the first surface;
A first insulating film and a second insulating film provided between the first surface and the first wiring;
A third insulating film provided between the first wiring and the second wiring;
The display device according to claim 9, further comprising a fourth insulating film provided between the second wiring and the third wiring.   The display device according to claim 10, wherein the first wiring is electrically connected to the through electrode through an opening that opens the first insulating film and the second insulating film.   The display device according to claim 10, wherein the second wiring is electrically connected to the first wiring through an opening that opens the third insulating film.   The display device according to claim 10, wherein the third wiring is electrically connected to the second wiring through an opening that opens the fourth insulating film. The thin film transistor
A first terminal connected to the first wiring and the through electrode through an opening that opens the second insulating film and the third insulating film;
A second terminal connected to the third wiring and the second wiring through the opening opening the fourth insulating film and the opening opening the second insulating film and the third insulating film;
A gate terminal connected to a gate line for controlling conduction between the first terminal and the second terminal;
The display device according to claim 10, comprising:   The display device according to claim 14, wherein the electro-optical element is electrically connected to the first terminal, and the driving IC is electrically connected to the second terminal.   The display device according to claim 9, wherein the electro-optical element is an LED element or an EL element.

Images