JP2019004139A - Laminate board with piezoelectric film, element with piezoelectric film, and method for manufacturing laminate board with piezoelectric film - Google Patents

Laminate board with piezoelectric film, element with piezoelectric film, and method for manufacturing laminate board with piezoelectric film Download PDF

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JP2019004139A
JP2019004139A JP2018089109A JP2018089109A JP2019004139A JP 2019004139 A JP2019004139 A JP 2019004139A JP 2018089109 A JP2018089109 A JP 2018089109A JP 2018089109 A JP2018089109 A JP 2018089109A JP 2019004139 A JP2019004139 A JP 2019004139A
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film
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piezoelectric
piezoelectric film
oxide
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JP6607993B2 (en
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柴田 憲治
Kenji Shibata
憲治 柴田
渡辺 和俊
Kazutoshi Watanabe
和俊 渡辺
文正 堀切
Fumimasa Horikiri
文正 堀切
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Sumitomo Chemical Co Ltd
Sciocs Co Ltd
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Sciocs Co Ltd
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Abstract

To provide: a piezoelectric film of which the time until a dielectric breakdown when it is used for a device is prolonged; and a technique relevant thereto.SOLUTION: A laminate board with a piezoelectric film comprises: a substrate; a first electrode film formed on the substrate; and a piezoelectric film formed on the first electrode film. In the laminate board, an oxide film including oxide represented by a composition formula, RuOor IrOis formed on the piezoelectric film.SELECTED DRAWING: Figure 1

Description

本発明は、圧電膜を有する積層基板、圧電膜を有する素子および圧電膜を有する積層基板の製造方法に関する。   The present invention relates to a multilayer substrate having a piezoelectric film, an element having a piezoelectric film, and a method for manufacturing a multilayer substrate having a piezoelectric film.

圧電体は、センサやアクチュエータ等の機能性電子部品(デバイス)に広く利用されている。圧電体の材料としては、例えばニオブ酸カリウムナトリウム(KNN)が用いられている(例えば特許文献1,2参照)。近年、デバイスに用いられた際、絶縁破壊に至るまでの時間がより長い、すなわち寿命をより長くした圧電体が強く求められるようになっている。   Piezoelectric bodies are widely used for functional electronic components (devices) such as sensors and actuators. As a piezoelectric material, for example, potassium sodium niobate (KNN) is used (see, for example, Patent Documents 1 and 2). In recent years, there has been a strong demand for a piezoelectric material that has a longer time to breakdown, that is, a longer life when used in a device.

特開2007−184513号公報JP 2007-184513 A 特開2008−159807号公報JP 2008-159807 A

本発明の目的は、デバイスに用いられた際、絶縁破壊に至るまでの時間をより長くした圧電膜を有する積層基板およびその関連技術を提供することにある。   An object of the present invention is to provide a laminated substrate having a piezoelectric film having a longer time until dielectric breakdown when used in a device, and a related technique.

本発明の一態様によれば、
基板と、前記基板上に製膜された第1電極膜と、前記第1電極膜上に製膜された圧電膜と、を備える、圧電膜を有する積層基板であって、
前記圧電膜上には、組成式RuOまたはIrOで表される酸化物からなる酸化膜が形成されている、圧電膜を有する積層基板およびその関連技術が提供される。
According to one aspect of the invention,
A laminated substrate having a piezoelectric film, comprising: a substrate; a first electrode film formed on the substrate; and a piezoelectric film formed on the first electrode film,
On the piezoelectric film, there is provided a laminated substrate having a piezoelectric film in which an oxide film made of an oxide represented by a composition formula RuO x or IrO x is formed, and a related technique.

本発明によれば、デバイスに用いられた際、絶縁破壊に至るまでの時間を長くした圧電膜を有する積層基板およびその関連技術を提供することが可能となる。   ADVANTAGE OF THE INVENTION According to this invention, when it uses for a device, it becomes possible to provide the laminated substrate which has a piezoelectric film which extended time until dielectric breakdown, and its related technique.

本発明の一実施形態にかかる積層基板10の断面構造の一例を示す図である。It is a figure which shows an example of the cross-section of the laminated substrate 10 concerning one Embodiment of this invention. 本発明の一実施形態にかかる積層基板10の断面構造の変形例を示す図である。It is a figure which shows the modification of the cross-section of the laminated substrate 10 concerning one Embodiment of this invention. 本発明の一実施形態にかかる積層基板10の断面構造の変形例を示す図である。It is a figure which shows the modification of the cross-section of the laminated substrate 10 concerning one Embodiment of this invention. 本発明の一実施形態にかかる圧電膜デバイス30の概略構成図である。1 is a schematic configuration diagram of a piezoelectric film device 30 according to an embodiment of the present invention. (a)〜(f)は、それぞれ、KNN膜の強誘電性に関する評価結果を示す図である。(A)-(f) is a figure which shows the evaluation result regarding the ferroelectricity of a KNN film | membrane, respectively. (a)、(b)は、それぞれ、KNN膜の強誘電性に関する評価結果を示す図である。(A), (b) is a figure which shows the evaluation result regarding the ferroelectricity of a KNN film | membrane, respectively.

<本発明の一実施形態>
以下、本発明の一実施形態について図面を参照しながら説明する。
<One Embodiment of the Present Invention>
Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

(1)積層基板の構成
図1に示すように、本実施形態にかかる積層基板10は、基板1と、基板1上に製膜された第1電極膜としての下部電極膜2と、下部電極膜2上に製膜された圧電膜(圧電薄膜)3と、圧電膜3上に密着層を介して製膜された第2電極膜としての上部電極膜4と、を備えた積層体として構成されている。
(1) Configuration of Laminated Substrate As shown in FIG. 1, a laminated substrate 10 according to this embodiment includes a substrate 1, a lower electrode film 2 as a first electrode film formed on the substrate 1, and a lower electrode. A laminate comprising a piezoelectric film (piezoelectric thin film) 3 formed on the film 2 and an upper electrode film 4 as a second electrode film formed on the piezoelectric film 3 via an adhesion layer. Has been.

基板1としては、熱酸化膜やCVD(Chemical Vapor Deposition)酸化膜等の表面酸化膜(SiO膜)1bが形成された単結晶シリコン(Si)基板1a、すなわち、表面酸化膜を有するSi基板を好適に用いることができる。また、基板1としては、図2に示すように、その表面にSiO以外の絶縁性材料により形成された絶縁膜1dを有するSi基板1aを用いることもできる。また、基板1としては、表面にSi(100)面やSi(111)面等が露出したSi基板1a、すなわち、表面酸化膜1bや絶縁膜1dを有さないSi基板を用いることもできる。また、基板1としては、SOI(Silicon On Insulator)基板、石英ガラス(SiO)基板、ガリウム砒素(GaAs)基板、サファイア(Al)基板、ステンレス等の金属材料により形成された金属基板を用いることもできる。単結晶Si基板1aの厚さは例えば300〜1000μm、表面酸化膜1bの厚さは例えば5〜3000nmとすることができる。 Si substrate as the substrate 1, having a thermal oxide film or a CVD (Chemical Vapor Deposition) surface oxide film single crystal silicon (SiO 2 film) 1b is formed such as an oxide film (Si) substrate 1a, i.e., the surface oxide film Can be suitably used. As the substrate 1, as shown in FIG. 2, a Si substrate 1a having an insulating film 1d formed of an insulating material other than SiO 2 on its surface can be used. Further, as the substrate 1, it is also possible to use a Si substrate 1a having an exposed Si (100) surface or Si (111) surface, that is, a Si substrate having no surface oxide film 1b or insulating film 1d. Further, as the substrate 1, an SOI (Silicon On Insulator) substrate, a quartz glass (SiO 2 ) substrate, a gallium arsenide (GaAs) substrate, a sapphire (Al 2 O 3 ) substrate, a metal substrate formed of a metal material such as stainless steel. Can also be used. The thickness of the single crystal Si substrate 1a can be set to 300 to 1000 μm, for example, and the thickness of the surface oxide film 1b can be set to 5 to 3000 nm, for example.

下部電極膜2は、例えば、白金(Pt)を用いて製膜することができる。下部電極膜2は、単結晶膜や多結晶膜(以下、これらをPt膜とも称する)となる。Pt膜を構成する結晶は、基板1の表面に対して(111)面方位に優先配向していることが好ましい。すなわち、Pt膜の表面(圧電膜3の下地となる面)は、主にPt(111)面により構成されていることが好ましい。Pt膜は、スパッタリング法、蒸着法等の手法を用いて製膜することができる。下部電極膜2は、Pt以外に、金(Au)やルテニウム(Ru)やイリジウム(Ir)等の各種金属、これらを主成分とする合金、ルテニウム酸ストロンチウム(SrRuO)やニッケル酸ランタン(LaNiO)等の金属酸化物等を用いて製膜することもできる。なお、基板1と下部電極膜2との間には、これらの密着性を高めるため、例えば、チタン(Ti)、タンタル(Ta)、酸化チタン(TiO)、ニッケル(Ni)等を主成分とする密着層6が設けられている。密着層6は、スパッタリング法、蒸着法等の手法を用いて製膜することができる。下部電極膜2の厚さは例えば100〜400nm、密着層6の厚さは例えば1〜200nmとすることができる。 The lower electrode film 2 can be formed using, for example, platinum (Pt). The lower electrode film 2 is a single crystal film or a polycrystalline film (hereinafter also referred to as a Pt film). The crystals constituting the Pt film are preferably preferentially oriented in the (111) plane orientation with respect to the surface of the substrate 1. That is, it is preferable that the surface of the Pt film (the surface serving as the base of the piezoelectric film 3) is mainly composed of the Pt (111) surface. The Pt film can be formed using a technique such as sputtering or vapor deposition. In addition to Pt, the lower electrode film 2 is made of various metals such as gold (Au), ruthenium (Ru) and iridium (Ir), alloys based on these metals, strontium ruthenate (SrRuO 3 ) and lanthanum nickelate (LaNiO). It is also possible to form a film using a metal oxide such as 3 ). In order to improve the adhesion between the substrate 1 and the lower electrode film 2, for example, titanium (Ti), tantalum (Ta), titanium oxide (TiO 2 ), nickel (Ni), or the like is used as a main component. The adhesion layer 6 is provided. The adhesion layer 6 can be formed using a technique such as sputtering or vapor deposition. The thickness of the lower electrode film 2 can be set to 100 to 400 nm, for example, and the thickness of the adhesion layer 6 can be set to 1 to 200 nm, for example.

圧電膜3は、例えば、カリウム(K)、ナトリウム(Na)、ニオブ(Nb)を含み、組成式(K1−yNa)NbOで表されるアルカリニオブ酸化物、すなわち、ニオブ酸カリウムナトリウム(KNN)を用いて製膜することができる。上述の組成式中の係数y[=Na/(K+Na)]は、0<y<1、好ましくは0.4≦y≦0.7の範囲内の大きさとする。圧電膜3は、KNNの多結晶膜(以下、KNN膜3とも称する)となる。KNNの結晶構造は、ペロブスカイト構造となる。 The piezoelectric film 3 includes, for example, potassium (K), sodium (Na), niobium (Nb), and an alkali niobium oxide represented by a composition formula (K 1-y Na y ) NbO 3 , that is, potassium niobate. A film can be formed using sodium (KNN). The coefficient y [= Na / (K + Na)] in the above composition formula is 0 <y <1, preferably 0.4 ≦ y ≦ 0.7. The piezoelectric film 3 is a KNN polycrystalline film (hereinafter also referred to as a KNN film 3). The crystal structure of KNN is a perovskite structure.

KNN膜3を構成する結晶は、基板1の表面に対して(001)面方位に優先配向していることが好ましい。すなわち、KNN膜3の表面(後述のRuO膜7aの下地となる面)は、主にKNN(001)面により構成されていることが好ましい。基板1の表面に対して(111)面方位に優先配向させたPt膜(下部電極膜2)上にKNN膜3を直接製膜することで、KNN膜3を構成する結晶を、基板1の表面に対して(001)面方位に優先配向させることが容易となる。例えば、KNN膜3を構成する結晶群のうち80%以上の結晶を基板1の表面に対して(001)面方位に配向させ、KNN膜3の表面のうち80%以上の領域をKNN(001)面とすることが可能となる。 The crystals constituting the KNN film 3 are preferably preferentially oriented in the (001) plane orientation with respect to the surface of the substrate 1. That is, it is preferable that the surface of the KNN film 3 (the surface serving as the base of the RuO x film 7a described later) is mainly composed of the KNN (001) plane. By directly forming the KNN film 3 on the Pt film (lower electrode film 2) preferentially oriented in the (111) plane direction with respect to the surface of the substrate 1, the crystals constituting the KNN film 3 can be obtained. It becomes easy to preferentially orient the (001) plane orientation with respect to the surface. For example, 80% or more of the crystals constituting the KNN film 3 are oriented in the (001) plane orientation with respect to the surface of the substrate 1, and 80% or more of the surface of the KNN film 3 is aligned with KNN (001 ) Surface.

KNN膜3は、スパッタリング法、PLD(Pulsed Laser Deposition)法、ゾルゲル法等の手法を用いて製膜することができる。KNN膜3の厚さは例えば0.5〜5μmとすることができる。KNN膜3の組成比は、例えば、スパッタリング製膜時に用いるターゲット材の組成を制御することで調整可能である。ターゲット材は、例えば、KCO粉末、NaCO粉末、Nb粉末等を混合させて焼成すること等により作製することができる。この場合、ターゲット材の組成は、KCO粉末、NaCO粉末、Nb粉末等の混合比率を調整することで制御することができる。 The KNN film 3 can be formed using a technique such as sputtering, PLD (Pulsed Laser Deposition), or sol-gel. The thickness of the KNN film 3 can be set to 0.5 to 5 μm, for example. The composition ratio of the KNN film 3 can be adjusted, for example, by controlling the composition of the target material used during sputtering film formation. The target material can be produced, for example, by mixing and baking K 2 CO 3 powder, Na 2 CO 3 powder, Nb 2 O 5 powder, or the like. In this case, the composition of the target material can be controlled by adjusting the mixing ratio of K 2 CO 3 powder, Na 2 CO 3 powder, Nb 2 O 5 powder, and the like.

KNN膜3は、銅(Cu)、マンガン(Mn)、リチウム(Li)、Ta、アンチモン(Sb)等のK、Na、Nb以外の元素を、5at%以下の範囲内で含んでいてもよい。   The KNN film 3 may contain elements other than K, Na, Nb, such as copper (Cu), manganese (Mn), lithium (Li), Ta, and antimony (Sb) within a range of 5 at% or less. .

上部電極膜4は、例えば、Pt、Au、アルミニウム(Al)、Cu等の各種金属やこれらの合金を用いて製膜することができる。上部電極膜4は、スパッタリング法、蒸着法、メッキ法、金属ペースト法等の手法を用いて製膜することができる。上部電極膜4は、下部電極膜2のようにKNN膜3の結晶構造に大きな影響を与えるものではない。そのため、上部電極膜4の材料、結晶構造、製膜手法は特に限定されない。上部電極膜4の厚さは例えば100〜5000nmとすることができる。   The upper electrode film 4 can be formed using, for example, various metals such as Pt, Au, aluminum (Al), Cu, and alloys thereof. The upper electrode film 4 can be formed using a technique such as sputtering, vapor deposition, plating, or metal paste. The upper electrode film 4 does not significantly affect the crystal structure of the KNN film 3 unlike the lower electrode film 2. Therefore, the material, crystal structure, and film forming method of the upper electrode film 4 are not particularly limited. The thickness of the upper electrode film 4 can be set to, for example, 100 to 5000 nm.

KNN膜3と上部電極膜4との間、すなわちKNN膜3上には、これらの間の密着性を高める密着層として、組成式RuOで表される酸化物からなる膜(酸化膜)7a(以下、RuO膜7aとも称する)が製膜されている。また、この密着層として、図3に示すように、組成式IrOで表される酸化物からなる膜7b(以下、IrO膜7bとも称する)が製膜されていてもよい。 Between the KNN film 3 and the upper electrode film 4, that is, on the KNN film 3, a film (oxide film) 7 a made of an oxide represented by the composition formula RuO x is used as an adhesion layer for improving the adhesion between them. (Hereinafter also referred to as RuO x film 7a) is formed. Further, as this adhesion layer, as shown in FIG. 3, a film 7b made of an oxide represented by the composition formula IrO x (hereinafter also referred to as an IrO x film 7b) may be formed.

RuO膜7aは、スパッタリング法、化学気相成長(CVD)法、蒸着法等の手法を用いて製膜することができる。RuO膜7aは、下部電極膜2のようにKNN膜3の結晶構造に大きな影響を与えるものではない。そのため、RuO膜7aの結晶構造、製膜手法は特に限定されない。RuO膜7aの組成比、すなわち上述の組成式中の係数xの値は、スパッタリング製膜時の雰囲気ガス、例えばアルゴン(Ar)ガスと酸素(O)ガスとの混合ガス(Ar/O混合ガス)中におけるOガス比率を制御すること等により調整可能である。上述のOガス比率が高くなるほど、係数xの値が大きくなり、Oガス比率が小さくなるほど、係数xの値が小さくなる傾向がある。また、スパッタリング製膜時に用いるターゲット材として、係数xが0<x<2の範囲内であるRuO膜7aを製膜する際は、ルテニウム(Ru)の金属材料により形成されたターゲット材を用いることが好ましく、係数xが2≦x、好ましくは2<xの範囲内であるRuO膜7aを製膜する際は、RuO粉末を焼成すること等により作製したターゲット材を用いることが好ましい。RuO膜7aの厚さは例えば2〜30nm、好ましくは5〜30nmとすることができる。これらの点については、IrO膜7bについても同様のことが言える。なお、係数xが0<x<2の範囲内であるIrO膜7bを製膜する際は、イリジウム(Ir)の金属材料により形成されたターゲット材を用いることが好ましく、係数xが2≦x、好ましくは2<xの範囲内であるIrO膜7bを製膜する際は、IrO粉末を焼成すること等により作製したターゲット材を用いることが好ましい。 The RuO x film 7a can be formed using a technique such as sputtering, chemical vapor deposition (CVD), or vapor deposition. The RuO x film 7 a does not significantly affect the crystal structure of the KNN film 3 unlike the lower electrode film 2. Therefore, the crystal structure of the RuO x film 7a and the film forming method are not particularly limited. The composition ratio of the RuO x film 7a, that is, the value of the coefficient x in the above-described composition formula is the atmospheric gas during sputtering film formation, for example, a mixed gas (Ar / O) of argon (Ar) gas and oxygen (O 2 ) gas. It can be adjusted by controlling the O 2 gas ratio in the ( 2 mixed gas). As O 2 gas ratio described above is high, the value of coefficient x increases, the more O 2 gas ratio is reduced, tends to the value of the coefficient x is reduced. Further, as a target material used during sputtering film formation, when forming the RuO x film 7a having a coefficient x in the range of 0 <x <2, a target material formed of a ruthenium (Ru) metal material is used. It is preferable that when forming the RuO x film 7a having a coefficient x in the range of 2 ≦ x, preferably 2 <x, it is preferable to use a target material prepared by firing RuO 2 powder or the like. . The thickness of the RuO x film 7a can be set to, for example, 2 to 30 nm, preferably 5 to 30 nm. The same applies to the IrO x film 7b. When forming the IrO x film 7b in which the coefficient x is in the range of 0 <x <2, it is preferable to use a target material formed of a metal material of iridium (Ir), and the coefficient x is 2 ≦ When forming the IrO x film 7b in the range of x, preferably 2 <x, it is preferable to use a target material produced by firing IrO 2 powder or the like.

(2)圧電膜デバイスの構成
図4に、本実施形態における圧電膜を有するデバイス30(以下、圧電膜デバイス30とも称する)の概略構成図を示す。圧電膜デバイス30は、上述の積層基板10を所定の形状に成形して得られる圧電膜を有する素子20(以下、圧電膜素子20とも称する)と、圧電膜素子20に接続される電圧検出手段11aまたは電圧印加手段11bと、を少なくとも備えて構成される。
(2) Configuration of Piezoelectric Film Device FIG. 4 shows a schematic configuration diagram of a device 30 having a piezoelectric film in the present embodiment (hereinafter also referred to as a piezoelectric film device 30). The piezoelectric film device 30 includes an element 20 having a piezoelectric film (hereinafter, also referred to as a piezoelectric film element 20) obtained by molding the above-described laminated substrate 10 into a predetermined shape, and a voltage detection unit connected to the piezoelectric film element 20. 11a or voltage application means 11b.

電圧検出手段11aを、圧電膜素子20の下部電極膜2と上部電極膜4との間に接続することで、圧電膜デバイス30をセンサとして機能させることができる。KNN膜3が何らかの物理量の変化に伴って変形すると、その変形によって下部電極膜2と上部電極膜4との間に電圧が発生する。この電圧を電圧検出手段11aによって検出することで、KNN膜3に印加された物理量の大きさを測定することができる。この場合、圧電膜デバイス30の用途としては、例えば、角速度センサ、超音波センサ、圧カセンサ、加速度センサ等が挙げられる。   By connecting the voltage detection means 11a between the lower electrode film 2 and the upper electrode film 4 of the piezoelectric film element 20, the piezoelectric film device 30 can function as a sensor. When the KNN film 3 is deformed with any change in physical quantity, a voltage is generated between the lower electrode film 2 and the upper electrode film 4 due to the deformation. By detecting this voltage by the voltage detection means 11a, the magnitude of the physical quantity applied to the KNN film 3 can be measured. In this case, examples of the application of the piezoelectric film device 30 include an angular velocity sensor, an ultrasonic sensor, a pressure sensor, and an acceleration sensor.

電圧印加手段11bを、圧電膜素子20の下部電極膜2と上部電極膜4との間に接続することで、圧電膜デバイス30をアクチュエータとして機能させることができる。電圧印加手段11bにより下部電極膜2と上部電極膜4との間に電圧を印加することで、KNN膜3を変形させることができる。この変形動作により、圧電膜デバイス30に接続された各種部材を作動させることができる。この場合、圧電膜デバイス30の用途としては、例えば、インクジェットプリンタ用のヘッド、スキャナー用のMEMSミラー、超音波発生装置用の振動子等が挙げられる。   By connecting the voltage applying means 11b between the lower electrode film 2 and the upper electrode film 4 of the piezoelectric film element 20, the piezoelectric film device 30 can function as an actuator. The KNN film 3 can be deformed by applying a voltage between the lower electrode film 2 and the upper electrode film 4 by the voltage applying means 11b. With this deformation operation, various members connected to the piezoelectric film device 30 can be operated. In this case, the application of the piezoelectric film device 30 includes, for example, a head for an ink jet printer, a MEMS mirror for a scanner, a vibrator for an ultrasonic generator, and the like.

(3)積層基板、圧電膜素子、圧電膜デバイスの製造方法
続いて、上述の積層基板10の製造方法について説明する。まず、基板1のいずれかの主面上に下部電極膜2を製膜する。なお、いずれかの主面上に下部電極膜2が予め製膜された基板1を用意してもよい。続いて、下部電極膜2上に、例えばスパッタリング法を用いてKNN膜3を製膜した後、KNN膜3(KNN膜3を有する積層体)に対して、所定温度(例えば500℃)の条件下で所定時間(例えば2時間)、アニール(熱処理)を行う。その後、KNN膜3上に、例えばスパッタリング法を用いてRuO膜7aまたはIrO膜7bを製膜し、RuO膜7aまたはIrO膜7b上に上部電極膜4を製膜することで、積層基板10が得られる。
(3) Manufacturing Method of Multilayer Substrate, Piezoelectric Film Element, and Piezoelectric Film Device Next, a manufacturing method of the above-described multilayer substrate 10 will be described. First, the lower electrode film 2 is formed on any main surface of the substrate 1. In addition, you may prepare the board | substrate 1 by which the lower electrode film 2 was formed into a film beforehand on either main surface. Subsequently, after the KNN film 3 is formed on the lower electrode film 2 by using, for example, a sputtering method, a condition of a predetermined temperature (for example, 500 ° C.) is applied to the KNN film 3 (laminated body having the KNN film 3). Below, annealing (heat treatment) is performed for a predetermined time (for example, 2 hours). Thereafter, a RuO x film 7a or an IrO x film 7b is formed on the KNN film 3 by using, for example, a sputtering method, and an upper electrode film 4 is formed on the RuO x film 7a or the IrO x film 7b. The laminated substrate 10 is obtained.

RuO膜7aまたはIrO膜7bおよび上部電極膜4の製膜後に積層基板10に対してアニールを行ってもよい。 The laminated substrate 10 may be annealed after the RuO x film 7a or the IrO x film 7b and the upper electrode film 4 are formed.

上述の積層基板10に対して行うアニール条件としては、
アニール温度(積層基板10の温度):600℃以上、好ましくは600℃以上800℃以下、より好ましくは700℃
アニール時間:0.5〜12時間、好ましくは1〜6時間、より好ましくは2〜3時間
アニール雰囲気:大気または酸素雰囲気
が例示される。ただし、このアニールは行わなくてもよい。
As the annealing conditions for the laminated substrate 10 described above,
Annealing temperature (temperature of laminated substrate 10): 600 ° C. or higher, preferably 600 ° C. or higher and 800 ° C. or lower, more preferably 700 ° C.
Annealing time: 0.5 to 12 hours, preferably 1 to 6 hours, more preferably 2 to 3 hours Annealing atmosphere: air or oxygen atmosphere is exemplified. However, this annealing need not be performed.

そして、この積層基板10を所定の形状に成形することで、圧電膜素子20が得られ、圧電膜素子20に電圧検出手段11aまたは電圧印加手段11bを接続することで、圧電膜デバイス30が得られる。   A piezoelectric film element 20 is obtained by forming the laminated substrate 10 into a predetermined shape, and the piezoelectric film device 30 is obtained by connecting the voltage detection means 11a or the voltage application means 11b to the piezoelectric film element 20. It is done.

(4)本実施形態により得られる効果
本実施形態によれば、以下に示す1つまたは複数の効果が得られる。
(4) Effects Obtained by the Present Embodiment According to the present embodiment, one or more effects shown below can be obtained.

(a)KNN膜3と上部電極膜4との間に、RuO膜7aまたはIrO膜7bを設けることで、本実施形態にかかる積層基板10を用いて作製した圧電膜デバイス30において、KNN膜3が絶縁破壊に至るまでの時間を長くすること、すなわちKNN膜3の寿命を長くすることが可能となる。例えば、積層基板10の温度が200℃となるように加熱した状態で、下部電極膜2と上部電極膜4との間に−300kV/cmの電界(−60Vの電圧)を印加する高加速寿命試験(Highly Accelerated Life Test、略称:HALT)を行った際、電界印加開始からKNN膜3が絶縁破壊に至るまでの時間を3300秒以上とすることが可能となる。なお、本実施形態では、KNN膜3に流れるリーク電流密度が30mA/cmを超えた時点でKNN膜3が絶縁破壊に至ったとみなしている。 (A) By providing the RuO x film 7 a or the IrO x film 7 b between the KNN film 3 and the upper electrode film 4, in the piezoelectric film device 30 manufactured using the multilayer substrate 10 according to the present embodiment, the KNN It is possible to increase the time until the dielectric breakdown of the film 3, that is, increase the life of the KNN film 3. For example, a high accelerated lifetime in which an electric field of −300 kV / cm (−60 V voltage) is applied between the lower electrode film 2 and the upper electrode film 4 in a state where the temperature of the laminated substrate 10 is heated to 200 ° C. When a test (High Accelerated Life Test, abbreviated as HALT) is performed, the time from the start of electric field application to the dielectric breakdown of the KNN film 3 can be 3300 seconds or more. In the present embodiment, it is considered that the KNN film 3 has reached dielectric breakdown when the density of the leakage current flowing through the KNN film 3 exceeds 30 mA / cm 2 .

特に、RuO膜7aを形成することで、IrO膜7bを形成する場合よりも、KNN膜3の寿命をさらに長くすることが可能となる。例えば、上述のHALTによるKNN膜3の寿命を7600秒以上とすることが可能となる。 In particular, the lifetime of the KNN film 3 can be further increased by forming the RuO x film 7a as compared with the case of forming the IrO x film 7b. For example, the lifetime of the KNN film 3 by HALT described above can be made 7600 seconds or longer.

ここで、上述の本実施形態の手法に対し、KNN膜と上部電極膜との間に、チタン(Ti)からなる膜(Ti膜)や組成式TiOで表される酸化物からなる膜(TiO膜)を設ける手法も考えられる。しかしながら、この手法により得られた積層基板を加工して作製した圧電膜デバイスでは、本実施形態にかかる圧電膜デバイス30よりも、上述のHALTによるKNN膜の寿命が短くなる。これは、何らかの要因によりTiがKNN膜中に拡散(移動)し、このTiがKNN膜の寿命に悪影響を及ぼしているものと考えられる。 Here, in contrast to the method of the present embodiment described above, a film (Ti film) made of titanium (Ti) or a film made of an oxide represented by the composition formula TiO x (between the KNN film and the upper electrode film ( A method of providing a (TiO x film) is also conceivable. However, in the piezoelectric film device manufactured by processing the multilayer substrate obtained by this method, the lifetime of the above-described HALT KNN film is shorter than that of the piezoelectric film device 30 according to the present embodiment. This is considered to be because Ti is diffused (moved) into the KNN film for some reason, and this Ti has an adverse effect on the lifetime of the KNN film.

(b)本実施形態にかかる積層基板10を用いて作製した圧電膜デバイス30は、従来の圧電膜デバイスよりも、良好な強誘電性を有する。例えば、KNN膜3に電界を印加した際の飽和分極量(Pmax−)の絶対値が23μC/cm以上(|Pmax−|≧23μC/cm)であり、残留分極量(Pr−)の絶対値が14μC/cm以上(|Pr−|≧14μC/cm)である。なお、飽和分極量とは電界を印加し続けても分極量が増加しなくなったときの分極量であり、残留分極量とは、飽和分極量に達した後、印加電界をゼロに戻したときの分極量である。 (B) The piezoelectric film device 30 manufactured using the multilayer substrate 10 according to the present embodiment has better ferroelectricity than the conventional piezoelectric film device. For example, the absolute value of the saturation polarization amount (P max− ) when an electric field is applied to the KNN film 3 is 23 μC / cm 2 or more (| P max− | ≧ 23 μC / cm 2 ), and the residual polarization amount (P r The absolute value of ) is 14 μC / cm 2 or more (| P r− | ≧ 14 μC / cm 2 ). The saturation polarization amount is the polarization amount when the polarization amount does not increase even if the electric field is continuously applied, and the residual polarization amount is when the applied electric field is returned to zero after reaching the saturation polarization amount. Is the amount of polarization.

(c)KNN膜3と上部電極膜4との間に、RuO膜7aまたはIrO膜7bを設けることで、KNN膜3の強誘電性を高めることが可能となる。これに対し、Ti膜やTiO膜を有する積層基板を加工して作製した上述の従来の圧電膜デバイスは、本実施形態にかかる圧電膜デバイス30よりも強誘電性が低くなることを、本願発明者は確認している。 (C) By providing the RuO x film 7a or the IrO x film 7b between the KNN film 3 and the upper electrode film 4, the ferroelectricity of the KNN film 3 can be enhanced. In contrast, the above-described conventional piezoelectric film device manufactured by processing a laminated substrate having a Ti film or a TiO x film has lower ferroelectricity than the piezoelectric film device 30 according to the present embodiment. The inventor has confirmed.

(d)RuO膜7aの厚さを2〜30nm、好ましくは5〜30nmとすることで、上述の寿命向上効果、強誘電性向上効果を得ることができるとともに、圧電膜デバイス30の性能の低下を抑制することが可能となる。なお、IrO膜7bについても同様のことが言える。 (D) By setting the thickness of the RuO x film 7a to 2 to 30 nm, preferably 5 to 30 nm, the above-described lifetime improvement effect and ferroelectricity improvement effect can be obtained, and the performance of the piezoelectric film device 30 can be improved. It is possible to suppress the decrease. The same applies to the IrO x film 7b.

RuO膜7aの厚さが2nm未満であると、RuO膜7aの面内膜厚が不均一となったり、不連続な膜となったりすることがある。このため、上述の寿命向上効果や強誘電性向上効果が充分に得られないことがある。RuO膜7aの厚さを2nm以上とすることで、これらの課題を解決でき、上述の寿命向上効果、強誘電性向上効果を得ることができる。RuO膜7aの厚さを5nm以上とすることで、上述の課題を確実に解決でき、上述の寿命向上効果、強誘電性向上効果を確実に得ることができる。 When the thickness of the RuO x film 7a is less than 2 nm, the in-plane film thickness of the RuO x film 7a may be non-uniform or a discontinuous film. For this reason, the above-mentioned lifetime improvement effect and ferroelectricity improvement effect may not be sufficiently obtained. By setting the thickness of the RuO x film 7a to 2 nm or more, these problems can be solved, and the above-mentioned lifetime improvement effect and ferroelectricity improvement effect can be obtained. By setting the thickness of the RuO x film 7a to 5 nm or more, the above-mentioned problems can be solved reliably, and the above-mentioned lifetime improvement effect and ferroelectricity improvement effect can be surely obtained.

RuO膜7aの厚さが30nmを超えると、上述のHALTによるKNN膜3の寿命が3300秒未満となることがある。また、RuO膜7aの厚さが厚くなると、RuO膜7a自体が有する膜応力が大きくなり、RuO膜7aが剥がれやすくなる。さらに、RuやIrは硬い金属材料であることから、RuやIrを含むRuO膜7aやIrO膜7bは硬い膜となる。このような硬いRuO膜7aの厚さが厚くなると、KNN膜3を含む振動部が振動(共振)しにくくなり、積層基板10がセンサに適用された際に感度の低下を招いたり、アクチュエータに適用された際に消費電力の増加を招いたりすることもある。これらの理由から、RuO膜7aの厚さは30nm以下とすることが好ましい。 When the thickness of the RuO x film 7a exceeds 30 nm, the lifetime of the KNN film 3 by the above-described HALT may be less than 3300 seconds. If the thickness of the RuO x film 7a is increased, the film stress of the RuO x film 7a itself is increased, it becomes easily peeled off RuO x film 7a. Further, since Ru and Ir are hard metal materials, the RuO x film 7a and the IrO x film 7b containing Ru and Ir are hard films. When the thickness of the hard RuO x film 7a is increased, the vibration part including the KNN film 3 is less likely to vibrate (resonate), which may cause a decrease in sensitivity when the multilayer substrate 10 is applied to a sensor, In some cases, it may cause an increase in power consumption. For these reasons, the thickness of the RuO x film 7a is preferably 30 nm or less.

(e)RuO膜7aとして、組成式RuO(0<x<2)で表される膜を設けることが、RuO膜7aの製膜レートの低下を抑制できる点で、好ましい。 As (e) RuO x film 7a, it is provided with a film represented by the composition formula RuO x (0 <x <2 ), in that it can suppress a decrease in deposition rate of RuO x film 7a, preferred.

上述のように、RuO膜7aのスパッタリング製膜時の雰囲気ガス(Ar/O混合ガス)中におけるOガス比率が高くなるほど、係数xの値が大きくなり、Oガス比率が小さくなるほど、係数xの値が小さくなる傾向がある。しかしながら、スパッタリングターゲット材からのRu原子の叩き出しはArガス(イオン化したAr原子(Ar))により行われる。このため、上述のOガス比率が高くなると、すなわちArガス比率が低くなると、ターゲットから叩き出されるRu原子の量(単位時間あたりの量)が少なくなることから、RuO膜7aの製膜レートが低下する。Oガス比率を例えば50%以下とすることで、実用的な製膜レートを得ることができ、この場合、係数xの値は2未満となる。 As described above, the higher the O 2 gas ratio in the atmospheric gas (Ar / O 2 mixed gas) during the sputtering deposition of the RuO x film 7a, the larger the value of the coefficient x and the smaller the O 2 gas ratio. The value of the coefficient x tends to be small. However, Ru atoms are sputtered from the sputtering target material by Ar gas (ionized Ar atoms (Ar + )). For this reason, when the above-mentioned O 2 gas ratio is high, that is, when the Ar gas ratio is low, the amount of Ru atoms knocked out from the target (amount per unit time) decreases, so that the RuO x film 7a is formed. The rate drops. A practical film forming rate can be obtained by setting the O 2 gas ratio to, for example, 50% or less. In this case, the value of the coefficient x is less than 2.

(f)RuO膜7aとして、組成式RuO(2<x)で表される膜を設けることが、KNN膜3の寿命を確実に長くすることができる点で、好ましい。 (F) It is preferable to provide a film represented by the composition formula RuO x (2 <x) as the RuO x film 7a in that the lifetime of the KNN film 3 can be reliably increased.

組成式RuO(2<x)で表される膜を設けることで、RuO膜7aからKNN膜3中へと拡散する酸素(O)の量を増やすことができる。これにより、KNN膜3が絶縁破壊に至る一因であるKNN膜3中の酸素欠陥を、RuO膜7aから拡散した酸素により埋めることができる。その結果、KNN膜3の寿命を確実に延ばすことが可能となる。なお、ここでいう「酸素欠陥」とは、例えばKNN膜3を製膜した後にアニールを行うことでKNN膜3を構成する結晶内に生じた酸素が抜けた箇所を意味する。 By providing the film represented by the composition formula RuO x (2 <x), the amount of oxygen (O) diffused from the RuO x film 7a into the KNN film 3 can be increased. As a result, oxygen defects in the KNN film 3 that contribute to the dielectric breakdown of the KNN film 3 can be filled with oxygen diffused from the RuO x film 7a. As a result, the lifetime of the KNN film 3 can be reliably extended. Here, the “oxygen defect” means, for example, a portion where oxygen generated in the crystal constituting the KNN film 3 is removed by annealing after the KNN film 3 is formed.

(g)RuO膜7aおよび上部電極膜4の製膜後に、600℃以上の温度条件下で積層基板10をアニールするか、あるいは、RuO膜7aおよび上部電極膜4の製膜後に、積層基板10のアニールを不実施とすることで、KNN膜3の寿命を確実に長くすることが可能となる。なお、アニールを行っても、KNN膜3の強誘電性には影響を及ぼさないことを、本願発明者は確認済みである。 (G) After the RuO x film 7a and the upper electrode film 4 are formed, the laminated substrate 10 is annealed under a temperature condition of 600 ° C. or higher, or after the RuO x film 7a and the upper electrode film 4 are formed, By not performing the annealing of the substrate 10, the lifetime of the KNN film 3 can be reliably increased. The inventor of the present application has confirmed that the annealing does not affect the ferroelectricity of the KNN film 3.

これに対し、RuO膜および上部電極膜の製膜後に600℃未満(例えば500℃)の温度条件下で積層基板をアニールする手法も考えられる。しかしながら、積層基板を600℃未満の温度条件下でアニールすると、RuO膜および上部電極膜の製膜後に積層基板のアニールを不実施とした場合や、600℃以上の温度条件下で積層基板をアニールした場合よりも、KNN膜の寿命が短くなる。 On the other hand, a method of annealing the laminated substrate under a temperature condition of less than 600 ° C. (for example, 500 ° C.) after forming the RuO x film and the upper electrode film is also conceivable. However, if the laminated substrate is annealed under a temperature condition of less than 600 ° C., annealing of the laminated substrate is not performed after the RuO x film and the upper electrode film are formed, or the laminated substrate is annealed under a temperature condition of 600 ° C. or higher. The lifetime of the KNN film is shorter than when annealing.

(5)変形例
本実施形態は上述の態様に限定されず、例えば以下のように変形することもできる。
(5) Modification This embodiment is not limited to the above-described aspect, and can be modified as follows, for example.

(変形例1)
例えば、基板1と下部電極膜2との間に、RuO膜7aまたはIrO膜7bを設けてもよい。すなわち、密着層6として、組成式RuOまたはIrOで表される酸化物からなる膜を形成してもよい。また例えば、下部電極膜2とKNN膜3との間に、RuO膜7aまたはIrO膜7bを設けてもよい。なお、これらの場合、KNN膜3と上部電極膜4との間に、RuO膜7aまたはIrO膜7bを設けてもよく、設けなくてもよい。これらによっても、上述の実施形態と同様の効果を得ることができる。
(Modification 1)
For example, a RuO x film 7 a or an IrO x film 7 b may be provided between the substrate 1 and the lower electrode film 2. That is, a film made of an oxide represented by the composition formula RuO x or IrO x may be formed as the adhesion layer 6. For example, a RuO x film 7 a or an IrO x film 7 b may be provided between the lower electrode film 2 and the KNN film 3. In these cases, the RuO x film 7 a or the IrO x film 7 b may or may not be provided between the KNN film 3 and the upper electrode film 4. Also by these, the same effect as the above-mentioned embodiment can be acquired.

(変形例2)
上述の積層基板10を圧電膜素子20に成形する際、積層基板10(圧電膜素子20)を用いて作製した圧電膜デバイス30をセンサやアクチュエータ等の所望の用途に適用することができる限り、積層基板10から基板1を除去してもよい。
(Modification 2)
When the above-described multilayer substrate 10 is formed into the piezoelectric film element 20, as long as the piezoelectric film device 30 manufactured using the multilayer substrate 10 (piezoelectric film element 20) can be applied to a desired application such as a sensor or an actuator, The substrate 1 may be removed from the laminated substrate 10.

<他の実施形態>
以上、本発明の実施形態を具体的に説明した。但し、本発明は上述の実施形態に限定されるものではなく、その要旨を逸脱しない範囲で種々変更可能である。
<Other embodiments>
The embodiment of the present invention has been specifically described above. However, the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the invention.

以下、上述の実施形態の効果を裏付ける実験結果について説明する。   Hereinafter, experimental results supporting the effects of the above-described embodiment will be described.

基板として、表面が(100)面方位、厚さ610μm、直径6インチ、表面に熱酸化膜(厚さ200nm)が形成されたSi基板を用意した。そして、この基板の熱酸化膜上に、第1密着層としてのTi膜(厚さ2nm)、下部電極膜としてのPt膜(基板の表面に対して(111)面方位に優先配向、厚さ200nm)、圧電膜としてのKNN膜(基板の表面に対して(001)面方位に優先配向、厚さ2μm)、第2密着層としてのRuO膜、IrO膜、TiO膜(厚さ2nm)またはTi膜(厚さ2nm)のいずれかの膜、上部電極膜としてのPt膜(厚さ100nm)を順に製膜することで積層基板を作製した。RuO膜、IrO膜の厚さは、2.5〜30nmの範囲内で変化させた。また、KNN膜の製膜後であって第2密着層の製膜前に、KNN膜を有する積層体を500℃の条件下で2時間アニールした。また、上部電極膜の製膜後の積層基板のアニールは、不実施とするか、500℃の温度条件下で2時間、600℃の温度条件下で2時間、700℃の温度条件下で2時間の各条件で行った。 As a substrate, a Si substrate having a (100) plane orientation, a thickness of 610 μm, a diameter of 6 inches, and a thermal oxide film (thickness: 200 nm) formed on the surface was prepared. Then, a Ti film (thickness 2 nm) as a first adhesion layer and a Pt film as a lower electrode film (preferential orientation and thickness in the (111) plane direction with respect to the surface of the substrate) on the thermal oxide film of the substrate 200 nm), KNN film as a piezoelectric film (preferential orientation in the (001) plane orientation with respect to the surface of the substrate, thickness 2 μm), RuO x film, IrO x film, TiO x film (thickness as the second adhesion layer) 2 nm) or a Ti film (thickness 2 nm) and a Pt film (thickness 100 nm) as an upper electrode film were formed in this order to produce a laminated substrate. The thicknesses of the RuO x film and the IrO x film were changed within the range of 2.5 to 30 nm. In addition, the laminate having the KNN film was annealed at 500 ° C. for 2 hours after the KNN film was formed and before the second adhesion layer was formed. Also, annealing of the laminated substrate after the formation of the upper electrode film is not performed, or 2 hours under the temperature condition of 500 ° C., 2 hours under the temperature condition of 600 ° C., and 2 under the temperature condition of 700 ° C. Performed at each condition of time.

Ti膜、Pt膜、KNN膜、RuO膜、IrO膜、TiO膜の製膜は、いずれも、RFマグネトロンスパッタリング法により行った。 The Ti film, Pt film, KNN film, RuO x film, IrO x film, and TiO x film were all formed by RF magnetron sputtering.

Ti膜、Pt膜を製膜する際の処理条件は、それぞれ、下記の通りとした。
基板温度:300℃
放電パワー:1200W
導入ガス:Arガス
Ar雰囲気の圧力:0.3Pa
製膜時間:5分
The processing conditions for forming the Ti film and the Pt film were as follows.
Substrate temperature: 300 ° C
Discharge power: 1200W
Introduced gas: Ar gas Ar atmosphere pressure: 0.3 Pa
Film formation time: 5 minutes

KNN膜を製膜する際の処理条件は、下記の通りとした。
基板温度:600℃
放電パワー:2200W
導入ガス:Ar/O混合ガス
Ar/O混合ガス雰囲気の圧力:0.3Pa
Arガスの分圧/Oガスの分圧:25/1
製膜速度:1μm/hr
The processing conditions for forming the KNN film were as follows.
Substrate temperature: 600 ° C
Discharge power: 2200W
Introduced gas: Ar / O 2 mixed gas Ar / O 2 mixed gas pressure: 0.3 Pa
Ar gas partial pressure / O 2 gas partial pressure: 25/1
Film forming speed: 1 μm / hr

RuO膜、IrO膜、TiO膜を製膜する際の処理条件は、それぞれ、下記の通りとした。
基板温度:室温(25℃)
放電パワー:300W
導入ガス:Ar/O混合ガス
Ar+O混合雰囲気の圧力:0.3Pa
Arガスの分圧/Oガスの分圧:1/1
製膜速度:0.1μm/hr
The processing conditions for forming the RuO x film, IrO x film, and TiO x film were as follows.
Substrate temperature: Room temperature (25 ° C)
Discharge power: 300W
Introduced gas: Ar / O 2 mixed gas Ar + O 2 mixed atmosphere pressure: 0.3 Pa
Ar gas partial pressure / O 2 gas partial pressure: 1/1
Film forming speed: 0.1 μm / hr

そして、積層基板が有するKNN膜の寿命、強誘電性をそれぞれ評価した。表1および表2は、KNN膜の寿命に関する評価結果を示しており、図5(a)〜(f)、図6(a)(b)は、それぞれ、KNN膜の強誘電性に関する評価結果を示す図であり、電圧−分極量のヒステリシスカーブ、および印加電圧に対する圧電変位特性をそれぞれ示している。   Then, the lifetime and ferroelectricity of the KNN film included in the multilayer substrate were evaluated. Tables 1 and 2 show the evaluation results regarding the lifetime of the KNN film. FIGS. 5A to 5F and 6A and 6B show the evaluation results regarding the ferroelectricity of the KNN film, respectively. FIG. 4 shows a hysteresis curve of voltage-polarization amount and a piezoelectric displacement characteristic with respect to an applied voltage.

(寿命に関する評価)
寿命に関する評価は、上述の実施形態に記載の条件のHALTにより、KNN膜が絶縁破壊するまでの時間(sec)を測定することで行った。表1、表2中の数値は、1サンプルにつき0.5mmφ内の7箇所で測定した寿命の値の平均値である。また、表1、表2中、「アニールなし」とは上部電極膜の製膜後のアニールを不実施としたことを示し、「600℃アニール」とは、上部電極膜の製膜後に積層基板を600℃の温度条件下で2時間アニールしたことを示す。表2中の「500℃アニール」、「700℃アニール」の表記も「600℃アニール」と同様の意味である。
(Evaluation of life)
Evaluation of the lifetime was performed by measuring the time (sec) until the KNN film breaks down by HALT under the conditions described in the above embodiment. The numerical values in Tables 1 and 2 are average values of lifetime values measured at 7 points within 0.5 mmφ per sample. In Tables 1 and 2, “No annealing” indicates that the annealing after the upper electrode film is not formed, and “600 ° C. annealing” indicates the laminated substrate after the upper electrode film is formed. Is annealed at 600 ° C. for 2 hours. In Table 2, “500 ° C. annealing” and “700 ° C. annealing” have the same meaning as “600 ° C. annealing”.

表1に示すように、KNN膜と上部電極膜との間に、RuO膜またはIrO膜を設けた積層基板では、KNN膜の寿命が3300秒以上となることが確認できた。これに対し、KNN膜と上部電極膜との間にTiO膜を設けた積層基板では、KNN膜の寿命が3300秒未満となることが確認できた。 As shown in Table 1, it was confirmed that the lifetime of the KNN film was 3300 seconds or longer in the laminated substrate in which the RuO x film or the IrO x film was provided between the KNN film and the upper electrode film. On the other hand, it was confirmed that the lifetime of the KNN film was less than 3300 seconds in the laminated substrate in which the TiO x film was provided between the KNN film and the upper electrode film.

表1、表2に示すように、RuO膜の膜厚とIrO膜の膜厚とが同じ場合、RuO膜を設けた積層基板の方が、IrO膜を設けた積層基板よりも、KNN膜の寿命が長くなることが確認できた。 As shown in Tables 1 and 2, when the film thickness of the RuO x film and the film thickness of the IrO x film are the same, the laminated substrate provided with the RuO x film is more than the laminated substrate provided with the IrO x film. It was confirmed that the life of the KNN film was prolonged.

表2に示すように、上部電極膜の製膜後のアニールを不実施とした積層基板では、KNN膜の寿命が3300秒以上となることが確認できた。また、上部電極膜の製膜後に600℃アニール、700℃アニールを行った積層基板では、KNN膜の寿命が3300秒以上となることが確認できた。これに対し、上部電極膜の製膜後に500℃アニールを行った積層基板では、KNN膜の寿命が3300秒未満となることが確認できた。   As shown in Table 2, it was confirmed that the life of the KNN film was 3300 seconds or longer in the laminated substrate in which the annealing after the formation of the upper electrode film was not performed. In addition, it was confirmed that the lifetime of the KNN film was 3300 seconds or longer in the multilayer substrate that was annealed at 600 ° C. and 700 ° C. after the upper electrode film was formed. On the other hand, it was confirmed that the lifetime of the KNN film was less than 3300 seconds in the laminated substrate that was annealed at 500 ° C. after the formation of the upper electrode film.

すなわち、KNN膜と上部電極膜との間に、RuO膜またはIrO膜を設けることで、TiO膜を設ける場合よりも、KNN膜の寿命を長くすることができることを確認できた。また、RuO膜を設けることで、IrO膜を設ける場合よりも、KNN膜の寿命をさらに長くすることができることを確認できた。さらにまた、上部電極膜の製膜後にアニールを行わないか、600℃以上の温度条件下でアニールを行うことで、KNN膜の寿命を確実に長くすることができることを確認できた。 That is, it was confirmed that by providing a RuO x film or an IrO x film between the KNN film and the upper electrode film, the lifetime of the KNN film can be extended as compared with the case of providing a TiO x film. Further, it was confirmed that the lifetime of the KNN film can be further increased by providing the RuO x film as compared with the case of providing the IrO x film. Furthermore, it was confirmed that the lifetime of the KNN film can be reliably increased by performing annealing after the upper electrode film is formed or by performing annealing under a temperature condition of 600 ° C. or higher.

(強誘電性に関する評価)
強誘電性の評価は、KNN膜に対して、±100kV/cmの電界を1kHzの周波数で印加して、電圧と分極量との関係を示すヒステリシスカーブを得た。
(Evaluation of ferroelectricity)
The ferroelectricity was evaluated by applying an electric field of ± 100 kV / cm to the KNN film at a frequency of 1 kHz to obtain a hysteresis curve indicating the relationship between the voltage and the polarization amount.

図5(a)〜(e)に示すように、KNN膜と上部電極膜との間に、RuO膜またはIrO膜を設けた積層基板では、|Pmax−|≧23μC/cmであり、|Pr−|≧14μC/cmであることを確認できた。これに対し、図5(f)に示すように、KNN膜と上部電極膜との間にTi膜を設けた積層基板では、|Pmax−|が17.6μC/cmであり、|Pr−|が10.4μC/cmであることを確認できた。なお、図5(a)〜(e)に示す積層基板では、上部電極膜の製膜後にアニールを行っておらず、図5(f)に示す積層基板では500℃の温度条件下で2時間アニールを行っている。 As shown in FIGS. 5A to 5E, in the laminated substrate in which the RuO x film or the IrO x film is provided between the KNN film and the upper electrode film, | P max− | ≧ 23 μC / cm 2 Yes, it was confirmed that | P r− | ≧ 14 μC / cm 2 . On the other hand, as shown in FIG. 5F, in the laminated substrate in which the Ti film is provided between the KNN film and the upper electrode film, | P max− | is 17.6 μC / cm 2 , and | P It was confirmed that r− | was 10.4 μC / cm 2 . In the multilayer substrate shown in FIGS. 5A to 5E, annealing is not performed after the upper electrode film is formed, and in the multilayer substrate shown in FIG. 5F, the temperature is 500 ° C. for 2 hours. Annealing is performed.

図5(a)に示すように、第2密着層として厚さが10nmのRuO膜を設け、上部電極膜の製膜後にアニールを不実施とした積層基板では、|Pmax−|が23.8μC/cmであり、|Pr−|が15.7μC/cmであった。また、図6(a)に示すように、第2密着層として厚さが10nmのRuO膜を設け、上部電極膜の製膜後に700℃の温度条件下で2時間アニールを行った積層基板では、|Pmax−|が23.8μC/cmであり、|Pr−|が17.9μC/cmであった。また、図5(d)に示すように、第2密着層として厚さが20nmのIrO膜を設け、上部電極膜の製膜後にアニールを不実施とした積層基板では、|Pmax−|が24.2μC/cmであり、|Pr−|が14.5μC/cmであった。また、図6(b)に示すように、第2密着層として厚さが20nmのIrO膜を設け、上部電極膜の製膜後に500℃の温度条件下で2時間アニールを行った積層基板では、|Pmax−|が24.0μC/cmであり、|Pr−|が14.8μC/cmであった。 As shown in FIG. 5A, in a laminated substrate in which a RuO x film having a thickness of 10 nm is provided as the second adhesion layer and annealing is not performed after the upper electrode film is formed, | P max− | 0.8 μC / cm 2 and | P r− | was 15.7 μC / cm 2 . Further, as shown in FIG. 6A, a laminated substrate in which a RuO x film having a thickness of 10 nm is provided as the second adhesion layer and annealed for 2 hours at 700 ° C. after forming the upper electrode film. in, | P max- | is 23.8μC / cm 2, | P r- | was 17.9μC / cm 2. Further, as shown in FIG. 5D, in a laminated substrate in which an IrO x film having a thickness of 20 nm is provided as the second adhesion layer and annealing is not performed after the upper electrode film is formed, | P max− | Was 24.2 μC / cm 2 and | P r− | was 14.5 μC / cm 2 . Further, as shown in FIG. 6B, a laminated substrate in which an IrO x film having a thickness of 20 nm is provided as the second adhesion layer and annealed for 2 hours at 500 ° C. after the formation of the upper electrode film. Then, | P max− | was 24.0 μC / cm 2 , and | P r− | was 14.8 μC / cm 2 .

すなわち、図5(a)と図6(a)との比較、図5(d)と図6(b)との比較から、第2密着層としてRuO膜またはIrO膜のいずれの膜を設けた場合であっても、上部電極膜の製膜後にアニールを行った積層基板の|Pmax−|、|Pr−|の値は、上部電極膜の製膜後のアニールを不実施とした積層基板の|Pmax−|、|Pr−|の値と、殆ど変わらないことを確認できた。すなわち、いずれの場合も、上部電極膜の製膜後に積層基板に対して行うアニールは、KNN膜の強誘電性には影響を及ぼさないことを確認できた。 That is, from the comparison between FIG. 5A and FIG. 6A and the comparison between FIG. 5D and FIG. 6B, the RuO x film or the IrO x film is used as the second adhesion layer. Even if it is provided, the values of | P max− | and | P r− | of the laminated substrate annealed after forming the upper electrode film indicate that the annealing after forming the upper electrode film is not performed. It was confirmed that the values of | P max− | and | P r− | That is, in any case, it was confirmed that annealing performed on the laminated substrate after forming the upper electrode film did not affect the ferroelectricity of the KNN film.

<本発明の好ましい態様>
以下、本発明の好ましい態様について付記する。
<Preferred embodiment of the present invention>
Hereinafter, preferred embodiments of the present invention will be additionally described.

(付記1)
本発明の一態様によれば、
基板と、前記基板上に製膜された第1電極膜と、前記第1電極膜上に製膜された圧電膜と、を備える、圧電膜を有する積層基板であって、
前記圧電膜上には、組成式RuOまたはIrOで表される酸化物からなる酸化膜が形成されている。
(Appendix 1)
According to one aspect of the invention,
A laminated substrate having a piezoelectric film, comprising: a substrate; a first electrode film formed on the substrate; and a piezoelectric film formed on the first electrode film,
An oxide film made of an oxide represented by the composition formula RuO x or IrO x is formed on the piezoelectric film.

(付記2)
付記1の基板であって、好ましくは、
前記基板と前記第1電極膜との間、または前記第1電極膜と前記圧電膜との間の少なくともいずれかには、組成式RuOまたはIrOで表される酸化物からなる酸化膜が形成されている。
(Appendix 2)
The substrate of appendix 1, preferably,
Between at least one of the substrate and the first electrode film, or between the first electrode film and the piezoelectric film, an oxide film made of an oxide represented by a composition formula RuO x or IrO x is provided. Is formed.

(付記3)
付記1または2の基板であって、好ましくは、
前記酸化膜は、組成式RuOで表される酸化物からなる膜である。
(Appendix 3)
Supplementary note 1 or 2 substrate, preferably,
The oxide film is a film made of an oxide represented by a composition formula RuO x .

(付記4)
付記1〜3のいずれかの基板であって、好ましくは、
前記酸化膜は、組成式RuO(0<x<2)で表される酸化物からなる膜である。
(Appendix 4)
The substrate according to any one of appendices 1 to 3, preferably,
The oxide film is a film made of an oxide represented by a composition formula RuO x (0 <x <2).

(付記5)
付記1〜3のいずれかの基板であって、好ましくは、
前記酸化膜は、組成式RuO(2<x)で表される酸化物からなる膜である。
(Appendix 5)
The substrate according to any one of appendices 1 to 3, preferably,
The oxide film is a film made of an oxide represented by a composition formula RuO x (2 <x).

(付記6)
付記1〜5のいずれかの基板であって、好ましくは、
前記酸化膜の厚さは、2nm以上30nm以下、好ましくは5nm以上30nm以下である。
(Appendix 6)
The substrate according to any one of appendices 1 to 5, preferably,
The oxide film has a thickness of 2 nm to 30 nm, preferably 5 nm to 30 nm.

(付記7)
付記1〜6のいずれかの基板であって、好ましくは、
前記圧電膜は、組成式(K1−yNa)NbO(0<y<1)で表されるペロブスカイト構造のアルカリニオブ酸化物からなる膜である。
(Appendix 7)
The substrate according to any one of appendices 1 to 6, preferably,
The piezoelectric film is a film made of an alkali niobium oxide having a perovskite structure represented by a composition formula (K 1-y Na y ) NbO 3 (0 <y <1).

(付記8)
付記1〜7のいずれかの基板であって、好ましくは、
前記圧電膜は、
飽和分極量(Pmax−)の絶対値が23μC/cm以上であり、
残留分極量(Pr−)の絶対値が14μC/cm以上である。
(Appendix 8)
The substrate according to any one of appendices 1 to 7, preferably,
The piezoelectric film is
The absolute value of the saturation polarization amount (P max− ) is 23 μC / cm 2 or more,
The absolute value of the remanent polarization (P r− ) is 14 μC / cm 2 or more.

(付記9)
付記1〜8のいずれかの基板であって、好ましくは、
前記酸化膜は、アニール(熱処理)が行われていない。
(Appendix 9)
The substrate according to any one of appendices 1 to 8, preferably,
The oxide film is not annealed (heat treatment).

(付記10)
付記1〜8のいずれかの基板であって、好ましくは、
前記酸化膜は、600℃以上800℃以下の温度条件下でアニールが行われている。
(Appendix 10)
The substrate according to any one of appendices 1 to 8, preferably,
The oxide film is annealed under a temperature condition of 600 ° C. or higher and 800 ° C. or lower.

(付記11)
本発明の他の態様によれば、
基板と、前記基板上に製膜された第1電極膜と、前記第1電極膜上に製膜された圧電膜と、を備える、圧電膜を有する積層基板であって、
前記圧電膜は、組成式(K1−yNa)NbO(0<y<1)で表されるペロブスカイト構造のアルカリニオブ酸化物からなる膜であり、
前記圧電膜上に第2電極膜を製膜し、前記積層基板の温度が200℃となるように加熱した状態で、前記第1電極膜と前記第2電極膜との間に−300kV/cmの電界(−60Vの電圧)を印加した際、電界印加開始から前記圧電膜に流れるリーク電流密度が30mA/cmを超えるまでの時間が3300秒以上である、圧電膜を有する積層基板が提供される。
(Appendix 11)
According to another aspect of the invention,
A laminated substrate having a piezoelectric film, comprising: a substrate; a first electrode film formed on the substrate; and a piezoelectric film formed on the first electrode film,
The piezoelectric film is a film made of an alkali niobium oxide having a perovskite structure represented by a composition formula (K 1-y Na y ) NbO 3 (0 <y <1),
A second electrode film is formed on the piezoelectric film, and in a state where the temperature of the laminated substrate is heated to 200 ° C., −300 kV / cm between the first electrode film and the second electrode film. A multilayer substrate having a piezoelectric film is provided in which the time from when the electric field is applied (−60 V voltage) until the leakage current density flowing through the piezoelectric film exceeds 30 mA / cm 2 is 3300 seconds or more. Is done.

(付記12)
付記11の基板であって、好ましくは、
前記圧電膜上には、組成式RuOまたはIrOで表される酸化物からなる酸化膜が形成されている。
(Appendix 12)
The substrate of appendix 11, preferably,
An oxide film made of an oxide represented by the composition formula RuO x or IrO x is formed on the piezoelectric film.

(付記13)
本発明のさらに他の態様によれば、
基板と、前記基板上に製膜された第1電極膜と、前記第1電極膜上に製膜された圧電膜と、前記圧電膜上に製膜された第2電極膜と、を備え、
前記圧電膜と前記第2電極膜との間には、組成式RuOまたはIrOで表される酸化物からなる酸化膜が設けられている圧電膜を有する素子、または、圧電膜を有するデバイスが提供される。
(Appendix 13)
According to yet another aspect of the invention,
A substrate, a first electrode film formed on the substrate, a piezoelectric film formed on the first electrode film, and a second electrode film formed on the piezoelectric film,
An element having a piezoelectric film in which an oxide film made of an oxide represented by a composition formula RuO x or IrO x is provided between the piezoelectric film and the second electrode film, or a device having a piezoelectric film Is provided.

(付記14)
本発明のさらに他の態様によれば、
基板上に電極膜を製膜する工程と、
前記電極膜上に圧電膜を製膜する工程と、
前記圧電膜上に組成式RuOまたはIrOで表される酸化物からなる酸化膜を製膜する工程と、を備える、圧電膜を有する積層基板の製造方法が提供される。
(Appendix 14)
According to yet another aspect of the invention,
Forming an electrode film on a substrate;
Forming a piezoelectric film on the electrode film;
There is provided a method of manufacturing a multilayer substrate having a piezoelectric film, comprising: forming an oxide film made of an oxide represented by a composition formula RuO x or IrO x on the piezoelectric film.

(付記15)
付記14の方法であって、好ましくは、
前記酸化膜を製膜する工程を行った後、前記積層基板をアニールする工程を有しない。
(Appendix 15)
The method of appendix 14, preferably,
After the step of forming the oxide film, there is no step of annealing the laminated substrate.

(付記16)
付記14の方法であって、好ましくは、
前記酸化膜を製膜する工程を行った後、600℃以上、好ましくは600℃以上800℃以下の温度条件下で前記積層基板をアニールする工程をさらに有する。
(Appendix 16)
The method of appendix 14, preferably,
After the step of forming the oxide film, the method further includes a step of annealing the laminated substrate under a temperature condition of 600 ° C. or higher, preferably 600 ° C. or higher and 800 ° C. or lower.

1 基板
3 圧電膜
7a RuO
7b IrO
10 積層基板
DESCRIPTION OF SYMBOLS 1 Substrate 3 Piezoelectric film 7a RuO x film 7b IrO x film 10 Multilayer substrate

Claims (9)

基板と、前記基板上に製膜された第1電極膜と、前記第1電極膜上に製膜された圧電膜と、を備える、圧電膜を有する積層基板であって、
前記圧電膜は、組成式(K1−yNa)NbO(0<y<1)で表されるペロブスカイト構造のアルカリニオブ酸化物からなる膜であり、
前記圧電膜上には、組成式RuOまたはIrOで表される酸化物からなる酸化膜が設けられており、
前記酸化膜上に第2電極膜を製膜し、前記積層基板の温度が200℃となるように加熱した状態で、前記第1電極膜と前記第2電極膜との間に−300kV/cmの電界を印加した際、電界印加開始から前記圧電膜に流れるリーク電流密度が30mA/cmを超えるまでの時間が3300秒以上である、圧電膜を有する積層基板。
A laminated substrate having a piezoelectric film, comprising: a substrate; a first electrode film formed on the substrate; and a piezoelectric film formed on the first electrode film,
The piezoelectric film is a film made of an alkali niobium oxide having a perovskite structure represented by a composition formula (K 1-y Na y ) NbO 3 (0 <y <1),
On the piezoelectric film, an oxide film made of an oxide represented by a composition formula RuO x or IrO x is provided,
A second electrode film is formed on the oxide film, and is heated so that the temperature of the laminated substrate is 200 ° C., and −300 kV / cm between the first electrode film and the second electrode film. A multilayer substrate having a piezoelectric film, wherein the time from when the electric field is applied until the density of leakage current flowing through the piezoelectric film exceeds 30 mA / cm 2 is 3300 seconds or more.
前記酸化膜はアニールが行われていない膜である請求項1に記載の圧電膜を有する積層基板。   The multilayer substrate having a piezoelectric film according to claim 1, wherein the oxide film is a film that has not been annealed. 前記酸化膜は600℃以上800℃以下の温度条件下でのアニールが行われている膜である請求項1記載の圧電膜を有する積層基板。   2. The multilayer substrate having a piezoelectric film according to claim 1, wherein the oxide film is a film that is annealed under a temperature condition of 600 ° C. or higher and 800 ° C. or lower. 前記酸化膜の厚さが5nm以上30nm以下である請求項1〜3のいずれか1項に記載の圧電膜を有する積層基板。   The laminated substrate having a piezoelectric film according to claim 1, wherein the oxide film has a thickness of 5 nm to 30 nm. 基板と、前記基板上に製膜された第1電極膜と、前記第1電極膜上に製膜された圧電膜と、前記圧電膜上に製膜された第2電極膜と、を有する積層基板を備え、
前記圧電膜は、組成式(K1−yNa)NbO(0<y<1)で表されるペロブスカイト構造のアルカリニオブ酸化物からなる膜であり、
前記圧電膜と前記第2電極膜との間には、組成式RuOまたはIrOで表される酸化物からなる酸化膜が設けられており、
前記積層基板の温度が200℃となるように加熱した状態で、前記第1電極膜と前記第2電極膜との間に−300kV/cmの電界を印加した際、電界印加開始から前記圧電膜に流れるリーク電流密度が30mA/cmを超えるまでの時間が3300秒以上である、圧電膜を有する素子。
A laminate having a substrate, a first electrode film formed on the substrate, a piezoelectric film formed on the first electrode film, and a second electrode film formed on the piezoelectric film Equipped with a substrate,
The piezoelectric film is a film made of an alkali niobium oxide having a perovskite structure represented by a composition formula (K 1-y Na y ) NbO 3 (0 <y <1),
Between the piezoelectric film and the second electrode film, an oxide film made of an oxide represented by a composition formula RuO x or IrO x is provided,
When an electric field of −300 kV / cm is applied between the first electrode film and the second electrode film in a state where the temperature of the multilayer substrate is heated to 200 ° C., the piezoelectric film A device having a piezoelectric film, in which a time until a leakage current density flowing in the substrate exceeds 30 mA / cm 2 is 3300 seconds or more.
基板上に第1電極膜を製膜する工程と、
前記第1電極膜上に、組成式(K1−yNa)NbO(0<y<1)で表されるペロブスカイト構造のアルカリニオブ酸化物からなる圧電膜を製膜する工程と、
前記圧電膜上に、組成式RuOまたはIrOで表される酸化物からなる酸化膜を製膜する工程と、
を行うことで、前記酸化膜上に第2電極膜を製膜し、前記基板と前記第1電極膜と前記圧電膜と前記酸化膜と前記第2電極膜とを有する積層基板の温度が200℃となるように加熱した状態で、前記第1電極膜と前記第2電極膜との間に−300kV/cmの電界を印加した際、電界印加開始から前記圧電膜に流れるリーク電流密度が30mA/cmを超えるまでの時間を3300秒以上とする、圧電膜を有する積層基板の製造方法。
Forming a first electrode film on the substrate;
Forming a piezoelectric film made of an alkali niobium oxide having a perovskite structure represented by a composition formula (K 1-y Na y ) NbO 3 (0 <y <1) on the first electrode film;
Forming an oxide film made of an oxide represented by a composition formula RuO x or IrO x on the piezoelectric film;
To form a second electrode film on the oxide film, and the temperature of the laminated substrate having the substrate, the first electrode film, the piezoelectric film, the oxide film, and the second electrode film is 200. When an electric field of −300 kV / cm is applied between the first electrode film and the second electrode film in a state of being heated so as to be at a temperature of 30 ° C., the density of the leak current flowing through the piezoelectric film from the start of the electric field application is 30 mA. A method for producing a laminated substrate having a piezoelectric film, wherein the time until exceeding / cm 2 is 3300 seconds or more.
前記酸化膜を製膜する工程を行った後、前記積層基板をアニールする工程を有さない請求項6に記載の圧電膜を有する積層基板の製造方法。   The method for manufacturing a multilayer substrate having a piezoelectric film according to claim 6, wherein the method does not include a step of annealing the multilayer substrate after performing the step of forming the oxide film. 前記酸化膜を製膜する工程を行った後、600℃以上800℃以下の温度条件下で、前記積層基板をアニールする工程をさらに有する請求項6に記載の圧電膜を有する積層基板の製造方法。   The method for manufacturing a multilayer substrate having a piezoelectric film according to claim 6, further comprising a step of annealing the multilayer substrate under a temperature condition of 600 ° C. or higher and 800 ° C. or lower after performing the step of forming the oxide film. . 前記酸化膜を製膜する工程では、前記酸化膜として厚さが5nm以上30nm以下である膜を製膜する請求項6〜8のいずれか1項に記載の圧電膜を有する積層基板の製造方法。
The method for producing a laminated substrate having a piezoelectric film according to claim 6, wherein in the step of forming the oxide film, a film having a thickness of 5 nm to 30 nm is formed as the oxide film. .
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