JP2018190794A - Light-emitting element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a light-emitting element that has a rod-like structure capable of enhancing light-emission efficiency.SOLUTION: A light-emitting element includes: an n-side semiconductor rod; an active layer that covers the n-side semiconductor rod and is formed of a semiconductor; and a p-side semiconductor coating layer that covers the active layer. The n-side semiconductor rod includes: an n-type semiconductor rod main body part containing an n-type impurity; a first semiconductor layer provided on an upper surface of the n-type semiconductor rod main body part, and that contains a p-type impurity; and a second semiconductor layer provided on an upper surface of the first semiconductor layer, and that has a p-type impurity concentration lower than that of the first semiconductor layer.SELECTED DRAWING: Figure 2

Description

  The present disclosure relates to a light emitting device.

In recent years, rod-shaped light emitting elements including rod-shaped structures have attracted attention (for example, Patent Documents 1 to 3). The rod-shaped light emitting element includes one or more n-side semiconductor rods made of, for example, an n-type semiconductor, an active layer covering the surface of the rod, and a layer made of, for example, a p-type semiconductor covering the active layer.
Since the entire surface of the semiconductor rod can be a light emitting surface, the rod-shaped light emitting element has an advantage that the light emitting area per unit volume can be widened as compared with the conventional light emitting element.

JP 2013-004661 A JP2015-142020A JP2015-508941A

However, a conventional light emitting device having a rod-like structure does not fully utilize the advantage that the light emitting area per unit volume can be widened, and it cannot be said that the light emitting efficiency is still sufficiently high.
Therefore, an object of the present disclosure is to provide a light-emitting element having a rod-like structure that can increase luminous efficiency.

The light emitting device according to the present disclosure is
an n-side semiconductor rod;
An active layer made of a semiconductor covering the n-side semiconductor rod;
A p-side semiconductor coating layer covering the active layer,
The n-side semiconductor rod includes an n-type semiconductor rod body portion including an n-type impurity, a first semiconductor layer including a p-type impurity provided on an upper surface of the n-type semiconductor rod body portion, and an upper surface of the first semiconductor layer. And a second semiconductor layer having a p-type impurity concentration lower than that of the first semiconductor layer.

  According to the light emitting device according to the present disclosure, the light emission efficiency of the rod-shaped light emitting device can be increased.

FIG. 1 is a schematic top view of a light emitting device according to an embodiment of the present disclosure. FIG. 2 is a schematic sectional view taken along line II-II in FIG. 3A is a partially enlarged view of a cross-sectional view of the rod-shaped light emitting unit shown in FIG. FIG. 3B is a partially enlarged view of a modification of the rod-shaped light emitting unit. 4 is a schematic cross-sectional view taken along line IV-IV in FIG. 3A. FIG. 5 is a schematic cross-sectional view showing a modification of the rod-like light emitting unit. FIG. 6 is a cross-sectional view 1 for describing a method for manufacturing a light emitting element according to the present disclosure. It is sectional drawing for demonstrating the manufacturing method of the light emitting element which concerns on this indication. It is sectional drawing for demonstrating the manufacturing method of the light emitting element which concerns on this indication. FIG. 5 is a cross-sectional view for explaining the method for manufacturing the light emitting element according to the present disclosure. FIG. 6 is a cross-sectional view for explaining the method for manufacturing the light emitting element according to the present disclosure. It is sectional drawing for demonstrating the manufacturing method of the light emitting element which concerns on this indication. It is sectional drawing for demonstrating the manufacturing method of the light emitting element which concerns on this indication. It is sectional drawing 8 for demonstrating the manufacturing method of the light emitting element which concerns on this indication. It is sectional drawing 9 for demonstrating the manufacturing method of the light emitting element which concerns on this indication. It is sectional drawing 10 for demonstrating the manufacturing method of the light emitting element which concerns on this indication.

  As described above, the light emitting device having the conventional rod-shaped structure does not fully utilize the advantage that the light emitting area per unit volume can be widened, and the light emitting efficiency is not yet sufficiently high. In order to solve the above problems, the present inventor has intensively studied to improve the light emission efficiency of a light emitting element having a rod-like structure. As a result, when the active layer is formed directly on the upper surface of the n-type semiconductor rod, a reverse leakage current is generated in the vicinity of the upper surface of the active layer, and the improvement of the light emission efficiency is hindered by the reverse leakage current. all right. Therefore, in order to suppress the reverse leakage current generated near the upper surface of the n-side semiconductor rod, the present inventor has a large resistance on the upper surface of the n-type semiconductor rod, the impurity concentration of which is lower than that of the n-type semiconductor rod. An attempt was made to form a semi-insulating (i-type) semiconductor layer. However, the effect of forming the i-type semiconductor layer on the upper surface of the n-type semiconductor rod, that is, the improvement of the light emission efficiency was limited. As a result of investigating the reverse leakage current with respect to the forward voltage in order to elucidate the cause, in the structure in which the i-type semiconductor layer is formed on the upper surface of the n-type semiconductor rod, the reverse leakage current is generated with a relatively low forward voltage, It was found that the reverse leakage current suddenly increased when the forward voltage value was exceeded. Therefore, the present inventor further forms a band between the n-type semiconductor rod and the i-type semiconductor layer by forming, for example, a p-type semiconductor layer containing a p-type impurity between the upper surface of the n-type semiconductor rod and the i-type semiconductor layer. When the offset is increased, the forward voltage at which reverse leakage current starts to be generated can be increased. As a result, the light emission efficiency of the light emitting element having the rod-like structure can be improved.

The light emitting device of the present disclosure is made based on the knowledge obtained by the inventor above. That is, the light-emitting element of the present disclosure includes an n-side semiconductor rod, an active layer that covers the n-side semiconductor rod, and a p-side semiconductor coating layer that covers the active layer, and the n-side semiconductor rod includes n-type impurities. Type semiconductor rod body, a first semiconductor layer containing p-type impurities provided on the top surface of the n-type semiconductor rod body, and a p-type impurity concentration provided on the top surface of the first semiconductor layer. And a low second semiconductor layer.
In the light emitting device of the present disclosure configured as described above, the n-side semiconductor rod includes a first semiconductor layer containing a p-type impurity in order from the n-type semiconductor rod main body side, and a p-type impurity concentration from the first semiconductor layer. By including the low second semiconductor layer, reverse leakage current in the vicinity of the upper surface of the n-type semiconductor rod main body can be suppressed, and the light emission efficiency of the light emitting element can be increased.

  Further, in the light emitting device of the present disclosure, the n-side semiconductor rod has a polygonal column shape having a plurality of side surfaces, and the active layer made of a semiconductor includes a plurality of well layers provided on at least the side surfaces of the n-side semiconductor rod. The ridge line portion provided on the ridge line of the n-side semiconductor rod, the adjacent well layers are preferably separated by the ridge line portion, and the band gap of the ridge line portion is preferably wider than the band gap of the well layer. . In this way, carrier movement hardly occurs between adjacent well layers, and the carrier confinement effect in the well layers can be improved. Thereby, the luminous efficiency of a light emitting element can be improved more.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the following description, terms indicating specific directions and positions (for example, “up”, “down”, “right”, “left” and other terms including those terms) are used as necessary. . The use of these terms is to facilitate understanding of the invention with reference to the drawings, and the technical scope of the present invention is not limited by the meaning of these terms. Moreover, the part of the same code | symbol which appears in several drawing shows the same part or member.

  FIG. 1 is a schematic top view of a light-emitting element 1 according to an embodiment of the present disclosure, and FIG. 2 is a schematic cross-sectional view of the light-emitting element 1 along the line II-II in FIG. As shown in FIGS. 1 and 2, the light emitting device 1 according to the embodiment includes a growth substrate 50, a buffer layer 45, an underlayer 40, insulating films 90 and 91, a rod-shaped light emitting portion 5 (hereinafter “rod-shaped light emitting portion”). 5 ”), and electrodes 70, 71, 80, 81, 82.

The rod-shaped light emitting portion 5 has a column shape, and in the example of FIG. The light emitting element 1 includes at least one rod-shaped light emitting portion 5. The light emitting element 1 of FIG. 1 includes 23 rod-shaped light emitting portions 5.
3A is a partially enlarged view of the cross-sectional view of the rod-shaped light emitting unit 5 shown in FIG. As shown in FIG. 3A, each rod-shaped light emitting unit 5 includes an n-side semiconductor rod 10, an active layer 20, and a p-side semiconductor coating layer 30. The n-side semiconductor rod 10 includes, for example, a p-type first semiconductor layer 12 including an n-type semiconductor rod main body 11 made of an n-type semiconductor and a p-type impurity provided on the upper surface of the n-type semiconductor rod main body 11. The second semiconductor layer 13 includes, for example, an i-type second semiconductor layer 13 having a lower p-type impurity concentration than the first semiconductor layer 12. The concentration of the p-type impurity in the first semiconductor layer 12 and the second semiconductor layer 13 can be measured by, for example, a three-dimensional atom probe (3DAP). In n-side semiconductor rod 10, it is preferable that the thickness _{t i} of the first semiconductor layer 12 having a thickness of _{t p} and the second semiconductor layer 13 is respectively 0.1μm or more, the thickness of the first semiconductor layer 12 _{t p} And the _total thickness t _i of the second semiconductor layer 13 is preferably 0.1 μm or more and 2 μm or less.

  The n-type semiconductor constituting the n-type semiconductor rod body 11, the semiconductor containing the p-type impurity constituting the first semiconductor layer 12, and the impurity concentration lower than that of the first semiconductor layer 12 constituting the second semiconductor layer 13. The semiconductors may be semiconductors having the same composition or different compositions. In order to improve the crystallinity of the entire n-side semiconductor rod 10, particularly the first semiconductor layer 12 and the second semiconductor layer 13, the n-type semiconductor rod body 11, the first semiconductor layer 12, and the second semiconductor layer 13 are used. Each of these is preferably composed of a semiconductor made of a GaN crystal. In addition, when one or both of the first semiconductor layer 12 and the second semiconductor layer 13 is formed of a semiconductor having a band gap larger than that of the n-type semiconductor rod main body 11, the band offset can be increased and the reverse leakage can be further increased. It can be expected to suppress the current.

In the n-side semiconductor rod 10, the n-type impurity concentration in the n-type semiconductor rod body 11 is, for example, in the range of 5 × 10 ¹⁷ cm ⁻³ to 1 × 10 ²⁰ cm ⁻³ , preferably 1 × 10 10. It is set in the range of ¹⁸ cm ^{−3 to} 5 × 10 ¹⁹ cm ⁻³ . The p-type impurity concentration of the first semiconductor layer 12 is, for example, in the range of 1 × 10 ¹⁸ cm ^{−3 to} 5 × 10 ²⁰ cm ⁻³ , preferably 5 × 10 ¹⁸ cm ⁻³ to 1 × 10 ²⁰ cm. ^-3 . Each of the n-type semiconductor rod body 11 and the first semiconductor layer 12 may contain an n-type impurity at a concentration lower than the p-type impurity concentration, but each n-type impurity concentration is typically substantially n. The concentration is preferably less than 5 × 10 ¹⁷ cm ^−3, which is a concentration not containing type impurities. The n-type impurity concentration of the second semiconductor layer 13 is set lower than the n-type impurity concentration of the n-type semiconductor rod body 11, and the p-type impurity concentration of the second semiconductor layer 13 is set lower than the p-type impurity concentration of the first semiconductor layer 12. It is preferred that Both the n-type impurity concentration and the p-type impurity concentration of the second semiconductor layer 13 can be less than 5 × 10 ¹⁷ cm ^−3, which is a concentration that does not substantially contain impurities. In this case, the second semiconductor layer 13 is i-type or has a property close to that, so that current supply to the active layer 20 via the upper surface of the n-side semiconductor rod 10 can be suppressed. Note that in this specification, a semiconductor layer grown only by a source gas of a semiconductor material without including an impurity source gas (n-type impurity source gas and p-type impurity source gas) during growth is referred to as an undoped layer. Typically, the impurity concentration of this undoped layer is less than 5 × 10 ¹⁷ cm ⁻³ .

The n-side semiconductor rod 10 has a part or all of the side surface 10 c and the upper surface 10 a covered with the active layer 20. That is, some of the side surfaces 10c or all of the side surfaces 10c of the plurality of side surfaces 10c are covered with the active layer 20, and some of the regions or all of the side surfaces 10c covered with the active layer 20 are covered. These regions are covered with the active layer 20. In the present embodiment, at least two or more adjacent sides 10c (e.g., side 10c ₁ and the side surface 10c ₂ in FIG. 4) is preferably covered with the active layer 20 to be continuous. Accordingly, it is preferable that at least two or more side surfaces 10c adjacent to each other are included as “a part of the side surfaces 10c among the plurality of side surfaces 10c”.

The case where only a part of the region on one side surface 10c is covered with the active layer 20 means, for example, on the side surface 10c (for example, one side surface 10c ₁ ) of the n-side semiconductor rod 10 as shown in FIG. 3A. In this case, a part of the lower surface 10b side is covered with the insulating film 90, and only a region exposed from the insulating film 90 is covered with the active layer 20.
In the present disclosure, when the insulating film 90 is used in forming the n-side semiconductor rod 10 in the manufacturing method described later, such a form can be obtained.

In the present embodiment, it is preferable to increase the area covered by the active layer 20 functioning as the light emitting layer from the viewpoint of increasing the light emitting area. That is, it is preferable that the entire surface of the side surface 10 c exposed from the insulating film 90 is covered with the active layer 20.
Moreover, it is preferable that the thickness of the active layer 20 is substantially the same in all the side surfaces of the rod-shaped light emitting portion 5. Similarly, it is preferable that the thickness of the p-side semiconductor coating layer 30 is substantially the same on all side surfaces of the rod-shaped light emitting portion 5. As a result, the same level of light emission can be obtained from all the side surfaces of the rod-shaped light emitting unit 5.

  Further, the upper surface 10a of the n-side semiconductor rod 10 is covered with an active layer 20, and a first semiconductor containing a p-type impurity from the upper surface 11a side between the upper surface 11a of the n-type semiconductor rod body 11 and the active layer 20 is provided. The layer 12 includes an n-type semiconductor rod body 11 and a second semiconductor layer 13 having a lower impurity concentration than the first semiconductor layer 12. Note that the lower surface 10 b of the n-side semiconductor rod 10 is not covered with the active layer 20 and is used as a current-carrying path to the n-side semiconductor rod 10.

  The active layer 20 is covered with a p-side semiconductor coating layer 30. In the example of FIG. 3A, the active layer 20 is formed on the side surface 10c and the upper surface 10a of the n-side semiconductor rod 10, and the p-side semiconductor coating layer 30 is provided so as to cover the side surface 20c and the upper surface 20a of the active layer 20. ing.

FIG. 4 is a schematic cross-sectional view of the rod-shaped light emitting unit 5 along the line IV-IV in FIG. 3A. The n-side semiconductor rod 10 has a hexagonal shape, with six sides corresponding to the side surface 10c (side surfaces 10c _{1 to} 10c ₆ ) of the n-side semiconductor rod 10 and six vertices corresponding to the ridge line 10r (10r ₁ ) of the n-side semiconductor rod 10. corresponding to the ~10r _6). The ridge line 10r is a boundary line between the adjacent side surfaces 10c, and extends in the longitudinal direction (z direction) of the n-side semiconductor rod 10. For example, when the n-side semiconductor rod 10 is a hexagonal column and the side surfaces 10 c _{1 to} 10 c ₆ are flat surfaces, the ridge lines 10 r _{1 to} 10 r ₆ are straight lines parallel to the central axis of the n-side semiconductor rod 10. is there.
The active layer 20 continuously surrounds the entire hexagonal outer periphery of the n-side semiconductor rod 10. The active layer 20 includes a well layer 21 and a ridge line portion 22. The well layer 21 is disposed on the side surface 10 c of the n-side semiconductor rod 10. The two well layers 21 that respectively cover the two adjacent side surfaces 10 c are separated at the position of the ridge line 10 r of the n-side semiconductor rod 10. That is, the well layer 21 is discontinuous in the outer circumferential direction of the semiconductor rod 10. A ridge line portion 22 is provided between two adjacent well layers 21, that is, at the position of the ridge line 10 r of the n-side semiconductor rod 10. By connecting two adjacent well layers 21 by this ridge line portion 22, an active layer 20 that is continuous in the outer peripheral direction of the n-side semiconductor rod 10 is formed.
As described above, since the ridge line 10r extends in the longitudinal direction (z direction) of the n-side semiconductor rod 10, the ridge line portion 22 of the active layer 20 also extends along the ridge line 10r in the longitudinal direction of the n-side semiconductor rod 10 ( z direction).

The band gap of the ridge line portion 22 is wider than the band gap of the well layer 21. That is, the ridge line portion 22 can exhibit the same function as the barrier layer having the quantum well structure. Thereby, the luminous efficiency of the rod-shaped light emission part 5 can be improved for the following reasons.
When the rod-shaped light emitting unit 5 is lit, a voltage is applied to the light emitting element 1. As a result, carriers are injected into the active layer 20 and light emission occurs. Here, by dividing the well layer 21 at the ridge line portion 22 having a large band gap, carriers can be confined in the well layer 21 having a small size. As a result, the frequency of light emission recombination in the well layer 21 can be increased, and the light emission efficiency can be improved. Further, if the distance between the ridge line portions 22 is sufficiently small, for example, about several tens of nanometers, a quantum effect can be obtained, so that carriers can be confined more efficiently in the well layer 21.

  Both the well layer 21 and the ridge line portion 22 can be formed of a nitride semiconductor. For example, the well layer 21 is formed from InGaN, and the ridge line portion 22 is formed from GaN or InGaN having a smaller In composition ratio than the well layer 21. The band gap between the well layer 21 and the ridge line portion 22 can be controlled by the In content (In composition ratio) contained in the nitride semiconductor. In the case of a nitride semiconductor, the band gap is narrowed when the In composition ratio is high, and the band gap is widened when the In composition ratio is low. Therefore, the band gap of the ridge line portion 22 can be made wider than the band gap of the well layer 21 by making the In composition ratio of the well layer 21 higher than the In composition ratio of the ridge line portion 22. The well layer 21 and the ridge line portion 22 can be formed by the same process. Under the present circumstances, the In composition ratio of the part used as the ridgeline part 22 can be made lower than the In composition ratio of the other part used as the well layer 21 by specific growth conditions.

The active layer 20 may have a multiple quantum well structure (MQW). The active layer 20 shown in FIG. 5 can include a plurality of well layers 21 stacked in the thickness direction of the active layer 20. At this time, the barrier layer 25 is interposed between the well layers 21 adjacent in the radial direction. For example, if the active layer 20 covering the one side 10c ₁ of the n-side semiconductor rod 10, the side surface 10c ₁ and the direction perpendicular N (coincident with the thickness direction of the active layer 20), the well layer 21 and barrier layer 25 Are stacked alternately.
Since the well layer 21 is surrounded by the barrier layer 25 having a wide band gap and the ridge line portion 22 having a wide band gap, carriers can be efficiently confined in the well layer 21.

  The larger the ratio of the length to the thickness of the rod-like light emitting portion 5 (aspect ratio), the higher the density of the light emitting area. The aspect ratio of the rod-shaped light emitting unit 5 is, for example, 2 or more, and can be 5 or more. Moreover, if the aspect ratio is, for example, 20 or less, the rod-shaped light emitting portion 5 can be easily manufactured stably. The aspect ratio of the rod-shaped light-emitting portion 5 should be selected in consideration of the density of the rod-shaped light-emitting portion 5 so that the light-emitting area is larger than that of a conventional light-emitting element having a flat active layer. Is preferred. In this specification, “thickness” is the diameter of a circumscribed circle of a polygon when the cross-sectional shape is a polygon.

  The n-side semiconductor rod 10 includes an n-type semiconductor rod body 11, a first semiconductor layer 12, and a second semiconductor layer 13. For example, the n-type semiconductor rod body 11 is formed from an n-type nitride semiconductor, and the p-side semiconductor coating layer 30 is formed from a p-type nitride semiconductor.

  The n-side semiconductor rod 10 can be formed from a nitride semiconductor that is a wurtzite crystal. The wurtzite crystal is a hexagonal crystal, which suppresses the growth in the lateral direction (m-axis direction) so that it has a hexagonal shape when viewed from above, and grows the crystal in the vertical direction to increase the aspect ratio of the rod. Can be formed. In this case, the side surface 10c (see FIGS. 3A and 4) of the n-side semiconductor rod 10 corresponds to the M plane of the crystal. In other words, the side surface 10c of the n-side semiconductor rod 10 is the M-plane of the wurtzite crystal, and the side surface 10c is arranged so as to have a hexagonal shape when viewed from above. In this specification, “viewed from the top” means observing from the z direction as shown in FIGS. 1 and 4.

The n-side semiconductor rod 10 can be formed of a GaN crystal. At this time, it is preferable that the n-side semiconductor rod 10 has a [000-1] direction of the GaN crystal in a direction (z direction in FIG. 3A) upward from the base layer 40.
FIG. 3B is a modification of the rod-shaped light emitting unit. 3B has an inclined surface 6d (a facet different from the upper surface 6a and the side surface 6c) between the upper surface 6a and the side surface 6c. Specifically, the rod-shaped light emitting unit 6 of the modified example includes an n-side semiconductor rod 16 having an inclined surface 16 d, an active layer 26 that covers the outer surface of the n-side semiconductor rod 16, and a semiconductor layer 36 that covers the outer surface of the active layer 26. The rod-shaped light emitting unit 6 has an inclined surface 6d substantially parallel to the inclined surface 16d. Further, as shown in FIG. 3B, in the n-side semiconductor rod 16, the n-type semiconductor rod body portion 17 includes a side surface 17c, an inclined surface 17d, and an upper surface 17a, and the first semiconductor layer 18 includes the side surface 18c and the inclined surface. The second semiconductor layer 19 includes a side surface 19c, an inclined surface 19d, and an upper surface 16a. The side surface 16 c of the n-side semiconductor rod 16 includes a side surface 17 c of the n-type semiconductor rod body 11, a side surface 18 c of the first semiconductor layer 18, and a side surface 19 c of the second semiconductor layer 19. Since the n-side semiconductor rod 16 has the inclined surface 16d in the rod-shaped light emitting portion 6 of the modification, the crystallinity of the active layer 26 formed on the upper surface 16a of the n-side semiconductor rod 16 and the inclined surface 16d. The leakage current in the vicinity of the upper surface 16a and the inclined surface 16d of the n-side semiconductor rod 16 can be reduced.

That is, as can be seen from FIG. 3A, the active layer 20 includes a well layer 21 that continues from the side surface 10c of the n-side semiconductor rod 10 to the upper surface 10a beyond the ridge line 10e that is the boundary between the side surface 10c and the upper surface 10a. It is difficult for the semiconductor layer formed on the surface of the side semiconductor rod 10 to have good crystallinity at the ridge line 10e. That is, the portion of the well layer 21 covering the ridge line e is liable to deteriorate in crystallinity, and there is a concern that the portion where the crystallinity is insufficient becomes a leak path. However, the inclined surface 16d is provided on the n-side semiconductor rod 16. Thus, the crystallinity of the well layer 21 can be improved and the leakage current can be suppressed.
For this reason, it is preferable to make the upper surface 10a side of the n-side semiconductor rod 10 into a shape as shown in FIG. 3B. Also in FIG. 3B, the n-side semiconductor rod 16 has a ridge line 16e where the side surface 16c and the inclined surface 16d contact each other and a ridge line 16f where the inclined surface 16d and the upper surface 16a contact each other. Is larger than 90 °, and the angle between the inclined surface 16d and the upper surface 16a is larger than 90 °, the crystallinity of the well layer 21 can be improved. When the side surface 16c is an M-plane in a GaN-based crystal, for example, the angle formed by the inclined surface 16d and the side surface 16c is preferably about 152 degrees. In this case, the inclined surface 16d is (10 -11) plane. In the Miller index, a negative index is represented by adding a bar on the number, but in this specification, “−” is added before the number to indicate a negative index. FIG. 3B shows an example including the upper surface 16a, but the upper surface 16a may be omitted. That is, in the cross-sectional view shown in FIG. 3B, the upper end portion of the n-side semiconductor rod 10 is trapezoidal, but may be triangular.

Hereinafter, description will be made with reference to FIG. 2 again. In the light emitting element 1, the plurality of rod-shaped light emitting portions 5 are disposed on the upper surface 40 b of the base layer 40. More precisely, as shown in FIG. 3A, the n-side semiconductor rod 10 of the rod-shaped light emitting unit 5 is disposed on the upper surface 40 b of the foundation layer 40. With such a structure, for example, the n-side semiconductor rod 10 can be energized through the underlayer 40 by making the underlayer 40 n-type conductive.
In addition, a first translucent electrode 81 is formed on the surface of the p-side semiconductor coating layer 30 of the rod-shaped light emitting unit 5, and a second translucent electrode 82 is formed on the surface. Between the base layer 40 and the first translucent electrode 81, the plurality of rod-shaped light emitting portions 5 are connected in parallel. The second translucent electrode 82 extends to the upper side of the base layer 40. However, the second translucent electrode 82 and the base layer 40 are electrically insulated by an insulating film 91 disposed therebetween. ing.
The light emitted from the rod-shaped light emitting unit 5 can be taken out of the light emitting element 1 through the first light transmitting electrode 81 and the second light transmitting electrode 82.

Next, a method for manufacturing the light-emitting element 1 will be described with reference to FIGS. 6A to 6J. In the description of the manufacturing process, the manufacturing process of the light-emitting element 1 when a gallium nitride semiconductor is used as a semiconductor will be described in detail.
In the present disclosure, the well layer 21 included in the active layer 20 has a configuration in which the ridge line portion 22 having a larger band gap than the well layer 21 is connected. The well layer 21 and the ridge line portion 22 are simultaneously formed in one stacking step by adjusting the atmosphere, source gas, and formation temperature. It is a knowledge that the inventor of the present invention has uniquely found that the well layer 21 and the ridge line portion 22 can be simultaneously formed in one process by adjusting the atmosphere, the source gas, and the formation temperature.

<1. Preparation of Underlayer 40>
As shown in FIG. 6A, the buffer layer 45 and the base layer 40 are sequentially stacked on the growth substrate 50. As a reaction apparatus for forming the buffer layer 45 and the base layer 40, for example, an MOCVD apparatus can be used. Note that the formation of the buffer layer 45 and the base layer 40 may be omitted, and the n-side semiconductor rod 10 may be formed directly on the growth surface of the growth substrate 50. However, when the base layer 40 is omitted, it is necessary to separately provide an electrode for energizing the n-side semiconductor rod.
As the growth substrate 50, a sapphire substrate, a SiC substrate, a nitride semiconductor substrate, or the like can be used as will be described later. Here, an example using a sapphire (Al ₂ O ₃ ) substrate will be described. In the case of the sapphire growth substrate 50, the (0001) plane is preferably the growth plane. Here, the “(0001) plane” includes a plane slightly inclined with respect to the (0001) plane. Specifically, it is more preferable to use a plane having an off angle of 0.5 ° or more and 2.0 ° or less with respect to the (0001) plane as the growth plane.

Before forming the buffer layer 45 on the growth substrate 50, the growth substrate 50 is preferably pretreated as follows. First, the growth substrate 50 is heated in the reaction apparatus to remove impurities on the growth surface (upper surface 50a) (thermal cleaning). The heating temperature is set in the range of 900 to 1200 ° C., for example, and the heating time is in the range of 2 to 15 minutes, for example. Further, by this heat treatment, a crystallographic step appears on the upper surface 50a of the growth substrate 50, which becomes a generation site of a crystal nucleus.
Thereafter, NH ₃ gas is introduced into the reaction apparatus to nitride the upper surface 50 a of the growth substrate 50. The nitriding treatment can be performed, for example, at a processing temperature of 900 to 1100 ° C. and a processing time of 1 to 30 minutes. By such nitriding treatment, the surface of the nitride semiconductor grown thereon can be set to the (000-1) plane.

  A buffer layer 45 is grown on the upper surface 50a of the growth substrate 50 after the nitriding treatment. The temperature of the growth substrate 50 is set to 550 ° C., for example, and a source gas is supplied to grow the buffer layer 45 made of GaN. The thickness of the buffer layer 45 is about 20 nm, for example.

For example, amorphous GaN is formed as the buffer layer 45, and then heat treatment is performed as necessary. The heat treatment temperature is preferably 1000 ° C. or more, the heat treatment time is about several minutes to 1 hour, and the atmosphere during the heat treatment is preferably nitrogen gas or a mixed gas containing one or both of hydrogen gas and NH ₃ gas in addition to nitrogen gas.

  A base layer 40 is formed on the buffer layer 45. The underlayer 40 is, for example, a GaN layer. Further, it is preferable to add an n-type impurity to the base layer 40. For example, a GaN layer having n-type conductivity to which Si is added is formed as the base layer 40.

An insulating film 90 is formed on the upper surface 40 a of the foundation layer 40. The insulating film 90 is formed from an insulating member such as SiO ₂ or SiN. The insulating film 90 includes a plurality of through holes 90h penetrating in the thickness direction (z direction). The upper surface 40a of the foundation layer 40 is exposed from the through hole 90h. The through hole 90h can be formed by, for example, a photolithography technique. The through-hole 90h can have a shape such as a circle, an ellipse, or a polygon in a top view (viewed from the z direction). In particular, the circular through hole 90h is preferable because it is easy to form.

  The through holes 90h are preferably formed such that the shortest distance between adjacent through holes 90h is substantially constant, whereby the n-side semiconductor rods 10 that grow from the through holes 90h are spaced at substantially constant intervals. Can be arranged. Further, when the active layer 20 and the p-side semiconductor coating layer 30 are grown on the side surface of the n-side semiconductor rod 10, the distance between the adjacent n-side semiconductor rods 10 is the growth of the active layer 20 and the p-side semiconductor coating layer 30. May affect speed. When a plurality of n-side semiconductor rods 10 are arranged at a substantially constant interval, the growth rates of the active layer 20 and the p-side semiconductor coating layer 30 formed on the side surfaces 10c can be made substantially constant. . Taking these into account, for example, the through holes 90h are arranged in a regular triangular lattice shape in a top view. Moreover, it is preferable that the direction connecting the centers of the through holes 90h in the top view is the a-axis direction of sapphire. The a-axis direction of sapphire is the m-axis direction of the GaN-based crystal that constitutes the n-side semiconductor rod 10. In this way, when the through holes 90h are arranged in a regular triangular lattice so that the direction connecting the centers of the through holes 90h is the a-axis direction of sapphire, as shown in FIG. The n-side semiconductor rods 10 can be arranged in an equilateral triangular lattice so that the side surfaces 10c of the adjacent n-side semiconductor rods 10 are substantially parallel and face each other at equal intervals. When the regular hexagonal n-side semiconductor rod 10 is arranged in this way, the growth rate of the active layer 20 and the p-side semiconductor coating layer 30 grown on each side surface 10c of each n-side semiconductor rod 10 is made substantially constant. Each layer can be formed with high accuracy and a uniform thickness.

<2. Formation of n-side semiconductor rod 10>
Here, first, as shown in FIG. 6B, the n-type semiconductor rod body 11 is formed on the upper surface 40a of the foundation layer 40 exposed from the through hole 90h. When forming the n-type semiconductor rod body 11, the insulating film 90 functions as a mask, and the n-type semiconductor rod body 11 grown upward (z direction) from the through hole 90 h can be formed. At this time, when the nitrided surface of the sapphire growth substrate 50 is used as the growth surface, the growth direction of the GaN-based crystal to be grown is the [000-1] direction, so the growth direction of the n-type semiconductor rod body 11 is also the same. This is the [000-1] direction of the GaN-based crystal. That is, the direction (z direction) upward from the base layer 40 of the n-type semiconductor rod body 11 is the [000-1] direction of the GaN-based crystal.

  When the growth direction of the GaN-based semiconductor is set to the [000-1] direction, migration of the GaN-based semiconductor is suppressed and lateral growth is unlikely to occur. For this reason, the n-type semiconductor rod main body 11 grows upward (z direction) while maintaining the thickness that has started to grow in the through hole 90h of the insulating film 90. As a result, the n-type semiconductor rod body 11 having a relatively uniform thickness is obtained.

  When the n-type semiconductor rod body 11 is formed of a wurtzite (hexagonal) GaN-based crystal, the n-type semiconductor rod body 11 tends to grow in a hexagonal column shape. Therefore, even if the shape of the through hole 90h of the insulating film 90 is circular, the n-type semiconductor rod body 11 is not a columnar shape but a hexagonal columnar shape. At this time, the side surface of the n-type semiconductor rod body 11 is the M-plane of the GaN crystal. If the inner diameter of the through hole 90h is large, the thickness of the n-type semiconductor rod body 11 is increased accordingly. Therefore, the thickness of the n-type semiconductor rod main body 11 can be controlled by the inner diameter of the through hole 90h.

The n-type semiconductor rod body 11 is grown by supplying a source gas with the growth substrate 50 at a temperature of 900 to 1100 ° C., for example. The n-type semiconductor rod main body 11 is made of, for example, GaN crystal. In this case, as the source gas, a mixed gas containing TMG or TEG as a gallium source and NH ₃ as a nitrogen source can be used as in the case of the base layer 40. It is preferable to add an n-type impurity also to the n-type semiconductor rod main body 11. For example, silane gas is added to the above-described source gas, and a GaN crystal to which Si is added is grown as the n-type semiconductor rod main body 11. The length of the n-type semiconductor rod body 11 (dimension in the z direction) can be controlled by the supply time of the source gas. When the supply time of the source gas is set to 20 to 60 minutes, for example, the n-type semiconductor rod body 11 having a length of about 5 to 15 μm can be formed.

  By appropriately adjusting the formation conditions (growth temperature, flow rate of source gas, inner diameter of through-hole 90h, etc.) of the n-type semiconductor rod body 11, the n-type semiconductor rod body 11 having facets as shown in FIG. 3B. Can be formed.

  Next, as shown in FIG. 6C, a nitride semiconductor is grown from the upper surface of the n-type semiconductor rod main body 11 so as to include a p-type impurity, whereby, for example, the first semiconductor layer 12 made of a GaN-based crystal is formed. Form. At this time, when the n-type semiconductor rod body 11 is formed from a GaN-based crystal grown in the [000-1] direction, a GaN-based material containing p-type impurities growing from the upper surface of the n-type semiconductor rod body 11. The crystal growth direction is also the [000-1] direction. Therefore, the first semiconductor layer 12 having the same planar shape as viewed from above, that is, substantially the same planar shape in the xy plane, can be continuously grown on the n-type semiconductor rod body 11. Specifically, the n-type semiconductor rod body 11 is formed by growing a wurtzite (hexagonal) GaN-based crystal, and the upper surface thereof includes a wurtzite (hexagonal) containing p-type impurities. The first semiconductor layer 12 is formed by growing the GaN-based crystal. Thus, an integrated hexagonal rod including the n-type semiconductor rod body 11 and the first semiconductor layer 12 can be formed. Here, the integrated hexagonal rod means a hexagonal rod in which the side surface of the n-type semiconductor rod body 11 and the side surface of the first semiconductor layer 12 that follows the n-type semiconductor rod main body portion 11 are located on the same plane. Further, the side surface of the n-type semiconductor rod body 11 and the side surface of the first semiconductor layer 12 are both M-planes of GaN-based crystals.

When the first semiconductor layer 12 is formed, the growth substrate 50 is set to a temperature of 900 to 1100 ° C., for example, and is grown by supplying a source gas, like the n-type semiconductor rod main body 11. When the first semiconductor layer 12 is formed of, for example, a GaN crystal, TMG or TEG as a gallium source, NH ₃ as a nitrogen source, and Cp ₂ Mg (biscyclopentadienylmagnesium) for further adding a p-type impurity, for example. ) Can be used. The thickness (dimension in the z direction) of the first semiconductor layer 12 can be controlled by the supply time of the source gas. For example, supply time of source gas If the time is 0.3 to 3 minutes, the first semiconductor layer 12 having a thickness of about 0.1 to 1.0 μm can be formed.

  When the n-type semiconductor rod body 11 having the inclined surface as shown in FIG. 3B is formed, the formation conditions (growth temperature, flow rate of the source gas, the inner diameter of the through-hole 90h, etc.) are appropriately adjusted. A first semiconductor layer 12 having an inclined surface as shown in FIG. 3B can be formed.

  Next, as shown in FIG. 6D, a nitride semiconductor is grown from the upper surface of the first semiconductor layer 12 so as to reduce the content of n-type impurities and p-type impurities, thereby comprising, for example, a GaN-based crystal. The second semiconductor layer 13 is formed. At this time, like the first semiconductor layer 12, when the n-type semiconductor rod body 11 is formed of a GaN-based crystal grown in the [000-1] direction, GaN grown from the upper surface of the first semiconductor layer 12. The growth direction of the system crystal is also the [000-1] direction. Therefore, the second semiconductor layer 13 having the same planar shape as viewed from above, that is, the planar shape in the xy plane, can be continuously grown on the first semiconductor layer 12. Similar to the first semiconductor layer 12, the n-type semiconductor rod body 11 is formed by growing a wurtzite (hexagonal) GaN-based crystal, and the upper surface thereof includes a wurtzite (hexagonal) p-type impurity. The first semiconductor layer 12 is formed by growing a GaN-based crystal of the second system, and the second semiconductor is grown by growing a wurtzite-type (hexagonal) GaN-based crystal on the upper surface of the first semiconductor layer 12. When the layer 13 is formed, an integrated hexagonal rod including the n-type semiconductor rod main body 11, the first semiconductor layer 12, and the second semiconductor layer 13 can be formed. The side surface of the second semiconductor layer 13 is the M plane of the GaN-based crystal.

When forming the second semiconductor layer 13, the temperature of the growth substrate 50 is set to, for example, 900 to 1100 ° C. and is grown by supplying a source gas, like the n-type semiconductor rod body 11 and the first semiconductor layer 11. When the second semiconductor layer 13 is formed from, for example, a GaN crystal, a mixed gas can be used such as TMG or TEG as a gallium source and NH ₃ as a nitrogen source. When the second semiconductor layer 13 is grown, for example, the impurity gas is removed from the mixed gas in order to reduce n-type impurities and p-type impurities. The thickness (dimension in the z direction) of the second semiconductor layer 13 can be controlled by the supply time of the source gas. When the supply time of the source gas is set to 0.3 to 6 minutes, for example, the first semiconductor layer 12 having a thickness of about 0.1 to 2 μm can be formed.

  When the n-type semiconductor rod body 11 having the inclined surface as shown in FIG. 3B is formed, the formation conditions (growth temperature, flow rate of the source gas, the inner diameter of the through-hole 90h, etc.) are appropriately adjusted. A second semiconductor layer 13 having an inclined surface as shown in FIG. 3B can be formed.

  As described above, the integrated hexagonal column n-side semiconductor rod 10 including the n-type semiconductor rod body 11, the first semiconductor layer 12, and the second semiconductor layer 13 is formed.

<3. Formation of Active Layer 20>
As shown in FIG. 6E, the active layer 20 is formed on the outer surface of the n-side semiconductor rod 10.
For example, when the rod-like light emitting portion 5 emits blue light, the well layer 21 of the active layer 20 is nitrided containing In by supplying a source gas containing an In source gas with the temperature of the growth substrate 50 being about 800 to 900 ° C. It is formed by growing a physical semiconductor. As a source gas for growing a well layer containing In, a mixed gas containing TMG or TEG as a gallium source, NH ₃ as a nitrogen source, and TMI (trimethylindium) as an indium source can be used. Here, the ratio of the nitrogen element to the gallium element in the source gas is preferably 5.5 × 10 ^{3 to} 2.2 × 10 ⁵ . When the ratio of the nitrogen element to the gallium element is within this range, the InGaN film constituting the well layer 21 (see FIGS. 4 and 5) of the active layer 20 can be satisfactorily formed. When the ratio is less than the above range, In generated from the indium source becomes difficult to combine with Ga and N, and is easily deposited as In metal. When the ratio exceeds the above range, In produced from the indium source is easily eliminated by H produced from NH ₃ which is a nitrogen source, and InGaN is hardly formed.
The ratio of the nitrogen element to the gallium element is more preferably 2.2 × 10 ^{4 to} 2.2 × 10 ⁵ , and particularly preferably 4.4 × 10 ^{4 to} 1.1 × 10 ⁵ .

The mixed gas may contain H ₂ gas or N ₂ gas as a carrier gas. In the case of growing InGaN, it is preferable to use N ₂ gas as the carrier gas because it tends to be difficult to grow when the carrier gas is H ₂ gas.

  The above formation condition is that the portion formed on the side surface 10c of the n-side semiconductor rod 10 has a higher In composition ratio and becomes the well layer 21, and the portion formed on the ridge line 10r of the n-side semiconductor rod 10 has the In composition. The ratio is set so as to become the ridge line portion 22 with a reduced ratio. Specifically, the well layer 21 having a large In composition ratio and the ridge line portion 22 having a small In composition ratio can be formed by adjusting the ratio of the gallium element and the nitrogen element contained in the source gas. For example, suitable conditions can be found by changing one of these conditions to form the active layer 20 and confirming the In composition ratio of the obtained well layer 21 and the like.

  The reason why the In composition ratio of the ridge line portion 22 selectively decreases is not clear, but when InGaN formed on the side surface 10c of the n-side semiconductor rod 10 is compared with InGaN formed on the ridge line portion 22, In the case of the above-described formation conditions, the In content of InGaN on the ridge line portion 22 is smaller than the In content of InGaN formed on the side surface 10c, and In is selectively selected from InGaN on the ridge line portion 22. It seems that there is a tendency to leave. More specifically, it is considered that the ridge line portion 22 can be formed when the InGaN crystal grown on the ridge line 10r is unstable. That is, it is presumed that when an unstable InGaN crystal grows on the ridge line 10r, In having a relatively low binding energy is desorbed, and a ridge line portion 22 having a small In composition ratio is formed.

The well layer 21 and the ridge line portion 22 can be easily identified from a TEM (transmission electron microscope) image of a cross section (see FIGS. 4 and 5) of the rod-like light emitting portion 5. In the case of a TEM photograph of a bright field image, the well layer 21 having a high In composition ratio is dark gray or black, and the ridge line portion 22 having a low In composition ratio is light gray or white.
The width 22w of the ridge line portion 22 is 1 atom or more, and can be, for example, 2 nm or less. The width of the ridge line portion 22 refers to the shortest distance between the two well layers 21 sandwiching the ridge line portion 22.

  6E, a part of the side surface 10c of the n-side semiconductor rod 10 on the lower surface 10b side is covered with an insulating film 90. Therefore, the active layer 20 is not formed in that portion. In other words, only the outer surface of the n-side semiconductor rod 10 exposed above the insulating film 90 can be covered with the active layer 20.

<4. Formation of p-side semiconductor coating layer 30>
As shown in FIG. 6F, the p-side semiconductor coating layer 30 is formed on the outer surface of the active layer 20. When the n-side semiconductor rod 10 is formed from an n-type GaN-based crystal (n-type nitride semiconductor), the p-side semiconductor coating layer 30 is formed from a p-type GaN-based crystal (p-type nitride semiconductor). For example, the p-side semiconductor coating layer 30 is formed by stacking a plurality of p-type GaN layers or p-type AlGaN layers with different p-type impurity concentrations.
The p-side semiconductor coating layer 30 is formed by setting the temperature of the growth substrate 50 to, for example, 800 to 900 ° C. and supplying a source gas. As the source gas, a mixed gas containing TMG or TEG as a gallium source and NH ₃ as a nitrogen source can be used. Further, in order to add a p-type impurity, for example, Cp ₂ Mg (biscyclopentadienyl magnesium) is added to these source gases, and a GaN layer to which Mg is added is formed as the p-side semiconductor coating layer 30. When the supply time of the source gas is set to 20 to 60 minutes, for example, the p-side semiconductor coating layer 30 having a thickness of about 40 to 120 nm can be formed.
By forming the p-side semiconductor coating layer 30, the rod-shaped light emitting portion 5 is obtained.

<5. Formation of Translucent Electrode 81>
As shown in FIG. 6G, the first light-transmissive electrode 81 is formed so as to continuously cover the outer surface of the p-side semiconductor coating layer 30 of the rod-shaped light emitting unit 5 and the upper surface 90a of the insulating film 90.
Then, for example, the seven rod-shaped light-emitting portions 5 at the center of the eleven rod-shaped light-emitting portions 5 depicted in FIG. The light emitting unit 5 is deleted. In this manner, a part of the first translucent electrode 81 and a part of the plurality of rod-shaped light emitting portions 5 are removed, and a part of the base layer 40 is exposed from the insulating film 90. The portions exposed from the insulating film 90 are referred to as a first exposed portion 40x and a second exposed portion 40y. An electrode for energizing the n-side semiconductor rod 10 is formed on the first exposed portion 40x. On the upper side of the second exposed portion 40y, an electrode for energizing the p-side semiconductor coating layer 30 is formed via the insulating film 91. Each electrode will be described in detail later.
As described above, when the first exposed portion 40x and the second exposed portion 40y are formed after the first light-transmissive electrode 81 is formed, the etching for forming the first exposed portion 40x and the second exposed portion 40y is performed. It is possible to protect the rod-shaped light emitting portion 5 from the stripping solution for stripping the mask. That is, since the rod-shaped light emitting unit 5 is covered with the first light-transmissive electrode 81, the stripping solution is difficult to contact the rod-shaped light emitting unit 5. Therefore, possibility that the required rod-shaped light emission part 5 will be removed can be reduced.

In the region where the first exposed portion 40x and the second exposed portion 40y are formed, the rod-shaped light emitting portion 5 may not be grown in advance, that is, the through hole 90h of the insulating film 90 may not be formed. On the other hand, the formation positions of the first exposed portion 40x and the second exposed portion 40y are not set in advance, and the first and second exposed portions 40x and 40y of the first exposed portion 40x and the second exposed portion 40y are confirmed after confirming the quality of the formed rod-like light emitting portion 5. The formation position may be determined. Thereby, the 1st exposed part 40x and the 2nd exposed part 40y can be formed in the position with the defective rod-shaped light emission part 5 with insufficient growth.
The translucent electrode 81 can be formed from a translucent conductive film such as an ITO film, for example.

<6. Formation of Insulating Film 91>
As shown in FIG. 6I, a part of the first translucent electrode 81, a part of the first exposed portion 40x of the underlayer 40 (a part where the n-side translucent electrode 71 is not formed), the underlayer An insulating film 91 is formed so as to cover the entire 40 second exposed portion 40y.
The insulating film 91 is formed from an insulating member such as SiO ₂ or SiN. Since SiO ₂ has translucency, there is an advantage that light emitted from the rod-shaped light emitting portion 5 can be extracted through the insulating film 91.

<7. Formation of Translucent Electrodes 71 and 82 and Pad Electrodes 70 and 80>
As shown in FIG. 6J, an n-side translucent electrode 71 and a second translucent electrode 82 are formed. The n-side translucent electrode 71 is formed on the first exposed portion 40 x of the foundation layer 40. The second translucent electrode 82 is in contact with the first translucent electrode 81 and extends to the upper side of the second exposed portion 40 y of the foundation layer 40. By disposing the insulating film 91 between the second translucent electrode 82 and the second exposed portion 40y of the base layer 40, they are prevented from being short-circuited.
Next, the n-side pad electrode 70 is formed on the n-side translucent electrode 71. In addition, the p-side pad electrode 80 is formed on the second translucent electrode 82 immediately above the second exposed portion 40 y of the foundation layer 40.

The p-side pad electrode 80 and the rod-like light emitting unit 5 are electrically connected via the second light-transmissive electrode 82 and the first light-transmissive electrode 81. The n-side pad electrode 70 and the rod-like light emitting portion 5 are electrically connected via the n-side translucent electrode 71 and the base layer 40.
In the p-side current path, the first translucent electrode 81 is in contact with the p-side semiconductor coating layer 30 of the plurality of rod-shaped light-emitting portions 5, and in the n-side current path, the base layer 40 is in the form of a plurality of rods. It is in contact with the n-side semiconductor rod 10 of the light emitting unit 5. That is, the several rod-shaped light emission part 5 is connected in parallel.

  Next, each configuration of the light-emitting element 1 of the present disclosure will be described. The light emitting element 1 of the present disclosure is a so-called semiconductor light emitting element, and includes, for example, a light emitting diode (LED) and a laser diode (LD).

(Rod-shaped light emitting part 5)
The rod-shaped light emitting portion 5 has a polygonal columnar outer shape or a polygonal columnar outer shape having a facet at the upper end.
The rod-shaped light emitting portion 5 can be formed from a semiconductor material such as a III-V group compound semiconductor or a II-VI group compound semiconductor, for example. _{Specifically, In X Al Y Ga 1-} X-Y N (0 ≦ X, 0 ≦ Y, X + Y ≦ 1) nitrides such as semiconductor (e.g. InN, AlN, GaN, InGaN, AlGaN, InGaAlN and the like) Can be used.
A semiconductor suitable for each configuration (the n-side semiconductor rod 10, the active layer 20, and the p-side semiconductor coating layer 30) of the rod-shaped light emitting unit 5 will be described in detail.

In the n-side semiconductor rod 10, the n-type semiconductor rod body 11 includes an n-type semiconductor. Examples of semiconductors suitable for the n-type semiconductor rod body 11 include GaN and AlGaN. Si, Ge, O, or the like may be added as an n-type impurity. The n-side semiconductor rod 10 may be composed of only the first conductivity type semiconductor.
The first semiconductor layer 12 is made of a semiconductor containing a p-type impurity. Examples of suitable semiconductors for the first semiconductor layer 12 include GaN and AlGaN. As the p-type impurity, Mg, Zn, C, Zn, Be, Mn, Ca, Sr, or the like can be added.
The second semiconductor layer 13 is composed of a semiconductor with a small amount of n-type impurities and p-type impurities added. Examples of suitable semiconductors for the second semiconductor layer 13 include GaN and AlGaN.
As described above, the n-type semiconductor rod body 11, the first semiconductor layer 12, and the second semiconductor layer 13 may be composed of semiconductors having the same composition, or may be composed of semiconductors having different compositions.
For example,
(1) The n-type semiconductor rod body 11, the first semiconductor layer 12, and the second semiconductor layer 13 are made of GaN.
(2) The n-type semiconductor rod body 11, the first semiconductor layer 12, and the second semiconductor layer 13 are made of AlGaN.
(3) The n-type semiconductor rod body 11 is made of GaN, and the first semiconductor layer 12 and the second semiconductor layer 13 are made of AlGaN.
(4) The n-type semiconductor rod body 11 is made of GaN, the first semiconductor layer 12 is made of AlGaN, and the second semiconductor layer 13 is made of GaN.
Various combinations are possible.

The active layer 20 includes a ridge line portion 22 having a large band gap and a well layer 21 having a small band gap. A semiconductor suitable for the well layer 21 is In _x Ga _1-x N. Examples of the semiconductor suitable for the ridge portion 22 include GaN and In _y Ga _1-y N. When the well layer 21 and the ridge line portion 22 are both made of InGaN, the In composition ratio of the well layer 21 is made larger than the In composition ratio of the ridge line portion 22 (that is, x> y).
The p-side semiconductor coating layer 30 includes a second conductivity type semiconductor (for example, a p-type semiconductor). An example of a semiconductor suitable for the p-side semiconductor coating layer 30 is GaN containing a p-type impurity such as Mg. The p-side semiconductor coating layer 30 may have a stacked structure including a layer made of a p-type semiconductor containing a p-type impurity and an undoped layer. In addition, between the upper surface of the p-side semiconductor coating layer 30 and the first translucent electrode 81, for example, an i-type third semiconductor having an impurity concentration lower than that of the n-type semiconductor rod body 11 and the first semiconductor layer 12. A layer may be formed. Thereby, the reverse leakage current in the vicinity of the upper surface of the n-type semiconductor rod body 11 can be further suppressed, and the light emission efficiency of the light emitting element can be increased.

(Translucent electrodes 71, 81, 82)
The n-side translucent electrode 71, the first translucent electrode 81, and the second translucent electrode 82 can be formed of a translucent conductive material, and a conductive oxide is particularly preferable. Examples of the conductive oxide include ZnO, In ₂ O ₃ , ITO, SnO ₂ , and MgO. In particular, ITO is preferable because it is a material having high light transmittance in visible light (visible region) and high conductivity.

As the p-side translucent electrode, it is preferable to provide two layers of the first translucent electrode 81 and the second translucent electrode 82 as described above. The p-side translucent electrode may be a single layer. In this case, since the p-side translucent electrode is provided after the insulating film 91 is formed, the rod-shaped light emission covered with the insulating film 91 is provided. The portion 5 cannot be energized, and the light emission area is reduced. Moreover, if the formation area of the insulating film 91 is reduced so as not to cover the rod-shaped light emitting portion 5, the possibility that the p-side electrode and the base layer 40 are short-circuited increases. With the two-layer structure of the first light-transmissive electrode 81 and the second light-transmissive electrode 82, the insulating film 91 can be formed on the rod-shaped light emitting portion 5 to such an extent that the possibility of a short circuit is low. In addition, the rod-shaped light emitting portion 5 under the insulating film 91 can be energized. It should be noted that the light transmittance is reduced in the portion where the second light-transmissive electrode 82 overlaps the portion where only the first light-transmissive electrode 81 is provided. Therefore, the surface area of the portion where the first light transmitting electrode 81 is exposed from the second light transmitting electrode 82 is made larger than the surface area of the portion where the first light transmitting electrode 81 and the second light transmitting electrode 82 overlap. It is preferable. Thereby, the light extraction efficiency of the rod-shaped light-emitting portion 5 can be improved.
Note that the n-side translucent electrode 71 may be omitted. In this case, the n-side pad electrode 70 is formed directly on the foundation layer 40.

(Growth substrate 50)
As the growth substrate 50 for growing a nitride semiconductor, typically, an insulating substrate such as sapphire (A1 ₂ O ₃ ) is used. A nitride semiconductor (GaN, AlN, etc.) can also be used.
In particular, a sapphire growth substrate having a C plane, that is, a (0001) plane as a growth plane is preferable. The growth surface preferably has an off angle of 0.5 ° to 2.0 ° with respect to the (0001) plane, rather than exactly the (0001) plane. By nitriding such a surface, a GaN-based semiconductor can be grown in the [000-1] direction.

(Insulating films 90 and 91)
The insulating films 90 and 91 can be formed from, for example, silicon dioxide (SiO ₂ ) or SiN.

(Pad electrodes 70, 80)
As the n-side pad electrode 70 and the p-side pad electrode 80, a good electrical conductor can be used. For example, a metal such as Cu, Au, Ag, Ni, or Sn is suitable. When the pad electrodes 70 and 80 are formed on the translucent electrodes 71 and 81, it is preferable to form the pad electrodes 70 and 80 from a conductive material capable of making ohmic contact with the translucent electrode. Note that the p-side pad electrode 80 may be provided directly on the rod-shaped light emitting unit 5, and in that case, the p-side translucent electrode may be only one layer (only the first translucent electrode 81). . Preferably, the p-side pad electrode 80 is not directly provided on the rod-shaped light-emitting portion 5, but a region where the rod-shaped light-emitting portion 5 does not exist is provided and the p-side pad electrode 80 is formed in that region as shown in FIG. To do. Thereby, since the light from the rod-shaped light emission part 5 can be extracted outside without being blocked by the p-side pad electrode 80, the light extraction efficiency of the light emitting element 1 can be improved.

(Example)
The n-side semiconductor rod 10 and the active layer 20 according to the present disclosure were manufactured. The active layer 20 has a multiple quantum well structure (MQW), and each semiconductor layer is formed by MOCVD.

First, a sapphire substrate having a surface that is offset by about 1 ° from the (0001) surface as a growth surface was prepared as a growth substrate 50. The upper surface 50a of the growth substrate 50 is nitrided so that the upper surface of the nitride semiconductor grown thereon (a surface parallel to the upper surface 50a of the growth substrate 50) becomes the (000-1) plane. Then, an SiO ₂ insulating film 90 (thickness: about 0.3 μm) having a plurality of through holes 90 h having a circular opening shape with a diameter of 2 μm was formed on the growth substrate 50 by photolithography.
Next, a GaN buffer layer 45 (thickness of about 20 nm) was formed on the growth substrate 50 on which the insulating film 90 was formed, and then heat treatment was performed. Here, since the base layer 40 was not provided, the buffer layer 45 was formed after the insulating film 90 was formed in this way.

Next, GaN was grown on the n-type semiconductor rod body 11, the first semiconductor layer 12, and the second semiconductor layer 13 each made of GaN, thereby forming the n-side semiconductor rod 10 made of GaN. . The formed n-side semiconductor rod 10 is a substantially hexagonal columnar rod having a thickness of about 3 μm and a length of about 8 μm.
In the n-side semiconductor rod 10 of the embodiment, the length of the n-type semiconductor rod body 11 is about 7 μm, and the thickness of the first semiconductor layer 12 and the thickness of the second semiconductor layer 13 are both about 0.5 μm. The length of the entire n-side semiconductor rod 10 is about 8 μm.

[Formation conditions for n-side semiconductor rod 10]
-Substrate temperature: 1045 ° C
・ Production time: 40 minutes ・ Atmospheric gas: Mixed atmosphere of hydrogen and nitrogen ・ Carrier gas: Nitrogen 11 slm
NH ₃ : 50 sccm (about 2 × 10 ⁻³ mol / min)
TMG: 20 sccm (about 65 × 10 ⁻⁶ mol / min)

In the example, the n-side semiconductor rod 10 was formed by continuously growing the n-type semiconductor rod body 11, the first semiconductor layer 12, and the second semiconductor layer 13. Specifically, the n-type semiconductor rod body 11 is grown by adding SiH ₄ gas for n-type impurities at a rate of 4.4 sccm (about 2.0 nmol / min) to the above-mentioned source gas. At the time when the long rod (n-type semiconductor rod body 11) is formed, the SiH ₄ gas for n-type impurities is stopped and Cp ₂ Mg gas for p-type impurities is 29 sccm (about 40 μmol / min). When the thickness of the semiconductor film (first semiconductor layer 12) formed on the upper surface of the rod (n-type semiconductor rod main body portion 11) reaches about 0.5 μm, the growth for the np-type impurity is continued. The Cp ₂ Mg gas was stopped and GaN was grown to a thickness of 0.5 μm without containing the impurity gas source gas to form a semiconductor film (second semiconductor layer 13).
As described above, the integrated hexagonal columnar n-side semiconductor rod 10 was formed.

  After forming the n-side semiconductor rod 10, the formation conditions were changed as follows to form the active layer 20. In addition, the active layer 20 produced the barrier layer 25 and the layer (Hereinafter, it is called a "mixed layer.") Containing the well layer 21 and the ridgeline part 22 from the n side semiconductor rod 10 side alternately. After 6 barrier layers 25 and 6 mixed layers were formed, another barrier layer 25 was finally formed. The formation conditions of the barrier layer 25 and the mixed layer were as follows. The formation condition of the barrier layer 25 is that of GaN, and the formation condition of the mixed layer is that of InGaN.

[Conditions for Forming Barrier Layer 25]
-Substrate temperature: 810 ° C
・ Atmosphere gas: Nitrogen ・ Carrier gas: Nitrogen 8 slm
NH ₃ : 4 slm (about 2 × 10 ⁻¹ mol / min)
TEG: 16 sccm (about 4 × 10 ⁻⁶ mol / min)

The barrier layer 25 made of GaN was doped with Si only in the first layer (the layer in contact with the n-side semiconductor rod 10). In forming the first layer, SiH ₄ gas was added at 8 × 10 ⁻⁹ mol / min as a Si dopant source in addition to the above-described source gas.
The formation time of the barrier layer 25 was about 9 minutes (about 10 nm thickness) for the first layer, and 4 minutes (about 4 to 10 nm thickness) for the second to seventh layers.

[Formation conditions of mixed layer (well layer 21, ridge portion 22)]
-Substrate temperature: 810 ° C
・ Atmosphere gas: Nitrogen ・ Carrier gas: Nitrogen 8 slm
NH ₃ : 4 slm (about 2 × 10 ⁻¹ mol / min)
TEG: 16 sccm (about 4 × 10 ⁻⁶ mol / min)
TMI: 142 sccm (about 12 × 10 ⁻⁶ mol / min)

The formation time of the mixed layer was 4 minutes (about 4 to 10 nm in thickness) in each of the first to sixth layers. Although the growth times of the second to seventh layers of the barrier layer 25 and the mixed layer are the same, there is a difference in growth rate in the length direction of the n-side semiconductor rod 10, so that it is shown in a TEM image to be described later. Thus, the thickness of the barrier layer 25 and the mixed layer is not necessarily the same.

After forming the active layer 20, the temperature of the growth substrate 50 was set to 760 ° C., and the p-side semiconductor coating layer 30 was formed using NH ₃ , TEG, and Cp ₂ Mg.

After the p-side semiconductor coating layer 30 was formed, the first translucent electrode 81 was formed as follows.
[Formation conditions of the first translucent electrode 81]
・ Material: ITO
・ Film thickness: 1700mm

After forming the first translucent electrode 81, the insulating film 91 was formed as follows.
[Formation conditions of insulating film 91]
-Material: SiO ₂
・ Thickness: 3500mm

After forming the insulating film 91, the n-side translucent electrode 71, the second translucent electrode 82, and the pad electrodes 70 and 80 were formed.
[Formation conditions of the n-side translucent electrode 71 and the second translucent electrode 82]
・ Material: ITO
・ Film thickness: 1700mm

[Formation conditions for n-side pad electrode 70]
・ Material: Ti / Au laminated from the lower layer side

[Formation conditions of p-side pad electrode 80]
・ Material: Ti / Au laminated from the lower layer side

(Comparative example)
In the example, a light emitting device of a comparative example was fabricated in the same manner as in the example except that the n-side semiconductor rod was constituted by the n-type semiconductor rod main body 11 and the semiconductor layer corresponding to the second semiconductor layer 13. In other words, in the light emitting device of the comparative example, the n-side semiconductor rod was constituted by the n-type semiconductor rod body 11 and the semiconductor layer corresponding to the second semiconductor layer 13 without forming the first semiconductor layer 12.
In the n-side semiconductor rod 10 of the comparative example, the length of the n-type semiconductor rod body 11 is about 7 μm, the thickness of the semiconductor layer corresponding to the second semiconductor layer 13 is about 1 μm, and the entire n-side semiconductor rod The length of is about 8 μm.

In the light-emitting element of the comparative example, the n-side semiconductor rod is stopped when the n-type impurity SiH ₄ gas is stopped when the n-type semiconductor rod body having a length of about 7 μm is formed under the same conditions as in the example. A semiconductor film (second semiconductor layer 13) was grown by further growing GaN to a thickness of 1 μm without containing a source gas for impurity gas.

When the light emitting element of the example manufactured as described above and the light emitting element of the comparative example were caused to emit light, the light emitting element of the example was brighter than the light emitting element of the comparative example.
Further, it was confirmed that the reverse leakage current rises at a low voltage in the light emitting element of the comparative example, whereas the voltage at which the reverse leakage current rises in the light emitting element of the example is much higher than that of the comparative example.

DESCRIPTION OF SYMBOLS 1 Light emitting element 5, 6 Rod-shaped light emission part 10, 16 N side semiconductor rod 10c, 16c Side surface of a semiconductor rod 11 N type semiconductor rod main-body part 12 1st semiconductor layer 13 2nd semiconductor layer 20, 26 Active layer 21 Well layer 22 Ridge part 25 Barrier layer 30, 36 p-side semiconductor coating layer (semiconductor layer)
40 Underlayer 45 Buffer layer 50 Growth substrate 90, 91 Insulating film 90h Through hole

Claims (10)

an n-side semiconductor rod;
An active layer made of a semiconductor covering the n-side semiconductor rod;
A p-side semiconductor coating layer covering the active layer,
The n-side semiconductor rod includes an n-type semiconductor rod main body portion including an n-type impurity, a first semiconductor layer including a p-type impurity provided on an upper surface of the n-type semiconductor rod main body portion, And a second semiconductor layer having a p-type impurity concentration lower than that of the first semiconductor layer. In the n-side semiconductor rod, the thickness t _i of the thickness t _p and the second semiconductor layer of the first semiconductor layer has a respective 0.1μm or more, the the thickness t _p of the first semiconductor layer a 2. The light-emitting element according to claim 1, wherein a thickness t _total of the two semiconductor layers combined with the thickness t _i is 0.1 μm or more and 2 μm or less. The n-side semiconductor rod has a polygonal column shape having a plurality of side surfaces,
The active layer includes a plurality of well layers respectively disposed on at least two adjacent sides of the plurality of side surfaces,
The adjacent well layers among the plurality of well layers are separated along a ridge line where the adjacent side surfaces are in contact with each other,
The active layer is made of a semiconductor, and further includes a ridge line portion arranged on the ridge line and connecting the adjacent well layers,
The light emitting device according to claim 1, wherein a band gap of the ridge line portion is wider than a band gap of each of the plurality of well layers. The plurality of well layers are respectively disposed on all side surfaces of the n-side semiconductor rod,
4. The light emitting device according to claim 3, wherein adjacent well layers among the plurality of well layers are all connected by the ridge line portion. 5.   5. The light emitting device according to claim 3, wherein a plurality of the well layers are stacked via a barrier layer in a direction perpendicular to a side surface of the n-side semiconductor rod. In the n-side semiconductor rod,
The n-type semiconductor rod main body includes a wurtzite crystal n-type nitride semiconductor,
The first semiconductor layer includes a p-type nitride semiconductor,
The second semiconductor layer includes an i-type nitride semiconductor,
The p-side semiconductor coating layer includes a p-type nitride semiconductor;
6. The light emitting device according to claim 1, wherein a side surface of the n-type semiconductor rod main body is an M-plane of the wurtzite crystal.   The light emitting device according to claim 6, wherein the n-type semiconductor rod body is made of a GaN crystal.   The light emitting device according to claim 7, wherein the first semiconductor layer is made of a GaN crystal, and the second semiconductor layer is made of a GaN crystal.   9. The light emitting device according to claim 7, wherein an axis of the n-type semiconductor rod main body is parallel to a [000-1] direction of the GaN crystal.   The light emitting device according to claim 1, wherein the second semiconductor layer is an undoped layer.

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