JP2018189370A - Voltage detection circuit and power storage system - Google Patents

Voltage detection circuit and power storage system Download PDF

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JP2018189370A
JP2018189370A JP2015194129A JP2015194129A JP2018189370A JP 2018189370 A JP2018189370 A JP 2018189370A JP 2015194129 A JP2015194129 A JP 2015194129A JP 2015194129 A JP2015194129 A JP 2015194129A JP 2018189370 A JP2018189370 A JP 2018189370A
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voltage
voltage measurement
detection circuit
voltage detection
capacitor
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鷹尾 宏
Hiroshi Takao
宏 鷹尾
憲作 福本
Kensaku Fukumoto
憲作 福本
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Panasonic Intellectual Property Management Co Ltd
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Priority to PCT/JP2016/004097 priority patent/WO2017056409A1/en
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/50Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/36Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01MPROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00Secondary cells; Manufacture thereof
    • H01M10/42Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/48Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/02Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries for charging batteries from ac mains by converters
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/10Energy storage using batteries

Abstract

PROBLEM TO BE SOLVED: To detect earlier a break of a voltage measurement line between a plurality cells connected in series and a voltage detection circuit.SOLUTION: A voltage detection circuit (11) is connected to each node between a plurality of series-connected storage cells (B1 to B5) via a plurality of voltage measurement lines (L0 to L5), and detect the voltage between adjacent voltage measurement lines and detects the voltage of each storage cell (B1 to B5). Between adjacent voltage measurement lines of the plurality of voltage measurement lines (L0 to L5), capacitors (C1 to C5) are connected in parallel to respective storage cells (B1 to B5). Impedance elements (R1u, R3u, R5u) are connected in parallel to the capacitors (C1, C3, C5) every other capacitor among the plurality of capacitors (C1 to C5).SELECTED DRAWING: Figure 2

Description

本発明は、電圧検出回路および蓄電システムに関する。   The present invention relates to a voltage detection circuit and a power storage system.

近年、車載用途や、バックアップやピークシフト用途に、リチウムイオン電池を用いた蓄電システムが普及してきている。リチウムイオン電池は常用領域と使用禁止領域が近接しているため、他の種類の電池より厳格な電圧管理が必要である。複数のリチウムイオン電池セルが直列に接続された組電池を使用する場合、各電池セルの電圧を検出するための電圧検出回路が設けられる(例えば、特許文献1参照)。   In recent years, power storage systems using lithium ion batteries have become widespread for in-vehicle use, backup and peak shift applications. Lithium-ion batteries require close strict voltage management than other types of batteries because the regular use area and the use prohibition area are close to each other. When using an assembled battery in which a plurality of lithium ion battery cells are connected in series, a voltage detection circuit for detecting the voltage of each battery cell is provided (see, for example, Patent Document 1).

直列接続された複数の電池セル間の各ノードと電圧検出回路は、それぞれ電圧計測線で接続され、電圧検出回路は各電池セル間の両端電圧を検出する。各電圧計測線の検出電位を安定化させるため、複数の電圧計測線において隣接する2本の電圧計測線間にコンデンサを接続する構成が一般的である。   Each node between a plurality of battery cells connected in series and the voltage detection circuit are connected by a voltage measurement line, respectively, and the voltage detection circuit detects a voltage across each battery cell. In order to stabilize the detection potential of each voltage measurement line, a configuration in which a capacitor is connected between two adjacent voltage measurement lines in a plurality of voltage measurement lines is common.

この構成において、ある電圧計測線が断線した場合でも当該電圧計測線の電位は、異常レベルまで直ぐには低下しない。即ち、断線した電圧計測線の電位は断線直後、上側に隣接する電圧計測線との間のコンデンサと、下側に隣接する電圧計測線との間のコンデンサにより、上側に隣接する電圧計測線と下側に隣接する電圧計測線間の電圧の中点電位付近で維持される。その後、両コンデンサに溜まった電荷が抜けるにつれ、断線した電圧計測線の電位が低下していく。   In this configuration, even when a certain voltage measurement line is disconnected, the potential of the voltage measurement line does not immediately decrease to an abnormal level. That is, immediately after the disconnection, the potential of the disconnected voltage measurement line is changed between the voltage measurement line adjacent to the upper side by the capacitor between the voltage measurement line adjacent to the upper side and the capacitor between the voltage measurement line adjacent to the lower side. It is maintained near the midpoint potential of the voltage between the voltage measurement lines adjacent to the lower side. Thereafter, as the electric charge accumulated in both capacitors is released, the potential of the disconnected voltage measurement line is lowered.

特開2014−149161号公報JP 2014-149161 A

上述したように電圧計測線が断線してから、電圧検出回路が断線を検出するまでにタイムラグが発生する。この期間中、断線した電圧計測線に接続された電池セルに過充電や過放電が発生しても電圧検出回路で検出できない状態で、電池が運用されることになる。   As described above, a time lag occurs after the voltage measurement line is disconnected until the voltage detection circuit detects the disconnection. During this period, the battery is operated in a state where the battery cell connected to the disconnected voltage measurement line cannot be detected by the voltage detection circuit even if overcharge or overdischarge occurs.

本発明はこうした状況に鑑みなされたものであり、その目的は、直列接続された複数のセルと電圧検出回路間の電圧計測線の断線をより早期に検出する技術を提供することにある。   The present invention has been made in view of such a situation, and an object of the present invention is to provide a technique for detecting earlier disconnection of a voltage measurement line between a plurality of cells connected in series and a voltage detection circuit.

上記課題を解決するために、本発明のある態様の電圧検出回路は、直列接続された複数の蓄電セル間の各ノードと複数の電圧計測線で接続され、隣接する電圧計測線間の電圧を検出して各蓄電セルの電圧を検出する電圧検出回路であって、前記複数の電圧計測線の隣接する電圧計測線間にそれぞれ蓄電セルと並列にコンデンサが接続されており、前記電圧検出回路は、前記複数のコンデンサの内、1つおきにコンデンサと並列に接続されるインピーダンス素子を備える。   In order to solve the above problems, a voltage detection circuit according to an aspect of the present invention is connected to each node between a plurality of storage cells connected in series with a plurality of voltage measurement lines, and detects a voltage between adjacent voltage measurement lines. A voltage detection circuit that detects and detects the voltage of each storage cell, wherein a capacitor is connected in parallel with each storage cell between adjacent voltage measurement lines of the plurality of voltage measurement lines, and the voltage detection circuit , And every other capacitor is provided with an impedance element connected in parallel with the capacitor.

なお、以上の構成要素の任意の組み合わせ、本発明の表現を方法、装置、システムなどの間で変換したものもまた、本発明の態様として有効である。   It should be noted that any combination of the above-described constituent elements and a representation of the present invention converted between a method, an apparatus, a system, and the like are also effective as an aspect of the present invention.

本発明によれば、直列接続された複数のセルと電圧検出回路間の電圧計測線の断線をより早期に検出することができる。   According to the present invention, disconnection of the voltage measurement line between the plurality of cells connected in series and the voltage detection circuit can be detected earlier.

比較例1に係る蓄電システムを説明するための図である。It is a figure for demonstrating the electrical storage system which concerns on the comparative example 1. FIG. 本発明の実施の形態1に係る蓄電システムを説明するための図である。It is a figure for demonstrating the electrical storage system which concerns on Embodiment 1 of this invention. 比較例2に係る蓄電システムを説明するための図である。6 is a diagram for explaining a power storage system according to Comparative Example 2. FIG. 本発明の実施の形態2に係る蓄電システムを説明するための図である。It is a figure for demonstrating the electrical storage system which concerns on Embodiment 2 of this invention. 比較例3に係る蓄電システムを説明するための図である。10 is a diagram for explaining a power storage system according to Comparative Example 3. FIG. 本発明の実施の形態3に係る蓄電システムを説明するための図である。It is a figure for demonstrating the electrical storage system which concerns on Embodiment 3 of this invention. 変形例に係る蓄電システムを説明するための図である。It is a figure for demonstrating the electrical storage system which concerns on a modification.

図1は、比較例1に係る蓄電システム1を説明するための図である。蓄電システム1は、組電池20及び電池管理装置10を備え、組電池20は負荷2に電力を供給する。車載用途の場合、負荷2はモータであり、減速時にはモータで発電された回生エネルギーが組電池20に充電される。   FIG. 1 is a diagram for explaining a power storage system 1 according to Comparative Example 1. The power storage system 1 includes an assembled battery 20 and a battery management device 10, and the assembled battery 20 supplies power to the load 2. In the case of in-vehicle use, the load 2 is a motor, and regenerative energy generated by the motor is charged to the assembled battery 20 during deceleration.

組電池20は直列接続された複数の電池セルB1〜B5で構成される。比較例1では5つの電池セルB1〜B5が直列接続されて構成される組電池20を想定する。また電池の種別としてリチウムイオン電池を想定する。   The assembled battery 20 includes a plurality of battery cells B1 to B5 connected in series. In Comparative Example 1, an assembled battery 20 is assumed in which five battery cells B1 to B5 are connected in series. Further, a lithium ion battery is assumed as the type of battery.

電池管理装置10は、電圧検出回路11および制御回路12を備える。電圧検出回路11は、直列接続された複数の電池セルB1〜B5間の各ノードと複数の電圧計測線L0〜L5で接続され、隣接する電圧計測線間の電圧を検出して各電池セルB1〜B5の電圧を検出する。電圧検出回路11は例えば、専用のカスタムICであるASIC(Application Specific Integrated Circuit)により構成される。   The battery management device 10 includes a voltage detection circuit 11 and a control circuit 12. The voltage detection circuit 11 is connected to each node between a plurality of battery cells B1 to B5 connected in series and a plurality of voltage measurement lines L0 to L5, and detects a voltage between adjacent voltage measurement lines to detect each battery cell B1. The voltage of ~ B5 is detected. The voltage detection circuit 11 is configured by, for example, an ASIC (Application Specific Integrated Circuit) that is a dedicated custom IC.

複数の電圧計測線L0〜L5には、それぞれ抵抗R0〜R5が挿入される。複数の電圧計測線L0〜L5の隣接する2本の電圧計測線間に放電回路が接続される。各放電回路は、放電スイッチS1d〜S5dと放電抵抗R1d〜R5dの直列回路で構成される。放電回路は主に、複数の電池セルB1〜B5の均等化制御に使用される。   Resistors R0 to R5 are inserted into the plurality of voltage measurement lines L0 to L5, respectively. A discharge circuit is connected between two adjacent voltage measurement lines of the plurality of voltage measurement lines L0 to L5. Each discharge circuit includes a series circuit of discharge switches S1d to S5d and discharge resistors R1d to R5d. The discharge circuit is mainly used for equalization control of the plurality of battery cells B1 to B5.

複数の電圧計測線L0〜L5の隣接する2本の電圧計測線間に複数の電池セルB1〜B5と並列に、それぞれコンデンサC1〜C5が接続される。コンデンサC1〜C5は、複数の電圧計測線L0〜L5の各電位を安定化させる作用を担う。   Capacitors C1 to C5 are connected in parallel with the plurality of battery cells B1 to B5 between two adjacent voltage measurement lines of the plurality of voltage measurement lines L0 to L5, respectively. Capacitors C1 to C5 are responsible for stabilizing each potential of the plurality of voltage measurement lines L0 to L5.

電池管理装置10は、複数の電圧計測線L0〜L5にそれぞれ制御される複数の経路選択スイッチS0〜S5と、A/D変換器111を含む。複数の経路選択スイッチS0〜S5は任意の2本の電圧計測線を選択して、当該2本の電圧計測線の電位をA/D変換器111に入力する。A/D変換器111は、入力される2つの電位の電位差をデジタル値に変換して制御回路12に出力する。   The battery management device 10 includes a plurality of path selection switches S0 to S5 controlled by the plurality of voltage measurement lines L0 to L5, respectively, and an A / D converter 111. The plurality of path selection switches S <b> 0 to S <b> 5 select any two voltage measurement lines, and input the potentials of the two voltage measurement lines to the A / D converter 111. The A / D converter 111 converts a potential difference between two input potentials into a digital value and outputs the digital value to the control circuit 12.

この構成例は、複数の電池セルB1〜B5の電圧を時分割に計測する例である。例えば、最初に第0電圧計測線L0及び第1電圧計測線L1を選択して第1電池セルB1の電圧を計測し、次に第1電圧計測線L1及び第2電圧計測線L2を選択して第2電池セルB2の電圧を計測し、・・・、最後に第4電圧計測線L4及び第5電圧計測線L5を選択して第5電池セルB5の電圧を計測する。この処理を繰り返すことにより複数の電池セルB1〜B5を1つのA/D変換器111で計測することができ、電圧検出回路11のコスト及び回路面積を削減することができる。   This configuration example is an example in which the voltages of the plurality of battery cells B1 to B5 are measured in a time division manner. For example, the first voltage measurement line L0 and the first voltage measurement line L1 are first selected to measure the voltage of the first battery cell B1, and then the first voltage measurement line L1 and the second voltage measurement line L2 are selected. Then, the voltage of the second battery cell B2 is measured, and finally the fourth voltage measurement line L4 and the fifth voltage measurement line L5 are selected to measure the voltage of the fifth battery cell B5. By repeating this process, a plurality of battery cells B1 to B5 can be measured by one A / D converter 111, and the cost and circuit area of the voltage detection circuit 11 can be reduced.

なお、複数の電圧計測線L0〜L5の隣接する2本の電圧計測線間の全てにA/D変換器を設けてもよい。この場合、複数の経路選択スイッチS0〜S5は不要である。   In addition, you may provide an A / D converter in all between two voltage measurement lines which the voltage measurement lines L0-L5 adjoin. In this case, the plurality of route selection switches S0 to S5 are not necessary.

制御回路12は電池管理装置10全体を制御する。制御回路12の構成は、ハードウェア資源とソフトウェア資源の協働、またはハードウェア資源のみにより実現できる。ハードウェア資源として、アナログ回路、ロジック回路、マイクロコンピュータ、DSP、ROM、RAM、FPGA、その他のLSIを利用できる。ソフトウェア資源としてファームウェア等のプログラムを利用できる。   The control circuit 12 controls the battery management apparatus 10 as a whole. The configuration of the control circuit 12 can be realized by cooperation of hardware resources and software resources, or only by hardware resources. As hardware resources, analog circuits, logic circuits, microcomputers, DSPs, ROMs, RAMs, FPGAs, and other LSIs can be used. Firmware and other programs can be used as software resources.

制御回路12は、電圧検出回路11から複数の電池セルB1〜B5の電圧値を取得する。電圧検出回路11と制御回路12間は例えば、絶縁インタフェースによる通信で信号が送受信される。制御回路12は、複数の電池セルB1〜B5のいずれかにオーバーボルテージ/アンダーボルテージが発生していないか監視する。オーバーボルテージ/アンダーボルテージが検出された場合、制御回路12は上位装置にアラートを通知する。車載用途の場合、上位装置としてECUに通知する。   The control circuit 12 acquires the voltage values of the plurality of battery cells B <b> 1 to B <b> 5 from the voltage detection circuit 11. For example, signals are transmitted and received between the voltage detection circuit 11 and the control circuit 12 by communication using an insulation interface. The control circuit 12 monitors whether overvoltage / undervoltage has occurred in any of the plurality of battery cells B1 to B5. When overvoltage / undervoltage is detected, the control circuit 12 notifies an alert to the host device. In the case of in-vehicle use, the ECU is notified as a host device.

上述のように複数の経路選択スイッチS0〜S5のオン/オフを切り替えてA/D変換器111に接続するチャンネルを順次切り替える構成を採用する場合、制御回路12は複数の経路選択スイッチS0〜S5のオン/オフを順次切り替える。   As described above, when adopting a configuration in which the channels connected to the A / D converter 111 are sequentially switched by turning on / off the plurality of path selection switches S0 to S5, the control circuit 12 has the plurality of path selection switches S0 to S5. Toggle on / off sequentially.

また制御回路12は均等化制御機能を備え、定期的に複数の電池セルB1〜B5の均等化制御を実施する。例えば、複数の電池セルB1〜B5の内、最も電圧が低い電池セルの電圧に他の電池セルの電圧を合わせる。具体的には、当該他の電池セルの放電スイッチをターンオンして当該他の電池セルを放電させる。当該他の電池セルの電圧が、最も電圧が低い電池セルの電圧に到達すると当該他の電池セルの放電スイッチをターンオフする。   In addition, the control circuit 12 has an equalization control function and periodically performs equalization control of the plurality of battery cells B1 to B5. For example, the voltage of the other battery cell is adjusted to the voltage of the battery cell having the lowest voltage among the plurality of battery cells B1 to B5. Specifically, the discharge switch of the other battery cell is turned on to discharge the other battery cell. When the voltage of the other battery cell reaches the voltage of the battery cell having the lowest voltage, the discharge switch of the other battery cell is turned off.

以上の構成において1本の電圧計測線(図1では第2電圧計測線L2)が断線した状況を考える。第2電圧計測線L2が断線しても、第2電池セルB2及び第3電池セルB3の電圧が直ぐには異常レベルにならず、一定の期間、正常範囲に留まる。この期間は、第2電池セルB2又は第3電池セルB3のオーバーボルテージ/アンダーボルテージが検出できない状態であり、電池の保護が不十分な状態となる。   Consider a situation in which one voltage measurement line (second voltage measurement line L2 in FIG. 1) is disconnected in the above configuration. Even if the second voltage measurement line L2 is disconnected, the voltages of the second battery cell B2 and the third battery cell B3 do not immediately become abnormal levels and remain in the normal range for a certain period. During this period, the overvoltage / undervoltage of the second battery cell B2 or the third battery cell B3 cannot be detected, and the battery is not sufficiently protected.

第2電池セルB2及び第3電池セルB3の電圧が直ぐに異常レベルにならないのは、断線箇所の上下の第1電圧計測線L1と第3電圧計測線L3間のインピーダンスが釣り合って、第2コンデンサC2及び第3コンデンサC3内の電荷が直ぐに抜けないことに起因する。即ち、第2コンデンサC2と第3コンデンサC3間のノードNaの電位が、断線前の電位付近で維持されてしまう。第2コンデンサC2及び第3コンデンサC3内の電荷は、電圧検出回路11内の配線抵抗などにより徐々に抜けていくが、時間がかかる。この期間は電池の保護が不十分な状態であり、特に車載用途では即時応答性が求められるため、このような期間をなくすことが求められる。   The reason why the voltages of the second battery cell B2 and the third battery cell B3 do not immediately become abnormal levels is that the impedance between the first voltage measurement line L1 and the third voltage measurement line L3 above and below the disconnection point is balanced and the second capacitor This is because the charges in C2 and the third capacitor C3 are not immediately released. That is, the potential of the node Na between the second capacitor C2 and the third capacitor C3 is maintained near the potential before the disconnection. The charges in the second capacitor C2 and the third capacitor C3 gradually escape due to the wiring resistance in the voltage detection circuit 11, but it takes time. During this period, the protection of the battery is inadequate, and an immediate response is required particularly for in-vehicle applications. Therefore, it is required to eliminate such a period.

図2は、本発明の実施の形態1に係る蓄電システム1を説明するための図である。以下、図2に示す実施の形態1に係る蓄電システム1と、図1の比較例1に係る蓄電システム1との相違点を説明する。実施の形態1では、複数のコンデンサC1〜C5の内、1つおきにコンデンサと並列にアンバランス抵抗を接続する。図2に示す例では、第1コンデンサC1が接続される第0電圧計測線L0と第1電圧計測線L1間に第1アンバランス抵抗R1uが接続され、第3コンデンサC3が接続される第2電圧計測線L2と第3電圧計測線L3間に第3アンバランス抵抗R3uが接続され、第5コンデンサC5が接続される第4電圧計測線L4と第5電圧計測線L5間に第5アンバランス抵抗R5uが接続される。複数のコンデンサC1〜C5の内、両端のコンデンサC1、C5にはアンバランス抵抗R1u、R5uを接続するようにする。   FIG. 2 is a diagram for explaining the power storage system 1 according to Embodiment 1 of the present invention. Hereinafter, differences between the power storage system 1 according to Embodiment 1 shown in FIG. 2 and the power storage system 1 according to Comparative Example 1 in FIG. 1 will be described. In the first embodiment, an unbalanced resistor is connected in parallel with every other capacitor among the plurality of capacitors C1 to C5. In the example shown in FIG. 2, the first unbalance resistor R1u is connected between the zeroth voltage measurement line L0 and the first voltage measurement line L1 to which the first capacitor C1 is connected, and the second capacitor C3 is connected. A third unbalance resistor R3u is connected between the voltage measurement line L2 and the third voltage measurement line L3, and a fifth unbalance is established between the fourth voltage measurement line L4 and the fifth voltage measurement line L5 to which the fifth capacitor C5 is connected. Resistor R5u is connected. Of the capacitors C1 to C5, unbalanced resistors R1u and R5u are connected to the capacitors C1 and C5 at both ends.

比較例1と同様に第2電圧計測線L2が断線した状況を考える。第2電圧計測線L2が断線すると、第3コンデンサC3内のエネルギーが第3アンバランス抵抗R3uで消費されるため、第2コンデンサC2と第3コンデンサC3間のノードNaの電位が直ぐに上(第3電圧計測線L3の電位)に張り付く。従って第2電池セルB2の電圧は通常時の約2倍の電圧になり、第3電池セルB3の電圧はほぼゼロになる。即ち、断線箇所の上下の第1電圧計測線L1と第3電圧計測線L3間のインピーダンスが釣り合わなくなるため、第2コンデンサC2と第3コンデンサC3間のノードNaの電位が直ぐに上に張り付くことになる。   Consider a situation in which the second voltage measurement line L2 is disconnected as in the first comparative example. When the second voltage measurement line L2 is disconnected, the energy in the third capacitor C3 is consumed by the third unbalance resistor R3u, so that the potential of the node Na between the second capacitor C2 and the third capacitor C3 is immediately increased (first Sticks to the potential of the three voltage measurement line L3). Accordingly, the voltage of the second battery cell B2 is about twice as high as normal, and the voltage of the third battery cell B3 becomes almost zero. That is, since the impedance between the first voltage measurement line L1 and the third voltage measurement line L3 above and below the disconnection portion becomes unbalanced, the potential of the node Na between the second capacitor C2 and the third capacitor C3 is immediately attached to the top. Become.

なお第3電圧計測線L3が断線すると、第3コンデンサC3内のエネルギーが第3アンバランス抵抗R3uで消費されるため、第3コンデンサC3と第4コンデンサC4間のノードの電位が直ぐに下(第3電圧計測線L3の電位)に張り付く。   When the third voltage measurement line L3 is disconnected, the energy in the third capacitor C3 is consumed by the third unbalance resistor R3u, so that the potential of the node between the third capacitor C3 and the fourth capacitor C4 is immediately lowered (first Sticks to the potential of the three voltage measurement line L3).

制御回路12は、放電スイッチS1d〜S5dをターンオンして、複数のコンデンサC1〜C5に溜まった電荷を放電抵抗R1d〜R5dを介して引き抜くことができる。このようなフェーズを定期的に挿入してもよい。また制御回路12は、放電スイッチS1d〜S5dを1つおきにターンオンすることにより、上記と同様の原理により電圧計測線の断線を検出することができる。このようなフェーズを定期的に挿入してもよい。   The control circuit 12 can turn on the discharge switches S1d to S5d to draw out the electric charges accumulated in the capacitors C1 to C5 through the discharge resistors R1d to R5d. Such a phase may be inserted periodically. Further, the control circuit 12 can detect disconnection of the voltage measurement line by the same principle as described above by turning on every other discharge switch S1d to S5d. Such a phase may be inserted periodically.

以上説明したように実施の形態1によれば、電圧検出回路11の計測チャンネルの1つおきに抵抗を設けることにより、断線した電圧計測線の上下のコンデンサの一方の電荷を意図的に引き抜くことができる。従って断線した電圧計測線の電位を瞬時に上または下に張り付かせることができ、電圧検出回路11が電圧計測線の断線を瞬時に検出することができる。また受動素子である抵抗の追加で足り、能動素子の追加が不要である。追加する部品点数も少ないため、低コストで本技術を導入でき、故障率も低く抑えることができる。   As described above, according to the first embodiment, by providing a resistor for every other measurement channel of the voltage detection circuit 11, the charge on one of the capacitors above and below the disconnected voltage measurement line is intentionally extracted. Can do. Accordingly, the potential of the disconnected voltage measurement line can be instantaneously attached to the upper side or the lower side, and the voltage detection circuit 11 can instantaneously detect the disconnection of the voltage measurement line. Further, it is sufficient to add a resistance which is a passive element, and no additional active element is necessary. Since the number of parts to be added is small, this technology can be introduced at a low cost and the failure rate can be kept low.

また放電スイッチS1d〜S5dを1つおきにターンオンするフェーズを追加すれば、仮にアンバランス抵抗の外れなどにより電圧計測線の断線検出に不具合が生じている場合でも、当該フェーズで断線を検出することができる。この方式を採用すれば、電圧計測線の断線に対して二重の保護になる。   In addition, if a phase for turning on every other discharge switch S1d to S5d is added, even if there is a problem in detecting disconnection of the voltage measurement line due to unbalanced resistance, etc., the disconnection is detected in this phase. Can do. Adopting this method provides double protection against disconnection of the voltage measurement line.

実施の形態1では電池セルの数、及び各電池セルに並列に接続されるコンデンサの数が奇数の例を説明した。実施の形態2ではそれらの数が偶数の例を説明する。   In the first embodiment, an example in which the number of battery cells and the number of capacitors connected in parallel to each battery cell is an odd number has been described. In the second embodiment, an example in which the number is an even number will be described.

図3は、比較例2に係る蓄電システム1を説明するための図である。比較例2では4つの電池セルB1〜B4が直列接続されて構成される組電池20を想定する。以上の構成において、両端の電圧計測線L0、L4の内、アンバランス抵抗が接続されていない側の第4電圧計測線L4が断線した状況を考える。この場合、第4コンデンサC4内のエネルギーをアンバランス抵抗で消費させることができないため、第4コンデンサC4内のエネルギーが消費されるまでに時間がかかる。   FIG. 3 is a diagram for explaining the power storage system 1 according to the second comparative example. In Comparative Example 2, an assembled battery 20 is assumed in which four battery cells B1 to B4 are connected in series. Consider a situation in which the fourth voltage measurement line L4 on the side to which the unbalanced resistor is not connected is disconnected among the voltage measurement lines L0 and L4 at both ends in the above configuration. In this case, since the energy in the fourth capacitor C4 cannot be consumed by the unbalanced resistor, it takes time until the energy in the fourth capacitor C4 is consumed.

図2に示したように電池セルの数が奇数の場合、1つおきにアンバランス抵抗を挿入する規則を順守しながら複数のコンデンサC1〜C5の両端のコンデンサC1、C5にアンバランス抵抗を接続することができる。一方、図3に示したように電池セルの数が偶数の場合、1つおきにアンバランス抵抗を挿入する規則を順守すると、一方の端のコンデンサC4にアンバランス抵抗が接続されない状態となる。   As shown in FIG. 2, when the number of battery cells is an odd number, an unbalanced resistor is connected to capacitors C1 and C5 at both ends of a plurality of capacitors C1 to C5 while observing the rule of inserting an unbalanced resistor every other cell. can do. On the other hand, when the number of battery cells is an even number as shown in FIG. 3, if the rule for inserting an unbalanced resistor every other is observed, the unbalanced resistor is not connected to the capacitor C4 at one end.

図4は、本発明の実施の形態2に係る蓄電システム1を説明するための図である。以下、図4に示す実施の形態2に係る蓄電システム1と、図3に示した比較例2に係る蓄電システム1との相違点を説明する。実施の形態2では、両端の2つのコンデンサC1、C4の内、上記規則を順守するとアンバランス抵抗が本来接続されない方のコンデンサC4にも、調整用アンバランス抵抗R4uを接続する。   FIG. 4 is a diagram for explaining a power storage system 1 according to Embodiment 2 of the present invention. Hereinafter, differences between power storage system 1 according to Embodiment 2 shown in FIG. 4 and power storage system 1 according to Comparative Example 2 shown in FIG. 3 will be described. In the second embodiment, among the two capacitors C1 and C4 at both ends, the adjustment unbalance resistor R4u is also connected to the capacitor C4 to which the unbalance resistor is not originally connected when the above rule is observed.

その際、上記規則を順守して挿入されるアンバランス抵抗と、調整用アンバランス抵抗の抵抗値を異なる値に設定する。図4に示す例では、第4コンデンサC4と並列に、調整用アンバランス抵抗R4uが3つ直列に接続される。即ち、第2電圧計測線L2と第3電圧計測線L3間の抵抗値と、第3電圧計測線L3と第4電圧計測線L4間の抵抗値の比は1:3になる。なお、第3アンバランス抵抗R3uの抵抗値の3倍の抵抗値を持つ1つの調整用アンバランス抵抗R4uを使用しても同じである。   At this time, the resistance values of the unbalance resistor inserted in compliance with the above rules and the adjustment unbalance resistor are set to different values. In the example shown in FIG. 4, three adjustment unbalance resistors R4u are connected in series in parallel with the fourth capacitor C4. That is, the ratio of the resistance value between the second voltage measurement line L2 and the third voltage measurement line L3 and the resistance value between the third voltage measurement line L3 and the fourth voltage measurement line L4 is 1: 3. The same is true even when one adjustment unbalance resistor R4u having a resistance value three times the resistance value of the third unbalance resistor R3u is used.

以下、第3電圧計測線L3が断線した状況を考える。第3電圧計測線L3が断線すると、第3コンデンサC3内のエネルギーが第3アンバランス抵抗R3uで消費され、第4コンデンサC4内のエネルギーが調整用アンバランス抵抗R4uで消費される。その際、調整用アンバランス抵抗R4uの抵抗値の方が大きいので、第4コンデンサC4内のエネルギーの方が早く消費される。第2電圧計測線L2と第4電圧計測線L4間は1:3に分圧され、第3電池セルB3の電圧が正常範囲の下限を下回り、電圧検出回路11により異常が検出される。   Hereinafter, a situation in which the third voltage measurement line L3 is disconnected will be considered. When the third voltage measurement line L3 is disconnected, the energy in the third capacitor C3 is consumed by the third unbalance resistor R3u, and the energy in the fourth capacitor C4 is consumed by the adjustment unbalance resistor R4u. At this time, since the resistance value of the adjustment unbalance resistor R4u is larger, the energy in the fourth capacitor C4 is consumed earlier. The voltage between the second voltage measurement line L2 and the fourth voltage measurement line L4 is 1: 3, the voltage of the third battery cell B3 falls below the lower limit of the normal range, and the voltage detection circuit 11 detects an abnormality.

なお第4電圧計測線L4が断線すると、第4コンデンサC4内のエネルギーが調整用アンバランス抵抗R4uで消費される。この場合、第4電池セルB4の電圧が正常範囲の上限を上回り、電圧検出回路11により異常が検出される。   When the fourth voltage measurement line L4 is disconnected, the energy in the fourth capacitor C4 is consumed by the adjustment unbalance resistor R4u. In this case, the voltage of the fourth battery cell B4 exceeds the upper limit of the normal range, and the voltage detection circuit 11 detects an abnormality.

以上説明したように実施の形態2によれば、電池セルの数が偶数の場合でも、アンバランス抵抗が本来接続されない側の端のコンデンサC4に、調整用アンバランス抵抗R4uを接続することにより、アンバランス抵抗が本来接続されない側の端の電圧計測線L4が断線した場合でも瞬時に検出することができる。その他の効果は実施の形態1と同様である。   As described above, according to the second embodiment, even when the number of battery cells is an even number, by connecting the adjustment unbalance resistor R4u to the capacitor C4 at the end to which the unbalance resistor is not originally connected, Even when the voltage measurement line L4 at the end to which the unbalanced resistor is not originally connected is broken, it can be detected instantaneously. Other effects are the same as those of the first embodiment.

組電池20の電池セル数は様々であり用途や仕様ごとに異なる。車載用途であっても車種ごとに異なる。チップメーカが、電池セル数が異なる組電池20ごとに個別に電圧検出回路11を用意することが理想的であるが、製造コストや管理コストが増大する。そこで、電圧検出回路11の電圧計測線の端子数が、電池セル数と一致しない場合でも、端子数が電池セル数より多ければ、その電圧検出回路を使用することがある。実施の形態3では電圧検出回路11の電圧計測線の端子数より、電池セル数が少ない場合の例を説明する。   The number of battery cells of the assembled battery 20 varies and differs depending on the application and specifications. Even for in-vehicle use, it differs for each vehicle type. It is ideal that the chip manufacturer prepares the voltage detection circuit 11 individually for each assembled battery 20 having a different number of battery cells, but the manufacturing cost and management cost increase. Therefore, even when the number of terminals of the voltage measurement line of the voltage detection circuit 11 does not match the number of battery cells, the voltage detection circuit may be used if the number of terminals is larger than the number of battery cells. In the third embodiment, an example in which the number of battery cells is smaller than the number of terminals of the voltage measurement line of the voltage detection circuit 11 will be described.

図5は、比較例3に係る蓄電システム1を説明するための図である。比較例3では図2の蓄電システム1の構成から第3電池セルB3、第2抵抗R2、第3コンデンサC3、第3放電スイッチS3d、第3放電抵抗R3dが省略された構成である。即ち、電池セル数が4、電圧検出回路11の電圧計測線の端子数が6の例であり、電圧検出回路11の第3チャンネルを飛ばして4つの電池セルB1、B2、B4、B5が電圧検出回路11に接続される。この回路構成において第3電圧計測線L3が断線した場合、第2コンデンサC2及び第4コンデンサC4内のエネルギーをアンバランス抵抗で消費させることができないため、第2コンデンサC2及び第4コンデンサC4内のエネルギーが消費されるまでに時間がかかる。   FIG. 5 is a diagram for explaining the power storage system 1 according to the third comparative example. In the comparative example 3, the third battery cell B3, the second resistor R2, the third capacitor C3, the third discharge switch S3d, and the third discharge resistor R3d are omitted from the configuration of the power storage system 1 in FIG. That is, this is an example in which the number of battery cells is 4 and the number of terminals of the voltage measurement line of the voltage detection circuit 11 is 6. By skipping the third channel of the voltage detection circuit 11, the four battery cells B1, B2, B4, B5 are voltage. Connected to the detection circuit 11. In this circuit configuration, when the third voltage measurement line L3 is disconnected, the energy in the second capacitor C2 and the fourth capacitor C4 cannot be consumed by the unbalanced resistor, and thus the second capacitor C2 and the fourth capacitor C4 It takes time for energy to be consumed.

図6は、本発明の実施の形態3に係る蓄電システム1を説明するための図である。実施の形態3ではアンバランス抵抗を、複数のコンデンサの内、1つおき以上のコンデンサと並列に接続する。その際、隣接する2つのアンバランス抵抗を、それぞれの電圧計測線間にスイッチを介して接続する。   FIG. 6 is a diagram for explaining a power storage system 1 according to Embodiment 3 of the present invention. In the third embodiment, the unbalanced resistor is connected in parallel with every other one or more of the plurality of capacitors. At that time, two adjacent unbalanced resistors are connected between the respective voltage measurement lines via switches.

図6に示す例では、第2電圧計測線L2(蓄電セルに未接続)と第3電圧計測線L3間に第3アンバランス抵抗R3uと第3抵抗選択スイッチS3uの直列回路が接続される。また第3電圧計測線L3と第4電圧計測線L4間に第4アンバランス抵抗R4uと第4抵抗選択スイッチS4uの直列回路が接続される。   In the example shown in FIG. 6, a series circuit of a third unbalance resistor R3u and a third resistor selection switch S3u is connected between the second voltage measurement line L2 (not connected to the storage cell) and the third voltage measurement line L3. A series circuit of a fourth unbalance resistor R4u and a fourth resistor selection switch S4u is connected between the third voltage measurement line L3 and the fourth voltage measurement line L4.

電池セル間のノードに非接続の電圧計測線に、アンバランス抵抗と抵抗選択スイッチの直列回路が接続されている場合、当該スイッチをオフに設定し、当該アンバランス抵抗を無効にする。図6では第2電圧計測線L2に接続されている第3抵抗選択スイッチS3uをオフに設定する。アンバランス抵抗と抵抗選択スイッチの直列回路と並列に接続されたコンデンサが存在しない場合は、当該抵抗選択スイッチをオフに設定して、当該アンバランス抵抗を無効にすると考えてもよい。   When a series circuit of an unbalance resistor and a resistance selection switch is connected to a voltage measurement line that is not connected to a node between battery cells, the switch is set to off and the unbalance resistor is invalidated. In FIG. 6, the third resistance selection switch S3u connected to the second voltage measurement line L2 is set to OFF. When there is no capacitor connected in parallel with the series circuit of the unbalance resistor and the resistance selection switch, it may be considered that the unbalance resistance is invalidated by setting the resistance selection switch to OFF.

複数のコンデンサC1、C2、C4、C5の内、1つおきにアンバランス抵抗を接続する規則に従えば、図6において第1コンデンサC1と第4コンデンサC4と並列にアンバランス抵抗を接続することになる。従って第3電圧計測線L3と第4電圧計測線L4間の第4抵抗選択スイッチS4uをオンに設定して、第4アンバランス抵抗R4uを有効にする。   According to the rule of connecting an unbalanced resistor to every other capacitor C1, C2, C4, C5, the unbalanced resistor is connected in parallel with the first capacitor C1 and the fourth capacitor C4 in FIG. become. Therefore, the fourth resistance selection switch S4u between the third voltage measurement line L3 and the fourth voltage measurement line L4 is set to ON, and the fourth unbalance resistance R4u is made effective.

また図6に示す回路は電池セルの数が偶数であるため、実施の形態2で説明したように、両端の2つのコンデンサC1、C5の内、上記規則を順守するとアンバランス抵抗が本来接続されない方のコンデンサC5にも、調整用アンバランス抵抗R5uを接続する。調整用アンバランス抵抗R5uの抵抗値は、第4アンバランス抵抗R4uの抵抗値と異なる値に設定される。   Further, since the circuit shown in FIG. 6 has an even number of battery cells, as described in the second embodiment, the unbalanced resistor is not originally connected when the above rule is observed among the two capacitors C1 and C5 at both ends. An adjustment unbalance resistor R5u is also connected to the other capacitor C5. The resistance value of the adjustment unbalance resistor R5u is set to a value different from the resistance value of the fourth unbalance resistor R4u.

第3抵抗選択スイッチS3u及び第4抵抗選択スイッチS4uのオン/オフは出荷時に、使用する組電池20の電池セル数に応じて予め設定され固定される。また蓄電システム1が使用開始されると、第3抵抗選択スイッチS3u及び第4抵抗選択スイッチS4uの制御端子(スイッチにFETを使用する場合はゲート端子)に、制御回路12内のロジック回路から固定レベルを蓄電システム1の使用終了まで印加し続ける構成でもよい。   The on / off of the third resistance selection switch S3u and the fourth resistance selection switch S4u is preset and fixed at the time of shipment according to the number of battery cells of the assembled battery 20 to be used. When the power storage system 1 is started to be used, it is fixed from the logic circuit in the control circuit 12 to the control terminals of the third resistance selection switch S3u and the fourth resistance selection switch S4u (when using an FET as the switch). A configuration in which the level is continuously applied until the use of the power storage system 1 is completed may be employed.

図6ではアンバランス抵抗と抵抗選択スイッチの直列回路を、隣接する2つのチャンネルに接続する例を挙げたが、3つ以上のチャンネルに当該直列回路を接続してもよいし、全てのチャンネルに当該直列回路を接続してもよい。電池セルの数が偶数の場合、一方の端に接続されるアンバランス抵抗の抵抗値を他のアンバランス抵抗の抵抗値と異なる値に設定しておけばよい。   In FIG. 6, an example in which a series circuit of an unbalanced resistor and a resistance selection switch is connected to two adjacent channels has been described. However, the series circuit may be connected to three or more channels, or all channels may be connected. The series circuit may be connected. When the number of battery cells is an even number, the resistance value of the unbalance resistor connected to one end may be set to a value different from the resistance value of the other unbalance resistor.

以上説明したように実施の形態3によれば、隣接する2つのチャンネルに、アンバランス抵抗と抵抗選択スイッチの直列回路を接続することにより、電圧検出回路11のチャンネル数と、組電池20の電池セル数が異なっているケースでも、電圧計測線の断線を瞬時に検出することができる。その他の効果は実施の形態1と同様である。   As described above, according to Embodiment 3, the number of channels of the voltage detection circuit 11 and the battery of the assembled battery 20 are connected by connecting a series circuit of an unbalance resistor and a resistance selection switch to two adjacent channels. Even in cases where the number of cells is different, disconnection of the voltage measurement line can be detected instantaneously. Other effects are the same as those of the first embodiment.

以上、本発明を実施の形態をもとに説明した。実施の形態は例示であり、それらの各構成要素や各処理プロセスの組み合わせにいろいろな変形例が可能なこと、またそうした変形例も本発明の範囲にあることは当業者に理解されるところである。   The present invention has been described based on the embodiments. The embodiments are exemplifications, and it will be understood by those skilled in the art that various modifications can be made to combinations of the respective constituent elements and processing processes, and such modifications are within the scope of the present invention. .

図7は、変形例に係る蓄電システム1を説明するための図である。上述の実施の形態では、電圧検出回路11の計測チャンネルの1つおきにアンバランス抵抗を挿入することにより、隣接する2つの計測チャンネル間のインピーダンス比を崩す構成を説明した。変形例では全ての計測チャンネルにアンバランス抵抗Ru1〜Ru5を挿入し、隣接する2つのアンバランス抵抗の抵抗値が異なるように設計する。これによっても上述の実施の形態と同様の効果が得られる。   FIG. 7 is a diagram for explaining a power storage system 1 according to a modification. In the above-described embodiment, the configuration in which the impedance ratio between two adjacent measurement channels is destroyed by inserting an unbalanced resistor in every other measurement channel of the voltage detection circuit 11 has been described. In the modification, unbalanced resistors Ru1 to Ru5 are inserted into all measurement channels, and the two adjacent unbalanced resistors are designed to have different resistance values. This also provides the same effects as those of the above-described embodiment.

上述の実施の形態では、隣接する2つのチャンネル間のインピーダンス比を崩すために一方のチャンネルにアンバランス抵抗を挿入する例を説明した。この点、2つのチャンネル間のインピーダンス比を崩すことができれば抵抗以外のインピーダンス素子を使用してもよい。例えば、ゲート又はベースがオン状態に固定されたトランジスタを使用してもよい。当該トランジスタのオン抵抗で、隣接する2つのチャンネル間のインピーダンス比を崩すことができる。また、配線による抵抗成分を利用して隣接する2つの放電経路間のインピーダンス値を異ならせることも考えられる。   In the above-described embodiment, an example has been described in which an unbalanced resistor is inserted into one channel in order to destroy the impedance ratio between two adjacent channels. In this regard, an impedance element other than a resistor may be used as long as the impedance ratio between the two channels can be destroyed. For example, a transistor whose gate or base is fixed to an on state may be used. The on-resistance of the transistor can break the impedance ratio between two adjacent channels. It is also conceivable that the impedance values between two adjacent discharge paths are made different by utilizing a resistance component due to wiring.

また上述の実施の形態では、リチウムイオン電池を使用する例を想定したが、ニッケル水素電池や鉛電池などの他の種別の電池を使用してもよい。また電池の代わりに、キャパシタ(例えば、電気二重層キャパシタ)を用いてもよい。   Moreover, although the example using a lithium ion battery was assumed in the above-mentioned embodiment, you may use other types of batteries, such as a nickel metal hydride battery and a lead battery. A capacitor (for example, an electric double layer capacitor) may be used instead of the battery.

なお、実施の形態は、以下の項目によって特定されてもよい。   The embodiment may be specified by the following items.

[項目1]
直列接続された複数の蓄電セル(B1〜B5)間の各ノードと複数の電圧計測線(L0〜L5)で接続され、隣接する電圧計測線間の電圧を検出して各蓄電セル(B1〜B5)の電圧を検出する電圧検出回路(11)であって、
前記複数の電圧計測線(L0〜L5)の隣接する電圧計測線間にそれぞれ蓄電セル(B1〜B5)と並列にコンデンサ(C1〜C5)が接続されており、
前記電圧検出回路(11)は、
前記複数のコンデンサ(C1〜C5)の内、1つおきにコンデンサ(C1、C3、C5)と並列に接続されるインピーダンス素子(R1u、R3u、R5u)を備えることを特徴とする電圧検出回路(11)。
これによれば、電圧計測線の断線時に当該電圧計測線の電位を瞬時に上または下に張り付けることができ、断線の検出タイミングを早めることができる。
[項目2]
前記複数のコンデンサ(C1〜C5)の数が奇数のとき、両端の2つのコンデンサ(C1、C5)にそれぞれインピーダンス素子(R1u、R5u)が接続されるように、前記複数のインピーダンス素子(R1u、R3u、R5u)が1つおきに接続されることを特徴とする項目1に記載の電圧検出回路(11)。
これにより、どの電圧計測線(L0〜L5)が断線しても瞬時に断線を検出することができる。
[項目3]
前記複数のコンデンサ(C1〜C4)の数が偶数のとき、両端の2つのコンデンサ(C1、C4)の内、前記インピーダンス素子(R1u、R3u)が本来接続されない方のコンデンサ(C4)と並列に接続される調整用インピーダンス素子(R4u)をさらに備え、
前記1つおきに接続されるインピーダンス素子(R1u、R3u)のインピーダンス値と、前記調整用インピーダンス素子(R4u)のインピーダンス値が異なることを特徴とする項目1に記載の電圧検出回路(11)。
これにより、インピーダンス素子が本来接続されない側の端の電圧計測線が断線しても瞬時に断線を検出することができる。
[項目4]
前記インピーダンス素子(R1u、R3u、R4u、R5u)は、前記複数のコンデンサの内、1つおき以上のコンデンサ(C1、C2、C4、C5)と並列に接続され、
前記複数のインピーダンス素子(R1u、R3u、R4u、R5u)の内、少なくとも1組の隣接する2つのインピーダンス素子(R3u、R4u)は、それぞれの電圧計測線間にスイッチ(S3u、S4u)を介して接続されることを特徴とする項目1に記載の電圧検出回路(11)。
これにより、インピーダンス素子を接続するか接続しないかを任意に選択できるチャンネルを設けることができ、電圧検出回路11と組電池20の柔軟な組み合わせが可能となる。
[項目5]
前記複数の蓄電セル(B1、B2、B4、B5)の数より、前記電圧検出回路(11)のチャンネル数が多い場合において、
前記電圧検出回路(11)の複数の電圧計測線(L0〜L5)の内、前記蓄電セル間のノードに非接続の電圧計測線(L2)に前記インピーダンス素子(R3u)と前記スイッチ(S3u)が接続されている場合、当該スイッチ(S3u)がオフに設定されることを特徴とする項目4に記載の電圧検出回路(11)。
[項目6]
直列接続された複数の蓄電セル(B1〜B5)間の各ノードと複数の電圧計測線(L0〜L5)で接続され、隣接する電圧計測線間の電圧を検出して各蓄電セル(B1〜B5)の電圧を検出する電圧検出回路(11)であって、
前記複数の電圧計測線(L0〜L5)の隣接する電圧計測線間にそれぞれ蓄電セル(B1〜B5)と並列にコンデンサ(C1〜C5)が接続されており、
前記電圧検出回路(11)は、
前記複数のコンデンサ(C1〜C5)と並列にそれぞれ形成される複数の放電経路を備え、
前記複数の放電経路において、隣接する2つの放電経路間のインピーダンス値が異なることを特徴とする電圧検出回路(11)。
これによれば、電圧計測線の断線時に当該電圧計測線の電位を瞬時に上または下に張り付けることができ、断線の検出タイミングを早めることができる。
[項目7]
直列接続された複数の蓄電セル(B1〜B5)間の各ノードと複数の電圧計測線(L0〜L5)で接続され、隣接する電圧計測線間の電圧を検出して各蓄電セル(B1〜B5)の電圧を検出する電圧検出回路(11)であって、
前記複数の電圧計測線(L0〜L5)の隣接する電圧計測線間にそれぞれ蓄電セル(B1〜B5)と並列にコンデンサ(C1〜C5)が接続されており、
前記電圧検出回路(11)は、
前記複数のコンデンサ(C1〜C5)と並列にそれぞれ接続される複数のインピーダンス素子(R1u〜R5u)を備え、
前記複数のインピーダンス素子(R1u〜R5u)において、隣接する2つのインピーダンス素子間のインピーダンス値が異なることを特徴とする電圧検出回路(11)。
これによれば、電圧計測線の断線時に当該電圧計測線の電位を瞬時に上または下に張り付けることができ、断線の検出タイミングを早めることができる。
[項目8]
直列接続された複数の蓄電セル(B1〜B5)と、
前記複数の蓄電セル(B1〜B5)のそれぞれの電圧を検出する項目1から6のいずれかに記載の電圧検出回路(11)と、
を備えることを特徴とする蓄電システム(1)。
これによれば、電圧計測線の断線時に当該電圧計測線の電位を瞬時に上または下に張り付けることができ、断線の検出タイミングを早めることができる。
[Item 1]
Each node between the plurality of storage cells (B1 to B5) connected in series is connected to the plurality of voltage measurement lines (L0 to L5), and the voltage between the adjacent voltage measurement lines is detected to detect each storage cell (B1 to B1). A voltage detection circuit (11) for detecting the voltage of B5),
Capacitors (C1 to C5) are connected in parallel with the storage cells (B1 to B5) between adjacent voltage measurement lines of the plurality of voltage measurement lines (L0 to L5), respectively.
The voltage detection circuit (11)
A voltage detection circuit comprising impedance elements (R1u, R3u, R5u) connected in parallel with the capacitors (C1, C3, C5) every other capacitor among the plurality of capacitors (C1-C5). 11).
According to this, when the voltage measurement line is disconnected, the potential of the voltage measurement line can be instantly pasted up or down, and the detection timing of the disconnection can be advanced.
[Item 2]
When the number of the plurality of capacitors (C1 to C5) is an odd number, the plurality of impedance elements (R1u, R5u) are connected to the two capacitors (C1, C5) at both ends, respectively. 2. The voltage detection circuit (11) according to item 1, wherein every other R3u, R5u) is connected.
Thereby, even if which voltage measurement line (L0-L5) is disconnected, a disconnection can be detected instantaneously.
[Item 3]
When the number of the capacitors (C1 to C4) is an even number, of the two capacitors (C1, C4) at both ends, the capacitor (C4) that is not originally connected to the impedance element (R1u, R3u) is connected in parallel. It further includes an adjustment impedance element (R4u) to be connected,
The voltage detection circuit (11) according to item 1, wherein an impedance value of every other impedance element (R1u, R3u) connected to the impedance element of the adjustment impedance element (R4u) is different.
Thereby, even if the voltage measurement line at the end to which the impedance element is not originally connected is disconnected, the disconnection can be detected instantaneously.
[Item 4]
The impedance elements (R1u, R3u, R4u, R5u) are connected in parallel with every other capacitor (C1, C2, C4, C5) among the plurality of capacitors,
Among the plurality of impedance elements (R1u, R3u, R4u, R5u), at least one set of two adjacent impedance elements (R3u, R4u) is connected via a switch (S3u, S4u) between the respective voltage measurement lines. The voltage detection circuit (11) according to item 1, wherein the voltage detection circuit (11) is connected.
Thereby, a channel that can arbitrarily select whether or not to connect the impedance element can be provided, and the voltage detection circuit 11 and the assembled battery 20 can be flexibly combined.
[Item 5]
In the case where the number of channels of the voltage detection circuit (11) is larger than the number of the plurality of storage cells (B1, B2, B4, B5),
Among the plurality of voltage measurement lines (L0 to L5) of the voltage detection circuit (11), the impedance element (R3u) and the switch (S3u) are connected to the voltage measurement line (L2) not connected to the node between the storage cells. The voltage detection circuit (11) according to item 4, wherein the switch (S3u) is set to OFF when is connected.
[Item 6]
Each node between the plurality of storage cells (B1 to B5) connected in series is connected to the plurality of voltage measurement lines (L0 to L5), and the voltage between the adjacent voltage measurement lines is detected to detect each storage cell (B1 to B1). A voltage detection circuit (11) for detecting the voltage of B5),
Capacitors (C1 to C5) are connected in parallel with the storage cells (B1 to B5) between adjacent voltage measurement lines of the plurality of voltage measurement lines (L0 to L5), respectively.
The voltage detection circuit (11)
A plurality of discharge paths formed respectively in parallel with the plurality of capacitors (C1 to C5);
The voltage detection circuit (11), wherein in the plurality of discharge paths, impedance values between two adjacent discharge paths are different.
According to this, when the voltage measurement line is disconnected, the potential of the voltage measurement line can be instantly pasted up or down, and the detection timing of the disconnection can be advanced.
[Item 7]
Each node between the plurality of storage cells (B1 to B5) connected in series and a plurality of voltage measurement lines (L0 to L5) is detected, and a voltage between adjacent voltage measurement lines is detected to detect each storage cell (B1 to B1). A voltage detection circuit (11) for detecting the voltage of B5),
Capacitors (C1 to C5) are connected in parallel with the storage cells (B1 to B5) between adjacent voltage measurement lines of the plurality of voltage measurement lines (L0 to L5), respectively.
The voltage detection circuit (11)
A plurality of impedance elements (R1u to R5u) respectively connected in parallel with the plurality of capacitors (C1 to C5);
The voltage detection circuit (11), wherein in the plurality of impedance elements (R1u to R5u), impedance values between two adjacent impedance elements are different.
According to this, when the voltage measurement line is disconnected, the potential of the voltage measurement line can be instantly pasted up or down, and the detection timing of the disconnection can be advanced.
[Item 8]
A plurality of storage cells (B1 to B5) connected in series;
The voltage detection circuit (11) according to any one of items 1 to 6, which detects each voltage of the plurality of power storage cells (B1 to B5);
A power storage system (1) comprising:
According to this, when the voltage measurement line is disconnected, the potential of the voltage measurement line can be instantly pasted up or down, and the detection timing of the disconnection can be advanced.

1 蓄電システム、 2 負荷、 10 電池管理装置、 11 電圧検出回路、 111 A/D変換器、 12 制御回路、 20 組電池、 B1,B2,B3,B4,B5 電池セル、 R0,R1,R2,R3,R4,R5 抵抗、 C1,C2,C3,C4,C5 コンデンサ、 S0,S1,S2,S3,S4,S5 経路選択スイッチ、 L0,L1,L2,L3,L4,L5 電圧計測線、 S1d,S2d,S3d,S4d,S5d 放電スイッチ、 R1d,R2d,R3d,R4d,R5d 放電抵抗、 R1u,R2u,R3u,R4u,R5u アンバランス抵抗、 S3u,S4u 抵抗選択スイッチ。   DESCRIPTION OF SYMBOLS 1 Power storage system, 2 Load, 10 Battery management apparatus, 11 Voltage detection circuit, 111 A / D converter, 12 Control circuit, 20 assembled battery, B1, B2, B3, B4, B5 battery cell, R0, R1, R2, R3, R4, R5 resistor, C1, C2, C3, C4, C5 capacitor, S0, S1, S2, S3, S4, S5 path selection switch, L0, L1, L2, L3, L4, L5 voltage measurement line, S1d, S2d, S3d, S4d, S5d discharge switch, R1d, R2d, R3d, R4d, R5d discharge resistance, R1u, R2u, R3u, R4u, R5u unbalanced resistance, S3u, S4u resistance selection switch.

Claims (8)

直列接続された複数の蓄電セル間の各ノードと複数の電圧計測線で接続され、隣接する電圧計測線間の電圧を検出して各蓄電セルの電圧を検出する電圧検出回路であって、
前記複数の電圧計測線の隣接する電圧計測線間にそれぞれ蓄電セルと並列にコンデンサが接続されており、
前記電圧検出回路は、
前記複数のコンデンサの内、1つおきにコンデンサと並列に接続されるインピーダンス素子を備えることを特徴とする電圧検出回路。
A voltage detection circuit that is connected to each node between a plurality of storage cells connected in series and a plurality of voltage measurement lines, detects a voltage between adjacent voltage measurement lines, and detects a voltage of each storage cell,
A capacitor is connected in parallel with each storage cell between adjacent voltage measurement lines of the plurality of voltage measurement lines,
The voltage detection circuit includes:
A voltage detection circuit comprising an impedance element connected in parallel with every other capacitor among the plurality of capacitors.
前記複数のコンデンサの数が奇数のとき、両端の2つのコンデンサにそれぞれインピーダンス素子が接続されるように、前記複数のインピーダンス素子が1つおきに接続されることを特徴とする請求項1に記載の電圧検出回路。   2. The plurality of impedance elements are alternately connected so that impedance elements are respectively connected to two capacitors at both ends when the number of the plurality of capacitors is an odd number. Voltage detection circuit. 前記複数のコンデンサの数が偶数のとき、両端の2つのコンデンサの内、前記インピーダンス素子が本来接続されない方のコンデンサと並列に接続される調整用インピーダンス素子をさらに備え、
前記1つおきに接続されるインピーダンス素子のインピーダンス値と、前記調整用インピーダンス素子のインピーダンス値が異なることを特徴とする請求項1に記載の電圧検出回路。
When the number of the plurality of capacitors is an even number, it further comprises an adjusting impedance element connected in parallel with the capacitor that is not originally connected to the impedance element among the two capacitors at both ends,
2. The voltage detection circuit according to claim 1, wherein an impedance value of every other impedance element connected is different from an impedance value of the adjustment impedance element.
前記インピーダンス素子は、前記複数のコンデンサの内、1つおき以上のコンデンサと並列に接続され、
前記複数のインピーダンス素子の内、少なくとも1組の隣接する2つのインピーダンス素子は、それぞれの電圧計測線間にスイッチを介して接続されることを特徴とする請求項1に記載の電圧検出回路。
The impedance element is connected in parallel with every other capacitor among the plurality of capacitors,
2. The voltage detection circuit according to claim 1, wherein among the plurality of impedance elements, at least one set of two adjacent impedance elements is connected between the respective voltage measurement lines via a switch.
前記複数の蓄電セルの数より、前記電圧検出回路のチャンネル数が多い場合において、
前記電圧検出回路の複数の電圧計測線の内、前記蓄電セル間のノードに非接続の電圧計測線に前記インピーダンス素子と前記スイッチが接続されている場合、当該スイッチがオフに設定されることを特徴とする請求項4に記載の電圧検出回路。
In the case where the number of channels of the voltage detection circuit is larger than the number of the plurality of storage cells,
When the impedance element and the switch are connected to a voltage measurement line that is not connected to a node between the storage cells among the plurality of voltage measurement lines of the voltage detection circuit, the switch is set to be off. The voltage detection circuit according to claim 4.
直列接続された複数の蓄電セル間の各ノードと複数の電圧計測線で接続され、隣接する電圧計測線間の電圧を検出して各蓄電セルの電圧を検出する電圧検出回路であって、
前記複数の電圧計測線の隣接する電圧計測線間にそれぞれ蓄電セルと並列にコンデンサが接続されており、
前記電圧検出回路は、
前記複数のコンデンサと並列にそれぞれ形成される複数の放電経路を備え、
前記複数の放電経路において、隣接する2つの放電経路間のインピーダンス値が異なることを特徴とする電圧検出回路。
A voltage detection circuit that is connected to each node between a plurality of storage cells connected in series and a plurality of voltage measurement lines, detects a voltage between adjacent voltage measurement lines, and detects a voltage of each storage cell,
A capacitor is connected in parallel with each storage cell between adjacent voltage measurement lines of the plurality of voltage measurement lines,
The voltage detection circuit includes:
Comprising a plurality of discharge paths formed in parallel with the plurality of capacitors,
In the plurality of discharge paths, the impedance value between two adjacent discharge paths is different.
直列接続された複数の蓄電セル間の各ノードと複数の電圧計測線で接続され、隣接する電圧計測線間の電圧を検出して各蓄電セルの電圧を検出する電圧検出回路であって、
前記複数の電圧計測線の隣接する電圧計測線間にそれぞれ蓄電セルと並列にコンデンサが接続されており、
前記電圧検出回路は、
前記複数のコンデンサと並列にそれぞれ接続される複数のインピーダンス素子を備え、
前記複数のインピーダンス素子において、隣接する2つのインピーダンス素子間のインピーダンス値が異なることを特徴とする電圧検出回路。
A voltage detection circuit that is connected to each node between a plurality of storage cells connected in series and a plurality of voltage measurement lines, detects a voltage between adjacent voltage measurement lines, and detects a voltage of each storage cell,
A capacitor is connected in parallel with each storage cell between adjacent voltage measurement lines of the plurality of voltage measurement lines,
The voltage detection circuit includes:
Comprising a plurality of impedance elements respectively connected in parallel with the plurality of capacitors;
In the plurality of impedance elements, an impedance value between two adjacent impedance elements is different.
直列接続された複数の蓄電セルと、
前記複数の蓄電セルのそれぞれの電圧を検出する請求項1から7のいずれかに記載の電圧検出回路と、
を備えることを特徴とする蓄電システム。
A plurality of storage cells connected in series;
The voltage detection circuit according to any one of claims 1 to 7, wherein each voltage of the plurality of storage cells is detected.
A power storage system comprising:
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