JP2018182052A - Semiconductor integrated circuit and drive system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of improving a protection performance with respect to overvoltage and improving a degree of integration, and a drive system.SOLUTION: A semiconductor integrated circuit comprises: a p-type semiconductor layer 10C (first semiconductor region); and a first resistive element 431 which includes an n-type well region 11 (second semiconductor region) and in which the n-type well region 11 is defined as a first electrode and a second electrode and an n-type semiconductor region 13 (second semiconductor region) is defined as a resistor. When a normal operation voltage is applied to the first electrode in the first resistive element 431, a depletion layer 13a is formed from a pn junction 13J into the resistor. When overvoltage is applied to the first electrode in the first resistive element 431, an extension of the depletion layer 13a that is formed from the junction 13J into the resistor is enlarged and a resistance value is increased. Thus, the overvoltage can be dropped by the first resistive element 431.SELECTED DRAWING: Figure 5

Description

  The present invention relates to a semiconductor integrated circuit and a drive system.

Patent Document 1 below discloses a motor control circuit for a mirror device, and Patent Document 2 below discloses an over-voltage protection circuit of a load drive device.
The motor control circuit includes a surge protection circuit in which a Zener diode is inserted between the power supplies. In the surge protection circuit, when an overvoltage is applied to one of the power supplies, the Zener diode breaks down, and the overvoltage can be removed to the other of the power supplies.
The overvoltage protection circuit also includes voltage limiting means in which a plurality of Zener diodes electrically connected in series are inserted between the power supply and the output of the comparator. The output of the comparator and the voltage limiting means are connected to the base electrode of the Darlington connected bipolar transistor of the output stage. In the voltage limiting means, a plurality of Zener diodes break down when an overvoltage is applied to the power supply. The breakdown current flows to the base electrode of the output stage bipolar transistor to operate the bipolar transistor. Therefore, the overvoltage can be pulled to the ground.

  The surge protection circuit or the overvoltage protection circuit can protect the internal elements from load dump noise which is an overvoltage of approximately 110 V and field decay noise which is an overvoltage which reaches approximately 300 V. Load dump noise is noise that is generated when the vehicle engine is operating and the battery line is disconnected while the alternator is supplying current to the power supply line. Also, field decay noise is noise emitted from the field coil of the alternator.

  By the way, in the above-mentioned surge protection circuit or overvoltage protection circuit, a Zener diode having a large allowable current is required. For example, when mounted on a semiconductor integrated circuit, the dimension of one side of the rectangular Zener diode in plan view reaches several mm. For this reason, the area occupied by the surge protection circuit or the overvoltage protection circuit is increased, and there is room for improvement in order to achieve both the improvement of the protection performance against overvoltage and the improvement of the integration degree.

Patent No. 5629555 Japanese Examined Patent Publication No. 6-81418

  SUMMARY OF THE INVENTION The present invention provides a semiconductor integrated circuit and a drive system capable of improving over voltage protection performance and improving the degree of integration in consideration of the above facts.

  In order to solve the above problems, a semiconductor integrated circuit according to a first embodiment of the present invention includes a first semiconductor region of a first conductivity type electrically separated from another region, and a main surface portion of the first semiconductor region. A second semiconductor region of a second conductivity type opposite to the formed first conductivity type, one end of the second semiconductor region being a first electrode, and the other end being a second electrode, Between the one end and the other end is a resistor, and when a first voltage is applied to the first electrode, an air gap layer is formed in the resistor from the junction of the first semiconductor region and the second semiconductor region. And a first resistance element in which the extension of the air gap layer formed in the resistance body from the junction is increased when a second voltage higher than the first voltage is applied to the first electrode.

  A semiconductor integrated circuit according to a first embodiment includes a first resistance element having a second semiconductor region of a second conductivity type formed in a main surface portion of a first semiconductor region of a first conductivity type. The first semiconductor region is electrically isolated from the other regions. The first resistance element has one end of the second semiconductor region as a first electrode, the other end of the second semiconductor region as a second electrode, and a resistance between the first electrode and the second electrode of the second semiconductor region. It is configured as a body.

Here, in the first resistance element, when the first voltage is applied to the first electrode, an air gap layer is formed in the resistor from the junction of the first semiconductor region and the second semiconductor region. In the resistor, a current according to the first voltage flows from the first electrode to the second electrode within a range limited by the free layer. For example, when the normal operating voltage used in the semiconductor integrated circuit is applied to the first electrode as the first voltage, a current corresponding to the normal operating voltage flows in the first resistance element in a state where the resistance value of the resistor is low. .
On the other hand, when a second voltage higher than the first voltage is applied to the first electrode, the extension of the air layer formed in the resistor from the junction is increased. In the resistor, a current corresponding to the second voltage flows in the first resistance element within a range in which the current path is largely restricted by the extension of the free layer corresponding to the second voltage. For example, when an overvoltage is applied to the first electrode as the second voltage, the overvoltage flows to the first resistance element in a state where the resistance value of the resistor is high, so that the overvoltage can be dropped.
For this reason, when an overvoltage is applied, the resistance value of the resistor can be increased in the first resistance element, so the occupied area of the first resistance element can be reduced, and the overvoltage can be increased by the high resistance body. Voltage drop.

  In a semiconductor integrated circuit according to a second embodiment of the present invention, in the semiconductor integrated circuit according to the first embodiment, the junction depth of the first electrode is deeper than the junction depth of the resistor, and the first electrode of the first electrode is The impurity concentration at the junction with the semiconductor region is lower than the impurity concentration at the junction with the first semiconductor region of the resistor.

  According to the semiconductor integrated circuit of the second embodiment, the junction depth of the first electrode is deeper than the junction depth of the resistor, and the impurity concentration of the first electrode is lower than the impurity concentration of the resistor. The impurity concentration profile of the second semiconductor region is gentler at the first electrode than at the resistor. Therefore, the free layer extending from the junction to the first semiconductor region and the second semiconductor region can be enlarged in the first electrode, so that the breakdown withstand voltage of the junction in the first electrode against overvoltage can be improved. it can.

  In the semiconductor integrated circuit according to the third aspect of the present invention, in the semiconductor integrated circuit according to the first aspect or the second aspect, the first main electrode is connected to the power supply terminal and the power supply terminal, and the second load is connected to the external load. A drive element to which the main electrode is connected, a control circuit connected to the control electrode of the drive element, and a control circuit that controls the operation of the drive element, a first electrode is connected to the power supply terminal, and the first main electrode is connected to the second electrode And a first protection circuit configured to include the first resistance element.

A semiconductor integrated circuit according to a third embodiment includes a power supply terminal, a drive element, a control circuit, and a first protection circuit including a first resistance element. The drive element connects the first main electrode to the power supply terminal, connects the second main electrode to the external load, and connects the control electrode to the control circuit. The operation of the drive element is controlled by the control circuit.
Here, the first protection circuit is configured to include the first resistance element, and the first resistance element is inserted between the power supply terminal and the drive element. Specifically, the first electrode of the first resistance element is connected to the power supply terminal, and the second electrode of the first resistance element is connected to the first main electrode of the drive element. Therefore, when an overvoltage is applied to the power supply terminal, the resistance value of the resistor can be increased in the first resistance element, and the overvoltage can be dropped before being input to the drive element using the first resistance element. . As a result, it is possible to improve the breakdown voltage due to the overvoltage of the drive element.

  In a semiconductor integrated circuit according to a fourth aspect of the present invention, in the semiconductor integrated circuit according to the third aspect, the first resistance element has a plurality of resistance elements, and the plurality of resistance elements are a power supply terminal and a first main It is electrically connected in series between the electrodes.

  According to the semiconductor integrated circuit of the fourth embodiment, the first resistance element has a plurality of resistance elements, and the plurality of resistance elements are electrically connected in series between the power supply terminal and the first main electrode. . For this reason, when the second voltage, for example, an overvoltage, is applied to the power supply terminal, the overvoltage can be lowered stepwise by the plurality of resistance elements, so that the breakdown withstand voltage of the first protection circuit can be improved.

  A semiconductor integrated circuit according to a fifth aspect of the present invention is the semiconductor integrated circuit according to the third or fourth aspect, including a second resistance element between the first protection circuit and the control circuit. And a second protective circuit, wherein the second resistive element is formed of a polycrystalline silicon film.

  The semiconductor integrated circuit according to the fifth embodiment includes a second protection circuit between the first protection circuit and the control circuit. The second protection circuit is configured to include a second resistance element, and the second resistance element is configured by a polycrystalline silicon film. The second resistive element can flow a stable current as compared to the first resistive element.

  A drive system according to a sixth embodiment of the present invention comprises a semiconductor integrated circuit according to any one of the third to fifth embodiments, a power source for supplying power to the semiconductor integrated circuit, and a power source. And a power supply terminal, and a switch circuit for switching the supply of power from the power source to the power terminal.

A drive system according to a sixth embodiment includes a semiconductor integrated circuit, a power source, and a switch circuit. The power supply source supplies power to the power supply terminal of the semiconductor integrated circuit. The switch circuit is disposed between the power supply source and the power supply terminal, and switches the supply of power from the power supply source to the power supply terminal.
In the drive system constructed in this manner, when a second voltage, for example, an overvoltage, is applied to the power supply terminal, the resistance value of the resistor is increased in the first resistance element, and input to the drive element using the first resistance element. The overvoltage can be dropped before it is done. As a result, the area occupied by the first protection circuit can be reduced, and the breakdown voltage due to the overvoltage of the drive element of the semiconductor integrated circuit can be improved.

  According to the present invention, it is possible to provide a semiconductor integrated circuit and drive system capable of improving the protection performance against overvoltage and improving the degree of integration.

FIG. 1 is a circuit configuration diagram of a semiconductor integrated circuit according to a first embodiment of the present invention and a drive system including the semiconductor integrated circuit. FIG. 6 is a circuit diagram of a first resistance element of a first protection circuit mounted on the semiconductor integrated circuit shown in FIG. (A) is an enlarged sectional view of an essential part showing a longitudinal sectional structure of the first resistance element shown in FIG. 2 and the second resistance element of the second protection circuit mounted on the semiconductor integrated circuit shown in FIG. 1, (B) FIG. 2 is an enlarged sectional view of an essential part showing a longitudinal sectional structure of a transistor forming a drive element and a control circuit of a drive circuit mounted on the semiconductor integrated circuit shown in FIG. It is an enlarged plan view of the 1st resistive element shown by FIG. (A) is an enlarged cross-sectional view of the main part of the first resistance element in the state where the normal operation voltage shown in FIG. 3 is applied, (B) corresponds to (A) of the first resistance element in the state where overvoltage is applied. It is a principal part expanded sectional view. It is a graph which shows the voltage-current characteristic of the 1st resistive element shown by FIG.

  Hereinafter, a semiconductor integrated circuit and a drive system according to an embodiment of the present invention will be described using FIGS. 1 to 6.

(Circuit configuration of semiconductor integrated circuit and drive system)
As shown in FIG. 1, a drive system 1 according to the present embodiment is mounted on a vehicle such as a car. The drive system 1 includes a power source 2, a switch circuit 3, and a semiconductor integrated circuit (IC: Integrated Circuits) 4. The drive system 1 is connected to an external load 5, which is driven by the drive system 1. In the present embodiment, an electric motor is used as the external load 5.

(1) Configuration of Power Source Generating Source The power source generating source 2 is a battery mounted on a vehicle. The power source 2 supplies the semiconductor integrated circuit 4 with a first voltage as a normal operating voltage. The first voltage is, for example, 12 V DC or 24 V DC.

(2) Configuration of Switch Circuit The switch circuit 3 is disposed between the power supply source 2 and the semiconductor integrated circuit 4 and includes a first switch element 31 and a second switch element 32. The first switch element 31 has a first terminal A connected to the positive voltage terminal (plus terminal) of the power source 2 and a second terminal B connected to the negative voltage terminal (minus terminal). The first terminal A and the second terminal B are switched. The first switch element 31 is connected to the first power terminal 41 of the semiconductor integrated circuit 4.
The second switch element 32 has a first terminal C connected to the positive voltage terminal of the power source 2 and a second terminal D connected to the negative voltage terminal, and is interlocked with switching of the first switch element 31. Then, the first terminal C and the second terminal D are switched. The second switch element 32 is connected to the second power terminal 42 of the semiconductor integrated circuit 4.
Here, to interlock with switching means that, when the first switch element 31 switches from the connection to the first terminal A to the connection to the second terminal B, the second switch element 31 interlocks with the switching of the first switch element 31. It means that the switch element 32 switches from the connection to the second terminal D to the connection to the first terminal C. In addition, when the first switch element 31 switches from the connection to the second terminal B to the connection to the first terminal A, the connection of the second switch element 32 to the first terminal C to the connection to the second terminal D Switch over.

  In the present embodiment, capacitive element 6 is electrically connected in parallel between first power supply terminal 41 and second power supply terminal 42 of semiconductor integrated circuit 4. More specifically, the capacitive element 6 connects one electrode between the first switch element 31 and the first power supply terminal 41, and the other electrode between the second switch element 32 and the second power supply terminal 42. Connected The capacitive element 6 is used as a smoothing capacitor that absorbs noise generated between power supplies.

(3) Configuration of Semiconductor Integrated Circuit The semiconductor integrated circuit 4 includes a first power supply terminal 41 and a second power supply terminal 42, a first protection circuit 43, a second protection circuit 44, a control circuit 45, and a drive circuit 46. , And the first output terminal 47 and the second output terminal 48.

(3-1) Configuration of First Protection Circuit The first protection circuit 43 is between the first power supply terminal 41 and the second power supply terminal 42 and the drive circuit 46, and the first power supply terminal 41 and the second power supply terminal 42 and the second protection circuit 44. The first protection circuit 43 includes a first resistance element 431 and a first resistance element 432. As shown in FIG. 2, the first resistance element 431 is constituted by a plurality of resistance elements 431A and resistance elements 431B electrically connected in series. One end as a first electrode of the resistive element 431A is connected to the first power supply terminal 41, and the other end as a second electrode is connected to one end as a first electrode of the resistive element 431B. The other end of the resistive element 431 B as the second electrode is connected to the drive circuit 46 and the second protection circuit 44.

More specifically, when a normal operating voltage is applied to the first power supply terminal 41, the resistance value of each of the resistance element 431A and the resistance element 431B of the first resistance element 431 is low. For example, when 12 V is applied to the first power supply terminal 41, the resistance value of each of the resistive element 431A and the resistive element 431 B is, for example, 0.35 Ω to 0.38 Ω. On the other hand, when an overvoltage as the second voltage is applied to the first power supply terminal 41, the resistance value of each of the resistance element 431A and the resistance element 431B of the first resistance element 431 becomes high. Then, the overvoltage can be lowered by the first resistance element 431. For example, when an overvoltage of 100 V to 300 V is applied to the first power supply terminal 41, the resistance value of each of the resistance element 431A and the resistance element 431 B changes to 1.6 Ω to 3.6 Ω.
In the present embodiment, the first resistance element 431 has a two-stage configuration in which two resistance elements 431A and 431B are electrically connected in series, but three or more resistance elements are electrically connected in series. It may be a multistage configuration of three or more stages connected to each other.

The first resistance element 432 shown in FIG. 1 has a configuration similar to that of the first resistance element 431 shown in FIGS. 1 and 2, and is constituted by a plurality of resistance elements electrically connected in series. One end of the first resistance element 432 is connected to the second power supply terminal 42, and the other end of the first resistance element 432 is connected to the drive circuit 46 and the second protection circuit 44.
Similar to the operation of the first resistance element 431, the resistance value of the first resistance element 432 is low when a normal operating voltage is applied, and the resistance value of the first resistance element 432 is high when an overvoltage is applied.

(3-2) Configuration of Second Protection Circuit As shown in FIG. 1, the second protection circuit 44 includes a second resistance element 441, a second resistance element 442, a first thyristor 443 and a second thyristor 444. And have.
One end of the second resistance element 441 as a first electrode is connected to the second electrode (second electrode of the resistance element 431B) of the first resistance element 431 of the first protection circuit 43, and the other end as a second electrode is controlled It is connected to the circuit 45. One end as a first electrode of the second resistance element 442 is connected to the second electrode of the first resistance element 432 of the first protection circuit 43, and the other end as a second electrode is connected to the control circuit 45.
The resistance value of each of the second resistance element 441 and the second resistance element 442 is set to, for example, 50 Ω.

The first thyristor 443 connects the cathode electrode to the second electrode of the second resistance element 441 and the control circuit 45, connects the anode electrode to the anode electrode of the second thyristor 444, and connects the gate electrode to the anode electrode. . That is, when an operating power supply voltage (first voltage) of positive voltage is applied to the first power supply terminal 41, the first power supply wiring 411 for supplying the operating power supply voltage from the first power supply terminal 41 to the control circuit 45 The first thyristor 443 is connected in the reverse direction.
The second thyristor 444 connects the cathode electrode to the second electrode of the second resistance element 442 and the control circuit 45, and connects the gate electrode to the anode electrode. Similarly, when the operating power supply voltage is applied to the second power supply terminal 42, the second thyristor 444 has a reverse direction to the second power supply wiring 421 that supplies the operating power supply voltage from the second power supply terminal 42 to the control circuit 45. It is connected to the.

(3-3) Configuration of Drive Circuit As shown in FIG. 1, the drive circuit 46 is configured to include a first drive element 461 and a second drive element 462.
In the present embodiment, the first drive element 461 is configured by an n-channel insulated gate field effect transistor (IGFET) as a first conductivity type. Preferably, the first drive element 461 is configured of a double diffusion metal oxide semiconductor (DMOS) having a high breakdown voltage structure having a double diffusion structure. One main electrode of the first drive element 461 is connected to the second electrode (second electrode of the resistance element 431 B) of the first resistance element 431, and the other main electrode is connected to the first output terminal 47. The first output terminal 47 is connected to the external load 5. The control electrode of the first drive element 461 is connected to the control circuit 45, and the operation of the first drive element 461 is controlled by the control circuit 45.
A first flywheel diode (return diode) 463 is electrically connected in parallel to the first drive element 461. The anode electrode of the first flywheel diode 463 is connected to one main electrode of the first drive element 461, and the cathode electrode is connected to the other main electrode of the first drive element 461.

Similarly to the first drive element 461, the second drive element 462 is composed of an n-channel IGFET, preferably a DMOS. One main electrode of the second drive element 462 is connected to the second electrode of the first resistance element 432, and the other main electrode is connected to the second output terminal 48. The second output terminal 48 is connected to the external load 5. The control electrode of the second drive element 462 is connected to the control circuit 45, and the operation of the second drive element 462 is controlled by the control circuit 45 as in the case of the first drive element 461.
A second flywheel diode 464 similar to the first flywheel diode 463 is electrically connected in parallel to the second drive element 462. The anode electrode of the second flywheel diode 464 is connected to one main electrode of the second drive element 462, and the cathode electrode is connected to the other main electrode of the second drive element 462.

(Device configuration of semiconductor integrated circuit)
First, the semiconductor integrated circuit 4 shown in FIG. 1 is configured based on the substrate 10 shown in FIGS. 3 (A) and 3 (B). In the present embodiment, the substrate 10 is configured to include the semiconductor substrate 10A, the insulating layer 10B formed on the semiconductor substrate 10A, and the semiconductor layer 10C formed on the insulating layer 10B.
For the semiconductor substrate 10A, a p-type silicon single crystal substrate as a second conductivity type opposite to the first conductivity type is used. For the insulating layer 10B, a silicon oxide film formed by oxidizing the surface of a silicon single crystal substrate is used. For the semiconductor layer 10C, a p-type silicon single crystal substrate bonded to the insulating layer 10B is used. The semiconductor layer 10C is set to a low impurity concentration (impurity density) of, for example, 10 ¹⁴ atoms / cm ³ . That is, in the present embodiment, an SOI (Silicon On Insulator) structure is adopted for the substrate 10.
As the substrate 10, an SOI structure formed by a SIMOX (Separation by Implantation of OXygen) method or a normal semiconductor substrate without an SOI structure can be used.

(1) Device Configuration of IGFET Constructing Control Circuit As shown on the left side of FIG. 3B, the semiconductor integrated circuit 4 is provided with ap channel IGFET Q as a transistor constructing the control circuit 45. . The IGFET Q is disposed on the main surface portion of the n-type well region 11 formed in the semiconductor layer 10C. The n-type well region 11 has an impurity concentration of, for example, 10 ¹⁴ atoms / cm ³ and is set to have an impurity concentration slightly higher than that of the semiconductor layer 10C, and a pn junction with the semiconductor layer 10C from the main surface of the n-type well region 11 The junction depth x _j 1 to the portion is set to, for example, 6.0 μm. The IGFET Q is surrounded by an element isolation region 10D formed on the main surface of the semiconductor layer 10C, and is electrically isolated from the other regions via the element isolation region 10D. For the element isolation region 10D, for example, a silicon oxide film formed by selectively oxidizing the surface of the semiconductor layer 10C is used.

The IGFET Q is configured to include a channel formation region, a p-type semiconductor region 16 as a pair of main electrodes, a gate insulating film 17, and a gate electrode 18. The channel formation region is formed on the main surface portion of the n-type well region 11. The p-type semiconductor region 16 is set to a high impurity concentration of, for example, 10 ²⁰ atoms / cm ³ , and a junction depth x _j 3 from the main surface of the p-type semiconductor region 16 to the pn junction with the n-type well region 11. Is set to 0.5 μm, for example. The gate insulating film 17 is formed on the main surface of the n-type well region 11 between the pair of p-type semiconductor regions 16 and is formed of, for example, a silicon oxide film. The gate electrode 18 is formed on the gate insulating film 17 and is formed of, for example, a polycrystalline silicon film. Phosphorus or the like is added to the polycrystalline silicon film as an impurity to adjust the resistance value of the gate electrode 18.

  The gate insulating film 17 may be formed of a silicon nitride film or a composite film in which a silicon oxide film and a silicon nitride film are stacked. Further, the gate electrode 18 may be formed of a high melting point metal silicide film which is a compound of silicon and high melting point metal, or a composite film in which a high melting point metal film is laminated on a silicon polycrystal film or a high melting point metal silicide film. Good. Further, although not shown, the control circuit 45 is provided with an n-channel IGFET of a conductivity type opposite to that of the IGFET Q. The n-channel IGFET is configured with the same structure as the IGFET Q.

(2) Device Configuration of Bipolar Transistor Constructing Control Circuit As shown in the center of FIG. 3B, the semiconductor integrated circuit 4 includes a pnp bipolar transistor T having a vertical structure as a transistor constructing the control circuit 45. Is provided. The bipolar transistor T is disposed on the main surface portion of the semiconductor layer 10C surrounded by the element isolation region 10D.

The bipolar transistor T is configured to include a p-type collector electrode (main electrode), an n-type base electrode (control electrode), and a p-type emitter electrode (main electrode).
The collector electrode is constituted by the p-type well region 12 formed in the main surface portion of the semiconductor layer 10C. The p-type well region 12 is set to an impurity concentration equivalent to the impurity concentration of the n-type well region 11, and the diffusion depth from the main surface of the p-type well region 12 is the junction depth x _j 1 of the n-type well region 11. It is considered equivalent. A p-type semiconductor region 16 is formed in the main surface portion of the p-type well region 12. An interconnection (not shown) is connected to the p-type semiconductor region 16 to reduce the contact resistance between the p-type semiconductor region 16 and the interconnection.
The base electrode is composed of an n-type semiconductor region 13 formed on the main surface of the p-type well region 12. The n-type semiconductor region 13 has an impurity concentration of 10 ¹⁶ atoms / cm ³ , for example, and is set to have an impurity density higher than that of the n-type well region 11. The junction depth x _j 2 from the main surface of n-type semiconductor region 13 (semiconductor layer 10C) to the pn junction between n-type semiconductor region 13 and p-type well region 12 is set to 2.0 μm, for example. An n-type semiconductor region 15 is formed in the main surface portion of the n-type semiconductor region 13. A wire (not shown) is connected to the n-type semiconductor region 15, and the contact resistance between the n-type semiconductor region 15 and the wire is reduced. The n-type semiconductor region 15 is set to a high impurity concentration of, for example, 10 ²⁰ atoms / cm ³ , and the diffusion depth from the main surface of the n-type semiconductor region 15 is equal to the junction depth x _j 3 of the p-type semiconductor region 16. It is done.
The emitter electrode is formed of a p-type semiconductor region 16 formed in the main surface portion of the n-type semiconductor region 13. An interconnection (not shown) is connected to the p-type semiconductor region 16 to reduce the contact resistance between the p-type semiconductor region 16 and the interconnection.

(3) Device Configuration of Drive Element of Drive Circuit As shown on the right side of FIG. 3B, the first drive element 461 of the drive circuit 46 is surrounded by the element isolation region 10D, and the main component of the semiconductor layer 10C is It is arrange | positioned by the n-type well area | region 11 formed in the surface part. As described above, the first drive element 461 is formed of DMOS, and includes the channel formation region, one and the other main electrodes, the gate insulating film 17 and the gate electrode 18.

The channel formation region of the first drive element 461 is constituted by the p-type semiconductor region 14 formed in the main surface portion of the n-type well region 11. The p-type semiconductor region 14 is set equal to, for example, the impurity concentration of the n-type semiconductor region 13 and is set to the same junction depth x _j 2.
One of the main electrodes is a source electrode, and is constituted by an n-type semiconductor region 15 formed in the main surface portion of the p-type semiconductor region 14. The n-type semiconductor region 15 and the p-type semiconductor region 14 have a double diffusion structure. One main electrode is connected to the other electrode of the first resistance element 431 of the first protection circuit 43 through a wire (not shown).
The other main electrode is a drain electrode, and is composed of an n-type well region 11 and an n-type semiconductor region 15 formed on the main surface of the n-type well region 11. The n-type semiconductor region 15 is connected to the first output terminal 47 through a wire (not shown).
The gate insulating film 17 is formed on the p-type semiconductor region 14 and the n-type well region 11. The gate electrode 18 is formed on the gate insulating film 17.
The configuration of the second drive element 462 of the drive circuit 46 shown in FIG. 1 is the same as the configuration of the first drive element 461. The first flywheel diode 463 is added to the pn junction between the p-type semiconductor region 14 (anode electrode) of the first drive element 461 and the n-type well region 11 (cathode electrode). On the other hand, the second flywheel diode 464 is configured the same as the first flywheel diode 463.

(4) Device Configuration of First Resistance Element of First Protection Circuit As shown in the left side of FIG. 3A, the resistance element 431A of the first resistance element 431 shown in FIG. 2 is surrounded by the element isolation region 10D. And is disposed on the main surface portion of the semiconductor layer 10C. As described above, the resistance element 431A is configured to include the first electrode, the resistor, and the second electrode.

The first electrode is mainly composed of an n-type well region 11, and an n-type semiconductor region 15 is formed on the main surface of the n-type well region 11. A wire (not shown) is connected to the n-type semiconductor region 15, and the contact resistance between the n-type semiconductor region 15 and the wire is reduced. The n-type well region 11 has the same structure as the n-type well region 11 forming each of the IGFET Q shown on the left side of FIG. 3B and the first driving element 461 shown on the right side of FIG. And, they are formed by the same process in the manufacturing process of the semiconductor integrated circuit 4. Accordingly, the impurity concentration of the n-type well region 11 is set to 10 ¹⁴ atoms / cm ³ , and the junction depth x _j 1 of the n-type well region 11 is set to 6.0 μm, for example.
The second electrode is configured with the n-type well region 11 as a main element, as in the first electrode.

As shown in FIG. 3A, the resistor is formed on the main surface of the semiconductor layer 10C, disposed between the first electrode and the second electrode, and integrally formed on both (electrically (Connected) is constituted by the n-type semiconductor region 13. The n-type semiconductor region 13 is formed with the same structure as the n-type semiconductor region 13 forming the base region of the bipolar transistor T shown in FIG. 3B, and formed by the same process in the process of manufacturing the semiconductor integrated circuit 4. It is done. Therefore, the n-type semiconductor region 13 of the resistor is set to an impurity concentration of 10 ¹⁴ atoms / cm ³ , for example, and the junction depth x _j 2 of the n-type semiconductor region 13 is set to 2.0 μm, for example.

As shown in FIG. 4, in the present embodiment, the total length L1 in the current direction of the resistor element 431A including the first electrode, the resistor and the second electrode is set to 120 μm, for example, and the current direction of the resistor element 431A The full width W1 in the orthogonal direction is set to, for example, 75 μm. Further, the total length L2 in the current direction of the resistor is set to, for example, 40 μm to 70 μm, and the total width W2 in the direction orthogonal to the current direction of the resistor is set to, for example, 25 μm.
The resistance element 431B of the first resistance element 431 shown in FIG. 2 and the resistance elements connected in series of the second resistance element 432 shown in FIG. 1 have the same structure as the resistance element 431A.

(5) Device Configuration of Second Resistance Element of Second Protection Circuit The second resistance element 441 of the second protection circuit 44 shown in FIG. 1 is, as shown on the right side of FIG. 3A, an element isolation region 10D. It is arranged on the top. The second resistance element 441 is formed of the polycrystalline silicon film 18R here. The second resistance element 441 is formed to have the same structure as the gate electrode 18 of each of the IGFET Q and the first drive element 461, and is formed in the same process in the process of manufacturing the semiconductor integrated circuit 4. The polycrystalline silicon film 18R is set to have a resistance value higher than that of the gate electrode 18 by adjusting the concentration of the added impurity.
The second resistance element 442 of the second protection circuit 44 shown in FIG. 1 has the same configuration as the second resistance element 441.

(Operation and effect of the present embodiment)
As shown in FIG. 3A, the semiconductor integrated circuit 4 according to the present embodiment includes an n-type well region 11 (second semiconductor) formed in the main surface of a p-type semiconductor layer 10C (first semiconductor region). Region) is provided. The semiconductor layer 10C is electrically isolated from other regions (for example, the semiconductor substrate 10A, the n-type well region 11 and the like). The first resistance element 431 includes the n-type well region 11 as a first electrode, the n-type well region 11 as a second electrode, and the n-type semiconductor region 13 between the first electrode and the second electrode as a resistor. Be done.

  Here, as shown in FIG. 5A, in the resistive element 431A of the first resistive element 431, when a normal operating voltage is applied to the first electrode, the pn of the semiconductor layer 10C and the n-type semiconductor region 13 The air layer 13a is formed in the resistor from the junction 13J. Of course, the free layer 13b is also formed from the pn junction 13J to the semiconductor layer 10C side. In the resistor, a current i corresponding to the normal operating voltage flows from the first electrode to the second electrode in the range (within the n-type semiconductor region 13) limited by the free layer 13a. For example, when the normal operating voltage is 12 V and this normal operating voltage is applied to the first electrode, the resistance value of the resistor is as low as 0.35 Ω, for example, and the current according to the normal operating voltage in the state where the resistance is low i flows to the resistance element 431A.

On the other hand, as shown in FIG. 5B, when an overvoltage higher than the first voltage is applied to the first electrode, the extension of the air layer 13a formed in the resistor from the pn junction 13J becomes large. . In the resistor, in the range where the current path is largely restricted by the extension of the free layer 13a according to the overvoltage, the current is according to the overvoltage flows to the resistance element 431A.
For example, as shown in FIG. 6, when an overvoltage of 110 V is applied to the first electrode, the resistance value of the resistor increases to, for example, 1.6.OMEGA., And the overvoltage can be dropped by the resistor element 431.
Further, as shown in FIG. 6, when an overvoltage of 300 V is applied to the first electrode, the resistance value of the resistor increases to, for example, 3.6 Ω, and the overvoltage can be dropped by the resistor element 431.
Therefore, when the overvoltage is applied, the resistance value of the resistor can be increased in the first resistance element 431, so that the occupied area of the first resistance element 431 can be reduced. In addition, since the resistance value of the resistor can be increased, the first resistance element 431 can be used to drop the overvoltage.
The same function and effect can be obtained for each of the resistor elements 431 B of the first resistor element 431 and the second resistor element 432.

  Therefore, the semiconductor integrated circuit 4 can provide the semiconductor integrated circuit 4 capable of improving the protection performance against overvoltage and improving the degree of integration. The semiconductor integrated circuit 4 according to the present embodiment improves the protection performance against overvoltage in the occupied area of about 1/15 to 1/25 compared to the conventional surge protection circuit or overvoltage protection circuit using a Zener diode. It can be done.

Further, in the semiconductor integrated circuit 4 according to the present embodiment, as shown in FIG. 3A, the junction depth x _j 1 of the first electrode (n-type well region 11) of the first resistance element 431 is a resistance. It is made deeper than the junction depth x _j 2 of the body (n-type semiconductor region 13). In addition, the impurity concentration of the first electrode is lower than the impurity concentration of the resistor. As a result, the impurity concentration profile of the first electrode becomes gentler than the impurity concentration profile of the resistor.
Therefore, as shown in FIG. 5B, the extension of the free layer 11a and the free layer 11b from the pn junction 11J between the semiconductor layer 10C and the n-type well region 11 in the first electrode is increased. As a result, the breakdown withstand voltage of the first electrode against overvoltage can be improved.
In addition, the parasitic capacitance and the parasitic diode formed in the pn junction 11J can also be effectively used to improve the breakdown withstand voltage of the first electrode against the overvoltage.

Furthermore, as shown in FIG. 1, the semiconductor integrated circuit 4 according to the present embodiment includes the first power supply terminal 41 and the second power supply terminal 42, the first drive element 461 and the second drive element 462 (drive circuit 46). , A control circuit 45, and a first protection circuit 43 configured to include the first resistance element 431 and the first resistance element 432.
The first drive element 461 connects the first main electrode to the first power supply terminal 41, connects the second main electrode to the external load 5, and connects the control electrode to the control circuit 45. The second drive element 462 connects the first main electrode to the second power supply terminal 42, connects the second main electrode to the external load 5, and connects the control electrode to the control circuit 45. The operation of the first drive element 461 and the second drive element 462 is controlled by the control circuit 45.

Here, the first protection circuit 43 is configured to include the first resistance element 431 and the first resistance element 432. The first resistance element 431 is inserted between the first power supply terminal 41 and the first drive element 461. The first resistance element 432 is inserted between the second power supply terminal 41 and the second drive element 462.
Specifically, the first electrode of the first resistance element 431 is connected to the first power supply terminal 41, and the second electrode of the first resistance element 431 is connected to the first main electrode of the first drive element 461. The first electrode of the first resistance element 432 is connected to the second power supply terminal 42, and the second electrode of the first resistance element 432 is connected to the first main electrode of the second drive element 462.
Therefore, as shown in FIG. 5B, when an overvoltage is applied to the first power supply terminal 41, the resistance value of the resistor in the first resistance element 431 is increased, and the first resistance element 431 is used. The overvoltage can be dropped before being input to the first drive element 461. Similarly, when an overvoltage is applied to the second power supply terminal 42, the resistance value of the resistor is increased in the first resistance element 432, and before being input to the second drive element 462 using the first resistance element 432. The overvoltage can be reduced.
As a result, breakdown withstand voltages of the first drive element 461 and the second drive element 462 due to respective overvoltages can be improved.

Further, in the semiconductor integrated circuit 4 according to the present embodiment, as shown in FIG. 1 and FIG. 2, the first resistance element 431 has a plurality of resistance elements 431A and a resistance element 431B, and the plurality of resistance elements 431A and 431A. Resistance element 431 B is electrically connected in series between first power supply terminal 41 and the first main electrode of first drive element 461. Therefore, when an overvoltage is applied to the first power supply terminal 41, the overvoltage can be stepped down stepwise by the plurality of resistance elements 431A and 431B, so that the breakdown withstand voltage of the first protection circuit 43 is improved. be able to.
Similarly, since the first resistance element 432 is formed of a plurality of resistance elements, the first resistance element 432 can obtain the same function and effect as the first resistance element 431.

  Furthermore, as shown in FIG. 1, the semiconductor integrated circuit 4 according to the present embodiment includes the second protection circuit 44 between the first protection circuit 43 and the control circuit 45. The second protection circuit 44 is configured to include the second resistance element 441 and the second resistance element 442, and as shown in FIG. 3A, the second resistance element 441 and the second resistance element 442 are made of a polycrystalline silicon film. It consists of 18R. Therefore, the second resistance element 441 and the second resistance element 442 can stabilize the current as compared to the first resistance element 431 and the first resistance element 432.

Further, as shown in FIG. 1, the drive system 1 according to the present embodiment includes a semiconductor integrated circuit 4, a power source 2 and a switch circuit 3. The power source 2 supplies power to the semiconductor integrated circuit 4. The switch circuit 3 is disposed between the power supply source 2 and the first power supply terminal 41 and the second power supply terminal 42 of the semiconductor integrated circuit 4, and from the power supply source 2 to the first power supply terminal 41 or the second power supply terminal 42. Switch the power supply to
In the drive system 1 constructed as described above, when an overvoltage is applied to the first power supply terminal 41 or the second power supply terminal 42, the first resistance element 431 or the first resistance is formed as shown in FIG. 5 (B). The resistance value of the resistor can be increased in the element 432. Therefore, the overvoltage can be dropped before being input to the first drive element 461 using the first resistance element 431. On the other hand, the overvoltage can be lowered before being input to the second drive element 462 using the second resistance element 432. As a result, the breakdown withstand voltage of the first drive element 461 or the second drive element 462 of the semiconductor integrated circuit 4 due to an overvoltage can be improved.

[Supplementary explanation of the above embodiment]
The present invention is not limited to the above embodiment, and can be modified as follows, for example, within the scope of the present invention.
According to the present invention, in the drive circuit of the semiconductor integrated circuit, the drive element may be configured by a bipolar transistor.
Further, the present invention may use a light emitting diode (LED: Light Emitting Diode) as the external load.

DESCRIPTION OF SYMBOLS 1 ... drive system, 2 ... power source generation source, 3 ... switch circuit, 4 ... semiconductor integrated circuit, 41 ... 1st power terminal, 42 ... 2nd power terminal, 43 ... 1st protection circuit, 431, 432 ... 1st resistance Elements 431A, 431B ... resistance element 44: second protection circuit 441 442 second resistance element 45 control circuit 46 drive circuit 461 first drive element 462 second drive element 5 ... external load, 10 ... substrate, 10C ... semiconductor layer (first semiconductor region), 11 ... n-type well region (second semiconductor region), 12 ... p-type well region, 13 ... n-type semiconductor region (second semiconductor region 14, 16, ... p-type semiconductor region, 15 ... n-type semiconductor region, 18 ... gate electrode, 18R ... silicon polycrystalline film.

Claims (6)

A first semiconductor region of a first conductivity type electrically separated from the other regions;
It has a second semiconductor region of the second conductivity type opposite to the first conductivity type formed in the main surface portion of the first semiconductor region, one end of the second semiconductor region being a first electrode, and the other end A second electrode, a resistor between the one end and the other end, and a first voltage applied to the first electrode to form the first semiconductor region and the second semiconductor A void layer is formed in the resistor from a junction with the region, and a void is formed in the resistor from the junction when a second voltage higher than the first voltage is applied to the first electrode. A first resistive element whose layer extension is increased;
Semiconductor integrated circuit provided with   The junction depth of the first electrode is deeper than the junction depth of the resistor, and the impurity concentration of the junction of the first electrode with the first semiconductor region is different from that of the resistor with the first semiconductor region. The semiconductor integrated circuit according to claim 1, wherein the concentration is lower than the impurity concentration of the junction. Power supply terminal,
A driving element having a first main electrode connected to the power supply terminal and a second main electrode connected to an external load;
A control circuit connected to the control electrode of the drive element to control the operation of the drive element;
A first protection circuit configured to include the first resistance element in which the first electrode is connected to the power supply terminal and the first main electrode is connected to the second electrode;
The semiconductor integrated circuit according to claim 1 or 2, comprising   4. The semiconductor integrated circuit according to claim 3, wherein the first resistance element has a plurality of resistance elements, and the plurality of resistance elements are electrically connected in series between the power supply terminal and the first main electrode. circuit.   4. The semiconductor device according to claim 3, further comprising a second protection circuit configured to include a second resistance element between the first protection circuit and the control circuit, wherein the second resistance element is formed of a polycrystalline silicon film. The semiconductor integrated circuit according to claim 4. The semiconductor integrated circuit according to any one of claims 3 to 5;
A power source for supplying power to the semiconductor integrated circuit;
A switch circuit disposed between the power supply source and the power supply terminal, for switching the supply of power from the power supply source to the power supply terminal;
Drive system with.