JP2018179571A - Current sensing circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a current sensing circuit in which influences on a diode due to parasitic diode is eliminated and the occurrence of erratic operation is prevented.SOLUTION: Provided is a current sensing circuit constituted on a P-type semiconductor substrate comprising resistors R1, R2, R3, R4, R5, operational amplifiers 15A, 15B, 16, back flow preventing diodes D1, D2, an NMOS transistor M1, and PMOS transistors M2, M3, wherein a transistor M4, with its gate grounded to earth, source connected to the cathode of the back flow preventing diode D2 and drain connected to a non-inverted input pin of the operational amplifier 15B, is inserted and connected between the cathode of the back flow preventing diode D2 and the non-inverted input pin of the operational amplifier 15B.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a current sensing circuit for detecting a current flowing to a load, and more particularly to a current sensing circuit with an expanded common mode input voltage range.

  FIG. 4 shows a conventional current sense circuit 10D of this type (Patent Document 1). In the current sense circuit 10D, 11 is a first input terminal, 12 is a second input terminal, 13 is a power supply terminal, and 14 is a detection output terminal. A sense resistor Rs for detecting a load current Is flowing to the load 2 is connected between the signal input terminal 1 and the load 2. The signal input terminal 1 side of the sense resistor Rs is connected to the first input terminal 11 of the current sense circuit 10D, and the load 2 side is connected to the second input terminal 12.

  The current sense circuit 10D inputs and processes the input voltage Vs generated between both ends of the current sense resistor Rs to both input terminals 11 and 12 and outputs a detection voltage V1 corresponding to the load current Is to the detection output terminal 14 Do. The positive voltage source 3 of the voltage V + is connected to the power supply terminal 13. The detection voltage V1 appearing at the detection output terminal 14 is amplified by the output circuit 4 operating at the voltage V + and then output as the output voltage VOUT.

  The input current I1 to the first input terminal 11 of the current sense circuit 10D and the input current I2 to the second input terminal 12 are sufficiently smaller than the load current Is. For example, when the load current Is is several A to several tens A While the input currents I1 and I2 are several μA in contrast to the conventional ones.

  The current sense circuit 10D includes first and second resistors R1 and R2, a first operational amplifier 15A, a second operational amplifier 15B, a third operational amplifier 16, and third, fourth and fifth resistors R3 and R4. , R5, a first output transistor M1 of NMOS, second and third output transistors M2 and M3 of PMOS, and first and second reverse current blocking diodes D1 and D2.

  The input terminal 11 of the current sense circuit 10D is connected to the noninverting input terminal of the operational amplifier 15A, the inverting input terminal of the operational amplifier 15B, and the anode of the backflow prevention diode D1 through the resistor R1. The input terminal 12 of the current sense circuit 10D is connected to the inverting input terminal of the operational amplifier 15A, the noninverting input terminal of the operational amplifier 15B, and the cathode of the backflow prevention diode D2 via the resistor R2.

  The output terminal of the operational amplifier 15A is connected to the gate of the output transistor M1, and the output terminal of the operational amplifier 15B is connected to the gate of the output transistor M2. The drain of the output transistor M1 is connected to the cathode of the backflow prevention diode D1, and the source is connected to the detection output terminal 14. The drain of the output transistor M2 is connected to the anode of the backflow prevention diode D2, and the source is connected to the inverting input terminal of the operational amplifier 16 and one end of the resistor R3. The gate of the output transistor M 3 is connected to the output terminal of the operational amplifier 16, the source is connected to the non-inverted input terminal of the operational amplifier 16, and the drain is connected to the detection output terminal 14. The source of the output transistor M3 is connected to one end of the resistor R4. The other ends of the resistors R3 and R4 are connected to the positive voltage source 3.

  First, the circuit operation regarding the operational amplifier 15A will be described. The operational amplifier 15A pulls up the voltage of the output terminal when the voltage of the inverting input terminal is lower than the voltage of the non-inverting input terminal, raises the gate voltage of the output transistor M1, and increases the output current Im1 of the output transistor M1. Since the output transistor M1 is connected to the input terminal 11 via the backflow prevention diode D1 and the resistor R1, the input current I1 also increases by the current increase of the output current Im1. When the input current I1 increases, the voltage drop at the resistor R1 increases, and the voltage at the non-inverting input terminal of the operational amplifier 15A decreases. Finally, the output current Im1 increases until the voltages of the non-inverted input terminal and the inverted input terminal of the operational amplifier 15A become the same potential.

Here, calculating the input current of the non-inverting input terminal and Ia ⁺ of the amplifier 15A, the input current of the inverting input terminal Ia ^- If that relationship of the output current Im1 to input voltage Vs, as shown in (1) Become.

Equation (2) is obtained by defining the resistors R1 and R2 and the input currents Ia ⁺ and Ia ⁻ to be equal to each other for simplification.

Further, since the output current Im1 flows through the resistor R5, the detection voltage V1 is expressed by the equation (3).

Substituting equation (2) into equation (3), input voltage Vs Equation (4) is obtained by solving for the detected voltage V1 for.

  As described above, the operational amplifier 15A outputs the detection voltage V1 which is a ratio multiple of the resistors R1 and R5 with respect to the input voltage Vs. For example, assuming that R1 = R2 = 5 kΩ and R5 = 50 kΩ, the detection voltage V1 is 10 times the input voltage Vs.

  Here, the in-phase input voltage range of the current sense circuit 10D related to the operational amplifier 15A will be described. The detection output terminal 14 of the current sense circuit 10D is connected to the input terminal 11 via the output transistor M1, the backflow prevention diode D1 and the resistor R1, and the output current Im1 is supplied from the input terminal 11. That is, if the voltage Vin of the input terminal 11 is not more than the sum of the detection voltage V1, the overdrive voltage Vod1 of the output transistor M1, the forward voltage Vfd1 of the backflow prevention diode D1 and the input voltage Vs, a desired output voltage can not be obtained. .

Assuming that the minimum value of the in-phase input voltage of the operational amplifier 15A is Voffa, equation (5) is obtained.

Here, since Ia ⁺ << Im1, the equation (6) can be obtained from the equations (2) and (5) if Ia ⁺ is omitted.

のようになり、同相入力電圧Ｖoffa の最低値は１．８Ｖとなる。 For example, assuming that Vfd1 = 0.6 V, Vod1 = 0.1 V, R1 = 5 kΩ, R5 = 50 kΩ, and Vs = 0.1 V, equation (6) is

The minimum value of the common mode input voltage Voffa is 1.8V.

  Subsequently, the circuit operation regarding the operational amplifier 15B will be described. The operational amplifier 15B lowers the output voltage when the voltage at the non-inverting input terminal is lower than the voltage at the inverting input terminal, lowers the gate voltage of the output transistor M2, and increases the output current Im2 of the output transistor M2. The output transistor M2 supplies a current to the input terminal 12 via the backflow prevention diode D2 and the resistor R2. When the output current Im2 flows through the resistor R2, the voltage of the non-inverting input terminal of the operational amplifier 15B increases. Finally, the output current Im2 increases until the voltages of the non-inverted input terminal and the inverted input terminal of the operational amplifier 15B become the same potential.

The input current of the non-inverting input terminal here operational amplifier 15B and Ib ^+, the input current of the inverting input terminal Ib ^- if that relationship for the output current Im2 to input voltage Vs becomes as shown in (8) .

Equation (9) is obtained by defining resistors R1 and R2 and input currents Ib ⁺ and Ib ⁻ to have the same value for simplification.

The operational amplifier 16 controls the output transistor M3 so that the inverting input terminal and the non-inverting input terminal are at the same potential. Here, if the resistors R3 and R4 have the same value, the currents naturally become equal, so the output current Im3 of the output transistor M3 becomes equal to the output current Im2, and the output current Im3 is expressed by equation (10).

Since the output current Im3 flows through the resistor R5, the detection voltage V1 is expressed by equation (11).

  That is, the operational amplifier 15B outputs the detection voltage V1 which is a ratio multiple of the resistors R2 and R5 with respect to the input voltage Vs. For example, assuming that R1 = R2 = 5 kΩ and R5 = 50 kΩ, the detection voltage V1 is 10 times the input voltage Vs, and a gain similar to that of the operational amplifier is obtained.

  Next, the in-phase input voltage range of the current sense circuit 10D related to the operational amplifier 15B will be described. The power supply voltage V + of the current sense circuit 10D is connected to the input terminal 12 via the resistor R3, the output transistor M2, the backflow prevention diode D2 and the resistor R2, and the output current Im3 is supplied from the power supply voltage V +. That is, if the in-phase input voltage is not less than the sum of the voltage drop of the resistor R3, the overdrive voltage Vod2 of the output transistor M2, the forward voltage Vfd2 of the backflow prevention diode D2 and the input voltage Vs with respect to the power supply voltage V +, The detection voltage V1 can not be obtained.

Assuming that the maximum value of the in-phase input voltage with respect to the power supply voltage of the operational amplifier 15B is Voffb, equation (12) is obtained.

のようになり、同相入力電圧Ｖoffb は電源電圧に対して最低でも０．９Ｖだけ低いことが必要である。 For example, assuming that the forward voltage Vfd2 = 0.6 V, the overdrive voltage Vod2 = 0.1 V, R2 = R3 = 5 kΩ, and the input voltage Vs = 0.1 V, according to the equation (12)

The common mode input voltage Voffb needs to be at least 0.9 V lower than the power supply voltage.

  As described above, the operational amplifier 15A is a useful circuit when the common mode input voltage is high, and the operational amplifier 15B is a useful circuit when the common mode input voltage is low. The in-phase input voltage range can be expanded by using these two types of operational amplifiers 15A and 15B as inputs (see FIG. 6).

  Here, the backflow prevention diode D1 will be described. In the case of the operational amplifier 15A, the path through which the output current Im1 flows is a path from the input terminal 11 to GND through the resistor R1, the backflow prevention diode D1, the output transistor M1, and the resistor R5. At this time, if the reverse current prevention diode D1 is not connected, a reverse current flows from the GND to the input terminal 11 when the in-phase input is a negative voltage.

  On the other hand, in the case of the operational amplifier 15B, the path through which the output current Im2 flows is a path flowing from the positive power source 3 to the input terminal 12 through the resistor R3, the output transistor M2, the backflow prevention diode D2 and the resistor R2. Here, if the backflow prevention diode D2 is not connected, a backflow current flows from the input terminal 12 to the positive power supply 3 when the in-phase input voltage is higher than the power supply voltage V +.

  When the current sense circuit 10D described with reference to FIG. 4 is formed as an integrated circuit on a P-type semiconductor substrate, the PMOS output transistors M2 and M3 have the structure shown in FIG. In FIG. 8A, 21 is a P-type substrate, 22 is an N-type buried layer, 23 is an N-type epitaxial layer, 24 is a P-type element isolation layer, 25 is a P-type well, 26 is a P-type diffusion layer, 27 Is an N-type diffusion layer, and 28 is a gate electrode. 29 is a gate terminal, 30 is a drain terminal, and 31 is a source / back gate terminal. Then, as shown in FIG. 6B, a parasitic body diode Da1 is generated between the source / back gate terminal 31 and the drain terminal 30 with the side of the source / back gate terminal 31 as a cathode as shown in FIG. . In addition, a parasitic diode Db1 is generated between the source / back gate terminal 31 and the P type semiconductor substrate (GND) 21 with the source / back gate terminal 31 as a cathode.

  In the case of the NMOS output transistor M1, the structure shown in FIG. 9A is obtained. The same reference numerals as in FIG. 8 (a) denote the same components. Then, as shown in FIG. 7B, a parasitic body diode Da2 is generated between the source / back gate terminal 31 and the drain terminal 30 with the drain terminal 30 as a cathode. In addition, a parasitic diode Db2 is generated between the drain terminal 30 and the P-type semiconductor substrate (GND) 21 with the drain terminal 30 as a cathode.

  Furthermore, in the case of the backflow prevention diodes D1 and D2, the structure is as shown in FIG. 32 is an anode terminal and 33 is a cathode terminal. Then, as shown in FIG. 6B, a parasitic diode Db3 having a cathode terminal 32 as a cathode is disposed between the cathode terminals 32 of the diodes D1 and D2 and the P type semiconductor substrate (GND) 21 as shown in FIG. Generate

  As a result of the above, when the circuit shown in FIG. 4 is configured as an integrated circuit on a P-type semiconductor substrate, it becomes as shown in FIG. 5 and the operational amplifier 15A is realized by the parasitic diode Db2 of the drain of the NMOS output transistor M1. The current flows backward in the direction of the input terminal 11 regardless of the control of the circuit, so that the backflow prevention diode D1 is also required in this aspect to detect the in-phase input up to a negative voltage.

  In addition, since the current flows backward in the direction of the voltage source 3 regardless of the control of the operational amplifier 15B by the body diode Da1 of the drain of the PMOS output transistor M2, the common mode input of the power supply voltage + V or more is In order to detect, the backflow prevention diode D2 is required.

U.S. Patent No. 7239204

  However, when the backflow prevention diode D2 is connected, the backflow prevention diode D2 has a parasitic diode Db3 on the cathode side, so when the in-phase input voltage is a negative voltage, the input is made via the parasitic diode Db3 of the backflow prevention diode D2. Since a leak current flows to the terminal 12, there is a problem of causing a malfunction.

  An object of the present invention is to provide a current sense circuit in which the occurrence of a malfunction is prevented by eliminating the influence of a parasitic diode.

  In order to achieve the above object, the invention according to claim 1 comprises a first input terminal connected to the side of the signal input terminal of a sense resistor connected between the signal input terminal and a load, and the sense resistor Current sensing circuit comprising a second input terminal connected to the load side, a power supply terminal, and a detection output terminal, and outputting a voltage corresponding to the current flowing through the sense resistor to the detection output terminal. A first operational amplifier in which an inverting input terminal is connected to the first input terminal via a first resistor, and an inverting input terminal is connected to the second input terminal via a second resistor; A second operational amplifier connected to the first input terminal via a resistor, and a non-inverted input terminal connected to the second input terminal via the second resistor, and a gate being an output of the first operational amplifier Connected to the terminal and the source A first transistor of a first conductivity type connected to the output terminal, a first backflow preventing diode having an anode connected to the non-inverting input terminal of the first operational amplifier and a cathode connected to the drain of the first transistor; A second transistor of the second conductivity type having a gate connected to the output terminal of the second operational amplifier and a source connected to the power supply terminal via a third resistor, and an anode connected to the drain of the second transistor A second backflow preventing diode connected to the non-inverting input terminal of the second operational amplifier, an inverting input terminal connected to the source of the second transistor, and a non-inverting input terminal to the power supply terminal via a fourth resistor A third operational amplifier connected, a gate connected to the output terminal of the third operational amplifier, and a source connected to the non-inverting input terminal of the third operational amplifier A third transistor of the second conductivity type having a drain connected to the detection output terminal, and a fifth resistor connected between the detection output terminal and the ground, the cathode of the second backflow prevention diode and the second resistance A second conductivity type of which the gate is grounded, the source is connected to the cathode of the second backflow preventing diode, and the drain is connected to the noninverting input terminal of the second operational amplifier, between the noninverting input terminal of the operational amplifier A fourth transistor is insert-connected and formed on a P-type semiconductor substrate.

  The invention according to claim 2 is the current sensing circuit according to claim 1, wherein the anode is connected to the second input terminal and the cathode is connected to the gate of the fourth transistor; A current source is connected between the cathode of three reverse current transistors and the ground, and the gate of the fourth transistor is disconnected from the ground.

  The invention according to claim 3 is the current sensing circuit according to claim 2, wherein the second backflow preventing diode has a drain connected to the drain of the second transistor and a source connected to the source of the fourth transistor. Are replaced by a fifth transistor of the second conductivity type connected to the gate of the fourth transistor.

  The invention according to claim 4 relates to the current sensing circuit according to claim 1, 2 or 3, wherein the first backflow preventing diode, the gate is connected to the first input terminal, and the source is not the first operational amplifier. A sixth transistor of the first conductivity type is connected to the inverting input terminal and the drain is connected to the drain of the first transistor.

  The invention according to claim 5 is characterized in that, in the current sense circuit according to claim 4, the sixth transistor is a depletion transistor.

  According to the present invention, when the current sense circuit is manufactured by a process using a P-type semiconductor substrate, the influence of a parasitic diode can be eliminated to prevent the occurrence of a malfunction.

FIG. 1 is a circuit diagram of a current sense circuit according to a first embodiment of the present invention. It is a circuit diagram of the current sensing circuit of the 2nd example of the present invention. It is a circuit diagram of the current sensing circuit of the 3rd example of the present invention. It is a circuit diagram of the conventional current sensing circuit. FIG. 5 is a circuit diagram of the current sense circuit of FIG. 4 with parasitic diodes associated with it when fabricated in a process using a P-type semiconductor substrate. It is explanatory drawing of the in-phase input voltage range of operational amplifier 15A, 15B. It is explanatory drawing of the in-phase input voltage range of operational amplifier 15A, 15B when the power supply voltage V + falls. It is sectional drawing of the PMOS transistor manufactured by the process of using a P-type semiconductor substrate. It is sectional drawing of the NMOS transistor manufactured by the process of using a P-type semiconductor substrate. It is sectional drawing of the diode manufactured by the process of using a P-type semiconductor substrate.

First Embodiment
FIG. 1 shows a current sense circuit 10A according to a first embodiment of the present invention. The same components as those described in the current sense circuit 10D of FIGS. 4 and 5 are denoted by the same reference numerals, and redundant description will be omitted. In the current sense circuit 10A of this embodiment, a PMOS transistor M4 for positive voltage clamping is inserted and connected between the backflow prevention diode D2 and the resistor R2. The gate of the transistor M4 is grounded to GND, the source is connected to the cathode of the backflow prevention diode D2, and the drain is connected to one end of the resistor R2.

  The operation of the positive voltage clamp transistor M4 will be described. In order for the transistor M4 to be turned on, the source voltage of the transistor M4 needs to be higher than the gate voltage by at least the threshold voltage. For this reason, the node N1 of the cathode of the backflow prevention diode D2 connected to the source of the transistor M4 is controlled to a positive voltage regardless of the in-phase input voltage. Thereby, even when the in-phase input voltage becomes a negative voltage, it is possible to avoid the leak current flowing in the direction of the input terminal 12 via the parasitic diode Db3 of the backflow prevention diode D2, and a process using a P-type semiconductor substrate However, the common mode input voltage range can be extended to a negative voltage.

Second Embodiment
FIG. 2 shows a current sense circuit 10B according to a second embodiment of the present invention. Description of circuits common to the current sense circuit 10A of the first embodiment will be omitted. When the transistor M4 is connected, the maximum value of the in-phase input voltage is limited by the breakdown voltage between the gate and the source of the transistor M4.

  Therefore, in the present embodiment, as shown in FIG. 2, the backflow prevention diode D3 and the current source 17 are added, and the gate of the transistor M4 is connected to the cathode of the backflow prevention diode D3. When the in-phase input voltage is a positive voltage, a current flows from the input terminal 12 to the current source 17 via the backflow prevention diode D3. Therefore, a voltage that is lower than the input terminal 12 by the forward voltage Vfd3 of the backflow prevention diode D3 is applied to the gate of the transistor M4. When the in-phase input voltage is a negative voltage, no current flows due to the backflow prevention diode D3, so the gate of the transistor M4 is fixed at the GND level. In order for the transistor M4 to be in the ON state, the source voltage needs to be higher than the gate voltage by at least the threshold, and the gate voltage never falls below GND. Therefore, the node N1 which is the source of the transistor M4 has an in-phase input voltage It is controlled to a positive voltage regardless of. Further, since the gate voltage of the transistor M4 is controlled in accordance with the in-phase input voltage, the maximum value of the in-phase input voltage can be expanded without applying an overvoltage between the gate and the source.

Third Embodiment
FIG. 3 shows a current sense circuit 10C according to a third embodiment of the present invention. The description of the circuit common to the current sense circuit 10B of the second embodiment will be omitted. The current sense circuit 19C of the third embodiment is a circuit in which the backflow prevention diode D2 of the current sense circuit 10B of the second embodiment is replaced by a PMOS backflow prevention transistor M5 and the backflow prevention diode D1 is replaced by an NMOS backflow prevention transistor M6. It is.

  The backflow prevention transistor M5 has a gate connected to the gate of the voltage clamp transistor M4, a drain connected to the drain of the output transistor M2, and a source connected to the source of the transistor M4. The backflow prevention transistor M6 has a gate connected to the input terminal 11, a source connected to the resistor R1, and a drain connected to the drain of the output transistor M1. Even when only the backflow prevention diode D1 is replaced with the backflow prevention transistor M6 and only the backflow prevention diode D2 is replaced with the backflow prevention transistor M5, the operation is performed without any problem.

  An advantage of using the backflow prevention transistors M5 and M6 instead of the backflow prevention diodes D1 and D2 is that the voltage drop in the backflow prevention diodes D1 and D2 can be suppressed. As described above, in order to allow the operational amplifiers 15A and 15B to operate normally, it is necessary to have a potential greater than that of the equations (6) and (12) with respect to GND or with respect to the power supply.

  The detectable range of each operational amplifier 15A, 15B is shown as shown in FIG. However, when the power supply voltage V + is low, as shown in FIG. 7, the undetectable regions of the operational amplifier 15A and the operational amplifier 15B overlap, so that the minimum value of the power supply voltage V + can be restricted.

  As a means for avoiding this, in the current sense circuit 10D, the maximum value of the detection voltage V1 is suppressed by increasing the gain of the output circuit 4. However, increasing the gain of the output circuit 4 leads to amplification of the offset voltage of the output circuit 4, and therefore there is a trade-off between detection accuracy and the power supply voltage range.

  Here, a circuit in which the backflow prevention diodes D2 and D1 are replaced with the backflow prevention transistors M5 and M6 will be described. The backflow prevention transistor M5 is turned on when the in-phase input voltage is lower than the power supply voltage V +, and the body diode Da1 operates as a backflow prevention diode in the region where the in-phase input voltage is higher than the power supply voltage V +. Although the backflow prevention diode D2 restricted the in-phase input voltage range in the region below the power supply voltage V +, the backflow prevention transistor M5 is in the ON state in that region, so the body diode of the backflow prevention transistor M5 The influence of the forward voltage drop of Da1 can be eliminated.

  On the other hand, in the case of the backflow prevention transistor M6, the in-phase input voltage is turned ON in the positive voltage region by using the depletion transistor. Since the gate voltage is lowered when the current flows back by connecting the gate to the input terminal 11, the backflow prevention transistor M6 turns the depletion transistor OFF. When the in-phase input voltage is a negative voltage, the body diode Da2 of the transistor M6 operates as a backflow prevention diode.

  The reverse current blocking diode D1 limits the in-phase input voltage range in the positive voltage range, in which the reverse current blocking transistor M6 is in the ON state, so the forward direction of the body diode Da2 of the reverse current blocking transistor M6 It is possible to eliminate the influence of voltage drop.

  In this manner, in the present embodiment, by eliminating the voltage drops Vdf1 and Vdf2 generated when the backflow prevention diodes D1 and D2 are used, the undetectable regions of the operational amplifiers 15A and 15B are reduced to provide the power supply voltage range. And the accuracy of detection can be improved.

1: Signal input terminal 2: Load 3: Voltage source 4: Output circuit 10A to 10D: current sense circuit 11: first input terminal 12: second input terminal 13: power supply terminal 14: detection output Terminals 15A: first operational amplifier 15B: second operational amplifier 16: third operational amplifier 17: current source 21: P type substrate 22: N type buried layer 23: N type epitaxial layer 24: 24 P-type element isolation layer 25: P-type well 26: P-type diffusion layer 27: N-type diffusion layer 28: gate electrode 29: gate terminal 30: drain terminal 31: source / back gate terminal 32 Anode terminal 33: Cathode terminal

Claims (5)

A first input terminal connected to the signal input terminal side of the sense resistor connected between the signal input terminal and the load, a second input terminal connected to the load side of the sense resistor, and a power supply A current sense circuit comprising a terminal and a detection output terminal, wherein a voltage corresponding to a current flowing through the sense resistor is output to the detection output terminal.
A first operational amplifier having a non-inverted input terminal connected to the first input terminal via a first resistor, and an inverted input terminal connected to the second input terminal via a second resistor;
A second operational amplifier having an inverting input terminal connected to the first input terminal via the first resistor and a non-inverting input terminal connected to the second input terminal via the second resistor;
A first transistor of a first conductivity type, the gate of which is connected to the output terminal of the first operational amplifier and the source of which is connected to the detection output terminal;
A first backflow preventing diode having an anode connected to the non-inverting input terminal of the first operational amplifier and a cathode connected to the drain of the first transistor;
A second transistor of a second conductivity type, the gate of which is connected to the output terminal of the second operational amplifier and the source of which is connected to the power supply terminal via a third resistor;
A second backflow preventing diode having an anode connected to the drain of the second transistor and a cathode connected to the non-inverting input terminal of the second operational amplifier;
A third operational amplifier having an inverting input terminal connected to the source of the second transistor and a non-inverting input terminal connected to the power supply terminal via a fourth resistor;
A third transistor of the second conductivity type having a gate connected to the output terminal of the third operational amplifier, a source connected to the non-inverting input terminal of the third operational amplifier, and a drain connected to the detection output terminal;
A fifth resistor connected between the detection output terminal and the ground;
The gate is grounded, the source is connected to the cathode of the second backflow preventing diode, and the drain is not connected between the cathode of the second backflow preventing diode and the non-inverting input terminal of the second operational amplifier. A fourth transistor of the second conductivity type connected to the inverting input terminal is inserted and connected,
A current sense circuit formed on a P-type semiconductor substrate. In the current sense circuit according to claim 1,
A third backflow preventing diode having an anode connected to the second input terminal and a cathode connected to the gate of the fourth transistor, and a current source connected between the cathode of the third backflow transistor and the ground; The current sensing circuit according to claim 1, wherein the gate of the fourth transistor is disconnected from the ground directly. In the current sense circuit according to claim 2,
The fifth transistor of the second conductivity type, wherein the second backflow preventing diode is connected to the drain of the second transistor, the source is connected to the source of the fourth transistor, and the gate is connected to the gate of the fourth transistor A current sense circuit characterized in that it is replaced by In the current sense circuit according to claim 1, 2 or 3,
In the first conductivity type, the first backflow preventing diode has a gate connected to the first input terminal, a source connected to the non-inverting input terminal of the first operational amplifier, and a drain connected to the drain of the first transistor A current sense circuit characterized in that it is replaced by a sixth transistor. In the current sense circuit according to claim 4,
The current sensing circuit according to claim 6, wherein the sixth transistor is a depletion transistor.

Images