JP2017009340A - Current detecting circuit having electrostatic protection circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a current detecting circuit having an electrostatic protection circuit that is enabled to reduce leak currents attributable to the electrostatic protection circuit even in a current detecting circuit for detecting micro-currents.SOLUTION: A current detecting circuit 1 is connected from an input terminal IN to the input terminal of an amplifier circuit 3 via a resistor 2 and a signal line L. A reference voltage 5 is connected to the input terminal of the amplifier circuit 3 via a buffer circuit 6. To the signal line L, a series circuit of diodes 7 and 8 is connected as a first protector circuit 11 and a series circuit of diodes 9 and 10 is connected as a second protector circuit 12. A depletion type PMOS 13 is connected between a node B and the ground, an NMOS 14 is connected between a node C and a power supply line VD, and the two gates are connected to the signal line L. Since there is zero between the diodes 7 and 9 in a normal state, reverse-direction leak currents are restrained.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a current detection circuit with an electrostatic protection circuit.

  Some IC circuits employ a configuration in which a diode is connected to the power supply or ground side as a countermeasure against static electricity at the terminals. During normal use, the potential of the signal line connected to the terminal is an intermediate potential between the power supply and the ground, and therefore, a reverse voltage is applied to the diode and the reverse direction is blocked. When static electricity enters from the terminal, the static electricity is released from the signal line to the power supply side or the ground side via the diode.

  By the way, in a current detection circuit for detecting a minute current, a minute off-leakage current flows in a state where a reverse voltage is applied to the diode during normal use, and this is transmitted to the signal line, which causes a bad influence on the detection accuracy. In order to reduce such an off-leakage current, there is a method of reducing the area of the pn junction of the diode.

  On the other hand, in order to ensure electrostatic resistance, it is necessary to increase the current capacity by increasing the pn junction area of the diode. However, when the pn junction area of the diode is increased, the minute off-leakage current is increased. For a current detection circuit that detects a minute current, the minute leakage current of the diode and the electrostatic tolerance are in a trade-off relationship, and as a result, the current detection accuracy that can be realized is restricted to ensure the electrostatic tolerance.

JP 2007-151065 A JP-A-2005-45539

  The present invention has been made in consideration of the above circumstances, and an object of the present invention is to provide a current detection circuit with an electrostatic protection circuit capable of reducing leakage current by the electrostatic protection circuit even in a current detection circuit for detecting a minute current. Is to provide.

  The current detection circuit with an electrostatic protection circuit according to claim 1, wherein an input line to which a current to be detected is input, an amplifier circuit for amplifying the current input to the input line, the input line and a positive power source A plurality of diodes provided between the input line and the negative power supply line, and a plurality of diodes provided between the input line and the negative power supply line. A second protection circuit connected in series so that the input line side becomes a cathode, and at least one of the plurality of diodes constituting the first protection circuit is arranged on the positive power supply line side A first shared voltage reduction circuit that lowers the shared voltage of the remaining diodes excluding the diode; and the negative power supply line of the plurality of diodes that constitute the second protection circuit. And includes at least one of the second divided voltage reduction circuit to reduce the divided voltage of the remaining diode except at least one of said diodes being arranged on the side.

  By adopting the above configuration, when static electricity is input, the circuit is protected because it is bypassed by the first protection circuit or the second protection circuit. In a normal state, at least a reverse leakage current caused by a diode of the first protection circuit and the second protection circuit is reduced by a first shared voltage reduction circuit or a second shared voltage reduction circuit with respect to a signal input to the input line. One will be reduced. This is because when the first shared voltage reduction circuit is provided, the voltage applied to both ends of the diode of the first protection circuit is reduced by the first shared voltage reduction circuit, thereby reducing the reverse leakage current. Because.

  Thereby, in the current detection operation, it is possible to suppress a decrease in detection accuracy of the current input to the input line due to the reverse leakage current flowing from the first protection circuit to the input line. Moreover, it can suppress that the reverse direction current flows into an input line from the 2nd protection circuit, and the detection accuracy of the electric current input into the input line falls.

Electrical configuration diagram showing the first embodiment Electrical configuration diagram showing the second embodiment (part 1) Electrical configuration (Part 2) Electrical configuration diagram showing the third embodiment Electrical configuration diagram showing the fourth embodiment Electrical configuration diagram showing the fifth embodiment Electrical configuration diagram showing the sixth embodiment

(First embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to FIG.
FIG. 1 shows a minute current detection circuit 1 constituting a transimpedance amplifier. A minute current input to the input terminal IN is converted into a voltage signal and output to the output terminal OUT.

  The input terminal IN is connected to the signal line L via the input resistor 2, and the signal line L is connected to one input terminal of the amplifier circuit 3. The output of the amplifier circuit 3 is output to the output terminal OUT. A feedback resistor 4 is connected between the output terminal OUT and the input terminal IN. A DC power supply 5 that supplies a reference voltage Vf is connected to the other input terminal of the amplifier circuit 3 via a voltage follower circuit 6.

  In the signal line L, at the node A close to the input resistor 2, electrostatic protection diodes 7 and 8 are connected in series to a power supply line VD as a positive power supply line. It is connected in series to the ground GND as a negative power supply line. In this case, the diodes 7 and 8 are connected such that the anode is on the connection point A side. The diodes 9 and 10 are connected such that the cathode is on the connection point A side. The diodes 7 and 8 function as the first protection circuit 11, and the diodes 9 and 10 function as the second protection circuit 12.

  A node B, which is a common connection point of the diodes 7 and 8, is connected to the ground GND via the source and drain of a depletion type p-channel MOSFET (PMOS) 13. A node C, which is a common connection point between the diodes 9 and 10, is connected to the power supply terminal VD through the source and drain of a depletion type n-channel MOSFET (NMOS) 14. The gates of the PMOS 13 and the NMOS 14 are connected to the signal line L through gate resistors 13a and 14a, respectively. The PMOS 13 and the NMOS 14 correspond to a first shared voltage reduction circuit and a second shared voltage reduction circuit, respectively.

  Next, the operation of the above configuration will be described. First, in a state of detecting a minute current that is a normal operation, a minute current input from the input terminal IN flows into the signal line L and is input to the amplifier circuit 3. The amplifier circuit 3 outputs a voltage signal obtained by multiplying a minute current by the resistance value of the feedback resistor 4 to the output terminal OUT. At this time, if the reverse leakage current affects the signal line L via the diodes 7 and 9 and the like, the level of the minute current to be detected fluctuates and the detection accuracy decreases.

  On the other hand, in the present embodiment, the first shared voltage reduction circuit and the second shared voltage reduction circuit are provided so that the reverse leakage current by the first protection circuit 11 and the second protection circuit 12 is reduced as much as possible. Yes.

  Since the PMOS 13 serving as the first shared voltage reduction circuit is a depletion type PMOS, the threshold voltage Vt is set to be almost zero. As a result, the source potential of the PMOS 11 is substantially the same as the voltage of the signal line L applied to the gate, and the node B of the diodes 7 and 8 is substantially the same potential as the signal line L. As a result, the potential difference between the cathode and the anode of the diode 7 connected to the signal line L becomes almost zero, and the reverse leakage current due to the diode 7 hardly occurs.

  On the other hand, since the potential of the node B is substantially equal to the potential of the signal line L, the voltage between the power supply line VD and the signal line L is applied between the terminals of the diode 8, and the diode 8 leaks in the reverse direction. This is a state where electric current is generated. However, since the reverse leakage current generated by the diode 8 flows from the anode to the ground GND side via the PMOS 11, it is possible to suppress the reverse leakage current from flowing into the signal line L.

  Similarly, the NMOS 14 as the second shared voltage reduction circuit is a depletion type NMOS, and therefore the threshold voltage Vt is set to be substantially zero. As a result, the NMOS 14 has substantially the same potential as the signal line L applied to the gate at the source potential, and the node C between the diodes 9 and 10 has substantially the same potential as the signal line L. As a result, the potential difference between the cathode and the anode of the diode 9 connected to the signal line L becomes almost zero, and the reverse leakage current due to the diode 9 hardly occurs.

  On the other hand, since the potential of the node C is substantially equal to the potential of the signal line L, a voltage between the signal line L and the ground GND is applied between the terminals of the diode 10, and the diode 10 has a reverse leakage current. It is a state that generates. However, since the reverse leakage current generated by the diode 10 flows from the power supply line VD to the ground GND side through the path via the NMOS 14, it is possible to suppress the reverse leakage current from flowing through the signal line L.

  As a result, in the normal state where static electricity is not input, the reverse leakage current from the first protection circuit 11 and the second protection circuit 12 is bypassed to the power supply line VD and the ground GND side by the PMOS 13 and the NMOS 14. A minute current detection operation can be performed in a state where the signal line L is not affected.

  When static electricity is input from the input terminal IN, the first protection circuit 11 and the second protection circuit 12 are respectively connected to the power supply VD side via the diodes 7 and 8 or to the ground GND side via the diodes 9 and 10. Static electricity can be released, and thus the amplifier circuit 3 can be protected from static electricity.

According to the first embodiment, the diodes 7 and 8 constituting the first protection circuit 11 and the diodes 8 and 10 constituting the second protection circuit 12 ensure the electrostatic protection operation, while the PMOS 13 and the NMOS 14 By bypassing the reverse leakage current, the influence on the signal line L can be suppressed, and the detection operation of the minute current flowing in the signal ship L can be accurately performed.
In addition, this makes it possible to provide the diodes 7 to 10 without sacrificing electrostatic resistance such as reducing the area of the pn junction in order to reduce the reverse leakage current.

(Second Embodiment)
2 and 3 show the second embodiment, and only the parts different from the first embodiment will be described below. In this embodiment, as the minute current detection circuit 1a, the connection position of the first protection circuit 11 and the second protection circuit 12 with the signal line L is on the amplification circuit 3 side. The connection position of the gates of the PMOS 13 and NMOS 14 to the signal line L is between the input resistor 2 and the node A. This is a portion close to the input terminal of the amplifier circuit 3.

  Further, in the circuit shown in FIG. 2, gate input resistors 13 a and 14 b are not provided between the gate and the signal line L for the PMOS 13 and the NMOS 14, and the gate is directly connected to the signal line L. In this case, the input resistor 2 connected to the input terminal IN side can function as a gate input resistor.

Further, in the configuration shown in FIG. 3, the minute current detection circuit 1c has a configuration in which the gate input resistors 13a and 14b are independently connected in the configuration of FIG. In this case, the amplifier circuit 3 can be adjusted by the input resistor 2, and the PMOS 13 and the NMOS 14 can be adjusted by the gate input resistors 13a and 14a, respectively.
According to the second embodiment as described above, it is possible to obtain substantially the same operational effects as those of the first embodiment.

(Third embodiment)
FIG. 4 shows the third embodiment. Hereinafter, parts different from the second embodiment will be described. 4 includes a first protection circuit 11a instead of the first protection circuit 11 and a second protection circuit 12a instead of the second protection circuit 12 in the minute current detection circuit 1a shown in FIG. Is provided. The first protection circuit 11a is configured such that the diode 8 between the power supply line VD and the node B is connected in series with two or more diodes 8a, 8b,. The second protection circuit 12a is configured such that the diode 10 between the ground GND and the node C is connected in series with two or more diodes 10a, 10b,.

  According to the above configuration, in the normal state, the reverse voltage shared by one diode 8 in the above embodiment is shared by the plurality of diodes 8a, 8b,. Directional leakage current can be reduced. Similarly, since the reverse voltage shared by one diode 10 is shared by the plurality of diodes 10a, 10b,..., The reverse leakage current in this portion can be reduced.

According to the third embodiment, it is possible to obtain substantially the same as that of the first embodiment, and further, it is possible to have a configuration in which the reverse leakage current is further reduced and bypassed.
In the above configuration, two or more of the plurality of diodes 8a, 8b,..., Or 10a, 10b,. When the number of diodes used is large, the element area increases, but the effect of reducing the shared voltage increases.

(Fourth embodiment)
FIG. 5 shows a fourth embodiment. Hereinafter, parts different from the third embodiment will be described. The minute current detection circuit 1d shown in FIG. 5 includes a first protection circuit 11b instead of the first protection circuit 11a and a second protection circuit 12b instead of the second protection circuit 12a in the circuit shown in FIG. . The first protection circuit 11b has a configuration in which the diode 7 between the node A and the node B of the signal line L is connected in series with two diodes 7a and 7b. The second protection circuit 12b is configured such that the diode 9 between the node A and the node C of the signal line L is connected in series with two diodes 9a and 9b.

  According to the above configuration, in the normal state, the reverse leakage current in this portion can be further reduced by providing the two diodes 7a and 7b connected in series in the third embodiment. Similarly, by providing the diodes 9a and 9b connected in series, the reverse leakage current in this portion can be further reduced. Since the depletion type PMOS 13 and NMOS 14 are used, the nodes B and C are set to substantially the same potential as the signal line L. However, even if the threshold voltage is shifted due to variations in the manufacturing process, the reverse direction is obtained. The effect of suppressing the occurrence of leakage current is enhanced.

  According to the fourth embodiment, it is possible to obtain substantially the same as the third embodiment, and further, the diode 7a, 7b or 9a, 9b and two diodes are provided, so that the reverse leakage current is reduced. In this state, the operation in the normal state can be performed.

  In this embodiment, the configuration in which the two diodes 7a and 7b or 9a and 9b are provided is shown. However, three or more diodes are provided between the node A and the node B or between the node A and the node C. It is good also as a structure which connects a diode in series.

  Further, by adopting the above configuration, even when the threshold voltages of the PMOS 13 and the NMOS 14 are not zero, the shared voltage can be reduced by providing the plurality of diodes 7a, 7b or 9a, 9b. The effect of reducing is increased.

  Although this embodiment shows the case where it is applied to the third embodiment, one diode 8, 10 is provided in place of the configuration provided as diodes 8a, 8b,..., 10a, 10b,. The present invention can also be applied to the configurations of the first and second embodiments.

(Fifth embodiment)
FIG. 6 shows the fifth embodiment. Hereinafter, parts different from the first embodiment will be described. In this embodiment, the connection position of the input resistor 2 is changed as the minute current detection circuit 1e. The input resistor 2 is connected between the connection point of the gate of the NMOS 14 and the input terminal of the amplifier circuit 3 in the signal line L.

In this configuration, the gate resistor 13a connected from the signal line L to the gate of the PMOS 13 and the gate resistor 14a connected from the signal line L to the gate of the NMOS 14 are input terminals without the resistor 2 being connected in series. Connected to IN.
Also according to the fifth embodiment, it is possible to obtain substantially the same operational effects as the first embodiment.

(Sixth embodiment)
FIG. 7 shows the sixth embodiment. Hereinafter, parts different from the second embodiment will be described. In this embodiment, as the minute current detection circuit 1f, in the configuration shown in FIG. 2, in place of the PMOS 13 and the NMOS 14, a voltage follower circuit 15 as a first shared voltage reduction circuit, and a voltage follower as a second shared voltage reduction circuit. A circuit 16 is provided. Since the voltage follower circuits 15 and 16 both reflect the input voltage level on the output terminal, the operation can be made substantially the same as in the above-described embodiment.
Also according to the sixth embodiment, it is possible to obtain the same effect as that of the second embodiment.

(Other embodiments)
In addition, this invention is not limited only to one embodiment mentioned above, It can apply to various embodiment in the range which does not deviate from the summary, For example, it can deform | transform or expand as follows. .

  In each of the above embodiments, the depletion type PMOS 13 and NMOS 14 are provided. However, the present invention is not limited to this, and a PMOS or NMOS having a normal threshold voltage can also be used. In this case, a voltage corresponding to the threshold voltage is applied to the diodes 7 and 9 connected between the signal line L and the node B or between the signal line L and the node C in a normal state, and the voltage is caused by the voltage. Reverse leakage current flows. However, the reverse leakage current can be reduced as compared with the conventional structure in which the PMOS 13 and the NMOS 14 are not provided.

  In each of the above embodiments, the configuration in which both the first shared voltage reduction circuit and the second shared voltage reduction circuit are provided has been described, but a configuration having only one of them may be employed. Further, the first shared voltage reduction circuit and the second shared voltage reduction circuit may be configured to include those selected from different embodiments.

  In the drawings, 1, 1a to 1f are minute current detection circuits (current detection circuits with electrostatic protection circuits), 2 is a resistor, 3 is an amplifier circuit, 4 is a feedback resistor, 7 to 10, 7a, 7b, 8a, 8b and 9a. , 9b, 10a, 10b are diodes, 11, 11a, 11b are first protection circuits, 12, 12a, 12b are second protection circuits, 13 is a PMOS (first shared voltage reduction circuit), and 14 is an NMOS (second share). Voltage reduction circuit), 15 is a voltage follower circuit (first shared voltage reduction circuit), 16 is a voltage follower circuit (second shared voltage reduction circuit), L is a signal line, VD is a power supply line (positive power supply line), GND Is a ground (negative power supply line), IN is an input terminal, and OUT is an output terminal.

Claims (8)

An input line (L) to which a current to be detected is input;
An amplifier circuit (3) for amplifying the current input to the input line;
A plurality of diodes (7, 8, 7a, 7b, 8a, 8b,...) Provided between the input line and the positive power supply line (VD) are connected in series so that the positive power supply line side becomes a cathode. A first protection circuit (11, 11a, 11b);
A plurality of diodes (9, 10, 9a, 9b, 10a, 10b,...) Provided between the input line and a negative power supply line (GND) are connected in series so that the input line side serves as a cathode. 2 protection circuits (12, 12a, 12b),
A first shared voltage reduction circuit (13) that lowers the shared voltage of the remaining diodes excluding at least one of the diodes arranged on the positive power line side among the plurality of diodes constituting the first protection circuit (13). 15)
A second shared voltage reduction circuit (14) that lowers the shared voltage of the remaining diodes excluding at least one of the diodes arranged on the negative power supply line side among the plurality of diodes constituting the second protection circuit (14) 16)
A current detection circuit with an electrostatic protection circuit, comprising at least one of the above. The current detection circuit with an electrostatic protection circuit according to claim 1,
The first shared voltage reduction circuit is a P-channel type MOSFET (PMOS) (13), the source is connected to the cathode of the diode (7) to be reduced the shared voltage, the drain is the negative The second shared voltage reduction circuit is connected to a power supply line (GND), the gate is connected to the input line (L), and the second shared voltage reduction circuit is an N-channel MOSFET (NMOS) (14), and the source reduces the shared voltage. A current with an electrostatic protection circuit, characterized in that it is connected to the anode of a diode (9) to be subjected to, a drain is connected to the positive power supply line (VD), and a gate is connected to the input line (L) Detection circuit. The current detection circuit with an electrostatic protection circuit according to claim 2,
The current detection circuit with an electrostatic protection circuit, wherein the PMOS and the NMOS are depletion type MOSFETs (13, 14). In the current detection circuit with an electrostatic protection circuit according to claim 2 or 3,
Each of the gates of the PMOS (13) and the NMOS (14) is connected to the input line (L) via a gate input resistor (13a, 14a). . In the current detection circuit with an electrostatic protection circuit according to any one of claims 2 to 4,
The gates of the PMOS and NMOS are connected to the amplifier circuit side with respect to the input line with respect to the amplifier circuit side than the connection position of the first protection circuit and the second protection circuit. Current detection circuit. The current detection circuit with an electrostatic protection circuit according to claim 1,
The first shared voltage reduction circuit is provided as a voltage follower circuit (15) including an operational amplifier in a path from the input line to the cathode of the diode,
The current detection circuit with an electrostatic protection circuit, wherein the second shared voltage reduction circuit is provided as a voltage follower circuit (16) including an operational amplifier in a path from the input line to the anode of the diode. In the current detection circuit with an electrostatic protection circuit according to any one of claims 1 to 6,
A current detection circuit with an electrostatic protection circuit, wherein an input resistor (2) is provided in a path from the input terminal of the input line to the amplifier circuit. In the current detection circuit with an electrostatic protection circuit according to any one of claims 1 to 7,
The first protection circuit includes three or more diodes (7a, 7b),
The first shared voltage reduction circuit (13) is provided to reduce the shared voltage of two or more diodes of the first protection circuit (11a),
The second protection circuit includes three or more diodes (9a, 9b),
The current detection circuit with an electrostatic protection circuit, wherein the second shared voltage reduction circuit (14) is provided so as to lower a shared voltage of two or more diodes of the second protection circuit (12a).

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