JP2018157080A - Semiconductor device manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method which can successfully bond a circuit layer and a semiconductor element by solid-phase diffusion bonding, and efficiently transfer heat generated in the semiconductor element to an insulation circuit board side to achieve excellent heat dissipation properties.SOLUTION: A semiconductor device manufacturing method includes: a lamination step S01 of laminating a semiconductor element having an element body and a metalization layer which contains metal allowing interdiffusion with aluminum on a circuit layer having a bonding surface with the semiconductor element, which is composed of aluminum or aluminum alloy so as to contact the metalization layer with the circuit layer; and a solid-phase diffusion bonding step S02 of applying pressure to the semiconductor element and an insulation circuit board in a lamination direction and applying heat to the semiconductor element and the insulation circuit board to conduct solid-phase diffusion bonding of the metalization layer of the semiconductor layer and the circuit layer. The heating temperature in the solid-phase diffusion bonding step S02 is within a range equal to or higher than 380°C and less than eutectic temperature of the metal constituting the metalization layer and aluminum.SELECTED DRAWING: Figure 4

Description

  The present invention relates to a method of manufacturing a semiconductor device including an insulating circuit board having a circuit layer formed on one surface of an insulating layer, and a semiconductor element bonded to the circuit layer of the insulating circuit board.

The power module and the thermoelectric module have a structure in which a power semiconductor element and a thermoelectric element are bonded to an insulating circuit substrate in which a circuit layer made of a conductive material is formed on one surface of the insulating layer.
For example, a power semiconductor element for high power control used for controlling wind power generation, electric vehicles, hybrid vehicles, etc. has a large amount of heat generated during operation, and as a substrate on which it is mounted, for example, aluminum nitride or 2. Description of the Related Art Conventionally, an insulated circuit board including a ceramic substrate made of silicon nitride or the like and a circuit layer formed by bonding a metal plate having excellent conductivity to one surface of the ceramic substrate has been widely used. In addition, as an insulating circuit substrate, a substrate in which a metal layer is formed by bonding a metal plate to the other surface of a ceramic substrate is also provided.

For example, Patent Document 1 discloses an insulated circuit board in which a circuit layer and a metal layer made of an aluminum plate or a copper plate are formed on one surface and the other surface of a ceramic substrate.
A heat sink is bonded to the other surface side of the insulating circuit board, and the heat transmitted from the semiconductor element to the insulating circuit board side is dissipated to the outside through the heat sink.

In the above-described semiconductor device, as described in, for example, Patent Document 2, the circuit layer of the above-described insulating circuit board and the semiconductor element are bonded via a solder material. Here, in Patent Document 2, since the circuit layer is made of aluminum or an aluminum alloy, a Ni plating film is formed on the surface of the circuit layer by electrolytic plating or the like, and a solder material is disposed on the Ni plating film. The semiconductor element is joined.
Patent Document 3 proposes a semiconductor device in which a mounting substrate and a drain pad electrode of a semiconductor device are bonded by solid phase diffusion.

Japanese Patent No. 3171234 JP 2004-172378 A JP 2013-175697 A

  Incidentally, as disclosed in Patent Document 2, when the circuit layer and the semiconductor element are joined via a solder material, the thermal conductivity of the solder layer formed between the circuit layer and the semiconductor element is high. Since it is lower than the circuit layer, etc., this solder layer becomes a thermal resistance, and heat generated in the semiconductor element cannot be efficiently transferred to the insulated circuit board side, and the heat dissipation characteristics of the semiconductor device deteriorate. there were.

  On the other hand, in Patent Document 3, since the semiconductor device and the mounting substrate are directly bonded by solid phase diffusion bonding, a solder layer or the like that becomes a thermal resistance is not formed. However, in Patent Document 3, the heating temperature during solid phase diffusion bonding is a relatively low temperature condition of 200 ° C. or more and 350 ° C. or less, and diffusion between the semiconductor device and the mounting substrate is insufficient, There is a possibility that the semiconductor device and the mounting substrate cannot be sufficiently bonded, the bonding interface becomes a thermal resistance, and the heat generated in the semiconductor device cannot be efficiently transferred to the mounting substrate side.

  In particular, recently, the use environment of a semiconductor device is also a high temperature condition, and the amount of heat generated by the semiconductor element itself tends to increase. Therefore, a semiconductor device having more excellent heat dissipation characteristics than ever has been demanded.

  The present invention has been made in view of the above-described circumstances, and can reliably bond a circuit layer and a semiconductor element by solid phase diffusion bonding, and efficiently generates heat generated in the semiconductor element. An object of the present invention is to provide a method for manufacturing a semiconductor device that can be transmitted to the semiconductor device and can obtain a semiconductor device having excellent heat dissipation characteristics.

  In order to solve the above problems and achieve the above object, a method of manufacturing a semiconductor device according to the present invention includes an insulating circuit substrate having a circuit layer formed on one surface of an insulating layer, and a junction on the circuit layer. A semiconductor device comprising: a semiconductor element, a bonding surface of the circuit layer with the semiconductor element is made of aluminum or an aluminum alloy, and the semiconductor element includes an element body; A metallization layer containing a metal that interdiffuses with aluminum, a lamination step of laminating the semiconductor element on the circuit layer so that the metallization layer is in contact with the circuit layer, the semiconductor element and the semiconductor element A solid phase diffusion bonding step of pressurizing and heating an insulating circuit board in the stacking direction and solid-phase diffusion bonding the metallized layer and the circuit layer of the semiconductor element, and The heating temperature in the diffusion bonding step is 380 ° C. or higher, is characterized in that there is a eutectic temperature below the metal and aluminum constituting the metallized layer.

According to the method for manufacturing a semiconductor device having this configuration, the joint surface of the circuit layer with the semiconductor element is made of aluminum or an aluminum alloy, and the semiconductor element includes a metallized layer containing a metal that interdiffuses with aluminum. And the heating temperature in the solid phase diffusion bonding step of pressurizing and heating the semiconductor element and the insulating circuit substrate in the stacking direction and solid-phase diffusion bonding the metallized layer and the circuit layer of the semiconductor element is 380 ° C. or higher. Since the metallization layer is within a range below the eutectic temperature of the metal and aluminum, the circuit layer aluminum and the metallization layer metal can be sufficiently interdiffused, and the semiconductor element. Solid phase diffusion bonding can be reliably performed with the circuit layer. Moreover, it can suppress that a liquid phase arises at the time of joining, and can maintain the shape of a circuit layer.
Since the semiconductor element and the circuit layer are directly bonded by solid phase diffusion bonding, and the semiconductor element and the circuit layer are securely bonded, the heat generated in the semiconductor element is efficiently transferred to the insulating circuit substrate side. A semiconductor device that can transmit and has excellent heat dissipation characteristics can be obtained.

Here, in the method for manufacturing a semiconductor device of the present invention, it is preferable that the metallized layer includes one or more selected from copper, silver, and gold as a metal interdiffusing with aluminum.
Since one or more metals selected from copper, silver, and gold are metals that interdiffuse with aluminum, the heating temperature in the solid phase diffusion bonding step is 380 ° C. or higher, and the copper constituting the metallized layer Even when the temperature is lower than the eutectic temperature of silver, gold and aluminum, the aluminum of the circuit layer and the metal of the metallized layer can be sufficiently interdiffused, and the semiconductor element and the circuit layer Can be reliably joined.

In the method for manufacturing a semiconductor device of the present invention, it is preferable that the metallized layer is eliminated by diffusing a metal constituting the metallized layer in the solid phase diffusion bonding step.
In this case, the metal of the metallized layer is sufficiently diffused, the aluminum of the circuit layer and the metal of the metallized layer can be sufficiently interdiffused, and the semiconductor element and the circuit layer are reliably bonded. Can do.

Furthermore, in the method for manufacturing a semiconductor device of the present invention, it is preferable that a barrier layer made of any one or more of nickel, titanium, and chromium is formed between the metallized layer and the element body. .
In this case, aluminum in the circuit layer and metal in the metallization layer can be prevented from diffusing into the element body, and the characteristics of the semiconductor element can be prevented from changing.

In the method for manufacturing a semiconductor device of the present invention, it is preferable that aluminum in the circuit layer is diffused in the barrier layer.
In this case, since the aluminum of the circuit layer is diffused so as to reach the barrier layer, the aluminum of the circuit layer and the metal of the metallized layer are sufficiently interdiffused, and the semiconductor element and the circuit layer are combined. It can be reliably joined.

  According to the present invention, a circuit layer and a semiconductor element can be reliably bonded to each other by solid phase diffusion bonding, heat generated in the semiconductor element can be efficiently transferred to the insulated circuit board side, and a semiconductor having excellent heat dissipation characteristics It is possible to provide a method for manufacturing a semiconductor device capable of obtaining the device.

It is a schematic explanatory drawing of the semiconductor device (power module) manufactured by the manufacturing method of the semiconductor device which is embodiment of this invention. FIG. 2 is an enlarged explanatory view of a bonding interface between a semiconductor element and a circuit layer in the semiconductor device (power module) shown in FIG. 1. It is expansion explanatory drawing of the metallized layer vicinity before joining of the semiconductor element used by the manufacturing method of the semiconductor device which is embodiment of this invention. It is a flowchart which shows the manufacturing method of the semiconductor device which is embodiment of this invention. It is explanatory drawing which shows the manufacturing method of the semiconductor device which is embodiment of this invention. It is expansion explanatory drawing of the junction interface of the semiconductor element and circuit layer in the manufacturing method of the semiconductor device which is other embodiment of this invention. It is expansion explanatory drawing of the junction interface of the semiconductor element and circuit layer in the manufacturing method of the semiconductor device which is other embodiment of this invention.

Embodiments of the present invention will be described below with reference to the accompanying drawings.
FIG. 1 shows a semiconductor device manufactured by a semiconductor device manufacturing method according to an embodiment of the present invention. The semiconductor device in this embodiment is a power module using a power semiconductor element as a semiconductor element mounted on an insulating circuit board.

  A power module 1 shown in FIG. 1 includes an insulating circuit board 10, a semiconductor element 40 bonded to one surface (upper surface in FIG. 1) of the insulating circuit board 10, and the other surface side (see FIG. 1 and a heat sink 31 joined to the lower side. In the present embodiment, the insulating circuit board 10 to which the heat sink 31 is bonded is the insulating circuit board 30 with a heat sink.

  As shown in FIG. 1, the insulating circuit board 10 includes a ceramic substrate 11 serving as an insulating layer, a circuit layer 12 disposed on one surface (the upper surface in FIG. 1) of the ceramic substrate 11, and the ceramic substrate 11. And a metal layer 13 disposed on the other surface (the lower surface in FIG. 1).

The ceramic substrate 11 prevents electrical connection between the circuit layer 12 and the metal layer 13, and has high insulating properties such as aluminum nitride (AlN), silicon nitride (Si ₃ N ₄ ), alumina (Al ₂ O ₃ ) and the like. In this embodiment, it is made of aluminum nitride. Here, the thickness of the ceramic substrate 11 is set within a range of 0.2 to 1.5 mm, and is set to 0.635 mm in the present embodiment.

The circuit layer 12 is formed by bonding a conductive metal plate to one surface of the ceramic substrate 11. In the present embodiment, the circuit layer 12 is formed by bonding an aluminum plate made of pure aluminum or an aluminum alloy. Specifically, as the aluminum plate constituting the circuit layer 12, a rolled plate of aluminum (2N aluminum) having a purity of 99 mass% or more is used.
A circuit pattern is formed on the circuit layer 12, and one surface (the upper surface in FIG. 1) is a mounting surface on which the semiconductor element 40 is mounted. Here, the thickness of the circuit layer 12 is set within a range of 0.1 mm or more and 2.0 mm or less, and is set to 0.6 mm in the present embodiment.

The metal layer 13 is formed by joining an aluminum plate made of pure aluminum or an aluminum alloy to the other surface of the ceramic substrate 11. In the present embodiment, a rolled plate of aluminum (4N aluminum) having a purity of 99.99 mass% or more is used as the aluminum plate constituting the metal layer 13.
Here, the thickness of the metal layer 13 is set within a range of 0.1 mm or more and 2.0 mm or less, and is set to 0.6 mm in the present embodiment.

The heat sink 31 is for cooling the insulating circuit board 10 described above, and in the present embodiment, as shown in FIG. 1, it is a heat radiating plate made of a material having good thermal conductivity. The heat sink 31 in the present embodiment is a heat radiating plate made of aluminum or an aluminum alloy, and is specifically made of an A6063 alloy.
The heat sink 31 is bonded to the metal layer 13 of the insulated circuit board 10 using a brazing material.

As shown in FIG. 1, the semiconductor element 40 includes an element body 41 made of a semiconductor material such as Si or SiC, and a metallized layer 42 formed on the bonding surface side of the circuit layer 12 of the element body 41. It has. The metallized layer 42 includes a metal (for example, one or more selected from copper, silver, and gold) that interdiffuses with aluminum. In the present embodiment, the metallized layer 42 is made of copper.
Here, FIG. 2 shows an enlarged view of the bonding interface between the circuit layer 12 and the semiconductor element 40, and FIG. 3 shows an enlarged view of the vicinity of the metallized layer 42 of the semiconductor element 40 before bonding to the circuit layer 12.

  In the semiconductor element 40, as shown in FIGS. 2 and 3, a barrier layer 43 is formed between the metallized layer 42 and the element body 41. The barrier layer 43 is made of one or more of nickel, titanium, and chromium. In the present embodiment, the barrier layer 43 has a structure in which a titanium layer 43a and a nickel layer 43b are laminated. In the present embodiment, as shown in FIGS. 2 and 3, the titanium layer 43a is disposed on the element body 41 side, and the nickel layer 43b is disposed on the metallized layer 42 side.

Here, in the semiconductor element 40 before bonding, as shown in FIG. 3, the thickness t _C0 of the metallized layer 42 made of copper is in the range of 1 nm to 100 nm. The thickness t _B of the barrier layer 43 is in the range of 5 nm to 5000 nm, the thickness t _T of the titanium layer 43a is in the range of 5 nm to 100 nm, and the thickness t _N of the nickel layer 43b is 500 nm. It is within the range of 5000 nm or less.

The semiconductor element 40 and the circuit layer 12 are bonded by solid phase diffusion bonding. Specifically, the aluminum of the circuit layer 12 and the metal (copper in this embodiment) of the metallized layer 42 are bonded together by diffusing each other. Therefore, as shown in FIGS. 2 and 3, the thickness t _c1 of the metallized layer 42 after bonding is thinner than the thickness t _C0 of the metallized layer 42 before bonding.

Here, the aluminum of the circuit layer 12 has diffused to the barrier layer 43. Further, copper in the metallized layer 42 is also diffused into the barrier layer 43. For this reason, a compound phase (not shown) containing aluminum and copper is formed in the barrier layer 43 after bonding.
Further, the barrier layer 43 suppresses diffusion of aluminum of the circuit layer 12 and copper of the metallized layer 42 to the element body 41.

  Next, the manufacturing method of the semiconductor device (power module 1) which is this embodiment is demonstrated with reference to FIG.4 and FIG.5.

(Circuit layer and metal layer forming step S11)
First, an aluminum plate is laminated on one surface and the other surface of the ceramic substrate 11 via a brazing material. And under vacuum conditions, it heats in the state pressurized in the lamination direction, the ceramic substrate 11 and the aluminum plate are joined, and the circuit layer 12 and the metal layer 13 are formed.

Here, the joining conditions in the circuit layer and metal layer forming step S11 are as follows: the degree of vacuum is 10 ⁻³ Pa or less, the pressure load is in the range of 0.1 MPa to 3.0 MPa, and the heating temperature is 600 ° C. to 645 ° C. It is preferable to be within the range. Further, as the brazing material, it is preferable to use an Al—Si based brazing material or the like.
Thus, the insulated circuit board 10 which is this embodiment is manufactured.

(Heat sink joining step S12)
Next, the heat sink 31 is laminated on the other surface side of the metal layer 13 of the insulating circuit board 10 via a brazing material. And it heats in the state pressurized in the lamination direction under vacuum conditions, and the ceramic substrate 11 and a heat sink are joined.

Here, the joining conditions in the heat sink joining step S12 include a degree of vacuum of 10 ⁻³ Pa or less, a pressure load in the range of 0.1 MPa to 3.0 MPa, and a heating temperature in the range of 580 ° C. to 610 ° C. It is preferable to do. Further, as the brazing material, it is preferable to use an Al—Si based brazing material or the like.
Thus, the insulated circuit board 30 with a heat sink which is this embodiment is manufactured.

(Barrier layer forming step S21)
Further, a titanium layer 43 a and a nickel layer 43 b to be the barrier layer 43 are formed on one end face of the element body 41. This barrier layer 43 (titanium layer 43a and nickel layer 43b) can be formed by a known film formation technique such as sputtering.

(Metalized layer forming step S22)
Next, the metallized layer 42 is formed so as to be laminated on the barrier layer 43. Similar to the barrier layer 43, the metallized layer 42 can be formed by a known film formation technique such as sputtering.
In this manner, the semiconductor element 40 including the metallized layer 42 and the barrier layer 43 is manufactured.

(Lamination process S01)
Then, as shown in FIG. 5, the semiconductor element 40 is stacked on the circuit layer 12 of the insulating circuit substrate 10. In the present embodiment, the semiconductor element 40 is stacked so that the metallized layer 42 is in contact with the circuit layer 12.

(Solid phase diffusion bonding step S02)
Next, as shown in FIG. 5, the laminated insulating circuit board 10 and the semiconductor element 40 are pressurized and heated in the laminating direction, and the metallized layer 42 and the circuit layer 12 of the semiconductor element 40 are solid-phase diffused. Join.
Here, the heating temperature in the solid phase diffusion bonding step S02 is within a range of 380 ° C. or higher and lower than the eutectic temperature of the metal and the aluminum constituting the metallized layer 42. For example, when the metallized layer 42 is made of copper, the heating temperature is 380 ° C. or higher and lower than 548 ° C., and when it is made of silver, the heating temperature is 380 ° C. or higher and lower than 567 ° C., and is made of gold. The heating temperature is 380 ° C. or more and less than 525 ° C.
Further, the holding time at the heating temperature is in the range of 30 min to 120 min. Furthermore, the pressure load in the stacking direction is in the range of 1.0 kgf / cm ^{2 to} 30 kgf / cm ² (0.1 MPa to 3.0 MPa).

  Through the steps as described above, the circuit layer 12 of the insulated circuit board 10 and the semiconductor element 40 are directly bonded by solid phase diffusion bonding, and the semiconductor device (power module 1) according to the present embodiment is manufactured.

  According to the manufacturing method of the semiconductor device (power module 1) of the present embodiment configured as described above, the circuit layer 12 of the insulating circuit board 10 is made of aluminum or an aluminum alloy, and the metallized layer 42 is formed on the semiconductor element 40. Are formed, and the metallizing layer 42 and the circuit layer 12 of the semiconductor element 40 are solid-phase diffused by laminating the semiconductor element 40 and the insulating circuit substrate 10 and pressurizing and heating it in the laminating direction. A solid phase diffusion bonding step S02 for bonding, and the heating temperature in the solid phase diffusion bonding step S02 is within a range of 380 ° C. or higher and lower than the eutectic temperature of the metal and the metal constituting the metallized layer 42. Therefore, the aluminum of the circuit layer 12 and the metal of the metallized layer 42 (copper in this embodiment) can be sufficiently interdiffused, and the semiconductor element It can be reliably bonded to the 40 and the circuit layer 12. Moreover, it can suppress that a liquid phase arises at the time of joining, and the shape of the circuit layer 12 can be maintained.

  In the present embodiment, the semiconductor element 40 and the circuit layer 12 are directly bonded by solid phase diffusion bonding, and the semiconductor element 40 and the circuit layer 12 are securely bonded. Thus, the semiconductor device (power module 1) having excellent heat radiation characteristics can be obtained.

  In addition, the metallized layer 42 includes one or more selected from copper, silver, and gold as a metal that interdiffuses with aluminum. Even when the heating temperature in the phase diffusion bonding step S02 is 380 ° C. or more and within the range of less than the eutectic temperature of the metal and aluminum constituting the metallized layer 42 (548 ° C. in the case of copper), the circuit layer 12 Aluminum and the metal (copper) of the metallized layer 42 can be sufficiently interdiffused, and the semiconductor element 40 and the circuit layer 12 can be reliably bonded.

  Further, a barrier layer 43 made of one or more of nickel, titanium, and chromium is formed between the metallized layer 42 and the element body 41. In this embodiment, the titanium layer 43a and the nickel layer 43b are formed. Therefore, the diffusion of the aluminum of the circuit layer 12 and the metal (copper) of the metallized layer 42 to the element body 41 can be suppressed. The characteristic change of can be suppressed.

  In the present embodiment, since the aluminum of the circuit layer 12 is diffused so as to reach the barrier layer 43, the aluminum of the circuit layer 12 and the metal (copper) of the metallized layer 42 can be sufficiently interdiffused. The semiconductor element 40 and the circuit layer 12 can be reliably bonded.

Furthermore, in this embodiment, the pressurizing load in the stacking direction in the solid phase diffusion bonding step S02 is in the range of 1.0 kgf / cm ^{2 to} 30 kgf / cm ² (0.1 MPa to 3.0 MPa). Therefore, the relatively thin and small semiconductor element 40 can be securely adhered to the circuit layer 12, and the semiconductor element 40 and the circuit layer 12 can be reliably solid-phase diffusion bonded.

As mentioned above, although embodiment of this invention was described, this invention is not limited to this, It can change suitably in the range which does not deviate from the technical idea of the invention.
For example, in the present embodiment, the structure in which the titanium layer 43a and the nickel layer 43b are stacked as the barrier layer 43 has been described. However, the present invention is not limited to this, and any one or two of nickel, titanium, and chromium are used. For example, as shown in FIG. 6, the barrier layer 143 may be formed of a single layer of chromium.

  Further, in the present embodiment, the metallized layer 42 has been described as remaining after bonding, but the present invention is not limited to this, and the metal of the metallized layer 42 is completely diffused as shown in FIG. Thus, the metallized layer 42 may be lost after the solid phase diffusion bonding. In this case, the metal constituting the metallized layer 42 is sufficiently diffused, and the semiconductor element 40 and the circuit layer 12 can be reliably bonded.

Furthermore, in the present embodiment, the circuit layer has been described as being made of aluminum or an aluminum alloy. However, the present invention is not limited to this, and the circuit layer has a laminated structure of a copper layer and an aluminum layer, and the aluminum layer has a semiconductor. It is good also as a structure which joins an element.
Moreover, although it demonstrated as what formed the metal layer which consists of aluminum or aluminum alloy in the other surface side of an insulating layer, it is not limited to this, A metal layer does not need to be formed, You may comprise with other metals, such as copper. Furthermore, the metal layer may have a laminated structure of a copper layer and an aluminum layer.

In the present embodiment, the ceramic substrate 11 constituting the insulating layer has been described by taking aluminum nitride (AlN) as an example. However, the present invention is not limited to this, and alumina (Al ₂ O ₃ ), silicon nitride is not limited thereto. It may be composed of other ceramics such as (Si ₃ N ₄ ). Further, an insulating resin or the like may be used as the insulating layer.

Further, although the heat sink has been described as an example of the heat sink, the heat sink is not limited thereto, and a cooler or the like having a flow path through which a cooling medium flows may be used.
Furthermore, in the present embodiment, the heat sink has been described as being made of aluminum or an aluminum alloy. However, the heat sink is not limited to this, and copper or a copper alloy, or a carbonaceous porous body is impregnated with a metal. It may be composed of a carbonaceous composite material.

  Furthermore, in the present embodiment, the power module is configured by mounting the power semiconductor element on the circuit layer of the insulating circuit board. However, the present invention is not limited to this. For example, a thermoelectric module may be configured by mounting a thermoelectric element on a circuit layer of an insulating circuit board.

  Also, the configuration of the semiconductor element is not limited to the present embodiment, and if a metallized layer containing a metal that is formed on the joint surface side with the circuit layer and interdiffuses with aluminum is formed, Other configurations are not particularly limited.

  Below, the confirmation experiment performed in order to confirm the effectiveness of this invention is demonstrated.

A circuit layer (40 mm × 40 mm × 0.05 mm thick) made of aluminum (2N aluminum) having a purity of 99 mass% or more on one surface of a ceramic substrate (40 mm × 40 mm × thickness 0.38 mm) made of aluminum nitride (AlN) And a metal layer (40 mm × 40 mm × thickness 0.05 mm) made of aluminum (4N aluminum) having a purity of 99.99 mass% or more was formed on the other surface of the ceramic substrate to produce an insulating circuit substrate.
In addition, the aluminum substrate used as a ceramic substrate and a circuit layer and a metal layer was joined by using Al-7.5 mass% Si brazing foil (thickness 12 μm), in a vacuum atmosphere (10 ⁻⁴ Pa), and a pressure load. Joining was performed under the conditions of 0.3 MPa, a heating temperature of 642 ° C., and a holding time of 30 min.

Moreover, a heat source chip (1.0 mm × 1.0 mm) on which a metallized layer and a barrier layer made of the materials shown in Table 1 were formed as a semiconductor element to be a heat source was prepared. Then, the heat source chip was solid phase diffusion bonded on the circuit layer under the conditions described in Table 1.
In the conventional example, the heat source chip was bonded onto the circuit layer using Pb-free solder (composition: Sn-3.0 mass% Ag-0.5 mass% Cu).
The thermal resistance of the obtained semiconductor device of the conventional example and the example of the present invention was measured as follows.

(Thermal resistance)
The thermal resistance was calculated by the following equation from the temperature of the heat source chip and the ambient temperature (25 ° C.) when the input power was 5 W.
(Heat source chip temperature-ambient temperature) / input power

In Comparative Example 1 in which the heating temperature at the time of bonding was lower than that of the present invention, the semiconductor element (heat source chip) and the circuit layer could not be bonded. For this reason, the measurement of thermal resistance was not implemented.
In Comparative Example 2-4, where the heating temperature at the time of bonding was higher than that of the present invention, the circuit layer was melted. For this reason, the measurement of thermal resistance was not implemented.
In the conventional example in which the semiconductor element (heat source chip) and the circuit layer are solder-bonded, the thermal resistance is relatively high at 33.0 K / W.

On the other hand, according to the example of the present invention, the semiconductor element (heat source chip) and the circuit layer can be bonded satisfactorily, and the thermal resistance can be suppressed lower than that of the conventional example.
From the above, according to the example of the present invention, the circuit layer and the semiconductor element can be reliably bonded by solid phase diffusion bonding, and the heat generated in the semiconductor element can be efficiently transmitted to the insulated circuit board side, It was confirmed that a semiconductor device having excellent heat dissipation characteristics can be manufactured.

1 Power module (semiconductor device)
10 Insulated circuit board 11 Ceramic substrate (insulating layer)
12 circuit layer 13 metal layer 40 semiconductor element 41 element body 42 metallized layer 43 barrier layer

Claims (5)

A method for manufacturing a semiconductor device, comprising: an insulating circuit substrate having a circuit layer formed on one surface of the insulating layer; and a semiconductor element bonded on the circuit layer,
The bonding surface of the circuit layer with the semiconductor element is made of aluminum or an aluminum alloy,
The semiconductor element comprises an element body and a metallized layer containing a metal that interdiffuses with aluminum,
A laminating step of laminating the semiconductor element on the circuit layer so that the metallized layer is in contact with the circuit layer;
A solid-phase diffusion bonding step of solid-phase diffusion bonding the metallized layer and the circuit layer of the semiconductor element by heating the semiconductor element and the insulating circuit substrate in a laminating direction while heating them;
Have
A method for manufacturing a semiconductor device, wherein a heating temperature in the solid phase diffusion bonding step is 380 ° C. or higher and lower than a eutectic temperature of metal and aluminum constituting the metallized layer.   2. The method of manufacturing a semiconductor device according to claim 1, wherein the metallized layer includes at least one selected from copper, silver, and gold as a metal interdiffusing with aluminum.   3. The method of manufacturing a semiconductor device according to claim 1, wherein, in the solid phase diffusion bonding step, the metallized layer is eliminated by diffusing a metal constituting the metallized layer. 4.   The barrier layer which consists of any 1 type, or 2 or more types of nickel, titanium, or chromium is formed between the said metallization layer and the said element main body. A method for manufacturing the semiconductor device according to the item.   The method of manufacturing a semiconductor device according to claim 4, wherein aluminum in the circuit layer is diffused in the barrier layer.

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