JP2018137839A - Power factor improvement circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power factor improvement circuit capable of suppressing a rise in an output capacitor voltage even if an input voltage fluctuates and capable of achieving miniaturization of an apparatus by reducing the capacitance of a capacitor.SOLUTION: The power factor improvement circuit, having step-up conversion means 10, includes: amplitude fluctuation detection means 16a for detecting an amplitude fluctuation of an input voltage; input current command value creation means 18 for creating an input current command value on the basis of an error between an input voltage, an output voltage and a command value; and current command value adjustment means 16b for adjusting the input current command value so that input power is maintained, using the detected amplitude fluctuation.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a power factor correction circuit.

  Conventionally, PFC (Power Factor Correction) circuits have been used in electronic devices that require a large-capacity power supply in order to suppress harmonic current. The PFC circuit is also called a power factor correction circuit.

  Patent Document 1 discloses a step-up converter circuit that suppresses an output peak voltage to be low, a wide input voltage range, and a wide output voltage range in a step-up converter that converts a voltage higher than an input voltage. Is described. Specifically, the PFC circuit includes an input voltage detection unit that detects a voltage input to the PFC circuit and an output voltage setting unit that sets an output voltage of the PFC circuit, and the maximum input voltage value input to the PFC circuit. Further, a configuration in which a value obtained by subtracting the maximum overshoot width corresponding to the input voltage detected by the input voltage detection unit from the value obtained by adding the maximum load fluctuation range at the maximum input voltage is set as the output voltage value of the PFC circuit. Have been described.

Japanese Patent Application Laid-Open No. 2015-149858

  The output voltage and output peak voltage of the PFC circuit are preferably lowered for the following reasons. That is, first, since the rated voltage of the output capacitor used in the output stage of the PFC circuit can be kept low, a small output capacitor can be used, and the power supply for electronic equipment can be miniaturized. Second, since the potential difference from the secondary circuit can be kept low, the required insulation distance can be shortened, and the power supply for electronic equipment can be reduced in size.

  However, in the above prior art, when the capacitance of the output capacitor is reduced, the steady ripple of the output voltage is increased, so that overshoot and undershoot are also increased, and the settable range of the output voltage is narrowed. For this reason, it is difficult to sufficiently reduce the capacity of the output capacitor, and it is difficult to reduce the size of the apparatus.

  An object of the present invention is to provide a technique that can suppress an increase in output capacitor voltage even when an input voltage fluctuates, and that can reduce the capacitor capacity and reduce the size of the device.

  The present invention relates to a power factor correction circuit that boosts and converts an input AC voltage into a DC voltage, an amplitude fluctuation detecting means for detecting amplitude fluctuation of the input voltage, an error between the input voltage, the output voltage, and the command value. An input current command value generating means for generating an input current command value based on the current, and a current command value adjusting means for adjusting the input current command value so that the input power is maintained using the detected amplitude fluctuation; Is a power factor correction circuit.

  In the present invention, when the amplitude fluctuation of the input voltage is detected, the input current command value is adjusted so that the input power is maintained accordingly, so that the power balance between the input and output is maintained, and the charge / discharge current of the output capacitor is maintained. Does not change, the rise and fall of the output capacitor voltage can be suppressed. Accordingly, the output capacitor capacity can be reduced and the circuit can be miniaturized.

  In one embodiment of the present invention, the amplitude variation is an amplitude variation rate, and the current command value adjustment unit adjusts the input current command value using a reciprocal of the amplitude variation rate as a control magnification.

  In another embodiment of the present invention, the amplitude fluctuation detecting means predicts a current input voltage from an effective value of the input voltage, and detects the amplitude fluctuation ratio from a ratio of the current input voltage to the predicted input voltage. .

  In still another embodiment of the present invention, the amplitude fluctuation detecting means predicts a current input voltage based on an effective value of the input voltage and a waveform of the input voltage being a sine wave.

  In still another embodiment of the present invention, the amplitude fluctuation detecting means includes a memory for storing a waveform of at least a half cycle of the input voltage, and the amplitude is calculated from a ratio of the current input voltage and the input voltage before the half cycle. Detect the rate of change.

  In still another embodiment of the present invention, the current command value adjusting means adjusts the input current command value when the amplitude variation rate exceeds a threshold value.

  In still another embodiment of the present invention, there is provided a removing unit that removes the amplitude variation rate generated by the harmonic component superimposed on the input AC voltage.

  According to the present invention, even when the input voltage fluctuates due to a change in the operating state of the peripheral device or the like, an increase in the voltage of the output capacitor can be suppressed, and the capacity of the output capacitor can be reduced and the circuit can be downsized.

It is a whole block diagram of a power factor improvement circuit. It is a circuit block diagram of a power factor improvement circuit. It is a timing chart of each part. It is a simulation result figure of a conventional circuit. It is a simulation result figure of an embodiment circuit. It is calculation explanatory drawing of a vibration amplitude rate. It is explanatory drawing of an amplitude fluctuation rate in case a harmonic component is superimposed on AC voltage. It is explanatory drawing of a detection dead zone.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

<Embodiment 1>
FIG. 1 shows a configuration block diagram of a power factor correction circuit in the present embodiment. The power factor improving circuit includes a boost converter 10, an input voltage detector 12, an input current detector 14, an amplitude variation detector 16a, a current command value adjuster 16b, an input current command value generator 18, a current error detector 20, A switch control unit 22, an output voltage detection unit 24, a voltage error detection unit 26, and a voltage compensator 28 are provided.

  The step-up converter 10 steps up the input AC voltage to a DC voltage and outputs it. The step-up converter 10 includes a switching element, and on / off of the switching element is controlled by the switch controller 22.

  The input voltage detector 12 detects the input voltage of the boost converter 10. The input voltage detection unit 12 supplies the detected input voltage to the amplitude fluctuation detection unit 16 a and the input current command value generation unit 18.

  The input current detection unit 14 detects the input current of the boost conversion unit 10. The input current detection unit 14 supplies the detected input current to the current error detection unit 20.

  The amplitude fluctuation detecting means 16a detects the amplitude fluctuation of the input voltage detected by the input voltage detecting means 12 and supplies it to the current command value adjusting means 16b.

  The input current command value generation means 18 generates an input current command value based on the input voltage detected by the input voltage detection means 12 and the output voltage, and outputs it to the current command value adjustment means 16b.

  The current command value adjusting means 16b adjusts the input current command value based on the input current command value from the input current command value generating means 18 and the amplitude fluctuation from the amplitude fluctuation detecting means 16a, and the adjusted input current command value Is supplied to the current error detecting means 20.

  The current error detection unit 20 generates a drive signal based on the adjusted input current command value and the input current detected by the input current detection unit 14 and supplies the drive signal to the switch control unit 22.

  The output voltage detector 24 detects the output voltage of the boost converter 10. The output voltage detection unit 24 supplies the detected output voltage to the voltage error detection unit 26.

  The voltage error detecting means 26 detects an error between the detected output voltage and a predetermined command value, and supplies it to the voltage compensator 28.

  The voltage compensator 28 generates a voltage for compensation based on the detected error and supplies it to the input current command value generation means 18. As described above, the input current command value generation unit 18 generates an input current command value based on the input voltage detected by the input voltage detection unit 12 and the output voltage, and outputs the input current command value to the current command value adjustment unit 16b. More specifically, however, an input current command value is generated based on the input voltage detected by the input voltage detection means 12 and the compensation voltage generated by the voltage compensator 28, and is output to the current command value adjustment means 16b. .

  A characteristic block in the present embodiment is a block 16 including an amplitude fluctuation detecting means 16a and a current command value adjusting means 16b, and thereby adjusting an input current command value in consideration of amplitude fluctuation.

  In FIG. 1, it is also possible to grasp the boost conversion means 10 as a power factor correction circuit main body and the other blocks as a control circuit for driving and controlling the power factor improvement circuit main body. The control circuit is also referred to as a power factor correction circuit.

  FIG. 2 shows a specific circuit configuration of the configuration block shown in FIG.

The step-up conversion means 10 is a bridgeless PFC circuit, which steps up an AC voltage from a power source and outputs it as a DC voltage. The bridgeless PFC circuit includes a step-up chopper circuit, specifically a reactor connected to an AC power supply, a switching element (switching transistor), a body diode connected in reverse parallel to the switching element, and a diode connected in series to the switching element And an output capacitor _CVH . This output capacitor C _VH is an output capacitor whose capacity is to be reduced. A load 30 is connected to the output capacitor _CVH .

The input voltage detection means 12 includes a voltage sensor 12a and an A / D 12b connected to an AC power supply, converts the detected input voltage _Vac into a digital value, and detects an amplitude fluctuation detection means 16a and an input current command value generation means 18. To supply.

Input current detecting means 14 is composed of the current sensor 14a and A / D14B connected to the AC power source, for supplying an input current i _ac detected current error detection means 20 is converted into a digital value.

  The amplitude fluctuation detecting means 16a is constituted by a processor such as a CPU, detects the amplitude fluctuation rate of the detected input voltage, and supplies it to the current command value adjusting means 16b.

On the other hand, the output voltage detecting means 24, the output of the boost converter 10, i.e., is composed of a voltage sensor 24a and A / D24b connected to the output capacitor C _VH, voltage and converts the detected output voltage V _vh into a digital value The error detection means 26 is supplied.

The voltage error detecting means 26 includes a differentiator, and calculates a voltage error by calculating a difference between a predetermined output command value V _vh ^(REF) and a detected value V _vh .

The voltage compensator 28 includes a processor such as a CPU, calculates a voltage (compensation voltage) V _c for compensating the calculated error, and supplies the calculated voltage (compensation voltage) V _c to the input current command value generation means 18.

  The input current command value generation means 18 is composed of a processor such as a CPU, generates a sine wave whose frequency and phase are synchronized with the input voltage waveform, and combines the compensation voltage generated by the voltage compensator 28 at the current time. Calculate the input current command value.

  The current command value adjusting means 16b is constituted by a processor such as a CPU, and calculates the reciprocal of the amplitude fluctuation rate detected by the amplitude fluctuation detecting means 16a as a control magnification, and adjusts the input current command value using this control magnification. To do.

  The current error detection means 20 is constituted by a subtractor, calculates the difference between the adjusted input current command value and the detected input current as an error, and supplies it to the switch control means 22.

  The switch control means 22 is composed of a PWM 22a and a driver (DRV) 22b. The current error is subjected to PWM modulation (pulse width modulation) and supplied to the driver 22b. Control.

  Hereinafter, the processes in the amplitude fluctuation detecting unit 16a, the current command value adjusting unit 16b, and the input current command value generating unit 18 will be described more specifically.

The amplitude fluctuation detecting means 16a calculates the amplitude fluctuation rate according to the following procedure.
(1) Calculation of effective value of input voltage ・ Each time when the input voltage waveform crosses zero, the effective value of the immediately preceding half cycle period is calculated. E) Find the average value for one period.
・ Generate a waveform with the above effective value delayed by one period.
Based on the sign of the slope at the zero crossing point of the input voltage waveform
a) When the slope is positive, the effective value delayed by one cycle is output as the effective value,
b) When the slope is negative, the arithmetic mean value of the effective value and the value obtained by delaying the effective value by one cycle is output as the effective value.

(2) Calculation of predicted input voltage at current time • Based on the obtained effective value, calculate an estimated input voltage at the current time according to the following equation.

Here, V _ac ^(RMS) is an input voltage effective value, and V _ac ^(EST) (t) is an input voltage predicted value at time t.

(3) Calculation of amplitude fluctuation rate-The amplitude fluctuation rate is calculated from the ratio of the current input voltage and the input voltage predicted value of (2) above.

Here, V _ac (t) is the input voltage at time t, and a is the amplitude variation rate.

  The input current command value generation means 18 generates a sine wave whose frequency and phase are synchronized with the input voltage waveform, and combines the input voltage effective value generated by the amplitude fluctuation detection means 16a and the output of the voltage compensator 28 together with the current The command value of the input current at the time is calculated by the following formula.

Here, V _c is a compensation voltage, and i _ac ^(REF) (t) is an input current command value at time t.

The current command value adjusting means 16b calculates a final input current command value according to the following procedure.
(1) The reciprocal of the amplitude fluctuation rate obtained by the amplitude fluctuation detecting means 16a is calculated to obtain the control magnification.
(2) The input current command value generated by the input current command value generating means 18 is multiplied by the control magnification to obtain a final input current command value. That is,

Here, i _ac ^(REF) _(adj) (t) is the adjusted input current command value at time t. From this equation, it can be seen that the final input current command value is determined based on the amplitude variation rate, the input voltage effective value, and the compensation voltage.

  FIG. 3 shows a timing chart of each part in the present embodiment. Input voltage, input voltage (full-wave rectification), input voltage effective value (average for one cycle), input voltage effective value (1 cycle delay), input voltage effective value, input voltage (predicted value), input current The waveforms of the command value, the input current command value (after adjustment), and the input voltage are shown. This is a waveform when the input voltage amplitude suddenly fluctuates a times at time A. The input voltage to amplitude variation rate is the operation in the amplitude variation detection means 16a, and the input current command value to the input current command value (after adjustment) is the operation in the current command value adjustment means 16b.

  Assuming that the circuit is in a steady state before the time A, the effective value of the input voltage waveform is constant, and the amplitude variation rate a and the control magnification as its reciprocal are 1. At this time, the input current command value after adjustment is the same as the input current command value before adjustment.

  When the input voltage amplitude suddenly fluctuates by a times at time A, the input voltage immediately changes, but the effective value of the input voltage thereafter remains constant for 1.5 period periods, and the subsequent 0.5 period period is intermediate. Shows a good value and then settles back to a constant value.

  In accordance with this, the amplitude of the predicted input voltage also changes. Therefore, the amplitude fluctuation rate is 1.5 period a immediately after the input voltage amplitude fluctuation, the subsequent 0.5 period is an intermediate value between a and 1, and thereafter Changes to settle to 1.

  Similarly, the input current command value also maintains a value before the fluctuation for 1.5 period immediately after the fluctuation of the input voltage amplitude, changes so as to settle to an intermediate value for the subsequent 0.5 period period, and then to a new value. To do.

  By multiplying the input current command value by using the reciprocal of this amplitude variation rate as the control magnification, the input current is controlled to 1 / a times immediately after the input voltage amplitude changes to a times, and the input power becomes constant. Maintained.

As described above, since the input power is maintained constant by adjusting the input current according to the amplitude fluctuation of the input voltage, the voltage fluctuation of the output capacitor C _VH of the bridgeless PFC circuit as the boost converter 10 is prevented. Can do. Therefore, the capacity of the output capacitor C _VH can be made smaller than that of the conventional circuit, and the apparatus can be miniaturized.

  If the input current is not adjusted as in the prior art, the input current command value does not change even though the input voltage has increased a times, so the input power changes as shown by the broken line in FIG. A period will occur and the output capacitor voltage will change.

  4 and 5 show circuit simulation results using a computer. FIG. 4 is a simulation result of the conventional circuit that does not include the block 16, that is, the amplitude fluctuation detection 16a and the current command value adjustment unit 16b in FIG. 1, and FIG. 5 is a simulation result of the circuit of the present embodiment. In both figures, waveforms of input voltage, input current, and output voltage are shown. In the conventional circuit shown in FIG. 4, the output voltage fluctuates greatly because the control of the input current is slow when the input voltage suddenly rises or falls, whereas in the circuit of this embodiment shown in FIG. Since the input current is immediately controlled when the voltage suddenly rises or falls, there is almost no fluctuation in the output voltage.

<Embodiment 2>
In the first embodiment, the amplitude fluctuation detection means 16a calculates the input voltage predicted value from the input voltage effective value, and calculates the amplitude fluctuation rate a from the ratio between the current input voltage and the input voltage predicted value. May be used to calculate the amplitude fluctuation rate a.

FIG. 6 shows another calculation method of the amplitude variation rate a. A waveform memory is provided, and at least a half-cycle input voltage waveform is stored in the waveform memory. Then, the amplitude fluctuation rate a may be calculated from the ratio between the voltage V _ac ^ (m) before the half cycle and the current input voltage V _ac (m). That is, a = V _ac (m) / V _ac ^ (m).

<Embodiment 3>
In the first embodiment, the waveform of the AC power supply input to the circuit is a single sine wave. However, the waveform is not necessarily limited to this, and may be a waveform including harmonics.

  FIG. 7 shows, as an example, the input voltage waveform and the amplitude variation rate when the third harmonic is superimposed on the fundamental wave and when the fifth harmonic is superimposed on the fundamental wave. FIG. 7A shows the input voltage, and FIG. 7B shows the amplitude variation rate.

  The amplitude variation rate varies not only depending on the type of the superimposed harmonic wave but also varies depending on time. As a result, even if there is no change in the input voltage (effective value), it is determined that there is a change in the input voltage, and the input current is erroneously controlled even though it is not necessary. There is a risk of inviting.

  Therefore, the time fluctuation of the amplitude fluctuation rate that can be generated by the assumed harmonic is grasped in advance, and if the observed amplitude fluctuation rate is a value that can be generated by the influence of the harmonic, control is performed. By providing an amplitude fluctuation detection dead zone so as not to occur, the above erroneous determination can be avoided.

  FIG. 8 shows an example of an amplitude fluctuation detection dead zone. The worst pattern is detected in advance and stored in the memory, and a detection dead zone is set for this pattern. When the actually detected amplitude fluctuation rate corresponds to this detection dead zone, the amplitude fluctuation rate is fixed to 1 and the input current control is suppressed.

  As mentioned above, although embodiment of this invention was described, this invention is not limited to these embodiment, A various deformation | transformation is possible. Hereinafter, modified examples will be described.

<Modification 1>
In the embodiment, the amplitude fluctuation rate a is calculated, and the reciprocal of the amplitude fluctuation rate a is further calculated as the control magnification. However, the present invention is not limited to this, and when the amplitude fluctuation rate increases, a negative correlation is generated. It is only necessary to set the control magnification so as to have any of the following, and any mathematical expression or function, and further a conversion map can be used. In short, the input current may be controlled so as to keep the input power constant according to the amplitude fluctuation of the input voltage.

<Modification 2>
In the third embodiment, the amplitude fluctuation detection dead zone is set. However, a threshold value may be provided, and the input current command value may be adjusted only when the amplitude fluctuation rate exceeds this threshold value. Specifically, a comparator is provided in the amplitude fluctuation detecting means 16a, the amplitude fluctuation rate a calculated by the comparator is compared with the threshold value, and the amplitude fluctuation rate is set in the current command value adjusting means 16b only when the threshold value is exceeded. It is good also as a structure to supply. In other words, the current command value adjusting means 16b may adjust the input current command value only when the amplitude variation rate a exceeds the threshold value. In short, when an amplitude fluctuation rate is generated due to the fact that the AC voltage from the power source includes harmonic components such as the third harmonic and the fifth harmonic, a means for removing the amplitude fluctuation rate may be provided. .

<Modification 3>
In the embodiment, the amplitude fluctuation detecting means 16a, the current command value adjusting means 16b, the input current command value generating means 18, and the voltage compensator 28 are constituted by a processor such as a CPU, and each calculation is performed by a processing program stored in a ROM or the like. However, in addition to processing with a single processor, distributed processing may be performed with a plurality of processors. Further, instead of software processing such as execution of a processing program by the processor, at least one of these blocks may be hardware processing using a dedicated circuit such as an ASIC or FPGA (Field Programmable Gate Array).

<Modification 4>
An isolated DCDC converter may be connected to the output of the power factor correction circuit of the embodiment to function as a charging device for a battery mounted on a vehicle, for example, and the charging device can be reduced in size by reducing the output capacitor capacity. It becomes possible to plan.

  10 boost conversion means, 12 input voltage detection means, 14 input current detection means, 16a amplitude fluctuation detection means, 16b current command value adjustment means, 18 input current command value generation means, 20 current error detection means, 22 switch control means, 24 Output current detection means, 26 Voltage error detection means, 28 Voltage compensator.

Claims (7)

A power factor correction circuit that boosts and converts an input AC voltage into a DC voltage,
Amplitude fluctuation detecting means for detecting amplitude fluctuation of the input voltage;
An input current command value generating means for generating an input current command value based on an error between the input voltage and the output voltage and the command value;
Current command value adjusting means for adjusting the input current command value so that the input power is maintained using the detected amplitude fluctuation;
Power factor correction circuit with The amplitude variation is an amplitude variation rate,
The power factor correction circuit according to claim 1, wherein the current command value adjustment unit adjusts the input current command value using a reciprocal of the amplitude variation rate as a control magnification. The power factor improvement according to claim 2, wherein the amplitude fluctuation detection means predicts a current input voltage from an effective value of the input voltage, and detects the amplitude fluctuation rate from a ratio of the current input voltage to the predicted input voltage. circuit. The power factor correction circuit according to claim 3, wherein the amplitude variation detection unit predicts a current input voltage based on an effective value of the input voltage and a waveform of the input voltage being a sine wave. The amplitude variation detecting unit includes a memory that stores a waveform of at least a half cycle of the input voltage, and detects the amplitude variation rate from a ratio between a current input voltage and an input voltage before a half cycle. Power factor correction circuit. The power factor correction circuit according to any one of claims 2 to 5, wherein the current command value adjusting means adjusts the input current command value when the amplitude variation rate exceeds a threshold value. The power factor correction circuit according to any one of claims 2 to 5, further comprising a removing unit that removes the amplitude variation rate caused by a harmonic component superimposed on the input AC voltage.